1 /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
3 Copyright (C) 1993-2021 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "frame-unwind.h"
23 #include "frame-base.h"
24 #include "dwarf2/frame.h"
35 #include "reggroups.h"
36 #include "arch-utils.h"
40 #include "trad-frame.h"
44 #include "alpha-tdep.h"
47 /* Instruction decoding. The notations for registers, immediates and
48 opcodes are the same as the one used in Compaq's Alpha architecture
51 #define INSN_OPCODE(insn) ((insn & 0xfc000000) >> 26)
53 /* Memory instruction format */
54 #define MEM_RA(insn) ((insn & 0x03e00000) >> 21)
55 #define MEM_RB(insn) ((insn & 0x001f0000) >> 16)
56 #define MEM_DISP(insn) \
57 (((insn & 0x8000) == 0) ? (insn & 0xffff) : -((-insn) & 0xffff))
59 static const int lda_opcode
= 0x08;
60 static const int stq_opcode
= 0x2d;
62 /* Branch instruction format */
63 #define BR_RA(insn) MEM_RA(insn)
65 static const int br_opcode
= 0x30;
66 static const int bne_opcode
= 0x3d;
68 /* Operate instruction format */
69 #define OPR_FUNCTION(insn) ((insn & 0xfe0) >> 5)
70 #define OPR_HAS_IMMEDIATE(insn) ((insn & 0x1000) == 0x1000)
71 #define OPR_RA(insn) MEM_RA(insn)
72 #define OPR_RC(insn) ((insn & 0x1f))
73 #define OPR_LIT(insn) ((insn & 0x1fe000) >> 13)
75 static const int subq_opcode
= 0x10;
76 static const int subq_function
= 0x29;
79 /* Return the name of the REGNO register.
81 An empty name corresponds to a register number that used to
82 be used for a virtual register. That virtual register has
83 been removed, but the index is still reserved to maintain
84 compatibility with existing remote alpha targets. */
87 alpha_register_name (struct gdbarch
*gdbarch
, int regno
)
89 static const char * const register_names
[] =
91 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
92 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
93 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
94 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
95 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
96 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
97 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
98 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
104 if (regno
>= ARRAY_SIZE(register_names
))
106 return register_names
[regno
];
110 alpha_cannot_fetch_register (struct gdbarch
*gdbarch
, int regno
)
112 return (strlen (alpha_register_name (gdbarch
, regno
)) == 0);
116 alpha_cannot_store_register (struct gdbarch
*gdbarch
, int regno
)
118 return (regno
== ALPHA_ZERO_REGNUM
119 || strlen (alpha_register_name (gdbarch
, regno
)) == 0);
123 alpha_register_type (struct gdbarch
*gdbarch
, int regno
)
125 if (regno
== ALPHA_SP_REGNUM
|| regno
== ALPHA_GP_REGNUM
)
126 return builtin_type (gdbarch
)->builtin_data_ptr
;
127 if (regno
== ALPHA_PC_REGNUM
)
128 return builtin_type (gdbarch
)->builtin_func_ptr
;
130 /* Don't need to worry about little vs big endian until
131 some jerk tries to port to alpha-unicosmk. */
132 if (regno
>= ALPHA_FP0_REGNUM
&& regno
< ALPHA_FP0_REGNUM
+ 31)
133 return builtin_type (gdbarch
)->builtin_double
;
135 return builtin_type (gdbarch
)->builtin_int64
;
138 /* Is REGNUM a member of REGGROUP? */
141 alpha_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
142 struct reggroup
*group
)
144 /* Filter out any registers eliminated, but whose regnum is
145 reserved for backward compatibility, e.g. the vfp. */
146 if (gdbarch_register_name (gdbarch
, regnum
) == NULL
147 || *gdbarch_register_name (gdbarch
, regnum
) == '\0')
150 if (group
== all_reggroup
)
153 /* Zero should not be saved or restored. Technically it is a general
154 register (just as $f31 would be a float if we represented it), but
155 there's no point displaying it during "info regs", so leave it out
156 of all groups except for "all". */
157 if (regnum
== ALPHA_ZERO_REGNUM
)
160 /* All other registers are saved and restored. */
161 if (group
== save_reggroup
|| group
== restore_reggroup
)
164 /* All other groups are non-overlapping. */
166 /* Since this is really a PALcode memory slot... */
167 if (regnum
== ALPHA_UNIQUE_REGNUM
)
168 return group
== system_reggroup
;
170 /* Force the FPCR to be considered part of the floating point state. */
171 if (regnum
== ALPHA_FPCR_REGNUM
)
172 return group
== float_reggroup
;
174 if (regnum
>= ALPHA_FP0_REGNUM
&& regnum
< ALPHA_FP0_REGNUM
+ 31)
175 return group
== float_reggroup
;
177 return group
== general_reggroup
;
180 /* The following represents exactly the conversion performed by
181 the LDS instruction. This applies to both single-precision
182 floating point and 32-bit integers. */
185 alpha_lds (struct gdbarch
*gdbarch
, void *out
, const void *in
)
187 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
189 = extract_unsigned_integer ((const gdb_byte
*) in
, 4, byte_order
);
190 ULONGEST frac
= (mem
>> 0) & 0x7fffff;
191 ULONGEST sign
= (mem
>> 31) & 1;
192 ULONGEST exp_msb
= (mem
>> 30) & 1;
193 ULONGEST exp_low
= (mem
>> 23) & 0x7f;
196 exp
= (exp_msb
<< 10) | exp_low
;
208 reg
= (sign
<< 63) | (exp
<< 52) | (frac
<< 29);
209 store_unsigned_integer ((gdb_byte
*) out
, 8, byte_order
, reg
);
212 /* Similarly, this represents exactly the conversion performed by
213 the STS instruction. */
216 alpha_sts (struct gdbarch
*gdbarch
, void *out
, const void *in
)
218 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
221 reg
= extract_unsigned_integer ((const gdb_byte
*) in
, 8, byte_order
);
222 mem
= ((reg
>> 32) & 0xc0000000) | ((reg
>> 29) & 0x3fffffff);
223 store_unsigned_integer ((gdb_byte
*) out
, 4, byte_order
, mem
);
226 /* The alpha needs a conversion between register and memory format if the
227 register is a floating point register and memory format is float, as the
228 register format must be double or memory format is an integer with 4
229 bytes, as the representation of integers in floating point
230 registers is different. */
233 alpha_convert_register_p (struct gdbarch
*gdbarch
, int regno
,
236 return (regno
>= ALPHA_FP0_REGNUM
&& regno
< ALPHA_FP0_REGNUM
+ 31
237 && TYPE_LENGTH (type
) == 4);
241 alpha_register_to_value (struct frame_info
*frame
, int regnum
,
242 struct type
*valtype
, gdb_byte
*out
,
243 int *optimizedp
, int *unavailablep
)
245 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
246 struct value
*value
= get_frame_register_value (frame
, regnum
);
248 gdb_assert (value
!= NULL
);
249 *optimizedp
= value_optimized_out (value
);
250 *unavailablep
= !value_entirely_available (value
);
252 if (*optimizedp
|| *unavailablep
)
254 release_value (value
);
258 /* Convert to VALTYPE. */
260 gdb_assert (TYPE_LENGTH (valtype
) == 4);
261 alpha_sts (gdbarch
, out
, value_contents_all (value
).data ());
263 release_value (value
);
268 alpha_value_to_register (struct frame_info
*frame
, int regnum
,
269 struct type
*valtype
, const gdb_byte
*in
)
271 gdb_byte out
[ALPHA_REGISTER_SIZE
];
273 gdb_assert (TYPE_LENGTH (valtype
) == 4);
274 gdb_assert (register_size (get_frame_arch (frame
), regnum
)
275 <= ALPHA_REGISTER_SIZE
);
276 alpha_lds (get_frame_arch (frame
), out
, in
);
278 put_frame_register (frame
, regnum
, out
);
282 /* The alpha passes the first six arguments in the registers, the rest on
283 the stack. The register arguments are stored in ARG_REG_BUFFER, and
284 then moved into the register file; this simplifies the passing of a
285 large struct which extends from the registers to the stack, plus avoids
286 three ptrace invocations per word.
288 We don't bother tracking which register values should go in integer
289 regs or fp regs; we load the same values into both.
291 If the called function is returning a structure, the address of the
292 structure to be returned is passed as a hidden first argument. */
295 alpha_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
296 struct regcache
*regcache
, CORE_ADDR bp_addr
,
297 int nargs
, struct value
**args
, CORE_ADDR sp
,
298 function_call_return_method return_method
,
299 CORE_ADDR struct_addr
)
301 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
303 int accumulate_size
= (return_method
== return_method_struct
) ? 8 : 0;
306 const gdb_byte
*contents
;
310 struct alpha_arg
*alpha_args
= XALLOCAVEC (struct alpha_arg
, nargs
);
311 struct alpha_arg
*m_arg
;
312 gdb_byte arg_reg_buffer
[ALPHA_REGISTER_SIZE
* ALPHA_NUM_ARG_REGS
];
313 int required_arg_regs
;
314 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
316 /* The ABI places the address of the called function in T12. */
317 regcache_cooked_write_signed (regcache
, ALPHA_T12_REGNUM
, func_addr
);
319 /* Set the return address register to point to the entry point
320 of the program, where a breakpoint lies in wait. */
321 regcache_cooked_write_signed (regcache
, ALPHA_RA_REGNUM
, bp_addr
);
323 /* Lay out the arguments in memory. */
324 for (i
= 0, m_arg
= alpha_args
; i
< nargs
; i
++, m_arg
++)
326 struct value
*arg
= args
[i
];
327 struct type
*arg_type
= check_typedef (value_type (arg
));
329 /* Cast argument to long if necessary as the compiler does it too. */
330 switch (arg_type
->code ())
335 case TYPE_CODE_RANGE
:
337 if (TYPE_LENGTH (arg_type
) == 4)
339 /* 32-bit values must be sign-extended to 64 bits
340 even if the base data type is unsigned. */
341 arg_type
= builtin_type (gdbarch
)->builtin_int32
;
342 arg
= value_cast (arg_type
, arg
);
344 if (TYPE_LENGTH (arg_type
) < ALPHA_REGISTER_SIZE
)
346 arg_type
= builtin_type (gdbarch
)->builtin_int64
;
347 arg
= value_cast (arg_type
, arg
);
352 /* "float" arguments loaded in registers must be passed in
353 register format, aka "double". */
354 if (accumulate_size
< sizeof (arg_reg_buffer
)
355 && TYPE_LENGTH (arg_type
) == 4)
357 arg_type
= builtin_type (gdbarch
)->builtin_double
;
358 arg
= value_cast (arg_type
, arg
);
360 /* Tru64 5.1 has a 128-bit long double, and passes this by
361 invisible reference. No one else uses this data type. */
362 else if (TYPE_LENGTH (arg_type
) == 16)
364 /* Allocate aligned storage. */
365 sp
= (sp
& -16) - 16;
367 /* Write the real data into the stack. */
368 write_memory (sp
, value_contents (arg
).data (), 16);
370 /* Construct the indirection. */
371 arg_type
= lookup_pointer_type (arg_type
);
372 arg
= value_from_pointer (arg_type
, sp
);
376 case TYPE_CODE_COMPLEX
:
377 /* ??? The ABI says that complex values are passed as two
378 separate scalar values. This distinction only matters
379 for complex float. However, GCC does not implement this. */
381 /* Tru64 5.1 has a 128-bit long double, and passes this by
382 invisible reference. */
383 if (TYPE_LENGTH (arg_type
) == 32)
385 /* Allocate aligned storage. */
386 sp
= (sp
& -16) - 16;
388 /* Write the real data into the stack. */
389 write_memory (sp
, value_contents (arg
).data (), 32);
391 /* Construct the indirection. */
392 arg_type
= lookup_pointer_type (arg_type
);
393 arg
= value_from_pointer (arg_type
, sp
);
400 m_arg
->len
= TYPE_LENGTH (arg_type
);
401 m_arg
->offset
= accumulate_size
;
402 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 7) & ~7;
403 m_arg
->contents
= value_contents (arg
).data ();
406 /* Determine required argument register loads, loading an argument register
407 is expensive as it uses three ptrace calls. */
408 required_arg_regs
= accumulate_size
/ 8;
409 if (required_arg_regs
> ALPHA_NUM_ARG_REGS
)
410 required_arg_regs
= ALPHA_NUM_ARG_REGS
;
412 /* Make room for the arguments on the stack. */
413 if (accumulate_size
< sizeof(arg_reg_buffer
))
416 accumulate_size
-= sizeof(arg_reg_buffer
);
417 sp
-= accumulate_size
;
419 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
422 /* `Push' arguments on the stack. */
423 for (i
= nargs
; m_arg
--, --i
>= 0;)
425 const gdb_byte
*contents
= m_arg
->contents
;
426 int offset
= m_arg
->offset
;
427 int len
= m_arg
->len
;
429 /* Copy the bytes destined for registers into arg_reg_buffer. */
430 if (offset
< sizeof(arg_reg_buffer
))
432 if (offset
+ len
<= sizeof(arg_reg_buffer
))
434 memcpy (arg_reg_buffer
+ offset
, contents
, len
);
439 int tlen
= sizeof(arg_reg_buffer
) - offset
;
440 memcpy (arg_reg_buffer
+ offset
, contents
, tlen
);
447 /* Everything else goes to the stack. */
448 write_memory (sp
+ offset
- sizeof(arg_reg_buffer
), contents
, len
);
450 if (return_method
== return_method_struct
)
451 store_unsigned_integer (arg_reg_buffer
, ALPHA_REGISTER_SIZE
,
452 byte_order
, struct_addr
);
454 /* Load the argument registers. */
455 for (i
= 0; i
< required_arg_regs
; i
++)
457 regcache
->cooked_write (ALPHA_A0_REGNUM
+ i
,
458 arg_reg_buffer
+ i
* ALPHA_REGISTER_SIZE
);
459 regcache
->cooked_write (ALPHA_FPA0_REGNUM
+ i
,
460 arg_reg_buffer
+ i
* ALPHA_REGISTER_SIZE
);
463 /* Finally, update the stack pointer. */
464 regcache_cooked_write_signed (regcache
, ALPHA_SP_REGNUM
, sp
);
469 /* Extract from REGCACHE the value about to be returned from a function
470 and copy it into VALBUF. */
473 alpha_extract_return_value (struct type
*valtype
, struct regcache
*regcache
,
476 struct gdbarch
*gdbarch
= regcache
->arch ();
477 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
478 gdb_byte raw_buffer
[ALPHA_REGISTER_SIZE
];
481 switch (valtype
->code ())
484 switch (TYPE_LENGTH (valtype
))
487 regcache
->cooked_read (ALPHA_FP0_REGNUM
, raw_buffer
);
488 alpha_sts (gdbarch
, valbuf
, raw_buffer
);
492 regcache
->cooked_read (ALPHA_FP0_REGNUM
, valbuf
);
496 regcache_cooked_read_unsigned (regcache
, ALPHA_V0_REGNUM
, &l
);
497 read_memory (l
, valbuf
, 16);
501 internal_error (__FILE__
, __LINE__
,
502 _("unknown floating point width"));
506 case TYPE_CODE_COMPLEX
:
507 switch (TYPE_LENGTH (valtype
))
510 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
511 regcache
->cooked_read (ALPHA_FP0_REGNUM
, valbuf
);
515 regcache
->cooked_read (ALPHA_FP0_REGNUM
, valbuf
);
516 regcache
->cooked_read (ALPHA_FP0_REGNUM
+ 1, valbuf
+ 8);
520 regcache_cooked_read_unsigned (regcache
, ALPHA_V0_REGNUM
, &l
);
521 read_memory (l
, valbuf
, 32);
525 internal_error (__FILE__
, __LINE__
,
526 _("unknown floating point width"));
531 /* Assume everything else degenerates to an integer. */
532 regcache_cooked_read_unsigned (regcache
, ALPHA_V0_REGNUM
, &l
);
533 store_unsigned_integer (valbuf
, TYPE_LENGTH (valtype
), byte_order
, l
);
538 /* Insert the given value into REGCACHE as if it was being
539 returned by a function. */
542 alpha_store_return_value (struct type
*valtype
, struct regcache
*regcache
,
543 const gdb_byte
*valbuf
)
545 struct gdbarch
*gdbarch
= regcache
->arch ();
546 gdb_byte raw_buffer
[ALPHA_REGISTER_SIZE
];
549 switch (valtype
->code ())
552 switch (TYPE_LENGTH (valtype
))
555 alpha_lds (gdbarch
, raw_buffer
, valbuf
);
556 regcache
->cooked_write (ALPHA_FP0_REGNUM
, raw_buffer
);
560 regcache
->cooked_write (ALPHA_FP0_REGNUM
, valbuf
);
564 /* FIXME: 128-bit long doubles are returned like structures:
565 by writing into indirect storage provided by the caller
566 as the first argument. */
567 error (_("Cannot set a 128-bit long double return value."));
570 internal_error (__FILE__
, __LINE__
,
571 _("unknown floating point width"));
575 case TYPE_CODE_COMPLEX
:
576 switch (TYPE_LENGTH (valtype
))
579 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
580 regcache
->cooked_write (ALPHA_FP0_REGNUM
, valbuf
);
584 regcache
->cooked_write (ALPHA_FP0_REGNUM
, valbuf
);
585 regcache
->cooked_write (ALPHA_FP0_REGNUM
+ 1, valbuf
+ 8);
589 /* FIXME: 128-bit long doubles are returned like structures:
590 by writing into indirect storage provided by the caller
591 as the first argument. */
592 error (_("Cannot set a 128-bit long double return value."));
595 internal_error (__FILE__
, __LINE__
,
596 _("unknown floating point width"));
601 /* Assume everything else degenerates to an integer. */
602 /* 32-bit values must be sign-extended to 64 bits
603 even if the base data type is unsigned. */
604 if (TYPE_LENGTH (valtype
) == 4)
605 valtype
= builtin_type (gdbarch
)->builtin_int32
;
606 l
= unpack_long (valtype
, valbuf
);
607 regcache_cooked_write_unsigned (regcache
, ALPHA_V0_REGNUM
, l
);
612 static enum return_value_convention
613 alpha_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
614 struct type
*type
, struct regcache
*regcache
,
615 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
617 enum type_code code
= type
->code ();
618 alpha_gdbarch_tdep
*tdep
= (alpha_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
620 if ((code
== TYPE_CODE_STRUCT
621 || code
== TYPE_CODE_UNION
622 || code
== TYPE_CODE_ARRAY
)
623 && tdep
->return_in_memory (type
))
628 regcache_raw_read_unsigned (regcache
, ALPHA_V0_REGNUM
, &addr
);
629 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
632 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
636 alpha_extract_return_value (type
, regcache
, readbuf
);
638 alpha_store_return_value (type
, regcache
, writebuf
);
640 return RETURN_VALUE_REGISTER_CONVENTION
;
644 alpha_return_in_memory_always (struct type
*type
)
650 constexpr gdb_byte alpha_break_insn
[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */
652 typedef BP_MANIPULATION (alpha_break_insn
) alpha_breakpoint
;
655 /* This returns the PC of the first insn after the prologue.
656 If we can't find the prologue, then return 0. */
659 alpha_after_prologue (CORE_ADDR pc
)
661 struct symtab_and_line sal
;
662 CORE_ADDR func_addr
, func_end
;
664 if (!find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
667 sal
= find_pc_line (func_addr
, 0);
668 if (sal
.end
< func_end
)
671 /* The line after the prologue is after the end of the function. In this
672 case, tell the caller to find the prologue the hard way. */
676 /* Read an instruction from memory at PC, looking through breakpoints. */
679 alpha_read_insn (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
681 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
682 gdb_byte buf
[ALPHA_INSN_SIZE
];
685 res
= target_read_memory (pc
, buf
, sizeof (buf
));
687 memory_error (TARGET_XFER_E_IO
, pc
);
688 return extract_unsigned_integer (buf
, sizeof (buf
), byte_order
);
691 /* To skip prologues, I use this predicate. Returns either PC itself
692 if the code at PC does not look like a function prologue; otherwise
693 returns an address that (if we're lucky) follows the prologue. If
694 LENIENT, then we must skip everything which is involved in setting
695 up the frame (it's OK to skip more, just so long as we don't skip
696 anything which might clobber the registers which are being saved. */
699 alpha_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
703 CORE_ADDR post_prologue_pc
;
704 gdb_byte buf
[ALPHA_INSN_SIZE
];
706 /* Silently return the unaltered pc upon memory errors.
707 This could happen on OSF/1 if decode_line_1 tries to skip the
708 prologue for quickstarted shared library functions when the
709 shared library is not yet mapped in.
710 Reading target memory is slow over serial lines, so we perform
711 this check only if the target has shared libraries (which all
712 Alpha targets do). */
713 if (target_read_memory (pc
, buf
, sizeof (buf
)))
716 /* See if we can determine the end of the prologue via the symbol table.
717 If so, then return either PC, or the PC after the prologue, whichever
720 post_prologue_pc
= alpha_after_prologue (pc
);
721 if (post_prologue_pc
!= 0)
722 return std::max (pc
, post_prologue_pc
);
724 /* Can't determine prologue from the symbol table, need to examine
727 /* Skip the typical prologue instructions. These are the stack adjustment
728 instruction and the instructions that save registers on the stack
729 or in the gcc frame. */
730 for (offset
= 0; offset
< 100; offset
+= ALPHA_INSN_SIZE
)
732 inst
= alpha_read_insn (gdbarch
, pc
+ offset
);
734 if ((inst
& 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
736 if ((inst
& 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
738 if ((inst
& 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
740 if ((inst
& 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
743 if (((inst
& 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
744 || (inst
& 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
745 && (inst
& 0x03e00000) != 0x03e00000) /* reg != $zero */
748 if (inst
== 0x47de040f) /* bis sp,sp,fp */
750 if (inst
== 0x47fe040f) /* bis zero,sp,fp */
759 static const int ldl_l_opcode
= 0x2a;
760 static const int ldq_l_opcode
= 0x2b;
761 static const int stl_c_opcode
= 0x2e;
762 static const int stq_c_opcode
= 0x2f;
764 /* Checks for an atomic sequence of instructions beginning with a LDL_L/LDQ_L
765 instruction and ending with a STL_C/STQ_C instruction. If such a sequence
766 is found, attempt to step through it. A breakpoint is placed at the end of
769 static std::vector
<CORE_ADDR
>
770 alpha_deal_with_atomic_sequence (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
772 CORE_ADDR breaks
[2] = {CORE_ADDR_MAX
, CORE_ADDR_MAX
};
774 CORE_ADDR closing_insn
; /* Instruction that closes the atomic sequence. */
775 unsigned int insn
= alpha_read_insn (gdbarch
, loc
);
778 int last_breakpoint
= 0; /* Defaults to 0 (no breakpoints placed). */
779 const int atomic_sequence_length
= 16; /* Instruction sequence length. */
780 int bc_insn_count
= 0; /* Conditional branch instruction count. */
782 /* Assume all atomic sequences start with a LDL_L/LDQ_L instruction. */
783 if (INSN_OPCODE (insn
) != ldl_l_opcode
784 && INSN_OPCODE (insn
) != ldq_l_opcode
)
787 /* Assume that no atomic sequence is longer than "atomic_sequence_length"
789 for (insn_count
= 0; insn_count
< atomic_sequence_length
; ++insn_count
)
791 loc
+= ALPHA_INSN_SIZE
;
792 insn
= alpha_read_insn (gdbarch
, loc
);
794 /* Assume that there is at most one branch in the atomic
795 sequence. If a branch is found, put a breakpoint in
796 its destination address. */
797 if (INSN_OPCODE (insn
) >= br_opcode
)
799 int immediate
= (insn
& 0x001fffff) << 2;
801 immediate
= (immediate
^ 0x400000) - 0x400000;
803 if (bc_insn_count
>= 1)
804 return {}; /* More than one branch found, fallback
805 to the standard single-step code. */
807 breaks
[1] = loc
+ ALPHA_INSN_SIZE
+ immediate
;
813 if (INSN_OPCODE (insn
) == stl_c_opcode
814 || INSN_OPCODE (insn
) == stq_c_opcode
)
818 /* Assume that the atomic sequence ends with a STL_C/STQ_C instruction. */
819 if (INSN_OPCODE (insn
) != stl_c_opcode
820 && INSN_OPCODE (insn
) != stq_c_opcode
)
824 loc
+= ALPHA_INSN_SIZE
;
826 /* Insert a breakpoint right after the end of the atomic sequence. */
829 /* Check for duplicated breakpoints. Check also for a breakpoint
830 placed (branch instruction's destination) anywhere in sequence. */
832 && (breaks
[1] == breaks
[0]
833 || (breaks
[1] >= pc
&& breaks
[1] <= closing_insn
)))
836 std::vector
<CORE_ADDR
> next_pcs
;
838 for (index
= 0; index
<= last_breakpoint
; index
++)
839 next_pcs
.push_back (breaks
[index
]);
845 /* Figure out where the longjmp will land.
846 We expect the first arg to be a pointer to the jmp_buf structure from
847 which we extract the PC (JB_PC) that we will land at. The PC is copied
848 into the "pc". This routine returns true on success. */
851 alpha_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
853 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
854 alpha_gdbarch_tdep
*tdep
= (alpha_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
855 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
857 gdb_byte raw_buffer
[ALPHA_REGISTER_SIZE
];
859 jb_addr
= get_frame_register_unsigned (frame
, ALPHA_A0_REGNUM
);
861 if (target_read_memory (jb_addr
+ (tdep
->jb_pc
* tdep
->jb_elt_size
),
862 raw_buffer
, tdep
->jb_elt_size
))
865 *pc
= extract_unsigned_integer (raw_buffer
, tdep
->jb_elt_size
, byte_order
);
870 /* Frame unwinder for signal trampolines. We use alpha tdep bits that
871 describe the location and shape of the sigcontext structure. After
872 that, all registers are in memory, so it's easy. */
873 /* ??? Shouldn't we be able to do this generically, rather than with
874 OSABI data specific to Alpha? */
876 struct alpha_sigtramp_unwind_cache
878 CORE_ADDR sigcontext_addr
;
881 static struct alpha_sigtramp_unwind_cache
*
882 alpha_sigtramp_frame_unwind_cache (struct frame_info
*this_frame
,
883 void **this_prologue_cache
)
885 struct alpha_sigtramp_unwind_cache
*info
;
887 if (*this_prologue_cache
)
888 return (struct alpha_sigtramp_unwind_cache
*) *this_prologue_cache
;
890 info
= FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache
);
891 *this_prologue_cache
= info
;
893 gdbarch
*arch
= get_frame_arch (this_frame
);
894 alpha_gdbarch_tdep
*tdep
= (alpha_gdbarch_tdep
*) gdbarch_tdep (arch
);
895 info
->sigcontext_addr
= tdep
->sigcontext_addr (this_frame
);
900 /* Return the address of REGNUM in a sigtramp frame. Since this is
901 all arithmetic, it doesn't seem worthwhile to cache it. */
904 alpha_sigtramp_register_address (struct gdbarch
*gdbarch
,
905 CORE_ADDR sigcontext_addr
, int regnum
)
907 alpha_gdbarch_tdep
*tdep
= (alpha_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
909 if (regnum
>= 0 && regnum
< 32)
910 return sigcontext_addr
+ tdep
->sc_regs_offset
+ regnum
* 8;
911 else if (regnum
>= ALPHA_FP0_REGNUM
&& regnum
< ALPHA_FP0_REGNUM
+ 32)
912 return sigcontext_addr
+ tdep
->sc_fpregs_offset
+ regnum
* 8;
913 else if (regnum
== ALPHA_PC_REGNUM
)
914 return sigcontext_addr
+ tdep
->sc_pc_offset
;
919 /* Given a GDB frame, determine the address of the calling function's
920 frame. This will be used to create a new GDB frame struct. */
923 alpha_sigtramp_frame_this_id (struct frame_info
*this_frame
,
924 void **this_prologue_cache
,
925 struct frame_id
*this_id
)
927 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
928 alpha_gdbarch_tdep
*tdep
= (alpha_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
929 struct alpha_sigtramp_unwind_cache
*info
930 = alpha_sigtramp_frame_unwind_cache (this_frame
, this_prologue_cache
);
931 CORE_ADDR stack_addr
, code_addr
;
933 /* If the OSABI couldn't locate the sigcontext, give up. */
934 if (info
->sigcontext_addr
== 0)
937 /* If we have dynamic signal trampolines, find their start.
938 If we do not, then we must assume there is a symbol record
939 that can provide the start address. */
940 if (tdep
->dynamic_sigtramp_offset
)
943 code_addr
= get_frame_pc (this_frame
);
944 offset
= tdep
->dynamic_sigtramp_offset (gdbarch
, code_addr
);
951 code_addr
= get_frame_func (this_frame
);
953 /* The stack address is trivially read from the sigcontext. */
954 stack_addr
= alpha_sigtramp_register_address (gdbarch
, info
->sigcontext_addr
,
956 stack_addr
= get_frame_memory_unsigned (this_frame
, stack_addr
,
957 ALPHA_REGISTER_SIZE
);
959 *this_id
= frame_id_build (stack_addr
, code_addr
);
962 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
964 static struct value
*
965 alpha_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
966 void **this_prologue_cache
, int regnum
)
968 struct alpha_sigtramp_unwind_cache
*info
969 = alpha_sigtramp_frame_unwind_cache (this_frame
, this_prologue_cache
);
972 if (info
->sigcontext_addr
!= 0)
974 /* All integer and fp registers are stored in memory. */
975 addr
= alpha_sigtramp_register_address (get_frame_arch (this_frame
),
976 info
->sigcontext_addr
, regnum
);
978 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
981 /* This extra register may actually be in the sigcontext, but our
982 current description of it in alpha_sigtramp_frame_unwind_cache
983 doesn't include it. Too bad. Fall back on whatever's in the
985 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
989 alpha_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
990 struct frame_info
*this_frame
,
991 void **this_prologue_cache
)
993 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
994 CORE_ADDR pc
= get_frame_pc (this_frame
);
997 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
998 look at tramp-frame.h and other simpler per-architecture
999 sigtramp unwinders. */
1001 /* We shouldn't even bother to try if the OSABI didn't register a
1002 sigcontext_addr handler or pc_in_sigtramp handler. */
1003 alpha_gdbarch_tdep
*tdep
= (alpha_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
1004 if (tdep
->sigcontext_addr
== NULL
)
1007 if (tdep
->pc_in_sigtramp
== NULL
)
1010 /* Otherwise we should be in a signal frame. */
1011 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1012 if (tdep
->pc_in_sigtramp (gdbarch
, pc
, name
))
1018 static const struct frame_unwind alpha_sigtramp_frame_unwind
=
1022 default_frame_unwind_stop_reason
,
1023 alpha_sigtramp_frame_this_id
,
1024 alpha_sigtramp_frame_prev_register
,
1026 alpha_sigtramp_frame_sniffer
1031 /* Heuristic_proc_start may hunt through the text section for a long
1032 time across a 2400 baud serial line. Allows the user to limit this
1034 static int heuristic_fence_post
= 0;
1036 /* Attempt to locate the start of the function containing PC. We assume that
1037 the previous function ends with an about_to_return insn. Not foolproof by
1038 any means, since gcc is happy to put the epilogue in the middle of a
1039 function. But we're guessing anyway... */
1042 alpha_heuristic_proc_start (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1044 alpha_gdbarch_tdep
*tdep
= (alpha_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
1045 CORE_ADDR last_non_nop
= pc
;
1046 CORE_ADDR fence
= pc
- heuristic_fence_post
;
1047 CORE_ADDR orig_pc
= pc
;
1049 struct inferior
*inf
;
1054 /* First see if we can find the start of the function from minimal
1055 symbol information. This can succeed with a binary that doesn't
1056 have debug info, but hasn't been stripped. */
1057 func
= get_pc_function_start (pc
);
1061 if (heuristic_fence_post
== -1
1062 || fence
< tdep
->vm_min_address
)
1063 fence
= tdep
->vm_min_address
;
1065 /* Search back for previous return; also stop at a 0, which might be
1066 seen for instance before the start of a code section. Don't include
1067 nops, since this usually indicates padding between functions. */
1068 for (pc
-= ALPHA_INSN_SIZE
; pc
>= fence
; pc
-= ALPHA_INSN_SIZE
)
1070 unsigned int insn
= alpha_read_insn (gdbarch
, pc
);
1073 case 0: /* invalid insn */
1074 case 0x6bfa8001: /* ret $31,($26),1 */
1075 return last_non_nop
;
1077 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
1078 case 0x47ff041f: /* nop: bis $31,$31,$31 */
1087 inf
= current_inferior ();
1089 /* It's not clear to me why we reach this point when stopping quietly,
1090 but with this test, at least we don't print out warnings for every
1091 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
1092 if (inf
->control
.stop_soon
== NO_STOP_QUIETLY
)
1094 static int blurb_printed
= 0;
1096 if (fence
== tdep
->vm_min_address
)
1097 warning (_("Hit beginning of text section without finding \
1098 enclosing function for address %s"), paddress (gdbarch
, orig_pc
));
1100 warning (_("Hit heuristic-fence-post without finding \
1101 enclosing function for address %s"), paddress (gdbarch
, orig_pc
));
1105 printf_filtered (_("\
1106 This warning occurs if you are debugging a function without any symbols\n\
1107 (for example, in a stripped executable). In that case, you may wish to\n\
1108 increase the size of the search with the `set heuristic-fence-post' command.\n\
1110 Otherwise, you told GDB there was a function where there isn't one, or\n\
1111 (more likely) you have encountered a bug in GDB.\n"));
1119 /* Fallback alpha frame unwinder. Uses instruction scanning and knows
1120 something about the traditional layout of alpha stack frames. */
1122 struct alpha_heuristic_unwind_cache
1126 trad_frame_saved_reg
*saved_regs
;
1130 /* If a probing loop sequence starts at PC, simulate it and compute
1131 FRAME_SIZE and PC after its execution. Otherwise, return with PC and
1132 FRAME_SIZE unchanged. */
1135 alpha_heuristic_analyze_probing_loop (struct gdbarch
*gdbarch
, CORE_ADDR
*pc
,
1138 CORE_ADDR cur_pc
= *pc
;
1139 int cur_frame_size
= *frame_size
;
1140 int nb_of_iterations
, reg_index
, reg_probe
;
1143 /* The following pattern is recognized as a probing loop:
1145 lda REG_INDEX,NB_OF_ITERATIONS
1146 lda REG_PROBE,<immediate>(sp)
1149 stq zero,<immediate>(REG_PROBE)
1150 subq REG_INDEX,0x1,REG_INDEX
1151 lda REG_PROBE,<immediate>(REG_PROBE)
1152 bne REG_INDEX, LOOP_START
1154 lda sp,<immediate>(REG_PROBE)
1156 If anything different is found, the function returns without
1157 changing PC and FRAME_SIZE. Otherwise, PC will point immediately
1158 after this sequence, and FRAME_SIZE will be updated. */
1160 /* lda REG_INDEX,NB_OF_ITERATIONS */
1162 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1163 if (INSN_OPCODE (insn
) != lda_opcode
)
1165 reg_index
= MEM_RA (insn
);
1166 nb_of_iterations
= MEM_DISP (insn
);
1168 /* lda REG_PROBE,<immediate>(sp) */
1170 cur_pc
+= ALPHA_INSN_SIZE
;
1171 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1172 if (INSN_OPCODE (insn
) != lda_opcode
1173 || MEM_RB (insn
) != ALPHA_SP_REGNUM
)
1175 reg_probe
= MEM_RA (insn
);
1176 cur_frame_size
-= MEM_DISP (insn
);
1178 /* stq zero,<immediate>(REG_PROBE) */
1180 cur_pc
+= ALPHA_INSN_SIZE
;
1181 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1182 if (INSN_OPCODE (insn
) != stq_opcode
1183 || MEM_RA (insn
) != 0x1f
1184 || MEM_RB (insn
) != reg_probe
)
1187 /* subq REG_INDEX,0x1,REG_INDEX */
1189 cur_pc
+= ALPHA_INSN_SIZE
;
1190 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1191 if (INSN_OPCODE (insn
) != subq_opcode
1192 || !OPR_HAS_IMMEDIATE (insn
)
1193 || OPR_FUNCTION (insn
) != subq_function
1194 || OPR_LIT(insn
) != 1
1195 || OPR_RA (insn
) != reg_index
1196 || OPR_RC (insn
) != reg_index
)
1199 /* lda REG_PROBE,<immediate>(REG_PROBE) */
1201 cur_pc
+= ALPHA_INSN_SIZE
;
1202 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1203 if (INSN_OPCODE (insn
) != lda_opcode
1204 || MEM_RA (insn
) != reg_probe
1205 || MEM_RB (insn
) != reg_probe
)
1207 cur_frame_size
-= MEM_DISP (insn
) * nb_of_iterations
;
1209 /* bne REG_INDEX, LOOP_START */
1211 cur_pc
+= ALPHA_INSN_SIZE
;
1212 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1213 if (INSN_OPCODE (insn
) != bne_opcode
1214 || MEM_RA (insn
) != reg_index
)
1217 /* lda sp,<immediate>(REG_PROBE) */
1219 cur_pc
+= ALPHA_INSN_SIZE
;
1220 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1221 if (INSN_OPCODE (insn
) != lda_opcode
1222 || MEM_RA (insn
) != ALPHA_SP_REGNUM
1223 || MEM_RB (insn
) != reg_probe
)
1225 cur_frame_size
-= MEM_DISP (insn
);
1228 *frame_size
= cur_frame_size
;
1231 static struct alpha_heuristic_unwind_cache
*
1232 alpha_heuristic_frame_unwind_cache (struct frame_info
*this_frame
,
1233 void **this_prologue_cache
,
1236 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1237 struct alpha_heuristic_unwind_cache
*info
;
1239 CORE_ADDR limit_pc
, cur_pc
;
1240 int frame_reg
, frame_size
, return_reg
, reg
;
1242 if (*this_prologue_cache
)
1243 return (struct alpha_heuristic_unwind_cache
*) *this_prologue_cache
;
1245 info
= FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache
);
1246 *this_prologue_cache
= info
;
1247 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
1249 limit_pc
= get_frame_pc (this_frame
);
1251 start_pc
= alpha_heuristic_proc_start (gdbarch
, limit_pc
);
1252 info
->start_pc
= start_pc
;
1254 frame_reg
= ALPHA_SP_REGNUM
;
1258 /* If we've identified a likely place to start, do code scanning. */
1261 /* Limit the forward search to 50 instructions. */
1262 if (start_pc
+ 200 < limit_pc
)
1263 limit_pc
= start_pc
+ 200;
1265 for (cur_pc
= start_pc
; cur_pc
< limit_pc
; cur_pc
+= ALPHA_INSN_SIZE
)
1267 unsigned int word
= alpha_read_insn (gdbarch
, cur_pc
);
1269 if ((word
& 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1273 /* Consider only the first stack allocation instruction
1274 to contain the static size of the frame. */
1275 if (frame_size
== 0)
1276 frame_size
= (-word
) & 0xffff;
1280 /* Exit loop if a positive stack adjustment is found, which
1281 usually means that the stack cleanup code in the function
1282 epilogue is reached. */
1286 else if ((word
& 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1288 reg
= (word
& 0x03e00000) >> 21;
1290 /* Ignore this instruction if we have already encountered
1291 an instruction saving the same register earlier in the
1292 function code. The current instruction does not tell
1293 us where the original value upon function entry is saved.
1294 All it says is that the function we are scanning reused
1295 that register for some computation of its own, and is now
1296 saving its result. */
1297 if (info
->saved_regs
[reg
].is_addr ())
1303 /* Do not compute the address where the register was saved yet,
1304 because we don't know yet if the offset will need to be
1305 relative to $sp or $fp (we can not compute the address
1306 relative to $sp if $sp is updated during the execution of
1307 the current subroutine, for instance when doing some alloca).
1308 So just store the offset for the moment, and compute the
1309 address later when we know whether this frame has a frame
1311 /* Hack: temporarily add one, so that the offset is non-zero
1312 and we can tell which registers have save offsets below. */
1313 info
->saved_regs
[reg
].set_addr ((word
& 0xffff) + 1);
1315 /* Starting with OSF/1-3.2C, the system libraries are shipped
1316 without local symbols, but they still contain procedure
1317 descriptors without a symbol reference. GDB is currently
1318 unable to find these procedure descriptors and uses
1319 heuristic_proc_desc instead.
1320 As some low level compiler support routines (__div*, __add*)
1321 use a non-standard return address register, we have to
1322 add some heuristics to determine the return address register,
1323 or stepping over these routines will fail.
1324 Usually the return address register is the first register
1325 saved on the stack, but assembler optimization might
1326 rearrange the register saves.
1327 So we recognize only a few registers (t7, t9, ra) within
1328 the procedure prologue as valid return address registers.
1329 If we encounter a return instruction, we extract the
1330 return address register from it.
1332 FIXME: Rewriting GDB to access the procedure descriptors,
1333 e.g. via the minimal symbol table, might obviate this
1335 if (return_reg
== -1
1336 && cur_pc
< (start_pc
+ 80)
1337 && (reg
== ALPHA_T7_REGNUM
1338 || reg
== ALPHA_T9_REGNUM
1339 || reg
== ALPHA_RA_REGNUM
))
1342 else if ((word
& 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1343 return_reg
= (word
>> 16) & 0x1f;
1344 else if (word
== 0x47de040f) /* bis sp,sp,fp */
1345 frame_reg
= ALPHA_GCC_FP_REGNUM
;
1346 else if (word
== 0x47fe040f) /* bis zero,sp,fp */
1347 frame_reg
= ALPHA_GCC_FP_REGNUM
;
1349 alpha_heuristic_analyze_probing_loop (gdbarch
, &cur_pc
, &frame_size
);
1352 /* If we haven't found a valid return address register yet, keep
1353 searching in the procedure prologue. */
1354 if (return_reg
== -1)
1356 while (cur_pc
< (limit_pc
+ 80) && cur_pc
< (start_pc
+ 80))
1358 unsigned int word
= alpha_read_insn (gdbarch
, cur_pc
);
1360 if ((word
& 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1362 reg
= (word
& 0x03e00000) >> 21;
1363 if (reg
== ALPHA_T7_REGNUM
1364 || reg
== ALPHA_T9_REGNUM
1365 || reg
== ALPHA_RA_REGNUM
)
1371 else if ((word
& 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1373 return_reg
= (word
>> 16) & 0x1f;
1377 cur_pc
+= ALPHA_INSN_SIZE
;
1382 /* Failing that, do default to the customary RA. */
1383 if (return_reg
== -1)
1384 return_reg
= ALPHA_RA_REGNUM
;
1385 info
->return_reg
= return_reg
;
1387 val
= get_frame_register_unsigned (this_frame
, frame_reg
);
1388 info
->vfp
= val
+ frame_size
;
1390 /* Convert offsets to absolute addresses. See above about adding
1391 one to the offsets to make all detected offsets non-zero. */
1392 for (reg
= 0; reg
< ALPHA_NUM_REGS
; ++reg
)
1393 if (info
->saved_regs
[reg
].is_addr ())
1394 info
->saved_regs
[reg
].set_addr (info
->saved_regs
[reg
].addr ()
1397 /* The stack pointer of the previous frame is computed by popping
1398 the current stack frame. */
1399 if (!info
->saved_regs
[ALPHA_SP_REGNUM
].is_addr ())
1400 info
->saved_regs
[ALPHA_SP_REGNUM
].set_value (info
->vfp
);
1405 /* Given a GDB frame, determine the address of the calling function's
1406 frame. This will be used to create a new GDB frame struct. */
1409 alpha_heuristic_frame_this_id (struct frame_info
*this_frame
,
1410 void **this_prologue_cache
,
1411 struct frame_id
*this_id
)
1413 struct alpha_heuristic_unwind_cache
*info
1414 = alpha_heuristic_frame_unwind_cache (this_frame
, this_prologue_cache
, 0);
1416 *this_id
= frame_id_build (info
->vfp
, info
->start_pc
);
1419 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
1421 static struct value
*
1422 alpha_heuristic_frame_prev_register (struct frame_info
*this_frame
,
1423 void **this_prologue_cache
, int regnum
)
1425 struct alpha_heuristic_unwind_cache
*info
1426 = alpha_heuristic_frame_unwind_cache (this_frame
, this_prologue_cache
, 0);
1428 /* The PC of the previous frame is stored in the link register of
1429 the current frame. Frob regnum so that we pull the value from
1430 the correct place. */
1431 if (regnum
== ALPHA_PC_REGNUM
)
1432 regnum
= info
->return_reg
;
1434 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
1437 static const struct frame_unwind alpha_heuristic_frame_unwind
=
1441 default_frame_unwind_stop_reason
,
1442 alpha_heuristic_frame_this_id
,
1443 alpha_heuristic_frame_prev_register
,
1445 default_frame_sniffer
1449 alpha_heuristic_frame_base_address (struct frame_info
*this_frame
,
1450 void **this_prologue_cache
)
1452 struct alpha_heuristic_unwind_cache
*info
1453 = alpha_heuristic_frame_unwind_cache (this_frame
, this_prologue_cache
, 0);
1458 static const struct frame_base alpha_heuristic_frame_base
= {
1459 &alpha_heuristic_frame_unwind
,
1460 alpha_heuristic_frame_base_address
,
1461 alpha_heuristic_frame_base_address
,
1462 alpha_heuristic_frame_base_address
1465 /* Just like reinit_frame_cache, but with the right arguments to be
1466 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
1469 reinit_frame_cache_sfunc (const char *args
,
1470 int from_tty
, struct cmd_list_element
*c
)
1472 reinit_frame_cache ();
1475 /* Helper routines for alpha*-nat.c files to move register sets to and
1476 from core files. The UNIQUE pointer is allowed to be NULL, as most
1477 targets don't supply this value in their core files. */
1480 alpha_supply_int_regs (struct regcache
*regcache
, int regno
,
1481 const void *r0_r30
, const void *pc
, const void *unique
)
1483 const gdb_byte
*regs
= (const gdb_byte
*) r0_r30
;
1486 for (i
= 0; i
< 31; ++i
)
1487 if (regno
== i
|| regno
== -1)
1488 regcache
->raw_supply (i
, regs
+ i
* 8);
1490 if (regno
== ALPHA_ZERO_REGNUM
|| regno
== -1)
1492 const gdb_byte zero
[8] = { 0 };
1494 regcache
->raw_supply (ALPHA_ZERO_REGNUM
, zero
);
1497 if (regno
== ALPHA_PC_REGNUM
|| regno
== -1)
1498 regcache
->raw_supply (ALPHA_PC_REGNUM
, pc
);
1500 if (regno
== ALPHA_UNIQUE_REGNUM
|| regno
== -1)
1501 regcache
->raw_supply (ALPHA_UNIQUE_REGNUM
, unique
);
1505 alpha_fill_int_regs (const struct regcache
*regcache
,
1506 int regno
, void *r0_r30
, void *pc
, void *unique
)
1508 gdb_byte
*regs
= (gdb_byte
*) r0_r30
;
1511 for (i
= 0; i
< 31; ++i
)
1512 if (regno
== i
|| regno
== -1)
1513 regcache
->raw_collect (i
, regs
+ i
* 8);
1515 if (regno
== ALPHA_PC_REGNUM
|| regno
== -1)
1516 regcache
->raw_collect (ALPHA_PC_REGNUM
, pc
);
1518 if (unique
&& (regno
== ALPHA_UNIQUE_REGNUM
|| regno
== -1))
1519 regcache
->raw_collect (ALPHA_UNIQUE_REGNUM
, unique
);
1523 alpha_supply_fp_regs (struct regcache
*regcache
, int regno
,
1524 const void *f0_f30
, const void *fpcr
)
1526 const gdb_byte
*regs
= (const gdb_byte
*) f0_f30
;
1529 for (i
= ALPHA_FP0_REGNUM
; i
< ALPHA_FP0_REGNUM
+ 31; ++i
)
1530 if (regno
== i
|| regno
== -1)
1531 regcache
->raw_supply (i
, regs
+ (i
- ALPHA_FP0_REGNUM
) * 8);
1533 if (regno
== ALPHA_FPCR_REGNUM
|| regno
== -1)
1534 regcache
->raw_supply (ALPHA_FPCR_REGNUM
, fpcr
);
1538 alpha_fill_fp_regs (const struct regcache
*regcache
,
1539 int regno
, void *f0_f30
, void *fpcr
)
1541 gdb_byte
*regs
= (gdb_byte
*) f0_f30
;
1544 for (i
= ALPHA_FP0_REGNUM
; i
< ALPHA_FP0_REGNUM
+ 31; ++i
)
1545 if (regno
== i
|| regno
== -1)
1546 regcache
->raw_collect (i
, regs
+ (i
- ALPHA_FP0_REGNUM
) * 8);
1548 if (regno
== ALPHA_FPCR_REGNUM
|| regno
== -1)
1549 regcache
->raw_collect (ALPHA_FPCR_REGNUM
, fpcr
);
1554 /* Return nonzero if the G_floating register value in REG is equal to
1555 zero for FP control instructions. */
1558 fp_register_zero_p (LONGEST reg
)
1560 /* Check that all bits except the sign bit are zero. */
1561 const LONGEST zero_mask
= ((LONGEST
) 1 << 63) ^ -1;
1563 return ((reg
& zero_mask
) == 0);
1566 /* Return the value of the sign bit for the G_floating register
1567 value held in REG. */
1570 fp_register_sign_bit (LONGEST reg
)
1572 const LONGEST sign_mask
= (LONGEST
) 1 << 63;
1574 return ((reg
& sign_mask
) != 0);
1577 /* alpha_software_single_step() is called just before we want to resume
1578 the inferior, if we want to single-step it but there is no hardware
1579 or kernel single-step support (NetBSD on Alpha, for example). We find
1580 the target of the coming instruction and breakpoint it. */
1583 alpha_next_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1585 struct gdbarch
*gdbarch
= regcache
->arch ();
1592 insn
= alpha_read_insn (gdbarch
, pc
);
1594 /* Opcode is top 6 bits. */
1595 op
= (insn
>> 26) & 0x3f;
1599 /* Jump format: target PC is:
1601 return (regcache_raw_get_unsigned (regcache
, (insn
>> 16) & 0x1f) & ~3);
1604 if ((op
& 0x30) == 0x30)
1606 /* Branch format: target PC is:
1607 (new PC) + (4 * sext(displacement)) */
1608 if (op
== 0x30 /* BR */
1609 || op
== 0x34) /* BSR */
1612 offset
= (insn
& 0x001fffff);
1613 if (offset
& 0x00100000)
1614 offset
|= 0xffe00000;
1615 offset
*= ALPHA_INSN_SIZE
;
1616 return (pc
+ ALPHA_INSN_SIZE
+ offset
);
1619 /* Need to determine if branch is taken; read RA. */
1620 regno
= (insn
>> 21) & 0x1f;
1623 case 0x31: /* FBEQ */
1624 case 0x36: /* FBGE */
1625 case 0x37: /* FBGT */
1626 case 0x33: /* FBLE */
1627 case 0x32: /* FBLT */
1628 case 0x35: /* FBNE */
1629 regno
+= gdbarch_fp0_regnum (gdbarch
);
1632 rav
= regcache_raw_get_signed (regcache
, regno
);
1636 case 0x38: /* BLBC */
1640 case 0x3c: /* BLBS */
1644 case 0x39: /* BEQ */
1648 case 0x3d: /* BNE */
1652 case 0x3a: /* BLT */
1656 case 0x3b: /* BLE */
1660 case 0x3f: /* BGT */
1664 case 0x3e: /* BGE */
1669 /* Floating point branches. */
1671 case 0x31: /* FBEQ */
1672 if (fp_register_zero_p (rav
))
1675 case 0x36: /* FBGE */
1676 if (fp_register_sign_bit (rav
) == 0 || fp_register_zero_p (rav
))
1679 case 0x37: /* FBGT */
1680 if (fp_register_sign_bit (rav
) == 0 && ! fp_register_zero_p (rav
))
1683 case 0x33: /* FBLE */
1684 if (fp_register_sign_bit (rav
) == 1 || fp_register_zero_p (rav
))
1687 case 0x32: /* FBLT */
1688 if (fp_register_sign_bit (rav
) == 1 && ! fp_register_zero_p (rav
))
1691 case 0x35: /* FBNE */
1692 if (! fp_register_zero_p (rav
))
1698 /* Not a branch or branch not taken; target PC is:
1700 return (pc
+ ALPHA_INSN_SIZE
);
1703 std::vector
<CORE_ADDR
>
1704 alpha_software_single_step (struct regcache
*regcache
)
1706 struct gdbarch
*gdbarch
= regcache
->arch ();
1708 CORE_ADDR pc
= regcache_read_pc (regcache
);
1710 std::vector
<CORE_ADDR
> next_pcs
1711 = alpha_deal_with_atomic_sequence (gdbarch
, pc
);
1712 if (!next_pcs
.empty ())
1715 CORE_ADDR next_pc
= alpha_next_pc (regcache
, pc
);
1720 /* Initialize the current architecture based on INFO. If possible, re-use an
1721 architecture from ARCHES, which is a list of architectures already created
1722 during this debugging session.
1724 Called e.g. at program startup, when reading a core file, and when reading
1727 static struct gdbarch
*
1728 alpha_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1730 struct gdbarch
*gdbarch
;
1732 /* Find a candidate among extant architectures. */
1733 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1735 return arches
->gdbarch
;
1737 alpha_gdbarch_tdep
*tdep
= new alpha_gdbarch_tdep
;
1738 gdbarch
= gdbarch_alloc (&info
, tdep
);
1740 /* Lowest text address. This is used by heuristic_proc_start()
1741 to decide when to stop looking. */
1742 tdep
->vm_min_address
= (CORE_ADDR
) 0x120000000LL
;
1744 tdep
->dynamic_sigtramp_offset
= NULL
;
1745 tdep
->sigcontext_addr
= NULL
;
1746 tdep
->sc_pc_offset
= 2 * 8;
1747 tdep
->sc_regs_offset
= 4 * 8;
1748 tdep
->sc_fpregs_offset
= tdep
->sc_regs_offset
+ 32 * 8 + 8;
1750 tdep
->jb_pc
= -1; /* longjmp support not enabled by default. */
1752 tdep
->return_in_memory
= alpha_return_in_memory_always
;
1755 set_gdbarch_short_bit (gdbarch
, 16);
1756 set_gdbarch_int_bit (gdbarch
, 32);
1757 set_gdbarch_long_bit (gdbarch
, 64);
1758 set_gdbarch_long_long_bit (gdbarch
, 64);
1759 set_gdbarch_wchar_bit (gdbarch
, 64);
1760 set_gdbarch_wchar_signed (gdbarch
, 0);
1761 set_gdbarch_float_bit (gdbarch
, 32);
1762 set_gdbarch_double_bit (gdbarch
, 64);
1763 set_gdbarch_long_double_bit (gdbarch
, 64);
1764 set_gdbarch_ptr_bit (gdbarch
, 64);
1767 set_gdbarch_num_regs (gdbarch
, ALPHA_NUM_REGS
);
1768 set_gdbarch_sp_regnum (gdbarch
, ALPHA_SP_REGNUM
);
1769 set_gdbarch_pc_regnum (gdbarch
, ALPHA_PC_REGNUM
);
1770 set_gdbarch_fp0_regnum (gdbarch
, ALPHA_FP0_REGNUM
);
1772 set_gdbarch_register_name (gdbarch
, alpha_register_name
);
1773 set_gdbarch_register_type (gdbarch
, alpha_register_type
);
1775 set_gdbarch_cannot_fetch_register (gdbarch
, alpha_cannot_fetch_register
);
1776 set_gdbarch_cannot_store_register (gdbarch
, alpha_cannot_store_register
);
1778 set_gdbarch_convert_register_p (gdbarch
, alpha_convert_register_p
);
1779 set_gdbarch_register_to_value (gdbarch
, alpha_register_to_value
);
1780 set_gdbarch_value_to_register (gdbarch
, alpha_value_to_register
);
1782 set_gdbarch_register_reggroup_p (gdbarch
, alpha_register_reggroup_p
);
1784 /* Prologue heuristics. */
1785 set_gdbarch_skip_prologue (gdbarch
, alpha_skip_prologue
);
1789 set_gdbarch_return_value (gdbarch
, alpha_return_value
);
1791 /* Settings for calling functions in the inferior. */
1792 set_gdbarch_push_dummy_call (gdbarch
, alpha_push_dummy_call
);
1794 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1795 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1797 set_gdbarch_breakpoint_kind_from_pc (gdbarch
,
1798 alpha_breakpoint::kind_from_pc
);
1799 set_gdbarch_sw_breakpoint_from_kind (gdbarch
,
1800 alpha_breakpoint::bp_from_kind
);
1801 set_gdbarch_decr_pc_after_break (gdbarch
, ALPHA_INSN_SIZE
);
1802 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
1804 /* Handles single stepping of atomic sequences. */
1805 set_gdbarch_software_single_step (gdbarch
, alpha_software_single_step
);
1807 /* Hook in ABI-specific overrides, if they have been registered. */
1808 gdbarch_init_osabi (info
, gdbarch
);
1810 /* Now that we have tuned the configuration, set a few final things
1811 based on what the OS ABI has told us. */
1813 if (tdep
->jb_pc
>= 0)
1814 set_gdbarch_get_longjmp_target (gdbarch
, alpha_get_longjmp_target
);
1816 frame_unwind_append_unwinder (gdbarch
, &alpha_sigtramp_frame_unwind
);
1817 frame_unwind_append_unwinder (gdbarch
, &alpha_heuristic_frame_unwind
);
1819 frame_base_set_default (gdbarch
, &alpha_heuristic_frame_base
);
1825 alpha_dwarf2_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1827 dwarf2_append_unwinders (gdbarch
);
1828 frame_base_append_sniffer (gdbarch
, dwarf2_frame_base_sniffer
);
1831 void _initialize_alpha_tdep ();
1833 _initialize_alpha_tdep ()
1836 gdbarch_register (bfd_arch_alpha
, alpha_gdbarch_init
, NULL
);
1838 /* Let the user set the fence post for heuristic_proc_start. */
1840 /* We really would like to have both "0" and "unlimited" work, but
1841 command.c doesn't deal with that. So make it a var_zinteger
1842 because the user can always use "999999" or some such for unlimited. */
1843 /* We need to throw away the frame cache when we set this, since it
1844 might change our ability to get backtraces. */
1845 add_setshow_zinteger_cmd ("heuristic-fence-post", class_support
,
1846 &heuristic_fence_post
, _("\
1847 Set the distance searched for the start of a function."), _("\
1848 Show the distance searched for the start of a function."), _("\
1849 If you are debugging a stripped executable, GDB needs to search through the\n\
1850 program for the start of a function. This command sets the distance of the\n\
1851 search. The only need to set it is when debugging a stripped executable."),
1852 reinit_frame_cache_sfunc
,
1853 NULL
, /* FIXME: i18n: The distance searched for
1854 the start of a function is \"%d\". */
1855 &setlist
, &showlist
);