gdb/amd64-fbsd-tdep.c

   1 /* Target-dependent code for FreeBSD/amd64.
   2
   3    Copyright (C) 2003-2022 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #include "defs.h"
  21 #include "osabi.h"
  22 #include "regset.h"
  23 #include "target.h"
  24 #include "trad-frame.h"
  25 #include "tramp-frame.h"
  26 #include "i386-fbsd-tdep.h"
  27 #include "gdbsupport/x86-xstate.h"
  28
  29 #include "amd64-tdep.h"
  30 #include "fbsd-tdep.h"
  31 #include "solib-svr4.h"
  32 #include "inferior.h"
  33
  34 /* The general-purpose regset consists of 22 64-bit slots, most of
  35    which contain individual registers, but a few contain multiple
  36    16-bit segment registers.  */
  37 #define AMD64_FBSD_SIZEOF_GREGSET       (22 * 8)
  38
  39 /* Register maps.  */
  40
  41 static const struct regcache_map_entry amd64_fbsd_gregmap[] =
  42 {
  43   { 1, AMD64_R15_REGNUM, 0 },
  44   { 1, AMD64_R14_REGNUM, 0 },
  45   { 1, AMD64_R13_REGNUM, 0 },
  46   { 1, AMD64_R12_REGNUM, 0 },
  47   { 1, AMD64_R11_REGNUM, 0 },
  48   { 1, AMD64_R10_REGNUM, 0 },
  49   { 1, AMD64_R9_REGNUM, 0 },
  50   { 1, AMD64_R8_REGNUM, 0 },
  51   { 1, AMD64_RDI_REGNUM, 0 },
  52   { 1, AMD64_RSI_REGNUM, 0 },
  53   { 1, AMD64_RBP_REGNUM, 0 },
  54   { 1, AMD64_RBX_REGNUM, 0 },
  55   { 1, AMD64_RDX_REGNUM, 0 },
  56   { 1, AMD64_RCX_REGNUM, 0 },
  57   { 1, AMD64_RAX_REGNUM, 0 },
  58   { 1, REGCACHE_MAP_SKIP, 4 },  /* trapno */
  59   { 1, AMD64_FS_REGNUM, 2 },
  60   { 1, AMD64_GS_REGNUM, 2 },
  61   { 1, REGCACHE_MAP_SKIP, 4 },  /* err */
  62   { 1, AMD64_ES_REGNUM, 2 },
  63   { 1, AMD64_DS_REGNUM, 2 },
  64   { 1, AMD64_RIP_REGNUM, 0 },
  65   { 1, AMD64_CS_REGNUM, 8 },
  66   { 1, AMD64_EFLAGS_REGNUM, 8 },
  67   { 1, AMD64_RSP_REGNUM, 0 },
  68   { 1, AMD64_SS_REGNUM, 8 },
  69   { 0 }
  70 };
  71
  72 /* This layout including fsbase and gsbase was adopted in FreeBSD
  73    8.0.  */
  74
  75 static const struct regcache_map_entry amd64_fbsd_mcregmap[] =
  76 {
  77   { 1, REGCACHE_MAP_SKIP, 8 },  /* mc_onstack */
  78   { 1, AMD64_RDI_REGNUM, 0 },
  79   { 1, AMD64_RSI_REGNUM, 0 },
  80   { 1, AMD64_RDX_REGNUM, 0 },
  81   { 1, AMD64_RCX_REGNUM, 0 },
  82   { 1, AMD64_R8_REGNUM, 0 },
  83   { 1, AMD64_R9_REGNUM, 0 },
  84   { 1, AMD64_RAX_REGNUM, 0 },
  85   { 1, AMD64_RBX_REGNUM, 0 },
  86   { 1, AMD64_RBP_REGNUM, 0 },
  87   { 1, AMD64_R10_REGNUM, 0 },
  88   { 1, AMD64_R11_REGNUM, 0 },
  89   { 1, AMD64_R12_REGNUM, 0 },
  90   { 1, AMD64_R13_REGNUM, 0 },
  91   { 1, AMD64_R14_REGNUM, 0 },
  92   { 1, AMD64_R15_REGNUM, 0 },
  93   { 1, REGCACHE_MAP_SKIP, 4 },  /* mc_trapno */
  94   { 1, AMD64_FS_REGNUM, 2 },
  95   { 1, AMD64_GS_REGNUM, 2 },
  96   { 1, REGCACHE_MAP_SKIP, 8 },  /* mc_addr */
  97   { 1, REGCACHE_MAP_SKIP, 4 },  /* mc_flags */
  98   { 1, AMD64_ES_REGNUM, 2 },
  99   { 1, AMD64_DS_REGNUM, 2 },
 100   { 1, REGCACHE_MAP_SKIP, 8 },  /* mc_err */
 101   { 1, AMD64_RIP_REGNUM, 0 },
 102   { 1, AMD64_CS_REGNUM, 8 },
 103   { 1, AMD64_EFLAGS_REGNUM, 8 },
 104   { 1, AMD64_RSP_REGNUM, 0 },
 105   { 1, AMD64_SS_REGNUM, 8 },
 106   { 1, REGCACHE_MAP_SKIP, 8 },  /* mc_len */
 107   { 1, REGCACHE_MAP_SKIP, 8 },  /* mc_fpformat */
 108   { 1, REGCACHE_MAP_SKIP, 8 },  /* mc_ownedfp */
 109   { 64, REGCACHE_MAP_SKIP, 8 }, /* mc_fpstate */
 110   { 1, AMD64_FSBASE_REGNUM, 0 },
 111   { 1, AMD64_GSBASE_REGNUM, 0 },
 112   { 0 }
 113 };
 114
 115 /* Register set definitions.  */
 116
 117 const struct regset amd64_fbsd_gregset =
 118 {
 119   amd64_fbsd_gregmap, regcache_supply_regset, regcache_collect_regset
 120 };
 121
 122 /* Support for signal handlers.  */
 123
 124 /* In a signal frame, rsp points to a 'struct sigframe' which is
 125    defined as:
 126
 127    struct sigframe {
 128         union {
 129                 __siginfohandler_t      *sf_action;
 130                 __sighandler_t          *sf_handler;
 131         } sf_ahu;
 132         ucontext_t      sf_uc;
 133         ...
 134    }
 135
 136    ucontext_t is defined as:
 137
 138    struct __ucontext {
 139            sigset_t     uc_sigmask;
 140            mcontext_t   uc_mcontext;
 141            ...
 142    };
 143
 144    The mcontext_t contains the general purpose register set as well
 145    as the floating point or XSAVE state.  */
 146
 147 /* NB: There is an 8 byte padding hole between sf_ahu and sf_uc. */
 148 #define AMD64_SIGFRAME_UCONTEXT_OFFSET          16
 149 #define AMD64_UCONTEXT_MCONTEXT_OFFSET          16
 150 #define AMD64_SIZEOF_MCONTEXT_T                 800
 151
 152 /* Implement the "init" method of struct tramp_frame.  */
 153
 154 static void
 155 amd64_fbsd_sigframe_init (const struct tramp_frame *self,
 156                           struct frame_info *this_frame,
 157                           struct trad_frame_cache *this_cache,
 158                           CORE_ADDR func)
 159 {
 160   struct gdbarch *gdbarch = get_frame_arch (this_frame);
 161   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 162   CORE_ADDR sp = get_frame_register_unsigned (this_frame, AMD64_RSP_REGNUM);
 163   CORE_ADDR mcontext_addr
 164     = (sp
 165        + AMD64_SIGFRAME_UCONTEXT_OFFSET
 166        + AMD64_UCONTEXT_MCONTEXT_OFFSET);
 167
 168   trad_frame_set_reg_regmap (this_cache, amd64_fbsd_mcregmap, mcontext_addr,
 169                              AMD64_SIZEOF_MCONTEXT_T);
 170
 171   /* Don't bother with floating point or XSAVE state for now.  The
 172      current helper routines for parsing FXSAVE and XSAVE state only
 173      work with regcaches.  This could perhaps create a temporary
 174      regcache, collect the register values from mc_fpstate and
 175      mc_xfpustate, and then set register values in the trad_frame.  */
 176
 177   trad_frame_set_id (this_cache, frame_id_build (sp, func));
 178 }
 179
 180 static const struct tramp_frame amd64_fbsd_sigframe =
 181 {
 182   SIGTRAMP_FRAME,
 183   1,
 184   {
 185     {0x48, ULONGEST_MAX},               /* lea     SIGF_UC(%rsp),%rdi */
 186     {0x8d, ULONGEST_MAX},
 187     {0x7c, ULONGEST_MAX},
 188     {0x24, ULONGEST_MAX},
 189     {0x10, ULONGEST_MAX},
 190     {0x6a, ULONGEST_MAX},               /* pushq   $0 */
 191     {0x00, ULONGEST_MAX},
 192     {0x48, ULONGEST_MAX},               /* movq    $SYS_sigreturn,%rax */
 193     {0xc7, ULONGEST_MAX},
 194     {0xc0, ULONGEST_MAX},
 195     {0xa1, ULONGEST_MAX},
 196     {0x01, ULONGEST_MAX},
 197     {0x00, ULONGEST_MAX},
 198     {0x00, ULONGEST_MAX},
 199     {0x0f, ULONGEST_MAX},               /* syscall */
 200     {0x05, ULONGEST_MAX},
 201     {TRAMP_SENTINEL_INSN, ULONGEST_MAX}
 202   },
 203   amd64_fbsd_sigframe_init
 204 };
 205
 206 /* Implement the core_read_description gdbarch method.  */
 207
 208 static const struct target_desc *
 209 amd64fbsd_core_read_description (struct gdbarch *gdbarch,
 210                                  struct target_ops *target,
 211                                  bfd *abfd)
 212 {
 213   return amd64_target_description (i386fbsd_core_read_xcr0 (abfd), true);
 214 }
 215
 216 /* Similar to amd64_supply_fpregset, but use XSAVE extended state.  */
 217
 218 static void
 219 amd64fbsd_supply_xstateregset (const struct regset *regset,
 220                                struct regcache *regcache, int regnum,
 221                                const void *xstateregs, size_t len)
 222 {
 223   amd64_supply_xsave (regcache, regnum, xstateregs);
 224 }
 225
 226 /* Similar to amd64_collect_fpregset, but use XSAVE extended state.  */
 227
 228 static void
 229 amd64fbsd_collect_xstateregset (const struct regset *regset,
 230                                 const struct regcache *regcache,
 231                                 int regnum, void *xstateregs, size_t len)
 232 {
 233   amd64_collect_xsave (regcache, regnum, xstateregs, 1);
 234 }
 235
 236 static const struct regset amd64fbsd_xstateregset =
 237   {
 238     NULL,
 239     amd64fbsd_supply_xstateregset,
 240     amd64fbsd_collect_xstateregset
 241   };
 242
 243 /* Iterate over core file register note sections.  */
 244
 245 static void
 246 amd64fbsd_iterate_over_regset_sections (struct gdbarch *gdbarch,
 247                                         iterate_over_regset_sections_cb *cb,
 248                                         void *cb_data,
 249                                         const struct regcache *regcache)
 250 {
 251   i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
 252
 253   cb (".reg", AMD64_FBSD_SIZEOF_GREGSET, AMD64_FBSD_SIZEOF_GREGSET,
 254       &amd64_fbsd_gregset, NULL, cb_data);
 255   cb (".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, &amd64_fpregset,
 256       NULL, cb_data);
 257   cb (".reg-xstate", X86_XSTATE_SIZE (tdep->xcr0), X86_XSTATE_SIZE (tdep->xcr0),
 258       &amd64fbsd_xstateregset, "XSAVE extended state", cb_data);
 259 }
 260
 261 /* Implement the get_thread_local_address gdbarch method.  */
 262
 263 static CORE_ADDR
 264 amd64fbsd_get_thread_local_address (struct gdbarch *gdbarch, ptid_t ptid,
 265                                     CORE_ADDR lm_addr, CORE_ADDR offset)
 266 {
 267   struct regcache *regcache;
 268
 269   regcache = get_thread_arch_regcache (current_inferior ()->process_target (),
 270                                        ptid, gdbarch);
 271
 272   target_fetch_registers (regcache, AMD64_FSBASE_REGNUM);
 273
 274   ULONGEST fsbase;
 275   if (regcache->cooked_read (AMD64_FSBASE_REGNUM, &fsbase) != REG_VALID)
 276     error (_("Unable to fetch %%fsbase"));
 277
 278   CORE_ADDR dtv_addr = fsbase + gdbarch_ptr_bit (gdbarch) / 8;
 279   return fbsd_get_thread_local_address (gdbarch, dtv_addr, lm_addr, offset);
 280 }
 281
 282 static void
 283 amd64fbsd_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
 284 {
 285   i386_gdbarch_tdep *tdep = (i386_gdbarch_tdep *) gdbarch_tdep (gdbarch);
 286
 287   /* Generic FreeBSD support. */
 288   fbsd_init_abi (info, gdbarch);
 289
 290   /* Obviously FreeBSD is BSD-based.  */
 291   i386bsd_init_abi (info, gdbarch);
 292
 293   amd64_init_abi (info, gdbarch,
 294                   amd64_target_description (X86_XSTATE_SSE_MASK, true));
 295
 296   tramp_frame_prepend_unwinder (gdbarch, &amd64_fbsd_sigframe);
 297
 298   tdep->xsave_xcr0_offset = I386_FBSD_XSAVE_XCR0_OFFSET;
 299
 300   /* Iterate over core file register note sections.  */
 301   set_gdbarch_iterate_over_regset_sections
 302     (gdbarch, amd64fbsd_iterate_over_regset_sections);
 303
 304   set_gdbarch_core_read_description (gdbarch,
 305                                      amd64fbsd_core_read_description);
 306
 307   /* FreeBSD uses SVR4-style shared libraries.  */
 308   set_solib_svr4_fetch_link_map_offsets
 309     (gdbarch, svr4_lp64_fetch_link_map_offsets);
 310
 311   set_gdbarch_fetch_tls_load_module_address (gdbarch,
 312                                              svr4_fetch_objfile_link_map);
 313   set_gdbarch_get_thread_local_address (gdbarch,
 314                                         amd64fbsd_get_thread_local_address);
 315 }
 316
 317 void _initialize_amd64fbsd_tdep ();
 318 void
 319 _initialize_amd64fbsd_tdep ()
 320 {
 321   gdbarch_register_osabi (bfd_arch_i386, bfd_mach_x86_64,
 322                           GDB_OSABI_FREEBSD, amd64fbsd_init_abi);
 323 }