1 /* GNU/Linux on ARM native support.
2 Copyright (C) 1999-2023 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "linux-nat.h"
25 #include "target-descriptions.h"
27 #include "observable.h"
28 #include "gdbthread.h"
30 #include "aarch32-tdep.h"
32 #include "arm-linux-tdep.h"
33 #include "aarch32-linux-nat.h"
35 #include <elf/common.h>
37 #include "nat/gdb_ptrace.h"
38 #include <sys/utsname.h>
39 #include <sys/procfs.h>
41 #include "nat/linux-ptrace.h"
42 #include "linux-tdep.h"
44 /* Prototypes for supply_gregset etc. */
47 /* Defines ps_err_e, struct ps_prochandle. */
48 #include "gdb_proc_service.h"
50 #ifndef PTRACE_GET_THREAD_AREA
51 #define PTRACE_GET_THREAD_AREA 22
54 #ifndef PTRACE_GETWMMXREGS
55 #define PTRACE_GETWMMXREGS 18
56 #define PTRACE_SETWMMXREGS 19
59 #ifndef PTRACE_GETVFPREGS
60 #define PTRACE_GETVFPREGS 27
61 #define PTRACE_SETVFPREGS 28
64 #ifndef PTRACE_GETHBPREGS
65 #define PTRACE_GETHBPREGS 29
66 #define PTRACE_SETHBPREGS 30
69 class arm_linux_nat_target final
: public linux_nat_target
72 /* Add our register access methods. */
73 void fetch_registers (struct regcache
*, int) override
;
74 void store_registers (struct regcache
*, int) override
;
76 /* Add our hardware breakpoint and watchpoint implementation. */
77 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
79 int insert_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*) override
;
81 int remove_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*) override
;
83 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
85 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
86 struct expression
*) override
;
88 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
89 struct expression
*) override
;
90 bool stopped_by_watchpoint () override
;
92 bool stopped_data_address (CORE_ADDR
*) override
;
94 bool watchpoint_addr_within_range (CORE_ADDR
, CORE_ADDR
, int) override
;
96 const struct target_desc
*read_description () override
;
98 /* Override linux_nat_target low methods. */
100 /* Handle thread creation and exit. */
101 void low_new_thread (struct lwp_info
*lp
) override
;
102 void low_delete_thread (struct arch_lwp_info
*lp
) override
;
103 void low_prepare_to_resume (struct lwp_info
*lp
) override
;
105 /* Handle process creation and exit. */
106 void low_new_fork (struct lwp_info
*parent
, pid_t child_pid
) override
;
107 void low_forget_process (pid_t pid
) override
;
110 static arm_linux_nat_target the_arm_linux_nat_target
;
112 /* Get the whole floating point state of the process and store it
116 fetch_fpregs (struct regcache
*regcache
)
119 gdb_byte fp
[ARM_LINUX_SIZEOF_NWFPE
];
121 /* Get the thread id for the ptrace call. */
122 tid
= regcache
->ptid ().lwp ();
124 /* Read the floating point state. */
125 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
130 iov
.iov_len
= ARM_LINUX_SIZEOF_NWFPE
;
132 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_FPREGSET
, &iov
);
135 ret
= ptrace (PT_GETFPREGS
, tid
, 0, fp
);
138 perror_with_name (_("Unable to fetch the floating point registers"));
141 regcache
->raw_supply (ARM_FPS_REGNUM
, fp
+ NWFPE_FPSR_OFFSET
);
143 /* Fetch the floating point registers. */
144 for (regno
= ARM_F0_REGNUM
; regno
<= ARM_F7_REGNUM
; regno
++)
145 supply_nwfpe_register (regcache
, regno
, fp
);
148 /* Save the whole floating point state of the process using
149 the contents from regcache. */
152 store_fpregs (const struct regcache
*regcache
)
155 gdb_byte fp
[ARM_LINUX_SIZEOF_NWFPE
];
157 /* Get the thread id for the ptrace call. */
158 tid
= regcache
->ptid ().lwp ();
160 /* Read the floating point state. */
161 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
163 elf_fpregset_t fpregs
;
166 iov
.iov_base
= &fpregs
;
167 iov
.iov_len
= sizeof (fpregs
);
169 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_FPREGSET
, &iov
);
172 ret
= ptrace (PT_GETFPREGS
, tid
, 0, fp
);
175 perror_with_name (_("Unable to fetch the floating point registers"));
178 if (REG_VALID
== regcache
->get_register_status (ARM_FPS_REGNUM
))
179 regcache
->raw_collect (ARM_FPS_REGNUM
, fp
+ NWFPE_FPSR_OFFSET
);
181 /* Store the floating point registers. */
182 for (regno
= ARM_F0_REGNUM
; regno
<= ARM_F7_REGNUM
; regno
++)
183 if (REG_VALID
== regcache
->get_register_status (regno
))
184 collect_nwfpe_register (regcache
, regno
, fp
);
186 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
191 iov
.iov_len
= ARM_LINUX_SIZEOF_NWFPE
;
193 ret
= ptrace (PTRACE_SETREGSET
, tid
, NT_FPREGSET
, &iov
);
196 ret
= ptrace (PTRACE_SETFPREGS
, tid
, 0, fp
);
199 perror_with_name (_("Unable to store floating point registers"));
202 /* Fetch all general registers of the process and store into
206 fetch_regs (struct regcache
*regcache
)
211 /* Get the thread id for the ptrace call. */
212 tid
= regcache
->ptid ().lwp ();
214 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
218 iov
.iov_base
= ®s
;
219 iov
.iov_len
= sizeof (regs
);
221 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_PRSTATUS
, &iov
);
224 ret
= ptrace (PTRACE_GETREGS
, tid
, 0, ®s
);
227 perror_with_name (_("Unable to fetch general registers"));
229 aarch32_gp_regcache_supply (regcache
, (uint32_t *) regs
, arm_apcs_32
);
233 store_regs (const struct regcache
*regcache
)
238 /* Get the thread id for the ptrace call. */
239 tid
= regcache
->ptid ().lwp ();
241 /* Fetch the general registers. */
242 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
246 iov
.iov_base
= ®s
;
247 iov
.iov_len
= sizeof (regs
);
249 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_PRSTATUS
, &iov
);
252 ret
= ptrace (PTRACE_GETREGS
, tid
, 0, ®s
);
255 perror_with_name (_("Unable to fetch general registers"));
257 aarch32_gp_regcache_collect (regcache
, (uint32_t *) regs
, arm_apcs_32
);
259 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
263 iov
.iov_base
= ®s
;
264 iov
.iov_len
= sizeof (regs
);
266 ret
= ptrace (PTRACE_SETREGSET
, tid
, NT_PRSTATUS
, &iov
);
269 ret
= ptrace (PTRACE_SETREGS
, tid
, 0, ®s
);
272 perror_with_name (_("Unable to store general registers"));
275 /* Fetch all WMMX registers of the process and store into
279 fetch_wmmx_regs (struct regcache
*regcache
)
281 char regbuf
[IWMMXT_REGS_SIZE
];
284 /* Get the thread id for the ptrace call. */
285 tid
= regcache
->ptid ().lwp ();
287 ret
= ptrace (PTRACE_GETWMMXREGS
, tid
, 0, regbuf
);
289 perror_with_name (_("Unable to fetch WMMX registers"));
291 for (regno
= 0; regno
< 16; regno
++)
292 regcache
->raw_supply (regno
+ ARM_WR0_REGNUM
, ®buf
[regno
* 8]);
294 for (regno
= 0; regno
< 2; regno
++)
295 regcache
->raw_supply (regno
+ ARM_WCSSF_REGNUM
,
296 ®buf
[16 * 8 + regno
* 4]);
298 for (regno
= 0; regno
< 4; regno
++)
299 regcache
->raw_supply (regno
+ ARM_WCGR0_REGNUM
,
300 ®buf
[16 * 8 + 2 * 4 + regno
* 4]);
304 store_wmmx_regs (const struct regcache
*regcache
)
306 char regbuf
[IWMMXT_REGS_SIZE
];
309 /* Get the thread id for the ptrace call. */
310 tid
= regcache
->ptid ().lwp ();
312 ret
= ptrace (PTRACE_GETWMMXREGS
, tid
, 0, regbuf
);
314 perror_with_name (_("Unable to fetch WMMX registers"));
316 for (regno
= 0; regno
< 16; regno
++)
317 if (REG_VALID
== regcache
->get_register_status (regno
+ ARM_WR0_REGNUM
))
318 regcache
->raw_collect (regno
+ ARM_WR0_REGNUM
, ®buf
[regno
* 8]);
320 for (regno
= 0; regno
< 2; regno
++)
321 if (REG_VALID
== regcache
->get_register_status (regno
+ ARM_WCSSF_REGNUM
))
322 regcache
->raw_collect (regno
+ ARM_WCSSF_REGNUM
,
323 ®buf
[16 * 8 + regno
* 4]);
325 for (regno
= 0; regno
< 4; regno
++)
326 if (REG_VALID
== regcache
->get_register_status (regno
+ ARM_WCGR0_REGNUM
))
327 regcache
->raw_collect (regno
+ ARM_WCGR0_REGNUM
,
328 ®buf
[16 * 8 + 2 * 4 + regno
* 4]);
330 ret
= ptrace (PTRACE_SETWMMXREGS
, tid
, 0, regbuf
);
333 perror_with_name (_("Unable to store WMMX registers"));
337 fetch_vfp_regs (struct regcache
*regcache
)
339 gdb_byte regbuf
[ARM_VFP3_REGS_SIZE
];
341 struct gdbarch
*gdbarch
= regcache
->arch ();
342 arm_gdbarch_tdep
*tdep
= gdbarch_tdep
<arm_gdbarch_tdep
> (gdbarch
);
344 /* Get the thread id for the ptrace call. */
345 tid
= regcache
->ptid ().lwp ();
347 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
351 iov
.iov_base
= regbuf
;
352 iov
.iov_len
= ARM_VFP3_REGS_SIZE
;
353 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_ARM_VFP
, &iov
);
356 ret
= ptrace (PTRACE_GETVFPREGS
, tid
, 0, regbuf
);
359 perror_with_name (_("Unable to fetch VFP registers"));
361 aarch32_vfp_regcache_supply (regcache
, regbuf
,
362 tdep
->vfp_register_count
);
366 store_vfp_regs (const struct regcache
*regcache
)
368 gdb_byte regbuf
[ARM_VFP3_REGS_SIZE
];
370 struct gdbarch
*gdbarch
= regcache
->arch ();
371 arm_gdbarch_tdep
*tdep
= gdbarch_tdep
<arm_gdbarch_tdep
> (gdbarch
);
373 /* Get the thread id for the ptrace call. */
374 tid
= regcache
->ptid ().lwp ();
376 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
380 iov
.iov_base
= regbuf
;
381 iov
.iov_len
= ARM_VFP3_REGS_SIZE
;
382 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_ARM_VFP
, &iov
);
385 ret
= ptrace (PTRACE_GETVFPREGS
, tid
, 0, regbuf
);
388 perror_with_name (_("Unable to fetch VFP registers (for update)"));
390 aarch32_vfp_regcache_collect (regcache
, regbuf
,
391 tdep
->vfp_register_count
);
393 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
397 iov
.iov_base
= regbuf
;
398 iov
.iov_len
= ARM_VFP3_REGS_SIZE
;
399 ret
= ptrace (PTRACE_SETREGSET
, tid
, NT_ARM_VFP
, &iov
);
402 ret
= ptrace (PTRACE_SETVFPREGS
, tid
, 0, regbuf
);
405 perror_with_name (_("Unable to store VFP registers"));
408 /* Fetch registers from the child process. Fetch all registers if
409 regno == -1, otherwise fetch all general registers or all floating
410 point registers depending upon the value of regno. */
413 arm_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regno
)
415 struct gdbarch
*gdbarch
= regcache
->arch ();
416 arm_gdbarch_tdep
*tdep
= gdbarch_tdep
<arm_gdbarch_tdep
> (gdbarch
);
420 fetch_regs (regcache
);
421 if (tdep
->have_wmmx_registers
)
422 fetch_wmmx_regs (regcache
);
423 if (tdep
->vfp_register_count
> 0)
424 fetch_vfp_regs (regcache
);
425 if (tdep
->have_fpa_registers
)
426 fetch_fpregs (regcache
);
430 if (regno
< ARM_F0_REGNUM
|| regno
== ARM_PS_REGNUM
)
431 fetch_regs (regcache
);
432 else if (regno
>= ARM_F0_REGNUM
&& regno
<= ARM_FPS_REGNUM
)
433 fetch_fpregs (regcache
);
434 else if (tdep
->have_wmmx_registers
435 && regno
>= ARM_WR0_REGNUM
&& regno
<= ARM_WCGR7_REGNUM
)
436 fetch_wmmx_regs (regcache
);
437 else if (tdep
->vfp_register_count
> 0
438 && regno
>= ARM_D0_REGNUM
439 && (regno
< ARM_D0_REGNUM
+ tdep
->vfp_register_count
440 || regno
== ARM_FPSCR_REGNUM
))
441 fetch_vfp_regs (regcache
);
445 /* Store registers back into the inferior. Store all registers if
446 regno == -1, otherwise store all general registers or all floating
447 point registers depending upon the value of regno. */
450 arm_linux_nat_target::store_registers (struct regcache
*regcache
, int regno
)
452 struct gdbarch
*gdbarch
= regcache
->arch ();
453 arm_gdbarch_tdep
*tdep
= gdbarch_tdep
<arm_gdbarch_tdep
> (gdbarch
);
457 store_regs (regcache
);
458 if (tdep
->have_wmmx_registers
)
459 store_wmmx_regs (regcache
);
460 if (tdep
->vfp_register_count
> 0)
461 store_vfp_regs (regcache
);
462 if (tdep
->have_fpa_registers
)
463 store_fpregs (regcache
);
467 if (regno
< ARM_F0_REGNUM
|| regno
== ARM_PS_REGNUM
)
468 store_regs (regcache
);
469 else if ((regno
>= ARM_F0_REGNUM
) && (regno
<= ARM_FPS_REGNUM
))
470 store_fpregs (regcache
);
471 else if (tdep
->have_wmmx_registers
472 && regno
>= ARM_WR0_REGNUM
&& regno
<= ARM_WCGR7_REGNUM
)
473 store_wmmx_regs (regcache
);
474 else if (tdep
->vfp_register_count
> 0
475 && regno
>= ARM_D0_REGNUM
476 && (regno
< ARM_D0_REGNUM
+ tdep
->vfp_register_count
477 || regno
== ARM_FPSCR_REGNUM
))
478 store_vfp_regs (regcache
);
482 /* Wrapper functions for the standard regset handling, used by
486 fill_gregset (const struct regcache
*regcache
,
487 gdb_gregset_t
*gregsetp
, int regno
)
489 arm_linux_collect_gregset (NULL
, regcache
, regno
, gregsetp
, 0);
493 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
495 arm_linux_supply_gregset (NULL
, regcache
, -1, gregsetp
, 0);
499 fill_fpregset (const struct regcache
*regcache
,
500 gdb_fpregset_t
*fpregsetp
, int regno
)
502 arm_linux_collect_nwfpe (NULL
, regcache
, regno
, fpregsetp
, 0);
505 /* Fill GDB's register array with the floating-point register values
509 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
*fpregsetp
)
511 arm_linux_supply_nwfpe (NULL
, regcache
, -1, fpregsetp
, 0);
514 /* Fetch the thread-local storage pointer for libthread_db. */
517 ps_get_thread_area (struct ps_prochandle
*ph
,
518 lwpid_t lwpid
, int idx
, void **base
)
520 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
, NULL
, base
) != 0)
523 /* IDX is the bias from the thread pointer to the beginning of the
524 thread descriptor. It has to be subtracted due to implementation
525 quirks in libthread_db. */
526 *base
= (void *) ((char *)*base
- idx
);
531 const struct target_desc
*
532 arm_linux_nat_target::read_description ()
534 if (inferior_ptid
== null_ptid
)
535 return this->beneath ()->read_description ();
537 CORE_ADDR arm_hwcap
= linux_get_hwcap ();
539 if (have_ptrace_getregset
== TRIBOOL_UNKNOWN
)
541 elf_gregset_t gpregs
;
543 int tid
= inferior_ptid
.pid ();
545 iov
.iov_base
= &gpregs
;
546 iov
.iov_len
= sizeof (gpregs
);
548 /* Check if PTRACE_GETREGSET works. */
549 if (ptrace (PTRACE_GETREGSET
, tid
, NT_PRSTATUS
, &iov
) < 0)
550 have_ptrace_getregset
= TRIBOOL_FALSE
;
552 have_ptrace_getregset
= TRIBOOL_TRUE
;
555 if (arm_hwcap
& HWCAP_IWMMXT
)
556 return arm_read_description (ARM_FP_TYPE_IWMMXT
, false);
558 if (arm_hwcap
& HWCAP_VFP
)
560 /* Make sure that the kernel supports reading VFP registers. Support was
562 int pid
= inferior_ptid
.pid ();
564 char *buf
= (char *) alloca (ARM_VFP3_REGS_SIZE
);
565 if (ptrace (PTRACE_GETVFPREGS
, pid
, 0, buf
) < 0 && errno
== EIO
)
568 /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support
569 Neon with VFPv3-D32. */
570 if (arm_hwcap
& HWCAP_NEON
)
571 return aarch32_read_description ();
572 else if ((arm_hwcap
& (HWCAP_VFPv3
| HWCAP_VFPv3D16
)) == HWCAP_VFPv3
)
573 return arm_read_description (ARM_FP_TYPE_VFPV3
, false);
575 return arm_read_description (ARM_FP_TYPE_VFPV2
, false);
578 return this->beneath ()->read_description ();
581 /* Information describing the hardware breakpoint capabilities. */
582 struct arm_linux_hwbp_cap
585 gdb_byte max_wp_length
;
590 /* Since we cannot dynamically allocate subfields of arm_linux_process_info,
591 assume a maximum number of supported break-/watchpoints. */
595 /* Get hold of the Hardware Breakpoint information for the target we are
596 attached to. Returns NULL if the kernel doesn't support Hardware
597 breakpoints at all, or a pointer to the information structure. */
598 static const struct arm_linux_hwbp_cap
*
599 arm_linux_get_hwbp_cap (void)
601 /* The info structure we return. */
602 static struct arm_linux_hwbp_cap info
;
604 /* Is INFO in a good state? -1 means that no attempt has been made to
605 initialize INFO; 0 means an attempt has been made, but it failed; 1
606 means INFO is in an initialized state. */
607 static int available
= -1;
614 tid
= inferior_ptid
.lwp ();
615 if (ptrace (PTRACE_GETHBPREGS
, tid
, 0, &val
) < 0)
619 info
.arch
= (gdb_byte
)((val
>> 24) & 0xff);
620 info
.max_wp_length
= (gdb_byte
)((val
>> 16) & 0xff);
621 info
.wp_count
= (gdb_byte
)((val
>> 8) & 0xff);
622 info
.bp_count
= (gdb_byte
)(val
& 0xff);
624 if (info
.wp_count
> MAX_WPTS
)
626 warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
627 supports %d"), MAX_WPTS
, info
.wp_count
);
628 info
.wp_count
= MAX_WPTS
;
631 if (info
.bp_count
> MAX_BPTS
)
633 warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
634 supports %d"), MAX_BPTS
, info
.bp_count
);
635 info
.bp_count
= MAX_BPTS
;
637 available
= (info
.arch
!= 0);
641 return available
== 1 ? &info
: NULL
;
644 /* How many hardware breakpoints are available? */
646 arm_linux_get_hw_breakpoint_count (void)
648 const struct arm_linux_hwbp_cap
*cap
= arm_linux_get_hwbp_cap ();
649 return cap
!= NULL
? cap
->bp_count
: 0;
652 /* How many hardware watchpoints are available? */
654 arm_linux_get_hw_watchpoint_count (void)
656 const struct arm_linux_hwbp_cap
*cap
= arm_linux_get_hwbp_cap ();
657 return cap
!= NULL
? cap
->wp_count
: 0;
660 /* Have we got a free break-/watch-point available for use? Returns -1 if
661 there is not an appropriate resource available, otherwise returns 1. */
663 arm_linux_nat_target::can_use_hw_breakpoint (enum bptype type
,
666 if (type
== bp_hardware_watchpoint
|| type
== bp_read_watchpoint
667 || type
== bp_access_watchpoint
|| type
== bp_watchpoint
)
669 int count
= arm_linux_get_hw_watchpoint_count ();
673 else if (cnt
+ ot
> count
)
676 else if (type
== bp_hardware_breakpoint
)
678 int count
= arm_linux_get_hw_breakpoint_count ();
682 else if (cnt
> count
)
686 gdb_assert_not_reached ("unknown breakpoint type");
691 /* Enum describing the different types of ARM hardware break-/watch-points. */
700 /* Type describing an ARM Hardware Breakpoint Control register value. */
701 typedef unsigned int arm_hwbp_control_t
;
703 /* Structure used to keep track of hardware break-/watch-points. */
704 struct arm_linux_hw_breakpoint
706 /* Address to break on, or being watched. */
707 unsigned int address
;
708 /* Control register for break-/watch- point. */
709 arm_hwbp_control_t control
;
712 /* Structure containing arrays of per process hardware break-/watchpoints
713 for caching address and control information.
715 The Linux ptrace interface to hardware break-/watch-points presents the
716 values in a vector centred around 0 (which is used fo generic information).
717 Positive indicies refer to breakpoint addresses/control registers, negative
718 indices to watchpoint addresses/control registers.
720 The Linux vector is indexed as follows:
721 -((i << 1) + 2): Control register for watchpoint i.
722 -((i << 1) + 1): Address register for watchpoint i.
723 0: Information register.
724 ((i << 1) + 1): Address register for breakpoint i.
725 ((i << 1) + 2): Control register for breakpoint i.
727 This structure is used as a per-thread cache of the state stored by the
728 kernel, so that we don't need to keep calling into the kernel to find a
731 We treat break-/watch-points with their enable bit clear as being deleted.
733 struct arm_linux_debug_reg_state
735 /* Hardware breakpoints for this process. */
736 struct arm_linux_hw_breakpoint bpts
[MAX_BPTS
];
737 /* Hardware watchpoints for this process. */
738 struct arm_linux_hw_breakpoint wpts
[MAX_WPTS
];
741 /* Per-process arch-specific data we want to keep. */
742 struct arm_linux_process_info
745 struct arm_linux_process_info
*next
;
746 /* The process identifier. */
748 /* Hardware break-/watchpoints state information. */
749 struct arm_linux_debug_reg_state state
;
753 /* Per-thread arch-specific data we want to keep. */
756 /* Non-zero if our copy differs from what's recorded in the thread. */
757 char bpts_changed
[MAX_BPTS
];
758 char wpts_changed
[MAX_WPTS
];
761 static struct arm_linux_process_info
*arm_linux_process_list
= NULL
;
763 /* Find process data for process PID. */
765 static struct arm_linux_process_info
*
766 arm_linux_find_process_pid (pid_t pid
)
768 struct arm_linux_process_info
*proc
;
770 for (proc
= arm_linux_process_list
; proc
; proc
= proc
->next
)
771 if (proc
->pid
== pid
)
777 /* Add process data for process PID. Returns newly allocated info
780 static struct arm_linux_process_info
*
781 arm_linux_add_process (pid_t pid
)
783 struct arm_linux_process_info
*proc
;
785 proc
= XCNEW (struct arm_linux_process_info
);
788 proc
->next
= arm_linux_process_list
;
789 arm_linux_process_list
= proc
;
794 /* Get data specific info for process PID, creating it if necessary.
795 Never returns NULL. */
797 static struct arm_linux_process_info
*
798 arm_linux_process_info_get (pid_t pid
)
800 struct arm_linux_process_info
*proc
;
802 proc
= arm_linux_find_process_pid (pid
);
804 proc
= arm_linux_add_process (pid
);
809 /* Called whenever GDB is no longer debugging process PID. It deletes
810 data structures that keep track of debug register state. */
813 arm_linux_nat_target::low_forget_process (pid_t pid
)
815 struct arm_linux_process_info
*proc
, **proc_link
;
817 proc
= arm_linux_process_list
;
818 proc_link
= &arm_linux_process_list
;
822 if (proc
->pid
== pid
)
824 *proc_link
= proc
->next
;
830 proc_link
= &proc
->next
;
835 /* Get hardware break-/watchpoint state for process PID. */
837 static struct arm_linux_debug_reg_state
*
838 arm_linux_get_debug_reg_state (pid_t pid
)
840 return &arm_linux_process_info_get (pid
)->state
;
843 /* Initialize an ARM hardware break-/watch-point control register value.
844 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
845 type of break-/watch-point; ENABLE indicates whether the point is enabled.
847 static arm_hwbp_control_t
848 arm_hwbp_control_initialize (unsigned byte_address_select
,
849 arm_hwbp_type hwbp_type
,
852 gdb_assert ((byte_address_select
& ~0xffU
) == 0);
853 gdb_assert (hwbp_type
!= arm_hwbp_break
854 || ((byte_address_select
& 0xfU
) != 0));
856 return (byte_address_select
<< 5) | (hwbp_type
<< 3) | (3 << 1) | enable
;
859 /* Does the breakpoint control value CONTROL have the enable bit set? */
861 arm_hwbp_control_is_enabled (arm_hwbp_control_t control
)
863 return control
& 0x1;
866 /* Change a breakpoint control word so that it is in the disabled state. */
867 static arm_hwbp_control_t
868 arm_hwbp_control_disable (arm_hwbp_control_t control
)
870 return control
& ~0x1;
873 /* Initialise the hardware breakpoint structure P. The breakpoint will be
874 enabled, and will point to the placed address of BP_TGT. */
876 arm_linux_hw_breakpoint_initialize (struct gdbarch
*gdbarch
,
877 struct bp_target_info
*bp_tgt
,
878 struct arm_linux_hw_breakpoint
*p
)
881 CORE_ADDR address
= bp_tgt
->placed_address
= bp_tgt
->reqstd_address
;
883 /* We have to create a mask for the control register which says which bits
884 of the word pointed to by address to break on. */
885 if (arm_pc_is_thumb (gdbarch
, address
))
896 p
->address
= (unsigned int) address
;
897 p
->control
= arm_hwbp_control_initialize (mask
, arm_hwbp_break
, 1);
900 /* Get the ARM hardware breakpoint type from the TYPE value we're
901 given when asked to set a watchpoint. */
903 arm_linux_get_hwbp_type (enum target_hw_bp_type type
)
906 return arm_hwbp_load
;
907 else if (type
== hw_write
)
908 return arm_hwbp_store
;
910 return arm_hwbp_access
;
913 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
914 to LEN. The type of watchpoint is given in RW. */
916 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr
, int len
,
917 enum target_hw_bp_type type
,
918 struct arm_linux_hw_breakpoint
*p
)
920 const struct arm_linux_hwbp_cap
*cap
= arm_linux_get_hwbp_cap ();
923 gdb_assert (cap
!= NULL
);
924 gdb_assert (cap
->max_wp_length
!= 0);
926 mask
= (1 << len
) - 1;
928 p
->address
= (unsigned int) addr
;
929 p
->control
= arm_hwbp_control_initialize (mask
,
930 arm_linux_get_hwbp_type (type
), 1);
933 /* Are two break-/watch-points equal? */
935 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint
*p1
,
936 const struct arm_linux_hw_breakpoint
*p2
)
938 return p1
->address
== p2
->address
&& p1
->control
== p2
->control
;
941 /* Callback to mark a watch-/breakpoint to be updated in all threads of
942 the current process. */
945 update_registers_callback (struct lwp_info
*lwp
, int watch
, int index
)
947 if (lwp
->arch_private
== NULL
)
948 lwp
->arch_private
= XCNEW (struct arch_lwp_info
);
950 /* The actual update is done later just before resuming the lwp,
951 we just mark that the registers need updating. */
953 lwp
->arch_private
->wpts_changed
[index
] = 1;
955 lwp
->arch_private
->bpts_changed
[index
] = 1;
957 /* If the lwp isn't stopped, force it to momentarily pause, so
958 we can update its breakpoint registers. */
960 linux_stop_lwp (lwp
);
965 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
966 =1) BPT for thread TID. */
968 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint
* bpt
,
974 struct arm_linux_hw_breakpoint
* bpts
;
976 pid
= inferior_ptid
.pid ();
977 pid_ptid
= ptid_t (pid
);
981 count
= arm_linux_get_hw_watchpoint_count ();
982 bpts
= arm_linux_get_debug_reg_state (pid
)->wpts
;
986 count
= arm_linux_get_hw_breakpoint_count ();
987 bpts
= arm_linux_get_debug_reg_state (pid
)->bpts
;
990 for (i
= 0; i
< count
; ++i
)
991 if (!arm_hwbp_control_is_enabled (bpts
[i
].control
))
994 iterate_over_lwps (pid_ptid
,
995 [=] (struct lwp_info
*info
)
997 return update_registers_callback (info
, watchpoint
,
1003 gdb_assert (i
!= count
);
1006 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1007 (WATCHPOINT = 1) BPT for thread TID. */
1009 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint
*bpt
,
1015 struct arm_linux_hw_breakpoint
* bpts
;
1017 pid
= inferior_ptid
.pid ();
1018 pid_ptid
= ptid_t (pid
);
1022 count
= arm_linux_get_hw_watchpoint_count ();
1023 bpts
= arm_linux_get_debug_reg_state (pid
)->wpts
;
1027 count
= arm_linux_get_hw_breakpoint_count ();
1028 bpts
= arm_linux_get_debug_reg_state (pid
)->bpts
;
1031 for (i
= 0; i
< count
; ++i
)
1032 if (arm_linux_hw_breakpoint_equal (bpt
, bpts
+ i
))
1034 bpts
[i
].control
= arm_hwbp_control_disable (bpts
[i
].control
);
1035 iterate_over_lwps (pid_ptid
,
1036 [=] (struct lwp_info
*info
)
1038 return update_registers_callback (info
, watchpoint
,
1044 gdb_assert (i
!= count
);
1047 /* Insert a Hardware breakpoint. */
1049 arm_linux_nat_target::insert_hw_breakpoint (struct gdbarch
*gdbarch
,
1050 struct bp_target_info
*bp_tgt
)
1052 struct arm_linux_hw_breakpoint p
;
1054 if (arm_linux_get_hw_breakpoint_count () == 0)
1057 arm_linux_hw_breakpoint_initialize (gdbarch
, bp_tgt
, &p
);
1059 arm_linux_insert_hw_breakpoint1 (&p
, 0);
1064 /* Remove a hardware breakpoint. */
1066 arm_linux_nat_target::remove_hw_breakpoint (struct gdbarch
*gdbarch
,
1067 struct bp_target_info
*bp_tgt
)
1069 struct arm_linux_hw_breakpoint p
;
1071 if (arm_linux_get_hw_breakpoint_count () == 0)
1074 arm_linux_hw_breakpoint_initialize (gdbarch
, bp_tgt
, &p
);
1076 arm_linux_remove_hw_breakpoint1 (&p
, 0);
1081 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1084 arm_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
1086 const struct arm_linux_hwbp_cap
*cap
= arm_linux_get_hwbp_cap ();
1087 CORE_ADDR max_wp_length
, aligned_addr
;
1089 /* Can not set watchpoints for zero or negative lengths. */
1093 /* Need to be able to use the ptrace interface. */
1094 if (cap
== NULL
|| cap
->wp_count
== 0)
1097 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1098 range covered by a watchpoint. */
1099 max_wp_length
= (CORE_ADDR
)cap
->max_wp_length
;
1100 aligned_addr
= addr
& ~(max_wp_length
- 1);
1102 if (aligned_addr
+ max_wp_length
< addr
+ len
)
1105 /* The current ptrace interface can only handle watchpoints that are a
1107 if ((len
& (len
- 1)) != 0)
1110 /* All tests passed so we must be able to set a watchpoint. */
1114 /* Insert a Hardware breakpoint. */
1116 arm_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
1117 enum target_hw_bp_type rw
,
1118 struct expression
*cond
)
1120 struct arm_linux_hw_breakpoint p
;
1122 if (arm_linux_get_hw_watchpoint_count () == 0)
1125 arm_linux_hw_watchpoint_initialize (addr
, len
, rw
, &p
);
1127 arm_linux_insert_hw_breakpoint1 (&p
, 1);
1132 /* Remove a hardware breakpoint. */
1134 arm_linux_nat_target::remove_watchpoint (CORE_ADDR addr
,
1135 int len
, enum target_hw_bp_type rw
,
1136 struct expression
*cond
)
1138 struct arm_linux_hw_breakpoint p
;
1140 if (arm_linux_get_hw_watchpoint_count () == 0)
1143 arm_linux_hw_watchpoint_initialize (addr
, len
, rw
, &p
);
1145 arm_linux_remove_hw_breakpoint1 (&p
, 1);
1150 /* What was the data address the target was stopped on accessing. */
1152 arm_linux_nat_target::stopped_data_address (CORE_ADDR
*addr_p
)
1157 if (!linux_nat_get_siginfo (inferior_ptid
, &siginfo
))
1160 /* This must be a hardware breakpoint. */
1161 if (siginfo
.si_signo
!= SIGTRAP
1162 || (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1165 /* We must be able to set hardware watchpoints. */
1166 if (arm_linux_get_hw_watchpoint_count () == 0)
1169 slot
= siginfo
.si_errno
;
1171 /* If we are in a positive slot then we're looking at a breakpoint and not
1176 *addr_p
= (CORE_ADDR
) (uintptr_t) siginfo
.si_addr
;
1180 /* Has the target been stopped by hitting a watchpoint? */
1182 arm_linux_nat_target::stopped_by_watchpoint ()
1185 return stopped_data_address (&addr
);
1189 arm_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr
,
1193 return start
<= addr
&& start
+ length
- 1 >= addr
;
1196 /* Handle thread creation. We need to copy the breakpoints and watchpoints
1197 in the parent thread to the child thread. */
1199 arm_linux_nat_target::low_new_thread (struct lwp_info
*lp
)
1202 struct arch_lwp_info
*info
= XCNEW (struct arch_lwp_info
);
1204 /* Mark that all the hardware breakpoint/watchpoint register pairs
1205 for this thread need to be initialized. */
1207 for (i
= 0; i
< MAX_BPTS
; i
++)
1209 info
->bpts_changed
[i
] = 1;
1210 info
->wpts_changed
[i
] = 1;
1213 lp
->arch_private
= info
;
1216 /* Function to call when a thread is being deleted. */
1219 arm_linux_nat_target::low_delete_thread (struct arch_lwp_info
*arch_lwp
)
1224 /* Called when resuming a thread.
1225 The hardware debug registers are updated when there is any change. */
1228 arm_linux_nat_target::low_prepare_to_resume (struct lwp_info
*lwp
)
1231 struct arm_linux_hw_breakpoint
*bpts
, *wpts
;
1232 struct arch_lwp_info
*arm_lwp_info
= lwp
->arch_private
;
1234 pid
= lwp
->ptid
.lwp ();
1235 bpts
= arm_linux_get_debug_reg_state (lwp
->ptid
.pid ())->bpts
;
1236 wpts
= arm_linux_get_debug_reg_state (lwp
->ptid
.pid ())->wpts
;
1238 /* NULL means this is the main thread still going through the shell,
1239 or, no watchpoint has been set yet. In that case, there's
1241 if (arm_lwp_info
== NULL
)
1244 for (i
= 0; i
< arm_linux_get_hw_breakpoint_count (); i
++)
1245 if (arm_lwp_info
->bpts_changed
[i
])
1248 if (arm_hwbp_control_is_enabled (bpts
[i
].control
))
1249 if (ptrace (PTRACE_SETHBPREGS
, pid
,
1250 (PTRACE_TYPE_ARG3
) ((i
<< 1) + 1), &bpts
[i
].address
) < 0)
1251 perror_with_name (_("Unexpected error setting breakpoint"));
1253 if (bpts
[i
].control
!= 0)
1254 if (ptrace (PTRACE_SETHBPREGS
, pid
,
1255 (PTRACE_TYPE_ARG3
) ((i
<< 1) + 2), &bpts
[i
].control
) < 0)
1256 perror_with_name (_("Unexpected error setting breakpoint"));
1258 arm_lwp_info
->bpts_changed
[i
] = 0;
1261 for (i
= 0; i
< arm_linux_get_hw_watchpoint_count (); i
++)
1262 if (arm_lwp_info
->wpts_changed
[i
])
1265 if (arm_hwbp_control_is_enabled (wpts
[i
].control
))
1266 if (ptrace (PTRACE_SETHBPREGS
, pid
,
1267 (PTRACE_TYPE_ARG3
) -((i
<< 1) + 1), &wpts
[i
].address
) < 0)
1268 perror_with_name (_("Unexpected error setting watchpoint"));
1270 if (wpts
[i
].control
!= 0)
1271 if (ptrace (PTRACE_SETHBPREGS
, pid
,
1272 (PTRACE_TYPE_ARG3
) -((i
<< 1) + 2), &wpts
[i
].control
) < 0)
1273 perror_with_name (_("Unexpected error setting watchpoint"));
1275 arm_lwp_info
->wpts_changed
[i
] = 0;
1279 /* linux_nat_new_fork hook. */
1282 arm_linux_nat_target::low_new_fork (struct lwp_info
*parent
, pid_t child_pid
)
1285 struct arm_linux_debug_reg_state
*parent_state
;
1286 struct arm_linux_debug_reg_state
*child_state
;
1288 /* NULL means no watchpoint has ever been set in the parent. In
1289 that case, there's nothing to do. */
1290 if (parent
->arch_private
== NULL
)
1293 /* GDB core assumes the child inherits the watchpoints/hw
1294 breakpoints of the parent, and will remove them all from the
1295 forked off process. Copy the debug registers mirrors into the
1296 new process so that all breakpoints and watchpoints can be
1297 removed together. */
1299 parent_pid
= parent
->ptid
.pid ();
1300 parent_state
= arm_linux_get_debug_reg_state (parent_pid
);
1301 child_state
= arm_linux_get_debug_reg_state (child_pid
);
1302 *child_state
= *parent_state
;
1305 void _initialize_arm_linux_nat ();
1307 _initialize_arm_linux_nat ()
1309 /* Register the target. */
1310 linux_target
= &the_arm_linux_nat_target
;
1311 add_inf_child_target (&the_arm_linux_nat_target
);