More changes, mostly cleanups from the last set.
[binutils-gdb.git] / gdb / arm-pinsn.c
1 /* Print Acorn Risc Machine instructions for GDB, the GNU debugger.
2 Copyright 1986, 1989, 1991 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20 #include <stdio.h>
21 #include <ctype.h>
22 #include <assert.h>
23
24 #include "defs.h"
25 #include "symtab.h"
26 #include "opcode/arm.h"
27
28 extern char *reg_names[];
29
30 static char *shift_names[] = {
31 "lsl", "lsr", "asr", "ror",
32 };
33
34 static char *cond_names[] = {
35 "eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
36 "hi", "ls", "ge", "lt", "gt", "le", "", "nv"
37 };
38
39 static char float_precision[] = "sdep";
40 static char float_rounding[] = " pmz";
41 static float float_immed[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 0.5, 10.0 };
42
43 static void print_ldr_str_offset();
44 static void print_ldc_stc_offset();
45 static long immediate_value();
46 \f
47 /* Print the ARM instruction at address MEMADDR in debugged memory,
48 on STREAM. Returns length of the instruction, in bytes. */
49
50 int
51 print_insn (memaddr, stream)
52 CORE_ADDR memaddr;
53 FILE *stream;
54 {
55 unsigned long ins;
56 register struct opcode *op;
57 register char *p;
58 register int i, c;
59 int s, e, val;
60
61 ins = read_memory_integer(memaddr, 4);
62 for (i = 0, op = opcodes; i < N_OPCODES; i++, op++)
63 if ((ins & op->mask) == op->value) break;
64 assert(i != N_OPCODES);
65
66 for (p = op->assembler; *p;) {
67 c = *p++;
68 if (c == '%') {
69 s = e = 0;
70 while (isdigit(*p))
71 s = s*10 + (*p++ - '0');
72 if (*p == '-') {
73 p++;
74 while (isdigit(*p))
75 e = e*10 + (*p++ - '0');
76 } else
77 e = s;
78 assert(s >= 0 && s <= 31 && e >= 0 && e <= 31);
79 val = (ins >> s) & ((1 << (e + 1 - s)) - 1);
80 switch (*p++) {
81 case '%' :
82 putc('%', stream);
83 break;
84 case 'd' :
85 fprintf(stream, "%d", val);
86 break;
87 case 'x' :
88 fprintf(stream, "%x", val);
89 break;
90 case 'r' :
91 assert(val >= 0 && val <= 15);
92 fprintf(stream, "%s", reg_names[val]);
93 break;
94 case 'c' :
95 fprintf(stream, "%s", cond_names[ins >> 28]);
96 break;
97 case '\'' :
98 assert(*p);
99 c = *p++;
100 if (val)
101 putc(c, stream);
102 break;
103 case '`' :
104 assert(*p);
105 c = *p++;
106 if (!val)
107 putc(c, stream);
108 break;
109 case '?' :
110 assert(*p);
111 c = *p++;
112 assert(*p);
113 if (val)
114 p++;
115 else
116 c = *p++;
117 putc(c, stream);
118 break;
119 case 'p' :
120 if (((ins >> 12) & 0xf) == 0xf)
121 putc('p', stream);
122 break;
123 case 'o' :
124 if (ins & (1<<25)) {
125 int immed = immediate_value(ins & 0xfff);
126 fprintf (stream, "#%d (0x%x)", immed, immed);
127 } else {
128 int operand2 = ins & 0xfff;
129 /* in operand2 :
130 bits 0-3 are the base register
131 bits 5-6 are the shift (0=lsl, 1=lsr, 2=asr, 3=ror)
132 if bit 4 is zero then bits 7-11 are an immediate shift count
133 else bit 7 must be zero and bits 8-11 are the register
134 to be used as a shift count.
135 Note: no shift at all is encoded as "reg lsl #0" */
136 fprintf (stream, "%s", reg_names[operand2 & 0xf]);
137 if (operand2 & 0xff0) {
138 /* ror #0 is really rrx (rotate right extend) */
139 if ((operand2 & 0xff0) == 0x060)
140 fprintf (stream, ", rrx");
141 else {
142 fprintf (stream, ", %s ",
143 shift_names[(operand2 >> 5) & 3]);
144 if (operand2 & (1<<4)) /* register shift */
145 fprintf (stream, "%s",
146 reg_names[operand2 >> 8]);
147 else /* immediate shift */
148 fprintf (stream, "#%d",
149 operand2 >> 7);
150 }
151 }
152 }
153 break;
154 case 'a' :
155 fprintf (stream, "[%s", reg_names[(ins >> 16) & 0xf]);
156 if (ins & (1<<24)) {
157 fprintf (stream, ", ");
158 print_ldr_str_offset (ins, stream);
159 putc (']', stream);
160 if (ins & (1<<21)) putc('!', stream);
161 /* If it is a pc relative load, then it is probably
162 a constant so print it */
163 if (((ins >> 16) & 0xf) == 15 &&
164 (ins & (1<<25)) == 0 &&
165 (ins & (1<<20))) {
166 int addr = memaddr + 8 +
167 (ins & 0xfff) * ((ins & (1<<23)) ? 1 : -1);
168 fprintf (stream, " (contents=");
169 print_address (read_memory_integer(addr, 4), stream);
170 fprintf (stream, ")");
171 }
172 } else {
173 fprintf (stream, "]," );
174 print_ldr_str_offset (ins, stream);
175 }
176 break;
177 case 'b' :
178 print_address (memaddr + 8 + (((int)ins << 8) >> 6), stream);
179 break;
180 case 'A' :
181 fprintf (stream, "[%s", reg_names[(ins >> 16) & 0xf]);
182 if (ins & (1<<24)) {
183 fprintf (stream, ", ");
184 print_ldc_stc_offset (ins, stream);
185 putc(']', stream);
186 if (ins & (1<<21))
187 putc('!', stream);
188 } else {
189 fprintf (stream, "], ");
190 print_ldc_stc_offset (ins, stream);
191 }
192 break;
193 case 'm' :
194 {
195 int regnum, first = 1;
196 putc('{', stream);
197 for (regnum = 0; regnum < 16; regnum++)
198 if (ins & (1<<regnum)) {
199 if (!first)
200 putc (',', stream);
201 first = 0;
202 fprintf (stream, "%s", reg_names[regnum]);
203 }
204 putc('}', stream);
205 }
206 break;
207 case 'P' :
208 val = ((ins >> 18) & 2) | ((ins >> 7) & 1);
209 putc(float_precision[val], stream);
210 break;
211 case 'Q' :
212 val = ((ins >> 21) & 2) | ((ins >> 15) & 1);
213 putc(float_precision[val], stream);
214 break;
215 case 'R' :
216 val = ((ins >> 5) & 3);
217 if (val) putc(float_rounding[val], stream);
218 break;
219 case 'f' :
220 assert(val >= 0 && val <= 15);
221 if (val > 7)
222 fprintf (stream, "#%3.1f", float_immed[val - 8]);
223 else
224 fprintf (stream, "f%d", val);
225 break;
226 default:
227 abort();
228 }
229 } else
230 putc(c, stream);
231 }
232 return 4;
233 }
234
235 static long
236 immediate_value(operand)
237 int operand;
238 {
239 int val = operand & 0xff;
240 int shift = 2*(operand >> 8);
241 /* immediate value is (val ror shift) */
242 return (val >> shift) | (val << (32 - shift));
243 }
244
245 static void
246 print_ldr_str_offset(ins, stream)
247 unsigned long ins;
248 FILE *stream;
249 {
250 if ((ins & (1<<25)) == 0)
251 fprintf (stream, "#%d",
252 (ins & 0xfff) * ((ins & (1<<23)) ? 1 : -1));
253 else {
254 fprintf (stream, "%s%s", reg_names[ins & 0xf],
255 (ins & (1<<23)) ? "" : "-");
256 if (ins & 0xff0)
257 fprintf (stream, ", %s #%d",
258 shift_names[(ins >> 5) & 3],
259 (ins >> 7) & 0x1f);
260 }
261 }
262
263 static void
264 print_ldc_stc_offset(ins, stream)
265 unsigned long ins;
266 FILE *stream;
267 {
268 fprintf (stream, "#%d",
269 4 * (ins & 0xff) * ((ins & (1<<23)) ? 1 : -1));
270 }