1 /* Common target dependent code for GDB on ARM systems.
2 Copyright 1988, 1989, 1991, 1992, 1993, 1995, 1996, 1998, 1999, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #include <ctype.h> /* XXX for isupper () */
30 #include "gdb_string.h"
31 #include "dis-asm.h" /* For register styles. */
35 #include "arch-utils.h"
36 #include "solib-svr4.h"
40 #include "gdb/sim-arm.h"
43 #include "coff/internal.h"
46 #include "gdb_assert.h"
50 /* Each OS has a different mechanism for accessing the various
51 registers stored in the sigcontext structure.
53 SIGCONTEXT_REGISTER_ADDRESS should be defined to the name (or
54 function pointer) which may be used to determine the addresses
55 of the various saved registers in the sigcontext structure.
57 For the ARM target, there are three parameters to this function.
58 The first is the pc value of the frame under consideration, the
59 second the stack pointer of this frame, and the last is the
60 register number to fetch.
62 If the tm.h file does not define this macro, then it's assumed that
63 no mechanism is needed and we define SIGCONTEXT_REGISTER_ADDRESS to
66 When it comes time to multi-arching this code, see the identically
67 named machinery in ia64-tdep.c for an example of how it could be
68 done. It should not be necessary to modify the code below where
69 this macro is used. */
71 #ifdef SIGCONTEXT_REGISTER_ADDRESS
72 #ifndef SIGCONTEXT_REGISTER_ADDRESS_P
73 #define SIGCONTEXT_REGISTER_ADDRESS_P() 1
76 #define SIGCONTEXT_REGISTER_ADDRESS(SP,PC,REG) 0
77 #define SIGCONTEXT_REGISTER_ADDRESS_P() 0
80 /* Macros for setting and testing a bit in a minimal symbol that marks
81 it as Thumb function. The MSB of the minimal symbol's "info" field
82 is used for this purpose. This field is already being used to store
83 the symbol size, so the assumption is that the symbol size cannot
86 MSYMBOL_SET_SPECIAL Actually sets the "special" bit.
87 MSYMBOL_IS_SPECIAL Tests the "special" bit in a minimal symbol.
88 MSYMBOL_SIZE Returns the size of the minimal symbol,
89 i.e. the "info" field with the "special" bit
92 #define MSYMBOL_SET_SPECIAL(msym) \
93 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
96 #define MSYMBOL_IS_SPECIAL(msym) \
97 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
99 #define MSYMBOL_SIZE(msym) \
100 ((long) MSYMBOL_INFO (msym) & 0x7fffffff)
102 /* The list of available "set arm ..." and "show arm ..." commands. */
103 static struct cmd_list_element
*setarmcmdlist
= NULL
;
104 static struct cmd_list_element
*showarmcmdlist
= NULL
;
106 /* The type of floating-point to use. Keep this in sync with enum
107 arm_float_model, and the help string in _initialize_arm_tdep. */
108 static const char *fp_model_strings
[] =
117 /* A variable that can be configured by the user. */
118 static enum arm_float_model arm_fp_model
= ARM_FLOAT_AUTO
;
119 static const char *current_fp_model
= "auto";
121 /* Number of different reg name sets (options). */
122 static int num_disassembly_options
;
124 /* We have more registers than the disassembler as gdb can print the value
125 of special registers as well.
126 The general register names are overwritten by whatever is being used by
127 the disassembler at the moment. We also adjust the case of cpsr and fps. */
129 /* Initial value: Register names used in ARM's ISA documentation. */
130 static char * arm_register_name_strings
[] =
131 {"r0", "r1", "r2", "r3", /* 0 1 2 3 */
132 "r4", "r5", "r6", "r7", /* 4 5 6 7 */
133 "r8", "r9", "r10", "r11", /* 8 9 10 11 */
134 "r12", "sp", "lr", "pc", /* 12 13 14 15 */
135 "f0", "f1", "f2", "f3", /* 16 17 18 19 */
136 "f4", "f5", "f6", "f7", /* 20 21 22 23 */
137 "fps", "cpsr" }; /* 24 25 */
138 static char **arm_register_names
= arm_register_name_strings
;
140 /* Valid register name styles. */
141 static const char **valid_disassembly_styles
;
143 /* Disassembly style to use. Default to "std" register names. */
144 static const char *disassembly_style
;
145 /* Index to that option in the opcodes table. */
146 static int current_option
;
148 /* This is used to keep the bfd arch_info in sync with the disassembly
150 static void set_disassembly_style_sfunc(char *, int,
151 struct cmd_list_element
*);
152 static void set_disassembly_style (void);
154 static void convert_from_extended (const struct floatformat
*, const void *,
156 static void convert_to_extended (const struct floatformat
*, void *,
159 /* Define other aspects of the stack frame. We keep the offsets of
160 all saved registers, 'cause we need 'em a lot! We also keep the
161 current size of the stack frame, and the offset of the frame
162 pointer from the stack pointer (for frameless functions, and when
163 we're still in the prologue of a function with a frame). */
165 struct frame_extra_info
172 /* Addresses for calling Thumb functions have the bit 0 set.
173 Here are some macros to test, set, or clear bit 0 of addresses. */
174 #define IS_THUMB_ADDR(addr) ((addr) & 1)
175 #define MAKE_THUMB_ADDR(addr) ((addr) | 1)
176 #define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
179 arm_frame_chain_valid (CORE_ADDR chain
, struct frame_info
*thisframe
)
181 return (DEPRECATED_FRAME_SAVED_PC (thisframe
) >= LOWEST_PC
);
184 /* Set to true if the 32-bit mode is in use. */
188 /* Flag set by arm_fix_call_dummy that tells whether the target
189 function is a Thumb function. This flag is checked by
190 arm_push_arguments. FIXME: Change the PUSH_ARGUMENTS macro (and
191 its use in valops.c) to pass the function address as an additional
194 static int target_is_thumb
;
196 /* Flag set by arm_fix_call_dummy that tells whether the calling
197 function is a Thumb function. This flag is checked by
198 arm_pc_is_thumb and arm_call_dummy_breakpoint_offset. */
200 static int caller_is_thumb
;
202 /* Determine if the program counter specified in MEMADDR is in a Thumb
206 arm_pc_is_thumb (CORE_ADDR memaddr
)
208 struct minimal_symbol
*sym
;
210 /* If bit 0 of the address is set, assume this is a Thumb address. */
211 if (IS_THUMB_ADDR (memaddr
))
214 /* Thumb functions have a "special" bit set in minimal symbols. */
215 sym
= lookup_minimal_symbol_by_pc (memaddr
);
218 return (MSYMBOL_IS_SPECIAL (sym
));
226 /* Determine if the program counter specified in MEMADDR is in a call
227 dummy being called from a Thumb function. */
230 arm_pc_is_thumb_dummy (CORE_ADDR memaddr
)
232 CORE_ADDR sp
= read_sp ();
234 /* FIXME: Until we switch for the new call dummy macros, this heuristic
235 is the best we can do. We are trying to determine if the pc is on
236 the stack, which (hopefully) will only happen in a call dummy.
237 We hope the current stack pointer is not so far alway from the dummy
238 frame location (true if we have not pushed large data structures or
239 gone too many levels deep) and that our 1024 is not enough to consider
240 code regions as part of the stack (true for most practical purposes). */
241 if (DEPRECATED_PC_IN_CALL_DUMMY (memaddr
, sp
, sp
+ 1024))
242 return caller_is_thumb
;
247 /* Remove useless bits from addresses in a running program. */
249 arm_addr_bits_remove (CORE_ADDR val
)
252 return (val
& (arm_pc_is_thumb (val
) ? 0xfffffffe : 0xfffffffc));
254 return (val
& 0x03fffffc);
257 /* When reading symbols, we need to zap the low bit of the address,
258 which may be set to 1 for Thumb functions. */
260 arm_smash_text_address (CORE_ADDR val
)
265 /* Immediately after a function call, return the saved pc. Can't
266 always go through the frames for this because on some machines the
267 new frame is not set up until the new function executes some
271 arm_saved_pc_after_call (struct frame_info
*frame
)
273 return ADDR_BITS_REMOVE (read_register (ARM_LR_REGNUM
));
276 /* Determine whether the function invocation represented by FI has a
277 frame on the stack associated with it. If it does return zero,
278 otherwise return 1. */
281 arm_frameless_function_invocation (struct frame_info
*fi
)
283 CORE_ADDR func_start
, after_prologue
;
286 /* Sometimes we have functions that do a little setup (like saving the
287 vN registers with the stmdb instruction, but DO NOT set up a frame.
288 The symbol table will report this as a prologue. However, it is
289 important not to try to parse these partial frames as frames, or we
290 will get really confused.
292 So I will demand 3 instructions between the start & end of the
293 prologue before I call it a real prologue, i.e. at least
298 func_start
= (get_frame_func (fi
) + FUNCTION_START_OFFSET
);
299 after_prologue
= SKIP_PROLOGUE (func_start
);
301 /* There are some frameless functions whose first two instructions
302 follow the standard APCS form, in which case after_prologue will
303 be func_start + 8. */
305 frameless
= (after_prologue
< func_start
+ 12);
309 /* The address of the arguments in the frame. */
311 arm_frame_args_address (struct frame_info
*fi
)
313 return get_frame_base (fi
);
316 /* The address of the local variables in the frame. */
318 arm_frame_locals_address (struct frame_info
*fi
)
320 return get_frame_base (fi
);
323 /* The number of arguments being passed in the frame. */
325 arm_frame_num_args (struct frame_info
*fi
)
327 /* We have no way of knowing. */
331 /* A typical Thumb prologue looks like this:
335 Sometimes the latter instruction may be replaced by:
343 or, on tpcs, like this:
350 There is always one instruction of three classes:
355 When we have found at least one of each class we are done with the prolog.
356 Note that the "sub sp, #NN" before the push does not count.
360 thumb_skip_prologue (CORE_ADDR pc
, CORE_ADDR func_end
)
362 CORE_ADDR current_pc
;
364 bit 0 - push { rlist }
365 bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
366 bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
370 for (current_pc
= pc
;
371 current_pc
+ 2 < func_end
&& current_pc
< pc
+ 40;
374 unsigned short insn
= read_memory_unsigned_integer (current_pc
, 2);
376 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
378 findmask
|= 1; /* push found */
380 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm OR
383 if ((findmask
& 1) == 0) /* before push ? */
386 findmask
|= 4; /* add/sub sp found */
388 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
390 findmask
|= 2; /* setting of r7 found */
392 else if (insn
== 0x466f) /* mov r7, sp */
394 findmask
|= 2; /* setting of r7 found */
396 else if (findmask
== (4+2+1))
398 /* We have found one of each type of prologue instruction */
402 /* Something in the prolog that we don't care about or some
403 instruction from outside the prolog scheduled here for
411 /* Advance the PC across any function entry prologue instructions to
412 reach some "real" code.
414 The APCS (ARM Procedure Call Standard) defines the following
418 [stmfd sp!, {a1,a2,a3,a4}]
419 stmfd sp!, {...,fp,ip,lr,pc}
420 [stfe f7, [sp, #-12]!]
421 [stfe f6, [sp, #-12]!]
422 [stfe f5, [sp, #-12]!]
423 [stfe f4, [sp, #-12]!]
424 sub fp, ip, #nn @@ nn == 20 or 4 depending on second insn */
427 arm_skip_prologue (CORE_ADDR pc
)
431 CORE_ADDR func_addr
, func_end
= 0;
433 struct symtab_and_line sal
;
435 /* If we're in a dummy frame, don't even try to skip the prologue. */
436 if (DEPRECATED_PC_IN_CALL_DUMMY (pc
, 0, 0))
439 /* See what the symbol table says. */
441 if (find_pc_partial_function (pc
, &func_name
, &func_addr
, &func_end
))
445 /* Found a function. */
446 sym
= lookup_symbol (func_name
, NULL
, VAR_DOMAIN
, NULL
, NULL
);
447 if (sym
&& SYMBOL_LANGUAGE (sym
) != language_asm
)
449 /* Don't use this trick for assembly source files. */
450 sal
= find_pc_line (func_addr
, 0);
451 if ((sal
.line
!= 0) && (sal
.end
< func_end
))
456 /* Check if this is Thumb code. */
457 if (arm_pc_is_thumb (pc
))
458 return thumb_skip_prologue (pc
, func_end
);
460 /* Can't find the prologue end in the symbol table, try it the hard way
461 by disassembling the instructions. */
463 /* Like arm_scan_prologue, stop no later than pc + 64. */
464 if (func_end
== 0 || func_end
> pc
+ 64)
467 for (skip_pc
= pc
; skip_pc
< func_end
; skip_pc
+= 4)
469 inst
= read_memory_integer (skip_pc
, 4);
471 /* "mov ip, sp" is no longer a required part of the prologue. */
472 if (inst
== 0xe1a0c00d) /* mov ip, sp */
475 /* Some prologues begin with "str lr, [sp, #-4]!". */
476 if (inst
== 0xe52de004) /* str lr, [sp, #-4]! */
479 if ((inst
& 0xfffffff0) == 0xe92d0000) /* stmfd sp!,{a1,a2,a3,a4} */
482 if ((inst
& 0xfffff800) == 0xe92dd800) /* stmfd sp!,{fp,ip,lr,pc} */
485 /* Any insns after this point may float into the code, if it makes
486 for better instruction scheduling, so we skip them only if we
487 find them, but still consider the function to be frame-ful. */
489 /* We may have either one sfmfd instruction here, or several stfe
490 insns, depending on the version of floating point code we
492 if ((inst
& 0xffbf0fff) == 0xec2d0200) /* sfmfd fn, <cnt>, [sp]! */
495 if ((inst
& 0xffff8fff) == 0xed6d0103) /* stfe fn, [sp, #-12]! */
498 if ((inst
& 0xfffff000) == 0xe24cb000) /* sub fp, ip, #nn */
501 if ((inst
& 0xfffff000) == 0xe24dd000) /* sub sp, sp, #nn */
504 if ((inst
& 0xffffc000) == 0xe54b0000 || /* strb r(0123),[r11,#-nn] */
505 (inst
& 0xffffc0f0) == 0xe14b00b0 || /* strh r(0123),[r11,#-nn] */
506 (inst
& 0xffffc000) == 0xe50b0000) /* str r(0123),[r11,#-nn] */
509 if ((inst
& 0xffffc000) == 0xe5cd0000 || /* strb r(0123),[sp,#nn] */
510 (inst
& 0xffffc0f0) == 0xe1cd00b0 || /* strh r(0123),[sp,#nn] */
511 (inst
& 0xffffc000) == 0xe58d0000) /* str r(0123),[sp,#nn] */
514 /* Un-recognized instruction; stop scanning. */
518 return skip_pc
; /* End of prologue */
522 /* Function: thumb_scan_prologue (helper function for arm_scan_prologue)
523 This function decodes a Thumb function prologue to determine:
524 1) the size of the stack frame
525 2) which registers are saved on it
526 3) the offsets of saved regs
527 4) the offset from the stack pointer to the frame pointer
528 This information is stored in the "extra" fields of the frame_info.
530 A typical Thumb function prologue would create this stack frame
531 (offsets relative to FP)
532 old SP -> 24 stack parameters
535 R7 -> 0 local variables (16 bytes)
536 SP -> -12 additional stack space (12 bytes)
537 The frame size would thus be 36 bytes, and the frame offset would be
538 12 bytes. The frame register is R7.
540 The comments for thumb_skip_prolog() describe the algorithm we use
541 to detect the end of the prolog. */
545 thumb_scan_prologue (struct frame_info
*fi
)
547 CORE_ADDR prologue_start
;
548 CORE_ADDR prologue_end
;
549 CORE_ADDR current_pc
;
550 /* Which register has been copied to register n? */
553 bit 0 - push { rlist }
554 bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
555 bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
560 /* Don't try to scan dummy frames. */
562 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
565 if (find_pc_partial_function (get_frame_pc (fi
), NULL
, &prologue_start
, &prologue_end
))
567 struct symtab_and_line sal
= find_pc_line (prologue_start
, 0);
569 if (sal
.line
== 0) /* no line info, use current PC */
570 prologue_end
= get_frame_pc (fi
);
571 else if (sal
.end
< prologue_end
) /* next line begins after fn end */
572 prologue_end
= sal
.end
; /* (probably means no prologue) */
575 /* We're in the boondocks: allow for
576 16 pushes, an add, and "mv fp,sp". */
577 prologue_end
= prologue_start
+ 40;
579 prologue_end
= min (prologue_end
, get_frame_pc (fi
));
581 /* Initialize the saved register map. When register H is copied to
582 register L, we will put H in saved_reg[L]. */
583 for (i
= 0; i
< 16; i
++)
586 /* Search the prologue looking for instructions that set up the
587 frame pointer, adjust the stack pointer, and save registers.
588 Do this until all basic prolog instructions are found. */
590 get_frame_extra_info (fi
)->framesize
= 0;
591 for (current_pc
= prologue_start
;
592 (current_pc
< prologue_end
) && ((findmask
& 7) != 7);
599 insn
= read_memory_unsigned_integer (current_pc
, 2);
601 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
604 findmask
|= 1; /* push found */
605 /* Bits 0-7 contain a mask for registers R0-R7. Bit 8 says
606 whether to save LR (R14). */
607 mask
= (insn
& 0xff) | ((insn
& 0x100) << 6);
609 /* Calculate offsets of saved R0-R7 and LR. */
610 for (regno
= ARM_LR_REGNUM
; regno
>= 0; regno
--)
611 if (mask
& (1 << regno
))
613 get_frame_extra_info (fi
)->framesize
+= 4;
614 get_frame_saved_regs (fi
)[saved_reg
[regno
]] =
615 -(get_frame_extra_info (fi
)->framesize
);
616 /* Reset saved register map. */
617 saved_reg
[regno
] = regno
;
620 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm OR
623 if ((findmask
& 1) == 0) /* before push? */
626 findmask
|= 4; /* add/sub sp found */
628 offset
= (insn
& 0x7f) << 2; /* get scaled offset */
629 if (insn
& 0x80) /* is it signed? (==subtracting) */
631 get_frame_extra_info (fi
)->frameoffset
+= offset
;
634 get_frame_extra_info (fi
)->framesize
-= offset
;
636 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
638 findmask
|= 2; /* setting of r7 found */
639 get_frame_extra_info (fi
)->framereg
= THUMB_FP_REGNUM
;
640 /* get scaled offset */
641 get_frame_extra_info (fi
)->frameoffset
= (insn
& 0xff) << 2;
643 else if (insn
== 0x466f) /* mov r7, sp */
645 findmask
|= 2; /* setting of r7 found */
646 get_frame_extra_info (fi
)->framereg
= THUMB_FP_REGNUM
;
647 get_frame_extra_info (fi
)->frameoffset
= 0;
648 saved_reg
[THUMB_FP_REGNUM
] = ARM_SP_REGNUM
;
650 else if ((insn
& 0xffc0) == 0x4640) /* mov r0-r7, r8-r15 */
652 int lo_reg
= insn
& 7; /* dest. register (r0-r7) */
653 int hi_reg
= ((insn
>> 3) & 7) + 8; /* source register (r8-15) */
654 saved_reg
[lo_reg
] = hi_reg
; /* remember hi reg was saved */
657 /* Something in the prolog that we don't care about or some
658 instruction from outside the prolog scheduled here for
664 /* This function decodes an ARM function prologue to determine:
665 1) the size of the stack frame
666 2) which registers are saved on it
667 3) the offsets of saved regs
668 4) the offset from the stack pointer to the frame pointer
669 This information is stored in the "extra" fields of the frame_info.
671 There are two basic forms for the ARM prologue. The fixed argument
672 function call will look like:
675 stmfd sp!, {fp, ip, lr, pc}
679 Which would create this stack frame (offsets relative to FP):
680 IP -> 4 (caller's stack)
681 FP -> 0 PC (points to address of stmfd instruction + 8 in callee)
682 -4 LR (return address in caller)
683 -8 IP (copy of caller's SP)
685 SP -> -28 Local variables
687 The frame size would thus be 32 bytes, and the frame offset would be
688 28 bytes. The stmfd call can also save any of the vN registers it
689 plans to use, which increases the frame size accordingly.
691 Note: The stored PC is 8 off of the STMFD instruction that stored it
692 because the ARM Store instructions always store PC + 8 when you read
695 A variable argument function call will look like:
698 stmfd sp!, {a1, a2, a3, a4}
699 stmfd sp!, {fp, ip, lr, pc}
702 Which would create this stack frame (offsets relative to FP):
703 IP -> 20 (caller's stack)
708 FP -> 0 PC (points to address of stmfd instruction + 8 in callee)
709 -4 LR (return address in caller)
710 -8 IP (copy of caller's SP)
712 SP -> -28 Local variables
714 The frame size would thus be 48 bytes, and the frame offset would be
717 There is another potential complication, which is that the optimizer
718 will try to separate the store of fp in the "stmfd" instruction from
719 the "sub fp, ip, #NN" instruction. Almost anything can be there, so
720 we just key on the stmfd, and then scan for the "sub fp, ip, #NN"...
722 Also, note, the original version of the ARM toolchain claimed that there
725 instruction at the end of the prologue. I have never seen GCC produce
726 this, and the ARM docs don't mention it. We still test for it below in
732 arm_scan_prologue (struct frame_info
*fi
)
734 int regno
, sp_offset
, fp_offset
;
735 LONGEST return_value
;
736 CORE_ADDR prologue_start
, prologue_end
, current_pc
;
738 /* Assume there is no frame until proven otherwise. */
739 get_frame_extra_info (fi
)->framereg
= ARM_SP_REGNUM
;
740 get_frame_extra_info (fi
)->framesize
= 0;
741 get_frame_extra_info (fi
)->frameoffset
= 0;
743 /* Check for Thumb prologue. */
744 if (arm_pc_is_thumb (get_frame_pc (fi
)))
746 thumb_scan_prologue (fi
);
750 /* Find the function prologue. If we can't find the function in
751 the symbol table, peek in the stack frame to find the PC. */
752 if (find_pc_partial_function (get_frame_pc (fi
), NULL
, &prologue_start
, &prologue_end
))
754 /* One way to find the end of the prologue (which works well
755 for unoptimized code) is to do the following:
757 struct symtab_and_line sal = find_pc_line (prologue_start, 0);
760 prologue_end = get_frame_pc (fi);
761 else if (sal.end < prologue_end)
762 prologue_end = sal.end;
764 This mechanism is very accurate so long as the optimizer
765 doesn't move any instructions from the function body into the
766 prologue. If this happens, sal.end will be the last
767 instruction in the first hunk of prologue code just before
768 the first instruction that the scheduler has moved from
769 the body to the prologue.
771 In order to make sure that we scan all of the prologue
772 instructions, we use a slightly less accurate mechanism which
773 may scan more than necessary. To help compensate for this
774 lack of accuracy, the prologue scanning loop below contains
775 several clauses which'll cause the loop to terminate early if
776 an implausible prologue instruction is encountered.
782 is a suitable endpoint since it accounts for the largest
783 possible prologue plus up to five instructions inserted by
786 if (prologue_end
> prologue_start
+ 64)
788 prologue_end
= prologue_start
+ 64; /* See above. */
793 /* Get address of the stmfd in the prologue of the callee;
794 the saved PC is the address of the stmfd + 8. */
795 if (!safe_read_memory_integer (get_frame_base (fi
), 4, &return_value
))
799 prologue_start
= ADDR_BITS_REMOVE (return_value
) - 8;
800 prologue_end
= prologue_start
+ 64; /* See above. */
804 /* Now search the prologue looking for instructions that set up the
805 frame pointer, adjust the stack pointer, and save registers.
807 Be careful, however, and if it doesn't look like a prologue,
808 don't try to scan it. If, for instance, a frameless function
809 begins with stmfd sp!, then we will tell ourselves there is
810 a frame, which will confuse stack traceback, as well as "finish"
811 and other operations that rely on a knowledge of the stack
814 In the APCS, the prologue should start with "mov ip, sp" so
815 if we don't see this as the first insn, we will stop.
817 [Note: This doesn't seem to be true any longer, so it's now an
818 optional part of the prologue. - Kevin Buettner, 2001-11-20]
820 [Note further: The "mov ip,sp" only seems to be missing in
821 frameless functions at optimization level "-O2" or above,
822 in which case it is often (but not always) replaced by
823 "str lr, [sp, #-4]!". - Michael Snyder, 2002-04-23] */
825 sp_offset
= fp_offset
= 0;
827 for (current_pc
= prologue_start
;
828 current_pc
< prologue_end
;
831 unsigned int insn
= read_memory_unsigned_integer (current_pc
, 4);
833 if (insn
== 0xe1a0c00d) /* mov ip, sp */
837 else if (insn
== 0xe52de004) /* str lr, [sp, #-4]! */
839 /* Function is frameless: extra_info defaults OK? */
842 else if ((insn
& 0xffff0000) == 0xe92d0000)
843 /* stmfd sp!, {..., fp, ip, lr, pc}
845 stmfd sp!, {a1, a2, a3, a4} */
847 int mask
= insn
& 0xffff;
849 /* Calculate offsets of saved registers. */
850 for (regno
= ARM_PC_REGNUM
; regno
>= 0; regno
--)
851 if (mask
& (1 << regno
))
854 get_frame_saved_regs (fi
)[regno
] = sp_offset
;
857 else if ((insn
& 0xffffc000) == 0xe54b0000 || /* strb rx,[r11,#-n] */
858 (insn
& 0xffffc0f0) == 0xe14b00b0 || /* strh rx,[r11,#-n] */
859 (insn
& 0xffffc000) == 0xe50b0000) /* str rx,[r11,#-n] */
861 /* No need to add this to saved_regs -- it's just an arg reg. */
864 else if ((insn
& 0xffffc000) == 0xe5cd0000 || /* strb rx,[sp,#n] */
865 (insn
& 0xffffc0f0) == 0xe1cd00b0 || /* strh rx,[sp,#n] */
866 (insn
& 0xffffc000) == 0xe58d0000) /* str rx,[sp,#n] */
868 /* No need to add this to saved_regs -- it's just an arg reg. */
871 else if ((insn
& 0xfffff000) == 0xe24cb000) /* sub fp, ip #n */
873 unsigned imm
= insn
& 0xff; /* immediate value */
874 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
875 imm
= (imm
>> rot
) | (imm
<< (32 - rot
));
877 get_frame_extra_info (fi
)->framereg
= ARM_FP_REGNUM
;
879 else if ((insn
& 0xfffff000) == 0xe24dd000) /* sub sp, sp #n */
881 unsigned imm
= insn
& 0xff; /* immediate value */
882 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
883 imm
= (imm
>> rot
) | (imm
<< (32 - rot
));
886 else if ((insn
& 0xffff7fff) == 0xed6d0103) /* stfe f?, [sp, -#c]! */
889 regno
= ARM_F0_REGNUM
+ ((insn
>> 12) & 0x07);
890 get_frame_saved_regs (fi
)[regno
] = sp_offset
;
892 else if ((insn
& 0xffbf0fff) == 0xec2d0200) /* sfmfd f0, 4, [sp!] */
895 unsigned int fp_start_reg
, fp_bound_reg
;
897 if ((insn
& 0x800) == 0x800) /* N0 is set */
899 if ((insn
& 0x40000) == 0x40000) /* N1 is set */
906 if ((insn
& 0x40000) == 0x40000) /* N1 is set */
912 fp_start_reg
= ARM_F0_REGNUM
+ ((insn
>> 12) & 0x7);
913 fp_bound_reg
= fp_start_reg
+ n_saved_fp_regs
;
914 for (; fp_start_reg
< fp_bound_reg
; fp_start_reg
++)
917 get_frame_saved_regs (fi
)[fp_start_reg
++] = sp_offset
;
920 else if ((insn
& 0xf0000000) != 0xe0000000)
921 break; /* Condition not true, exit early */
922 else if ((insn
& 0xfe200000) == 0xe8200000) /* ldm? */
923 break; /* Don't scan past a block load */
925 /* The optimizer might shove anything into the prologue,
926 so we just skip what we don't recognize. */
930 /* The frame size is just the negative of the offset (from the
931 original SP) of the last thing thing we pushed on the stack.
932 The frame offset is [new FP] - [new SP]. */
933 get_frame_extra_info (fi
)->framesize
= -sp_offset
;
934 if (get_frame_extra_info (fi
)->framereg
== ARM_FP_REGNUM
)
935 get_frame_extra_info (fi
)->frameoffset
= fp_offset
- sp_offset
;
937 get_frame_extra_info (fi
)->frameoffset
= 0;
940 /* Find REGNUM on the stack. Otherwise, it's in an active register.
941 One thing we might want to do here is to check REGNUM against the
942 clobber mask, and somehow flag it as invalid if it isn't saved on
943 the stack somewhere. This would provide a graceful failure mode
944 when trying to get the value of caller-saves registers for an inner
948 arm_find_callers_reg (struct frame_info
*fi
, int regnum
)
950 /* NOTE: cagney/2002-05-03: This function really shouldn't be
951 needed. Instead the (still being written) register unwind
952 function could be called directly. */
953 for (; fi
; fi
= get_next_frame (fi
))
955 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
957 return deprecated_read_register_dummy (get_frame_pc (fi
),
958 get_frame_base (fi
), regnum
);
960 else if (get_frame_saved_regs (fi
)[regnum
] != 0)
962 /* NOTE: cagney/2002-05-03: This would normally need to
963 handle ARM_SP_REGNUM as a special case as, according to
964 the frame.h comments, saved_regs[SP_REGNUM] contains the
965 SP value not its address. It appears that the ARM isn't
966 doing this though. */
967 return read_memory_integer (get_frame_saved_regs (fi
)[regnum
],
968 REGISTER_RAW_SIZE (regnum
));
971 return read_register (regnum
);
973 /* Function: frame_chain Given a GDB frame, determine the address of
974 the calling function's frame. This will be used to create a new
975 GDB frame struct, and then DEPRECATED_INIT_EXTRA_FRAME_INFO and
976 DEPRECATED_INIT_FRAME_PC will be called for the new frame. For
977 ARM, we save the frame size when we initialize the frame_info. */
980 arm_frame_chain (struct frame_info
*fi
)
983 int framereg
= get_frame_extra_info (fi
)->framereg
;
985 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
986 /* A generic call dummy's frame is the same as caller's. */
987 return get_frame_base (fi
);
989 if (get_frame_pc (fi
) < LOWEST_PC
)
992 /* If the caller is the startup code, we're at the end of the chain. */
993 caller_pc
= DEPRECATED_FRAME_SAVED_PC (fi
);
995 /* If the caller is Thumb and the caller is ARM, or vice versa,
996 the frame register of the caller is different from ours.
997 So we must scan the prologue of the caller to determine its
998 frame register number. */
999 /* XXX Fixme, we should try to do this without creating a temporary
1001 if (arm_pc_is_thumb (caller_pc
) != arm_pc_is_thumb (get_frame_pc (fi
)))
1003 struct cleanup
*old_chain
= make_cleanup (null_cleanup
, NULL
);
1004 struct frame_info
*caller_fi
=
1005 deprecated_frame_xmalloc_with_cleanup (SIZEOF_FRAME_SAVED_REGS
,
1006 sizeof (struct frame_extra_info
));
1008 /* Now, scan the prologue and obtain the frame register. */
1009 deprecated_update_frame_pc_hack (caller_fi
, caller_pc
);
1010 arm_scan_prologue (caller_fi
);
1011 framereg
= get_frame_extra_info (caller_fi
)->framereg
;
1013 /* Deallocate the storage associated with the temporary frame
1015 do_cleanups (old_chain
);
1018 /* If the caller used a frame register, return its value.
1019 Otherwise, return the caller's stack pointer. */
1020 if (framereg
== ARM_FP_REGNUM
|| framereg
== THUMB_FP_REGNUM
)
1021 return arm_find_callers_reg (fi
, framereg
);
1023 return get_frame_base (fi
) + get_frame_extra_info (fi
)->framesize
;
1026 /* This function actually figures out the frame address for a given pc
1027 and sp. This is tricky because we sometimes don't use an explicit
1028 frame pointer, and the previous stack pointer isn't necessarily
1029 recorded on the stack. The only reliable way to get this info is
1030 to examine the prologue. FROMLEAF is a little confusing, it means
1031 this is the next frame up the chain AFTER a frameless function. If
1032 this is true, then the frame value for this frame is still in the
1036 arm_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1041 if (get_frame_saved_regs (fi
) == NULL
)
1042 frame_saved_regs_zalloc (fi
);
1044 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
1046 get_frame_extra_info (fi
)->framesize
= 0;
1047 get_frame_extra_info (fi
)->frameoffset
= 0;
1048 get_frame_extra_info (fi
)->framereg
= 0;
1050 if (get_next_frame (fi
))
1051 deprecated_update_frame_pc_hack (fi
, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi
)));
1053 memset (get_frame_saved_regs (fi
), '\000', sizeof get_frame_saved_regs (fi
));
1055 /* Compute stack pointer for this frame. We use this value for both
1056 the sigtramp and call dummy cases. */
1057 if (!get_next_frame (fi
))
1059 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1060 /* For generic dummy frames, pull the value direct from the frame.
1061 Having an unwind function to do this would be nice. */
1062 sp
= deprecated_read_register_dummy (get_frame_pc (get_next_frame (fi
)),
1063 get_frame_base (get_next_frame (fi
)),
1066 sp
= (get_frame_base (get_next_frame (fi
))
1067 - get_frame_extra_info (get_next_frame (fi
))->frameoffset
1068 + get_frame_extra_info (get_next_frame (fi
))->framesize
);
1070 /* Determine whether or not we're in a sigtramp frame.
1071 Unfortunately, it isn't sufficient to test (get_frame_type (fi)
1072 == SIGTRAMP_FRAME) because this value is sometimes set after
1073 invoking DEPRECATED_INIT_EXTRA_FRAME_INFO. So we test *both*
1074 (get_frame_type (fi) == SIGTRAMP_FRAME) and PC_IN_SIGTRAMP to
1075 determine if we need to use the sigcontext addresses for the
1078 Note: If an ARM PC_IN_SIGTRAMP method ever needs to compare
1079 against the name of the function, the code below will have to be
1080 changed to first fetch the name of the function and then pass
1081 this name to PC_IN_SIGTRAMP. */
1083 /* FIXME: cagney/2002-11-18: This problem will go away once
1084 frame.c:get_prev_frame() is modified to set the frame's type
1085 before calling functions like this. */
1087 if (SIGCONTEXT_REGISTER_ADDRESS_P ()
1088 && ((get_frame_type (fi
) == SIGTRAMP_FRAME
) || PC_IN_SIGTRAMP (get_frame_pc (fi
), (char *)0)))
1090 for (reg
= 0; reg
< NUM_REGS
; reg
++)
1091 get_frame_saved_regs (fi
)[reg
] = SIGCONTEXT_REGISTER_ADDRESS (sp
, get_frame_pc (fi
), reg
);
1093 /* FIXME: What about thumb mode? */
1094 get_frame_extra_info (fi
)->framereg
= ARM_SP_REGNUM
;
1095 deprecated_update_frame_base_hack (fi
, read_memory_integer (get_frame_saved_regs (fi
)[get_frame_extra_info (fi
)->framereg
], REGISTER_RAW_SIZE (get_frame_extra_info (fi
)->framereg
)));
1096 get_frame_extra_info (fi
)->framesize
= 0;
1097 get_frame_extra_info (fi
)->frameoffset
= 0;
1102 arm_scan_prologue (fi
);
1104 if (!get_next_frame (fi
))
1105 /* This is the innermost frame? */
1106 deprecated_update_frame_base_hack (fi
, read_register (get_frame_extra_info (fi
)->framereg
));
1107 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1108 /* Next inner most frame is a dummy, just grab its frame.
1109 Dummy frames always have the same FP as their caller. */
1110 deprecated_update_frame_base_hack (fi
, get_frame_base (get_next_frame (fi
)));
1111 else if (get_frame_extra_info (fi
)->framereg
== ARM_FP_REGNUM
1112 || get_frame_extra_info (fi
)->framereg
== THUMB_FP_REGNUM
)
1114 /* not the innermost frame */
1115 /* If we have an FP, the callee saved it. */
1116 if (get_frame_saved_regs (get_next_frame (fi
))[get_frame_extra_info (fi
)->framereg
] != 0)
1117 deprecated_update_frame_base_hack (fi
, read_memory_integer (get_frame_saved_regs (get_next_frame (fi
))[get_frame_extra_info (fi
)->framereg
], 4));
1119 /* If we were called by a frameless fn. then our frame is
1120 still in the frame pointer register on the board... */
1121 deprecated_update_frame_base_hack (fi
, deprecated_read_fp ());
1124 /* Calculate actual addresses of saved registers using offsets
1125 determined by arm_scan_prologue. */
1126 for (reg
= 0; reg
< NUM_REGS
; reg
++)
1127 if (get_frame_saved_regs (fi
)[reg
] != 0)
1128 get_frame_saved_regs (fi
)[reg
]
1129 += (get_frame_base (fi
)
1130 + get_frame_extra_info (fi
)->framesize
1131 - get_frame_extra_info (fi
)->frameoffset
);
1136 /* Find the caller of this frame. We do this by seeing if ARM_LR_REGNUM
1137 is saved in the stack anywhere, otherwise we get it from the
1140 The old definition of this function was a macro:
1141 #define FRAME_SAVED_PC(FRAME) \
1142 ADDR_BITS_REMOVE (read_memory_integer ((FRAME)->frame - 4, 4)) */
1145 arm_frame_saved_pc (struct frame_info
*fi
)
1147 /* If a dummy frame, pull the PC out of the frame's register buffer. */
1148 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
1149 return deprecated_read_register_dummy (get_frame_pc (fi
),
1150 get_frame_base (fi
), ARM_PC_REGNUM
);
1152 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1153 (get_frame_base (fi
)
1154 - get_frame_extra_info (fi
)->frameoffset
),
1155 get_frame_base (fi
)))
1157 return read_memory_integer (get_frame_saved_regs (fi
)[ARM_PC_REGNUM
],
1158 REGISTER_RAW_SIZE (ARM_PC_REGNUM
));
1162 CORE_ADDR pc
= arm_find_callers_reg (fi
, ARM_LR_REGNUM
);
1163 return IS_THUMB_ADDR (pc
) ? UNMAKE_THUMB_ADDR (pc
) : pc
;
1167 /* Return the frame address. On ARM, it is R11; on Thumb it is R7.
1168 Examine the Program Status Register to decide which state we're in. */
1173 if (read_register (ARM_PS_REGNUM
) & 0x20) /* Bit 5 is Thumb state bit */
1174 return read_register (THUMB_FP_REGNUM
); /* R7 if Thumb */
1176 return read_register (ARM_FP_REGNUM
); /* R11 if ARM */
1179 /* Store into a struct frame_saved_regs the addresses of the saved
1180 registers of frame described by FRAME_INFO. This includes special
1181 registers such as PC and FP saved in special ways in the stack
1182 frame. SP is even more special: the address we return for it IS
1183 the sp for the next frame. */
1186 arm_frame_init_saved_regs (struct frame_info
*fip
)
1189 if (get_frame_saved_regs (fip
))
1192 arm_init_extra_frame_info (0, fip
);
1195 /* Set the return address for a generic dummy frame. ARM uses the
1199 arm_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1201 write_register (ARM_LR_REGNUM
, CALL_DUMMY_ADDRESS ());
1205 /* Push an empty stack frame, to record the current PC, etc. */
1208 arm_push_dummy_frame (void)
1210 CORE_ADDR old_sp
= read_register (ARM_SP_REGNUM
);
1211 CORE_ADDR sp
= old_sp
;
1212 CORE_ADDR fp
, prologue_start
;
1215 /* Push the two dummy prologue instructions in reverse order,
1216 so that they'll be in the correct low-to-high order in memory. */
1217 /* sub fp, ip, #4 */
1218 sp
= push_word (sp
, 0xe24cb004);
1219 /* stmdb sp!, {r0-r10, fp, ip, lr, pc} */
1220 prologue_start
= sp
= push_word (sp
, 0xe92ddfff);
1222 /* Push a pointer to the dummy prologue + 12, because when stm
1223 instruction stores the PC, it stores the address of the stm
1224 instruction itself plus 12. */
1225 fp
= sp
= push_word (sp
, prologue_start
+ 12);
1227 /* Push the processor status. */
1228 sp
= push_word (sp
, read_register (ARM_PS_REGNUM
));
1230 /* Push all 16 registers starting with r15. */
1231 for (regnum
= ARM_PC_REGNUM
; regnum
>= 0; regnum
--)
1232 sp
= push_word (sp
, read_register (regnum
));
1234 /* Update fp (for both Thumb and ARM) and sp. */
1235 write_register (ARM_FP_REGNUM
, fp
);
1236 write_register (THUMB_FP_REGNUM
, fp
);
1237 write_register (ARM_SP_REGNUM
, sp
);
1240 /* DEPRECATED_CALL_DUMMY_WORDS:
1241 This sequence of words is the instructions
1247 Note this is 12 bytes. */
1249 static LONGEST arm_call_dummy_words
[] =
1251 0xe1a0e00f, 0xe1a0f004, 0xe7ffdefe
1254 /* Adjust the call_dummy_breakpoint_offset for the bp_call_dummy
1255 breakpoint to the proper address in the call dummy, so that
1256 `finish' after a stop in a call dummy works.
1258 FIXME rearnsha 2002-02018: Tweeking current_gdbarch is not an
1259 optimal solution, but the call to arm_fix_call_dummy is immediately
1260 followed by a call to call_function_by_hand, which is the only
1261 function where call_dummy_breakpoint_offset is actually used. */
1265 arm_set_call_dummy_breakpoint_offset (void)
1267 if (caller_is_thumb
)
1268 set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch
, 4);
1270 set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch
, 8);
1273 /* Fix up the call dummy, based on whether the processor is currently
1274 in Thumb or ARM mode, and whether the target function is Thumb or
1275 ARM. There are three different situations requiring three
1278 * ARM calling ARM: uses the call dummy in tm-arm.h, which has already
1279 been copied into the dummy parameter to this function.
1280 * ARM calling Thumb: uses the call dummy in tm-arm.h, but with the
1281 "mov pc,r4" instruction patched to be a "bx r4" instead.
1282 * Thumb calling anything: uses the Thumb dummy defined below, which
1283 works for calling both ARM and Thumb functions.
1285 All three call dummies expect to receive the target function
1286 address in R4, with the low bit set if it's a Thumb function. */
1289 arm_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
, int nargs
,
1290 struct value
**args
, struct type
*type
, int gcc_p
)
1292 static short thumb_dummy
[4] =
1294 0xf000, 0xf801, /* bl label */
1295 0xdf18, /* swi 24 */
1296 0x4720, /* label: bx r4 */
1298 static unsigned long arm_bx_r4
= 0xe12fff14; /* bx r4 instruction */
1300 /* Set flag indicating whether the current PC is in a Thumb function. */
1301 caller_is_thumb
= arm_pc_is_thumb (read_pc ());
1302 arm_set_call_dummy_breakpoint_offset ();
1304 /* If the target function is Thumb, set the low bit of the function
1305 address. And if the CPU is currently in ARM mode, patch the
1306 second instruction of call dummy to use a BX instruction to
1307 switch to Thumb mode. */
1308 target_is_thumb
= arm_pc_is_thumb (fun
);
1309 if (target_is_thumb
)
1312 if (!caller_is_thumb
)
1313 store_unsigned_integer (dummy
+ 4, sizeof (arm_bx_r4
), arm_bx_r4
);
1316 /* If the CPU is currently in Thumb mode, use the Thumb call dummy
1317 instead of the ARM one that's already been copied. This will
1318 work for both Thumb and ARM target functions. */
1319 if (caller_is_thumb
)
1323 int len
= sizeof (thumb_dummy
) / sizeof (thumb_dummy
[0]);
1325 for (i
= 0; i
< len
; i
++)
1327 store_unsigned_integer (p
, sizeof (thumb_dummy
[0]), thumb_dummy
[i
]);
1328 p
+= sizeof (thumb_dummy
[0]);
1332 /* Put the target address in r4; the call dummy will copy this to
1334 write_register (4, fun
);
1337 /* Pop the current frame. So long as the frame info has been
1338 initialized properly (see arm_init_extra_frame_info), this code
1339 works for dummy frames as well as regular frames. I.e, there's no
1340 need to have a special case for dummy frames. */
1342 arm_pop_frame (void)
1345 struct frame_info
*frame
= get_current_frame ();
1346 CORE_ADDR old_SP
= (get_frame_base (frame
)
1347 - get_frame_extra_info (frame
)->frameoffset
1348 + get_frame_extra_info (frame
)->framesize
);
1350 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
1351 get_frame_base (frame
),
1352 get_frame_base (frame
)))
1354 generic_pop_dummy_frame ();
1355 flush_cached_frames ();
1359 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
1360 if (get_frame_saved_regs (frame
)[regnum
] != 0)
1361 write_register (regnum
,
1362 read_memory_integer (get_frame_saved_regs (frame
)[regnum
],
1363 REGISTER_RAW_SIZE (regnum
)));
1365 write_register (ARM_PC_REGNUM
, DEPRECATED_FRAME_SAVED_PC (frame
));
1366 write_register (ARM_SP_REGNUM
, old_SP
);
1368 flush_cached_frames ();
1371 /* When arguments must be pushed onto the stack, they go on in reverse
1372 order. The code below implements a FILO (stack) to do this. */
1377 struct stack_item
*prev
;
1381 static struct stack_item
*
1382 push_stack_item (struct stack_item
*prev
, void *contents
, int len
)
1384 struct stack_item
*si
;
1385 si
= xmalloc (sizeof (struct stack_item
));
1386 si
->data
= xmalloc (len
);
1389 memcpy (si
->data
, contents
, len
);
1393 static struct stack_item
*
1394 pop_stack_item (struct stack_item
*si
)
1396 struct stack_item
*dead
= si
;
1403 /* We currently only support passing parameters in integer registers. This
1404 conforms with GCC's default model. Several other variants exist and
1405 we should probably support some of them based on the selected ABI. */
1408 arm_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1409 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1410 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1411 CORE_ADDR struct_addr
)
1416 struct stack_item
*si
= NULL
;
1418 /* Set the return address. For the ARM, the return breakpoint is
1419 always at BP_ADDR. */
1420 /* XXX Fix for Thumb. */
1421 regcache_cooked_write_unsigned (regcache
, ARM_LR_REGNUM
, bp_addr
);
1423 /* Walk through the list of args and determine how large a temporary
1424 stack is required. Need to take care here as structs may be
1425 passed on the stack, and we have to to push them. */
1428 argreg
= ARM_A1_REGNUM
;
1431 /* Some platforms require a double-word aligned stack. Make sure sp
1432 is correctly aligned before we start. We always do this even if
1433 it isn't really needed -- it can never hurt things. */
1434 sp
&= ~(CORE_ADDR
)(2 * DEPRECATED_REGISTER_SIZE
- 1);
1436 /* The struct_return pointer occupies the first parameter
1437 passing register. */
1441 fprintf_unfiltered (gdb_stdlog
, "struct return in %s = 0x%s\n",
1442 REGISTER_NAME (argreg
), paddr (struct_addr
));
1443 regcache_cooked_write_unsigned (regcache
, argreg
, struct_addr
);
1447 for (argnum
= 0; argnum
< nargs
; argnum
++)
1450 struct type
*arg_type
;
1451 struct type
*target_type
;
1452 enum type_code typecode
;
1455 arg_type
= check_typedef (VALUE_TYPE (args
[argnum
]));
1456 len
= TYPE_LENGTH (arg_type
);
1457 target_type
= TYPE_TARGET_TYPE (arg_type
);
1458 typecode
= TYPE_CODE (arg_type
);
1459 val
= VALUE_CONTENTS (args
[argnum
]);
1461 /* If the argument is a pointer to a function, and it is a
1462 Thumb function, create a LOCAL copy of the value and set
1463 the THUMB bit in it. */
1464 if (TYPE_CODE_PTR
== typecode
1465 && target_type
!= NULL
1466 && TYPE_CODE_FUNC
== TYPE_CODE (target_type
))
1468 CORE_ADDR regval
= extract_address (val
, len
);
1469 if (arm_pc_is_thumb (regval
))
1472 store_unsigned_integer (val
, len
, MAKE_THUMB_ADDR (regval
));
1476 /* Copy the argument to general registers or the stack in
1477 register-sized pieces. Large arguments are split between
1478 registers and stack. */
1481 int partial_len
= len
< DEPRECATED_REGISTER_SIZE
? len
: DEPRECATED_REGISTER_SIZE
;
1483 if (argreg
<= ARM_LAST_ARG_REGNUM
)
1485 /* The argument is being passed in a general purpose
1487 CORE_ADDR regval
= extract_address (val
, partial_len
);
1489 fprintf_unfiltered (gdb_stdlog
, "arg %d in %s = 0x%s\n",
1490 argnum
, REGISTER_NAME (argreg
),
1491 phex (regval
, DEPRECATED_REGISTER_SIZE
));
1492 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
1497 /* Push the arguments onto the stack. */
1499 fprintf_unfiltered (gdb_stdlog
, "arg %d @ sp + %d\n",
1501 si
= push_stack_item (si
, val
, DEPRECATED_REGISTER_SIZE
);
1502 nstack
+= DEPRECATED_REGISTER_SIZE
;
1509 /* If we have an odd number of words to push, then decrement the stack
1510 by one word now, so first stack argument will be dword aligned. */
1517 write_memory (sp
, si
->data
, si
->len
);
1518 si
= pop_stack_item (si
);
1521 /* Finally, update teh SP register. */
1522 regcache_cooked_write_unsigned (regcache
, ARM_SP_REGNUM
, sp
);
1528 print_fpu_flags (int flags
)
1530 if (flags
& (1 << 0))
1531 fputs ("IVO ", stdout
);
1532 if (flags
& (1 << 1))
1533 fputs ("DVZ ", stdout
);
1534 if (flags
& (1 << 2))
1535 fputs ("OFL ", stdout
);
1536 if (flags
& (1 << 3))
1537 fputs ("UFL ", stdout
);
1538 if (flags
& (1 << 4))
1539 fputs ("INX ", stdout
);
1543 /* Print interesting information about the floating point processor
1544 (if present) or emulator. */
1546 arm_print_float_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
1547 struct frame_info
*frame
, const char *args
)
1549 register unsigned long status
= read_register (ARM_FPS_REGNUM
);
1552 type
= (status
>> 24) & 127;
1553 printf ("%s FPU type %d\n",
1554 (status
& (1 << 31)) ? "Hardware" : "Software",
1556 fputs ("mask: ", stdout
);
1557 print_fpu_flags (status
>> 16);
1558 fputs ("flags: ", stdout
);
1559 print_fpu_flags (status
);
1562 /* Return the GDB type object for the "standard" data type of data in
1565 static struct type
*
1566 arm_register_type (int regnum
)
1568 if (regnum
>= ARM_F0_REGNUM
&& regnum
< ARM_F0_REGNUM
+ NUM_FREGS
)
1570 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1571 return builtin_type_arm_ext_big
;
1573 return builtin_type_arm_ext_littlebyte_bigword
;
1576 return builtin_type_int32
;
1579 /* Index within `registers' of the first byte of the space for
1583 arm_register_byte (int regnum
)
1585 if (regnum
< ARM_F0_REGNUM
)
1586 return regnum
* INT_REGISTER_RAW_SIZE
;
1587 else if (regnum
< ARM_PS_REGNUM
)
1588 return (NUM_GREGS
* INT_REGISTER_RAW_SIZE
1589 + (regnum
- ARM_F0_REGNUM
) * FP_REGISTER_RAW_SIZE
);
1591 return (NUM_GREGS
* INT_REGISTER_RAW_SIZE
1592 + NUM_FREGS
* FP_REGISTER_RAW_SIZE
1593 + (regnum
- ARM_FPS_REGNUM
) * STATUS_REGISTER_SIZE
);
1596 /* Number of bytes of storage in the actual machine representation for
1597 register N. All registers are 4 bytes, except fp0 - fp7, which are
1598 12 bytes in length. */
1601 arm_register_raw_size (int regnum
)
1603 if (regnum
< ARM_F0_REGNUM
)
1604 return INT_REGISTER_RAW_SIZE
;
1605 else if (regnum
< ARM_FPS_REGNUM
)
1606 return FP_REGISTER_RAW_SIZE
;
1608 return STATUS_REGISTER_SIZE
;
1611 /* Number of bytes of storage in a program's representation
1614 arm_register_virtual_size (int regnum
)
1616 if (regnum
< ARM_F0_REGNUM
)
1617 return INT_REGISTER_VIRTUAL_SIZE
;
1618 else if (regnum
< ARM_FPS_REGNUM
)
1619 return FP_REGISTER_VIRTUAL_SIZE
;
1621 return STATUS_REGISTER_SIZE
;
1624 /* Map GDB internal REGNUM onto the Arm simulator register numbers. */
1626 arm_register_sim_regno (int regnum
)
1629 gdb_assert (reg
>= 0 && reg
< NUM_REGS
);
1631 if (reg
< NUM_GREGS
)
1632 return SIM_ARM_R0_REGNUM
+ reg
;
1635 if (reg
< NUM_FREGS
)
1636 return SIM_ARM_FP0_REGNUM
+ reg
;
1639 if (reg
< NUM_SREGS
)
1640 return SIM_ARM_FPS_REGNUM
+ reg
;
1643 internal_error (__FILE__
, __LINE__
, "Bad REGNUM %d", regnum
);
1646 /* NOTE: cagney/2001-08-20: Both convert_from_extended() and
1647 convert_to_extended() use floatformat_arm_ext_littlebyte_bigword.
1648 It is thought that this is is the floating-point register format on
1649 little-endian systems. */
1652 convert_from_extended (const struct floatformat
*fmt
, const void *ptr
,
1656 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1657 floatformat_to_doublest (&floatformat_arm_ext_big
, ptr
, &d
);
1659 floatformat_to_doublest (&floatformat_arm_ext_littlebyte_bigword
,
1661 floatformat_from_doublest (fmt
, &d
, dbl
);
1665 convert_to_extended (const struct floatformat
*fmt
, void *dbl
, const void *ptr
)
1668 floatformat_to_doublest (fmt
, ptr
, &d
);
1669 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1670 floatformat_from_doublest (&floatformat_arm_ext_big
, &d
, dbl
);
1672 floatformat_from_doublest (&floatformat_arm_ext_littlebyte_bigword
,
1677 condition_true (unsigned long cond
, unsigned long status_reg
)
1679 if (cond
== INST_AL
|| cond
== INST_NV
)
1685 return ((status_reg
& FLAG_Z
) != 0);
1687 return ((status_reg
& FLAG_Z
) == 0);
1689 return ((status_reg
& FLAG_C
) != 0);
1691 return ((status_reg
& FLAG_C
) == 0);
1693 return ((status_reg
& FLAG_N
) != 0);
1695 return ((status_reg
& FLAG_N
) == 0);
1697 return ((status_reg
& FLAG_V
) != 0);
1699 return ((status_reg
& FLAG_V
) == 0);
1701 return ((status_reg
& (FLAG_C
| FLAG_Z
)) == FLAG_C
);
1703 return ((status_reg
& (FLAG_C
| FLAG_Z
)) != FLAG_C
);
1705 return (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0));
1707 return (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0));
1709 return (((status_reg
& FLAG_Z
) == 0) &&
1710 (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0)));
1712 return (((status_reg
& FLAG_Z
) != 0) ||
1713 (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0)));
1718 /* Support routines for single stepping. Calculate the next PC value. */
1719 #define submask(x) ((1L << ((x) + 1)) - 1)
1720 #define bit(obj,st) (((obj) >> (st)) & 1)
1721 #define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st)))
1722 #define sbits(obj,st,fn) \
1723 ((long) (bits(obj,st,fn) | ((long) bit(obj,fn) * ~ submask (fn - st))))
1724 #define BranchDest(addr,instr) \
1725 ((CORE_ADDR) (((long) (addr)) + 8 + (sbits (instr, 0, 23) << 2)))
1728 static unsigned long
1729 shifted_reg_val (unsigned long inst
, int carry
, unsigned long pc_val
,
1730 unsigned long status_reg
)
1732 unsigned long res
, shift
;
1733 int rm
= bits (inst
, 0, 3);
1734 unsigned long shifttype
= bits (inst
, 5, 6);
1738 int rs
= bits (inst
, 8, 11);
1739 shift
= (rs
== 15 ? pc_val
+ 8 : read_register (rs
)) & 0xFF;
1742 shift
= bits (inst
, 7, 11);
1745 ? ((pc_val
| (ARM_PC_32
? 0 : status_reg
))
1746 + (bit (inst
, 4) ? 12 : 8))
1747 : read_register (rm
));
1752 res
= shift
>= 32 ? 0 : res
<< shift
;
1756 res
= shift
>= 32 ? 0 : res
>> shift
;
1762 res
= ((res
& 0x80000000L
)
1763 ? ~((~res
) >> shift
) : res
>> shift
);
1766 case 3: /* ROR/RRX */
1769 res
= (res
>> 1) | (carry
? 0x80000000L
: 0);
1771 res
= (res
>> shift
) | (res
<< (32 - shift
));
1775 return res
& 0xffffffff;
1778 /* Return number of 1-bits in VAL. */
1781 bitcount (unsigned long val
)
1784 for (nbits
= 0; val
!= 0; nbits
++)
1785 val
&= val
- 1; /* delete rightmost 1-bit in val */
1790 thumb_get_next_pc (CORE_ADDR pc
)
1792 unsigned long pc_val
= ((unsigned long) pc
) + 4; /* PC after prefetch */
1793 unsigned short inst1
= read_memory_integer (pc
, 2);
1794 CORE_ADDR nextpc
= pc
+ 2; /* default is next instruction */
1795 unsigned long offset
;
1797 if ((inst1
& 0xff00) == 0xbd00) /* pop {rlist, pc} */
1801 /* Fetch the saved PC from the stack. It's stored above
1802 all of the other registers. */
1803 offset
= bitcount (bits (inst1
, 0, 7)) * DEPRECATED_REGISTER_SIZE
;
1804 sp
= read_register (ARM_SP_REGNUM
);
1805 nextpc
= (CORE_ADDR
) read_memory_integer (sp
+ offset
, 4);
1806 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1808 error ("Infinite loop detected");
1810 else if ((inst1
& 0xf000) == 0xd000) /* conditional branch */
1812 unsigned long status
= read_register (ARM_PS_REGNUM
);
1813 unsigned long cond
= bits (inst1
, 8, 11);
1814 if (cond
!= 0x0f && condition_true (cond
, status
)) /* 0x0f = SWI */
1815 nextpc
= pc_val
+ (sbits (inst1
, 0, 7) << 1);
1817 else if ((inst1
& 0xf800) == 0xe000) /* unconditional branch */
1819 nextpc
= pc_val
+ (sbits (inst1
, 0, 10) << 1);
1821 else if ((inst1
& 0xf800) == 0xf000) /* long branch with link */
1823 unsigned short inst2
= read_memory_integer (pc
+ 2, 2);
1824 offset
= (sbits (inst1
, 0, 10) << 12) + (bits (inst2
, 0, 10) << 1);
1825 nextpc
= pc_val
+ offset
;
1832 arm_get_next_pc (CORE_ADDR pc
)
1834 unsigned long pc_val
;
1835 unsigned long this_instr
;
1836 unsigned long status
;
1839 if (arm_pc_is_thumb (pc
))
1840 return thumb_get_next_pc (pc
);
1842 pc_val
= (unsigned long) pc
;
1843 this_instr
= read_memory_integer (pc
, 4);
1844 status
= read_register (ARM_PS_REGNUM
);
1845 nextpc
= (CORE_ADDR
) (pc_val
+ 4); /* Default case */
1847 if (condition_true (bits (this_instr
, 28, 31), status
))
1849 switch (bits (this_instr
, 24, 27))
1852 case 0x1: /* data processing */
1856 unsigned long operand1
, operand2
, result
= 0;
1860 if (bits (this_instr
, 12, 15) != 15)
1863 if (bits (this_instr
, 22, 25) == 0
1864 && bits (this_instr
, 4, 7) == 9) /* multiply */
1865 error ("Illegal update to pc in instruction");
1867 /* Multiply into PC */
1868 c
= (status
& FLAG_C
) ? 1 : 0;
1869 rn
= bits (this_instr
, 16, 19);
1870 operand1
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1872 if (bit (this_instr
, 25))
1874 unsigned long immval
= bits (this_instr
, 0, 7);
1875 unsigned long rotate
= 2 * bits (this_instr
, 8, 11);
1876 operand2
= ((immval
>> rotate
) | (immval
<< (32 - rotate
)))
1879 else /* operand 2 is a shifted register */
1880 operand2
= shifted_reg_val (this_instr
, c
, pc_val
, status
);
1882 switch (bits (this_instr
, 21, 24))
1885 result
= operand1
& operand2
;
1889 result
= operand1
^ operand2
;
1893 result
= operand1
- operand2
;
1897 result
= operand2
- operand1
;
1901 result
= operand1
+ operand2
;
1905 result
= operand1
+ operand2
+ c
;
1909 result
= operand1
- operand2
+ c
;
1913 result
= operand2
- operand1
+ c
;
1919 case 0xb: /* tst, teq, cmp, cmn */
1920 result
= (unsigned long) nextpc
;
1924 result
= operand1
| operand2
;
1928 /* Always step into a function. */
1933 result
= operand1
& ~operand2
;
1940 nextpc
= (CORE_ADDR
) ADDR_BITS_REMOVE (result
);
1943 error ("Infinite loop detected");
1948 case 0x5: /* data transfer */
1951 if (bit (this_instr
, 20))
1954 if (bits (this_instr
, 12, 15) == 15)
1960 if (bit (this_instr
, 22))
1961 error ("Illegal update to pc in instruction");
1963 /* byte write to PC */
1964 rn
= bits (this_instr
, 16, 19);
1965 base
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1966 if (bit (this_instr
, 24))
1969 int c
= (status
& FLAG_C
) ? 1 : 0;
1970 unsigned long offset
=
1971 (bit (this_instr
, 25)
1972 ? shifted_reg_val (this_instr
, c
, pc_val
, status
)
1973 : bits (this_instr
, 0, 11));
1975 if (bit (this_instr
, 23))
1980 nextpc
= (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) base
,
1983 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1986 error ("Infinite loop detected");
1992 case 0x9: /* block transfer */
1993 if (bit (this_instr
, 20))
1996 if (bit (this_instr
, 15))
2001 if (bit (this_instr
, 23))
2004 unsigned long reglist
= bits (this_instr
, 0, 14);
2005 offset
= bitcount (reglist
) * 4;
2006 if (bit (this_instr
, 24)) /* pre */
2009 else if (bit (this_instr
, 24))
2013 unsigned long rn_val
=
2014 read_register (bits (this_instr
, 16, 19));
2016 (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) (rn_val
2020 nextpc
= ADDR_BITS_REMOVE (nextpc
);
2022 error ("Infinite loop detected");
2027 case 0xb: /* branch & link */
2028 case 0xa: /* branch */
2030 nextpc
= BranchDest (pc
, this_instr
);
2032 nextpc
= ADDR_BITS_REMOVE (nextpc
);
2034 error ("Infinite loop detected");
2040 case 0xe: /* coproc ops */
2045 fprintf_filtered (gdb_stderr
, "Bad bit-field extraction\n");
2053 /* single_step() is called just before we want to resume the inferior,
2054 if we want to single-step it but there is no hardware or kernel
2055 single-step support. We find the target of the coming instruction
2058 single_step() is also called just after the inferior stops. If we
2059 had set up a simulated single-step, we undo our damage. */
2062 arm_software_single_step (enum target_signal sig
, int insert_bpt
)
2064 static int next_pc
; /* State between setting and unsetting. */
2065 static char break_mem
[BREAKPOINT_MAX
]; /* Temporary storage for mem@bpt */
2069 next_pc
= arm_get_next_pc (read_register (ARM_PC_REGNUM
));
2070 target_insert_breakpoint (next_pc
, break_mem
);
2073 target_remove_breakpoint (next_pc
, break_mem
);
2076 #include "bfd-in2.h"
2077 #include "libcoff.h"
2080 gdb_print_insn_arm (bfd_vma memaddr
, disassemble_info
*info
)
2082 if (arm_pc_is_thumb (memaddr
))
2084 static asymbol
*asym
;
2085 static combined_entry_type ce
;
2086 static struct coff_symbol_struct csym
;
2087 static struct bfd fake_bfd
;
2088 static bfd_target fake_target
;
2090 if (csym
.native
== NULL
)
2092 /* Create a fake symbol vector containing a Thumb symbol.
2093 This is solely so that the code in print_insn_little_arm()
2094 and print_insn_big_arm() in opcodes/arm-dis.c will detect
2095 the presence of a Thumb symbol and switch to decoding
2096 Thumb instructions. */
2098 fake_target
.flavour
= bfd_target_coff_flavour
;
2099 fake_bfd
.xvec
= &fake_target
;
2100 ce
.u
.syment
.n_sclass
= C_THUMBEXTFUNC
;
2102 csym
.symbol
.the_bfd
= &fake_bfd
;
2103 csym
.symbol
.name
= "fake";
2104 asym
= (asymbol
*) & csym
;
2107 memaddr
= UNMAKE_THUMB_ADDR (memaddr
);
2108 info
->symbols
= &asym
;
2111 info
->symbols
= NULL
;
2113 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2114 return print_insn_big_arm (memaddr
, info
);
2116 return print_insn_little_arm (memaddr
, info
);
2119 /* The following define instruction sequences that will cause ARM
2120 cpu's to take an undefined instruction trap. These are used to
2121 signal a breakpoint to GDB.
2123 The newer ARMv4T cpu's are capable of operating in ARM or Thumb
2124 modes. A different instruction is required for each mode. The ARM
2125 cpu's can also be big or little endian. Thus four different
2126 instructions are needed to support all cases.
2128 Note: ARMv4 defines several new instructions that will take the
2129 undefined instruction trap. ARM7TDMI is nominally ARMv4T, but does
2130 not in fact add the new instructions. The new undefined
2131 instructions in ARMv4 are all instructions that had no defined
2132 behaviour in earlier chips. There is no guarantee that they will
2133 raise an exception, but may be treated as NOP's. In practice, it
2134 may only safe to rely on instructions matching:
2136 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
2137 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
2138 C C C C 0 1 1 x x x x x x x x x x x x x x x x x x x x 1 x x x x
2140 Even this may only true if the condition predicate is true. The
2141 following use a condition predicate of ALWAYS so it is always TRUE.
2143 There are other ways of forcing a breakpoint. GNU/Linux, RISC iX,
2144 and NetBSD all use a software interrupt rather than an undefined
2145 instruction to force a trap. This can be handled by by the
2146 abi-specific code during establishment of the gdbarch vector. */
2149 /* NOTE rearnsha 2002-02-18: for now we allow a non-multi-arch gdb to
2150 override these definitions. */
2151 #ifndef ARM_LE_BREAKPOINT
2152 #define ARM_LE_BREAKPOINT {0xFE,0xDE,0xFF,0xE7}
2154 #ifndef ARM_BE_BREAKPOINT
2155 #define ARM_BE_BREAKPOINT {0xE7,0xFF,0xDE,0xFE}
2157 #ifndef THUMB_LE_BREAKPOINT
2158 #define THUMB_LE_BREAKPOINT {0xfe,0xdf}
2160 #ifndef THUMB_BE_BREAKPOINT
2161 #define THUMB_BE_BREAKPOINT {0xdf,0xfe}
2164 static const char arm_default_arm_le_breakpoint
[] = ARM_LE_BREAKPOINT
;
2165 static const char arm_default_arm_be_breakpoint
[] = ARM_BE_BREAKPOINT
;
2166 static const char arm_default_thumb_le_breakpoint
[] = THUMB_LE_BREAKPOINT
;
2167 static const char arm_default_thumb_be_breakpoint
[] = THUMB_BE_BREAKPOINT
;
2169 /* Determine the type and size of breakpoint to insert at PCPTR. Uses
2170 the program counter value to determine whether a 16-bit or 32-bit
2171 breakpoint should be used. It returns a pointer to a string of
2172 bytes that encode a breakpoint instruction, stores the length of
2173 the string to *lenptr, and adjusts the program counter (if
2174 necessary) to point to the actual memory location where the
2175 breakpoint should be inserted. */
2177 /* XXX ??? from old tm-arm.h: if we're using RDP, then we're inserting
2178 breakpoints and storing their handles instread of what was in
2179 memory. It is nice that this is the same size as a handle -
2180 otherwise remote-rdp will have to change. */
2182 static const unsigned char *
2183 arm_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
2185 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2187 if (arm_pc_is_thumb (*pcptr
) || arm_pc_is_thumb_dummy (*pcptr
))
2189 *pcptr
= UNMAKE_THUMB_ADDR (*pcptr
);
2190 *lenptr
= tdep
->thumb_breakpoint_size
;
2191 return tdep
->thumb_breakpoint
;
2195 *lenptr
= tdep
->arm_breakpoint_size
;
2196 return tdep
->arm_breakpoint
;
2200 /* Extract from an array REGBUF containing the (raw) register state a
2201 function return value of type TYPE, and copy that, in virtual
2202 format, into VALBUF. */
2205 arm_extract_return_value (struct type
*type
,
2206 struct regcache
*regs
,
2209 bfd_byte
*valbuf
= dst
;
2211 if (TYPE_CODE_FLT
== TYPE_CODE (type
))
2213 switch (arm_get_fp_model (current_gdbarch
))
2217 /* The value is in register F0 in internal format. We need to
2218 extract the raw value and then convert it to the desired
2220 bfd_byte tmpbuf
[FP_REGISTER_RAW_SIZE
];
2222 regcache_cooked_read (regs
, ARM_F0_REGNUM
, tmpbuf
);
2223 convert_from_extended (floatformat_from_type (type
), tmpbuf
,
2228 case ARM_FLOAT_SOFT_FPA
:
2229 case ARM_FLOAT_SOFT_VFP
:
2230 regcache_cooked_read (regs
, ARM_A1_REGNUM
, valbuf
);
2231 if (TYPE_LENGTH (type
) > 4)
2232 regcache_cooked_read (regs
, ARM_A1_REGNUM
+ 1,
2233 valbuf
+ INT_REGISTER_RAW_SIZE
);
2238 (__FILE__
, __LINE__
,
2239 "arm_extract_return_value: Floating point model not supported");
2243 else if (TYPE_CODE (type
) == TYPE_CODE_INT
2244 || TYPE_CODE (type
) == TYPE_CODE_CHAR
2245 || TYPE_CODE (type
) == TYPE_CODE_BOOL
2246 || TYPE_CODE (type
) == TYPE_CODE_PTR
2247 || TYPE_CODE (type
) == TYPE_CODE_REF
2248 || TYPE_CODE (type
) == TYPE_CODE_ENUM
)
2250 /* If the the type is a plain integer, then the access is
2251 straight-forward. Otherwise we have to play around a bit more. */
2252 int len
= TYPE_LENGTH (type
);
2253 int regno
= ARM_A1_REGNUM
;
2258 /* By using store_unsigned_integer we avoid having to do
2259 anything special for small big-endian values. */
2260 regcache_cooked_read_unsigned (regs
, regno
++, &tmp
);
2261 store_unsigned_integer (valbuf
,
2262 (len
> INT_REGISTER_RAW_SIZE
2263 ? INT_REGISTER_RAW_SIZE
: len
),
2265 len
-= INT_REGISTER_RAW_SIZE
;
2266 valbuf
+= INT_REGISTER_RAW_SIZE
;
2271 /* For a structure or union the behaviour is as if the value had
2272 been stored to word-aligned memory and then loaded into
2273 registers with 32-bit load instruction(s). */
2274 int len
= TYPE_LENGTH (type
);
2275 int regno
= ARM_A1_REGNUM
;
2276 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2280 regcache_cooked_read (regs
, regno
++, tmpbuf
);
2281 memcpy (valbuf
, tmpbuf
,
2282 len
> INT_REGISTER_RAW_SIZE
? INT_REGISTER_RAW_SIZE
: len
);
2283 len
-= INT_REGISTER_RAW_SIZE
;
2284 valbuf
+= INT_REGISTER_RAW_SIZE
;
2289 /* Extract from an array REGBUF containing the (raw) register state
2290 the address in which a function should return its structure value. */
2293 arm_extract_struct_value_address (struct regcache
*regcache
)
2297 regcache_cooked_read_unsigned (regcache
, ARM_A1_REGNUM
, &ret
);
2301 /* Will a function return an aggregate type in memory or in a
2302 register? Return 0 if an aggregate type can be returned in a
2303 register, 1 if it must be returned in memory. */
2306 arm_use_struct_convention (int gcc_p
, struct type
*type
)
2309 register enum type_code code
;
2311 /* In the ARM ABI, "integer" like aggregate types are returned in
2312 registers. For an aggregate type to be integer like, its size
2313 must be less than or equal to DEPRECATED_REGISTER_SIZE and the
2314 offset of each addressable subfield must be zero. Note that bit
2315 fields are not addressable, and all addressable subfields of
2316 unions always start at offset zero.
2318 This function is based on the behaviour of GCC 2.95.1.
2319 See: gcc/arm.c: arm_return_in_memory() for details.
2321 Note: All versions of GCC before GCC 2.95.2 do not set up the
2322 parameters correctly for a function returning the following
2323 structure: struct { float f;}; This should be returned in memory,
2324 not a register. Richard Earnshaw sent me a patch, but I do not
2325 know of any way to detect if a function like the above has been
2326 compiled with the correct calling convention. */
2328 /* All aggregate types that won't fit in a register must be returned
2330 if (TYPE_LENGTH (type
) > DEPRECATED_REGISTER_SIZE
)
2335 /* The only aggregate types that can be returned in a register are
2336 structs and unions. Arrays must be returned in memory. */
2337 code
= TYPE_CODE (type
);
2338 if ((TYPE_CODE_STRUCT
!= code
) && (TYPE_CODE_UNION
!= code
))
2343 /* Assume all other aggregate types can be returned in a register.
2344 Run a check for structures, unions and arrays. */
2347 if ((TYPE_CODE_STRUCT
== code
) || (TYPE_CODE_UNION
== code
))
2350 /* Need to check if this struct/union is "integer" like. For
2351 this to be true, its size must be less than or equal to
2352 DEPRECATED_REGISTER_SIZE and the offset of each addressable
2353 subfield must be zero. Note that bit fields are not
2354 addressable, and unions always start at offset zero. If any
2355 of the subfields is a floating point type, the struct/union
2356 cannot be an integer type. */
2358 /* For each field in the object, check:
2359 1) Is it FP? --> yes, nRc = 1;
2360 2) Is it addressable (bitpos != 0) and
2361 not packed (bitsize == 0)?
2365 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
2367 enum type_code field_type_code
;
2368 field_type_code
= TYPE_CODE (TYPE_FIELD_TYPE (type
, i
));
2370 /* Is it a floating point type field? */
2371 if (field_type_code
== TYPE_CODE_FLT
)
2377 /* If bitpos != 0, then we have to care about it. */
2378 if (TYPE_FIELD_BITPOS (type
, i
) != 0)
2380 /* Bitfields are not addressable. If the field bitsize is
2381 zero, then the field is not packed. Hence it cannot be
2382 a bitfield or any other packed type. */
2383 if (TYPE_FIELD_BITSIZE (type
, i
) == 0)
2395 /* Write into appropriate registers a function return value of type
2396 TYPE, given in virtual format. */
2399 arm_store_return_value (struct type
*type
, struct regcache
*regs
,
2402 const bfd_byte
*valbuf
= src
;
2404 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2406 char buf
[ARM_MAX_REGISTER_RAW_SIZE
];
2408 switch (arm_get_fp_model (current_gdbarch
))
2412 convert_to_extended (floatformat_from_type (type
), buf
, valbuf
);
2413 regcache_cooked_write (regs
, ARM_F0_REGNUM
, buf
);
2416 case ARM_FLOAT_SOFT_FPA
:
2417 case ARM_FLOAT_SOFT_VFP
:
2418 regcache_cooked_write (regs
, ARM_A1_REGNUM
, valbuf
);
2419 if (TYPE_LENGTH (type
) > 4)
2420 regcache_cooked_write (regs
, ARM_A1_REGNUM
+ 1,
2421 valbuf
+ INT_REGISTER_RAW_SIZE
);
2426 (__FILE__
, __LINE__
,
2427 "arm_store_return_value: Floating point model not supported");
2431 else if (TYPE_CODE (type
) == TYPE_CODE_INT
2432 || TYPE_CODE (type
) == TYPE_CODE_CHAR
2433 || TYPE_CODE (type
) == TYPE_CODE_BOOL
2434 || TYPE_CODE (type
) == TYPE_CODE_PTR
2435 || TYPE_CODE (type
) == TYPE_CODE_REF
2436 || TYPE_CODE (type
) == TYPE_CODE_ENUM
)
2438 if (TYPE_LENGTH (type
) <= 4)
2440 /* Values of one word or less are zero/sign-extended and
2442 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2443 LONGEST val
= unpack_long (type
, valbuf
);
2445 store_signed_integer (tmpbuf
, INT_REGISTER_RAW_SIZE
, val
);
2446 regcache_cooked_write (regs
, ARM_A1_REGNUM
, tmpbuf
);
2450 /* Integral values greater than one word are stored in consecutive
2451 registers starting with r0. This will always be a multiple of
2452 the regiser size. */
2453 int len
= TYPE_LENGTH (type
);
2454 int regno
= ARM_A1_REGNUM
;
2458 regcache_cooked_write (regs
, regno
++, valbuf
);
2459 len
-= INT_REGISTER_RAW_SIZE
;
2460 valbuf
+= INT_REGISTER_RAW_SIZE
;
2466 /* For a structure or union the behaviour is as if the value had
2467 been stored to word-aligned memory and then loaded into
2468 registers with 32-bit load instruction(s). */
2469 int len
= TYPE_LENGTH (type
);
2470 int regno
= ARM_A1_REGNUM
;
2471 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2475 memcpy (tmpbuf
, valbuf
,
2476 len
> INT_REGISTER_RAW_SIZE
? INT_REGISTER_RAW_SIZE
: len
);
2477 regcache_cooked_write (regs
, regno
++, tmpbuf
);
2478 len
-= INT_REGISTER_RAW_SIZE
;
2479 valbuf
+= INT_REGISTER_RAW_SIZE
;
2485 arm_get_longjmp_target (CORE_ADDR
*pc
)
2488 char buf
[INT_REGISTER_RAW_SIZE
];
2489 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2491 jb_addr
= read_register (ARM_A1_REGNUM
);
2493 if (target_read_memory (jb_addr
+ tdep
->jb_pc
* tdep
->jb_elt_size
, buf
,
2494 INT_REGISTER_RAW_SIZE
))
2497 *pc
= extract_address (buf
, INT_REGISTER_RAW_SIZE
);
2501 /* Return non-zero if the PC is inside a thumb call thunk. */
2504 arm_in_call_stub (CORE_ADDR pc
, char *name
)
2506 CORE_ADDR start_addr
;
2508 /* Find the starting address of the function containing the PC. If
2509 the caller didn't give us a name, look it up at the same time. */
2510 if (0 == find_pc_partial_function (pc
, name
? NULL
: &name
,
2514 return strncmp (name
, "_call_via_r", 11) == 0;
2517 /* If PC is in a Thumb call or return stub, return the address of the
2518 target PC, which is in a register. The thunk functions are called
2519 _called_via_xx, where x is the register name. The possible names
2520 are r0-r9, sl, fp, ip, sp, and lr. */
2523 arm_skip_stub (CORE_ADDR pc
)
2526 CORE_ADDR start_addr
;
2528 /* Find the starting address and name of the function containing the PC. */
2529 if (find_pc_partial_function (pc
, &name
, &start_addr
, NULL
) == 0)
2532 /* Call thunks always start with "_call_via_". */
2533 if (strncmp (name
, "_call_via_", 10) == 0)
2535 /* Use the name suffix to determine which register contains the
2537 static char *table
[15] =
2538 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2539 "r8", "r9", "sl", "fp", "ip", "sp", "lr"
2543 for (regno
= 0; regno
<= 14; regno
++)
2544 if (strcmp (&name
[10], table
[regno
]) == 0)
2545 return read_register (regno
);
2548 return 0; /* not a stub */
2552 set_arm_command (char *args
, int from_tty
)
2554 printf_unfiltered ("\"set arm\" must be followed by an apporpriate subcommand.\n");
2555 help_list (setarmcmdlist
, "set arm ", all_commands
, gdb_stdout
);
2559 show_arm_command (char *args
, int from_tty
)
2561 cmd_show_list (showarmcmdlist
, from_tty
, "");
2564 enum arm_float_model
2565 arm_get_fp_model (struct gdbarch
*gdbarch
)
2567 if (arm_fp_model
== ARM_FLOAT_AUTO
)
2568 return gdbarch_tdep (gdbarch
)->fp_model
;
2570 return arm_fp_model
;
2574 arm_set_fp (struct gdbarch
*gdbarch
)
2576 enum arm_float_model fp_model
= arm_get_fp_model (gdbarch
);
2578 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
2579 && (fp_model
== ARM_FLOAT_SOFT_FPA
|| fp_model
== ARM_FLOAT_FPA
))
2581 set_gdbarch_double_format (gdbarch
,
2582 &floatformat_ieee_double_littlebyte_bigword
);
2583 set_gdbarch_long_double_format
2584 (gdbarch
, &floatformat_ieee_double_littlebyte_bigword
);
2588 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_double_little
);
2589 set_gdbarch_long_double_format (gdbarch
,
2590 &floatformat_ieee_double_little
);
2595 set_fp_model_sfunc (char *args
, int from_tty
,
2596 struct cmd_list_element
*c
)
2598 enum arm_float_model fp_model
;
2600 for (fp_model
= ARM_FLOAT_AUTO
; fp_model
!= ARM_FLOAT_LAST
; fp_model
++)
2601 if (strcmp (current_fp_model
, fp_model_strings
[fp_model
]) == 0)
2603 arm_fp_model
= fp_model
;
2607 if (fp_model
== ARM_FLOAT_LAST
)
2608 internal_error (__FILE__
, __LINE__
, "Invalid fp model accepted: %s.",
2611 if (gdbarch_bfd_arch_info (current_gdbarch
)->arch
== bfd_arch_arm
)
2612 arm_set_fp (current_gdbarch
);
2616 show_fp_model (char *args
, int from_tty
,
2617 struct cmd_list_element
*c
)
2619 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2621 if (arm_fp_model
== ARM_FLOAT_AUTO
2622 && gdbarch_bfd_arch_info (current_gdbarch
)->arch
== bfd_arch_arm
)
2623 printf_filtered (" - the default for the current ABI is \"%s\".\n",
2624 fp_model_strings
[tdep
->fp_model
]);
2627 /* If the user changes the register disassembly style used for info
2628 register and other commands, we have to also switch the style used
2629 in opcodes for disassembly output. This function is run in the "set
2630 arm disassembly" command, and does that. */
2633 set_disassembly_style_sfunc (char *args
, int from_tty
,
2634 struct cmd_list_element
*c
)
2636 set_disassembly_style ();
2639 /* Return the ARM register name corresponding to register I. */
2641 arm_register_name (int i
)
2643 return arm_register_names
[i
];
2647 set_disassembly_style (void)
2649 const char *setname
, *setdesc
, **regnames
;
2652 /* Find the style that the user wants in the opcodes table. */
2654 numregs
= get_arm_regnames (current
, &setname
, &setdesc
, ®names
);
2655 while ((disassembly_style
!= setname
)
2656 && (current
< num_disassembly_options
))
2657 get_arm_regnames (++current
, &setname
, &setdesc
, ®names
);
2658 current_option
= current
;
2660 /* Fill our copy. */
2661 for (j
= 0; j
< numregs
; j
++)
2662 arm_register_names
[j
] = (char *) regnames
[j
];
2665 if (isupper (*regnames
[ARM_PC_REGNUM
]))
2667 arm_register_names
[ARM_FPS_REGNUM
] = "FPS";
2668 arm_register_names
[ARM_PS_REGNUM
] = "CPSR";
2672 arm_register_names
[ARM_FPS_REGNUM
] = "fps";
2673 arm_register_names
[ARM_PS_REGNUM
] = "cpsr";
2676 /* Synchronize the disassembler. */
2677 set_arm_regname_option (current
);
2680 /* arm_othernames implements the "othernames" command. This is deprecated
2681 by the "set arm disassembly" command. */
2684 arm_othernames (char *names
, int n
)
2686 /* Circle through the various flavors. */
2687 current_option
= (current_option
+ 1) % num_disassembly_options
;
2689 disassembly_style
= valid_disassembly_styles
[current_option
];
2690 set_disassembly_style ();
2693 /* Fetch, and possibly build, an appropriate link_map_offsets structure
2694 for ARM linux targets using the struct offsets defined in <link.h>.
2695 Note, however, that link.h is not actually referred to in this file.
2696 Instead, the relevant structs offsets were obtained from examining
2697 link.h. (We can't refer to link.h from this file because the host
2698 system won't necessarily have it, or if it does, the structs which
2699 it defines will refer to the host system, not the target). */
2701 struct link_map_offsets
*
2702 arm_linux_svr4_fetch_link_map_offsets (void)
2704 static struct link_map_offsets lmo
;
2705 static struct link_map_offsets
*lmp
= 0;
2711 lmo
.r_debug_size
= 8; /* Actual size is 20, but this is all we
2714 lmo
.r_map_offset
= 4;
2717 lmo
.link_map_size
= 20; /* Actual size is 552, but this is all we
2720 lmo
.l_addr_offset
= 0;
2721 lmo
.l_addr_size
= 4;
2723 lmo
.l_name_offset
= 4;
2724 lmo
.l_name_size
= 4;
2726 lmo
.l_next_offset
= 12;
2727 lmo
.l_next_size
= 4;
2729 lmo
.l_prev_offset
= 16;
2730 lmo
.l_prev_size
= 4;
2736 /* Test whether the coff symbol specific value corresponds to a Thumb
2740 coff_sym_is_thumb (int val
)
2742 return (val
== C_THUMBEXT
||
2743 val
== C_THUMBSTAT
||
2744 val
== C_THUMBEXTFUNC
||
2745 val
== C_THUMBSTATFUNC
||
2746 val
== C_THUMBLABEL
);
2749 /* arm_coff_make_msymbol_special()
2750 arm_elf_make_msymbol_special()
2752 These functions test whether the COFF or ELF symbol corresponds to
2753 an address in thumb code, and set a "special" bit in a minimal
2754 symbol to indicate that it does. */
2757 arm_elf_make_msymbol_special(asymbol
*sym
, struct minimal_symbol
*msym
)
2759 /* Thumb symbols are of type STT_LOPROC, (synonymous with
2761 if (ELF_ST_TYPE (((elf_symbol_type
*)sym
)->internal_elf_sym
.st_info
)
2763 MSYMBOL_SET_SPECIAL (msym
);
2767 arm_coff_make_msymbol_special(int val
, struct minimal_symbol
*msym
)
2769 if (coff_sym_is_thumb (val
))
2770 MSYMBOL_SET_SPECIAL (msym
);
2774 static enum gdb_osabi
2775 arm_elf_osabi_sniffer (bfd
*abfd
)
2777 unsigned int elfosabi
, eflags
;
2778 enum gdb_osabi osabi
= GDB_OSABI_UNKNOWN
;
2780 elfosabi
= elf_elfheader (abfd
)->e_ident
[EI_OSABI
];
2785 /* When elfosabi is ELFOSABI_NONE (0), then the ELF structures in the
2786 file are conforming to the base specification for that machine
2787 (there are no OS-specific extensions). In order to determine the
2788 real OS in use we must look for OS notes that have been added. */
2789 bfd_map_over_sections (abfd
,
2790 generic_elf_osabi_sniff_abi_tag_sections
,
2792 if (osabi
== GDB_OSABI_UNKNOWN
)
2794 /* Existing ARM tools don't set this field, so look at the EI_FLAGS
2795 field for more information. */
2796 eflags
= EF_ARM_EABI_VERSION(elf_elfheader(abfd
)->e_flags
);
2799 case EF_ARM_EABI_VER1
:
2800 osabi
= GDB_OSABI_ARM_EABI_V1
;
2803 case EF_ARM_EABI_VER2
:
2804 osabi
= GDB_OSABI_ARM_EABI_V2
;
2807 case EF_ARM_EABI_UNKNOWN
:
2808 /* Assume GNU tools. */
2809 osabi
= GDB_OSABI_ARM_APCS
;
2813 internal_error (__FILE__
, __LINE__
,
2814 "arm_elf_osabi_sniffer: Unknown ARM EABI "
2815 "version 0x%x", eflags
);
2821 /* GNU tools use this value. Check note sections in this case,
2823 bfd_map_over_sections (abfd
,
2824 generic_elf_osabi_sniff_abi_tag_sections
,
2826 if (osabi
== GDB_OSABI_UNKNOWN
)
2828 /* Assume APCS ABI. */
2829 osabi
= GDB_OSABI_ARM_APCS
;
2833 case ELFOSABI_FREEBSD
:
2834 osabi
= GDB_OSABI_FREEBSD_ELF
;
2837 case ELFOSABI_NETBSD
:
2838 osabi
= GDB_OSABI_NETBSD_ELF
;
2841 case ELFOSABI_LINUX
:
2842 osabi
= GDB_OSABI_LINUX
;
2850 /* Initialize the current architecture based on INFO. If possible,
2851 re-use an architecture from ARCHES, which is a list of
2852 architectures already created during this debugging session.
2854 Called e.g. at program startup, when reading a core file, and when
2855 reading a binary file. */
2857 static struct gdbarch
*
2858 arm_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2860 struct gdbarch_tdep
*tdep
;
2861 struct gdbarch
*gdbarch
;
2863 /* Try to deterimine the ABI of the object we are loading. */
2865 if (info
.abfd
!= NULL
&& info
.osabi
== GDB_OSABI_UNKNOWN
)
2867 switch (bfd_get_flavour (info
.abfd
))
2869 case bfd_target_aout_flavour
:
2870 /* Assume it's an old APCS-style ABI. */
2871 info
.osabi
= GDB_OSABI_ARM_APCS
;
2874 case bfd_target_coff_flavour
:
2875 /* Assume it's an old APCS-style ABI. */
2877 info
.osabi
= GDB_OSABI_ARM_APCS
;
2881 /* Leave it as "unknown". */
2886 /* If there is already a candidate, use it. */
2887 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2889 return arches
->gdbarch
;
2891 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2892 gdbarch
= gdbarch_alloc (&info
, tdep
);
2894 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2895 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2896 set_gdbarch_deprecated_init_frame_pc (gdbarch
, init_frame_pc_default
);
2898 /* We used to default to FPA for generic ARM, but almost nobody uses that
2899 now, and we now provide a way for the user to force the model. So
2900 default to the most useful variant. */
2901 tdep
->fp_model
= ARM_FLOAT_SOFT_FPA
;
2904 switch (info
.byte_order
)
2906 case BFD_ENDIAN_BIG
:
2907 tdep
->arm_breakpoint
= arm_default_arm_be_breakpoint
;
2908 tdep
->arm_breakpoint_size
= sizeof (arm_default_arm_be_breakpoint
);
2909 tdep
->thumb_breakpoint
= arm_default_thumb_be_breakpoint
;
2910 tdep
->thumb_breakpoint_size
= sizeof (arm_default_thumb_be_breakpoint
);
2914 case BFD_ENDIAN_LITTLE
:
2915 tdep
->arm_breakpoint
= arm_default_arm_le_breakpoint
;
2916 tdep
->arm_breakpoint_size
= sizeof (arm_default_arm_le_breakpoint
);
2917 tdep
->thumb_breakpoint
= arm_default_thumb_le_breakpoint
;
2918 tdep
->thumb_breakpoint_size
= sizeof (arm_default_thumb_le_breakpoint
);
2923 internal_error (__FILE__
, __LINE__
,
2924 "arm_gdbarch_init: bad byte order for float format");
2927 /* On ARM targets char defaults to unsigned. */
2928 set_gdbarch_char_signed (gdbarch
, 0);
2930 /* This should be low enough for everything. */
2931 tdep
->lowest_pc
= 0x20;
2932 tdep
->jb_pc
= -1; /* Longjump support not enabled by default. */
2934 set_gdbarch_deprecated_call_dummy_words (gdbarch
, arm_call_dummy_words
);
2935 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch
, 0);
2937 set_gdbarch_push_dummy_call (gdbarch
, arm_push_dummy_call
);
2939 /* Frame handling. */
2940 set_gdbarch_deprecated_frame_chain_valid (gdbarch
, arm_frame_chain_valid
);
2941 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, arm_init_extra_frame_info
);
2942 set_gdbarch_deprecated_target_read_fp (gdbarch
, arm_read_fp
);
2943 set_gdbarch_deprecated_frame_chain (gdbarch
, arm_frame_chain
);
2944 set_gdbarch_frameless_function_invocation
2945 (gdbarch
, arm_frameless_function_invocation
);
2946 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, arm_frame_saved_pc
);
2947 set_gdbarch_frame_args_address (gdbarch
, arm_frame_args_address
);
2948 set_gdbarch_frame_locals_address (gdbarch
, arm_frame_locals_address
);
2949 set_gdbarch_frame_num_args (gdbarch
, arm_frame_num_args
);
2950 set_gdbarch_frame_args_skip (gdbarch
, 0);
2951 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, arm_frame_init_saved_regs
);
2952 set_gdbarch_deprecated_pop_frame (gdbarch
, arm_pop_frame
);
2954 /* Address manipulation. */
2955 set_gdbarch_smash_text_address (gdbarch
, arm_smash_text_address
);
2956 set_gdbarch_addr_bits_remove (gdbarch
, arm_addr_bits_remove
);
2958 /* Offset from address of function to start of its code. */
2959 set_gdbarch_function_start_offset (gdbarch
, 0);
2961 /* Advance PC across function entry code. */
2962 set_gdbarch_skip_prologue (gdbarch
, arm_skip_prologue
);
2964 /* Get the PC when a frame might not be available. */
2965 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, arm_saved_pc_after_call
);
2967 /* The stack grows downward. */
2968 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2970 /* Breakpoint manipulation. */
2971 set_gdbarch_breakpoint_from_pc (gdbarch
, arm_breakpoint_from_pc
);
2972 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2974 /* Information about registers, etc. */
2975 set_gdbarch_print_float_info (gdbarch
, arm_print_float_info
);
2976 set_gdbarch_deprecated_fp_regnum (gdbarch
, ARM_FP_REGNUM
); /* ??? */
2977 set_gdbarch_sp_regnum (gdbarch
, ARM_SP_REGNUM
);
2978 set_gdbarch_pc_regnum (gdbarch
, ARM_PC_REGNUM
);
2979 set_gdbarch_register_byte (gdbarch
, arm_register_byte
);
2980 set_gdbarch_deprecated_register_bytes (gdbarch
,
2981 (NUM_GREGS
* INT_REGISTER_RAW_SIZE
2982 + NUM_FREGS
* FP_REGISTER_RAW_SIZE
2983 + NUM_SREGS
* STATUS_REGISTER_SIZE
));
2984 set_gdbarch_num_regs (gdbarch
, NUM_GREGS
+ NUM_FREGS
+ NUM_SREGS
);
2985 set_gdbarch_register_raw_size (gdbarch
, arm_register_raw_size
);
2986 set_gdbarch_register_virtual_size (gdbarch
, arm_register_virtual_size
);
2987 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, FP_REGISTER_RAW_SIZE
);
2988 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, FP_REGISTER_VIRTUAL_SIZE
);
2989 set_gdbarch_register_virtual_type (gdbarch
, arm_register_type
);
2991 /* Internal <-> external register number maps. */
2992 set_gdbarch_register_sim_regno (gdbarch
, arm_register_sim_regno
);
2994 /* Integer registers are 4 bytes. */
2995 set_gdbarch_deprecated_register_size (gdbarch
, 4);
2996 set_gdbarch_register_name (gdbarch
, arm_register_name
);
2998 /* Returning results. */
2999 set_gdbarch_extract_return_value (gdbarch
, arm_extract_return_value
);
3000 set_gdbarch_store_return_value (gdbarch
, arm_store_return_value
);
3001 set_gdbarch_use_struct_convention (gdbarch
, arm_use_struct_convention
);
3002 set_gdbarch_extract_struct_value_address (gdbarch
,
3003 arm_extract_struct_value_address
);
3005 /* Single stepping. */
3006 /* XXX For an RDI target we should ask the target if it can single-step. */
3007 set_gdbarch_software_single_step (gdbarch
, arm_software_single_step
);
3010 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_arm
);
3012 /* Minsymbol frobbing. */
3013 set_gdbarch_elf_make_msymbol_special (gdbarch
, arm_elf_make_msymbol_special
);
3014 set_gdbarch_coff_make_msymbol_special (gdbarch
,
3015 arm_coff_make_msymbol_special
);
3017 /* Hook in the ABI-specific overrides, if they have been registered. */
3018 gdbarch_init_osabi (info
, gdbarch
);
3020 /* Now we have tuned the configuration, set a few final things,
3021 based on what the OS ABI has told us. */
3023 if (tdep
->jb_pc
>= 0)
3024 set_gdbarch_get_longjmp_target (gdbarch
, arm_get_longjmp_target
);
3026 /* Floating point sizes and format. */
3027 switch (info
.byte_order
)
3029 case BFD_ENDIAN_BIG
:
3030 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_big
);
3031 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_double_big
);
3032 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
3036 case BFD_ENDIAN_LITTLE
:
3037 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_little
);
3038 arm_set_fp (gdbarch
);
3042 internal_error (__FILE__
, __LINE__
,
3043 "arm_gdbarch_init: bad byte order for float format");
3050 arm_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
3052 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3057 fprintf_unfiltered (file
, "arm_dump_tdep: Lowest pc = 0x%lx",
3058 (unsigned long) tdep
->lowest_pc
);
3062 arm_init_abi_eabi_v1 (struct gdbarch_info info
,
3063 struct gdbarch
*gdbarch
)
3069 arm_init_abi_eabi_v2 (struct gdbarch_info info
,
3070 struct gdbarch
*gdbarch
)
3076 arm_init_abi_apcs (struct gdbarch_info info
,
3077 struct gdbarch
*gdbarch
)
3083 _initialize_arm_tdep (void)
3085 struct ui_file
*stb
;
3087 struct cmd_list_element
*new_set
, *new_show
;
3088 const char *setname
;
3089 const char *setdesc
;
3090 const char **regnames
;
3092 static char *helptext
;
3095 gdbarch_register (bfd_arch_arm
, arm_gdbarch_init
, arm_dump_tdep
);
3097 /* Register an ELF OS ABI sniffer for ARM binaries. */
3098 gdbarch_register_osabi_sniffer (bfd_arch_arm
,
3099 bfd_target_elf_flavour
,
3100 arm_elf_osabi_sniffer
);
3102 /* Register some ABI variants for embedded systems. */
3103 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_EABI_V1
,
3104 arm_init_abi_eabi_v1
);
3105 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_EABI_V2
,
3106 arm_init_abi_eabi_v2
);
3107 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_APCS
,
3110 /* Get the number of possible sets of register names defined in opcodes. */
3111 num_disassembly_options
= get_arm_regname_num_options ();
3113 /* Add root prefix command for all "set arm"/"show arm" commands. */
3114 add_prefix_cmd ("arm", no_class
, set_arm_command
,
3115 "Various ARM-specific commands.",
3116 &setarmcmdlist
, "set arm ", 0, &setlist
);
3118 add_prefix_cmd ("arm", no_class
, show_arm_command
,
3119 "Various ARM-specific commands.",
3120 &showarmcmdlist
, "show arm ", 0, &showlist
);
3122 /* Sync the opcode insn printer with our register viewer. */
3123 parse_arm_disassembler_option ("reg-names-std");
3125 /* Begin creating the help text. */
3126 stb
= mem_fileopen ();
3127 fprintf_unfiltered (stb
, "Set the disassembly style.\n"
3128 "The valid values are:\n");
3130 /* Initialize the array that will be passed to add_set_enum_cmd(). */
3131 valid_disassembly_styles
3132 = xmalloc ((num_disassembly_options
+ 1) * sizeof (char *));
3133 for (i
= 0; i
< num_disassembly_options
; i
++)
3135 numregs
= get_arm_regnames (i
, &setname
, &setdesc
, ®names
);
3136 valid_disassembly_styles
[i
] = setname
;
3137 fprintf_unfiltered (stb
, "%s - %s\n", setname
,
3139 /* Copy the default names (if found) and synchronize disassembler. */
3140 if (!strcmp (setname
, "std"))
3142 disassembly_style
= setname
;
3144 for (j
= 0; j
< numregs
; j
++)
3145 arm_register_names
[j
] = (char *) regnames
[j
];
3146 set_arm_regname_option (i
);
3149 /* Mark the end of valid options. */
3150 valid_disassembly_styles
[num_disassembly_options
] = NULL
;
3152 /* Finish the creation of the help text. */
3153 fprintf_unfiltered (stb
, "The default is \"std\".");
3154 helptext
= ui_file_xstrdup (stb
, &length
);
3155 ui_file_delete (stb
);
3157 /* Add the deprecated disassembly-flavor command. */
3158 new_set
= add_set_enum_cmd ("disassembly-flavor", no_class
,
3159 valid_disassembly_styles
,
3163 set_cmd_sfunc (new_set
, set_disassembly_style_sfunc
);
3164 deprecate_cmd (new_set
, "set arm disassembly");
3165 deprecate_cmd (add_show_from_set (new_set
, &showlist
),
3166 "show arm disassembly");
3168 /* And now add the new interface. */
3169 new_set
= add_set_enum_cmd ("disassembler", no_class
,
3170 valid_disassembly_styles
, &disassembly_style
,
3171 helptext
, &setarmcmdlist
);
3173 set_cmd_sfunc (new_set
, set_disassembly_style_sfunc
);
3174 add_show_from_set (new_set
, &showarmcmdlist
);
3176 add_setshow_cmd_full ("apcs32", no_class
,
3177 var_boolean
, (char *) &arm_apcs_32
,
3178 "Set usage of ARM 32-bit mode.",
3179 "Show usage of ARM 32-bit mode.",
3181 &setlist
, &showlist
, &new_set
, &new_show
);
3182 deprecate_cmd (new_set
, "set arm apcs32");
3183 deprecate_cmd (new_show
, "show arm apcs32");
3185 add_setshow_boolean_cmd ("apcs32", no_class
, &arm_apcs_32
,
3186 "Set usage of ARM 32-bit mode. "
3187 "When off, a 26-bit PC will be used.",
3188 "Show usage of ARM 32-bit mode. "
3189 "When off, a 26-bit PC will be used.",
3191 &setarmcmdlist
, &showarmcmdlist
);
3193 /* Add a command to allow the user to force the FPU model. */
3194 new_set
= add_set_enum_cmd
3195 ("fpu", no_class
, fp_model_strings
, ¤t_fp_model
,
3196 "Set the floating point type.\n"
3197 "auto - Determine the FP typefrom the OS-ABI.\n"
3198 "softfpa - Software FP, mixed-endian doubles on little-endian ARMs.\n"
3199 "fpa - FPA co-processor (GCC compiled).\n"
3200 "softvfp - Software FP with pure-endian doubles.\n"
3201 "vfp - VFP co-processor.",
3203 set_cmd_sfunc (new_set
, set_fp_model_sfunc
);
3204 set_cmd_sfunc (add_show_from_set (new_set
, &showarmcmdlist
), show_fp_model
);
3206 /* Add the deprecated "othernames" command. */
3207 deprecate_cmd (add_com ("othernames", class_obscure
, arm_othernames
,
3208 "Switch to the next set of register names."),
3209 "set arm disassembly");
3211 /* Debugging flag. */
3212 add_setshow_boolean_cmd ("arm", class_maintenance
, &arm_debug
,
3213 "Set ARM debugging. "
3214 "When on, arm-specific debugging is enabled.",
3215 "Show ARM debugging. "
3216 "When on, arm-specific debugging is enabled.",
3218 &setdebuglist
, &showdebuglist
);