gdb/config/m88k/tm-m88k.h

   1 /* Target machine description for generic Motorola 88000, for GDB.
   2    Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993
   3    Free Software Foundation, Inc.
   4
   5 This file is part of GDB.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2 of the License, or
  10 (at your option) any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this program; if not, write to the Free Software
  19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
  20
  21 #include "ieee-float.h"
  22
  23 /* g++ support is not yet included.  */
  24
  25 /* Define the bit, byte, and word ordering of the machine.  */
  26 #define TARGET_BYTE_ORDER BIG_ENDIAN
  27
  28 /* We cache information about saved registers in the frame structure,
  29    to save us from having to re-scan function prologues every time
  30    a register in a non-current frame is accessed.  */
  31
  32 #define EXTRA_FRAME_INFO        \
  33         struct frame_saved_regs *fsr;   \
  34         CORE_ADDR locals_pointer;       \
  35         CORE_ADDR args_pointer;
  36
  37 /* Zero the frame_saved_regs pointer when the frame is initialized,
  38    so that FRAME_FIND_SAVED_REGS () will know to allocate and
  39    initialize a frame_saved_regs struct the first time it is called.
  40    Set the arg_pointer to -1, which is not valid; 0 and other values
  41    indicate real, cached values.  */
  42
  43 #define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
  44         init_extra_frame_info (fromleaf, fi)
  45 extern void init_extra_frame_info ();
  46
  47 #define IEEE_FLOAT
  48
  49 /* Offset from address of function to start of its code.
  50    Zero on most machines.  */
  51
  52 #define FUNCTION_START_OFFSET 0
  53
  54 /* Advance PC across any function entry prologue instructions
  55    to reach some "real" code.  */
  56
  57 #define SKIP_PROLOGUE(frompc)   \
  58         { (frompc) = skip_prologue (frompc); }
  59 extern CORE_ADDR skip_prologue ();
  60
  61 /* The m88k kernel aligns all instructions on 4-byte boundaries.  The
  62    kernel also uses the least significant two bits for its own hocus
  63    pocus.  When gdb receives an address from the kernel, it needs to
  64    preserve those right-most two bits, but gdb also needs to be careful
  65    to realize that those two bits are not really a part of the address
  66    of an instruction.  Shrug.  */
  67
  68 #define ADDR_BITS_REMOVE(addr) ((addr) & ~3)
  69
  70 /* Immediately after a function call, return the saved pc.
  71    Can't always go through the frames for this because on some machines
  72    the new frame is not set up until the new function executes
  73    some instructions.  */
  74
  75 #define SAVED_PC_AFTER_CALL(frame) \
  76   (ADDR_BITS_REMOVE (read_register (SRP_REGNUM)))
  77
  78 /* Stack grows downward.  */
  79
  80 #define INNER_THAN <
  81
  82 /* Sequence of bytes for breakpoint instruction.  */
  83
  84 /* instruction 0xF000D1FF is 'tb0 0,r0,511'
  85    If Bit bit 0 of r0 is clear (always true),
  86    initiate exception processing (trap).
  87  */
  88 #define BREAKPOINT {0xF0, 0x00, 0xD1, 0xFF}
  89
  90 /* Amount PC must be decremented by after a breakpoint.
  91    This is often the number of bytes in BREAKPOINT
  92    but not always.  */
  93
  94 #define DECR_PC_AFTER_BREAK 0
  95
  96 /* Nonzero if instruction at PC is a return instruction.  */
  97 /* 'jmp r1' or 'jmp.n r1' is used to return from a subroutine. */
  98
  99 #define ABOUT_TO_RETURN(pc) (read_memory_integer (pc, 2) == 0xF800)
 100
 101 /* This is taken care of in print_floating [IEEE_FLOAT].  */
 102
 103 #define INVALID_FLOAT(p,len) 0
 104
 105 /* Say how long (ordinary) registers are.  */
 106
 107 #define REGISTER_TYPE long
 108
 109 /* Number of machine registers */
 110
 111 #define GP_REGS (38)
 112 #define FP_REGS (32)
 113 #define NUM_REGS (GP_REGS + FP_REGS)
 114
 115 /* Initializer for an array of names of registers.
 116    There should be NUM_REGS strings in this initializer.  */
 117
 118 #define REGISTER_NAMES {\
 119                           "r0",\
 120                           "r1",\
 121                           "r2",\
 122                           "r3",\
 123                           "r4",\
 124                           "r5",\
 125                           "r6",\
 126                           "r7",\
 127                           "r8",\
 128                           "r9",\
 129                           "r10",\
 130                           "r11",\
 131                           "r12",\
 132                           "r13",\
 133                           "r14",\
 134                           "r15",\
 135                           "r16",\
 136                           "r17",\
 137                           "r18",\
 138                           "r19",\
 139                           "r20",\
 140                           "r21",\
 141                           "r22",\
 142                           "r23",\
 143                           "r24",\
 144                           "r25",\
 145                           "r26",\
 146                           "r27",\
 147                           "r28",\
 148                           "r29",\
 149                           "r30",\
 150                           "r31",\
 151                           "psr",\
 152                           "fpsr",\
 153                           "fpcr",\
 154                           "sxip",\
 155                           "snip",\
 156                           "sfip",\
 157                           "x0",\
 158                           "x1",\
 159                           "x2",\
 160                           "x3",\
 161                           "x4",\
 162                           "x5",\
 163                           "x6",\
 164                           "x7",\
 165                           "x8",\
 166                           "x9",\
 167                           "x10",\
 168                           "x11",\
 169                           "x12",\
 170                           "x13",\
 171                           "x14",\
 172                           "x15",\
 173                           "x16",\
 174                           "x17",\
 175                           "x18",\
 176                           "x19",\
 177                           "x20",\
 178                           "x21",\
 179                           "x22",\
 180                           "x23",\
 181                           "x24",\
 182                           "x25",\
 183                           "x26",\
 184                           "x27",\
 185                           "x28",\
 186                           "x29",\
 187                           "x30",\
 188                           "x31",\
 189                           "vbr",\
 190                           "dmt0",\
 191                           "dmd0",\
 192                           "dma0",\
 193                           "dmt1",\
 194                           "dmd1",\
 195                           "dma1",\
 196                           "dmt2",\
 197                           "dmd2",\
 198                           "dma2",\
 199                           "sr0",\
 200                           "sr1",\
 201                           "sr2",\
 202                           "sr3",\
 203                           "fpecr",\
 204                           "fphs1",\
 205                           "fpls1",\
 206                           "fphs2",\
 207                           "fpls2",\
 208                           "fppt",\
 209                           "fprh",\
 210                           "fprl",\
 211                           "fpit",\
 212                           "fpsr",\
 213                           "fpcr",\
 214                       }
 215
 216
 217 /* Register numbers of various important registers.
 218    Note that some of these values are "real" register numbers,
 219    and correspond to the general registers of the machine,
 220    and some are "phony" register numbers which are too large
 221    to be actual register numbers as far as the user is concerned
 222    but do serve to get the desired values when passed to read_register.  */
 223
 224 #define R0_REGNUM 0             /* Contains the constant zero */
 225 #define SRP_REGNUM 1            /* Contains subroutine return pointer */
 226 #define RV_REGNUM 2             /* Contains simple return values */
 227 #define SRA_REGNUM 12           /* Contains address of struct return values */
 228 #define SP_REGNUM 31            /* Contains address of top of stack */
 229
 230 /* Instruction pointer notes...
 231
 232    On the m88100:
 233
 234    * cr04 = sxip.  On exception, contains the excepting pc (probably).
 235    On rte, is ignored.
 236
 237    * cr05 = snip.  On exception, contains the NPC (next pc).  On rte,
 238    pc is loaded from here.
 239
 240    * cr06 = sfip.  On exception, contains the NNPC (next next pc).  On
 241    rte, the NPC is loaded from here.
 242
 243    * lower two bits of each are flag bits.  Bit 1 is V means address
 244    is valid.  If address is not valid, bit 0 is ignored.  Otherwise,
 245    bit 0 is E and asks for an exception to be taken if this
 246    instruction is executed.
 247
 248    On the m88110:
 249
 250    * cr04 = exip.  On exception, contains the address of the excepting
 251    pc (always).  On rte, pc is loaded from here.  Bit 0, aka the D
 252    bit, is a flag saying that the offending instruction was in a
 253    branch delay slot.  If set, then cr05 contains the NPC.
 254
 255    * cr05 = enip.  On exception, if the instruction pointed to by cr04
 256    was in a delay slot as indicated by the bit 0 of cr04, aka the D
 257    bit, the cr05 contains the NPC.  Otherwise ignored.
 258
 259    * cr06 is invalid  */
 260
 261 #define SXIP_REGNUM 35          /* On m88100, Contains Shadow Execute
 262                                    Instruction Pointer.  */
 263 #define SNIP_REGNUM 36          /* On m88100, Contains Shadow Next
 264                                    Instruction Pointer.  */
 265 #define SFIP_REGNUM 37          /* On m88100, Contains Shadow Fetched
 266                                    Intruction pointer.  */
 267
 268 #define EXIP_REGNUM 35          /* On m88110, Contains Exception
 269                                    Executing Instruction Pointer.  */
 270 #define ENIP_REGNUM 36          /* On m88110, Contains the Exception
 271                                    Next Instruction Pointer.  */
 272
 273 #define PC_REGNUM SXIP_REGNUM   /* Program Counter */
 274 #define NPC_REGNUM SNIP_REGNUM  /* Next Program Counter */
 275 #define NNPC_REGNUM SFIP_REGNUM /* Next Next Program Counter */
 276
 277 #define PSR_REGNUM 32           /* Processor Status Register */
 278 #define FPSR_REGNUM 33          /* Floating Point Status Register */
 279 #define FPCR_REGNUM 34          /* Floating Point Control Register */
 280 #define XFP_REGNUM 38           /* First Extended Float Register */
 281 #define X0_REGNUM XFP_REGNUM    /* Which also contains the constant zero */
 282
 283 /* This is rather a confusing lie.  Our m88k port using a stack pointer value
 284    for the frame address.  Hence, the frame address and the frame pointer are
 285    only indirectly related.  The value of this macro is the register number
 286    fetched by the machine "independent" portions of gdb when they want to know
 287    about a frame address.  Thus, we lie here and claim that FP_REGNUM is
 288    SP_REGNUM.  */
 289 #define FP_REGNUM SP_REGNUM     /* Reg fetched to locate frame when pgm stops */
 290 #define ACTUAL_FP_REGNUM 30
 291
 292 /* PSR status bit definitions.  */
 293
 294 #define PSR_MODE                0x80000000
 295 #define PSR_BYTE_ORDER          0x40000000
 296 #define PSR_SERIAL_MODE         0x20000000
 297 #define PSR_CARRY               0x10000000
 298 #define PSR_SFU_DISABLE         0x000003f0
 299 #define PSR_SFU1_DISABLE        0x00000008
 300 #define PSR_MXM                 0x00000004
 301 #define PSR_IND                 0x00000002
 302 #define PSR_SFRZ                0x00000001
 303
 304
 305
 306 /* The following two comments come from the days prior to the m88110
 307    port.  The m88110 handles the instruction pointers differently.  I
 308    do not know what any m88110 kernels do as the m88110 port I'm
 309    working with is for an embedded system.  rich@cygnus.com
 310    13-sept-93.  */
 311
 312 /* BCS requires that the SXIP_REGNUM (or PC_REGNUM) contain the
 313    address of the next instr to be executed when a breakpoint occurs.
 314    Because the kernel gets the next instr (SNIP_REGNUM), the instr in
 315    SNIP needs to be put back into SFIP, and the instr in SXIP should
 316    be shifted to SNIP */
 317
 318 /* Are you sitting down?  It turns out that the 88K BCS (binary
 319    compatibility standard) folks originally felt that the debugger
 320    should be responsible for backing up the IPs, not the kernel (as is
 321    usually done).  Well, they have reversed their decision, and in
 322    future releases our kernel will be handling the backing up of the
 323    IPs.  So, eventually, we won't need to do the SHIFT_INST_REGS
 324    stuff.  But, for now, since there are 88K systems out there that do
 325    need the debugger to do the IP shifting, and since there will be
 326    systems where the kernel does the shifting, the code is a little
 327    more complex than perhaps it needs to be (we still go inside
 328    SHIFT_INST_REGS, and if the shifting hasn't occurred then gdb goes
 329    ahead and shifts).  */
 330
 331 extern int target_is_m88110;
 332 #define SHIFT_INST_REGS() \
 333 if (!target_is_m88110) \
 334 { \
 335     CORE_ADDR pc = read_register (PC_REGNUM); \
 336     CORE_ADDR npc = read_register (NPC_REGNUM); \
 337     if (pc != npc) \
 338     { \
 339         write_register (NNPC_REGNUM, npc); \
 340         write_register (NPC_REGNUM, pc); \
 341     } \
 342 }
 343
 344     /* Storing the following registers is a no-op. */
 345 #define CANNOT_STORE_REGISTER(regno)    (((regno) == R0_REGNUM) \
 346                                          || ((regno) == X0_REGNUM))
 347
 348   /* Number of bytes of storage in the actual machine representation
 349      for register N.  On the m88k,  the general purpose registers are 4
 350      bytes and the 88110 extended registers are 10 bytes. */
 351
 352 #define REGISTER_RAW_SIZE(N) ((N) < XFP_REGNUM ? 4 : 10)
 353
 354   /* Total amount of space needed to store our copies of the machine's
 355      register state, the array `registers'.  */
 356
 357 #define REGISTER_BYTES ((GP_REGS * REGISTER_RAW_SIZE(0)) \
 358                         + (FP_REGS * REGISTER_RAW_SIZE(XFP_REGNUM)))
 359
 360   /* Index within `registers' of the first byte of the space for
 361      register N.  */
 362
 363 #define REGISTER_BYTE(N) (((N) * REGISTER_RAW_SIZE(0)) \
 364                           + ((N) >= XFP_REGNUM \
 365                              ? (((N) - XFP_REGNUM) \
 366                                 * REGISTER_RAW_SIZE(XFP_REGNUM)) \
 367                              : 0))
 368
 369   /* Number of bytes of storage in the program's representation for
 370      register N.  On the m88k, all registers are 4 bytes excepting the
 371      m88110 extended registers which are 8 byte doubles. */
 372
 373 #define REGISTER_VIRTUAL_SIZE(N) ((N) < XFP_REGNUM ? 4 : 8)
 374
 375   /* Largest value REGISTER_RAW_SIZE can have.  */
 376
 377 #define MAX_REGISTER_RAW_SIZE (REGISTER_RAW_SIZE(XFP_REGNUM))
 378
 379   /* Largest value REGISTER_VIRTUAL_SIZE can have.
 380      Are FPS1, FPS2, FPR "virtual" regisers? */
 381
 382 #define MAX_REGISTER_VIRTUAL_SIZE (REGISTER_RAW_SIZE(XFP_REGNUM))
 383
 384   /* Nonzero if register N requires conversion
 385      from raw format to virtual format.  */
 386
 387 #define REGISTER_CONVERTIBLE(N) ((N) >= XFP_REGNUM)
 388
 389   /* Convert data from raw format for register REGNUM
 390      to virtual format for register REGNUM.  */
 391
 392   extern const struct ext_format ext_format_m88110;
 393 #define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,FROM,TO) \
 394 { \
 395   if ((REGNUM) < XFP_REGNUM) \
 396     memcpy ((TO), (FROM), REGISTER_RAW_SIZE (REGNUM)); \
 397       else ieee_extended_to_double(&ext_format_m88110, \
 398                                    (FROM), (double *)(TO)); \
 399 }
 400
 401 /* Convert data from virtual format for register REGNUM
 402    to raw format for register REGNUM.  */
 403
 404 #define REGISTER_CONVERT_TO_RAW(REGNUM,FROM,TO) \
 405 { \
 406     if ((REGNUM) < XFP_REGNUM) \
 407       memcpy ((TO), (FROM), REGISTER_RAW_SIZE (REGNUM)); \
 408         else double_to_ieee_extended (&ext_format_m88110, \
 409                                       (double *)(FROM), (TO)); \
 410 }
 411
 412 /* Return the GDB type object for the "standard" data type
 413    of data in register N.  */
 414
 415 #define REGISTER_VIRTUAL_TYPE(N) \
 416 ((N) >= XFP_REGNUM \
 417  ? builtin_type_double \
 418  : ((N) == PC_REGNUM || (N) == FP_REGNUM || (N) == SP_REGNUM \
 419     ? lookup_pointer_type (builtin_type_void) : builtin_type_int))
 420
 421 /* The 88k call/return conventions call for "small" values to be returned
 422    into consecutive registers starting from r2.  */
 423
 424 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
 425   memcpy ((VALBUF), &(((char *)REGBUF)[REGISTER_BYTE(RV_REGNUM)]), TYPE_LENGTH (TYPE))
 426
 427 #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF))
 428
 429 /* Write into appropriate registers a function return value
 430    of type TYPE, given in virtual format.  */
 431
 432 #define STORE_RETURN_VALUE(TYPE,VALBUF) \
 433   write_register_bytes (2*REGISTER_RAW_SIZE(0), (VALBUF), TYPE_LENGTH (TYPE))
 434
 435 /* In COFF, if PCC says a parameter is a short or a char, do not
 436    change it to int (it seems the convention is to change it). */
 437
 438 #define BELIEVE_PCC_PROMOTION 1
 439
 440 /* Describe the pointer in each stack frame to the previous stack frame
 441    (its caller).  */
 442
 443 /* FRAME_CHAIN takes a frame's nominal address
 444    and produces the frame's chain-pointer.
 445
 446    However, if FRAME_CHAIN_VALID returns zero,
 447    it means the given frame is the outermost one and has no caller.  */
 448
 449 extern CORE_ADDR frame_chain ();
 450 extern int frame_chain_valid ();
 451 extern int frameless_function_invocation ();
 452
 453 #define FRAME_CHAIN(thisframe) \
 454         frame_chain (thisframe)
 455
 456 #define FRAMELESS_FUNCTION_INVOCATION(frame, fromleaf)  \
 457         fromleaf = frameless_function_invocation (frame)
 458
 459 /* Define other aspects of the stack frame.  */
 460
 461 #define FRAME_SAVED_PC(FRAME)   \
 462         frame_saved_pc (FRAME)
 463 extern CORE_ADDR frame_saved_pc ();
 464
 465 #define FRAME_ARGS_ADDRESS(fi)  \
 466         frame_args_address (fi)
 467 extern CORE_ADDR frame_args_address ();
 468
 469 #define FRAME_LOCALS_ADDRESS(fi) \
 470         frame_locals_address (fi)
 471 extern CORE_ADDR frame_locals_address ();
 472
 473 /* Return number of args passed to a frame.
 474    Can return -1, meaning no way to tell.  */
 475
 476 #define FRAME_NUM_ARGS(numargs, fi)  ((numargs) = -1)
 477
 478 /* Return number of bytes at start of arglist that are not really args.  */
 479
 480 #define FRAME_ARGS_SKIP 0
 481
 482 /* Put here the code to store, into a struct frame_saved_regs,
 483    the addresses of the saved registers of frame described by FRAME_INFO.
 484    This includes special registers such as pc and fp saved in special
 485    ways in the stack frame.  sp is even more special:
 486    the address we return for it IS the sp for the next frame.  */
 487
 488 /* On the 88k, parameter registers get stored into the so called "homing"
 489    area.  This *always* happens when you compiled with GCC and use -g.
 490    Also, (with GCC and -g) the saving of the parameter register values
 491    always happens right within the function prologue code, so these register
 492    values can generally be relied upon to be already copied into their
 493    respective homing slots by the time you will normally try to look at
 494    them (we hope).
 495
 496    Note that homing area stack slots are always at *positive* offsets from
 497    the frame pointer.  Thus, the homing area stack slots for the parameter
 498    registers (passed values) for a given function are actually part of the
 499    frame area of the caller.  This is unusual, but it should not present
 500    any special problems for GDB.
 501
 502    Note also that on the 88k, we are only interested in finding the
 503    registers that might have been saved in memory.  This is a subset of
 504    the whole set of registers because the standard calling sequence allows
 505    the called routine to clobber many registers.
 506
 507    We could manage to locate values for all of the so called "preserved"
 508    registers (some of which may get saved within any particular frame) but
 509    that would require decoding all of the tdesc information.  That would be
 510    nice information for GDB to have, but it is not strictly manditory if we
 511    can live without the ability to look at values within (or backup to)
 512    previous frames.
 513 */
 514
 515 struct frame_saved_regs;
 516 struct frame_info;
 517
 518 void frame_find_saved_regs PARAMS((struct frame_info *fi,
 519                                    struct frame_saved_regs *fsr));
 520
 521 #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
 522         frame_find_saved_regs (frame_info, &frame_saved_regs)
 523
 524 \f
 525 #define POP_FRAME pop_frame ()
 526 extern void pop_frame ();
 527
 528 /* Call function stuff contributed by Kevin Buettner of Motorola.  */
 529
 530 #define CALL_DUMMY_LOCATION AFTER_TEXT_END
 531
 532 extern void m88k_push_dummy_frame();
 533 #define PUSH_DUMMY_FRAME        m88k_push_dummy_frame()
 534
 535 #define CALL_DUMMY {                            \
 536 0x67ff00c0,     /*   0:   subu  #sp,#sp,0xc0 */ \
 537 0x243f0004,     /*   4:   st    #r1,#sp,0x4 */ \
 538 0x245f0008,     /*   8:   st    #r2,#sp,0x8 */ \
 539 0x247f000c,     /*   c:   st    #r3,#sp,0xc */ \
 540 0x249f0010,     /*  10:   st    #r4,#sp,0x10 */ \
 541 0x24bf0014,     /*  14:   st    #r5,#sp,0x14 */ \
 542 0x24df0018,     /*  18:   st    #r6,#sp,0x18 */ \
 543 0x24ff001c,     /*  1c:   st    #r7,#sp,0x1c */ \
 544 0x251f0020,     /*  20:   st    #r8,#sp,0x20 */ \
 545 0x253f0024,     /*  24:   st    #r9,#sp,0x24 */ \
 546 0x255f0028,     /*  28:   st    #r10,#sp,0x28 */ \
 547 0x257f002c,     /*  2c:   st    #r11,#sp,0x2c */ \
 548 0x259f0030,     /*  30:   st    #r12,#sp,0x30 */ \
 549 0x25bf0034,     /*  34:   st    #r13,#sp,0x34 */ \
 550 0x25df0038,     /*  38:   st    #r14,#sp,0x38 */ \
 551 0x25ff003c,     /*  3c:   st    #r15,#sp,0x3c */ \
 552 0x261f0040,     /*  40:   st    #r16,#sp,0x40 */ \
 553 0x263f0044,     /*  44:   st    #r17,#sp,0x44 */ \
 554 0x265f0048,     /*  48:   st    #r18,#sp,0x48 */ \
 555 0x267f004c,     /*  4c:   st    #r19,#sp,0x4c */ \
 556 0x269f0050,     /*  50:   st    #r20,#sp,0x50 */ \
 557 0x26bf0054,     /*  54:   st    #r21,#sp,0x54 */ \
 558 0x26df0058,     /*  58:   st    #r22,#sp,0x58 */ \
 559 0x26ff005c,     /*  5c:   st    #r23,#sp,0x5c */ \
 560 0x271f0060,     /*  60:   st    #r24,#sp,0x60 */ \
 561 0x273f0064,     /*  64:   st    #r25,#sp,0x64 */ \
 562 0x275f0068,     /*  68:   st    #r26,#sp,0x68 */ \
 563 0x277f006c,     /*  6c:   st    #r27,#sp,0x6c */ \
 564 0x279f0070,     /*  70:   st    #r28,#sp,0x70 */ \
 565 0x27bf0074,     /*  74:   st    #r29,#sp,0x74 */ \
 566 0x27df0078,     /*  78:   st    #r30,#sp,0x78 */ \
 567 0x63df0000,     /*  7c:   addu  #r30,#sp,0x0 */ \
 568 0x145f0000,     /*  80:   ld    #r2,#sp,0x0 */ \
 569 0x147f0004,     /*  84:   ld    #r3,#sp,0x4 */ \
 570 0x149f0008,     /*  88:   ld    #r4,#sp,0x8 */ \
 571 0x14bf000c,     /*  8c:   ld    #r5,#sp,0xc */ \
 572 0x14df0010,     /*  90:   ld    #r6,#sp,0x10 */ \
 573 0x14ff0014,     /*  94:   ld    #r7,#sp,0x14 */ \
 574 0x151f0018,     /*  98:   ld    #r8,#sp,0x18 */ \
 575 0x153f001c,     /*  9c:   ld    #r9,#sp,0x1c */ \
 576 0x5c200000,     /*  a0:   or.u  #r1,#r0,0x0 */ \
 577 0x58210000,     /*  a4:   or    #r1,#r1,0x0 */ \
 578 0xf400c801,     /*  a8:   jsr   #r1 */ \
 579 0xf000d1ff      /*  ac:   tb0   0x0,#r0,0x1ff */ \
 580 }
 581
 582 #define CALL_DUMMY_START_OFFSET 0x80
 583 #define CALL_DUMMY_LENGTH 0xb0
 584
 585 /* FIXME: byteswapping.  */
 586 #define FIX_CALL_DUMMY(dummy, pc, fun, nargs, args, type, gcc_p)        \
 587 {                                                                       \
 588   *(unsigned long *)((char *) (dummy) + 0xa0) |=                        \
 589         (((unsigned long) (fun)) >> 16);                                \
 590   *(unsigned long *)((char *) (dummy) + 0xa4) |=                        \
 591         (((unsigned long) (fun)) & 0xffff);                             \
 592   pc = text_end;                                                        \
 593 }
 594
 595 #define STACK_ALIGN(addr) (((addr)+7) & -8)
 596
 597 #define STORE_STRUCT_RETURN(addr, sp) \
 598     write_register (SRA_REGNUM, (addr))
 599
 600 #define NEED_TEXT_START_END 1
 601
 602 /* According to the MC88100 RISC Microprocessor User's Manual, section
 603    6.4.3.1.2:
 604
 605         ... can be made to return to a particular instruction by placing a
 606         valid instruction address in the SNIP and the next sequential
 607         instruction address in the SFIP (with V bits set and E bits clear).
 608         The rte resumes execution at the instruction pointed to by the
 609         SNIP, then the SFIP.
 610
 611    The E bit is the least significant bit (bit 0).  The V (valid) bit is
 612    bit 1.  This is why we logical or 2 into the values we are writing
 613    below.  It turns out that SXIP plays no role when returning from an
 614    exception so nothing special has to be done with it.  We could even
 615    (presumably) give it a totally bogus value.
 616
 617    -- Kevin Buettner
 618 */
 619
 620 #define TARGET_WRITE_PC(val)    {                               \
 621   write_register(SXIP_REGNUM, (long) val);                      \
 622   write_register(SNIP_REGNUM, (long) val | 2);                  \
 623   write_register(SFIP_REGNUM, ((long) val | 2) + 4);            \
 624 }