Add preliminary support for IRIX's n32 abi to the MIPS's multi-arch code.
[binutils-gdb.git] / gdb / config / mips / tm-irix5.h
1 /* Target machine description for SGI Iris under Irix 5, for GDB.
2 Copyright 1990-1993, 1995, 2000 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 /* If we're being built for n32, enable multi-arch. */
22 /* FIXME: cagney/2000-04-04: Testing the _MIPS_SIM_NABI32 and
23 _MIPS_SIM in a tm-*.h file is simply wrong! Those are
24 host-dependant macros (provided by /usr/include) and stop any
25 chance of the target being cross compiled */
26 #if 0 && defined (_MIPS_SIM_NABI32) && _MIPS_SIM == _MIPS_SIM_NABI32
27 /* FIXME: Don't enable multi-arch for IRIX/n32. The test
28 ``gdb.base/corefile.exp: up in corefile.exp'' fails. */
29 #define GDB_MULTI_ARCH 1
30 #endif
31
32 #include "mips/tm-irix3.h"
33
34 /* FIXME: cagney/2000-04-04: Testing the _MIPS_SIM_NABI32 and
35 _MIPS_SIM in a tm-*.h file is simply wrong! Those are
36 host-dependant macros (provided by /usr/include) and stop any
37 chance of the target being cross compiled */
38 #if defined (_MIPS_SIM_NABI32) && _MIPS_SIM == _MIPS_SIM_NABI32
39 /*
40 * Irix 6 (n32 ABI) has 32-bit GP regs and 64-bit FP regs
41 */
42
43 #undef REGISTER_BYTES
44 #define REGISTER_BYTES (MIPS_NUMREGS * 8 + (NUM_REGS - MIPS_NUMREGS) * MIPS_REGSIZE)
45
46 #undef REGISTER_BYTE
47 #define REGISTER_BYTE(N) \
48 (((N) < FP0_REGNUM) ? (N) * MIPS_REGSIZE : \
49 ((N) < FP0_REGNUM + 32) ? \
50 FP0_REGNUM * MIPS_REGSIZE + \
51 ((N) - FP0_REGNUM) * sizeof(double) : \
52 32 * sizeof(double) + ((N) - 32) * MIPS_REGSIZE)
53
54 #undef REGISTER_VIRTUAL_TYPE
55 #define REGISTER_VIRTUAL_TYPE(N) \
56 (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
57 : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
58 : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
59 : builtin_type_int)
60
61 #undef MIPS_LAST_ARG_REGNUM
62 #define MIPS_LAST_ARG_REGNUM 11 /* N32 uses R4 through R11 for args */
63
64 /* MIPS_STACK_ARGSIZE -- how many bytes does a pushed function arg take
65 up on the stack? For the n32 ABI, eight bytes are reserved for each
66 register. Like MIPS_SAVED_REGSIZE but different. */
67 #define MIPS_DEFAULT_STACK_ARGSIZE 8
68
69 /* N32 does not reserve home space for registers used to carry
70 parameters. */
71 #define MIPS_REGS_HAVE_HOME_P 0
72
73 /* Force N32 ABI as the default. */
74 #define MIPS_DEFAULT_ABI MIPS_ABI_N32
75
76 #endif /* N32 */
77
78
79 /* The signal handler trampoline is called _sigtramp. */
80 #undef IN_SIGTRAMP
81 #define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))
82
83 /* Irix 5 saves a full 64 bits for each register. We skip 2 * 4 to
84 get to the saved PC (the register mask and status register are both
85 32 bits) and then another 4 to get to the lower 32 bits. We skip
86 the same 4 bytes, plus the 8 bytes for the PC to get to the
87 registers, and add another 4 to get to the lower 32 bits. We skip
88 8 bytes per register. */
89 #undef SIGFRAME_PC_OFF
90 #define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4 + 4)
91 #undef SIGFRAME_REGSAVE_OFF
92 #define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 2 * 4 + 8 + 4)
93 #undef SIGFRAME_FPREGSAVE_OFF
94 #define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_BASE + 2 * 4 + 8 + 32 * 8 + 4)
95 #define SIGFRAME_REG_SIZE 8