gdb/config/mips/tm-mips.h

   1 /* Definitions to make GDB run on a mips box under 4.3bsd.
   2    Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995
   3    Free Software Foundation, Inc.
   4    Contributed by Per Bothner (bothner@cs.wisc.edu) at U.Wisconsin
   5    and by Alessandro Forin (af@cs.cmu.edu) at CMU..
   6
   7 This file is part of GDB.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2 of the License, or
  12 (at your option) any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with this program; if not, write to the Free Software
  21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  22
  23 #ifndef TM_MIPS_H
  24 #define TM_MIPS_H 1
  25
  26 #ifdef __STDC__
  27 struct frame_info;
  28 struct symbol;
  29 struct type;
  30 struct value;
  31 #endif
  32
  33 #include <bfd.h>
  34 #include "coff/sym.h"           /* Needed for PDR below.  */
  35 #include "coff/symconst.h"
  36
  37 #if !defined (TARGET_BYTE_ORDER)
  38 #define TARGET_BYTE_ORDER LITTLE_ENDIAN
  39 #endif
  40
  41 #if !defined (GDB_TARGET_IS_MIPS64)
  42 #define GDB_TARGET_IS_MIPS64 0
  43 #endif
  44
  45 #if !defined (MIPS_EABI)
  46 #define MIPS_EABI 0
  47 #endif
  48
  49 #if !defined (TARGET_MONITOR_PROMPT)
  50 #define TARGET_MONITOR_PROMPT "<IDT>"
  51 #endif
  52
  53 /* PC should be masked to remove possible MIPS16 flag */
  54 #if !defined (GDB_TARGET_MASK_DISAS_PC)
  55 #define GDB_TARGET_MASK_DISAS_PC(addr) UNMAKE_MIPS16_ADDR(addr)
  56 #endif
  57 #if !defined (GDB_TARGET_UNMASK_DISAS_PC)
  58 #define GDB_TARGET_UNMASK_DISAS_PC(addr) MAKE_MIPS16_ADDR(addr)
  59 #endif
  60
  61 /* Floating point is IEEE compliant */
  62 #define IEEE_FLOAT
  63
  64 /* Some MIPS boards are provided both with and without a floating
  65    point coprocessor.  The MIPS R4650 chip has only single precision
  66    floating point.  We provide a user settable variable to tell gdb
  67    what type of floating point to use.  */
  68
  69 enum mips_fpu_type
  70 {
  71   MIPS_FPU_DOUBLE,      /* Full double precision floating point.  */
  72   MIPS_FPU_SINGLE,      /* Single precision floating point (R4650).  */
  73   MIPS_FPU_NONE         /* No floating point.  */
  74 };
  75
  76 extern enum mips_fpu_type mips_fpu;
  77
  78 /* The name of the usual type of MIPS processor that is in the target
  79    system.  */
  80
  81 #define DEFAULT_MIPS_TYPE "generic"
  82
  83 /* Remove useless bits from an instruction address.  */
  84
  85 #define ADDR_BITS_REMOVE(addr) mips_addr_bits_remove(addr)
  86 CORE_ADDR mips_addr_bits_remove PARAMS ((CORE_ADDR addr));
  87
  88 /* Remove useless bits from the stack pointer.  */
  89
  90 #define TARGET_READ_SP() ADDR_BITS_REMOVE (read_register (SP_REGNUM))
  91
  92 /* Offset from address of function to start of its code.
  93    Zero on most machines.  */
  94
  95 #define FUNCTION_START_OFFSET 0
  96
  97 /* Advance PC across any function entry prologue instructions
  98    to reach some "real" code.  */
  99
 100 #define SKIP_PROLOGUE(pc)       pc = mips_skip_prologue (pc, 0)
 101 extern CORE_ADDR mips_skip_prologue PARAMS ((CORE_ADDR addr, int lenient));
 102
 103 /* Return non-zero if PC points to an instruction which will cause a step
 104    to execute both the instruction at PC and an instruction at PC+4.  */
 105 extern int mips_step_skips_delay PARAMS ((CORE_ADDR));
 106 #define STEP_SKIPS_DELAY_P (1)
 107 #define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc))
 108
 109 /* Immediately after a function call, return the saved pc.
 110    Can't always go through the frames for this because on some machines
 111    the new frame is not set up until the new function executes
 112    some instructions.  */
 113
 114 #define SAVED_PC_AFTER_CALL(frame)      read_register(RA_REGNUM)
 115
 116 /* Are we currently handling a signal */
 117
 118 extern int in_sigtramp PARAMS ((CORE_ADDR, char *));
 119 #define IN_SIGTRAMP(pc, name)   in_sigtramp(pc, name)
 120
 121 /* Stack grows downward.  */
 122
 123 #define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
 124
 125 #define BIG_ENDIAN 4321
 126
 127 /* BREAKPOINT_FROM_PC uses the program counter value to determine whether a
 128    16- or 32-bit breakpoint should be used.  It returns a pointer
 129    to a string of bytes that encode a breakpoint instruction, stores
 130    the length of the string to *lenptr, and adjusts the pc (if necessary) to
 131    point to the actual memory location where the breakpoint should be
 132    inserted.  */
 133
 134 extern breakpoint_from_pc_fn mips_breakpoint_from_pc;
 135 #define BREAKPOINT_FROM_PC(pcptr, lenptr) mips_breakpoint_from_pc(pcptr, lenptr)
 136
 137 /* Amount PC must be decremented by after a breakpoint.
 138    This is often the number of bytes in BREAKPOINT
 139    but not always.  */
 140
 141 #define DECR_PC_AFTER_BREAK 0
 142
 143 /* Say how long (ordinary) registers are.  This is a piece of bogosity
 144    used in push_word and a few other places; REGISTER_RAW_SIZE is the
 145    real way to know how big a register is.  */
 146
 147 #define REGISTER_SIZE 4
 148
 149 /* The size of a register.  This is predefined in tm-mips64.h.  We
 150    can't use REGISTER_SIZE because that is used for various other
 151    things.  */
 152
 153 #ifndef MIPS_REGSIZE
 154 #define MIPS_REGSIZE 4
 155 #endif
 156
 157 /* The sizes of floating point registers.  */
 158
 159 #define MIPS_FPU_SINGLE_REGSIZE 4
 160 #define MIPS_FPU_DOUBLE_REGSIZE 8
 161
 162 /* Number of machine registers */
 163
 164 #ifndef NUM_REGS
 165 #define NUM_REGS 90
 166 #endif
 167
 168 /* Initializer for an array of names of registers.
 169    There should be NUM_REGS strings in this initializer.  */
 170
 171 #ifndef REGISTER_NAMES
 172 #define REGISTER_NAMES  \
 173     {   "zero", "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3", \
 174         "t0",   "t1",   "t2",   "t3",   "t4",   "t5",   "t6",   "t7", \
 175         "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7", \
 176         "t8",   "t9",   "k0",   "k1",   "gp",   "sp",   "s8",   "ra", \
 177         "sr",   "lo",   "hi",   "bad",  "cause","pc",    \
 178         "f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7", \
 179         "f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15", \
 180         "f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",\
 181         "f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",\
 182         "fsr",  "fir",  "fp",   "", \
 183         "",     "",     "",     "",     "",     "",     "",     "", \
 184         "",     "",     "",     "",     "",     "",     "",     "", \
 185     }
 186 #endif
 187
 188 /* Register numbers of various important registers.
 189    Note that some of these values are "real" register numbers,
 190    and correspond to the general registers of the machine,
 191    and some are "phony" register numbers which are too large
 192    to be actual register numbers as far as the user is concerned
 193    but do serve to get the desired values when passed to read_register.  */
 194
 195 #define ZERO_REGNUM 0           /* read-only register, always 0 */
 196 #define V0_REGNUM 2             /* Function integer return value */
 197 #define A0_REGNUM 4             /* Loc of first arg during a subr call */
 198 #if MIPS_EABI
 199 #  define MIPS_LAST_ARG_REGNUM 11 /* EABI uses R4 through R11 for args */
 200 #  define MIPS_NUM_ARG_REGS 8
 201 #else
 202 #  define MIPS_LAST_ARG_REGNUM 7  /* old ABI uses R4 through R7 for args */
 203 #  define MIPS_NUM_ARG_REGS 4
 204 #endif
 205 #define T9_REGNUM 25            /* Contains address of callee in PIC */
 206 #define SP_REGNUM 29            /* Contains address of top of stack */
 207 #define RA_REGNUM 31            /* Contains return address value */
 208 #define PS_REGNUM 32            /* Contains processor status */
 209 #define HI_REGNUM 34            /* Multiple/divide temp */
 210 #define LO_REGNUM 33            /* ... */
 211 #define BADVADDR_REGNUM 35      /* bad vaddr for addressing exception */
 212 #define CAUSE_REGNUM 36         /* describes last exception */
 213 #define PC_REGNUM 37            /* Contains program counter */
 214 #define FP0_REGNUM 38           /* Floating point register 0 (single float) */
 215 #define FPA0_REGNUM (FP0_REGNUM+12) /* First float argument register */
 216 #if MIPS_EABI                   /* EABI uses F12 through F19 for args */
 217 #  define MIPS_LAST_FP_ARG_REGNUM (FP0_REGNUM+19)
 218 #  define MIPS_NUM_FP_ARG_REGS 8
 219 #else                           /* old ABI uses F12 through F15 for args */
 220 #  define MIPS_LAST_FP_ARG_REGNUM (FP0_REGNUM+15)
 221 #  define MIPS_NUM_FP_ARG_REGS 4
 222 #endif
 223 #define FCRCS_REGNUM 70         /* FP control/status */
 224 #define FCRIR_REGNUM 71         /* FP implementation/revision */
 225 #define FP_REGNUM 72            /* Pseudo register that contains true address of executing stack frame */
 226 #define UNUSED_REGNUM 73        /* Never used, FIXME */
 227 #define FIRST_EMBED_REGNUM 74   /* First CP0 register for embedded use */
 228 #define PRID_REGNUM 89          /* Processor ID */
 229 #define LAST_EMBED_REGNUM 89    /* Last one */
 230
 231 /* Define DO_REGISTERS_INFO() to do machine-specific formatting
 232    of register dumps. */
 233
 234 #define DO_REGISTERS_INFO(_regnum, fp) mips_do_registers_info(_regnum, fp)
 235 extern void mips_do_registers_info PARAMS ((int, int));
 236
 237 /* Total amount of space needed to store our copies of the machine's
 238    register state, the array `registers'.  */
 239
 240 #define REGISTER_BYTES (NUM_REGS*MIPS_REGSIZE)
 241
 242 /* Index within `registers' of the first byte of the space for
 243    register N.  */
 244
 245 #define REGISTER_BYTE(N) ((N) * MIPS_REGSIZE)
 246
 247 /* Number of bytes of storage in the actual machine representation
 248    for register N. */
 249
 250 #define REGISTER_RAW_SIZE(N) REGISTER_VIRTUAL_SIZE(N)
 251
 252 /* Number of bytes of storage in the program's representation
 253    for register N. */
 254
 255 #define REGISTER_VIRTUAL_SIZE(N) TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (N))
 256
 257 /* Largest value REGISTER_RAW_SIZE can have.  */
 258
 259 #define MAX_REGISTER_RAW_SIZE 8
 260
 261 /* Largest value REGISTER_VIRTUAL_SIZE can have.  */
 262
 263 #define MAX_REGISTER_VIRTUAL_SIZE 8
 264
 265 /* Return the GDB type object for the "standard" data type of data in
 266    register N.  */
 267
 268 #ifndef REGISTER_VIRTUAL_TYPE
 269 #define REGISTER_VIRTUAL_TYPE(N) \
 270         (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_float \
 271          : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
 272          : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
 273          : builtin_type_int)
 274 #endif
 275
 276 /* All mips targets store doubles in a register pair with the least
 277    significant register in the lower numbered register.
 278    If the target is big endian, double register values need conversion
 279    between memory and register formats.  */
 280
 281 #define REGISTER_CONVERT_TO_TYPE(n, type, buffer)                       \
 282   do {if (TARGET_BYTE_ORDER == BIG_ENDIAN                               \
 283           && REGISTER_RAW_SIZE (n) == 4                                 \
 284           && (n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32                 \
 285           && TYPE_CODE(type) == TYPE_CODE_FLT                           \
 286           && TYPE_LENGTH(type) == 8) {                                  \
 287         char __temp[4];                                                 \
 288         memcpy (__temp, ((char *)(buffer))+4, 4);                       \
 289         memcpy (((char *)(buffer))+4, (buffer), 4);                     \
 290         memcpy (((char *)(buffer)), __temp, 4); }} while (0)
 291
 292 #define REGISTER_CONVERT_FROM_TYPE(n, type, buffer)                     \
 293   do {if (TARGET_BYTE_ORDER == BIG_ENDIAN                               \
 294           && REGISTER_RAW_SIZE (n) == 4                                 \
 295           && (n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32                 \
 296           && TYPE_CODE(type) == TYPE_CODE_FLT                           \
 297           && TYPE_LENGTH(type) == 8) {                                  \
 298         char __temp[4];                                                 \
 299         memcpy (__temp, ((char *)(buffer))+4, 4);                       \
 300         memcpy (((char *)(buffer))+4, (buffer), 4);                     \
 301         memcpy (((char *)(buffer)), __temp, 4); }} while (0)
 302
 303 /* Store the address of the place in which to copy the structure the
 304    subroutine will return.  Handled by mips_push_arguments.  */
 305
 306 #define STORE_STRUCT_RETURN(addr, sp)   /**/
 307
 308 /* Extract from an array REGBUF containing the (raw) register state
 309    a function return value of type TYPE, and copy that, in virtual format,
 310    into VALBUF.  XXX floats */
 311
 312 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
 313   mips_extract_return_value(TYPE, REGBUF, VALBUF)
 314 extern void
 315 mips_extract_return_value PARAMS ((struct type *, char [], char *));
 316
 317 /* Write into appropriate registers a function return value
 318    of type TYPE, given in virtual format.  */
 319
 320 #define STORE_RETURN_VALUE(TYPE,VALBUF) \
 321   mips_store_return_value(TYPE, VALBUF)
 322 extern void mips_store_return_value PARAMS ((struct type *, char *));
 323
 324 /* Extract from an array REGBUF containing the (raw) register state
 325    the address in which a function should return its structure value,
 326    as a CORE_ADDR (or an expression that can be used as one).  */
 327 /* The address is passed in a0 upon entry to the function, but when
 328    the function exits, the compiler has copied the value to v0.  This
 329    convention is specified by the System V ABI, so I think we can rely
 330    on it.  */
 331
 332 #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
 333   (extract_address (REGBUF + REGISTER_BYTE (V0_REGNUM), \
 334                     REGISTER_RAW_SIZE (V0_REGNUM)))
 335
 336 extern use_struct_convention_fn mips_use_struct_convention;
 337 #define USE_STRUCT_CONVENTION(gcc_p, type) mips_use_struct_convention (gcc_p, type)
 338 \f
 339 /* Describe the pointer in each stack frame to the previous stack frame
 340    (its caller).  */
 341
 342 /* FRAME_CHAIN takes a frame's nominal address
 343    and produces the frame's chain-pointer. */
 344
 345 #define FRAME_CHAIN(thisframe) (CORE_ADDR) mips_frame_chain (thisframe)
 346 extern CORE_ADDR mips_frame_chain PARAMS ((struct frame_info *));
 347
 348 /* Define other aspects of the stack frame.  */
 349
 350
 351 /* A macro that tells us whether the function invocation represented
 352    by FI does not have a frame on the stack associated with it.  If it
 353    does not, FRAMELESS is set to 1, else 0.  */
 354 /* We handle this differently for mips, and maybe we should not */
 355
 356 #define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS)  {(FRAMELESS) = 0;}
 357
 358 /* Saved Pc.  */
 359
 360 #define FRAME_SAVED_PC(FRAME)   (mips_frame_saved_pc(FRAME))
 361 extern CORE_ADDR mips_frame_saved_pc PARAMS ((struct frame_info *));
 362
 363 #define FRAME_ARGS_ADDRESS(fi)  (fi)->frame
 364
 365 #define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
 366
 367 /* Return number of args passed to a frame.
 368    Can return -1, meaning no way to tell.  */
 369
 370 #define FRAME_NUM_ARGS(num, fi) (num = mips_frame_num_args(fi))
 371 extern int mips_frame_num_args PARAMS ((struct frame_info *));
 372
 373 /* Return number of bytes at start of arglist that are not really args.  */
 374
 375 #define FRAME_ARGS_SKIP 0
 376
 377 /* Put here the code to store, into a struct frame_saved_regs,
 378    the addresses of the saved registers of frame described by FRAME_INFO.
 379    This includes special registers such as pc and fp saved in special
 380    ways in the stack frame.  sp is even more special:
 381    the address we return for it IS the sp for the next frame.  */
 382
 383 #define FRAME_INIT_SAVED_REGS(frame_info) \
 384   do { \
 385     if ((frame_info)->saved_regs == NULL) \
 386       mips_find_saved_regs (frame_info); \
 387     (frame_info)->saved_regs[SP_REGNUM] = (frame_info)->frame; \
 388   } while (0)
 389 extern void mips_find_saved_regs PARAMS ((struct frame_info *));
 390
 391 \f
 392 /* Things needed for making the inferior call functions.  */
 393
 394 /* Stack must be aligned on 32-bit boundaries when synthesizing
 395    function calls.  We don't need STACK_ALIGN, PUSH_ARGUMENTS will
 396    handle it. */
 397
 398 #define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
 399     sp = mips_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr))
 400 extern CORE_ADDR
 401 mips_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int, CORE_ADDR));
 402
 403 /* Push an empty stack frame, to record the current PC, etc.  */
 404
 405 #define PUSH_DUMMY_FRAME        mips_push_dummy_frame()
 406 extern void mips_push_dummy_frame PARAMS ((void));
 407
 408 /* Discard from the stack the innermost frame, restoring all registers.  */
 409
 410 #define POP_FRAME               mips_pop_frame()
 411 extern void mips_pop_frame PARAMS ((void));
 412
 413 #define CALL_DUMMY { 0 }
 414
 415 #define CALL_DUMMY_START_OFFSET (0)
 416
 417 #define CALL_DUMMY_BREAKPOINT_OFFSET (0)
 418
 419 /* On Irix, $t9 ($25) contains the address of the callee (used for PIC).
 420    It doesn't hurt to do this on other systems; $t9 will be ignored.  */
 421 #define FIX_CALL_DUMMY(dummyname, start_sp, fun, nargs, args, rettype, gcc_p) \
 422     write_register(T9_REGNUM, fun)
 423
 424 #define CALL_DUMMY_LOCATION AT_ENTRY_POINT
 425
 426 #define CALL_DUMMY_ADDRESS() (mips_call_dummy_address ())
 427 extern CORE_ADDR mips_call_dummy_address PARAMS ((void));
 428
 429 /* There's a mess in stack frame creation.  See comments in blockframe.c
 430    near reference to INIT_FRAME_PC_FIRST.  */
 431
 432 #define INIT_FRAME_PC(fromleaf, prev) /* nada */
 433
 434 #define INIT_FRAME_PC_FIRST(fromleaf, prev) \
 435    mips_init_frame_pc_first(fromleaf, prev)
 436 extern void mips_init_frame_pc_first PARAMS ((int, struct frame_info *));
 437
 438 /* Special symbol found in blocks associated with routines.  We can hang
 439    mips_extra_func_info_t's off of this.  */
 440
 441 #define MIPS_EFI_SYMBOL_NAME "__GDB_EFI_INFO__"
 442 extern void ecoff_relocate_efi PARAMS ((struct symbol *, CORE_ADDR));
 443
 444 /* Specific information about a procedure.
 445    This overlays the MIPS's PDR records,
 446    mipsread.c (ab)uses this to save memory */
 447
 448 typedef struct mips_extra_func_info {
 449         long    numargs;        /* number of args to procedure (was iopt) */
 450         bfd_vma high_addr;      /* upper address bound */
 451         long    frame_adjust;   /* offset of FP from SP (used on MIPS16) */
 452         PDR     pdr;            /* Procedure descriptor record */
 453 } *mips_extra_func_info_t;
 454
 455 #define EXTRA_FRAME_INFO \
 456   mips_extra_func_info_t proc_desc; \
 457   int num_args;
 458
 459 #define INIT_EXTRA_FRAME_INFO(fromleaf, fci) init_extra_frame_info(fci)
 460 extern void init_extra_frame_info PARAMS ((struct frame_info *));
 461
 462 #define PRINT_EXTRA_FRAME_INFO(fi) \
 463   { \
 464     if (fi && fi->proc_desc && fi->proc_desc->pdr.framereg < NUM_REGS) \
 465       printf_filtered (" frame pointer is at %s+%d\n", \
 466                        REGISTER_NAME (fi->proc_desc->pdr.framereg), \
 467                                  fi->proc_desc->pdr.frameoffset); \
 468   }
 469
 470 /* It takes two values to specify a frame on the MIPS.
 471
 472    In fact, the *PC* is the primary value that sets up a frame.  The
 473    PC is looked up to see what function it's in; symbol information
 474    from that function tells us which register is the frame pointer
 475    base, and what offset from there is the "virtual frame pointer".
 476    (This is usually an offset from SP.)  On most non-MIPS machines,
 477    the primary value is the SP, and the PC, if needed, disambiguates
 478    multiple functions with the same SP.  But on the MIPS we can't do
 479    that since the PC is not stored in the same part of the frame every
 480    time.  This does not seem to be a very clever way to set up frames,
 481    but there is nothing we can do about that).  */
 482
 483 #define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
 484 extern struct frame_info *setup_arbitrary_frame PARAMS ((int, CORE_ADDR *));
 485
 486 /* Convert a dbx stab register number (from `r' declaration) to a gdb REGNUM */
 487
 488 #define STAB_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-38)
 489
 490 /* Convert a ecoff register number to a gdb REGNUM */
 491
 492 #define ECOFF_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-32)
 493
 494 /* If the current gcc for for this target does not produce correct debugging
 495    information for float parameters, both prototyped and unprototyped, then
 496    define this macro.  This forces gdb to  always assume that floats are
 497    passed as doubles and then converted in the callee.
 498
 499    For the mips chip, it appears that the debug info marks the parameters as
 500    floats regardless of whether the function is prototyped, but the actual
 501    values are passed as doubles for the non-prototyped case and floats for
 502    the prototyped case.  Thus we choose to make the non-prototyped case work
 503    for C and break the prototyped case, since the non-prototyped case is
 504    probably much more common.  (FIXME). */
 505
 506 #define COERCE_FLOAT_TO_DOUBLE (current_language -> la_language == language_c)
 507
 508 /* Select the default mips disassembler */
 509
 510 #define TM_PRINT_INSN_MACH 0
 511
 512
 513 /* These are defined in mdebugread.c and are used in mips-tdep.c  */
 514 extern CORE_ADDR sigtramp_address, sigtramp_end;
 515 extern void fixup_sigtramp PARAMS ((void));
 516
 517 /* Defined in mips-tdep.c and used in remote-mips.c */
 518 extern char *mips_read_processor_type PARAMS ((void));
 519
 520 /* Functions for dealing with MIPS16 call and return stubs.  */
 521 #define IN_SOLIB_CALL_TRAMPOLINE(pc, name)      mips_in_call_stub (pc, name)
 522 #define IN_SOLIB_RETURN_TRAMPOLINE(pc, name)    mips_in_return_stub (pc, name)
 523 #define SKIP_TRAMPOLINE_CODE(pc)                mips_skip_stub (pc)
 524 #define IGNORE_HELPER_CALL(pc)                  mips_ignore_helper (pc)
 525 extern int mips_in_call_stub PARAMS ((CORE_ADDR pc,  char *name));
 526 extern int mips_in_return_stub PARAMS ((CORE_ADDR pc,  char *name));
 527 extern CORE_ADDR mips_skip_stub PARAMS ((CORE_ADDR pc));
 528 extern int mips_ignore_helper PARAMS ((CORE_ADDR pc));
 529
 530 #ifndef TARGET_MIPS
 531 #define TARGET_MIPS
 532 #endif
 533
 534 /* Definitions and declarations used by mips-tdep.c and remote-mips.c  */
 535 #define MIPS_INSTLEN 4          /* Length of an instruction */
 536 #define MIPS16_INSTLEN 2        /* Length of an instruction on MIPS16*/
 537 #define MIPS_NUMREGS 32         /* Number of integer or float registers */
 538 typedef unsigned long t_inst;   /* Integer big enough to hold an instruction */
 539
 540 /* MIPS16 function addresses are odd (bit 0 is set).  Here are some
 541    macros to test, set, or clear bit 0 of addresses.  */
 542 #define IS_MIPS16_ADDR(addr)     ((addr) & 1)
 543 #define MAKE_MIPS16_ADDR(addr)   ((addr) | 1)
 544 #define UNMAKE_MIPS16_ADDR(addr) ((addr) & ~1)
 545
 546 #endif  /* TM_MIPS_H */
 547
 548 /* Macros for setting and testing a bit in a minimal symbol that
 549    marks it as 16-bit function.  The MSB of the minimal symbol's
 550    "info" field is used for this purpose. This field is already
 551    being used to store the symbol size, so the assumption is
 552    that the symbol size cannot exceed 2^31.
 553
 554    ELF_MAKE_MSYMBOL_SPECIAL
 555                         tests whether an ELF symbol is "special", i.e. refers
 556                         to a 16-bit function, and sets a "special" bit in a
 557                         minimal symbol to mark it as a 16-bit function
 558    MSYMBOL_IS_SPECIAL   tests the "special" bit in a minimal symbol
 559    MSYMBOL_SIZE         returns the size of the minimal symbol, i.e.
 560                         the "info" field with the "special" bit masked out
 561 */
 562
 563 #define ELF_MAKE_MSYMBOL_SPECIAL(sym,msym) \
 564  { \
 565   if (((elf_symbol_type *)(sym))->internal_elf_sym.st_other == STO_MIPS16) { \
 566     MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) | 0x80000000); \
 567     SYMBOL_VALUE_ADDRESS (msym) |= 1; \
 568   } \
 569  }
 570
 571 #define MSYMBOL_IS_SPECIAL(msym) \
 572   (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
 573 #define MSYMBOL_SIZE(msym) \
 574   ((long) MSYMBOL_INFO (msym) & 0x7fffffff)