2002-11-27 Andrew Cagney <cagney@redhat.com>
[binutils-gdb.git] / gdb / config / sparc / tm-sp64.h
1 /* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger.
2 This is included by other tm-*.h files to define SPARC64 cpu-related info.
3 Copyright 1994, 1995, 1996, 1998, 1999, 2000
4 Free Software Foundation, Inc.
5 This is (obviously) based on the SPARC Vn (n<9) port.
6 Contributed by Doug Evans (dje@cygnus.com).
7 Further modified by Bob Manson (manson@cygnus.com).
8
9 This file is part of GDB.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 59 Temple Place - Suite 330,
24 Boston, MA 02111-1307, USA. */
25
26 #define GDB_MULTI_ARCH GDB_MULTI_ARCH_PARTIAL
27
28 #ifndef GDB_TARGET_IS_SPARC64
29 #define GDB_TARGET_IS_SPARC64 1
30 #endif
31
32 #include "sparc/tm-sparc.h"
33
34 /* Eeeew. Ok, we have to assume (for now) that the processor really is
35 in sparc64 mode. While this is the same instruction sequence as
36 on the Sparc, the stack frames are offset by +2047 (and the arguments
37 are 8 bytes instead of 4). */
38 /* Instructions are:
39 std %f10, [ %fp + 0x7a7 ]
40 std %f8, [ %fp + 0x79f ]
41 std %f6, [ %fp + 0x797 ]
42 std %f4, [ %fp + 0x78f ]
43 std %f2, [ %fp + 0x787 ]
44 std %f0, [ %fp + 0x77f ]
45 std %g6, [ %fp + 0x777 ]
46 std %g4, [ %fp + 0x76f ]
47 std %g2, [ %fp + 0x767 ]
48 std %g0, [ %fp + 0x75f ]
49 std %fp, [ %fp + 0x757 ]
50 std %i4, [ %fp + 0x74f ]
51 std %i2, [ %fp + 0x747 ]
52 std %i0, [ %fp + 0x73f ]
53 nop
54 nop
55 nop
56 nop
57 rd %tbr, %o0
58 st %o0, [ %fp + 0x72b ]
59 rd %tpc, %o0
60 st %o0, [ %fp + 0x727 ]
61 rd %psr, %o0
62 st %o0, [ %fp + 0x723 ]
63 rd %y, %o0
64 st %o0, [ %fp + 0x71f ]
65 ldx [ %sp + 0x8a7 ], %o5
66 ldx [ %sp + 0x89f ], %o4
67 ldx [ %sp + 0x897 ], %o3
68 ldx [ %sp + 0x88f ], %o2
69 ldx [ %sp + 0x887 ], %o1
70 call %g0
71 ldx [ %sp + 0x87f ], %o0
72 nop
73 ta 1
74 nop
75 nop
76 */
77
78 #if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
79 /*
80 * The following defines must go away for MULTI_ARCH.
81 */
82
83 #ifndef DO_CALL_DUMMY_ON_STACK
84
85 /*
86 * These defines will suffice for the AT_ENTRY_POINT call dummy method.
87 */
88
89 #undef CALL_DUMMY
90 #define CALL_DUMMY {0}
91 #undef CALL_DUMMY_LENGTH
92 #define CALL_DUMMY_LENGTH 0
93 #undef CALL_DUMMY_CALL_OFFSET
94 #define CALL_DUMMY_CALL_OFFSET 0
95 #undef CALL_DUMMY_START_OFFSET
96 #define CALL_DUMMY_START_OFFSET 0
97 #undef CALL_DUMMY_BREAKPOINT_OFFSET
98 #define CALL_DUMMY_BREAKPOINT_OFFSET 0
99 #undef CALL_DUMMY_BREAKPOINT_OFFSET_P
100 #define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
101 #undef CALL_DUMMY_LOCATION
102 #define CALL_DUMMY_LOCATION AT_ENTRY_POINT
103 #undef PC_IN_CALL_DUMMY
104 #define PC_IN_CALL_DUMMY(pc, sp, frame_address) deprecated_pc_in_call_dummy_at_entry_point (pc, sp, frame_address)
105 #undef CALL_DUMMY_STACK_ADJUST
106 #define CALL_DUMMY_STACK_ADJUST 128
107 #undef SIZEOF_CALL_DUMMY_WORDS
108 #define SIZEOF_CALL_DUMMY_WORDS 0
109 #undef CALL_DUMMY_ADDRESS
110 #define CALL_DUMMY_ADDRESS() entry_point_address()
111 #undef FIX_CALL_DUMMY
112 #define FIX_CALL_DUMMY(DUMMYNAME, PC, FUN, NARGS, ARGS, TYPE, GCC_P)
113 #undef PUSH_RETURN_ADDRESS
114 #define PUSH_RETURN_ADDRESS(PC, SP) sparc_at_entry_push_return_address (PC, SP)
115 extern CORE_ADDR
116 sparc_at_entry_push_return_address (CORE_ADDR pc, CORE_ADDR sp);
117
118 #undef STORE_STRUCT_RETURN
119 #define STORE_STRUCT_RETURN(ADDR, SP) \
120 sparc_at_entry_store_struct_return (ADDR, SP)
121 extern void
122 sparc_at_entry_store_struct_return (CORE_ADDR addr, CORE_ADDR sp);
123
124
125 #else
126 /*
127 * Old call dummy method, with CALL_DUMMY on the stack.
128 */
129
130 #undef CALL_DUMMY
131 #define CALL_DUMMY { 0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,\
132 0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,\
133 0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,\
134 0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,\
135 0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,\
136 0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,\
137 0xf03fa73f01000000LL, 0x0100000001000000LL,\
138 0x0100000091580000LL, 0xd027a72b93500000LL,\
139 0xd027a72791480000LL, 0xd027a72391400000LL,\
140 0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,\
141 0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,\
142 0x0100000091d02001LL, 0x0100000001000000LL }
143
144
145 /* 128 is to reserve space to write the %i/%l registers that will be restored
146 when we resume. */
147 #undef CALL_DUMMY_STACK_ADJUST
148 #define CALL_DUMMY_STACK_ADJUST 128
149
150 /* Size of the call dummy in bytes. */
151 #undef CALL_DUMMY_LENGTH
152 #define CALL_DUMMY_LENGTH 192
153
154 /* Offset within CALL_DUMMY of the 'call' instruction. */
155 #undef CALL_DUMMY_START_OFFSET
156 #define CALL_DUMMY_START_OFFSET 148
157
158 /* Offset within CALL_DUMMY of the 'call' instruction. */
159 #undef CALL_DUMMY_CALL_OFFSET
160 #define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + (5 * 4))
161
162 /* Offset within CALL_DUMMY of the 'ta 1' instruction. */
163 #undef CALL_DUMMY_BREAKPOINT_OFFSET
164 #define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + (8 * 4))
165
166 /* Let's GDB know that it can make a call_dummy breakpoint. */
167 #undef CALL_DUMMY_BREAKPOINT_OFFSET_P
168 #define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
169
170 /* Call dummy will be located on the stack. */
171 #undef CALL_DUMMY_LOCATION
172 #define CALL_DUMMY_LOCATION ON_STACK
173 #undef PC_IN_CALL_DUMMY
174 #define PC_IN_CALL_DUMMY(pc, sp, frame_address) deprecated_pc_in_call_dummy_on_stack (pc, sp, frame_address)
175
176 /* Insert the function address into the call dummy. */
177 #undef FIX_CALL_DUMMY
178 #define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
179 sparc_fix_call_dummy (dummyname, pc, fun, type, gcc_p)
180 void sparc_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
181 struct type *value_type, int using_gcc);
182
183
184 /* The remainder of these will accept the default definition. */
185 #undef SIZEOF_CALL_DUMMY_WORDS
186 #undef PUSH_RETURN_ADDRESS
187 #undef CALL_DUMMY_ADDRESS
188 #undef STORE_STRUCT_RETURN
189
190 #endif
191
192 /* Does the specified function use the "struct returning" convention
193 or the "value returning" convention? The "value returning" convention
194 almost invariably returns the entire value in registers. The
195 "struct returning" convention often returns the entire value in
196 memory, and passes a pointer (out of or into the function) saying
197 where the value (is or should go).
198
199 Since this sometimes depends on whether it was compiled with GCC,
200 this is also an argument. This is used in call_function to build a
201 stack, and in value_being_returned to print return values.
202
203 On Sparc64, we only pass pointers to structs if they're larger than
204 32 bytes. Otherwise they're stored in %o0-%o3 (floating-point
205 values go into %fp0-%fp3). */
206
207 #undef USE_STRUCT_CONVENTION
208 #define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32)
209
210 CORE_ADDR sparc64_push_arguments (int,
211 struct value **, CORE_ADDR, int, CORE_ADDR);
212 #undef PUSH_ARGUMENTS
213 #define PUSH_ARGUMENTS(A,B,C,D,E) \
214 (sparc64_push_arguments ((A), (B), (C), (D), (E)))
215
216 /* Store the address of the place in which to copy the structure the
217 subroutine will return. This is called from call_function. */
218 /* FIXME: V9 uses %o0 for this. */
219
220 #undef STORE_STRUCT_RETURN
221 #define STORE_STRUCT_RETURN(ADDR, SP) \
222 { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }
223
224 /* Stack must be aligned on 128-bit boundaries when synthesizing
225 function calls. */
226
227 #undef STACK_ALIGN
228 #define STACK_ALIGN(ADDR) (((ADDR) + 15 ) & -16)
229
230 /* Initializer for an array of names of registers.
231 There should be NUM_REGS strings in this initializer. */
232 /* Some of these registers are only accessible from priviledged mode.
233 They are here for kernel debuggers, etc. */
234 /* FIXME: icc and xcc are currently considered separate registers.
235 This may have to change and consider them as just one (ccr).
236 Let's postpone this as long as we can. It's nice to be able to set
237 them individually. */
238 /* FIXME: fcc0-3 are currently separate, even though they are also part of
239 fsr. May have to remove them but let's postpone this as long as
240 possible. It's nice to be able to set them individually. */
241 /* FIXME: Whether to include f33, f35, etc. here is not clear.
242 There are advantages and disadvantages. */
243
244 #undef REGISTER_NAMES
245 #define REGISTER_NAMES \
246 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
247 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
248 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
249 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \
250 \
251 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
252 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
253 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
254 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
255 "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46", \
256 "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62", \
257 \
258 "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", \
259 "ver", "tick", "pil", "pstate", \
260 "tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate", \
261 "cwp", "cansave", "canrestore", "cleanwin", "otherwin", \
262 "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", \
263 "asr22", "asr23", "asr24", "asr25", "asr26", "asr27", \
264 "asr28", "asr29", "asr30", "asr31", \
265 /* These are here at the end to simplify removing them if we have to. */ \
266 "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3" \
267 }
268
269 #undef REG_STRUCT_HAS_ADDR
270 #define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32)
271
272 extern CORE_ADDR sparc64_read_sp ();
273 extern CORE_ADDR sparc64_read_fp ();
274 extern void sparc64_write_sp (CORE_ADDR);
275
276 #define TARGET_READ_SP() (sparc64_read_sp ())
277 #define TARGET_READ_FP() (sparc64_read_fp ())
278 #define TARGET_WRITE_SP(X) (sparc64_write_sp (X))
279
280 #undef DEPRECATED_EXTRACT_RETURN_VALUE
281 #define DEPRECATED_EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
282 sp64_extract_return_value(TYPE, REGBUF, VALBUF, 0)
283 extern void sp64_extract_return_value (struct type *, char[], char *, int);
284
285 /* Register numbers of various important registers.
286 Note that some of these values are "real" register numbers,
287 and correspond to the general registers of the machine,
288 and some are "phony" register numbers which are too large
289 to be actual register numbers as far as the user is concerned
290 but do serve to get the desired values when passed to read_register. */
291
292 #if 0 /* defined in tm-sparc.h, replicated
293 for doc purposes */
294 #define G0_REGNUM 0 /* %g0 */
295 #define G1_REGNUM 1 /* %g1 */
296 #define O0_REGNUM 8 /* %o0 */
297 #define SP_REGNUM 14 /* Contains address of top of stack, \
298 which is also the bottom of the frame. */
299 #define RP_REGNUM 15 /* Contains return address value, *before* \
300 any windows get switched. */
301 #define O7_REGNUM 15 /* Last local reg not saved on stack frame */
302 #define L0_REGNUM 16 /* First local reg that's saved on stack frame
303 rather than in machine registers */
304 #define I0_REGNUM 24 /* %i0 */
305 #define FP_REGNUM 30 /* Contains address of executing stack frame */
306 #define I7_REGNUM 31 /* Last local reg saved on stack frame */
307 #define FP0_REGNUM 32 /* Floating point register 0 */
308 #endif
309
310 /*#define FP_MAX_REGNUM 80*/ /* 1 + last fp reg number */
311
312 /* #undef v8 misc. regs */
313
314 #undef Y_REGNUM
315 #undef PS_REGNUM
316 #undef WIM_REGNUM
317 #undef TBR_REGNUM
318 #undef PC_REGNUM
319 #undef NPC_REGNUM
320 #undef FPS_REGNUM
321 #undef CPS_REGNUM
322
323 /* v9 misc. and priv. regs */
324
325 #define C0_REGNUM 80 /* Start of control registers */
326
327 #define PC_REGNUM (C0_REGNUM + 0) /* Current PC */
328 #define NPC_REGNUM (C0_REGNUM + 1) /* Next PC */
329 #define CCR_REGNUM (C0_REGNUM + 2) /* Condition Code Register (%xcc,%icc) */
330 #define FSR_REGNUM (C0_REGNUM + 3) /* Floating Point State */
331 #define FPRS_REGNUM (C0_REGNUM + 4) /* Floating Point Registers State */
332 #define Y_REGNUM (C0_REGNUM + 5) /* Temp register for multiplication, etc. */
333 #define ASI_REGNUM (C0_REGNUM + 6) /* Alternate Space Identifier */
334 #define VER_REGNUM (C0_REGNUM + 7) /* Version register */
335 #define TICK_REGNUM (C0_REGNUM + 8) /* Tick register */
336 #define PIL_REGNUM (C0_REGNUM + 9) /* Processor Interrupt Level */
337 #define PSTATE_REGNUM (C0_REGNUM + 10) /* Processor State */
338 #define TSTATE_REGNUM (C0_REGNUM + 11) /* Trap State */
339 #define TBA_REGNUM (C0_REGNUM + 12) /* Trap Base Address */
340 #define TL_REGNUM (C0_REGNUM + 13) /* Trap Level */
341 #define TT_REGNUM (C0_REGNUM + 14) /* Trap Type */
342 #define TPC_REGNUM (C0_REGNUM + 15) /* Trap pc */
343 #define TNPC_REGNUM (C0_REGNUM + 16) /* Trap npc */
344 #define WSTATE_REGNUM (C0_REGNUM + 17) /* Window State */
345 #define CWP_REGNUM (C0_REGNUM + 18) /* Current Window Pointer */
346 #define CANSAVE_REGNUM (C0_REGNUM + 19) /* Savable Windows */
347 #define CANRESTORE_REGNUM (C0_REGNUM + 20) /* Restorable Windows */
348 #define CLEANWIN_REGNUM (C0_REGNUM + 21) /* Clean Windows */
349 #define OTHERWIN_REGNUM (C0_REGNUM + 22) /* Other Windows */
350 #define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n)) /* Ancillary State Register
351 (n = 16...31) */
352 #define ICC_REGNUM (C0_REGNUM + 39) /* 32 bit condition codes */
353 #define XCC_REGNUM (C0_REGNUM + 40) /* 64 bit condition codes */
354 #define FCC0_REGNUM (C0_REGNUM + 41) /* fp cc reg 0 */
355 #define FCC1_REGNUM (C0_REGNUM + 42) /* fp cc reg 1 */
356 #define FCC2_REGNUM (C0_REGNUM + 43) /* fp cc reg 2 */
357 #define FCC3_REGNUM (C0_REGNUM + 44) /* fp cc reg 3 */
358
359 /* Number of machine registers. */
360
361 #undef NUM_REGS
362 #define NUM_REGS 125
363
364 /* Total amount of space needed to store our copies of the machine's
365 register state, the array `registers'.
366 Some of the registers aren't 64 bits, but it's a lot simpler just to assume
367 they all are (since most of them are). */
368 #undef REGISTER_BYTES
369 #define REGISTER_BYTES (32*8+32*8+45*8)
370
371 /* Index within `registers' of the first byte of the space for
372 register N. */
373 #undef REGISTER_BYTE
374 #define REGISTER_BYTE(N) \
375 ((N) < 32 ? (N)*8 \
376 : (N) < 64 ? 32*8 + ((N)-32)*4 \
377 : (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8 \
378 : 64*8 + ((N)-C0_REGNUM)*8)
379
380 /* Say how long (ordinary) registers are. This is a piece of bogosity
381 used in push_word and a few other places; REGISTER_RAW_SIZE is the
382 real way to know how big a register is. */
383
384 #undef REGISTER_SIZE
385 #define REGISTER_SIZE 8
386
387 /* Number of bytes of storage in the actual machine representation
388 for register N. */
389
390 #undef REGISTER_RAW_SIZE
391 #define REGISTER_RAW_SIZE(N) \
392 ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
393
394 /* Number of bytes of storage in the program's representation
395 for register N. */
396
397 #undef REGISTER_VIRTUAL_SIZE
398 #define REGISTER_VIRTUAL_SIZE(N) \
399 ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
400
401 /* Largest value REGISTER_RAW_SIZE can have. */
402 /* tm-sparc.h defines this as 8, but play it safe. */
403
404 #undef MAX_REGISTER_RAW_SIZE
405 #define MAX_REGISTER_RAW_SIZE 8
406
407 /* Largest value REGISTER_VIRTUAL_SIZE can have. */
408 /* tm-sparc.h defines this as 8, but play it safe. */
409
410 #undef MAX_REGISTER_VIRTUAL_SIZE
411 #define MAX_REGISTER_VIRTUAL_SIZE 8
412
413 /* Return the GDB type object for the "standard" data type
414 of data in register N. */
415
416 #undef REGISTER_VIRTUAL_TYPE
417 #define REGISTER_VIRTUAL_TYPE(N) \
418 ((N) < 32 ? builtin_type_long_long \
419 : (N) < 64 ? builtin_type_float \
420 : (N) < 80 ? builtin_type_double \
421 : builtin_type_long_long)
422
423 /* We use to support both 32 bit and 64 bit pointers.
424 We can't anymore because TARGET_PTR_BIT must now be a constant. */
425 #undef TARGET_PTR_BIT
426 #define TARGET_PTR_BIT 64
427
428 /* Longs are 64 bits. */
429 #undef TARGET_LONG_BIT
430 #define TARGET_LONG_BIT 64
431
432 #undef TARGET_LONG_LONG_BIT
433 #define TARGET_LONG_LONG_BIT 64
434
435 /* Return number of bytes at start of arglist that are not really args. */
436
437 #undef FRAME_ARGS_SKIP
438 #define FRAME_ARGS_SKIP 136
439
440 #endif /* GDB_MULTI_ARCH */
441 \f
442 /* Offsets into jmp_buf.
443 FIXME: This was borrowed from the v8 stuff and will probably have to change
444 for v9. */
445
446 #define JB_ELEMENT_SIZE 8 /* Size of each element in jmp_buf */
447
448 #define JB_ONSSTACK 0
449 #define JB_SIGMASK 1
450 #define JB_SP 2
451 #define JB_PC 3
452 #define JB_NPC 4
453 #define JB_PSR 5
454 #define JB_G1 6
455 #define JB_O0 7
456 #define JB_WBCNT 8
457
458 /* Figure out where the longjmp will land. We expect that we have
459 just entered longjmp and haven't yet setup the stack frame, so the
460 args are still in the output regs. %o0 (O0_REGNUM) points at the
461 jmp_buf structure from which we extract the pc (JB_PC) that we will
462 land at. The pc is copied into ADDR. This routine returns true on
463 success */
464
465 extern int get_longjmp_target (CORE_ADDR *);
466
467 #define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
468
469 #undef TM_PRINT_INSN_MACH
470 #define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a
471