1 /* Target dependent code for CRIS, for GDB, the GNU debugger.
2 Copyright 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by Axis Communications AB.
4 Written by Hendrik Ruijter, Stefan Andersson, and Orjan Friberg.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
31 #include "opcode/cris.h"
32 #include "arch-utils.h"
35 /* To get entry_point_address. */
38 #include "solib.h" /* Support for shared libraries. */
39 #include "solib-svr4.h" /* For struct link_map_offsets. */
40 #include "gdb_string.h"
45 /* There are no floating point registers. Used in gdbserver low-linux.c. */
48 /* There are 16 general registers. */
51 /* There are 16 special registers. */
55 /* Register numbers of various important registers.
56 FP_REGNUM Contains address of executing stack frame.
57 STR_REGNUM Contains the address of structure return values.
58 RET_REGNUM Contains the return value when shorter than or equal to 32 bits
59 ARG1_REGNUM Contains the first parameter to a function.
60 ARG2_REGNUM Contains the second parameter to a function.
61 ARG3_REGNUM Contains the third parameter to a function.
62 ARG4_REGNUM Contains the fourth parameter to a function. Rest on stack.
63 SP_REGNUM Contains address of top of stack.
64 PC_REGNUM Contains address of next instruction.
65 SRP_REGNUM Subroutine return pointer register.
66 BRP_REGNUM Breakpoint return pointer register. */
68 /* FP_REGNUM = 8, SP_REGNUM = 14, and PC_REGNUM = 15 have been incorporated
69 into the multi-arch framework. */
73 /* Enums with respect to the general registers, valid for all
82 /* Enums with respect to the special registers, some of which may not be
83 applicable to all CRIS versions. */
101 extern const struct cris_spec_reg cris_spec_regs
[];
103 /* CRIS version, set via the user command 'set cris-version'. Affects
104 register names and sizes.*/
105 static int usr_cmd_cris_version
;
107 /* Indicates whether to trust the above variable. */
108 static int usr_cmd_cris_version_valid
= 0;
110 /* CRIS mode, set via the user command 'set cris-mode'. Affects availability
111 of some registers. */
112 static const char *usr_cmd_cris_mode
;
114 /* Indicates whether to trust the above variable. */
115 static int usr_cmd_cris_mode_valid
= 0;
117 static const char CRIS_MODE_USER
[] = "CRIS_MODE_USER";
118 static const char CRIS_MODE_SUPERVISOR
[] = "CRIS_MODE_SUPERVISOR";
119 static const char *cris_mode_enums
[] =
122 CRIS_MODE_SUPERVISOR
,
126 /* CRIS ABI, set via the user command 'set cris-abi'.
127 There are two flavours:
128 1. Original ABI with 32-bit doubles, where arguments <= 4 bytes are
130 2. New ABI with 64-bit doubles, where arguments <= 8 bytes are passed by
132 static const char *usr_cmd_cris_abi
;
134 /* Indicates whether to trust the above variable. */
135 static int usr_cmd_cris_abi_valid
= 0;
137 /* These variables are strings instead of enums to make them usable as
138 parameters to add_set_enum_cmd. */
139 static const char CRIS_ABI_ORIGINAL
[] = "CRIS_ABI_ORIGINAL";
140 static const char CRIS_ABI_V2
[] = "CRIS_ABI_V2";
141 static const char CRIS_ABI_SYMBOL
[] = ".$CRIS_ABI_V2";
142 static const char *cris_abi_enums
[] =
149 /* CRIS architecture specific information. */
153 const char *cris_mode
;
154 const char *cris_abi
;
157 /* Functions for accessing target dependent data. */
162 return (gdbarch_tdep (current_gdbarch
)->cris_version
);
168 return (gdbarch_tdep (current_gdbarch
)->cris_mode
);
174 return (gdbarch_tdep (current_gdbarch
)->cris_abi
);
177 /* For saving call-clobbered contents in R9 when returning structs. */
178 static CORE_ADDR struct_return_address
;
180 struct frame_extra_info
186 /* The instruction environment needed to find single-step breakpoints. */
188 struct instruction_environment
190 unsigned long reg
[NUM_GENREGS
];
191 unsigned long preg
[NUM_SPECREGS
];
192 unsigned long branch_break_address
;
193 unsigned long delay_slot_pc
;
194 unsigned long prefix_value
;
199 int delay_slot_pc_active
;
201 int disable_interrupt
;
204 /* Save old breakpoints in order to restore the state before a single_step.
205 At most, two breakpoints will have to be remembered. */
207 char binsn_quantum
[BREAKPOINT_MAX
];
208 static binsn_quantum break_mem
[2];
209 static CORE_ADDR next_pc
= 0;
210 static CORE_ADDR branch_target_address
= 0;
211 static unsigned char branch_break_inserted
= 0;
213 /* Machine-dependencies in CRIS for opcodes. */
215 /* Instruction sizes. */
216 enum cris_instruction_sizes
223 /* Addressing modes. */
224 enum cris_addressing_modes
231 /* Prefix addressing modes. */
232 enum cris_prefix_addressing_modes
234 PREFIX_INDEX_MODE
= 2,
235 PREFIX_ASSIGN_MODE
= 3,
237 /* Handle immediate byte offset addressing mode prefix format. */
238 PREFIX_OFFSET_MODE
= 2
241 /* Masks for opcodes. */
242 enum cris_opcode_masks
244 BRANCH_SIGNED_SHORT_OFFSET_MASK
= 0x1,
245 SIGNED_EXTEND_BIT_MASK
= 0x2,
246 SIGNED_BYTE_MASK
= 0x80,
247 SIGNED_BYTE_EXTEND_MASK
= 0xFFFFFF00,
248 SIGNED_WORD_MASK
= 0x8000,
249 SIGNED_WORD_EXTEND_MASK
= 0xFFFF0000,
250 SIGNED_DWORD_MASK
= 0x80000000,
251 SIGNED_QUICK_VALUE_MASK
= 0x20,
252 SIGNED_QUICK_VALUE_EXTEND_MASK
= 0xFFFFFFC0
255 /* Functions for opcodes. The general form of the ETRAX 16-bit instruction:
263 cris_get_operand2 (unsigned short insn
)
265 return ((insn
& 0xF000) >> 12);
269 cris_get_mode (unsigned short insn
)
271 return ((insn
& 0x0C00) >> 10);
275 cris_get_opcode (unsigned short insn
)
277 return ((insn
& 0x03C0) >> 6);
281 cris_get_size (unsigned short insn
)
283 return ((insn
& 0x0030) >> 4);
287 cris_get_operand1 (unsigned short insn
)
289 return (insn
& 0x000F);
292 /* Additional functions in order to handle opcodes. */
295 cris_get_wide_opcode (unsigned short insn
)
297 return ((insn
& 0x03E0) >> 5);
301 cris_get_short_size (unsigned short insn
)
303 return ((insn
& 0x0010) >> 4);
307 cris_get_quick_value (unsigned short insn
)
309 return (insn
& 0x003F);
313 cris_get_bdap_quick_offset (unsigned short insn
)
315 return (insn
& 0x00FF);
319 cris_get_branch_short_offset (unsigned short insn
)
321 return (insn
& 0x00FF);
325 cris_get_asr_shift_steps (unsigned long value
)
327 return (value
& 0x3F);
331 cris_get_asr_quick_shift_steps (unsigned short insn
)
333 return (insn
& 0x1F);
337 cris_get_clear_size (unsigned short insn
)
339 return ((insn
) & 0xC000);
343 cris_is_signed_extend_bit_on (unsigned short insn
)
345 return (((insn
) & 0x20) == 0x20);
349 cris_is_xflag_bit_on (unsigned short insn
)
351 return (((insn
) & 0x1000) == 0x1000);
355 cris_set_size_to_dword (unsigned short *insn
)
362 cris_get_signed_offset (unsigned short insn
)
364 return ((signed char) (insn
& 0x00FF));
367 /* Calls an op function given the op-type, working on the insn and the
369 static void cris_gdb_func (enum cris_op_type
, unsigned short, inst_env_type
*);
371 static CORE_ADDR
cris_skip_prologue_main (CORE_ADDR pc
, int frameless_p
);
373 static struct gdbarch
*cris_gdbarch_init (struct gdbarch_info
,
374 struct gdbarch_list
*);
376 static int cris_delayed_get_disassembler (bfd_vma
, disassemble_info
*);
378 static void cris_dump_tdep (struct gdbarch
*, struct ui_file
*);
380 static void cris_version_update (char *ignore_args
, int from_tty
,
381 struct cmd_list_element
*c
);
383 static void cris_mode_update (char *ignore_args
, int from_tty
,
384 struct cmd_list_element
*c
);
386 static void cris_abi_update (char *ignore_args
, int from_tty
,
387 struct cmd_list_element
*c
);
389 static CORE_ADDR
bfd_lookup_symbol (bfd
*, const char *);
391 /* Frames information. The definition of the struct frame_info is
395 enum frame_type type;
399 If the compilation option -fno-omit-frame-pointer is present the
400 variable frame will be set to the content of R8 which is the frame
403 The variable pc contains the address where execution is performed
404 in the present frame. The innermost frame contains the current content
405 of the register PC. All other frames contain the content of the
406 register PC in the next frame.
408 The variable `type' indicates the frame's type: normal, SIGTRAMP
409 (associated with a signal handler), dummy (associated with a dummy
412 The variable return_pc contains the address where execution should be
413 resumed when the present frame has finished, the return address.
415 The variable leaf_function is 1 if the return address is in the register
416 SRP, and 0 if it is on the stack.
418 Prologue instructions C-code.
419 The prologue may consist of (-fno-omit-frame-pointer)
423 move.d sp,r8 move.d sp,r8
425 movem rY,[sp] movem rY,[sp]
426 move.S rZ,[r8-U] move.S rZ,[r8-U]
428 where 1 is a non-terminal function, and 2 is a leaf-function.
430 Note that this assumption is extremely brittle, and will break at the
431 slightest change in GCC's prologue.
433 If local variables are declared or register contents are saved on stack
434 the subq-instruction will be present with X as the number of bytes
435 needed for storage. The reshuffle with respect to r8 may be performed
436 with any size S (b, w, d) and any of the general registers Z={0..13}.
437 The offset U should be representable by a signed 8-bit value in all cases.
438 Thus, the prefix word is assumed to be immediate byte offset mode followed
439 by another word containing the instruction.
448 Prologue instructions C++-code.
449 Case 1) and 2) in the C-code may be followed by
455 move.S [r8+U],rZ ; P4
457 if any of the call parameters are stored. The host expects these
458 instructions to be executed in order to get the call parameters right. */
460 /* Examine the prologue of a function. The variable ip is the address of
461 the first instruction of the prologue. The variable limit is the address
462 of the first instruction after the prologue. The variable fi contains the
463 information in struct frame_info. The variable frameless_p controls whether
464 the entire prologue is examined (0) or just enough instructions to
465 determine that it is a prologue (1). */
468 cris_examine (CORE_ADDR ip
, CORE_ADDR limit
, struct frame_info
*fi
,
471 /* Present instruction. */
474 /* Next instruction, lookahead. */
475 unsigned short insn_next
;
478 /* Is there a push fp? */
481 /* Number of byte on stack used for local variables and movem. */
484 /* Highest register number in a movem. */
487 /* move.d r<source_register>,rS */
488 short source_register
;
490 /* This frame is with respect to a leaf until a push srp is found. */
491 fi
->extra_info
->leaf_function
= 1;
493 /* This frame is without the FP until a push fp is found. */
496 /* Assume nothing on stack. */
500 /* No information about register contents so far. */
502 /* We only want to know the end of the prologue when fi->saved_regs == 0.
503 When the saved registers are allocated full information is required. */
504 if (get_frame_saved_regs (fi
))
506 for (regno
= 0; regno
< NUM_REGS
; regno
++)
507 get_frame_saved_regs (fi
)[regno
] = 0;
510 /* Find the prologue instructions. */
513 insn
= read_memory_unsigned_integer (ip
, sizeof (short));
514 ip
+= sizeof (short);
517 /* push <reg> 32 bit instruction */
518 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
519 ip
+= sizeof (short);
520 regno
= cris_get_operand2 (insn_next
);
522 /* This check, meant to recognize srp, used to be regno ==
523 (SRP_REGNUM - NUM_GENREGS), but that covers r11 also. */
524 if (insn_next
== 0xBE7E)
530 fi
->extra_info
->leaf_function
= 0;
532 else if (regno
== FP_REGNUM
)
537 else if (insn
== 0x866E)
546 else if (cris_get_operand2 (insn
) == SP_REGNUM
547 && cris_get_mode (insn
) == 0x0000
548 && cris_get_opcode (insn
) == 0x000A)
551 val
= cris_get_quick_value (insn
);
553 else if (cris_get_mode (insn
) == 0x0002
554 && cris_get_opcode (insn
) == 0x000F
555 && cris_get_size (insn
) == 0x0003
556 && cris_get_operand1 (insn
) == SP_REGNUM
)
558 /* movem r<regsave>,[sp] */
563 regsave
= cris_get_operand2 (insn
);
565 else if (cris_get_operand2 (insn
) == SP_REGNUM
566 && ((insn
& 0x0F00) >> 8) == 0x0001
567 && (cris_get_signed_offset (insn
) < 0))
569 /* Immediate byte offset addressing prefix word with sp as base
570 register. Used for CRIS v8 i.e. ETRAX 100 and newer if <val>
571 is between 64 and 128.
572 movem r<regsave>,[sp=sp-<val>] */
573 val
= -cris_get_signed_offset (insn
);
574 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
575 ip
+= sizeof (short);
576 if (cris_get_mode (insn_next
) == PREFIX_ASSIGN_MODE
577 && cris_get_opcode (insn_next
) == 0x000F
578 && cris_get_size (insn_next
) == 0x0003
579 && cris_get_operand1 (insn_next
) == SP_REGNUM
)
585 regsave
= cris_get_operand2 (insn_next
);
589 /* The prologue ended before the limit was reached. */
590 ip
-= 2 * sizeof (short);
594 else if (cris_get_mode (insn
) == 0x0001
595 && cris_get_opcode (insn
) == 0x0009
596 && cris_get_size (insn
) == 0x0002)
598 /* move.d r<10..13>,r<0..15> */
603 source_register
= cris_get_operand1 (insn
);
605 /* FIXME? In the glibc solibs, the prologue might contain something
606 like (this example taken from relocate_doit):
609 which isn't covered by the source_register check below. Question
610 is whether to add a check for this combo, or make better use of
611 the limit variable instead. */
612 if (source_register
< ARG1_REGNUM
|| source_register
> ARG4_REGNUM
)
614 /* The prologue ended before the limit was reached. */
615 ip
-= sizeof (short);
619 else if (cris_get_operand2 (insn
) == FP_REGNUM
620 /* The size is a fixed-size. */
621 && ((insn
& 0x0F00) >> 8) == 0x0001
622 /* A negative offset. */
623 && (cris_get_signed_offset (insn
) < 0))
625 /* move.S rZ,[r8-U] (?) */
626 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
627 ip
+= sizeof (short);
628 regno
= cris_get_operand2 (insn_next
);
629 if ((regno
>= 0 && regno
< SP_REGNUM
)
630 && cris_get_mode (insn_next
) == PREFIX_OFFSET_MODE
631 && cris_get_opcode (insn_next
) == 0x000F)
633 /* move.S rZ,[r8-U] */
638 /* The prologue ended before the limit was reached. */
639 ip
-= 2 * sizeof (short);
643 else if (cris_get_operand2 (insn
) == FP_REGNUM
644 /* The size is a fixed-size. */
645 && ((insn
& 0x0F00) >> 8) == 0x0001
646 /* A positive offset. */
647 && (cris_get_signed_offset (insn
) > 0))
649 /* move.S [r8+U],rZ (?) */
650 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
651 ip
+= sizeof (short);
652 regno
= cris_get_operand2 (insn_next
);
653 if ((regno
>= 0 && regno
< SP_REGNUM
)
654 && cris_get_mode (insn_next
) == PREFIX_OFFSET_MODE
655 && cris_get_opcode (insn_next
) == 0x0009
656 && cris_get_operand1 (insn_next
) == regno
)
658 /* move.S [r8+U],rZ */
663 /* The prologue ended before the limit was reached. */
664 ip
-= 2 * sizeof (short);
670 /* The prologue ended before the limit was reached. */
671 ip
-= sizeof (short);
677 /* We only want to know the end of the prologue when
678 fi->saved_regs == 0. */
679 if (!get_frame_saved_regs (fi
))
684 get_frame_saved_regs (fi
)[FP_REGNUM
] = get_frame_base (fi
);
686 /* Calculate the addresses. */
687 for (regno
= regsave
; regno
>= 0; regno
--)
689 get_frame_saved_regs (fi
)[regno
] = get_frame_base (fi
) - val
;
692 if (fi
->extra_info
->leaf_function
)
694 /* Set the register SP to contain the stack pointer of
696 get_frame_saved_regs (fi
)[SP_REGNUM
] = get_frame_base (fi
) + 4;
700 /* Set the register SP to contain the stack pointer of
702 get_frame_saved_regs (fi
)[SP_REGNUM
] = get_frame_base (fi
) + 8;
704 /* Set the register SRP to contain the return address of
706 get_frame_saved_regs (fi
)[SRP_REGNUM
] = get_frame_base (fi
) + 4;
712 /* Advance pc beyond any function entry prologue instructions at pc
713 to reach some "real" code. */
716 cris_skip_prologue (CORE_ADDR pc
)
718 return cris_skip_prologue_main (pc
, 0);
721 /* As cris_skip_prologue, but stops as soon as it knows that the function
722 has a frame. Its result is equal to its input pc if the function is
723 frameless, unequal otherwise. */
726 cris_skip_prologue_frameless_p (CORE_ADDR pc
)
728 return cris_skip_prologue_main (pc
, 1);
731 /* Given a PC value corresponding to the start of a function, return the PC
732 of the first instruction after the function prologue. */
735 cris_skip_prologue_main (CORE_ADDR pc
, int frameless_p
)
737 struct cleanup
*old_chain
= make_cleanup (null_cleanup
, NULL
);
738 struct frame_info
*fi
;
739 struct symtab_and_line sal
= find_pc_line (pc
, 0);
741 CORE_ADDR pc_after_prologue
;
743 /* frame_info now contains dynamic memory. Since fi is a dummy
744 here, I don't bother allocating memory for saved_regs. */
745 fi
= deprecated_frame_xmalloc_with_cleanup (0, sizeof (struct frame_extra_info
));
747 /* If there is no symbol information then sal.end == 0, and we end up
748 examining only the first instruction in the function prologue.
749 Exaggerating the limit seems to be harmless. */
751 best_limit
= sal
.end
;
753 best_limit
= pc
+ 100;
755 pc_after_prologue
= cris_examine (pc
, best_limit
, fi
, frameless_p
);
756 do_cleanups (old_chain
);
757 return pc_after_prologue
;
760 /* Use the program counter to determine the contents and size of a breakpoint
761 instruction. It returns a pointer to a string of bytes that encode a
762 breakpoint instruction, stores the length of the string to *lenptr, and
763 adjusts pcptr (if necessary) to point to the actual memory location where
764 the breakpoint should be inserted. */
766 const unsigned char *
767 cris_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
769 static unsigned char break_insn
[] = {0x38, 0xe9};
775 /* Returns the register SRP (subroutine return pointer) which must contain
776 the content of the register PC after a function call. */
779 cris_saved_pc_after_call (struct frame_info
*frame
)
781 return read_register (SRP_REGNUM
);
784 /* Returns 1 if spec_reg is applicable to the current gdbarch's CRIS version,
788 cris_spec_reg_applicable (struct cris_spec_reg spec_reg
)
790 int version
= cris_version ();
792 switch (spec_reg
.applicable_version
)
794 case cris_ver_version_all
:
796 case cris_ver_warning
:
797 /* Indeterminate/obsolete. */
800 /* Simulator only. */
803 return (version
>= 0 && version
<= 3);
805 return (version
>= 3);
807 return (version
== 8 || version
== 9);
809 return (version
>= 8);
811 return (version
>= 10);
813 /* Invalid cris version. */
818 /* Returns the register size in unit byte. Returns 0 for an unimplemented
819 register, -1 for an invalid register. */
822 cris_register_size (int regno
)
827 if (regno
>= 0 && regno
< NUM_GENREGS
)
829 /* General registers (R0 - R15) are 32 bits. */
832 else if (regno
>= NUM_GENREGS
&& regno
< NUM_REGS
)
834 /* Special register (R16 - R31). cris_spec_regs is zero-based.
835 Adjust regno accordingly. */
836 spec_regno
= regno
- NUM_GENREGS
;
838 /* The entries in cris_spec_regs are stored in register number order,
839 which means we can shortcut into the array when searching it. */
840 for (i
= spec_regno
; cris_spec_regs
[i
].name
!= NULL
; i
++)
842 if (cris_spec_regs
[i
].number
== spec_regno
843 && cris_spec_reg_applicable (cris_spec_regs
[i
]))
844 /* Go with the first applicable register. */
845 return cris_spec_regs
[i
].reg_size
;
847 /* Special register not applicable to this CRIS version. */
852 /* Invalid register. */
857 /* Nonzero if regno should not be fetched from the target. This is the case
858 for unimplemented (size 0) and non-existant registers. */
861 cris_cannot_fetch_register (int regno
)
863 return ((regno
< 0 || regno
>= NUM_REGS
)
864 || (cris_register_size (regno
) == 0));
867 /* Nonzero if regno should not be written to the target, for various
871 cris_cannot_store_register (int regno
)
873 /* There are three kinds of registers we refuse to write to.
874 1. Those that not implemented.
875 2. Those that are read-only (depends on the processor mode).
876 3. Those registers to which a write has no effect.
879 if (regno
< 0 || regno
>= NUM_REGS
|| cris_register_size (regno
) == 0)
880 /* Not implemented. */
883 else if (regno
== VR_REGNUM
)
887 else if (regno
== P0_REGNUM
|| regno
== P4_REGNUM
|| regno
== P8_REGNUM
)
888 /* Writing has no effect. */
891 else if (cris_mode () == CRIS_MODE_USER
)
893 if (regno
== IBR_REGNUM
|| regno
== BAR_REGNUM
|| regno
== BRP_REGNUM
894 || regno
== IRP_REGNUM
)
895 /* Read-only in user mode. */
902 /* Returns the register offset for the first byte of register regno's space
903 in the saved register state. Returns -1 for an invalid or unimplemented
907 cris_register_offset (int regno
)
913 if (regno
>= 0 && regno
< NUM_REGS
)
915 /* FIXME: The offsets should be cached and calculated only once,
916 when the architecture being debugged has changed. */
917 for (i
= 0; i
< regno
; i
++)
918 offset
+= cris_register_size (i
);
924 /* Invalid register. */
929 /* Return the GDB type (defined in gdbtypes.c) for the "standard" data type
930 of data in register regno. */
933 cris_register_virtual_type (int regno
)
935 if (regno
== SP_REGNUM
|| regno
== PC_REGNUM
936 || (regno
> P8_REGNUM
&& regno
< USP_REGNUM
))
938 /* SP, PC, IBR, IRP, SRP, BAR, DCCR, BRP */
939 return lookup_pointer_type (builtin_type_void
);
941 else if (regno
== P8_REGNUM
|| regno
== USP_REGNUM
942 || (regno
>= 0 && regno
< SP_REGNUM
))
944 /* R0 - R13, P8, P15 */
945 return builtin_type_unsigned_long
;
947 else if (regno
> P3_REGNUM
&& regno
< P8_REGNUM
)
949 /* P4, CCR, DCR0, DCR1 */
950 return builtin_type_unsigned_short
;
952 else if (regno
> PC_REGNUM
&& regno
< P4_REGNUM
)
955 return builtin_type_unsigned_char
;
959 /* Invalid register. */
960 return builtin_type_void
;
964 /* Stores a function return value of type type, where valbuf is the address
965 of the value to be stored. */
967 /* In the original CRIS ABI, R10 is used to store return values. */
970 cris_abi_original_store_return_value (struct type
*type
, char *valbuf
)
972 int len
= TYPE_LENGTH (type
);
974 if (len
<= REGISTER_SIZE
)
975 deprecated_write_register_bytes (REGISTER_BYTE (RET_REGNUM
), valbuf
, len
);
977 internal_error (__FILE__
, __LINE__
, "cris_abi_original_store_return_value: type length too large.");
980 /* In the CRIS ABI V2, R10 and R11 are used to store return values. */
983 cris_abi_v2_store_return_value (struct type
*type
, char *valbuf
)
985 int len
= TYPE_LENGTH (type
);
987 if (len
<= 2 * REGISTER_SIZE
)
989 /* Note that this works since R10 and R11 are consecutive registers. */
990 deprecated_write_register_bytes (REGISTER_BYTE (RET_REGNUM
), valbuf
,
994 internal_error (__FILE__
, __LINE__
, "cris_abi_v2_store_return_value: type length too large.");
997 /* Return the name of register regno as a string. Return NULL for an invalid or
998 unimplemented register. */
1001 cris_register_name (int regno
)
1003 static char *cris_genreg_names
[] =
1004 { "r0", "r1", "r2", "r3", \
1005 "r4", "r5", "r6", "r7", \
1006 "r8", "r9", "r10", "r11", \
1007 "r12", "r13", "sp", "pc" };
1012 if (regno
>= 0 && regno
< NUM_GENREGS
)
1014 /* General register. */
1015 return cris_genreg_names
[regno
];
1017 else if (regno
>= NUM_GENREGS
&& regno
< NUM_REGS
)
1019 /* Special register (R16 - R31). cris_spec_regs is zero-based.
1020 Adjust regno accordingly. */
1021 spec_regno
= regno
- NUM_GENREGS
;
1023 /* The entries in cris_spec_regs are stored in register number order,
1024 which means we can shortcut into the array when searching it. */
1025 for (i
= spec_regno
; cris_spec_regs
[i
].name
!= NULL
; i
++)
1027 if (cris_spec_regs
[i
].number
== spec_regno
1028 && cris_spec_reg_applicable (cris_spec_regs
[i
]))
1029 /* Go with the first applicable register. */
1030 return cris_spec_regs
[i
].name
;
1032 /* Special register not applicable to this CRIS version. */
1037 /* Invalid register. */
1043 cris_register_bytes_ok (long bytes
)
1045 return (bytes
== REGISTER_BYTES
);
1048 /* Extract from an array regbuf containing the raw register state a function
1049 return value of type type, and copy that, in virtual format, into
1052 /* In the original CRIS ABI, R10 is used to return values. */
1055 cris_abi_original_extract_return_value (struct type
*type
, char *regbuf
,
1058 int len
= TYPE_LENGTH (type
);
1060 if (len
<= REGISTER_SIZE
)
1061 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET_REGNUM
), len
);
1063 internal_error (__FILE__
, __LINE__
, "cris_abi_original_extract_return_value: type length too large");
1066 /* In the CRIS ABI V2, R10 and R11 are used to store return values. */
1069 cris_abi_v2_extract_return_value (struct type
*type
, char *regbuf
,
1072 int len
= TYPE_LENGTH (type
);
1074 if (len
<= 2 * REGISTER_SIZE
)
1075 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET_REGNUM
), len
);
1077 internal_error (__FILE__
, __LINE__
, "cris_abi_v2_extract_return_value: type length too large");
1080 /* Store the address of the place in which to copy the structure the
1081 subroutine will return. In the CRIS ABI, R9 is used in order to pass
1082 the address of the allocated area where a structure return value must
1083 be stored. R9 is call-clobbered, which means we must save it here for
1087 cris_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1089 write_register (STR_REGNUM
, addr
);
1090 struct_return_address
= addr
;
1093 /* Extract from regbuf the address where a function should return a
1094 structure value. It's not there in the CRIS ABI, so we must do it another
1098 cris_extract_struct_value_address (char *regbuf
)
1100 return struct_return_address
;
1103 /* Returns 1 if a value of the given type being returned from a function
1104 must have space allocated for it on the stack. gcc_p is true if the
1105 function being considered is known to have been compiled by GCC.
1106 In the CRIS ABI, structure return values are passed to the called
1107 function by reference in register R9 to a caller-allocated area, so
1108 this is always true. */
1111 cris_use_struct_convention (int gcc_p
, struct type
*type
)
1116 /* Returns 1 if the given type will be passed by pointer rather than
1119 /* In the original CRIS ABI, arguments shorter than or equal to 32 bits are
1123 cris_abi_original_reg_struct_has_addr (int gcc_p
, struct type
*type
)
1125 return (TYPE_LENGTH (type
) > 4);
1128 /* In the CRIS ABI V2, arguments shorter than or equal to 64 bits are passed
1132 cris_abi_v2_reg_struct_has_addr (int gcc_p
, struct type
*type
)
1134 return (TYPE_LENGTH (type
) > 8);
1137 /* Returns 1 if the function invocation represented by fi does not have a
1138 stack frame associated with it. Otherwise return 0. */
1141 cris_frameless_function_invocation (struct frame_info
*fi
)
1143 if ((get_frame_type (fi
) == SIGTRAMP_FRAME
))
1146 return frameless_look_for_prologue (fi
);
1149 /* See frame.h. Determines the address of all registers in the current stack
1150 frame storing each in frame->saved_regs. Space for frame->saved_regs shall
1151 be allocated by FRAME_INIT_SAVED_REGS using either frame_saved_regs_zalloc
1152 or frame_obstack_alloc. */
1155 cris_frame_init_saved_regs (struct frame_info
*fi
)
1158 struct symtab_and_line sal
;
1160 char *dummy_regs
= deprecated_generic_find_dummy_frame (get_frame_pc (fi
), fi
->frame
);
1162 /* Examine the entire prologue. */
1163 register int frameless_p
= 0;
1165 /* Has this frame's registers already been initialized? */
1166 if (get_frame_saved_regs (fi
))
1169 frame_saved_regs_zalloc (fi
);
1173 /* I don't see this ever happening, considering the context in which
1174 cris_frame_init_saved_regs is called (always when we're not in
1176 memcpy (&fi
->saved_regs
, dummy_regs
, sizeof (fi
->saved_regs
));
1180 ip
= get_pc_function_start (get_frame_pc (fi
));
1181 sal
= find_pc_line (ip
, 0);
1183 /* If there is no symbol information then sal.end == 0, and we end up
1184 examining only the first instruction in the function prologue.
1185 Exaggerating the limit seems to be harmless. */
1187 best_limit
= sal
.end
;
1189 best_limit
= ip
+ 100;
1191 cris_examine (ip
, best_limit
, fi
, frameless_p
);
1195 /* Initialises the extra frame information at the creation of a new frame.
1196 The inparameter fromleaf is 0 when the call is from create_new_frame.
1197 When the call is from get_prev_frame_info, fromleaf is determined by
1198 cris_frameless_function_invocation. */
1201 cris_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1205 /* Called from get_prev_frame. */
1206 deprecated_update_frame_pc_hack (fi
, FRAME_SAVED_PC (fi
->next
));
1209 fi
->extra_info
= (struct frame_extra_info
*)
1210 frame_obstack_alloc (sizeof (struct frame_extra_info
));
1212 fi
->extra_info
->return_pc
= 0;
1213 fi
->extra_info
->leaf_function
= 0;
1215 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), fi
->frame
, fi
->frame
))
1217 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
1218 by assuming it's always FP. */
1219 deprecated_update_frame_base_hack (fi
, deprecated_read_register_dummy (get_frame_pc (fi
), fi
->frame
,
1221 fi
->extra_info
->return_pc
=
1222 deprecated_read_register_dummy (get_frame_pc (fi
), fi
->frame
, PC_REGNUM
);
1224 /* FIXME: Is this necessarily true? */
1225 fi
->extra_info
->leaf_function
= 0;
1229 cris_frame_init_saved_regs (fi
);
1231 /* Check fromleaf/frameless_function_invocation. (FIXME) */
1233 if (get_frame_saved_regs (fi
)[SRP_REGNUM
] != 0)
1235 /* SRP was saved on the stack; non-leaf function. */
1236 fi
->extra_info
->return_pc
=
1237 read_memory_integer (get_frame_saved_regs (fi
)[SRP_REGNUM
],
1238 REGISTER_RAW_SIZE (SRP_REGNUM
));
1242 /* SRP is still in a register; leaf function. */
1243 fi
->extra_info
->return_pc
= read_register (SRP_REGNUM
);
1244 /* FIXME: Should leaf_function be set to 1 here? */
1245 fi
->extra_info
->leaf_function
= 1;
1250 /* Return the content of the frame pointer in the present frame. In other
1251 words, determine the address of the calling function's frame. */
1254 cris_frame_chain (struct frame_info
*fi
)
1256 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), fi
->frame
, fi
->frame
))
1260 else if (!inside_entry_file (get_frame_pc (fi
)))
1262 return read_memory_unsigned_integer (get_frame_base (fi
), 4);
1270 /* Return the saved PC (which equals the return address) of this frame. */
1273 cris_frame_saved_pc (struct frame_info
*fi
)
1275 return fi
->extra_info
->return_pc
;
1278 /* Setup the function arguments for calling a function in the inferior. */
1281 cris_abi_original_push_arguments (int nargs
, struct value
**args
,
1282 CORE_ADDR sp
, int struct_return
,
1283 CORE_ADDR struct_addr
)
1294 /* Data and parameters reside in different areas on the stack.
1295 Both frame pointers grow toward higher addresses. */
1296 CORE_ADDR fp_params
;
1299 /* Are we returning a value using a structure return or a normal value
1300 return? struct_addr is the address of the reserved space for the return
1301 structure to be written on the stack. */
1304 write_register (STR_REGNUM
, struct_addr
);
1307 /* Make sure there's space on the stack. Allocate space for data and a
1308 parameter to refer to that data. */
1309 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
1310 stack_alloc
+= (TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + REGISTER_SIZE
);
1312 /* We may over-allocate a little here, but that won't hurt anything. */
1314 /* Initialize stack frame pointers. */
1316 fp_data
= sp
+ (nargs
* REGISTER_SIZE
);
1318 /* Now load as many as possible of the first arguments into
1319 registers, and push the rest onto the stack. */
1320 argreg
= ARG1_REGNUM
;
1323 for (argnum
= 0; argnum
< nargs
; argnum
++)
1325 type
= VALUE_TYPE (args
[argnum
]);
1326 len
= TYPE_LENGTH (type
);
1327 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1329 if (len
<= REGISTER_SIZE
&& argreg
<= ARG4_REGNUM
)
1331 /* Data fits in a register; put it in the first available
1333 write_register (argreg
, *(unsigned long *) val
);
1336 else if (len
> REGISTER_SIZE
&& argreg
<= ARG4_REGNUM
)
1338 /* Data does not fit in register; pass it on the stack and
1339 put its address in the first available register. */
1340 write_memory (fp_data
, val
, len
);
1341 write_register (argreg
, fp_data
);
1345 else if (len
> REGISTER_SIZE
)
1347 /* Data does not fit in register; put both data and
1348 parameter on the stack. */
1349 write_memory (fp_data
, val
, len
);
1350 write_memory (fp_params
, (char *) (&fp_data
), REGISTER_SIZE
);
1352 fp_params
+= REGISTER_SIZE
;
1356 /* Data fits in a register, but we are out of registers;
1357 put the parameter on the stack. */
1358 write_memory (fp_params
, val
, REGISTER_SIZE
);
1359 fp_params
+= REGISTER_SIZE
;
1367 cris_abi_v2_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1368 int struct_return
, CORE_ADDR struct_addr
)
1377 /* The function's arguments and memory allocated by gdb for the arguments to
1378 point at reside in separate areas on the stack.
1379 Both frame pointers grow toward higher addresses. */
1383 /* Are we returning a value using a structure return or a normal value
1384 return? struct_addr is the address of the reserved space for the return
1385 structure to be written on the stack. */
1388 write_register (STR_REGNUM
, struct_addr
);
1391 /* Allocate enough to keep things word-aligned on both parts of the
1394 for (argnum
= 0; argnum
< nargs
; argnum
++)
1399 len
= TYPE_LENGTH (VALUE_TYPE (args
[argnum
]));
1400 reg_demand
= (len
/ REGISTER_SIZE
) + (len
% REGISTER_SIZE
!= 0 ? 1 : 0);
1402 /* reg_demand * REGISTER_SIZE is the amount of memory we might need to
1403 allocate for this argument. 2 * REGISTER_SIZE is the amount of stack
1404 space we might need to pass the argument itself (either by value or by
1406 stack_alloc
+= (reg_demand
* REGISTER_SIZE
+ 2 * REGISTER_SIZE
);
1409 /* We may over-allocate a little here, but that won't hurt anything. */
1411 /* Initialize frame pointers. */
1413 fp_mem
= sp
+ (nargs
* (2 * REGISTER_SIZE
));
1415 /* Now load as many as possible of the first arguments into registers,
1416 and push the rest onto the stack. */
1417 argreg
= ARG1_REGNUM
;
1420 for (argnum
= 0; argnum
< nargs
; argnum
++)
1427 len
= TYPE_LENGTH (VALUE_TYPE (args
[argnum
]));
1428 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1430 /* How may registers worth of storage do we need for this argument? */
1431 reg_demand
= (len
/ REGISTER_SIZE
) + (len
% REGISTER_SIZE
!= 0 ? 1 : 0);
1433 if (len
<= (2 * REGISTER_SIZE
)
1434 && (argreg
+ reg_demand
- 1 <= ARG4_REGNUM
))
1436 /* Data passed by value. Fits in available register(s). */
1437 for (i
= 0; i
< reg_demand
; i
++)
1439 write_register (argreg
, *(unsigned long *) val
);
1441 val
+= REGISTER_SIZE
;
1444 else if (len
<= (2 * REGISTER_SIZE
) && argreg
<= ARG4_REGNUM
)
1446 /* Data passed by value. Does not fit in available register(s).
1447 Use the register(s) first, then the stack. */
1448 for (i
= 0; i
< reg_demand
; i
++)
1450 if (argreg
<= ARG4_REGNUM
)
1452 write_register (argreg
, *(unsigned long *) val
);
1454 val
+= REGISTER_SIZE
;
1458 /* I guess this memory write could write the remaining data
1459 all at once instead of in REGISTER_SIZE chunks. */
1460 write_memory (fp_arg
, val
, REGISTER_SIZE
);
1461 fp_arg
+= REGISTER_SIZE
;
1462 val
+= REGISTER_SIZE
;
1466 else if (len
> (2 * REGISTER_SIZE
))
1468 /* Data passed by reference. Put it on the stack. */
1469 write_memory (fp_mem
, val
, len
);
1470 write_memory (fp_arg
, (char *) (&fp_mem
), REGISTER_SIZE
);
1472 /* fp_mem need not be word-aligned since it's just a chunk of
1473 memory being pointed at. That is, += len would do. */
1474 fp_mem
+= reg_demand
* REGISTER_SIZE
;
1475 fp_arg
+= REGISTER_SIZE
;
1479 /* Data passed by value. No available registers. Put it on
1481 write_memory (fp_arg
, val
, len
);
1483 /* fp_arg must be word-aligned (i.e., don't += len) to match
1484 the function prologue. */
1485 fp_arg
+= reg_demand
* REGISTER_SIZE
;
1492 /* Never put the return address on the stack. The register SRP is pushed
1493 by the called function unless it is a leaf-function. Due to the BRP
1494 register the PC will change when continue is sent. */
1497 cris_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1499 write_register (SRP_REGNUM
, CALL_DUMMY_ADDRESS ());
1503 /* Restore the machine to the state it had before the current frame
1504 was created. Discard the innermost frame from the stack and restore
1505 all saved registers. */
1508 cris_pop_frame (void)
1510 register struct frame_info
*fi
= get_current_frame ();
1512 register int stack_offset
= 0;
1514 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), fi
->frame
, fi
->frame
))
1516 /* This happens when we hit a breakpoint set at the entry point,
1517 when returning from a dummy frame. */
1518 generic_pop_dummy_frame ();
1522 cris_frame_init_saved_regs (fi
);
1524 /* For each register, the address of where it was saved on entry to
1525 the frame now lies in fi->saved_regs[regno], or zero if it was not
1526 saved. This includes special registers such as PC and FP saved in
1527 special ways in the stack frame. The SP_REGNUM is even more
1528 special, the address here is the SP for the next frame, not the
1529 address where the SP was saved. */
1531 /* Restore general registers R0 - R7. They were pushed on the stack
1532 after SP was saved. */
1533 for (regno
= 0; regno
< FP_REGNUM
; regno
++)
1535 if (get_frame_saved_regs (fi
)[regno
])
1537 write_register (regno
,
1538 read_memory_integer (get_frame_saved_regs (fi
)[regno
], 4));
1542 if (get_frame_saved_regs (fi
)[FP_REGNUM
])
1544 /* Pop the frame pointer (R8). It was pushed before SP
1546 write_register (FP_REGNUM
,
1547 read_memory_integer (get_frame_saved_regs (fi
)[FP_REGNUM
], 4));
1550 /* Not a leaf function. */
1551 if (get_frame_saved_regs (fi
)[SRP_REGNUM
])
1553 /* SRP was pushed before SP was saved. */
1557 /* Restore the SP and adjust for R8 and (possibly) SRP. */
1558 write_register (SP_REGNUM
, get_frame_saved_regs (fi
)[FP_REGNUM
] + stack_offset
);
1562 /* Currently, we can't get the correct info into fi->saved_regs
1563 without a frame pointer. */
1566 /* Restore the PC. */
1567 write_register (PC_REGNUM
, fi
->extra_info
->return_pc
);
1569 flush_cached_frames ();
1572 /* Calculates a value that measures how good inst_args constraints an
1573 instruction. It stems from cris_constraint, found in cris-dis.c. */
1576 constraint (unsigned int insn
, const signed char *inst_args
,
1577 inst_env_type
*inst_env
)
1582 const char *s
= inst_args
;
1588 if ((insn
& 0x30) == 0x30)
1593 /* A prefix operand. */
1594 if (inst_env
->prefix_found
)
1600 /* A "push" prefix. (This check was REMOVED by san 970921.) Check for
1601 valid "push" size. In case of special register, it may be != 4. */
1602 if (inst_env
->prefix_found
)
1608 retval
= (((insn
>> 0xC) & 0xF) == (insn
& 0xF));
1616 tmp
= (insn
>> 0xC) & 0xF;
1618 for (i
= 0; cris_spec_regs
[i
].name
!= NULL
; i
++)
1620 /* Since we match four bits, we will give a value of
1621 4 - 1 = 3 in a match. If there is a corresponding
1622 exact match of a special register in another pattern, it
1623 will get a value of 4, which will be higher. This should
1624 be correct in that an exact pattern would match better that
1626 Note that there is a reason for not returning zero; the
1627 pattern for "clear" is partly matched in the bit-pattern
1628 (the two lower bits must be zero), while the bit-pattern
1629 for a move from a special register is matched in the
1630 register constraint.
1631 This also means we will will have a race condition if
1632 there is a partly match in three bits in the bit pattern. */
1633 if (tmp
== cris_spec_regs
[i
].number
)
1640 if (cris_spec_regs
[i
].name
== NULL
)
1647 /* Returns the number of bits set in the variable value. */
1650 number_of_bits (unsigned int value
)
1652 int number_of_bits
= 0;
1656 number_of_bits
+= 1;
1657 value
&= (value
- 1);
1659 return number_of_bits
;
1662 /* Finds the address that should contain the single step breakpoint(s).
1663 It stems from code in cris-dis.c. */
1666 find_cris_op (unsigned short insn
, inst_env_type
*inst_env
)
1669 int max_level_of_match
= -1;
1670 int max_matched
= -1;
1673 for (i
= 0; cris_opcodes
[i
].name
!= NULL
; i
++)
1675 if (((cris_opcodes
[i
].match
& insn
) == cris_opcodes
[i
].match
)
1676 && ((cris_opcodes
[i
].lose
& insn
) == 0))
1678 level_of_match
= constraint (insn
, cris_opcodes
[i
].args
, inst_env
);
1679 if (level_of_match
>= 0)
1682 number_of_bits (cris_opcodes
[i
].match
| cris_opcodes
[i
].lose
);
1683 if (level_of_match
> max_level_of_match
)
1686 max_level_of_match
= level_of_match
;
1687 if (level_of_match
== 16)
1689 /* All bits matched, cannot find better. */
1699 /* Attempts to find single-step breakpoints. Returns -1 on failure which is
1700 actually an internal error. */
1703 find_step_target (inst_env_type
*inst_env
)
1707 unsigned short insn
;
1709 /* Create a local register image and set the initial state. */
1710 for (i
= 0; i
< NUM_GENREGS
; i
++)
1712 inst_env
->reg
[i
] = (unsigned long) read_register (i
);
1714 offset
= NUM_GENREGS
;
1715 for (i
= 0; i
< NUM_SPECREGS
; i
++)
1717 inst_env
->preg
[i
] = (unsigned long) read_register (offset
+ i
);
1719 inst_env
->branch_found
= 0;
1720 inst_env
->slot_needed
= 0;
1721 inst_env
->delay_slot_pc_active
= 0;
1722 inst_env
->prefix_found
= 0;
1723 inst_env
->invalid
= 0;
1724 inst_env
->xflag_found
= 0;
1725 inst_env
->disable_interrupt
= 0;
1727 /* Look for a step target. */
1730 /* Read an instruction from the client. */
1731 insn
= read_memory_unsigned_integer (inst_env
->reg
[PC_REGNUM
], 2);
1733 /* If the instruction is not in a delay slot the new content of the
1734 PC is [PC] + 2. If the instruction is in a delay slot it is not
1735 that simple. Since a instruction in a delay slot cannot change
1736 the content of the PC, it does not matter what value PC will have.
1737 Just make sure it is a valid instruction. */
1738 if (!inst_env
->delay_slot_pc_active
)
1740 inst_env
->reg
[PC_REGNUM
] += 2;
1744 inst_env
->delay_slot_pc_active
= 0;
1745 inst_env
->reg
[PC_REGNUM
] = inst_env
->delay_slot_pc
;
1747 /* Analyse the present instruction. */
1748 i
= find_cris_op (insn
, inst_env
);
1751 inst_env
->invalid
= 1;
1755 cris_gdb_func (cris_opcodes
[i
].op
, insn
, inst_env
);
1757 } while (!inst_env
->invalid
1758 && (inst_env
->prefix_found
|| inst_env
->xflag_found
1759 || inst_env
->slot_needed
));
1763 /* There is no hardware single-step support. The function find_step_target
1764 digs through the opcodes in order to find all possible targets.
1765 Either one ordinary target or two targets for branches may be found. */
1768 cris_software_single_step (enum target_signal ignore
, int insert_breakpoints
)
1770 inst_env_type inst_env
;
1772 if (insert_breakpoints
)
1774 /* Analyse the present instruction environment and insert
1776 int status
= find_step_target (&inst_env
);
1779 /* Could not find a target. FIXME: Should do something. */
1783 /* Insert at most two breakpoints. One for the next PC content
1784 and possibly another one for a branch, jump, etc. */
1785 next_pc
= (CORE_ADDR
) inst_env
.reg
[PC_REGNUM
];
1786 target_insert_breakpoint (next_pc
, break_mem
[0]);
1787 if (inst_env
.branch_found
1788 && (CORE_ADDR
) inst_env
.branch_break_address
!= next_pc
)
1790 branch_target_address
=
1791 (CORE_ADDR
) inst_env
.branch_break_address
;
1792 target_insert_breakpoint (branch_target_address
, break_mem
[1]);
1793 branch_break_inserted
= 1;
1799 /* Remove breakpoints. */
1800 target_remove_breakpoint (next_pc
, break_mem
[0]);
1801 if (branch_break_inserted
)
1803 target_remove_breakpoint (branch_target_address
, break_mem
[1]);
1804 branch_break_inserted
= 0;
1809 /* Calculates the prefix value for quick offset addressing mode. */
1812 quick_mode_bdap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1814 /* It's invalid to be in a delay slot. You can't have a prefix to this
1815 instruction (not 100% sure). */
1816 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1818 inst_env
->invalid
= 1;
1822 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand2 (inst
)];
1823 inst_env
->prefix_value
+= cris_get_bdap_quick_offset (inst
);
1825 /* A prefix doesn't change the xflag_found. But the rest of the flags
1827 inst_env
->slot_needed
= 0;
1828 inst_env
->prefix_found
= 1;
1831 /* Updates the autoincrement register. The size of the increment is derived
1832 from the size of the operation. The PC is always kept aligned on even
1836 process_autoincrement (int size
, unsigned short inst
, inst_env_type
*inst_env
)
1838 if (size
== INST_BYTE_SIZE
)
1840 inst_env
->reg
[cris_get_operand1 (inst
)] += 1;
1842 /* The PC must be word aligned, so increase the PC with one
1843 word even if the size is byte. */
1844 if (cris_get_operand1 (inst
) == REG_PC
)
1846 inst_env
->reg
[REG_PC
] += 1;
1849 else if (size
== INST_WORD_SIZE
)
1851 inst_env
->reg
[cris_get_operand1 (inst
)] += 2;
1853 else if (size
== INST_DWORD_SIZE
)
1855 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
1860 inst_env
->invalid
= 1;
1864 /* Just a forward declaration. */
1867 get_data_from_address (unsigned short *inst
, CORE_ADDR address
);
1869 /* Calculates the prefix value for the general case of offset addressing
1873 bdap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1878 /* It's invalid to be in a delay slot. */
1879 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1881 inst_env
->invalid
= 1;
1885 /* The calculation of prefix_value used to be after process_autoincrement,
1886 but that fails for an instruction such as jsr [$r0+12] which is encoded
1887 as 5f0d 0c00 30b9 when compiled with -fpic. Since PC is operand1 it
1888 mustn't be incremented until we have read it and what it points at. */
1889 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand2 (inst
)];
1891 /* The offset is an indirection of the contents of the operand1 register. */
1892 inst_env
->prefix_value
+=
1893 get_data_from_address (&inst
, inst_env
->reg
[cris_get_operand1 (inst
)]);
1895 if (cris_get_mode (inst
) == AUTOINC_MODE
)
1897 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
1900 /* A prefix doesn't change the xflag_found. But the rest of the flags
1902 inst_env
->slot_needed
= 0;
1903 inst_env
->prefix_found
= 1;
1906 /* Calculates the prefix value for the index addressing mode. */
1909 biap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1911 /* It's invalid to be in a delay slot. I can't see that it's possible to
1912 have a prefix to this instruction. So I will treat this as invalid. */
1913 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1915 inst_env
->invalid
= 1;
1919 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand1 (inst
)];
1921 /* The offset is the operand2 value shifted the size of the instruction
1923 inst_env
->prefix_value
+=
1924 inst_env
->reg
[cris_get_operand2 (inst
)] << cris_get_size (inst
);
1926 /* If the PC is operand1 (base) the address used is the address after
1927 the main instruction, i.e. address + 2 (the PC is already compensated
1928 for the prefix operation). */
1929 if (cris_get_operand1 (inst
) == REG_PC
)
1931 inst_env
->prefix_value
+= 2;
1934 /* A prefix doesn't change the xflag_found. But the rest of the flags
1936 inst_env
->slot_needed
= 0;
1937 inst_env
->xflag_found
= 0;
1938 inst_env
->prefix_found
= 1;
1941 /* Calculates the prefix value for the double indirect addressing mode. */
1944 dip_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1949 /* It's invalid to be in a delay slot. */
1950 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1952 inst_env
->invalid
= 1;
1956 /* The prefix value is one dereference of the contents of the operand1
1958 address
= (CORE_ADDR
) inst_env
->reg
[cris_get_operand1 (inst
)];
1959 inst_env
->prefix_value
= read_memory_unsigned_integer (address
, 4);
1961 /* Check if the mode is autoincrement. */
1962 if (cris_get_mode (inst
) == AUTOINC_MODE
)
1964 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
1967 /* A prefix doesn't change the xflag_found. But the rest of the flags
1969 inst_env
->slot_needed
= 0;
1970 inst_env
->xflag_found
= 0;
1971 inst_env
->prefix_found
= 1;
1974 /* Finds the destination for a branch with 8-bits offset. */
1977 eight_bit_offset_branch_op (unsigned short inst
, inst_env_type
*inst_env
)
1982 /* If we have a prefix or are in a delay slot it's bad. */
1983 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1985 inst_env
->invalid
= 1;
1989 /* We have a branch, find out where the branch will land. */
1990 offset
= cris_get_branch_short_offset (inst
);
1992 /* Check if the offset is signed. */
1993 if (offset
& BRANCH_SIGNED_SHORT_OFFSET_MASK
)
1998 /* The offset ends with the sign bit, set it to zero. The address
1999 should always be word aligned. */
2000 offset
&= ~BRANCH_SIGNED_SHORT_OFFSET_MASK
;
2002 inst_env
->branch_found
= 1;
2003 inst_env
->branch_break_address
= inst_env
->reg
[REG_PC
] + offset
;
2005 inst_env
->slot_needed
= 1;
2006 inst_env
->prefix_found
= 0;
2007 inst_env
->xflag_found
= 0;
2008 inst_env
->disable_interrupt
= 1;
2011 /* Finds the destination for a branch with 16-bits offset. */
2014 sixteen_bit_offset_branch_op (unsigned short inst
, inst_env_type
*inst_env
)
2018 /* If we have a prefix or is in a delay slot it's bad. */
2019 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
2021 inst_env
->invalid
= 1;
2025 /* We have a branch, find out the offset for the branch. */
2026 offset
= read_memory_integer (inst_env
->reg
[REG_PC
], 2);
2028 /* The instruction is one word longer than normal, so add one word
2030 inst_env
->reg
[REG_PC
] += 2;
2032 inst_env
->branch_found
= 1;
2033 inst_env
->branch_break_address
= inst_env
->reg
[REG_PC
] + offset
;
2036 inst_env
->slot_needed
= 1;
2037 inst_env
->prefix_found
= 0;
2038 inst_env
->xflag_found
= 0;
2039 inst_env
->disable_interrupt
= 1;
2042 /* Handles the ABS instruction. */
2045 abs_op (unsigned short inst
, inst_env_type
*inst_env
)
2050 /* ABS can't have a prefix, so it's bad if it does. */
2051 if (inst_env
->prefix_found
)
2053 inst_env
->invalid
= 1;
2057 /* Check if the operation affects the PC. */
2058 if (cris_get_operand2 (inst
) == REG_PC
)
2061 /* It's invalid to change to the PC if we are in a delay slot. */
2062 if (inst_env
->slot_needed
)
2064 inst_env
->invalid
= 1;
2068 value
= (long) inst_env
->reg
[REG_PC
];
2070 /* The value of abs (SIGNED_DWORD_MASK) is SIGNED_DWORD_MASK. */
2071 if (value
!= SIGNED_DWORD_MASK
)
2074 inst_env
->reg
[REG_PC
] = (long) value
;
2078 inst_env
->slot_needed
= 0;
2079 inst_env
->prefix_found
= 0;
2080 inst_env
->xflag_found
= 0;
2081 inst_env
->disable_interrupt
= 0;
2084 /* Handles the ADDI instruction. */
2087 addi_op (unsigned short inst
, inst_env_type
*inst_env
)
2089 /* It's invalid to have the PC as base register. And ADDI can't have
2091 if (inst_env
->prefix_found
|| (cris_get_operand1 (inst
) == REG_PC
))
2093 inst_env
->invalid
= 1;
2097 inst_env
->slot_needed
= 0;
2098 inst_env
->prefix_found
= 0;
2099 inst_env
->xflag_found
= 0;
2100 inst_env
->disable_interrupt
= 0;
2103 /* Handles the ASR instruction. */
2106 asr_op (unsigned short inst
, inst_env_type
*inst_env
)
2109 unsigned long value
;
2110 unsigned long signed_extend_mask
= 0;
2112 /* ASR can't have a prefix, so check that it doesn't. */
2113 if (inst_env
->prefix_found
)
2115 inst_env
->invalid
= 1;
2119 /* Check if the PC is the target register. */
2120 if (cris_get_operand2 (inst
) == REG_PC
)
2122 /* It's invalid to change the PC in a delay slot. */
2123 if (inst_env
->slot_needed
)
2125 inst_env
->invalid
= 1;
2128 /* Get the number of bits to shift. */
2129 shift_steps
= cris_get_asr_shift_steps (inst_env
->reg
[cris_get_operand1 (inst
)]);
2130 value
= inst_env
->reg
[REG_PC
];
2132 /* Find out how many bits the operation should apply to. */
2133 if (cris_get_size (inst
) == INST_BYTE_SIZE
)
2135 if (value
& SIGNED_BYTE_MASK
)
2137 signed_extend_mask
= 0xFF;
2138 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2139 signed_extend_mask
= ~signed_extend_mask
;
2141 value
= value
>> shift_steps
;
2142 value
|= signed_extend_mask
;
2144 inst_env
->reg
[REG_PC
] &= 0xFFFFFF00;
2145 inst_env
->reg
[REG_PC
] |= value
;
2147 else if (cris_get_size (inst
) == INST_WORD_SIZE
)
2149 if (value
& SIGNED_WORD_MASK
)
2151 signed_extend_mask
= 0xFFFF;
2152 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2153 signed_extend_mask
= ~signed_extend_mask
;
2155 value
= value
>> shift_steps
;
2156 value
|= signed_extend_mask
;
2158 inst_env
->reg
[REG_PC
] &= 0xFFFF0000;
2159 inst_env
->reg
[REG_PC
] |= value
;
2161 else if (cris_get_size (inst
) == INST_DWORD_SIZE
)
2163 if (value
& SIGNED_DWORD_MASK
)
2165 signed_extend_mask
= 0xFFFFFFFF;
2166 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2167 signed_extend_mask
= ~signed_extend_mask
;
2169 value
= value
>> shift_steps
;
2170 value
|= signed_extend_mask
;
2171 inst_env
->reg
[REG_PC
] = value
;
2174 inst_env
->slot_needed
= 0;
2175 inst_env
->prefix_found
= 0;
2176 inst_env
->xflag_found
= 0;
2177 inst_env
->disable_interrupt
= 0;
2180 /* Handles the ASRQ instruction. */
2183 asrq_op (unsigned short inst
, inst_env_type
*inst_env
)
2187 unsigned long value
;
2188 unsigned long signed_extend_mask
= 0;
2190 /* ASRQ can't have a prefix, so check that it doesn't. */
2191 if (inst_env
->prefix_found
)
2193 inst_env
->invalid
= 1;
2197 /* Check if the PC is the target register. */
2198 if (cris_get_operand2 (inst
) == REG_PC
)
2201 /* It's invalid to change the PC in a delay slot. */
2202 if (inst_env
->slot_needed
)
2204 inst_env
->invalid
= 1;
2207 /* The shift size is given as a 5 bit quick value, i.e. we don't
2208 want the the sign bit of the quick value. */
2209 shift_steps
= cris_get_asr_shift_steps (inst
);
2210 value
= inst_env
->reg
[REG_PC
];
2211 if (value
& SIGNED_DWORD_MASK
)
2213 signed_extend_mask
= 0xFFFFFFFF;
2214 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2215 signed_extend_mask
= ~signed_extend_mask
;
2217 value
= value
>> shift_steps
;
2218 value
|= signed_extend_mask
;
2219 inst_env
->reg
[REG_PC
] = value
;
2221 inst_env
->slot_needed
= 0;
2222 inst_env
->prefix_found
= 0;
2223 inst_env
->xflag_found
= 0;
2224 inst_env
->disable_interrupt
= 0;
2227 /* Handles the AX, EI and SETF instruction. */
2230 ax_ei_setf_op (unsigned short inst
, inst_env_type
*inst_env
)
2232 if (inst_env
->prefix_found
)
2234 inst_env
->invalid
= 1;
2237 /* Check if the instruction is setting the X flag. */
2238 if (cris_is_xflag_bit_on (inst
))
2240 inst_env
->xflag_found
= 1;
2244 inst_env
->xflag_found
= 0;
2246 inst_env
->slot_needed
= 0;
2247 inst_env
->prefix_found
= 0;
2248 inst_env
->disable_interrupt
= 1;
2251 /* Checks if the instruction is in assign mode. If so, it updates the assign
2252 register. Note that check_assign assumes that the caller has checked that
2253 there is a prefix to this instruction. The mode check depends on this. */
2256 check_assign (unsigned short inst
, inst_env_type
*inst_env
)
2258 /* Check if it's an assign addressing mode. */
2259 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2261 /* Assign the prefix value to operand 1. */
2262 inst_env
->reg
[cris_get_operand1 (inst
)] = inst_env
->prefix_value
;
2266 /* Handles the 2-operand BOUND instruction. */
2269 two_operand_bound_op (unsigned short inst
, inst_env_type
*inst_env
)
2271 /* It's invalid to have the PC as the index operand. */
2272 if (cris_get_operand2 (inst
) == REG_PC
)
2274 inst_env
->invalid
= 1;
2277 /* Check if we have a prefix. */
2278 if (inst_env
->prefix_found
)
2280 check_assign (inst
, inst_env
);
2282 /* Check if this is an autoincrement mode. */
2283 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2285 /* It's invalid to change the PC in a delay slot. */
2286 if (inst_env
->slot_needed
)
2288 inst_env
->invalid
= 1;
2291 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2293 inst_env
->slot_needed
= 0;
2294 inst_env
->prefix_found
= 0;
2295 inst_env
->xflag_found
= 0;
2296 inst_env
->disable_interrupt
= 0;
2299 /* Handles the 3-operand BOUND instruction. */
2302 three_operand_bound_op (unsigned short inst
, inst_env_type
*inst_env
)
2304 /* It's an error if we haven't got a prefix. And it's also an error
2305 if the PC is the destination register. */
2306 if ((!inst_env
->prefix_found
) || (cris_get_operand1 (inst
) == REG_PC
))
2308 inst_env
->invalid
= 1;
2311 inst_env
->slot_needed
= 0;
2312 inst_env
->prefix_found
= 0;
2313 inst_env
->xflag_found
= 0;
2314 inst_env
->disable_interrupt
= 0;
2317 /* Clears the status flags in inst_env. */
2320 btst_nop_op (unsigned short inst
, inst_env_type
*inst_env
)
2322 /* It's an error if we have got a prefix. */
2323 if (inst_env
->prefix_found
)
2325 inst_env
->invalid
= 1;
2329 inst_env
->slot_needed
= 0;
2330 inst_env
->prefix_found
= 0;
2331 inst_env
->xflag_found
= 0;
2332 inst_env
->disable_interrupt
= 0;
2335 /* Clears the status flags in inst_env. */
2338 clearf_di_op (unsigned short inst
, inst_env_type
*inst_env
)
2340 /* It's an error if we have got a prefix. */
2341 if (inst_env
->prefix_found
)
2343 inst_env
->invalid
= 1;
2347 inst_env
->slot_needed
= 0;
2348 inst_env
->prefix_found
= 0;
2349 inst_env
->xflag_found
= 0;
2350 inst_env
->disable_interrupt
= 1;
2353 /* Handles the CLEAR instruction if it's in register mode. */
2356 reg_mode_clear_op (unsigned short inst
, inst_env_type
*inst_env
)
2358 /* Check if the target is the PC. */
2359 if (cris_get_operand2 (inst
) == REG_PC
)
2361 /* The instruction will clear the instruction's size bits. */
2362 int clear_size
= cris_get_clear_size (inst
);
2363 if (clear_size
== INST_BYTE_SIZE
)
2365 inst_env
->delay_slot_pc
= inst_env
->reg
[REG_PC
] & 0xFFFFFF00;
2367 if (clear_size
== INST_WORD_SIZE
)
2369 inst_env
->delay_slot_pc
= inst_env
->reg
[REG_PC
] & 0xFFFF0000;
2371 if (clear_size
== INST_DWORD_SIZE
)
2373 inst_env
->delay_slot_pc
= 0x0;
2375 /* The jump will be delayed with one delay slot. So we need a delay
2377 inst_env
->slot_needed
= 1;
2378 inst_env
->delay_slot_pc_active
= 1;
2382 /* The PC will not change => no delay slot. */
2383 inst_env
->slot_needed
= 0;
2385 inst_env
->prefix_found
= 0;
2386 inst_env
->xflag_found
= 0;
2387 inst_env
->disable_interrupt
= 0;
2390 /* Handles the TEST instruction if it's in register mode. */
2393 reg_mode_test_op (unsigned short inst
, inst_env_type
*inst_env
)
2395 /* It's an error if we have got a prefix. */
2396 if (inst_env
->prefix_found
)
2398 inst_env
->invalid
= 1;
2401 inst_env
->slot_needed
= 0;
2402 inst_env
->prefix_found
= 0;
2403 inst_env
->xflag_found
= 0;
2404 inst_env
->disable_interrupt
= 0;
2408 /* Handles the CLEAR and TEST instruction if the instruction isn't
2409 in register mode. */
2412 none_reg_mode_clear_test_op (unsigned short inst
, inst_env_type
*inst_env
)
2414 /* Check if we are in a prefix mode. */
2415 if (inst_env
->prefix_found
)
2417 /* The only way the PC can change is if this instruction is in
2418 assign addressing mode. */
2419 check_assign (inst
, inst_env
);
2421 /* Indirect mode can't change the PC so just check if the mode is
2423 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2425 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2427 inst_env
->slot_needed
= 0;
2428 inst_env
->prefix_found
= 0;
2429 inst_env
->xflag_found
= 0;
2430 inst_env
->disable_interrupt
= 0;
2433 /* Checks that the PC isn't the destination register or the instructions has
2437 dstep_logshift_mstep_neg_not_op (unsigned short inst
, inst_env_type
*inst_env
)
2439 /* It's invalid to have the PC as the destination. The instruction can't
2441 if ((cris_get_operand2 (inst
) == REG_PC
) || inst_env
->prefix_found
)
2443 inst_env
->invalid
= 1;
2447 inst_env
->slot_needed
= 0;
2448 inst_env
->prefix_found
= 0;
2449 inst_env
->xflag_found
= 0;
2450 inst_env
->disable_interrupt
= 0;
2453 /* Checks that the instruction doesn't have a prefix. */
2456 break_op (unsigned short inst
, inst_env_type
*inst_env
)
2458 /* The instruction can't have a prefix. */
2459 if (inst_env
->prefix_found
)
2461 inst_env
->invalid
= 1;
2465 inst_env
->slot_needed
= 0;
2466 inst_env
->prefix_found
= 0;
2467 inst_env
->xflag_found
= 0;
2468 inst_env
->disable_interrupt
= 1;
2471 /* Checks that the PC isn't the destination register and that the instruction
2472 doesn't have a prefix. */
2475 scc_op (unsigned short inst
, inst_env_type
*inst_env
)
2477 /* It's invalid to have the PC as the destination. The instruction can't
2479 if ((cris_get_operand2 (inst
) == REG_PC
) || inst_env
->prefix_found
)
2481 inst_env
->invalid
= 1;
2485 inst_env
->slot_needed
= 0;
2486 inst_env
->prefix_found
= 0;
2487 inst_env
->xflag_found
= 0;
2488 inst_env
->disable_interrupt
= 1;
2491 /* Handles the register mode JUMP instruction. */
2494 reg_mode_jump_op (unsigned short inst
, inst_env_type
*inst_env
)
2496 /* It's invalid to do a JUMP in a delay slot. The mode is register, so
2497 you can't have a prefix. */
2498 if ((inst_env
->slot_needed
) || (inst_env
->prefix_found
))
2500 inst_env
->invalid
= 1;
2504 /* Just change the PC. */
2505 inst_env
->reg
[REG_PC
] = inst_env
->reg
[cris_get_operand1 (inst
)];
2506 inst_env
->slot_needed
= 0;
2507 inst_env
->prefix_found
= 0;
2508 inst_env
->xflag_found
= 0;
2509 inst_env
->disable_interrupt
= 1;
2512 /* Handles the JUMP instruction for all modes except register. */
2514 void none_reg_mode_jump_op (unsigned short inst
, inst_env_type
*inst_env
)
2516 unsigned long newpc
;
2519 /* It's invalid to do a JUMP in a delay slot. */
2520 if (inst_env
->slot_needed
)
2522 inst_env
->invalid
= 1;
2526 /* Check if we have a prefix. */
2527 if (inst_env
->prefix_found
)
2529 check_assign (inst
, inst_env
);
2531 /* Get the new value for the the PC. */
2533 read_memory_unsigned_integer ((CORE_ADDR
) inst_env
->prefix_value
,
2538 /* Get the new value for the PC. */
2539 address
= (CORE_ADDR
) inst_env
->reg
[cris_get_operand1 (inst
)];
2540 newpc
= read_memory_unsigned_integer (address
, 4);
2542 /* Check if we should increment a register. */
2543 if (cris_get_mode (inst
) == AUTOINC_MODE
)
2545 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
2548 inst_env
->reg
[REG_PC
] = newpc
;
2550 inst_env
->slot_needed
= 0;
2551 inst_env
->prefix_found
= 0;
2552 inst_env
->xflag_found
= 0;
2553 inst_env
->disable_interrupt
= 1;
2556 /* Handles moves to special registers (aka P-register) for all modes. */
2559 move_to_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2561 if (inst_env
->prefix_found
)
2563 /* The instruction has a prefix that means we are only interested if
2564 the instruction is in assign mode. */
2565 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2567 /* The prefix handles the problem if we are in a delay slot. */
2568 if (cris_get_operand1 (inst
) == REG_PC
)
2570 /* Just take care of the assign. */
2571 check_assign (inst
, inst_env
);
2575 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2577 /* The instruction doesn't have a prefix, the only case left that we
2578 are interested in is the autoincrement mode. */
2579 if (cris_get_operand1 (inst
) == REG_PC
)
2581 /* If the PC is to be incremented it's invalid to be in a
2583 if (inst_env
->slot_needed
)
2585 inst_env
->invalid
= 1;
2589 /* The increment depends on the size of the special register. */
2590 if (cris_register_size (cris_get_operand2 (inst
)) == 1)
2592 process_autoincrement (INST_BYTE_SIZE
, inst
, inst_env
);
2594 else if (cris_register_size (cris_get_operand2 (inst
)) == 2)
2596 process_autoincrement (INST_WORD_SIZE
, inst
, inst_env
);
2600 process_autoincrement (INST_DWORD_SIZE
, inst
, inst_env
);
2604 inst_env
->slot_needed
= 0;
2605 inst_env
->prefix_found
= 0;
2606 inst_env
->xflag_found
= 0;
2607 inst_env
->disable_interrupt
= 1;
2610 /* Handles moves from special registers (aka P-register) for all modes
2614 none_reg_mode_move_from_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2616 if (inst_env
->prefix_found
)
2618 /* The instruction has a prefix that means we are only interested if
2619 the instruction is in assign mode. */
2620 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2622 /* The prefix handles the problem if we are in a delay slot. */
2623 if (cris_get_operand1 (inst
) == REG_PC
)
2625 /* Just take care of the assign. */
2626 check_assign (inst
, inst_env
);
2630 /* The instruction doesn't have a prefix, the only case left that we
2631 are interested in is the autoincrement mode. */
2632 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2634 if (cris_get_operand1 (inst
) == REG_PC
)
2636 /* If the PC is to be incremented it's invalid to be in a
2638 if (inst_env
->slot_needed
)
2640 inst_env
->invalid
= 1;
2644 /* The increment depends on the size of the special register. */
2645 if (cris_register_size (cris_get_operand2 (inst
)) == 1)
2647 process_autoincrement (INST_BYTE_SIZE
, inst
, inst_env
);
2649 else if (cris_register_size (cris_get_operand2 (inst
)) == 2)
2651 process_autoincrement (INST_WORD_SIZE
, inst
, inst_env
);
2655 process_autoincrement (INST_DWORD_SIZE
, inst
, inst_env
);
2659 inst_env
->slot_needed
= 0;
2660 inst_env
->prefix_found
= 0;
2661 inst_env
->xflag_found
= 0;
2662 inst_env
->disable_interrupt
= 1;
2665 /* Handles moves from special registers (aka P-register) when the mode
2669 reg_mode_move_from_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2671 /* Register mode move from special register can't have a prefix. */
2672 if (inst_env
->prefix_found
)
2674 inst_env
->invalid
= 1;
2678 if (cris_get_operand1 (inst
) == REG_PC
)
2680 /* It's invalid to change the PC in a delay slot. */
2681 if (inst_env
->slot_needed
)
2683 inst_env
->invalid
= 1;
2686 /* The destination is the PC, the jump will have a delay slot. */
2687 inst_env
->delay_slot_pc
= inst_env
->preg
[cris_get_operand2 (inst
)];
2688 inst_env
->slot_needed
= 1;
2689 inst_env
->delay_slot_pc_active
= 1;
2693 /* If the destination isn't PC, there will be no jump. */
2694 inst_env
->slot_needed
= 0;
2696 inst_env
->prefix_found
= 0;
2697 inst_env
->xflag_found
= 0;
2698 inst_env
->disable_interrupt
= 1;
2701 /* Handles the MOVEM from memory to general register instruction. */
2704 move_mem_to_reg_movem_op (unsigned short inst
, inst_env_type
*inst_env
)
2706 if (inst_env
->prefix_found
)
2708 /* The prefix handles the problem if we are in a delay slot. Is the
2709 MOVEM instruction going to change the PC? */
2710 if (cris_get_operand2 (inst
) >= REG_PC
)
2712 inst_env
->reg
[REG_PC
] =
2713 read_memory_unsigned_integer (inst_env
->prefix_value
, 4);
2715 /* The assign value is the value after the increment. Normally, the
2716 assign value is the value before the increment. */
2717 if ((cris_get_operand1 (inst
) == REG_PC
)
2718 && (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
))
2720 inst_env
->reg
[REG_PC
] = inst_env
->prefix_value
;
2721 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2726 /* Is the MOVEM instruction going to change the PC? */
2727 if (cris_get_operand2 (inst
) == REG_PC
)
2729 /* It's invalid to change the PC in a delay slot. */
2730 if (inst_env
->slot_needed
)
2732 inst_env
->invalid
= 1;
2735 inst_env
->reg
[REG_PC
] =
2736 read_memory_unsigned_integer (inst_env
->reg
[cris_get_operand1 (inst
)],
2739 /* The increment is not depending on the size, instead it's depending
2740 on the number of registers loaded from memory. */
2741 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
2743 /* It's invalid to change the PC in a delay slot. */
2744 if (inst_env
->slot_needed
)
2746 inst_env
->invalid
= 1;
2749 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2752 inst_env
->slot_needed
= 0;
2753 inst_env
->prefix_found
= 0;
2754 inst_env
->xflag_found
= 0;
2755 inst_env
->disable_interrupt
= 0;
2758 /* Handles the MOVEM to memory from general register instruction. */
2761 move_reg_to_mem_movem_op (unsigned short inst
, inst_env_type
*inst_env
)
2763 if (inst_env
->prefix_found
)
2765 /* The assign value is the value after the increment. Normally, the
2766 assign value is the value before the increment. */
2767 if ((cris_get_operand1 (inst
) == REG_PC
) &&
2768 (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
))
2770 /* The prefix handles the problem if we are in a delay slot. */
2771 inst_env
->reg
[REG_PC
] = inst_env
->prefix_value
;
2772 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2777 /* The increment is not depending on the size, instead it's depending
2778 on the number of registers loaded to memory. */
2779 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
2781 /* It's invalid to change the PC in a delay slot. */
2782 if (inst_env
->slot_needed
)
2784 inst_env
->invalid
= 1;
2787 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2790 inst_env
->slot_needed
= 0;
2791 inst_env
->prefix_found
= 0;
2792 inst_env
->xflag_found
= 0;
2793 inst_env
->disable_interrupt
= 0;
2796 /* Handles the pop instruction to a general register.
2797 POP is a assembler macro for MOVE.D [SP+], Rd. */
2800 reg_pop_op (unsigned short inst
, inst_env_type
*inst_env
)
2802 /* POP can't have a prefix. */
2803 if (inst_env
->prefix_found
)
2805 inst_env
->invalid
= 1;
2808 if (cris_get_operand2 (inst
) == REG_PC
)
2810 /* It's invalid to change the PC in a delay slot. */
2811 if (inst_env
->slot_needed
)
2813 inst_env
->invalid
= 1;
2816 inst_env
->reg
[REG_PC
] =
2817 read_memory_unsigned_integer (inst_env
->reg
[REG_SP
], 4);
2819 inst_env
->slot_needed
= 0;
2820 inst_env
->prefix_found
= 0;
2821 inst_env
->xflag_found
= 0;
2822 inst_env
->disable_interrupt
= 0;
2825 /* Handles moves from register to memory. */
2828 move_reg_to_mem_index_inc_op (unsigned short inst
, inst_env_type
*inst_env
)
2830 /* Check if we have a prefix. */
2831 if (inst_env
->prefix_found
)
2833 /* The only thing that can change the PC is an assign. */
2834 check_assign (inst
, inst_env
);
2836 else if ((cris_get_operand1 (inst
) == REG_PC
)
2837 && (cris_get_mode (inst
) == AUTOINC_MODE
))
2839 /* It's invalid to change the PC in a delay slot. */
2840 if (inst_env
->slot_needed
)
2842 inst_env
->invalid
= 1;
2845 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2847 inst_env
->slot_needed
= 0;
2848 inst_env
->prefix_found
= 0;
2849 inst_env
->xflag_found
= 0;
2850 inst_env
->disable_interrupt
= 0;
2853 /* Handles the intructions that's not yet implemented, by setting
2854 inst_env->invalid to true. */
2857 not_implemented_op (unsigned short inst
, inst_env_type
*inst_env
)
2859 inst_env
->invalid
= 1;
2862 /* Handles the XOR instruction. */
2865 xor_op (unsigned short inst
, inst_env_type
*inst_env
)
2867 /* XOR can't have a prefix. */
2868 if (inst_env
->prefix_found
)
2870 inst_env
->invalid
= 1;
2874 /* Check if the PC is the target. */
2875 if (cris_get_operand2 (inst
) == REG_PC
)
2877 /* It's invalid to change the PC in a delay slot. */
2878 if (inst_env
->slot_needed
)
2880 inst_env
->invalid
= 1;
2883 inst_env
->reg
[REG_PC
] ^= inst_env
->reg
[cris_get_operand1 (inst
)];
2885 inst_env
->slot_needed
= 0;
2886 inst_env
->prefix_found
= 0;
2887 inst_env
->xflag_found
= 0;
2888 inst_env
->disable_interrupt
= 0;
2891 /* Handles the MULS instruction. */
2894 muls_op (unsigned short inst
, inst_env_type
*inst_env
)
2896 /* MULS/U can't have a prefix. */
2897 if (inst_env
->prefix_found
)
2899 inst_env
->invalid
= 1;
2903 /* Consider it invalid if the PC is the target. */
2904 if (cris_get_operand2 (inst
) == REG_PC
)
2906 inst_env
->invalid
= 1;
2909 inst_env
->slot_needed
= 0;
2910 inst_env
->prefix_found
= 0;
2911 inst_env
->xflag_found
= 0;
2912 inst_env
->disable_interrupt
= 0;
2915 /* Handles the MULU instruction. */
2918 mulu_op (unsigned short inst
, inst_env_type
*inst_env
)
2920 /* MULS/U can't have a prefix. */
2921 if (inst_env
->prefix_found
)
2923 inst_env
->invalid
= 1;
2927 /* Consider it invalid if the PC is the target. */
2928 if (cris_get_operand2 (inst
) == REG_PC
)
2930 inst_env
->invalid
= 1;
2933 inst_env
->slot_needed
= 0;
2934 inst_env
->prefix_found
= 0;
2935 inst_env
->xflag_found
= 0;
2936 inst_env
->disable_interrupt
= 0;
2939 /* Calculate the result of the instruction for ADD, SUB, CMP AND, OR and MOVE.
2940 The MOVE instruction is the move from source to register. */
2943 add_sub_cmp_and_or_move_action (unsigned short inst
, inst_env_type
*inst_env
,
2944 unsigned long source1
, unsigned long source2
)
2946 unsigned long pc_mask
;
2947 unsigned long operation_mask
;
2949 /* Find out how many bits the operation should apply to. */
2950 if (cris_get_size (inst
) == INST_BYTE_SIZE
)
2952 pc_mask
= 0xFFFFFF00;
2953 operation_mask
= 0xFF;
2955 else if (cris_get_size (inst
) == INST_WORD_SIZE
)
2957 pc_mask
= 0xFFFF0000;
2958 operation_mask
= 0xFFFF;
2960 else if (cris_get_size (inst
) == INST_DWORD_SIZE
)
2963 operation_mask
= 0xFFFFFFFF;
2967 /* The size is out of range. */
2968 inst_env
->invalid
= 1;
2972 /* The instruction just works on uw_operation_mask bits. */
2973 source2
&= operation_mask
;
2974 source1
&= operation_mask
;
2976 /* Now calculate the result. The opcode's 3 first bits separates
2977 the different actions. */
2978 switch (cris_get_opcode (inst
) & 7)
2988 case 2: /* subtract */
2992 case 3: /* compare */
3004 inst_env
->invalid
= 1;
3010 /* Make sure that the result doesn't contain more than the instruction
3012 source2
&= operation_mask
;
3014 /* Calculate the new breakpoint address. */
3015 inst_env
->reg
[REG_PC
] &= pc_mask
;
3016 inst_env
->reg
[REG_PC
] |= source1
;
3020 /* Extends the value from either byte or word size to a dword. If the mode
3021 is zero extend then the value is extended with zero. If instead the mode
3022 is signed extend the sign bit of the value is taken into consideration. */
3025 do_sign_or_zero_extend (unsigned long value
, unsigned short *inst
)
3027 /* The size can be either byte or word, check which one it is.
3028 Don't check the highest bit, it's indicating if it's a zero
3030 if (cris_get_size (*inst
) & INST_WORD_SIZE
)
3035 /* Check if the instruction is signed extend. If so, check if value has
3037 if (cris_is_signed_extend_bit_on (*inst
) && (value
& SIGNED_WORD_MASK
))
3039 value
|= SIGNED_WORD_EXTEND_MASK
;
3047 /* Check if the instruction is signed extend. If so, check if value has
3049 if (cris_is_signed_extend_bit_on (*inst
) && (value
& SIGNED_BYTE_MASK
))
3051 value
|= SIGNED_BYTE_EXTEND_MASK
;
3054 /* The size should now be dword. */
3055 cris_set_size_to_dword (inst
);
3059 /* Handles the register mode for the ADD, SUB, CMP, AND, OR and MOVE
3060 instruction. The MOVE instruction is the move from source to register. */
3063 reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst
,
3064 inst_env_type
*inst_env
)
3066 unsigned long operand1
;
3067 unsigned long operand2
;
3069 /* It's invalid to have a prefix to the instruction. This is a register
3070 mode instruction and can't have a prefix. */
3071 if (inst_env
->prefix_found
)
3073 inst_env
->invalid
= 1;
3076 /* Check if the instruction has PC as its target. */
3077 if (cris_get_operand2 (inst
) == REG_PC
)
3079 if (inst_env
->slot_needed
)
3081 inst_env
->invalid
= 1;
3084 /* The instruction has the PC as its target register. */
3085 operand1
= inst_env
->reg
[cris_get_operand1 (inst
)];
3086 operand2
= inst_env
->reg
[REG_PC
];
3088 /* Check if it's a extend, signed or zero instruction. */
3089 if (cris_get_opcode (inst
) < 4)
3091 operand1
= do_sign_or_zero_extend (operand1
, &inst
);
3093 /* Calculate the PC value after the instruction, i.e. where the
3094 breakpoint should be. The order of the udw_operands is vital. */
3095 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3097 inst_env
->slot_needed
= 0;
3098 inst_env
->prefix_found
= 0;
3099 inst_env
->xflag_found
= 0;
3100 inst_env
->disable_interrupt
= 0;
3103 /* Returns the data contained at address. The size of the data is derived from
3104 the size of the operation. If the instruction is a zero or signed
3105 extend instruction, the size field is changed in instruction. */
3108 get_data_from_address (unsigned short *inst
, CORE_ADDR address
)
3110 int size
= cris_get_size (*inst
);
3111 unsigned long value
;
3113 /* If it's an extend instruction we don't want the signed extend bit,
3114 because it influences the size. */
3115 if (cris_get_opcode (*inst
) < 4)
3117 size
&= ~SIGNED_EXTEND_BIT_MASK
;
3119 /* Is there a need for checking the size? Size should contain the number of
3122 value
= read_memory_unsigned_integer (address
, size
);
3124 /* Check if it's an extend, signed or zero instruction. */
3125 if (cris_get_opcode (*inst
) < 4)
3127 value
= do_sign_or_zero_extend (value
, inst
);
3132 /* Handles the assign addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
3133 instructions. The MOVE instruction is the move from source to register. */
3136 handle_prefix_assign_mode_for_aritm_op (unsigned short inst
,
3137 inst_env_type
*inst_env
)
3139 unsigned long operand2
;
3140 unsigned long operand3
;
3142 check_assign (inst
, inst_env
);
3143 if (cris_get_operand2 (inst
) == REG_PC
)
3145 operand2
= inst_env
->reg
[REG_PC
];
3147 /* Get the value of the third operand. */
3148 operand3
= get_data_from_address (&inst
, inst_env
->prefix_value
);
3150 /* Calculate the PC value after the instruction, i.e. where the
3151 breakpoint should be. The order of the udw_operands is vital. */
3152 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3154 inst_env
->slot_needed
= 0;
3155 inst_env
->prefix_found
= 0;
3156 inst_env
->xflag_found
= 0;
3157 inst_env
->disable_interrupt
= 0;
3160 /* Handles the three-operand addressing mode for the ADD, SUB, CMP, AND and
3161 OR instructions. Note that for this to work as expected, the calling
3162 function must have made sure that there is a prefix to this instruction. */
3165 three_operand_add_sub_cmp_and_or_op (unsigned short inst
,
3166 inst_env_type
*inst_env
)
3168 unsigned long operand2
;
3169 unsigned long operand3
;
3171 if (cris_get_operand1 (inst
) == REG_PC
)
3173 /* The PC will be changed by the instruction. */
3174 operand2
= inst_env
->reg
[cris_get_operand2 (inst
)];
3176 /* Get the value of the third operand. */
3177 operand3
= get_data_from_address (&inst
, inst_env
->prefix_value
);
3179 /* Calculate the PC value after the instruction, i.e. where the
3180 breakpoint should be. */
3181 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3183 inst_env
->slot_needed
= 0;
3184 inst_env
->prefix_found
= 0;
3185 inst_env
->xflag_found
= 0;
3186 inst_env
->disable_interrupt
= 0;
3189 /* Handles the index addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
3190 instructions. The MOVE instruction is the move from source to register. */
3193 handle_prefix_index_mode_for_aritm_op (unsigned short inst
,
3194 inst_env_type
*inst_env
)
3196 if (cris_get_operand1 (inst
) != cris_get_operand2 (inst
))
3198 /* If the instruction is MOVE it's invalid. If the instruction is ADD,
3199 SUB, AND or OR something weird is going on (if everything works these
3200 instructions should end up in the three operand version). */
3201 inst_env
->invalid
= 1;
3206 /* three_operand_add_sub_cmp_and_or does the same as we should do here
3208 three_operand_add_sub_cmp_and_or_op (inst
, inst_env
);
3210 inst_env
->slot_needed
= 0;
3211 inst_env
->prefix_found
= 0;
3212 inst_env
->xflag_found
= 0;
3213 inst_env
->disable_interrupt
= 0;
3216 /* Handles the autoincrement and indirect addresing mode for the ADD, SUB,
3217 CMP, AND OR and MOVE instruction. The MOVE instruction is the move from
3218 source to register. */
3221 handle_inc_and_index_mode_for_aritm_op (unsigned short inst
,
3222 inst_env_type
*inst_env
)
3224 unsigned long operand1
;
3225 unsigned long operand2
;
3226 unsigned long operand3
;
3229 /* The instruction is either an indirect or autoincrement addressing mode.
3230 Check if the destination register is the PC. */
3231 if (cris_get_operand2 (inst
) == REG_PC
)
3233 /* Must be done here, get_data_from_address may change the size
3235 size
= cris_get_size (inst
);
3236 operand2
= inst_env
->reg
[REG_PC
];
3238 /* Get the value of the third operand, i.e. the indirect operand. */
3239 operand1
= inst_env
->reg
[cris_get_operand1 (inst
)];
3240 operand3
= get_data_from_address (&inst
, operand1
);
3242 /* Calculate the PC value after the instruction, i.e. where the
3243 breakpoint should be. The order of the udw_operands is vital. */
3244 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3246 /* If this is an autoincrement addressing mode, check if the increment
3248 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
3250 /* Get the size field. */
3251 size
= cris_get_size (inst
);
3253 /* If it's an extend instruction we don't want the signed extend bit,
3254 because it influences the size. */
3255 if (cris_get_opcode (inst
) < 4)
3257 size
&= ~SIGNED_EXTEND_BIT_MASK
;
3259 process_autoincrement (size
, inst
, inst_env
);
3261 inst_env
->slot_needed
= 0;
3262 inst_env
->prefix_found
= 0;
3263 inst_env
->xflag_found
= 0;
3264 inst_env
->disable_interrupt
= 0;
3267 /* Handles the two-operand addressing mode, all modes except register, for
3268 the ADD, SUB CMP, AND and OR instruction. */
3271 none_reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst
,
3272 inst_env_type
*inst_env
)
3274 if (inst_env
->prefix_found
)
3276 if (cris_get_mode (inst
) == PREFIX_INDEX_MODE
)
3278 handle_prefix_index_mode_for_aritm_op (inst
, inst_env
);
3280 else if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
3282 handle_prefix_assign_mode_for_aritm_op (inst
, inst_env
);
3286 /* The mode is invalid for a prefixed base instruction. */
3287 inst_env
->invalid
= 1;
3293 handle_inc_and_index_mode_for_aritm_op (inst
, inst_env
);
3297 /* Handles the quick addressing mode for the ADD and SUB instruction. */
3300 quick_mode_add_sub_op (unsigned short inst
, inst_env_type
*inst_env
)
3302 unsigned long operand1
;
3303 unsigned long operand2
;
3305 /* It's a bad idea to be in a prefix instruction now. This is a quick mode
3306 instruction and can't have a prefix. */
3307 if (inst_env
->prefix_found
)
3309 inst_env
->invalid
= 1;
3313 /* Check if the instruction has PC as its target. */
3314 if (cris_get_operand2 (inst
) == REG_PC
)
3316 if (inst_env
->slot_needed
)
3318 inst_env
->invalid
= 1;
3321 operand1
= cris_get_quick_value (inst
);
3322 operand2
= inst_env
->reg
[REG_PC
];
3324 /* The size should now be dword. */
3325 cris_set_size_to_dword (&inst
);
3327 /* Calculate the PC value after the instruction, i.e. where the
3328 breakpoint should be. */
3329 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3331 inst_env
->slot_needed
= 0;
3332 inst_env
->prefix_found
= 0;
3333 inst_env
->xflag_found
= 0;
3334 inst_env
->disable_interrupt
= 0;
3337 /* Handles the quick addressing mode for the CMP, AND and OR instruction. */
3340 quick_mode_and_cmp_move_or_op (unsigned short inst
, inst_env_type
*inst_env
)
3342 unsigned long operand1
;
3343 unsigned long operand2
;
3345 /* It's a bad idea to be in a prefix instruction now. This is a quick mode
3346 instruction and can't have a prefix. */
3347 if (inst_env
->prefix_found
)
3349 inst_env
->invalid
= 1;
3352 /* Check if the instruction has PC as its target. */
3353 if (cris_get_operand2 (inst
) == REG_PC
)
3355 if (inst_env
->slot_needed
)
3357 inst_env
->invalid
= 1;
3360 /* The instruction has the PC as its target register. */
3361 operand1
= cris_get_quick_value (inst
);
3362 operand2
= inst_env
->reg
[REG_PC
];
3364 /* The quick value is signed, so check if we must do a signed extend. */
3365 if (operand1
& SIGNED_QUICK_VALUE_MASK
)
3368 operand1
|= SIGNED_QUICK_VALUE_EXTEND_MASK
;
3370 /* The size should now be dword. */
3371 cris_set_size_to_dword (&inst
);
3373 /* Calculate the PC value after the instruction, i.e. where the
3374 breakpoint should be. */
3375 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3377 inst_env
->slot_needed
= 0;
3378 inst_env
->prefix_found
= 0;
3379 inst_env
->xflag_found
= 0;
3380 inst_env
->disable_interrupt
= 0;
3383 /* Translate op_type to a function and call it. */
3385 static void cris_gdb_func (enum cris_op_type op_type
, unsigned short inst
,
3386 inst_env_type
*inst_env
)
3390 case cris_not_implemented_op
:
3391 not_implemented_op (inst
, inst_env
);
3395 abs_op (inst
, inst_env
);
3399 addi_op (inst
, inst_env
);
3403 asr_op (inst
, inst_env
);
3407 asrq_op (inst
, inst_env
);
3410 case cris_ax_ei_setf_op
:
3411 ax_ei_setf_op (inst
, inst_env
);
3414 case cris_bdap_prefix
:
3415 bdap_prefix (inst
, inst_env
);
3418 case cris_biap_prefix
:
3419 biap_prefix (inst
, inst_env
);
3423 break_op (inst
, inst_env
);
3426 case cris_btst_nop_op
:
3427 btst_nop_op (inst
, inst_env
);
3430 case cris_clearf_di_op
:
3431 clearf_di_op (inst
, inst_env
);
3434 case cris_dip_prefix
:
3435 dip_prefix (inst
, inst_env
);
3438 case cris_dstep_logshift_mstep_neg_not_op
:
3439 dstep_logshift_mstep_neg_not_op (inst
, inst_env
);
3442 case cris_eight_bit_offset_branch_op
:
3443 eight_bit_offset_branch_op (inst
, inst_env
);
3446 case cris_move_mem_to_reg_movem_op
:
3447 move_mem_to_reg_movem_op (inst
, inst_env
);
3450 case cris_move_reg_to_mem_movem_op
:
3451 move_reg_to_mem_movem_op (inst
, inst_env
);
3454 case cris_move_to_preg_op
:
3455 move_to_preg_op (inst
, inst_env
);
3459 muls_op (inst
, inst_env
);
3463 mulu_op (inst
, inst_env
);
3466 case cris_none_reg_mode_add_sub_cmp_and_or_move_op
:
3467 none_reg_mode_add_sub_cmp_and_or_move_op (inst
, inst_env
);
3470 case cris_none_reg_mode_clear_test_op
:
3471 none_reg_mode_clear_test_op (inst
, inst_env
);
3474 case cris_none_reg_mode_jump_op
:
3475 none_reg_mode_jump_op (inst
, inst_env
);
3478 case cris_none_reg_mode_move_from_preg_op
:
3479 none_reg_mode_move_from_preg_op (inst
, inst_env
);
3482 case cris_quick_mode_add_sub_op
:
3483 quick_mode_add_sub_op (inst
, inst_env
);
3486 case cris_quick_mode_and_cmp_move_or_op
:
3487 quick_mode_and_cmp_move_or_op (inst
, inst_env
);
3490 case cris_quick_mode_bdap_prefix
:
3491 quick_mode_bdap_prefix (inst
, inst_env
);
3494 case cris_reg_mode_add_sub_cmp_and_or_move_op
:
3495 reg_mode_add_sub_cmp_and_or_move_op (inst
, inst_env
);
3498 case cris_reg_mode_clear_op
:
3499 reg_mode_clear_op (inst
, inst_env
);
3502 case cris_reg_mode_jump_op
:
3503 reg_mode_jump_op (inst
, inst_env
);
3506 case cris_reg_mode_move_from_preg_op
:
3507 reg_mode_move_from_preg_op (inst
, inst_env
);
3510 case cris_reg_mode_test_op
:
3511 reg_mode_test_op (inst
, inst_env
);
3515 scc_op (inst
, inst_env
);
3518 case cris_sixteen_bit_offset_branch_op
:
3519 sixteen_bit_offset_branch_op (inst
, inst_env
);
3522 case cris_three_operand_add_sub_cmp_and_or_op
:
3523 three_operand_add_sub_cmp_and_or_op (inst
, inst_env
);
3526 case cris_three_operand_bound_op
:
3527 three_operand_bound_op (inst
, inst_env
);
3530 case cris_two_operand_bound_op
:
3531 two_operand_bound_op (inst
, inst_env
);
3535 xor_op (inst
, inst_env
);
3540 /* This wrapper is to avoid cris_get_assembler being called before
3541 exec_bfd has been set. */
3544 cris_delayed_get_disassembler (bfd_vma addr
, disassemble_info
*info
)
3546 tm_print_insn
= cris_get_disassembler (exec_bfd
);
3547 return TARGET_PRINT_INSN (addr
, info
);
3550 /* Copied from <asm/elf.h>. */
3551 typedef unsigned long elf_greg_t
;
3553 /* Same as user_regs_struct struct in <asm/user.h>. */
3554 typedef elf_greg_t elf_gregset_t
[35];
3556 /* Unpack an elf_gregset_t into GDB's register cache. */
3559 supply_gregset (elf_gregset_t
*gregsetp
)
3562 elf_greg_t
*regp
= *gregsetp
;
3563 static char zerobuf
[4] = {0};
3565 /* The kernel dumps all 32 registers as unsigned longs, but supply_register
3566 knows about the actual size of each register so that's no problem. */
3567 for (i
= 0; i
< NUM_GENREGS
+ NUM_SPECREGS
; i
++)
3569 supply_register (i
, (char *)®p
[i
]);
3573 /* Use a local version of this function to get the correct types for
3574 regsets, until multi-arch core support is ready. */
3577 fetch_core_registers (char *core_reg_sect
, unsigned core_reg_size
,
3578 int which
, CORE_ADDR reg_addr
)
3580 elf_gregset_t gregset
;
3585 if (core_reg_size
!= sizeof (gregset
))
3587 warning ("wrong size gregset struct in core file");
3591 memcpy (&gregset
, core_reg_sect
, sizeof (gregset
));
3592 supply_gregset (&gregset
);
3596 /* We've covered all the kinds of registers we know about here,
3597 so this must be something we wouldn't know what to do with
3598 anyway. Just ignore it. */
3603 static struct core_fns cris_elf_core_fns
=
3605 bfd_target_elf_flavour
, /* core_flavour */
3606 default_check_format
, /* check_format */
3607 default_core_sniffer
, /* core_sniffer */
3608 fetch_core_registers
, /* core_read_registers */
3612 /* Fetch (and possibly build) an appropriate link_map_offsets
3613 structure for native GNU/Linux CRIS targets using the struct
3614 offsets defined in link.h (but without actual reference to that
3617 This makes it possible to access GNU/Linux CRIS shared libraries
3618 from a GDB that was not built on an GNU/Linux CRIS host (for cross
3621 See gdb/solib-svr4.h for an explanation of these fields. */
3623 struct link_map_offsets
*
3624 cris_linux_svr4_fetch_link_map_offsets (void)
3626 static struct link_map_offsets lmo
;
3627 static struct link_map_offsets
*lmp
= NULL
;
3633 lmo
.r_debug_size
= 8; /* The actual size is 20 bytes, but
3634 this is all we need. */
3635 lmo
.r_map_offset
= 4;
3638 lmo
.link_map_size
= 20;
3640 lmo
.l_addr_offset
= 0;
3641 lmo
.l_addr_size
= 4;
3643 lmo
.l_name_offset
= 4;
3644 lmo
.l_name_size
= 4;
3646 lmo
.l_next_offset
= 12;
3647 lmo
.l_next_size
= 4;
3649 lmo
.l_prev_offset
= 16;
3650 lmo
.l_prev_size
= 4;
3657 cris_fpless_backtrace (char *noargs
, int from_tty
)
3659 /* Points at the instruction after the jsr (except when in innermost frame
3660 where it points at the original pc). */
3663 /* Temporary variable, used for parsing from the start of the function that
3664 the pc is in, up to the pc. */
3665 CORE_ADDR tmp_pc
= 0;
3668 /* Information about current frame. */
3669 struct symtab_and_line sal
;
3672 /* Present instruction. */
3673 unsigned short insn
;
3675 /* Next instruction, lookahead. */
3676 unsigned short insn_next
;
3678 /* This is to store the offset between sp at start of function and until we
3679 reach push srp (if any). */
3680 int sp_add_later
= 0;
3681 int push_srp_found
= 0;
3685 /* Frame counter. */
3688 /* For the innermost frame, we want to look at srp in case it's a leaf
3689 function (since there's no push srp in that case). */
3690 int innermost_frame
= 1;
3692 deprecated_read_register_gen (PC_REGNUM
, (char *) &pc
);
3693 deprecated_read_register_gen (SP_REGNUM
, (char *) &sp
);
3695 /* We make an explicit return when we can't find an outer frame. */
3698 /* Get file name and line number. */
3699 sal
= find_pc_line (pc
, 0);
3701 /* Get function name. */
3702 find_pc_partial_function (pc
, &func_name
, (CORE_ADDR
*) NULL
,
3703 (CORE_ADDR
*) NULL
);
3705 /* Print information about current frame. */
3706 printf_unfiltered ("#%i 0x%08lx in %s", frame
++, pc
, func_name
);
3709 printf_unfiltered (" at %s:%i", sal
.symtab
->filename
, sal
.line
);
3711 printf_unfiltered ("\n");
3713 /* Get the start address of this function. */
3714 tmp_pc
= get_pc_function_start (pc
);
3716 /* Mini parser, only meant to find push sp and sub ...,sp from the start
3717 of the function, up to the pc. */
3720 insn
= read_memory_unsigned_integer (tmp_pc
, sizeof (short));
3721 tmp_pc
+= sizeof (short);
3724 /* push <reg> 32 bit instruction */
3725 insn_next
= read_memory_unsigned_integer (tmp_pc
,
3727 tmp_pc
+= sizeof (short);
3729 /* Recognize srp. */
3730 if (insn_next
== 0xBE7E)
3732 /* For subsequent (not this one though) push or sub which
3733 affects sp, adjust sp immediately. */
3736 /* Note: this will break if we ever encounter a
3737 push vr (1 byte) or push ccr (2 bytes). */
3742 /* Some other register was pushed. */
3753 else if (cris_get_operand2 (insn
) == SP_REGNUM
3754 && cris_get_mode (insn
) == 0x0000
3755 && cris_get_opcode (insn
) == 0x000A)
3758 val
= cris_get_quick_value (insn
);
3766 sp_add_later
+= val
;
3770 else if (cris_get_operand2 (insn
) == SP_REGNUM
3771 /* Autoincrement addressing mode. */
3772 && cris_get_mode (insn
) == 0x0003
3774 && ((insn
) & 0x03E0) >> 5 == 0x0004)
3777 val
= get_data_from_address (&insn
, tmp_pc
);
3785 sp_add_later
+= val
;
3788 else if (cris_get_operand2 (insn
) == SP_REGNUM
3789 && ((insn
& 0x0F00) >> 8) == 0x0001
3790 && (cris_get_signed_offset (insn
) < 0))
3792 /* Immediate byte offset addressing prefix word with sp as base
3793 register. Used for CRIS v8 i.e. ETRAX 100 and newer if <val>
3794 is between 64 and 128.
3795 movem r<regsave>,[sp=sp-<val>] */
3796 val
= -cris_get_signed_offset (insn
);
3797 insn_next
= read_memory_unsigned_integer (tmp_pc
,
3799 tmp_pc
+= sizeof (short);
3801 if (cris_get_mode (insn_next
) == PREFIX_ASSIGN_MODE
3802 && cris_get_opcode (insn_next
) == 0x000F
3803 && cris_get_size (insn_next
) == 0x0003
3804 && cris_get_operand1 (insn_next
) == SP_REGNUM
)
3812 sp_add_later
+= val
;
3823 /* sp should now point at where srp is stored on the stack. Update
3824 the pc to the srp. */
3825 pc
= read_memory_unsigned_integer (sp
, 4);
3827 else if (innermost_frame
)
3829 /* We couldn't find a push srp in the prologue, so this must be
3830 a leaf function, and thus we use the srp register directly.
3831 This should happen at most once, for the innermost function. */
3832 deprecated_read_register_gen (SRP_REGNUM
, (char *) &pc
);
3836 /* Couldn't find an outer frame. */
3840 /* Reset flag. (In case the innermost frame wasn't a leaf, we don't
3841 want to look at the srp register later either). */
3842 innermost_frame
= 0;
3844 /* Now, add the offset for everything up to, and including push srp,
3845 that was held back during the prologue parsing. */
3852 _initialize_cris_tdep (void)
3854 struct cmd_list_element
*c
;
3856 gdbarch_register (bfd_arch_cris
, cris_gdbarch_init
, cris_dump_tdep
);
3858 /* Used in disassembly. */
3859 tm_print_insn
= cris_delayed_get_disassembler
;
3861 /* CRIS-specific user-commands. */
3862 c
= add_set_cmd ("cris-version", class_support
, var_integer
,
3863 (char *) &usr_cmd_cris_version
,
3864 "Set the current CRIS version.", &setlist
);
3865 set_cmd_sfunc (c
, cris_version_update
);
3866 add_show_from_set (c
, &showlist
);
3868 c
= add_set_enum_cmd ("cris-mode", class_support
, cris_mode_enums
,
3870 "Set the current CRIS mode.", &setlist
);
3871 set_cmd_sfunc (c
, cris_mode_update
);
3872 add_show_from_set (c
, &showlist
);
3874 c
= add_set_enum_cmd ("cris-abi", class_support
, cris_abi_enums
,
3876 "Set the current CRIS ABI version.", &setlist
);
3877 set_cmd_sfunc (c
, cris_abi_update
);
3878 add_show_from_set (c
, &showlist
);
3880 c
= add_cmd ("cris-fpless-backtrace", class_support
, cris_fpless_backtrace
,
3881 "Display call chain using the subroutine return pointer.\n"
3882 "Note that this displays the address after the jump to the "
3883 "subroutine.", &cmdlist
);
3885 add_core_fns (&cris_elf_core_fns
);
3889 /* Prints out all target specific values. */
3892 cris_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
)
3894 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3897 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_version = %i\n",
3898 tdep
->cris_version
);
3899 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_mode = %s\n",
3901 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_abi = %s\n",
3908 cris_version_update (char *ignore_args
, int from_tty
,
3909 struct cmd_list_element
*c
)
3911 struct gdbarch_info info
;
3913 /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones
3914 the set command passed as a parameter. The clone operation will
3915 include (BUG?) any ``set'' command callback, if present.
3916 Commands like ``info set'' call all the ``show'' command
3917 callbacks. Unfortunatly, for ``show'' commands cloned from
3918 ``set'', this includes callbacks belonging to ``set'' commands.
3919 Making this worse, this only occures if add_show_from_set() is
3920 called after add_cmd_sfunc() (BUG?). */
3922 /* From here on, trust the user's CRIS version setting. */
3923 if (cmd_type (c
) == set_cmd
)
3925 usr_cmd_cris_version_valid
= 1;
3927 /* Update the current architecture, if needed. */
3928 gdbarch_info_init (&info
);
3929 if (!gdbarch_update_p (info
))
3930 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3935 cris_mode_update (char *ignore_args
, int from_tty
,
3936 struct cmd_list_element
*c
)
3938 struct gdbarch_info info
;
3940 /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones
3941 the set command passed as a parameter. The clone operation will
3942 include (BUG?) any ``set'' command callback, if present.
3943 Commands like ``info set'' call all the ``show'' command
3944 callbacks. Unfortunatly, for ``show'' commands cloned from
3945 ``set'', this includes callbacks belonging to ``set'' commands.
3946 Making this worse, this only occures if add_show_from_set() is
3947 called after add_cmd_sfunc() (BUG?). */
3949 /* From here on, trust the user's CRIS mode setting. */
3950 if (cmd_type (c
) == set_cmd
)
3952 usr_cmd_cris_mode_valid
= 1;
3954 /* Update the current architecture, if needed. */
3955 gdbarch_info_init (&info
);
3956 if (!gdbarch_update_p (info
))
3957 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3962 cris_abi_update (char *ignore_args
, int from_tty
,
3963 struct cmd_list_element
*c
)
3965 struct gdbarch_info info
;
3967 /* NOTE: cagney/2002-03-17: The add_show_from_set() function clones
3968 the set command passed as a parameter. The clone operation will
3969 include (BUG?) any ``set'' command callback, if present.
3970 Commands like ``info set'' call all the ``show'' command
3971 callbacks. Unfortunatly, for ``show'' commands cloned from
3972 ``set'', this includes callbacks belonging to ``set'' commands.
3973 Making this worse, this only occures if add_show_from_set() is
3974 called after add_cmd_sfunc() (BUG?). */
3976 /* From here on, trust the user's CRIS ABI setting. */
3977 if (cmd_type (c
) == set_cmd
)
3979 usr_cmd_cris_abi_valid
= 1;
3981 /* Update the current architecture, if needed. */
3982 gdbarch_info_init (&info
);
3983 if (!gdbarch_update_p (info
))
3984 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3988 /* Copied from pa64solib.c, with a couple of minor changes. */
3991 bfd_lookup_symbol (bfd
*abfd
, const char *symname
)
3993 unsigned int storage_needed
;
3995 asymbol
**symbol_table
;
3996 unsigned int number_of_symbols
;
3998 struct cleanup
*back_to
;
3999 CORE_ADDR symaddr
= 0;
4001 storage_needed
= bfd_get_symtab_upper_bound (abfd
);
4003 if (storage_needed
> 0)
4005 symbol_table
= (asymbol
**) xmalloc (storage_needed
);
4006 back_to
= make_cleanup (free
, (PTR
) symbol_table
);
4007 number_of_symbols
= bfd_canonicalize_symtab (abfd
, symbol_table
);
4009 for (i
= 0; i
< number_of_symbols
; i
++)
4011 sym
= *symbol_table
++;
4012 if (!strcmp (sym
->name
, symname
))
4014 /* Bfd symbols are section relative. */
4015 symaddr
= sym
->value
+ sym
->section
->vma
;
4019 do_cleanups (back_to
);
4024 static struct gdbarch
*
4025 cris_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
4027 struct gdbarch
*gdbarch
;
4028 struct gdbarch_tdep
*tdep
;
4030 const char *cris_mode
;
4031 const char *cris_abi
;
4032 CORE_ADDR cris_abi_sym
= 0;
4035 if (usr_cmd_cris_version_valid
)
4037 /* Trust the user's CRIS version setting. */
4038 cris_version
= usr_cmd_cris_version
;
4042 /* Assume it's CRIS version 10. */
4046 if (usr_cmd_cris_mode_valid
)
4048 /* Trust the user's CRIS mode setting. */
4049 cris_mode
= usr_cmd_cris_mode
;
4051 else if (cris_version
== 10)
4053 /* Assume CRIS version 10 is in user mode. */
4054 cris_mode
= CRIS_MODE_USER
;
4058 /* Strictly speaking, older CRIS version don't have a supervisor mode,
4059 but we regard its only mode as supervisor mode. */
4060 cris_mode
= CRIS_MODE_SUPERVISOR
;
4063 if (usr_cmd_cris_abi_valid
)
4065 /* Trust the user's ABI setting. */
4066 cris_abi
= usr_cmd_cris_abi
;
4070 if (bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
4072 /* An elf target uses the new ABI. */
4073 cris_abi
= CRIS_ABI_V2
;
4075 else if (bfd_get_flavour (info
.abfd
) == bfd_target_aout_flavour
)
4077 /* An a.out target may use either ABI. Look for hints in the
4079 cris_abi_sym
= bfd_lookup_symbol (info
.abfd
, CRIS_ABI_SYMBOL
);
4080 cris_abi
= cris_abi_sym
? CRIS_ABI_V2
: CRIS_ABI_ORIGINAL
;
4084 /* Unknown bfd flavour. Assume it's the new ABI. */
4085 cris_abi
= CRIS_ABI_V2
;
4088 else if (arches
!= NULL
)
4090 /* No bfd available. Stick with the ABI from the most recently
4091 selected architecture of this same family (the head of arches
4092 always points to this). (This is to avoid changing the ABI
4093 when the user updates the architecture with the 'set
4094 cris-version' command.) */
4095 cris_abi
= gdbarch_tdep (arches
->gdbarch
)->cris_abi
;
4099 /* No bfd, and no previously selected architecture available.
4100 Assume it's the new ABI. */
4101 cris_abi
= CRIS_ABI_V2
;
4104 /* Make the current settings visible to the user. */
4105 usr_cmd_cris_version
= cris_version
;
4106 usr_cmd_cris_mode
= cris_mode
;
4107 usr_cmd_cris_abi
= cris_abi
;
4109 /* Find a candidate among the list of pre-declared architectures. Both
4110 CRIS version and ABI must match. */
4111 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
4113 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
4115 if ((gdbarch_tdep (arches
->gdbarch
)->cris_version
== cris_version
)
4116 && (gdbarch_tdep (arches
->gdbarch
)->cris_mode
== cris_mode
)
4117 && (gdbarch_tdep (arches
->gdbarch
)->cris_abi
== cris_abi
))
4118 return arches
->gdbarch
;
4121 /* No matching architecture was found. Create a new one. */
4122 tdep
= (struct gdbarch_tdep
*) xmalloc (sizeof (struct gdbarch_tdep
));
4123 gdbarch
= gdbarch_alloc (&info
, tdep
);
4125 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
4126 ready to unwind the PC first (see frame.c:get_prev_frame()). */
4127 set_gdbarch_deprecated_init_frame_pc (gdbarch
, init_frame_pc_default
);
4129 tdep
->cris_version
= cris_version
;
4130 tdep
->cris_mode
= cris_mode
;
4131 tdep
->cris_abi
= cris_abi
;
4133 /* INIT shall ensure that the INFO.BYTE_ORDER is non-zero. */
4134 switch (info
.byte_order
)
4136 case BFD_ENDIAN_LITTLE
:
4140 case BFD_ENDIAN_BIG
:
4141 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: big endian byte order in info");
4145 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown byte order in info");
4148 /* Initialize the ABI dependent things. */
4149 if (tdep
->cris_abi
== CRIS_ABI_ORIGINAL
)
4151 set_gdbarch_double_bit (gdbarch
, 32);
4152 set_gdbarch_push_arguments (gdbarch
, cris_abi_original_push_arguments
);
4153 set_gdbarch_deprecated_store_return_value (gdbarch
,
4154 cris_abi_original_store_return_value
);
4155 set_gdbarch_deprecated_extract_return_value
4156 (gdbarch
, cris_abi_original_extract_return_value
);
4157 set_gdbarch_reg_struct_has_addr
4158 (gdbarch
, cris_abi_original_reg_struct_has_addr
);
4160 else if (tdep
->cris_abi
== CRIS_ABI_V2
)
4162 set_gdbarch_double_bit (gdbarch
, 64);
4163 set_gdbarch_push_arguments (gdbarch
, cris_abi_v2_push_arguments
);
4164 set_gdbarch_deprecated_store_return_value (gdbarch
, cris_abi_v2_store_return_value
);
4165 set_gdbarch_deprecated_extract_return_value
4166 (gdbarch
, cris_abi_v2_extract_return_value
);
4167 set_gdbarch_reg_struct_has_addr (gdbarch
,
4168 cris_abi_v2_reg_struct_has_addr
);
4171 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown CRIS ABI");
4173 /* The default definition of a long double is 2 * TARGET_DOUBLE_BIT,
4174 which means we have to set this explicitly. */
4175 set_gdbarch_long_double_bit (gdbarch
, 64);
4177 /* There are 32 registers (some of which may not be implemented). */
4178 set_gdbarch_num_regs (gdbarch
, 32);
4179 set_gdbarch_sp_regnum (gdbarch
, 14);
4180 set_gdbarch_fp_regnum (gdbarch
, 8);
4181 set_gdbarch_pc_regnum (gdbarch
, 15);
4183 set_gdbarch_register_name (gdbarch
, cris_register_name
);
4185 /* Length of ordinary registers used in push_word and a few other places.
4186 REGISTER_RAW_SIZE is the real way to know how big a register is. */
4187 set_gdbarch_register_size (gdbarch
, 4);
4190 set_gdbarch_register_bytes_ok (gdbarch
, cris_register_bytes_ok
);
4191 set_gdbarch_software_single_step (gdbarch
, cris_software_single_step
);
4194 set_gdbarch_cannot_store_register (gdbarch
, cris_cannot_store_register
);
4195 set_gdbarch_cannot_fetch_register (gdbarch
, cris_cannot_fetch_register
);
4198 /* The total amount of space needed to store (in an array called registers)
4199 GDB's copy of the machine's register state. Note: We can not use
4200 cris_register_size at this point, since it relies on current_gdbarch
4202 switch (tdep
->cris_version
)
4208 /* Support for these may be added later. */
4209 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unsupported CRIS version");
4214 /* CRIS v8 and v9, a.k.a. ETRAX 100. General registers R0 - R15
4215 (32 bits), special registers P0 - P1 (8 bits), P4 - P5 (16 bits),
4216 and P8 - P14 (32 bits). */
4217 register_bytes
= (16 * 4) + (2 * 1) + (2 * 2) + (7 * 4);
4222 /* CRIS v10 and v11, a.k.a. ETRAX 100LX. In addition to ETRAX 100,
4223 P7 (32 bits), and P15 (32 bits) have been implemented. */
4224 register_bytes
= (16 * 4) + (2 * 1) + (2 * 2) + (9 * 4);
4228 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown CRIS version");
4231 set_gdbarch_register_bytes (gdbarch
, register_bytes
);
4233 /* Returns the register offset for the first byte of register regno's space
4234 in the saved register state. */
4235 set_gdbarch_register_byte (gdbarch
, cris_register_offset
);
4237 /* The length of the registers in the actual machine representation. */
4238 set_gdbarch_register_raw_size (gdbarch
, cris_register_size
);
4240 /* The largest value REGISTER_RAW_SIZE can have. */
4241 set_gdbarch_max_register_raw_size (gdbarch
, 32);
4243 /* The length of the registers in the program's representation. */
4244 set_gdbarch_register_virtual_size (gdbarch
, cris_register_size
);
4246 /* The largest value REGISTER_VIRTUAL_SIZE can have. */
4247 set_gdbarch_max_register_virtual_size (gdbarch
, 32);
4249 set_gdbarch_register_virtual_type (gdbarch
, cris_register_virtual_type
);
4251 /* Use generic dummy frames. */
4253 /* Where to execute the call in the memory segments. */
4254 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
4256 /* Start execution at the beginning of dummy. */
4257 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
4258 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
4260 /* Set to 1 since call_dummy_breakpoint_offset was defined. */
4261 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
4263 /* Read all about dummy frames in blockframe.c. */
4264 set_gdbarch_call_dummy_length (gdbarch
, 0);
4265 set_gdbarch_deprecated_pc_in_call_dummy (gdbarch
, deprecated_pc_in_call_dummy_at_entry_point
);
4267 /* Defined to 1 to indicate that the target supports inferior function
4269 set_gdbarch_call_dummy_p (gdbarch
, 1);
4270 set_gdbarch_call_dummy_words (gdbarch
, 0);
4271 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
4273 /* No stack adjustment needed when peforming an inferior function call. */
4274 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
4275 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
4277 set_gdbarch_get_saved_register (gdbarch
, deprecated_generic_get_saved_register
);
4279 /* No register requires conversion from raw format to virtual format. */
4280 set_gdbarch_register_convertible (gdbarch
, generic_register_convertible_not
);
4282 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
4283 set_gdbarch_push_return_address (gdbarch
, cris_push_return_address
);
4284 set_gdbarch_pop_frame (gdbarch
, cris_pop_frame
);
4286 set_gdbarch_store_struct_return (gdbarch
, cris_store_struct_return
);
4287 set_gdbarch_deprecated_extract_struct_value_address
4288 (gdbarch
, cris_extract_struct_value_address
);
4289 set_gdbarch_use_struct_convention (gdbarch
, cris_use_struct_convention
);
4291 set_gdbarch_frame_init_saved_regs (gdbarch
, cris_frame_init_saved_regs
);
4292 set_gdbarch_init_extra_frame_info (gdbarch
, cris_init_extra_frame_info
);
4293 set_gdbarch_skip_prologue (gdbarch
, cris_skip_prologue
);
4294 set_gdbarch_prologue_frameless_p (gdbarch
, generic_prologue_frameless_p
);
4296 /* The stack grows downward. */
4297 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
4299 set_gdbarch_breakpoint_from_pc (gdbarch
, cris_breakpoint_from_pc
);
4301 /* The PC must not be decremented after a breakpoint. (The breakpoint
4302 handler takes care of that.) */
4303 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
4305 /* Offset from address of function to start of its code. */
4306 set_gdbarch_function_start_offset (gdbarch
, 0);
4308 /* The number of bytes at the start of arglist that are not really args,
4309 0 in the CRIS ABI. */
4310 set_gdbarch_frame_args_skip (gdbarch
, 0);
4311 set_gdbarch_frameless_function_invocation
4312 (gdbarch
, cris_frameless_function_invocation
);
4313 set_gdbarch_frame_chain (gdbarch
, cris_frame_chain
);
4315 set_gdbarch_frame_saved_pc (gdbarch
, cris_frame_saved_pc
);
4316 set_gdbarch_saved_pc_after_call (gdbarch
, cris_saved_pc_after_call
);
4318 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
4320 /* No extra stack alignment needed. Set to 1 by default. */
4321 set_gdbarch_extra_stack_alignment_needed (gdbarch
, 0);
4323 /* Helpful for backtracing and returning in a call dummy. */
4324 set_gdbarch_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
4326 /* Use target_specific function to define link map offsets. */
4327 set_solib_svr4_fetch_link_map_offsets
4328 (gdbarch
, cris_linux_svr4_fetch_link_map_offsets
);