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[gdb] Don't use gdb_stdlog for inferior-events
[binutils-gdb.git] / gdb / csky-tdep.c
1 /* Target-dependent code for the CSKY architecture, for GDB.
2
3 Copyright (C) 2010-2021 Free Software Foundation, Inc.
4
5 Contributed by C-SKY Microsystems and Mentor Graphics.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "gdbsupport/gdb_assert.h"
24 #include "frame.h"
25 #include "inferior.h"
26 #include "symtab.h"
27 #include "value.h"
28 #include "gdbcmd.h"
29 #include "language.h"
30 #include "gdbcore.h"
31 #include "symfile.h"
32 #include "objfiles.h"
33 #include "gdbtypes.h"
34 #include "target.h"
35 #include "arch-utils.h"
36 #include "regcache.h"
37 #include "osabi.h"
38 #include "block.h"
39 #include "reggroups.h"
40 #include "elf/csky.h"
41 #include "elf-bfd.h"
42 #include "symcat.h"
43 #include "sim-regno.h"
44 #include "dis-asm.h"
45 #include "frame-unwind.h"
46 #include "frame-base.h"
47 #include "trad-frame.h"
48 #include "infcall.h"
49 #include "floatformat.h"
50 #include "remote.h"
51 #include "target-descriptions.h"
52 #include "dwarf2/frame.h"
53 #include "user-regs.h"
54 #include "valprint.h"
55 #include "csky-tdep.h"
56 #include "regset.h"
57 #include "opcode/csky.h"
58 #include <algorithm>
59 #include <vector>
60
61 /* Control debugging information emitted in this file. */
62 static bool csky_debug = false;
63
64 static struct reggroup *cr_reggroup;
65 static struct reggroup *fr_reggroup;
66 static struct reggroup *vr_reggroup;
67 static struct reggroup *mmu_reggroup;
68 static struct reggroup *prof_reggroup;
69
70 /* Convenience function to print debug messages in prologue analysis. */
71
72 static void
73 print_savedreg_msg (int regno, int offsets[], bool print_continuing)
74 {
75 fprintf_unfiltered (gdb_stdlog, "csky: r%d saved at offset 0x%x\n",
76 regno, offsets[regno]);
77 if (print_continuing)
78 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
79 }
80
81 /* Check whether the instruction at ADDR is 16-bit or not. */
82
83 static int
84 csky_pc_is_csky16 (struct gdbarch *gdbarch, CORE_ADDR addr)
85 {
86 gdb_byte target_mem[2];
87 int status;
88 unsigned int insn;
89 int ret = 1;
90 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
91
92 status = target_read_memory (addr, target_mem, 2);
93 /* Assume a 16-bit instruction if we can't read memory. */
94 if (status)
95 return 1;
96
97 /* Get instruction from memory. */
98 insn = extract_unsigned_integer (target_mem, 2, byte_order);
99 if ((insn & CSKY_32_INSN_MASK) == CSKY_32_INSN_MASK)
100 ret = 0;
101 else if (insn == CSKY_BKPT_INSN)
102 {
103 /* Check for 32-bit bkpt instruction which is all 0. */
104 status = target_read_memory (addr + 2, target_mem, 2);
105 if (status)
106 return 1;
107
108 insn = extract_unsigned_integer (target_mem, 2, byte_order);
109 if (insn == CSKY_BKPT_INSN)
110 ret = 0;
111 }
112 return ret;
113 }
114
115 /* Get one instruction at ADDR and store it in INSN. Return 2 for
116 a 16-bit instruction or 4 for a 32-bit instruction. */
117
118 static int
119 csky_get_insn (struct gdbarch *gdbarch, CORE_ADDR addr, unsigned int *insn)
120 {
121 gdb_byte target_mem[2];
122 unsigned int insn_type;
123 int status;
124 int insn_len = 2;
125 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
126
127 status = target_read_memory (addr, target_mem, 2);
128 if (status)
129 memory_error (TARGET_XFER_E_IO, addr);
130
131 insn_type = extract_unsigned_integer (target_mem, 2, byte_order);
132 if (CSKY_32_INSN_MASK == (insn_type & CSKY_32_INSN_MASK))
133 {
134 status = target_read_memory (addr + 2, target_mem, 2);
135 if (status)
136 memory_error (TARGET_XFER_E_IO, addr);
137 insn_type = ((insn_type << 16)
138 | extract_unsigned_integer (target_mem, 2, byte_order));
139 insn_len = 4;
140 }
141 *insn = insn_type;
142 return insn_len;
143 }
144
145 /* Implement the read_pc gdbarch method. */
146
147 static CORE_ADDR
148 csky_read_pc (readable_regcache *regcache)
149 {
150 ULONGEST pc;
151 regcache->cooked_read (CSKY_PC_REGNUM, &pc);
152 return pc;
153 }
154
155 /* Implement the write_pc gdbarch method. */
156
157 static void
158 csky_write_pc (regcache *regcache, CORE_ADDR val)
159 {
160 regcache_cooked_write_unsigned (regcache, CSKY_PC_REGNUM, val);
161 }
162
163 /* C-Sky ABI register names. */
164
165 static const char * const csky_register_names[] =
166 {
167 /* General registers 0 - 31. */
168 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
169 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
170 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
171 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
172
173 /* DSP hilo registers 36 and 37. */
174 "", "", "", "", "hi", "lo", "", "",
175
176 /* FPU/VPU general registers 40 - 71. */
177 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
178 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
179 "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7",
180 "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15",
181
182 /* Program counter 72. */
183 "pc",
184
185 /* Optional registers (ar) 73 - 88. */
186 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
187 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
188
189 /* Control registers (cr) 89 - 119. */
190 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
191 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
192 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
193 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
194
195 /* FPU/VPU control registers 121 ~ 123. */
196 /* User sp 127. */
197 "fid", "fcr", "fesr", "", "", "", "usp",
198
199 /* MMU control registers: 128 - 136. */
200 "mcr0", "mcr2", "mcr3", "mcr4", "mcr6", "mcr8", "mcr29", "mcr30",
201 "mcr31", "", "", "",
202
203 /* Profiling control registers 140 - 143. */
204 /* Profiling software general registers 144 - 157. */
205 "profcr0", "profcr1", "profcr2", "profcr3", "profsgr0", "profsgr1",
206 "profsgr2", "profsgr3", "profsgr4", "profsgr5", "profsgr6", "profsgr7",
207 "profsgr8", "profsgr9", "profsgr10","profsgr11","profsgr12", "profsgr13",
208 "", "",
209
210 /* Profiling architecture general registers 160 - 174. */
211 "profagr0", "profagr1", "profagr2", "profagr3", "profagr4", "profagr5",
212 "profagr6", "profagr7", "profagr8", "profagr9", "profagr10","profagr11",
213 "profagr12","profagr13","profagr14", "",
214
215 /* Profiling extension general registers 176 - 188. */
216 "profxgr0", "profxgr1", "profxgr2", "profxgr3", "profxgr4", "profxgr5",
217 "profxgr6", "profxgr7", "profxgr8", "profxgr9", "profxgr10","profxgr11",
218 "profxgr12",
219
220 /* Control registers in bank1. */
221 "", "", "", "", "", "", "", "",
222 "", "", "", "", "", "", "", "",
223 "cp1cr16", "cp1cr17", "cp1cr18", "cp1cr19", "cp1cr20", "", "", "",
224 "", "", "", "", "", "", "", "",
225
226 /* Control registers in bank3 (ICE). */
227 "sepsr", "sevbr", "seepsr", "", "seepc", "", "nsssp", "seusp",
228 "sedcr", "", "", "", "", "", "", "",
229 "", "", "", "", "", "", "", "",
230 "", "", "", "", "", "", "", ""
231 };
232
233 /* Implement the register_name gdbarch method. */
234
235 static const char *
236 csky_register_name (struct gdbarch *gdbarch, int reg_nr)
237 {
238 if (reg_nr < 0)
239 return NULL;
240
241 if (reg_nr >= gdbarch_num_regs (gdbarch))
242 return NULL;
243
244 return csky_register_names[reg_nr];
245 }
246
247 /* Construct vector type for vrx registers. */
248
249 static struct type *
250 csky_vector_type (struct gdbarch *gdbarch)
251 {
252 const struct builtin_type *bt = builtin_type (gdbarch);
253
254 struct type *t;
255
256 t = arch_composite_type (gdbarch, "__gdb_builtin_type_vec128i",
257 TYPE_CODE_UNION);
258
259 append_composite_type_field (t, "u32",
260 init_vector_type (bt->builtin_int32, 4));
261 append_composite_type_field (t, "u16",
262 init_vector_type (bt->builtin_int16, 8));
263 append_composite_type_field (t, "u8",
264 init_vector_type (bt->builtin_int8, 16));
265
266 t->set_is_vector (true);
267 t->set_name ("builtin_type_vec128i");
268
269 return t;
270 }
271
272 /* Return the GDB type object for the "standard" data type
273 of data in register N. */
274
275 static struct type *
276 csky_register_type (struct gdbarch *gdbarch, int reg_nr)
277 {
278 /* PC, EPC, FPC is a text pointer. */
279 if ((reg_nr == CSKY_PC_REGNUM) || (reg_nr == CSKY_EPC_REGNUM)
280 || (reg_nr == CSKY_FPC_REGNUM))
281 return builtin_type (gdbarch)->builtin_func_ptr;
282
283 /* VBR is a data pointer. */
284 if (reg_nr == CSKY_VBR_REGNUM)
285 return builtin_type (gdbarch)->builtin_data_ptr;
286
287 /* Float register has 64 bits, and only in ck810. */
288 if ((reg_nr >=CSKY_FR0_REGNUM) && (reg_nr <= CSKY_FR0_REGNUM + 15))
289 return arch_float_type (gdbarch, 64, "builtin_type_csky_ext",
290 floatformats_ieee_double);
291
292 /* Vector register has 128 bits, and only in ck810. */
293 if ((reg_nr >= CSKY_VR0_REGNUM) && (reg_nr <= CSKY_VR0_REGNUM + 15))
294 return csky_vector_type (gdbarch);
295
296 /* Profiling general register has 48 bits, we use 64bit. */
297 if ((reg_nr >= CSKY_PROFGR_REGNUM) && (reg_nr <= CSKY_PROFGR_REGNUM + 44))
298 return builtin_type (gdbarch)->builtin_uint64;
299
300 if (reg_nr == CSKY_SP_REGNUM)
301 return builtin_type (gdbarch)->builtin_data_ptr;
302
303 /* Others are 32 bits. */
304 return builtin_type (gdbarch)->builtin_int32;
305 }
306
307 /* Data structure to marshall items in a dummy stack frame when
308 calling a function in the inferior. */
309
310 struct stack_item
311 {
312 stack_item (int len_, const gdb_byte *data_)
313 : len (len_), data (data_)
314 {}
315
316 int len;
317 const gdb_byte *data;
318 };
319
320 /* Implement the push_dummy_call gdbarch method. */
321
322 static CORE_ADDR
323 csky_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
324 struct regcache *regcache, CORE_ADDR bp_addr,
325 int nargs, struct value **args, CORE_ADDR sp,
326 function_call_return_method return_method,
327 CORE_ADDR struct_addr)
328 {
329 int argnum;
330 int argreg = CSKY_ABI_A0_REGNUM;
331 int last_arg_regnum = CSKY_ABI_LAST_ARG_REGNUM;
332 int need_dummy_stack = 0;
333 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
334 std::vector<stack_item> stack_items;
335
336 /* Set the return address. For CSKY, the return breakpoint is
337 always at BP_ADDR. */
338 regcache_cooked_write_unsigned (regcache, CSKY_LR_REGNUM, bp_addr);
339
340 /* The struct_return pointer occupies the first parameter
341 passing register. */
342 if (return_method == return_method_struct)
343 {
344 if (csky_debug)
345 {
346 fprintf_unfiltered (gdb_stdlog,
347 "csky: struct return in %s = %s\n",
348 gdbarch_register_name (gdbarch, argreg),
349 paddress (gdbarch, struct_addr));
350 }
351 regcache_cooked_write_unsigned (regcache, argreg, struct_addr);
352 argreg++;
353 }
354
355 /* Put parameters into argument registers in REGCACHE.
356 In ABI argument registers are r0 through r3. */
357 for (argnum = 0; argnum < nargs; argnum++)
358 {
359 int len;
360 struct type *arg_type;
361 const gdb_byte *val;
362
363 arg_type = check_typedef (value_type (args[argnum]));
364 len = TYPE_LENGTH (arg_type);
365 val = value_contents (args[argnum]).data ();
366
367 /* Copy the argument to argument registers or the dummy stack.
368 Large arguments are split between registers and stack.
369
370 If len < 4, there is no need to worry about endianness since
371 the arguments will always be stored in the low address. */
372 if (len < 4)
373 {
374 CORE_ADDR regval
375 = extract_unsigned_integer (val, len, byte_order);
376 regcache_cooked_write_unsigned (regcache, argreg, regval);
377 argreg++;
378 }
379 else
380 {
381 while (len > 0)
382 {
383 int partial_len = len < 4 ? len : 4;
384 if (argreg <= last_arg_regnum)
385 {
386 /* The argument is passed in an argument register. */
387 CORE_ADDR regval
388 = extract_unsigned_integer (val, partial_len,
389 byte_order);
390 if (byte_order == BFD_ENDIAN_BIG)
391 regval <<= (4 - partial_len) * 8;
392
393 /* Put regval into register in REGCACHE. */
394 regcache_cooked_write_unsigned (regcache, argreg,
395 regval);
396 argreg++;
397 }
398 else
399 {
400 /* The argument should be pushed onto the dummy stack. */
401 stack_items.emplace_back (4, val);
402 need_dummy_stack += 4;
403 }
404 len -= partial_len;
405 val += partial_len;
406 }
407 }
408 }
409
410 /* Transfer the dummy stack frame to the target. */
411 std::vector<stack_item>::reverse_iterator iter;
412 for (iter = stack_items.rbegin (); iter != stack_items.rend (); ++iter)
413 {
414 sp -= iter->len;
415 write_memory (sp, iter->data, iter->len);
416 }
417
418 /* Finally, update the SP register. */
419 regcache_cooked_write_unsigned (regcache, CSKY_SP_REGNUM, sp);
420 return sp;
421 }
422
423 /* Implement the return_value gdbarch method. */
424
425 static enum return_value_convention
426 csky_return_value (struct gdbarch *gdbarch, struct value *function,
427 struct type *valtype, struct regcache *regcache,
428 gdb_byte *readbuf, const gdb_byte *writebuf)
429 {
430 CORE_ADDR regval;
431 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
432 int len = TYPE_LENGTH (valtype);
433 unsigned int ret_regnum = CSKY_RET_REGNUM;
434
435 /* Csky abi specifies that return values larger than 8 bytes
436 are put on the stack. */
437 if (len > 8)
438 return RETURN_VALUE_STRUCT_CONVENTION;
439 else
440 {
441 if (readbuf != NULL)
442 {
443 ULONGEST tmp;
444 /* By using store_unsigned_integer we avoid having to do
445 anything special for small big-endian values. */
446 regcache->cooked_read (ret_regnum, &tmp);
447 store_unsigned_integer (readbuf, (len > 4 ? 4 : len),
448 byte_order, tmp);
449 if (len > 4)
450 {
451 regcache->cooked_read (ret_regnum + 1, &tmp);
452 store_unsigned_integer (readbuf + 4, 4, byte_order, tmp);
453 }
454 }
455 if (writebuf != NULL)
456 {
457 regval = extract_unsigned_integer (writebuf, len > 4 ? 4 : len,
458 byte_order);
459 regcache_cooked_write_unsigned (regcache, ret_regnum, regval);
460 if (len > 4)
461 {
462 regval = extract_unsigned_integer ((gdb_byte *) writebuf + 4,
463 4, byte_order);
464 regcache_cooked_write_unsigned (regcache, ret_regnum + 1,
465 regval);
466 }
467
468 }
469 return RETURN_VALUE_REGISTER_CONVENTION;
470 }
471 }
472
473 /* Implement the frame_align gdbarch method.
474
475 Adjust the address downward (direction of stack growth) so that it
476 is correctly aligned for a new stack frame. */
477
478 static CORE_ADDR
479 csky_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
480 {
481 return align_down (addr, 4);
482 }
483
484 /* Unwind cache used for gdbarch fallback unwinder. */
485
486 struct csky_unwind_cache
487 {
488 /* The stack pointer at the time this frame was created; i.e. the
489 caller's stack pointer when this function was called. It is used
490 to identify this frame. */
491 CORE_ADDR prev_sp;
492
493 /* The frame base for this frame is just prev_sp - frame size.
494 FRAMESIZE is the distance from the frame pointer to the
495 initial stack pointer. */
496 int framesize;
497
498 /* The register used to hold the frame pointer for this frame. */
499 int framereg;
500
501 /* Saved register offsets. */
502 trad_frame_saved_reg *saved_regs;
503 };
504
505 /* Do prologue analysis, returning the PC of the first instruction
506 after the function prologue. */
507
508 static CORE_ADDR
509 csky_analyze_prologue (struct gdbarch *gdbarch,
510 CORE_ADDR start_pc,
511 CORE_ADDR limit_pc,
512 CORE_ADDR end_pc,
513 struct frame_info *this_frame,
514 struct csky_unwind_cache *this_cache,
515 lr_type_t lr_type)
516 {
517 CORE_ADDR addr;
518 unsigned int insn, rn;
519 int framesize = 0;
520 int stacksize = 0;
521 int register_offsets[CSKY_NUM_GREGS_SAVED_GREGS];
522 int insn_len;
523 /* For adjusting fp. */
524 int is_fp_saved = 0;
525 int adjust_fp = 0;
526
527 /* REGISTER_OFFSETS will contain offsets from the top of the frame
528 (NOT the frame pointer) for the various saved registers, or -1
529 if the register is not saved. */
530 for (rn = 0; rn < CSKY_NUM_GREGS_SAVED_GREGS; rn++)
531 register_offsets[rn] = -1;
532
533 /* Analyze the prologue. Things we determine from analyzing the
534 prologue include the size of the frame and which registers are
535 saved (and where). */
536 if (csky_debug)
537 {
538 fprintf_unfiltered (gdb_stdlog,
539 "csky: Scanning prologue: start_pc = 0x%x,"
540 "limit_pc = 0x%x\n", (unsigned int) start_pc,
541 (unsigned int) limit_pc);
542 }
543
544 /* Default to 16 bit instruction. */
545 insn_len = 2;
546 stacksize = 0;
547 for (addr = start_pc; addr < limit_pc; addr += insn_len)
548 {
549 /* Get next insn. */
550 insn_len = csky_get_insn (gdbarch, addr, &insn);
551
552 /* Check if 32 bit. */
553 if (insn_len == 4)
554 {
555 /* subi32 sp,sp oimm12. */
556 if (CSKY_32_IS_SUBI0 (insn))
557 {
558 /* Got oimm12. */
559 int offset = CSKY_32_SUBI_IMM (insn);
560 if (csky_debug)
561 {
562 fprintf_unfiltered (gdb_stdlog,
563 "csky: got subi sp,%d; continuing\n",
564 offset);
565 }
566 stacksize += offset;
567 continue;
568 }
569 /* stm32 ry-rz,(sp). */
570 else if (CSKY_32_IS_STMx0 (insn))
571 {
572 /* Spill register(s). */
573 int start_register;
574 int reg_count;
575 int offset;
576
577 /* BIG WARNING! The CKCore ABI does not restrict functions
578 to taking only one stack allocation. Therefore, when
579 we save a register, we record the offset of where it was
580 saved relative to the current stacksize. This will
581 then give an offset from the SP upon entry to our
582 function. Remember, stacksize is NOT constant until
583 we're done scanning the prologue. */
584 start_register = CSKY_32_STM_VAL_REGNUM (insn);
585 reg_count = CSKY_32_STM_SIZE (insn);
586 if (csky_debug)
587 {
588 fprintf_unfiltered (gdb_stdlog,
589 "csky: got stm r%d-r%d,(sp)\n",
590 start_register,
591 start_register + reg_count);
592 }
593
594 for (rn = start_register, offset = 0;
595 rn <= start_register + reg_count;
596 rn++, offset += 4)
597 {
598 register_offsets[rn] = stacksize - offset;
599 if (csky_debug)
600 {
601 fprintf_unfiltered (gdb_stdlog,
602 "csky: r%d saved at 0x%x"
603 " (offset %d)\n",
604 rn, register_offsets[rn],
605 offset);
606 }
607 }
608 if (csky_debug)
609 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
610 continue;
611 }
612 /* stw ry,(sp,disp). */
613 else if (CSKY_32_IS_STWx0 (insn))
614 {
615 /* Spill register: see note for IS_STM above. */
616 int disp;
617
618 rn = CSKY_32_ST_VAL_REGNUM (insn);
619 disp = CSKY_32_ST_OFFSET (insn);
620 register_offsets[rn] = stacksize - disp;
621 if (csky_debug)
622 print_savedreg_msg (rn, register_offsets, true);
623 continue;
624 }
625 else if (CSKY_32_IS_MOV_FP_SP (insn))
626 {
627 /* SP is saved to FP reg, means code afer prologue may
628 modify SP. */
629 is_fp_saved = 1;
630 adjust_fp = stacksize;
631 continue;
632 }
633 else if (CSKY_32_IS_MFCR_EPSR (insn))
634 {
635 unsigned int insn2;
636 addr += 4;
637 int mfcr_regnum = insn & 0x1f;
638 insn_len = csky_get_insn (gdbarch, addr, &insn2);
639 if (insn_len == 2)
640 {
641 int stw_regnum = (insn2 >> 5) & 0x7;
642 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
643 {
644 int offset;
645
646 /* CSKY_EPSR_REGNUM. */
647 rn = CSKY_NUM_GREGS;
648 offset = CSKY_16_STWx0_OFFSET (insn2);
649 register_offsets[rn] = stacksize - offset;
650 if (csky_debug)
651 print_savedreg_msg (rn, register_offsets, true);
652 continue;
653 }
654 break;
655 }
656 else
657 {
658 /* INSN_LEN == 4. */
659 int stw_regnum = (insn2 >> 21) & 0x1f;
660 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
661 {
662 int offset;
663
664 /* CSKY_EPSR_REGNUM. */
665 rn = CSKY_NUM_GREGS;
666 offset = CSKY_32_ST_OFFSET (insn2);
667 register_offsets[rn] = framesize - offset;
668 if (csky_debug)
669 print_savedreg_msg (rn, register_offsets, true);
670 continue;
671 }
672 break;
673 }
674 }
675 else if (CSKY_32_IS_MFCR_FPSR (insn))
676 {
677 unsigned int insn2;
678 addr += 4;
679 int mfcr_regnum = insn & 0x1f;
680 insn_len = csky_get_insn (gdbarch, addr, &insn2);
681 if (insn_len == 2)
682 {
683 int stw_regnum = (insn2 >> 5) & 0x7;
684 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum
685 == stw_regnum))
686 {
687 int offset;
688
689 /* CSKY_FPSR_REGNUM. */
690 rn = CSKY_NUM_GREGS + 1;
691 offset = CSKY_16_STWx0_OFFSET (insn2);
692 register_offsets[rn] = stacksize - offset;
693 if (csky_debug)
694 print_savedreg_msg (rn, register_offsets, true);
695 continue;
696 }
697 break;
698 }
699 else
700 {
701 /* INSN_LEN == 4. */
702 int stw_regnum = (insn2 >> 21) & 0x1f;
703 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
704 {
705 int offset;
706
707 /* CSKY_FPSR_REGNUM. */
708 rn = CSKY_NUM_GREGS + 1;
709 offset = CSKY_32_ST_OFFSET (insn2);
710 register_offsets[rn] = framesize - offset;
711 if (csky_debug)
712 print_savedreg_msg (rn, register_offsets, true);
713 continue;
714 }
715 break;
716 }
717 }
718 else if (CSKY_32_IS_MFCR_EPC (insn))
719 {
720 unsigned int insn2;
721 addr += 4;
722 int mfcr_regnum = insn & 0x1f;
723 insn_len = csky_get_insn (gdbarch, addr, &insn2);
724 if (insn_len == 2)
725 {
726 int stw_regnum = (insn2 >> 5) & 0x7;
727 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
728 {
729 int offset;
730
731 /* CSKY_EPC_REGNUM. */
732 rn = CSKY_NUM_GREGS + 2;
733 offset = CSKY_16_STWx0_OFFSET (insn2);
734 register_offsets[rn] = stacksize - offset;
735 if (csky_debug)
736 print_savedreg_msg (rn, register_offsets, true);
737 continue;
738 }
739 break;
740 }
741 else
742 {
743 /* INSN_LEN == 4. */
744 int stw_regnum = (insn2 >> 21) & 0x1f;
745 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
746 {
747 int offset;
748
749 /* CSKY_EPC_REGNUM. */
750 rn = CSKY_NUM_GREGS + 2;
751 offset = CSKY_32_ST_OFFSET (insn2);
752 register_offsets[rn] = framesize - offset;
753 if (csky_debug)
754 print_savedreg_msg (rn, register_offsets, true);
755 continue;
756 }
757 break;
758 }
759 }
760 else if (CSKY_32_IS_MFCR_FPC (insn))
761 {
762 unsigned int insn2;
763 addr += 4;
764 int mfcr_regnum = insn & 0x1f;
765 insn_len = csky_get_insn (gdbarch, addr, &insn2);
766 if (insn_len == 2)
767 {
768 int stw_regnum = (insn2 >> 5) & 0x7;
769 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
770 {
771 int offset;
772
773 /* CSKY_FPC_REGNUM. */
774 rn = CSKY_NUM_GREGS + 3;
775 offset = CSKY_16_STWx0_OFFSET (insn2);
776 register_offsets[rn] = stacksize - offset;
777 if (csky_debug)
778 print_savedreg_msg (rn, register_offsets, true);
779 continue;
780 }
781 break;
782 }
783 else
784 {
785 /* INSN_LEN == 4. */
786 int stw_regnum = (insn2 >> 21) & 0x1f;
787 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
788 {
789 int offset;
790
791 /* CSKY_FPC_REGNUM. */
792 rn = CSKY_NUM_GREGS + 3;
793 offset = CSKY_32_ST_OFFSET (insn2);
794 register_offsets[rn] = framesize - offset;
795 if (csky_debug)
796 print_savedreg_msg (rn, register_offsets, true);
797 continue;
798 }
799 break;
800 }
801 }
802 else if (CSKY_32_IS_PUSH (insn))
803 {
804 /* Push for 32_bit. */
805 int offset = 0;
806 if (CSKY_32_IS_PUSH_R29 (insn))
807 {
808 stacksize += 4;
809 register_offsets[29] = stacksize;
810 if (csky_debug)
811 print_savedreg_msg (29, register_offsets, false);
812 offset += 4;
813 }
814 if (CSKY_32_PUSH_LIST2 (insn))
815 {
816 int num = CSKY_32_PUSH_LIST2 (insn);
817 int tmp = 0;
818 stacksize += num * 4;
819 offset += num * 4;
820 if (csky_debug)
821 {
822 fprintf_unfiltered (gdb_stdlog,
823 "csky: push regs_array: r16-r%d\n",
824 16 + num - 1);
825 }
826 for (rn = 16; rn <= 16 + num - 1; rn++)
827 {
828 register_offsets[rn] = stacksize - tmp;
829 if (csky_debug)
830 {
831 fprintf_unfiltered (gdb_stdlog,
832 "csky: r%d saved at 0x%x"
833 " (offset %d)\n", rn,
834 register_offsets[rn], tmp);
835 }
836 tmp += 4;
837 }
838 }
839 if (CSKY_32_IS_PUSH_R15 (insn))
840 {
841 stacksize += 4;
842 register_offsets[15] = stacksize;
843 if (csky_debug)
844 print_savedreg_msg (15, register_offsets, false);
845 offset += 4;
846 }
847 if (CSKY_32_PUSH_LIST1 (insn))
848 {
849 int num = CSKY_32_PUSH_LIST1 (insn);
850 int tmp = 0;
851 stacksize += num * 4;
852 offset += num * 4;
853 if (csky_debug)
854 {
855 fprintf_unfiltered (gdb_stdlog,
856 "csky: push regs_array: r4-r%d\n",
857 4 + num - 1);
858 }
859 for (rn = 4; rn <= 4 + num - 1; rn++)
860 {
861 register_offsets[rn] = stacksize - tmp;
862 if (csky_debug)
863 {
864 fprintf_unfiltered (gdb_stdlog,
865 "csky: r%d saved at 0x%x"
866 " (offset %d)\n", rn,
867 register_offsets[rn], tmp);
868 }
869 tmp += 4;
870 }
871 }
872
873 framesize = stacksize;
874 if (csky_debug)
875 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
876 continue;
877 }
878 else if (CSKY_32_IS_LRW4 (insn) || CSKY_32_IS_MOVI4 (insn)
879 || CSKY_32_IS_MOVIH4 (insn) || CSKY_32_IS_BMASKI4 (insn))
880 {
881 int adjust = 0;
882 int offset = 0;
883 unsigned int insn2;
884
885 if (csky_debug)
886 {
887 fprintf_unfiltered (gdb_stdlog,
888 "csky: looking at large frame\n");
889 }
890 if (CSKY_32_IS_LRW4 (insn))
891 {
892 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
893 int literal_addr = (addr + ((insn & 0xffff) << 2))
894 & 0xfffffffc;
895 adjust = read_memory_unsigned_integer (literal_addr, 4,
896 byte_order);
897 }
898 else if (CSKY_32_IS_MOVI4 (insn))
899 adjust = (insn & 0xffff);
900 else if (CSKY_32_IS_MOVIH4 (insn))
901 adjust = (insn & 0xffff) << 16;
902 else
903 {
904 /* CSKY_32_IS_BMASKI4 (insn). */
905 adjust = (1 << (((insn & 0x3e00000) >> 21) + 1)) - 1;
906 }
907
908 if (csky_debug)
909 {
910 fprintf_unfiltered (gdb_stdlog,
911 "csky: base stacksize=0x%x\n", adjust);
912
913 /* May have zero or more insns which modify r4. */
914 fprintf_unfiltered (gdb_stdlog,
915 "csky: looking for r4 adjusters...\n");
916 }
917
918 offset = 4;
919 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
920 while (CSKY_IS_R4_ADJUSTER (insn2))
921 {
922 if (CSKY_32_IS_ADDI4 (insn2))
923 {
924 int imm = (insn2 & 0xfff) + 1;
925 adjust += imm;
926 if (csky_debug)
927 {
928 fprintf_unfiltered (gdb_stdlog,
929 "csky: addi r4,%d\n", imm);
930 }
931 }
932 else if (CSKY_32_IS_SUBI4 (insn2))
933 {
934 int imm = (insn2 & 0xfff) + 1;
935 adjust -= imm;
936 if (csky_debug)
937 {
938 fprintf_unfiltered (gdb_stdlog,
939 "csky: subi r4,%d\n", imm);
940 }
941 }
942 else if (CSKY_32_IS_NOR4 (insn2))
943 {
944 adjust = ~adjust;
945 if (csky_debug)
946 {
947 fprintf_unfiltered (gdb_stdlog,
948 "csky: nor r4,r4,r4\n");
949 }
950 }
951 else if (CSKY_32_IS_ROTLI4 (insn2))
952 {
953 int imm = ((insn2 >> 21) & 0x1f);
954 int temp = adjust >> (32 - imm);
955 adjust <<= imm;
956 adjust |= temp;
957 if (csky_debug)
958 {
959 fprintf_unfiltered (gdb_stdlog,
960 "csky: rotli r4,r4,%d\n", imm);
961 }
962 }
963 else if (CSKY_32_IS_LISI4 (insn2))
964 {
965 int imm = ((insn2 >> 21) & 0x1f);
966 adjust <<= imm;
967 if (csky_debug)
968 {
969 fprintf_unfiltered (gdb_stdlog,
970 "csky: lsli r4,r4,%d\n", imm);
971 }
972 }
973 else if (CSKY_32_IS_BSETI4 (insn2))
974 {
975 int imm = ((insn2 >> 21) & 0x1f);
976 adjust |= (1 << imm);
977 if (csky_debug)
978 {
979 fprintf_unfiltered (gdb_stdlog,
980 "csky: bseti r4,r4 %d\n", imm);
981 }
982 }
983 else if (CSKY_32_IS_BCLRI4 (insn2))
984 {
985 int imm = ((insn2 >> 21) & 0x1f);
986 adjust &= ~(1 << imm);
987 if (csky_debug)
988 {
989 fprintf_unfiltered (gdb_stdlog,
990 "csky: bclri r4,r4 %d\n", imm);
991 }
992 }
993 else if (CSKY_32_IS_IXH4 (insn2))
994 {
995 adjust *= 3;
996 if (csky_debug)
997 {
998 fprintf_unfiltered (gdb_stdlog,
999 "csky: ixh r4,r4,r4\n");
1000 }
1001 }
1002 else if (CSKY_32_IS_IXW4 (insn2))
1003 {
1004 adjust *= 5;
1005 if (csky_debug)
1006 {
1007 fprintf_unfiltered (gdb_stdlog,
1008 "csky: ixw r4,r4,r4\n");
1009 }
1010 }
1011 else if (CSKY_16_IS_ADDI4 (insn2))
1012 {
1013 int imm = (insn2 & 0xff) + 1;
1014 adjust += imm;
1015 if (csky_debug)
1016 {
1017 fprintf_unfiltered (gdb_stdlog,
1018 "csky: addi r4,%d\n", imm);
1019 }
1020 }
1021 else if (CSKY_16_IS_SUBI4 (insn2))
1022 {
1023 int imm = (insn2 & 0xff) + 1;
1024 adjust -= imm;
1025 if (csky_debug)
1026 {
1027 fprintf_unfiltered (gdb_stdlog,
1028 "csky: subi r4,%d\n", imm);
1029 }
1030 }
1031 else if (CSKY_16_IS_NOR4 (insn2))
1032 {
1033 adjust = ~adjust;
1034 if (csky_debug)
1035 {
1036 fprintf_unfiltered (gdb_stdlog,
1037 "csky: nor r4,r4\n");
1038 }
1039 }
1040 else if (CSKY_16_IS_BSETI4 (insn2))
1041 {
1042 int imm = (insn2 & 0x1f);
1043 adjust |= (1 << imm);
1044 if (csky_debug)
1045 {
1046 fprintf_unfiltered (gdb_stdlog,
1047 "csky: bseti r4, %d\n", imm);
1048 }
1049 }
1050 else if (CSKY_16_IS_BCLRI4 (insn2))
1051 {
1052 int imm = (insn2 & 0x1f);
1053 adjust &= ~(1 << imm);
1054 if (csky_debug)
1055 {
1056 fprintf_unfiltered (gdb_stdlog,
1057 "csky: bclri r4, %d\n", imm);
1058 }
1059 }
1060 else if (CSKY_16_IS_LSLI4 (insn2))
1061 {
1062 int imm = (insn2 & 0x1f);
1063 adjust <<= imm;
1064 if (csky_debug)
1065 {
1066 fprintf_unfiltered (gdb_stdlog,
1067 "csky: lsli r4,r4, %d\n", imm);
1068 }
1069 }
1070
1071 offset += insn_len;
1072 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1073 };
1074
1075 if (csky_debug)
1076 {
1077 fprintf_unfiltered (gdb_stdlog, "csky: done looking for"
1078 " r4 adjusters\n");
1079 }
1080
1081 /* If the next insn adjusts the stack pointer, we keep
1082 everything; if not, we scrap it and we've found the
1083 end of the prologue. */
1084 if (CSKY_IS_SUBU4 (insn2))
1085 {
1086 addr += offset;
1087 stacksize += adjust;
1088 if (csky_debug)
1089 {
1090 fprintf_unfiltered (gdb_stdlog,
1091 "csky: found stack adjustment of"
1092 " 0x%x bytes.\n", adjust);
1093 fprintf_unfiltered (gdb_stdlog,
1094 "csky: skipping to new address %s\n",
1095 core_addr_to_string_nz (addr));
1096 fprintf_unfiltered (gdb_stdlog,
1097 "csky: continuing\n");
1098 }
1099 continue;
1100 }
1101
1102 /* None of these instructions are prologue, so don't touch
1103 anything. */
1104 if (csky_debug)
1105 {
1106 fprintf_unfiltered (gdb_stdlog,
1107 "csky: no subu sp,sp,r4; NOT altering"
1108 " stacksize.\n");
1109 }
1110 break;
1111 }
1112 }
1113 else
1114 {
1115 /* insn_len != 4. */
1116
1117 /* subi.sp sp,disp. */
1118 if (CSKY_16_IS_SUBI0 (insn))
1119 {
1120 int offset = CSKY_16_SUBI_IMM (insn);
1121 if (csky_debug)
1122 {
1123 fprintf_unfiltered (gdb_stdlog,
1124 "csky: got subi r0,%d; continuing\n",
1125 offset);
1126 }
1127 stacksize += offset;
1128 continue;
1129 }
1130 /* stw.16 rz,(sp,disp). */
1131 else if (CSKY_16_IS_STWx0 (insn))
1132 {
1133 /* Spill register: see note for IS_STM above. */
1134 int disp;
1135
1136 rn = CSKY_16_ST_VAL_REGNUM (insn);
1137 disp = CSKY_16_ST_OFFSET (insn);
1138 register_offsets[rn] = stacksize - disp;
1139 if (csky_debug)
1140 print_savedreg_msg (rn, register_offsets, true);
1141 continue;
1142 }
1143 else if (CSKY_16_IS_MOV_FP_SP (insn))
1144 {
1145 /* SP is saved to FP reg, means prologue may modify SP. */
1146 is_fp_saved = 1;
1147 adjust_fp = stacksize;
1148 continue;
1149 }
1150 else if (CSKY_16_IS_PUSH (insn))
1151 {
1152 /* Push for 16_bit. */
1153 int offset = 0;
1154 if (CSKY_16_IS_PUSH_R15 (insn))
1155 {
1156 stacksize += 4;
1157 register_offsets[15] = stacksize;
1158 if (csky_debug)
1159 print_savedreg_msg (15, register_offsets, false);
1160 offset += 4;
1161 }
1162 if (CSKY_16_PUSH_LIST1 (insn))
1163 {
1164 int num = CSKY_16_PUSH_LIST1 (insn);
1165 int tmp = 0;
1166 stacksize += num * 4;
1167 offset += num * 4;
1168 if (csky_debug)
1169 {
1170 fprintf_unfiltered (gdb_stdlog,
1171 "csky: push regs_array: r4-r%d\n",
1172 4 + num - 1);
1173 }
1174 for (rn = 4; rn <= 4 + num - 1; rn++)
1175 {
1176 register_offsets[rn] = stacksize - tmp;
1177 if (csky_debug)
1178 {
1179 fprintf_unfiltered (gdb_stdlog,
1180 "csky: r%d saved at 0x%x"
1181 " (offset %d)\n", rn,
1182 register_offsets[rn], offset);
1183 }
1184 tmp += 4;
1185 }
1186 }
1187
1188 framesize = stacksize;
1189 if (csky_debug)
1190 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
1191 continue;
1192 }
1193 else if (CSKY_16_IS_LRW4 (insn) || CSKY_16_IS_MOVI4 (insn))
1194 {
1195 int adjust = 0;
1196 unsigned int insn2;
1197
1198 if (csky_debug)
1199 {
1200 fprintf_unfiltered (gdb_stdlog,
1201 "csky: looking at large frame\n");
1202 }
1203 if (CSKY_16_IS_LRW4 (insn))
1204 {
1205 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1206 int offset = ((insn & 0x300) >> 3) | (insn & 0x1f);
1207 int literal_addr = (addr + ( offset << 2)) & 0xfffffffc;
1208 adjust = read_memory_unsigned_integer (literal_addr, 4,
1209 byte_order);
1210 }
1211 else
1212 {
1213 /* CSKY_16_IS_MOVI4 (insn). */
1214 adjust = (insn & 0xff);
1215 }
1216
1217 if (csky_debug)
1218 {
1219 fprintf_unfiltered (gdb_stdlog,
1220 "csky: base stacksize=0x%x\n", adjust);
1221 }
1222
1223 /* May have zero or more instructions which modify r4. */
1224 if (csky_debug)
1225 {
1226 fprintf_unfiltered (gdb_stdlog,
1227 "csky: looking for r4 adjusters...\n");
1228 }
1229 int offset = 2;
1230 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1231 while (CSKY_IS_R4_ADJUSTER (insn2))
1232 {
1233 if (CSKY_32_IS_ADDI4 (insn2))
1234 {
1235 int imm = (insn2 & 0xfff) + 1;
1236 adjust += imm;
1237 if (csky_debug)
1238 {
1239 fprintf_unfiltered (gdb_stdlog,
1240 "csky: addi r4,%d\n", imm);
1241 }
1242 }
1243 else if (CSKY_32_IS_SUBI4 (insn2))
1244 {
1245 int imm = (insn2 & 0xfff) + 1;
1246 adjust -= imm;
1247 if (csky_debug)
1248 {
1249 fprintf_unfiltered (gdb_stdlog,
1250 "csky: subi r4,%d\n", imm);
1251 }
1252 }
1253 else if (CSKY_32_IS_NOR4 (insn2))
1254 {
1255 adjust = ~adjust;
1256 if (csky_debug)
1257 {
1258 fprintf_unfiltered (gdb_stdlog,
1259 "csky: nor r4,r4,r4\n");
1260 }
1261 }
1262 else if (CSKY_32_IS_ROTLI4 (insn2))
1263 {
1264 int imm = ((insn2 >> 21) & 0x1f);
1265 int temp = adjust >> (32 - imm);
1266 adjust <<= imm;
1267 adjust |= temp;
1268 if (csky_debug)
1269 {
1270 fprintf_unfiltered (gdb_stdlog,
1271 "csky: rotli r4,r4,%d\n", imm);
1272 }
1273 }
1274 else if (CSKY_32_IS_LISI4 (insn2))
1275 {
1276 int imm = ((insn2 >> 21) & 0x1f);
1277 adjust <<= imm;
1278 if (csky_debug)
1279 {
1280 fprintf_unfiltered (gdb_stdlog,
1281 "csky: lsli r4,r4,%d\n", imm);
1282 }
1283 }
1284 else if (CSKY_32_IS_BSETI4 (insn2))
1285 {
1286 int imm = ((insn2 >> 21) & 0x1f);
1287 adjust |= (1 << imm);
1288 if (csky_debug)
1289 {
1290 fprintf_unfiltered (gdb_stdlog,
1291 "csky: bseti r4,r4 %d\n", imm);
1292 }
1293 }
1294 else if (CSKY_32_IS_BCLRI4 (insn2))
1295 {
1296 int imm = ((insn2 >> 21) & 0x1f);
1297 adjust &= ~(1 << imm);
1298 if (csky_debug)
1299 {
1300 fprintf_unfiltered (gdb_stdlog,
1301 "csky: bclri r4,r4 %d\n", imm);
1302 }
1303 }
1304 else if (CSKY_32_IS_IXH4 (insn2))
1305 {
1306 adjust *= 3;
1307 if (csky_debug)
1308 {
1309 fprintf_unfiltered (gdb_stdlog,
1310 "csky: ixh r4,r4,r4\n");
1311 }
1312 }
1313 else if (CSKY_32_IS_IXW4 (insn2))
1314 {
1315 adjust *= 5;
1316 if (csky_debug)
1317 {
1318 fprintf_unfiltered (gdb_stdlog,
1319 "csky: ixw r4,r4,r4\n");
1320 }
1321 }
1322 else if (CSKY_16_IS_ADDI4 (insn2))
1323 {
1324 int imm = (insn2 & 0xff) + 1;
1325 adjust += imm;
1326 if (csky_debug)
1327 {
1328 fprintf_unfiltered (gdb_stdlog,
1329 "csky: addi r4,%d\n", imm);
1330 }
1331 }
1332 else if (CSKY_16_IS_SUBI4 (insn2))
1333 {
1334 int imm = (insn2 & 0xff) + 1;
1335 adjust -= imm;
1336 if (csky_debug)
1337 {
1338 fprintf_unfiltered (gdb_stdlog,
1339 "csky: subi r4,%d\n", imm);
1340 }
1341 }
1342 else if (CSKY_16_IS_NOR4 (insn2))
1343 {
1344 adjust = ~adjust;
1345 if (csky_debug)
1346 {
1347 fprintf_unfiltered (gdb_stdlog,
1348 "csky: nor r4,r4\n");
1349 }
1350 }
1351 else if (CSKY_16_IS_BSETI4 (insn2))
1352 {
1353 int imm = (insn2 & 0x1f);
1354 adjust |= (1 << imm);
1355 if (csky_debug)
1356 {
1357 fprintf_unfiltered (gdb_stdlog,
1358 "csky: bseti r4, %d\n", imm);
1359 }
1360 }
1361 else if (CSKY_16_IS_BCLRI4 (insn2))
1362 {
1363 int imm = (insn2 & 0x1f);
1364 adjust &= ~(1 << imm);
1365 if (csky_debug)
1366 {
1367 fprintf_unfiltered (gdb_stdlog,
1368 "csky: bclri r4, %d\n", imm);
1369 }
1370 }
1371 else if (CSKY_16_IS_LSLI4 (insn2))
1372 {
1373 int imm = (insn2 & 0x1f);
1374 adjust <<= imm;
1375 if (csky_debug)
1376 {
1377 fprintf_unfiltered (gdb_stdlog,
1378 "csky: lsli r4,r4, %d\n", imm);
1379 }
1380 }
1381
1382 offset += insn_len;
1383 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1384 };
1385
1386 if (csky_debug)
1387 {
1388 fprintf_unfiltered (gdb_stdlog, "csky: "
1389 "done looking for r4 adjusters\n");
1390 }
1391
1392 /* If the next instruction adjusts the stack pointer, we keep
1393 everything; if not, we scrap it and we've found the end
1394 of the prologue. */
1395 if (CSKY_IS_SUBU4 (insn2))
1396 {
1397 addr += offset;
1398 stacksize += adjust;
1399 if (csky_debug)
1400 {
1401 fprintf_unfiltered (gdb_stdlog, "csky: "
1402 "found stack adjustment of 0x%x"
1403 " bytes.\n", adjust);
1404 fprintf_unfiltered (gdb_stdlog, "csky: "
1405 "skipping to new address %s\n",
1406 core_addr_to_string_nz (addr));
1407 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
1408 }
1409 continue;
1410 }
1411
1412 /* None of these instructions are prologue, so don't touch
1413 anything. */
1414 if (csky_debug)
1415 {
1416 fprintf_unfiltered (gdb_stdlog, "csky: no subu sp,r4; "
1417 "NOT altering stacksize.\n");
1418 }
1419 break;
1420 }
1421 }
1422
1423 /* This is not a prologue instruction, so stop here. */
1424 if (csky_debug)
1425 {
1426 fprintf_unfiltered (gdb_stdlog, "csky: insn is not a prologue"
1427 " insn -- ending scan\n");
1428 }
1429 break;
1430 }
1431
1432 if (this_cache)
1433 {
1434 CORE_ADDR unwound_fp;
1435 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1436 this_cache->framesize = framesize;
1437
1438 if (is_fp_saved)
1439 {
1440 this_cache->framereg = CSKY_FP_REGNUM;
1441 unwound_fp = get_frame_register_unsigned (this_frame,
1442 this_cache->framereg);
1443 this_cache->prev_sp = unwound_fp + adjust_fp;
1444 }
1445 else
1446 {
1447 this_cache->framereg = CSKY_SP_REGNUM;
1448 unwound_fp = get_frame_register_unsigned (this_frame,
1449 this_cache->framereg);
1450 this_cache->prev_sp = unwound_fp + stacksize;
1451 }
1452
1453 /* Note where saved registers are stored. The offsets in
1454 REGISTER_OFFSETS are computed relative to the top of the frame. */
1455 for (rn = 0; rn < CSKY_NUM_GREGS; rn++)
1456 {
1457 if (register_offsets[rn] >= 0)
1458 {
1459 this_cache->saved_regs[rn].set_addr (this_cache->prev_sp
1460 - register_offsets[rn]);
1461 if (csky_debug)
1462 {
1463 CORE_ADDR rn_value = read_memory_unsigned_integer (
1464 this_cache->saved_regs[rn].addr (), 4, byte_order);
1465 fprintf_unfiltered (gdb_stdlog, "Saved register %s "
1466 "stored at 0x%08lx, value=0x%08lx\n",
1467 csky_register_names[rn],
1468 (unsigned long)
1469 this_cache->saved_regs[rn].addr (),
1470 (unsigned long) rn_value);
1471 }
1472 }
1473 }
1474 if (lr_type == LR_TYPE_EPC)
1475 {
1476 /* rte || epc . */
1477 this_cache->saved_regs[CSKY_PC_REGNUM]
1478 = this_cache->saved_regs[CSKY_EPC_REGNUM];
1479 }
1480 else if (lr_type == LR_TYPE_FPC)
1481 {
1482 /* rfi || fpc . */
1483 this_cache->saved_regs[CSKY_PC_REGNUM]
1484 = this_cache->saved_regs[CSKY_FPC_REGNUM];
1485 }
1486 else
1487 {
1488 this_cache->saved_regs[CSKY_PC_REGNUM]
1489 = this_cache->saved_regs[CSKY_LR_REGNUM];
1490 }
1491 }
1492
1493 return addr;
1494 }
1495
1496 /* Detect whether PC is at a point where the stack frame has been
1497 destroyed. */
1498
1499 static int
1500 csky_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1501 {
1502 unsigned int insn;
1503 CORE_ADDR addr;
1504 CORE_ADDR func_start, func_end;
1505
1506 if (!find_pc_partial_function (pc, NULL, &func_start, &func_end))
1507 return 0;
1508
1509 bool fp_saved = false;
1510 int insn_len;
1511 for (addr = func_start; addr < func_end; addr += insn_len)
1512 {
1513 /* Get next insn. */
1514 insn_len = csky_get_insn (gdbarch, addr, &insn);
1515
1516 if (insn_len == 2)
1517 {
1518 /* Is sp is saved to fp. */
1519 if (CSKY_16_IS_MOV_FP_SP (insn))
1520 fp_saved = true;
1521 /* If sp was saved to fp and now being restored from
1522 fp then it indicates the start of epilog. */
1523 else if (fp_saved && CSKY_16_IS_MOV_SP_FP (insn))
1524 return pc >= addr;
1525 }
1526 }
1527 return 0;
1528 }
1529
1530 /* Implement the skip_prologue gdbarch hook. */
1531
1532 static CORE_ADDR
1533 csky_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1534 {
1535 CORE_ADDR func_addr, func_end;
1536 struct symtab_and_line sal;
1537 const int default_search_limit = 128;
1538
1539 /* See if we can find the end of the prologue using the symbol table. */
1540 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
1541 {
1542 CORE_ADDR post_prologue_pc
1543 = skip_prologue_using_sal (gdbarch, func_addr);
1544
1545 if (post_prologue_pc != 0)
1546 return std::max (pc, post_prologue_pc);
1547 }
1548 else
1549 func_end = pc + default_search_limit;
1550
1551 /* Find the end of prologue. Default lr_type. */
1552 return csky_analyze_prologue (gdbarch, pc, func_end, func_end,
1553 NULL, NULL, LR_TYPE_R15);
1554 }
1555
1556 /* Implement the breakpoint_kind_from_pc gdbarch method. */
1557
1558 static int
1559 csky_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
1560 {
1561 if (csky_pc_is_csky16 (gdbarch, *pcptr))
1562 return CSKY_INSN_SIZE16;
1563 else
1564 return CSKY_INSN_SIZE32;
1565 }
1566
1567 /* Implement the sw_breakpoint_from_kind gdbarch method. */
1568
1569 static const gdb_byte *
1570 csky_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
1571 {
1572 *size = kind;
1573 if (kind == CSKY_INSN_SIZE16)
1574 {
1575 static gdb_byte csky_16_breakpoint[] = { 0, 0 };
1576 return csky_16_breakpoint;
1577 }
1578 else
1579 {
1580 static gdb_byte csky_32_breakpoint[] = { 0, 0, 0, 0 };
1581 return csky_32_breakpoint;
1582 }
1583 }
1584
1585 /* Implement the memory_insert_breakpoint gdbarch method. */
1586
1587 static int
1588 csky_memory_insert_breakpoint (struct gdbarch *gdbarch,
1589 struct bp_target_info *bp_tgt)
1590 {
1591 int val;
1592 const unsigned char *bp;
1593 gdb_byte bp_write_record1[] = { 0, 0, 0, 0 };
1594 gdb_byte bp_write_record2[] = { 0, 0, 0, 0 };
1595 gdb_byte bp_record[] = { 0, 0, 0, 0 };
1596
1597 /* Sanity-check bp_address. */
1598 if (bp_tgt->reqstd_address % 2)
1599 warning (_("Invalid breakpoint address 0x%x is an odd number."),
1600 (unsigned int) bp_tgt->reqstd_address);
1601 scoped_restore restore_memory
1602 = make_scoped_restore_show_memory_breakpoints (1);
1603
1604 /* Determine appropriate breakpoint_kind for this address. */
1605 bp_tgt->kind = csky_breakpoint_kind_from_pc (gdbarch,
1606 &bp_tgt->reqstd_address);
1607
1608 /* Save the memory contents. */
1609 bp_tgt->shadow_len = bp_tgt->kind;
1610
1611 /* Fill bp_tgt->placed_address. */
1612 bp_tgt->placed_address = bp_tgt->reqstd_address;
1613
1614 if (bp_tgt->kind == CSKY_INSN_SIZE16)
1615 {
1616 if ((bp_tgt->reqstd_address % 4) == 0)
1617 {
1618 /* Read two bytes. */
1619 val = target_read_memory (bp_tgt->reqstd_address,
1620 bp_tgt->shadow_contents, 2);
1621 if (val)
1622 return val;
1623
1624 /* Read two bytes. */
1625 val = target_read_memory (bp_tgt->reqstd_address + 2,
1626 bp_record, 2);
1627 if (val)
1628 return val;
1629
1630 /* Write the breakpoint. */
1631 bp_write_record1[2] = bp_record[0];
1632 bp_write_record1[3] = bp_record[1];
1633 bp = bp_write_record1;
1634 val = target_write_raw_memory (bp_tgt->reqstd_address, bp,
1635 CSKY_WR_BKPT_MODE);
1636 }
1637 else
1638 {
1639 val = target_read_memory (bp_tgt->reqstd_address,
1640 bp_tgt->shadow_contents, 2);
1641 if (val)
1642 return val;
1643
1644 val = target_read_memory (bp_tgt->reqstd_address - 2,
1645 bp_record, 2);
1646 if (val)
1647 return val;
1648
1649 /* Write the breakpoint. */
1650 bp_write_record1[0] = bp_record[0];
1651 bp_write_record1[1] = bp_record[1];
1652 bp = bp_write_record1;
1653 val = target_write_raw_memory (bp_tgt->reqstd_address - 2,
1654 bp, CSKY_WR_BKPT_MODE);
1655 }
1656 }
1657 else
1658 {
1659 if (bp_tgt->placed_address % 4 == 0)
1660 {
1661 val = target_read_memory (bp_tgt->reqstd_address,
1662 bp_tgt->shadow_contents,
1663 CSKY_WR_BKPT_MODE);
1664 if (val)
1665 return val;
1666
1667 /* Write the breakpoint. */
1668 bp = bp_write_record1;
1669 val = target_write_raw_memory (bp_tgt->reqstd_address,
1670 bp, CSKY_WR_BKPT_MODE);
1671 }
1672 else
1673 {
1674 val = target_read_memory (bp_tgt->reqstd_address,
1675 bp_tgt->shadow_contents,
1676 CSKY_WR_BKPT_MODE);
1677 if (val)
1678 return val;
1679
1680 val = target_read_memory (bp_tgt->reqstd_address - 2,
1681 bp_record, 2);
1682 if (val)
1683 return val;
1684
1685 val = target_read_memory (bp_tgt->reqstd_address + 4,
1686 bp_record + 2, 2);
1687 if (val)
1688 return val;
1689
1690 bp_write_record1[0] = bp_record[0];
1691 bp_write_record1[1] = bp_record[1];
1692 bp_write_record2[2] = bp_record[2];
1693 bp_write_record2[3] = bp_record[3];
1694
1695 /* Write the breakpoint. */
1696 bp = bp_write_record1;
1697 val = target_write_raw_memory (bp_tgt->reqstd_address - 2, bp,
1698 CSKY_WR_BKPT_MODE);
1699 if (val)
1700 return val;
1701
1702 /* Write the breakpoint. */
1703 bp = bp_write_record2;
1704 val = target_write_raw_memory (bp_tgt->reqstd_address + 2, bp,
1705 CSKY_WR_BKPT_MODE);
1706 }
1707 }
1708 return val;
1709 }
1710
1711 /* Restore the breakpoint shadow_contents to the target. */
1712
1713 static int
1714 csky_memory_remove_breakpoint (struct gdbarch *gdbarch,
1715 struct bp_target_info *bp_tgt)
1716 {
1717 int val;
1718 gdb_byte bp_record[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
1719 /* Different for shadow_len 2 or 4. */
1720 if (bp_tgt->shadow_len == 2)
1721 {
1722 /* Do word-sized writes on word-aligned boundaries and read
1723 padding bytes as necessary. */
1724 if (bp_tgt->reqstd_address % 4 == 0)
1725 {
1726 val = target_read_memory (bp_tgt->reqstd_address + 2,
1727 bp_record + 2, 2);
1728 if (val)
1729 return val;
1730 bp_record[0] = bp_tgt->shadow_contents[0];
1731 bp_record[1] = bp_tgt->shadow_contents[1];
1732 return target_write_raw_memory (bp_tgt->reqstd_address,
1733 bp_record, CSKY_WR_BKPT_MODE);
1734 }
1735 else
1736 {
1737 val = target_read_memory (bp_tgt->reqstd_address - 2,
1738 bp_record, 2);
1739 if (val)
1740 return val;
1741 bp_record[2] = bp_tgt->shadow_contents[0];
1742 bp_record[3] = bp_tgt->shadow_contents[1];
1743 return target_write_raw_memory (bp_tgt->reqstd_address - 2,
1744 bp_record, CSKY_WR_BKPT_MODE);
1745 }
1746 }
1747 else
1748 {
1749 /* Do word-sized writes on word-aligned boundaries and read
1750 padding bytes as necessary. */
1751 if (bp_tgt->placed_address % 4 == 0)
1752 {
1753 return target_write_raw_memory (bp_tgt->reqstd_address,
1754 bp_tgt->shadow_contents,
1755 CSKY_WR_BKPT_MODE);
1756 }
1757 else
1758 {
1759 val = target_read_memory (bp_tgt->reqstd_address - 2,
1760 bp_record, 2);
1761 if (val)
1762 return val;
1763 val = target_read_memory (bp_tgt->reqstd_address + 4,
1764 bp_record+6, 2);
1765 if (val)
1766 return val;
1767
1768 bp_record[2] = bp_tgt->shadow_contents[0];
1769 bp_record[3] = bp_tgt->shadow_contents[1];
1770 bp_record[4] = bp_tgt->shadow_contents[2];
1771 bp_record[5] = bp_tgt->shadow_contents[3];
1772
1773 return target_write_raw_memory (bp_tgt->reqstd_address - 2,
1774 bp_record,
1775 CSKY_WR_BKPT_MODE * 2);
1776 }
1777 }
1778 }
1779
1780 /* Determine link register type. */
1781
1782 static lr_type_t
1783 csky_analyze_lr_type (struct gdbarch *gdbarch,
1784 CORE_ADDR start_pc, CORE_ADDR end_pc)
1785 {
1786 CORE_ADDR addr;
1787 unsigned int insn, insn_len;
1788 insn_len = 2;
1789
1790 for (addr = start_pc; addr < end_pc; addr += insn_len)
1791 {
1792 insn_len = csky_get_insn (gdbarch, addr, &insn);
1793 if (insn_len == 4)
1794 {
1795 if (CSKY_32_IS_MFCR_EPSR (insn) || CSKY_32_IS_MFCR_EPC (insn)
1796 || CSKY_32_IS_RTE (insn))
1797 return LR_TYPE_EPC;
1798 }
1799 else if (CSKY_32_IS_MFCR_FPSR (insn) || CSKY_32_IS_MFCR_FPC (insn)
1800 || CSKY_32_IS_RFI (insn))
1801 return LR_TYPE_FPC;
1802 else if (CSKY_32_IS_JMP (insn) || CSKY_32_IS_BR (insn)
1803 || CSKY_32_IS_JMPIX (insn) || CSKY_32_IS_JMPI (insn))
1804 return LR_TYPE_R15;
1805 else
1806 {
1807 /* 16 bit instruction. */
1808 if (CSKY_16_IS_JMP (insn) || CSKY_16_IS_BR (insn)
1809 || CSKY_16_IS_JMPIX (insn))
1810 return LR_TYPE_R15;
1811 }
1812 }
1813 return LR_TYPE_R15;
1814 }
1815
1816 /* Heuristic unwinder. */
1817
1818 static struct csky_unwind_cache *
1819 csky_frame_unwind_cache (struct frame_info *this_frame)
1820 {
1821 CORE_ADDR prologue_start, prologue_end, func_end, prev_pc, block_addr;
1822 struct csky_unwind_cache *cache;
1823 const struct block *bl;
1824 unsigned long func_size = 0;
1825 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1826 unsigned int sp_regnum = CSKY_SP_REGNUM;
1827
1828 /* Default lr type is r15. */
1829 lr_type_t lr_type = LR_TYPE_R15;
1830
1831 cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
1832 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1833
1834 /* Assume there is no frame until proven otherwise. */
1835 cache->framereg = sp_regnum;
1836
1837 cache->framesize = 0;
1838
1839 prev_pc = get_frame_pc (this_frame);
1840 block_addr = get_frame_address_in_block (this_frame);
1841 if (find_pc_partial_function (block_addr, NULL, &prologue_start,
1842 &func_end) == 0)
1843 /* We couldn't find a function containing block_addr, so bail out
1844 and hope for the best. */
1845 return cache;
1846
1847 /* Get the (function) symbol matching prologue_start. */
1848 bl = block_for_pc (prologue_start);
1849 if (bl != NULL)
1850 func_size = bl->endaddr - bl->startaddr;
1851 else
1852 {
1853 struct bound_minimal_symbol msymbol
1854 = lookup_minimal_symbol_by_pc (prologue_start);
1855 if (msymbol.minsym != NULL)
1856 func_size = MSYMBOL_SIZE (msymbol.minsym);
1857 }
1858
1859 /* If FUNC_SIZE is 0 we may have a special-case use of lr
1860 e.g. exception or interrupt. */
1861 if (func_size == 0)
1862 lr_type = csky_analyze_lr_type (gdbarch, prologue_start, func_end);
1863
1864 prologue_end = std::min (func_end, prev_pc);
1865
1866 /* Analyze the function prologue. */
1867 csky_analyze_prologue (gdbarch, prologue_start, prologue_end,
1868 func_end, this_frame, cache, lr_type);
1869
1870 /* gdbarch_sp_regnum contains the value and not the address. */
1871 cache->saved_regs[sp_regnum].set_value (cache->prev_sp);
1872 return cache;
1873 }
1874
1875 /* Implement the this_id function for the normal unwinder. */
1876
1877 static void
1878 csky_frame_this_id (struct frame_info *this_frame,
1879 void **this_prologue_cache, struct frame_id *this_id)
1880 {
1881 struct csky_unwind_cache *cache;
1882 struct frame_id id;
1883
1884 if (*this_prologue_cache == NULL)
1885 *this_prologue_cache = csky_frame_unwind_cache (this_frame);
1886 cache = (struct csky_unwind_cache *) *this_prologue_cache;
1887
1888 /* This marks the outermost frame. */
1889 if (cache->prev_sp == 0)
1890 return;
1891
1892 id = frame_id_build (cache->prev_sp, get_frame_func (this_frame));
1893 *this_id = id;
1894 }
1895
1896 /* Implement the prev_register function for the normal unwinder. */
1897
1898 static struct value *
1899 csky_frame_prev_register (struct frame_info *this_frame,
1900 void **this_prologue_cache, int regnum)
1901 {
1902 struct csky_unwind_cache *cache;
1903
1904 if (*this_prologue_cache == NULL)
1905 *this_prologue_cache = csky_frame_unwind_cache (this_frame);
1906 cache = (struct csky_unwind_cache *) *this_prologue_cache;
1907
1908 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
1909 regnum);
1910 }
1911
1912 /* Data structures for the normal prologue-analysis-based
1913 unwinder. */
1914
1915 static const struct frame_unwind csky_unwind_cache = {
1916 "cski prologue",
1917 NORMAL_FRAME,
1918 default_frame_unwind_stop_reason,
1919 csky_frame_this_id,
1920 csky_frame_prev_register,
1921 NULL,
1922 default_frame_sniffer,
1923 NULL,
1924 NULL
1925 };
1926
1927
1928
1929 static int
1930 csky_stub_unwind_sniffer (const struct frame_unwind *self,
1931 struct frame_info *this_frame,
1932 void **this_prologue_cache)
1933 {
1934 CORE_ADDR addr_in_block;
1935
1936 addr_in_block = get_frame_address_in_block (this_frame);
1937
1938 if (find_pc_partial_function (addr_in_block, NULL, NULL, NULL) == 0
1939 || in_plt_section (addr_in_block))
1940 return 1;
1941
1942 return 0;
1943 }
1944
1945 static struct csky_unwind_cache *
1946 csky_make_stub_cache (struct frame_info *this_frame)
1947 {
1948 struct csky_unwind_cache *cache;
1949
1950 cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
1951 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1952 cache->prev_sp = get_frame_register_unsigned (this_frame, CSKY_SP_REGNUM);
1953
1954 return cache;
1955 }
1956
1957 static void
1958 csky_stub_this_id (struct frame_info *this_frame,
1959 void **this_cache,
1960 struct frame_id *this_id)
1961 {
1962 struct csky_unwind_cache *cache;
1963
1964 if (*this_cache == NULL)
1965 *this_cache = csky_make_stub_cache (this_frame);
1966 cache = (struct csky_unwind_cache *) *this_cache;
1967
1968 /* Our frame ID for a stub frame is the current SP and LR. */
1969 *this_id = frame_id_build (cache->prev_sp, get_frame_pc (this_frame));
1970 }
1971
1972 static struct value *
1973 csky_stub_prev_register (struct frame_info *this_frame,
1974 void **this_cache,
1975 int prev_regnum)
1976 {
1977 struct csky_unwind_cache *cache;
1978
1979 if (*this_cache == NULL)
1980 *this_cache = csky_make_stub_cache (this_frame);
1981 cache = (struct csky_unwind_cache *) *this_cache;
1982
1983 /* If we are asked to unwind the PC, then return the LR. */
1984 if (prev_regnum == CSKY_PC_REGNUM)
1985 {
1986 CORE_ADDR lr;
1987
1988 lr = frame_unwind_register_unsigned (this_frame, CSKY_LR_REGNUM);
1989 return frame_unwind_got_constant (this_frame, prev_regnum, lr);
1990 }
1991
1992 if (prev_regnum == CSKY_SP_REGNUM)
1993 return frame_unwind_got_constant (this_frame, prev_regnum, cache->prev_sp);
1994
1995 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
1996 prev_regnum);
1997 }
1998
1999 static frame_unwind csky_stub_unwind = {
2000 "csky stub",
2001 NORMAL_FRAME,
2002 default_frame_unwind_stop_reason,
2003 csky_stub_this_id,
2004 csky_stub_prev_register,
2005 NULL,
2006 csky_stub_unwind_sniffer
2007 };
2008
2009 /* Implement the this_base, this_locals, and this_args hooks
2010 for the normal unwinder. */
2011
2012 static CORE_ADDR
2013 csky_frame_base_address (struct frame_info *this_frame, void **this_cache)
2014 {
2015 struct csky_unwind_cache *cache;
2016
2017 if (*this_cache == NULL)
2018 *this_cache = csky_frame_unwind_cache (this_frame);
2019 cache = (struct csky_unwind_cache *) *this_cache;
2020
2021 return cache->prev_sp - cache->framesize;
2022 }
2023
2024 static const struct frame_base csky_frame_base = {
2025 &csky_unwind_cache,
2026 csky_frame_base_address,
2027 csky_frame_base_address,
2028 csky_frame_base_address
2029 };
2030
2031 /* Initialize register access method. */
2032
2033 static void
2034 csky_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2035 struct dwarf2_frame_state_reg *reg,
2036 struct frame_info *this_frame)
2037 {
2038 if (regnum == gdbarch_pc_regnum (gdbarch))
2039 reg->how = DWARF2_FRAME_REG_RA;
2040 else if (regnum == gdbarch_sp_regnum (gdbarch))
2041 reg->how = DWARF2_FRAME_REG_CFA;
2042 }
2043
2044 /* Create csky register groups. */
2045
2046 static void
2047 csky_init_reggroup ()
2048 {
2049 cr_reggroup = reggroup_new ("cr", USER_REGGROUP);
2050 fr_reggroup = reggroup_new ("fr", USER_REGGROUP);
2051 vr_reggroup = reggroup_new ("vr", USER_REGGROUP);
2052 mmu_reggroup = reggroup_new ("mmu", USER_REGGROUP);
2053 prof_reggroup = reggroup_new ("profiling", USER_REGGROUP);
2054 }
2055
2056 /* Add register groups into reggroup list. */
2057
2058 static void
2059 csky_add_reggroups (struct gdbarch *gdbarch)
2060 {
2061 reggroup_add (gdbarch, all_reggroup);
2062 reggroup_add (gdbarch, general_reggroup);
2063 reggroup_add (gdbarch, cr_reggroup);
2064 reggroup_add (gdbarch, fr_reggroup);
2065 reggroup_add (gdbarch, vr_reggroup);
2066 reggroup_add (gdbarch, mmu_reggroup);
2067 reggroup_add (gdbarch, prof_reggroup);
2068 }
2069
2070 /* Return the groups that a CSKY register can be categorised into. */
2071
2072 static int
2073 csky_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
2074 struct reggroup *reggroup)
2075 {
2076 int raw_p;
2077
2078 if (gdbarch_register_name (gdbarch, regnum) == NULL
2079 || gdbarch_register_name (gdbarch, regnum)[0] == '\0')
2080 return 0;
2081
2082 if (reggroup == all_reggroup)
2083 return 1;
2084
2085 raw_p = regnum < gdbarch_num_regs (gdbarch);
2086 if (reggroup == save_reggroup || reggroup == restore_reggroup)
2087 return raw_p;
2088
2089 if (((regnum >= CSKY_R0_REGNUM) && (regnum <= CSKY_R0_REGNUM + 31))
2090 && (reggroup == general_reggroup))
2091 return 1;
2092
2093 if (((regnum == CSKY_PC_REGNUM)
2094 || ((regnum >= CSKY_CR0_REGNUM)
2095 && (regnum <= CSKY_CR0_REGNUM + 30)))
2096 && (reggroup == cr_reggroup))
2097 return 2;
2098
2099 if ((((regnum >= CSKY_VR0_REGNUM) && (regnum <= CSKY_VR0_REGNUM + 15))
2100 || ((regnum >= CSKY_VCR0_REGNUM)
2101 && (regnum <= CSKY_VCR0_REGNUM + 2)))
2102 && (reggroup == vr_reggroup))
2103 return 3;
2104
2105 if (((regnum >= CSKY_MMU_REGNUM) && (regnum <= CSKY_MMU_REGNUM + 8))
2106 && (reggroup == mmu_reggroup))
2107 return 4;
2108
2109 if (((regnum >= CSKY_PROFCR_REGNUM)
2110 && (regnum <= CSKY_PROFCR_REGNUM + 48))
2111 && (reggroup == prof_reggroup))
2112 return 5;
2113
2114 if ((((regnum >= CSKY_FR0_REGNUM) && (regnum <= CSKY_FR0_REGNUM + 15))
2115 || ((regnum >= CSKY_VCR0_REGNUM) && (regnum <= CSKY_VCR0_REGNUM + 2)))
2116 && (reggroup == fr_reggroup))
2117 return 6;
2118
2119 return 0;
2120 }
2121
2122 /* Implement the dwarf2_reg_to_regnum gdbarch method. */
2123
2124 static int
2125 csky_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int dw_reg)
2126 {
2127 if (dw_reg < 0 || dw_reg >= CSKY_NUM_REGS)
2128 return -1;
2129 return dw_reg;
2130 }
2131
2132 /* Override interface for command: info register. */
2133
2134 static void
2135 csky_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
2136 struct frame_info *frame, int regnum, int all)
2137 {
2138 /* Call default print_registers_info function. */
2139 default_print_registers_info (gdbarch, file, frame, regnum, all);
2140
2141 /* For command: info register. */
2142 if (regnum == -1 && all == 0)
2143 {
2144 default_print_registers_info (gdbarch, file, frame,
2145 CSKY_PC_REGNUM, 0);
2146 default_print_registers_info (gdbarch, file, frame,
2147 CSKY_EPC_REGNUM, 0);
2148 default_print_registers_info (gdbarch, file, frame,
2149 CSKY_CR0_REGNUM, 0);
2150 default_print_registers_info (gdbarch, file, frame,
2151 CSKY_EPSR_REGNUM, 0);
2152 }
2153 return;
2154 }
2155
2156 /* Initialize the current architecture based on INFO. If possible,
2157 re-use an architecture from ARCHES, which is a list of
2158 architectures already created during this debugging session.
2159
2160 Called at program startup, when reading a core file, and when
2161 reading a binary file. */
2162
2163 static struct gdbarch *
2164 csky_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2165 {
2166 struct gdbarch *gdbarch;
2167
2168 /* Find a candidate among the list of pre-declared architectures. */
2169 arches = gdbarch_list_lookup_by_info (arches, &info);
2170 if (arches != NULL)
2171 return arches->gdbarch;
2172
2173 /* None found, create a new architecture from the information
2174 provided. */
2175 csky_gdbarch_tdep *tdep = new csky_gdbarch_tdep;
2176 gdbarch = gdbarch_alloc (&info, tdep);
2177
2178 /* Target data types. */
2179 set_gdbarch_ptr_bit (gdbarch, 32);
2180 set_gdbarch_addr_bit (gdbarch, 32);
2181 set_gdbarch_short_bit (gdbarch, 16);
2182 set_gdbarch_int_bit (gdbarch, 32);
2183 set_gdbarch_long_bit (gdbarch, 32);
2184 set_gdbarch_long_long_bit (gdbarch, 64);
2185 set_gdbarch_float_bit (gdbarch, 32);
2186 set_gdbarch_double_bit (gdbarch, 64);
2187 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
2188 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
2189
2190 /* Information about the target architecture. */
2191 set_gdbarch_return_value (gdbarch, csky_return_value);
2192 set_gdbarch_breakpoint_kind_from_pc (gdbarch, csky_breakpoint_kind_from_pc);
2193 set_gdbarch_sw_breakpoint_from_kind (gdbarch, csky_sw_breakpoint_from_kind);
2194
2195 /* Register architecture. */
2196 set_gdbarch_num_regs (gdbarch, CSKY_NUM_REGS);
2197 set_gdbarch_pc_regnum (gdbarch, CSKY_PC_REGNUM);
2198 set_gdbarch_sp_regnum (gdbarch, CSKY_SP_REGNUM);
2199 set_gdbarch_register_name (gdbarch, csky_register_name);
2200 set_gdbarch_register_type (gdbarch, csky_register_type);
2201 set_gdbarch_read_pc (gdbarch, csky_read_pc);
2202 set_gdbarch_write_pc (gdbarch, csky_write_pc);
2203 set_gdbarch_print_registers_info (gdbarch, csky_print_registers_info);
2204 csky_add_reggroups (gdbarch);
2205 set_gdbarch_register_reggroup_p (gdbarch, csky_register_reggroup_p);
2206 set_gdbarch_stab_reg_to_regnum (gdbarch, csky_dwarf_reg_to_regnum);
2207 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, csky_dwarf_reg_to_regnum);
2208 dwarf2_frame_set_init_reg (gdbarch, csky_dwarf2_frame_init_reg);
2209
2210 /* Functions to analyze frames. */
2211 frame_base_set_default (gdbarch, &csky_frame_base);
2212 set_gdbarch_skip_prologue (gdbarch, csky_skip_prologue);
2213 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2214 set_gdbarch_frame_align (gdbarch, csky_frame_align);
2215 set_gdbarch_stack_frame_destroyed_p (gdbarch, csky_stack_frame_destroyed_p);
2216
2217 /* Functions handling dummy frames. */
2218 set_gdbarch_push_dummy_call (gdbarch, csky_push_dummy_call);
2219
2220 /* Frame unwinders. Use DWARF debug info if available,
2221 otherwise use our own unwinder. */
2222 dwarf2_append_unwinders (gdbarch);
2223 frame_unwind_append_unwinder (gdbarch, &csky_stub_unwind);
2224 frame_unwind_append_unwinder (gdbarch, &csky_unwind_cache);
2225
2226 /* Breakpoints. */
2227 set_gdbarch_memory_insert_breakpoint (gdbarch,
2228 csky_memory_insert_breakpoint);
2229 set_gdbarch_memory_remove_breakpoint (gdbarch,
2230 csky_memory_remove_breakpoint);
2231
2232 /* Hook in ABI-specific overrides, if they have been registered. */
2233 gdbarch_init_osabi (info, gdbarch);
2234
2235 /* Support simple overlay manager. */
2236 set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
2237 set_gdbarch_char_signed (gdbarch, 0);
2238 return gdbarch;
2239 }
2240
2241 void _initialize_csky_tdep ();
2242 void
2243 _initialize_csky_tdep ()
2244 {
2245
2246 register_gdbarch_init (bfd_arch_csky, csky_gdbarch_init);
2247
2248 csky_init_reggroup ();
2249
2250 /* Allow debugging this file's internals. */
2251 add_setshow_boolean_cmd ("csky", class_maintenance, &csky_debug,
2252 _("Set C-Sky debugging."),
2253 _("Show C-Sky debugging."),
2254 _("When on, C-Sky specific debugging is enabled."),
2255 NULL,
2256 NULL,
2257 &setdebuglist, &showdebuglist);
2258 }