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[gdb/testsuite] Fix gdb.dwarf2/locexpr-data-member-location.exp with nopie
[binutils-gdb.git] / gdb / csky-tdep.c
1 /* Target-dependent code for the CSKY architecture, for GDB.
2
3 Copyright (C) 2010-2022 Free Software Foundation, Inc.
4
5 Contributed by C-SKY Microsystems and Mentor Graphics.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "gdbsupport/gdb_assert.h"
24 #include "frame.h"
25 #include "inferior.h"
26 #include "symtab.h"
27 #include "value.h"
28 #include "gdbcmd.h"
29 #include "language.h"
30 #include "gdbcore.h"
31 #include "symfile.h"
32 #include "objfiles.h"
33 #include "gdbtypes.h"
34 #include "target.h"
35 #include "arch-utils.h"
36 #include "regcache.h"
37 #include "osabi.h"
38 #include "block.h"
39 #include "reggroups.h"
40 #include "elf/csky.h"
41 #include "elf-bfd.h"
42 #include "symcat.h"
43 #include "sim-regno.h"
44 #include "dis-asm.h"
45 #include "frame-unwind.h"
46 #include "frame-base.h"
47 #include "trad-frame.h"
48 #include "infcall.h"
49 #include "floatformat.h"
50 #include "remote.h"
51 #include "target-descriptions.h"
52 #include "dwarf2/frame.h"
53 #include "user-regs.h"
54 #include "valprint.h"
55 #include "csky-tdep.h"
56 #include "regset.h"
57 #include "opcode/csky.h"
58 #include <algorithm>
59 #include <vector>
60
61 /* Control debugging information emitted in this file. */
62 static bool csky_debug = false;
63
64 static const reggroup *cr_reggroup;
65 static const reggroup *fr_reggroup;
66 static const reggroup *vr_reggroup;
67 static const reggroup *mmu_reggroup;
68 static const reggroup *prof_reggroup;
69
70 /* Convenience function to print debug messages in prologue analysis. */
71
72 static void
73 print_savedreg_msg (int regno, int offsets[], bool print_continuing)
74 {
75 gdb_printf (gdb_stdlog, "csky: r%d saved at offset 0x%x\n",
76 regno, offsets[regno]);
77 if (print_continuing)
78 gdb_printf (gdb_stdlog, "csky: continuing\n");
79 }
80
81 /* Check whether the instruction at ADDR is 16-bit or not. */
82
83 static int
84 csky_pc_is_csky16 (struct gdbarch *gdbarch, CORE_ADDR addr)
85 {
86 gdb_byte target_mem[2];
87 int status;
88 unsigned int insn;
89 int ret = 1;
90 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
91
92 status = target_read_memory (addr, target_mem, 2);
93 /* Assume a 16-bit instruction if we can't read memory. */
94 if (status)
95 return 1;
96
97 /* Get instruction from memory. */
98 insn = extract_unsigned_integer (target_mem, 2, byte_order);
99 if ((insn & CSKY_32_INSN_MASK) == CSKY_32_INSN_MASK)
100 ret = 0;
101 else if (insn == CSKY_BKPT_INSN)
102 {
103 /* Check for 32-bit bkpt instruction which is all 0. */
104 status = target_read_memory (addr + 2, target_mem, 2);
105 if (status)
106 return 1;
107
108 insn = extract_unsigned_integer (target_mem, 2, byte_order);
109 if (insn == CSKY_BKPT_INSN)
110 ret = 0;
111 }
112 return ret;
113 }
114
115 /* Get one instruction at ADDR and store it in INSN. Return 2 for
116 a 16-bit instruction or 4 for a 32-bit instruction. */
117
118 static int
119 csky_get_insn (struct gdbarch *gdbarch, CORE_ADDR addr, unsigned int *insn)
120 {
121 gdb_byte target_mem[2];
122 unsigned int insn_type;
123 int status;
124 int insn_len = 2;
125 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
126
127 status = target_read_memory (addr, target_mem, 2);
128 if (status)
129 memory_error (TARGET_XFER_E_IO, addr);
130
131 insn_type = extract_unsigned_integer (target_mem, 2, byte_order);
132 if (CSKY_32_INSN_MASK == (insn_type & CSKY_32_INSN_MASK))
133 {
134 status = target_read_memory (addr + 2, target_mem, 2);
135 if (status)
136 memory_error (TARGET_XFER_E_IO, addr);
137 insn_type = ((insn_type << 16)
138 | extract_unsigned_integer (target_mem, 2, byte_order));
139 insn_len = 4;
140 }
141 *insn = insn_type;
142 return insn_len;
143 }
144
145 /* Implement the read_pc gdbarch method. */
146
147 static CORE_ADDR
148 csky_read_pc (readable_regcache *regcache)
149 {
150 ULONGEST pc;
151 regcache->cooked_read (CSKY_PC_REGNUM, &pc);
152 return pc;
153 }
154
155 /* Implement the write_pc gdbarch method. */
156
157 static void
158 csky_write_pc (regcache *regcache, CORE_ADDR val)
159 {
160 regcache_cooked_write_unsigned (regcache, CSKY_PC_REGNUM, val);
161 }
162
163 /* C-Sky ABI register names. */
164
165 static const char * const csky_register_names[] =
166 {
167 /* General registers 0 - 31. */
168 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
169 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
170 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
171 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
172
173 /* DSP hilo registers 36 and 37. */
174 "", "", "", "", "hi", "lo", "", "",
175
176 /* FPU/VPU general registers 40 - 71. */
177 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
178 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
179 "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7",
180 "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15",
181
182 /* Program counter 72. */
183 "pc",
184
185 /* Optional registers (ar) 73 - 88. */
186 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
187 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
188
189 /* Control registers (cr) 89 - 119. */
190 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
191 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
192 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
193 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
194
195 /* FPU/VPU control registers 121 ~ 123. */
196 /* User sp 127. */
197 "fid", "fcr", "fesr", "", "", "", "usp",
198
199 /* MMU control registers: 128 - 136. */
200 "mcr0", "mcr2", "mcr3", "mcr4", "mcr6", "mcr8", "mcr29", "mcr30",
201 "mcr31", "", "", "",
202
203 /* Profiling control registers 140 - 143. */
204 /* Profiling software general registers 144 - 157. */
205 "profcr0", "profcr1", "profcr2", "profcr3", "profsgr0", "profsgr1",
206 "profsgr2", "profsgr3", "profsgr4", "profsgr5", "profsgr6", "profsgr7",
207 "profsgr8", "profsgr9", "profsgr10","profsgr11","profsgr12", "profsgr13",
208 "", "",
209
210 /* Profiling architecture general registers 160 - 174. */
211 "profagr0", "profagr1", "profagr2", "profagr3", "profagr4", "profagr5",
212 "profagr6", "profagr7", "profagr8", "profagr9", "profagr10","profagr11",
213 "profagr12","profagr13","profagr14", "",
214
215 /* Profiling extension general registers 176 - 188. */
216 "profxgr0", "profxgr1", "profxgr2", "profxgr3", "profxgr4", "profxgr5",
217 "profxgr6", "profxgr7", "profxgr8", "profxgr9", "profxgr10","profxgr11",
218 "profxgr12",
219
220 /* Control registers in bank1. */
221 "", "", "", "", "", "", "", "",
222 "", "", "", "", "", "", "", "",
223 "cp1cr16", "cp1cr17", "cp1cr18", "cp1cr19", "cp1cr20", "", "", "",
224 "", "", "", "", "", "", "", "",
225
226 /* Control registers in bank3 (ICE). */
227 "sepsr", "sevbr", "seepsr", "", "seepc", "", "nsssp", "seusp",
228 "sedcr", "", "", "", "", "", "", "",
229 "", "", "", "", "", "", "", "",
230 "", "", "", "", "", "", "", ""
231 };
232
233 /* Implement the register_name gdbarch method. */
234
235 static const char *
236 csky_register_name (struct gdbarch *gdbarch, int reg_nr)
237 {
238 if (reg_nr < 0)
239 return NULL;
240
241 if (reg_nr >= gdbarch_num_regs (gdbarch))
242 return NULL;
243
244 return csky_register_names[reg_nr];
245 }
246
247 /* Construct vector type for vrx registers. */
248
249 static struct type *
250 csky_vector_type (struct gdbarch *gdbarch)
251 {
252 const struct builtin_type *bt = builtin_type (gdbarch);
253
254 struct type *t;
255
256 t = arch_composite_type (gdbarch, "__gdb_builtin_type_vec128i",
257 TYPE_CODE_UNION);
258
259 append_composite_type_field (t, "u32",
260 init_vector_type (bt->builtin_int32, 4));
261 append_composite_type_field (t, "u16",
262 init_vector_type (bt->builtin_int16, 8));
263 append_composite_type_field (t, "u8",
264 init_vector_type (bt->builtin_int8, 16));
265
266 t->set_is_vector (true);
267 t->set_name ("builtin_type_vec128i");
268
269 return t;
270 }
271
272 /* Return the GDB type object for the "standard" data type
273 of data in register N. */
274
275 static struct type *
276 csky_register_type (struct gdbarch *gdbarch, int reg_nr)
277 {
278 /* PC, EPC, FPC is a text pointer. */
279 if ((reg_nr == CSKY_PC_REGNUM) || (reg_nr == CSKY_EPC_REGNUM)
280 || (reg_nr == CSKY_FPC_REGNUM))
281 return builtin_type (gdbarch)->builtin_func_ptr;
282
283 /* VBR is a data pointer. */
284 if (reg_nr == CSKY_VBR_REGNUM)
285 return builtin_type (gdbarch)->builtin_data_ptr;
286
287 /* Float register has 64 bits, and only in ck810. */
288 if ((reg_nr >=CSKY_FR0_REGNUM) && (reg_nr <= CSKY_FR0_REGNUM + 15))
289 return arch_float_type (gdbarch, 64, "builtin_type_csky_ext",
290 floatformats_ieee_double);
291
292 /* Vector register has 128 bits, and only in ck810. */
293 if ((reg_nr >= CSKY_VR0_REGNUM) && (reg_nr <= CSKY_VR0_REGNUM + 15))
294 return csky_vector_type (gdbarch);
295
296 /* Profiling general register has 48 bits, we use 64bit. */
297 if ((reg_nr >= CSKY_PROFGR_REGNUM) && (reg_nr <= CSKY_PROFGR_REGNUM + 44))
298 return builtin_type (gdbarch)->builtin_uint64;
299
300 if (reg_nr == CSKY_SP_REGNUM)
301 return builtin_type (gdbarch)->builtin_data_ptr;
302
303 /* Others are 32 bits. */
304 return builtin_type (gdbarch)->builtin_int32;
305 }
306
307 /* Data structure to marshall items in a dummy stack frame when
308 calling a function in the inferior. */
309
310 struct stack_item
311 {
312 stack_item (int len_, const gdb_byte *data_)
313 : len (len_), data (data_)
314 {}
315
316 int len;
317 const gdb_byte *data;
318 };
319
320 /* Implement the push_dummy_call gdbarch method. */
321
322 static CORE_ADDR
323 csky_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
324 struct regcache *regcache, CORE_ADDR bp_addr,
325 int nargs, struct value **args, CORE_ADDR sp,
326 function_call_return_method return_method,
327 CORE_ADDR struct_addr)
328 {
329 int argnum;
330 int argreg = CSKY_ABI_A0_REGNUM;
331 int last_arg_regnum = CSKY_ABI_LAST_ARG_REGNUM;
332 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
333 std::vector<stack_item> stack_items;
334
335 /* Set the return address. For CSKY, the return breakpoint is
336 always at BP_ADDR. */
337 regcache_cooked_write_unsigned (regcache, CSKY_LR_REGNUM, bp_addr);
338
339 /* The struct_return pointer occupies the first parameter
340 passing register. */
341 if (return_method == return_method_struct)
342 {
343 if (csky_debug)
344 {
345 gdb_printf (gdb_stdlog,
346 "csky: struct return in %s = %s\n",
347 gdbarch_register_name (gdbarch, argreg),
348 paddress (gdbarch, struct_addr));
349 }
350 regcache_cooked_write_unsigned (regcache, argreg, struct_addr);
351 argreg++;
352 }
353
354 /* Put parameters into argument registers in REGCACHE.
355 In ABI argument registers are r0 through r3. */
356 for (argnum = 0; argnum < nargs; argnum++)
357 {
358 int len;
359 struct type *arg_type;
360 const gdb_byte *val;
361
362 arg_type = check_typedef (value_type (args[argnum]));
363 len = TYPE_LENGTH (arg_type);
364 val = value_contents (args[argnum]).data ();
365
366 /* Copy the argument to argument registers or the dummy stack.
367 Large arguments are split between registers and stack.
368
369 If len < 4, there is no need to worry about endianness since
370 the arguments will always be stored in the low address. */
371 if (len < 4)
372 {
373 CORE_ADDR regval
374 = extract_unsigned_integer (val, len, byte_order);
375 regcache_cooked_write_unsigned (regcache, argreg, regval);
376 argreg++;
377 }
378 else
379 {
380 while (len > 0)
381 {
382 int partial_len = len < 4 ? len : 4;
383 if (argreg <= last_arg_regnum)
384 {
385 /* The argument is passed in an argument register. */
386 CORE_ADDR regval
387 = extract_unsigned_integer (val, partial_len,
388 byte_order);
389 if (byte_order == BFD_ENDIAN_BIG)
390 regval <<= (4 - partial_len) * 8;
391
392 /* Put regval into register in REGCACHE. */
393 regcache_cooked_write_unsigned (regcache, argreg,
394 regval);
395 argreg++;
396 }
397 else
398 {
399 /* The argument should be pushed onto the dummy stack. */
400 stack_items.emplace_back (4, val);
401 }
402 len -= partial_len;
403 val += partial_len;
404 }
405 }
406 }
407
408 /* Transfer the dummy stack frame to the target. */
409 std::vector<stack_item>::reverse_iterator iter;
410 for (iter = stack_items.rbegin (); iter != stack_items.rend (); ++iter)
411 {
412 sp -= iter->len;
413 write_memory (sp, iter->data, iter->len);
414 }
415
416 /* Finally, update the SP register. */
417 regcache_cooked_write_unsigned (regcache, CSKY_SP_REGNUM, sp);
418 return sp;
419 }
420
421 /* Implement the return_value gdbarch method. */
422
423 static enum return_value_convention
424 csky_return_value (struct gdbarch *gdbarch, struct value *function,
425 struct type *valtype, struct regcache *regcache,
426 gdb_byte *readbuf, const gdb_byte *writebuf)
427 {
428 CORE_ADDR regval;
429 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
430 int len = TYPE_LENGTH (valtype);
431 unsigned int ret_regnum = CSKY_RET_REGNUM;
432
433 /* Csky abi specifies that return values larger than 8 bytes
434 are put on the stack. */
435 if (len > 8)
436 return RETURN_VALUE_STRUCT_CONVENTION;
437 else
438 {
439 if (readbuf != NULL)
440 {
441 ULONGEST tmp;
442 /* By using store_unsigned_integer we avoid having to do
443 anything special for small big-endian values. */
444 regcache->cooked_read (ret_regnum, &tmp);
445 store_unsigned_integer (readbuf, (len > 4 ? 4 : len),
446 byte_order, tmp);
447 if (len > 4)
448 {
449 regcache->cooked_read (ret_regnum + 1, &tmp);
450 store_unsigned_integer (readbuf + 4, 4, byte_order, tmp);
451 }
452 }
453 if (writebuf != NULL)
454 {
455 regval = extract_unsigned_integer (writebuf, len > 4 ? 4 : len,
456 byte_order);
457 regcache_cooked_write_unsigned (regcache, ret_regnum, regval);
458 if (len > 4)
459 {
460 regval = extract_unsigned_integer ((gdb_byte *) writebuf + 4,
461 4, byte_order);
462 regcache_cooked_write_unsigned (regcache, ret_regnum + 1,
463 regval);
464 }
465
466 }
467 return RETURN_VALUE_REGISTER_CONVENTION;
468 }
469 }
470
471 /* Implement the frame_align gdbarch method.
472
473 Adjust the address downward (direction of stack growth) so that it
474 is correctly aligned for a new stack frame. */
475
476 static CORE_ADDR
477 csky_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
478 {
479 return align_down (addr, 4);
480 }
481
482 /* Unwind cache used for gdbarch fallback unwinder. */
483
484 struct csky_unwind_cache
485 {
486 /* The stack pointer at the time this frame was created; i.e. the
487 caller's stack pointer when this function was called. It is used
488 to identify this frame. */
489 CORE_ADDR prev_sp;
490
491 /* The frame base for this frame is just prev_sp - frame size.
492 FRAMESIZE is the distance from the frame pointer to the
493 initial stack pointer. */
494 int framesize;
495
496 /* The register used to hold the frame pointer for this frame. */
497 int framereg;
498
499 /* Saved register offsets. */
500 trad_frame_saved_reg *saved_regs;
501 };
502
503 /* Do prologue analysis, returning the PC of the first instruction
504 after the function prologue. */
505
506 static CORE_ADDR
507 csky_analyze_prologue (struct gdbarch *gdbarch,
508 CORE_ADDR start_pc,
509 CORE_ADDR limit_pc,
510 CORE_ADDR end_pc,
511 struct frame_info *this_frame,
512 struct csky_unwind_cache *this_cache,
513 lr_type_t lr_type)
514 {
515 CORE_ADDR addr;
516 unsigned int insn, rn;
517 int framesize = 0;
518 int stacksize = 0;
519 int register_offsets[CSKY_NUM_GREGS_SAVED_GREGS];
520 int insn_len;
521 /* For adjusting fp. */
522 int is_fp_saved = 0;
523 int adjust_fp = 0;
524
525 /* REGISTER_OFFSETS will contain offsets from the top of the frame
526 (NOT the frame pointer) for the various saved registers, or -1
527 if the register is not saved. */
528 for (rn = 0; rn < CSKY_NUM_GREGS_SAVED_GREGS; rn++)
529 register_offsets[rn] = -1;
530
531 /* Analyze the prologue. Things we determine from analyzing the
532 prologue include the size of the frame and which registers are
533 saved (and where). */
534 if (csky_debug)
535 {
536 gdb_printf (gdb_stdlog,
537 "csky: Scanning prologue: start_pc = 0x%x,"
538 "limit_pc = 0x%x\n", (unsigned int) start_pc,
539 (unsigned int) limit_pc);
540 }
541
542 /* Default to 16 bit instruction. */
543 insn_len = 2;
544 stacksize = 0;
545 for (addr = start_pc; addr < limit_pc; addr += insn_len)
546 {
547 /* Get next insn. */
548 insn_len = csky_get_insn (gdbarch, addr, &insn);
549
550 /* Check if 32 bit. */
551 if (insn_len == 4)
552 {
553 /* subi32 sp,sp oimm12. */
554 if (CSKY_32_IS_SUBI0 (insn))
555 {
556 /* Got oimm12. */
557 int offset = CSKY_32_SUBI_IMM (insn);
558 if (csky_debug)
559 {
560 gdb_printf (gdb_stdlog,
561 "csky: got subi sp,%d; continuing\n",
562 offset);
563 }
564 stacksize += offset;
565 continue;
566 }
567 /* stm32 ry-rz,(sp). */
568 else if (CSKY_32_IS_STMx0 (insn))
569 {
570 /* Spill register(s). */
571 int start_register;
572 int reg_count;
573 int offset;
574
575 /* BIG WARNING! The CKCore ABI does not restrict functions
576 to taking only one stack allocation. Therefore, when
577 we save a register, we record the offset of where it was
578 saved relative to the current stacksize. This will
579 then give an offset from the SP upon entry to our
580 function. Remember, stacksize is NOT constant until
581 we're done scanning the prologue. */
582 start_register = CSKY_32_STM_VAL_REGNUM (insn);
583 reg_count = CSKY_32_STM_SIZE (insn);
584 if (csky_debug)
585 {
586 gdb_printf (gdb_stdlog,
587 "csky: got stm r%d-r%d,(sp)\n",
588 start_register,
589 start_register + reg_count);
590 }
591
592 for (rn = start_register, offset = 0;
593 rn <= start_register + reg_count;
594 rn++, offset += 4)
595 {
596 register_offsets[rn] = stacksize - offset;
597 if (csky_debug)
598 {
599 gdb_printf (gdb_stdlog,
600 "csky: r%d saved at 0x%x"
601 " (offset %d)\n",
602 rn, register_offsets[rn],
603 offset);
604 }
605 }
606 if (csky_debug)
607 gdb_printf (gdb_stdlog, "csky: continuing\n");
608 continue;
609 }
610 /* stw ry,(sp,disp). */
611 else if (CSKY_32_IS_STWx0 (insn))
612 {
613 /* Spill register: see note for IS_STM above. */
614 int disp;
615
616 rn = CSKY_32_ST_VAL_REGNUM (insn);
617 disp = CSKY_32_ST_OFFSET (insn);
618 register_offsets[rn] = stacksize - disp;
619 if (csky_debug)
620 print_savedreg_msg (rn, register_offsets, true);
621 continue;
622 }
623 else if (CSKY_32_IS_MOV_FP_SP (insn))
624 {
625 /* SP is saved to FP reg, means code afer prologue may
626 modify SP. */
627 is_fp_saved = 1;
628 adjust_fp = stacksize;
629 continue;
630 }
631 else if (CSKY_32_IS_MFCR_EPSR (insn))
632 {
633 unsigned int insn2;
634 addr += 4;
635 int mfcr_regnum = insn & 0x1f;
636 insn_len = csky_get_insn (gdbarch, addr, &insn2);
637 if (insn_len == 2)
638 {
639 int stw_regnum = (insn2 >> 5) & 0x7;
640 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
641 {
642 int offset;
643
644 /* CSKY_EPSR_REGNUM. */
645 rn = CSKY_NUM_GREGS;
646 offset = CSKY_16_STWx0_OFFSET (insn2);
647 register_offsets[rn] = stacksize - offset;
648 if (csky_debug)
649 print_savedreg_msg (rn, register_offsets, true);
650 continue;
651 }
652 break;
653 }
654 else
655 {
656 /* INSN_LEN == 4. */
657 int stw_regnum = (insn2 >> 21) & 0x1f;
658 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
659 {
660 int offset;
661
662 /* CSKY_EPSR_REGNUM. */
663 rn = CSKY_NUM_GREGS;
664 offset = CSKY_32_ST_OFFSET (insn2);
665 register_offsets[rn] = framesize - offset;
666 if (csky_debug)
667 print_savedreg_msg (rn, register_offsets, true);
668 continue;
669 }
670 break;
671 }
672 }
673 else if (CSKY_32_IS_MFCR_FPSR (insn))
674 {
675 unsigned int insn2;
676 addr += 4;
677 int mfcr_regnum = insn & 0x1f;
678 insn_len = csky_get_insn (gdbarch, addr, &insn2);
679 if (insn_len == 2)
680 {
681 int stw_regnum = (insn2 >> 5) & 0x7;
682 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum
683 == stw_regnum))
684 {
685 int offset;
686
687 /* CSKY_FPSR_REGNUM. */
688 rn = CSKY_NUM_GREGS + 1;
689 offset = CSKY_16_STWx0_OFFSET (insn2);
690 register_offsets[rn] = stacksize - offset;
691 if (csky_debug)
692 print_savedreg_msg (rn, register_offsets, true);
693 continue;
694 }
695 break;
696 }
697 else
698 {
699 /* INSN_LEN == 4. */
700 int stw_regnum = (insn2 >> 21) & 0x1f;
701 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
702 {
703 int offset;
704
705 /* CSKY_FPSR_REGNUM. */
706 rn = CSKY_NUM_GREGS + 1;
707 offset = CSKY_32_ST_OFFSET (insn2);
708 register_offsets[rn] = framesize - offset;
709 if (csky_debug)
710 print_savedreg_msg (rn, register_offsets, true);
711 continue;
712 }
713 break;
714 }
715 }
716 else if (CSKY_32_IS_MFCR_EPC (insn))
717 {
718 unsigned int insn2;
719 addr += 4;
720 int mfcr_regnum = insn & 0x1f;
721 insn_len = csky_get_insn (gdbarch, addr, &insn2);
722 if (insn_len == 2)
723 {
724 int stw_regnum = (insn2 >> 5) & 0x7;
725 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
726 {
727 int offset;
728
729 /* CSKY_EPC_REGNUM. */
730 rn = CSKY_NUM_GREGS + 2;
731 offset = CSKY_16_STWx0_OFFSET (insn2);
732 register_offsets[rn] = stacksize - offset;
733 if (csky_debug)
734 print_savedreg_msg (rn, register_offsets, true);
735 continue;
736 }
737 break;
738 }
739 else
740 {
741 /* INSN_LEN == 4. */
742 int stw_regnum = (insn2 >> 21) & 0x1f;
743 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
744 {
745 int offset;
746
747 /* CSKY_EPC_REGNUM. */
748 rn = CSKY_NUM_GREGS + 2;
749 offset = CSKY_32_ST_OFFSET (insn2);
750 register_offsets[rn] = framesize - offset;
751 if (csky_debug)
752 print_savedreg_msg (rn, register_offsets, true);
753 continue;
754 }
755 break;
756 }
757 }
758 else if (CSKY_32_IS_MFCR_FPC (insn))
759 {
760 unsigned int insn2;
761 addr += 4;
762 int mfcr_regnum = insn & 0x1f;
763 insn_len = csky_get_insn (gdbarch, addr, &insn2);
764 if (insn_len == 2)
765 {
766 int stw_regnum = (insn2 >> 5) & 0x7;
767 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
768 {
769 int offset;
770
771 /* CSKY_FPC_REGNUM. */
772 rn = CSKY_NUM_GREGS + 3;
773 offset = CSKY_16_STWx0_OFFSET (insn2);
774 register_offsets[rn] = stacksize - offset;
775 if (csky_debug)
776 print_savedreg_msg (rn, register_offsets, true);
777 continue;
778 }
779 break;
780 }
781 else
782 {
783 /* INSN_LEN == 4. */
784 int stw_regnum = (insn2 >> 21) & 0x1f;
785 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
786 {
787 int offset;
788
789 /* CSKY_FPC_REGNUM. */
790 rn = CSKY_NUM_GREGS + 3;
791 offset = CSKY_32_ST_OFFSET (insn2);
792 register_offsets[rn] = framesize - offset;
793 if (csky_debug)
794 print_savedreg_msg (rn, register_offsets, true);
795 continue;
796 }
797 break;
798 }
799 }
800 else if (CSKY_32_IS_PUSH (insn))
801 {
802 /* Push for 32_bit. */
803 if (CSKY_32_IS_PUSH_R29 (insn))
804 {
805 stacksize += 4;
806 register_offsets[29] = stacksize;
807 if (csky_debug)
808 print_savedreg_msg (29, register_offsets, false);
809 }
810 if (CSKY_32_PUSH_LIST2 (insn))
811 {
812 int num = CSKY_32_PUSH_LIST2 (insn);
813 int tmp = 0;
814 stacksize += num * 4;
815 if (csky_debug)
816 {
817 gdb_printf (gdb_stdlog,
818 "csky: push regs_array: r16-r%d\n",
819 16 + num - 1);
820 }
821 for (rn = 16; rn <= 16 + num - 1; rn++)
822 {
823 register_offsets[rn] = stacksize - tmp;
824 if (csky_debug)
825 {
826 gdb_printf (gdb_stdlog,
827 "csky: r%d saved at 0x%x"
828 " (offset %d)\n", rn,
829 register_offsets[rn], tmp);
830 }
831 tmp += 4;
832 }
833 }
834 if (CSKY_32_IS_PUSH_R15 (insn))
835 {
836 stacksize += 4;
837 register_offsets[15] = stacksize;
838 if (csky_debug)
839 print_savedreg_msg (15, register_offsets, false);
840 }
841 if (CSKY_32_PUSH_LIST1 (insn))
842 {
843 int num = CSKY_32_PUSH_LIST1 (insn);
844 int tmp = 0;
845 stacksize += num * 4;
846 if (csky_debug)
847 {
848 gdb_printf (gdb_stdlog,
849 "csky: push regs_array: r4-r%d\n",
850 4 + num - 1);
851 }
852 for (rn = 4; rn <= 4 + num - 1; rn++)
853 {
854 register_offsets[rn] = stacksize - tmp;
855 if (csky_debug)
856 {
857 gdb_printf (gdb_stdlog,
858 "csky: r%d saved at 0x%x"
859 " (offset %d)\n", rn,
860 register_offsets[rn], tmp);
861 }
862 tmp += 4;
863 }
864 }
865
866 framesize = stacksize;
867 if (csky_debug)
868 gdb_printf (gdb_stdlog, "csky: continuing\n");
869 continue;
870 }
871 else if (CSKY_32_IS_LRW4 (insn) || CSKY_32_IS_MOVI4 (insn)
872 || CSKY_32_IS_MOVIH4 (insn) || CSKY_32_IS_BMASKI4 (insn))
873 {
874 int adjust = 0;
875 int offset = 0;
876 unsigned int insn2;
877
878 if (csky_debug)
879 {
880 gdb_printf (gdb_stdlog,
881 "csky: looking at large frame\n");
882 }
883 if (CSKY_32_IS_LRW4 (insn))
884 {
885 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
886 int literal_addr = (addr + ((insn & 0xffff) << 2))
887 & 0xfffffffc;
888 adjust = read_memory_unsigned_integer (literal_addr, 4,
889 byte_order);
890 }
891 else if (CSKY_32_IS_MOVI4 (insn))
892 adjust = (insn & 0xffff);
893 else if (CSKY_32_IS_MOVIH4 (insn))
894 adjust = (insn & 0xffff) << 16;
895 else
896 {
897 /* CSKY_32_IS_BMASKI4 (insn). */
898 adjust = (1 << (((insn & 0x3e00000) >> 21) + 1)) - 1;
899 }
900
901 if (csky_debug)
902 {
903 gdb_printf (gdb_stdlog,
904 "csky: base stacksize=0x%x\n", adjust);
905
906 /* May have zero or more insns which modify r4. */
907 gdb_printf (gdb_stdlog,
908 "csky: looking for r4 adjusters...\n");
909 }
910
911 offset = 4;
912 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
913 while (CSKY_IS_R4_ADJUSTER (insn2))
914 {
915 if (CSKY_32_IS_ADDI4 (insn2))
916 {
917 int imm = (insn2 & 0xfff) + 1;
918 adjust += imm;
919 if (csky_debug)
920 {
921 gdb_printf (gdb_stdlog,
922 "csky: addi r4,%d\n", imm);
923 }
924 }
925 else if (CSKY_32_IS_SUBI4 (insn2))
926 {
927 int imm = (insn2 & 0xfff) + 1;
928 adjust -= imm;
929 if (csky_debug)
930 {
931 gdb_printf (gdb_stdlog,
932 "csky: subi r4,%d\n", imm);
933 }
934 }
935 else if (CSKY_32_IS_NOR4 (insn2))
936 {
937 adjust = ~adjust;
938 if (csky_debug)
939 {
940 gdb_printf (gdb_stdlog,
941 "csky: nor r4,r4,r4\n");
942 }
943 }
944 else if (CSKY_32_IS_ROTLI4 (insn2))
945 {
946 int imm = ((insn2 >> 21) & 0x1f);
947 int temp = adjust >> (32 - imm);
948 adjust <<= imm;
949 adjust |= temp;
950 if (csky_debug)
951 {
952 gdb_printf (gdb_stdlog,
953 "csky: rotli r4,r4,%d\n", imm);
954 }
955 }
956 else if (CSKY_32_IS_LISI4 (insn2))
957 {
958 int imm = ((insn2 >> 21) & 0x1f);
959 adjust <<= imm;
960 if (csky_debug)
961 {
962 gdb_printf (gdb_stdlog,
963 "csky: lsli r4,r4,%d\n", imm);
964 }
965 }
966 else if (CSKY_32_IS_BSETI4 (insn2))
967 {
968 int imm = ((insn2 >> 21) & 0x1f);
969 adjust |= (1 << imm);
970 if (csky_debug)
971 {
972 gdb_printf (gdb_stdlog,
973 "csky: bseti r4,r4 %d\n", imm);
974 }
975 }
976 else if (CSKY_32_IS_BCLRI4 (insn2))
977 {
978 int imm = ((insn2 >> 21) & 0x1f);
979 adjust &= ~(1 << imm);
980 if (csky_debug)
981 {
982 gdb_printf (gdb_stdlog,
983 "csky: bclri r4,r4 %d\n", imm);
984 }
985 }
986 else if (CSKY_32_IS_IXH4 (insn2))
987 {
988 adjust *= 3;
989 if (csky_debug)
990 {
991 gdb_printf (gdb_stdlog,
992 "csky: ixh r4,r4,r4\n");
993 }
994 }
995 else if (CSKY_32_IS_IXW4 (insn2))
996 {
997 adjust *= 5;
998 if (csky_debug)
999 {
1000 gdb_printf (gdb_stdlog,
1001 "csky: ixw r4,r4,r4\n");
1002 }
1003 }
1004 else if (CSKY_16_IS_ADDI4 (insn2))
1005 {
1006 int imm = (insn2 & 0xff) + 1;
1007 adjust += imm;
1008 if (csky_debug)
1009 {
1010 gdb_printf (gdb_stdlog,
1011 "csky: addi r4,%d\n", imm);
1012 }
1013 }
1014 else if (CSKY_16_IS_SUBI4 (insn2))
1015 {
1016 int imm = (insn2 & 0xff) + 1;
1017 adjust -= imm;
1018 if (csky_debug)
1019 {
1020 gdb_printf (gdb_stdlog,
1021 "csky: subi r4,%d\n", imm);
1022 }
1023 }
1024 else if (CSKY_16_IS_NOR4 (insn2))
1025 {
1026 adjust = ~adjust;
1027 if (csky_debug)
1028 {
1029 gdb_printf (gdb_stdlog,
1030 "csky: nor r4,r4\n");
1031 }
1032 }
1033 else if (CSKY_16_IS_BSETI4 (insn2))
1034 {
1035 int imm = (insn2 & 0x1f);
1036 adjust |= (1 << imm);
1037 if (csky_debug)
1038 {
1039 gdb_printf (gdb_stdlog,
1040 "csky: bseti r4, %d\n", imm);
1041 }
1042 }
1043 else if (CSKY_16_IS_BCLRI4 (insn2))
1044 {
1045 int imm = (insn2 & 0x1f);
1046 adjust &= ~(1 << imm);
1047 if (csky_debug)
1048 {
1049 gdb_printf (gdb_stdlog,
1050 "csky: bclri r4, %d\n", imm);
1051 }
1052 }
1053 else if (CSKY_16_IS_LSLI4 (insn2))
1054 {
1055 int imm = (insn2 & 0x1f);
1056 adjust <<= imm;
1057 if (csky_debug)
1058 {
1059 gdb_printf (gdb_stdlog,
1060 "csky: lsli r4,r4, %d\n", imm);
1061 }
1062 }
1063
1064 offset += insn_len;
1065 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1066 };
1067
1068 if (csky_debug)
1069 {
1070 gdb_printf (gdb_stdlog, "csky: done looking for"
1071 " r4 adjusters\n");
1072 }
1073
1074 /* If the next insn adjusts the stack pointer, we keep
1075 everything; if not, we scrap it and we've found the
1076 end of the prologue. */
1077 if (CSKY_IS_SUBU4 (insn2))
1078 {
1079 addr += offset;
1080 stacksize += adjust;
1081 if (csky_debug)
1082 {
1083 gdb_printf (gdb_stdlog,
1084 "csky: found stack adjustment of"
1085 " 0x%x bytes.\n", adjust);
1086 gdb_printf (gdb_stdlog,
1087 "csky: skipping to new address %s\n",
1088 core_addr_to_string_nz (addr));
1089 gdb_printf (gdb_stdlog,
1090 "csky: continuing\n");
1091 }
1092 continue;
1093 }
1094
1095 /* None of these instructions are prologue, so don't touch
1096 anything. */
1097 if (csky_debug)
1098 {
1099 gdb_printf (gdb_stdlog,
1100 "csky: no subu sp,sp,r4; NOT altering"
1101 " stacksize.\n");
1102 }
1103 break;
1104 }
1105 }
1106 else
1107 {
1108 /* insn_len != 4. */
1109
1110 /* subi.sp sp,disp. */
1111 if (CSKY_16_IS_SUBI0 (insn))
1112 {
1113 int offset = CSKY_16_SUBI_IMM (insn);
1114 if (csky_debug)
1115 {
1116 gdb_printf (gdb_stdlog,
1117 "csky: got subi r0,%d; continuing\n",
1118 offset);
1119 }
1120 stacksize += offset;
1121 continue;
1122 }
1123 /* stw.16 rz,(sp,disp). */
1124 else if (CSKY_16_IS_STWx0 (insn))
1125 {
1126 /* Spill register: see note for IS_STM above. */
1127 int disp;
1128
1129 rn = CSKY_16_ST_VAL_REGNUM (insn);
1130 disp = CSKY_16_ST_OFFSET (insn);
1131 register_offsets[rn] = stacksize - disp;
1132 if (csky_debug)
1133 print_savedreg_msg (rn, register_offsets, true);
1134 continue;
1135 }
1136 else if (CSKY_16_IS_MOV_FP_SP (insn))
1137 {
1138 /* SP is saved to FP reg, means prologue may modify SP. */
1139 is_fp_saved = 1;
1140 adjust_fp = stacksize;
1141 continue;
1142 }
1143 else if (CSKY_16_IS_PUSH (insn))
1144 {
1145 /* Push for 16_bit. */
1146 int offset = 0;
1147 if (CSKY_16_IS_PUSH_R15 (insn))
1148 {
1149 stacksize += 4;
1150 register_offsets[15] = stacksize;
1151 if (csky_debug)
1152 print_savedreg_msg (15, register_offsets, false);
1153 offset += 4;
1154 }
1155 if (CSKY_16_PUSH_LIST1 (insn))
1156 {
1157 int num = CSKY_16_PUSH_LIST1 (insn);
1158 int tmp = 0;
1159 stacksize += num * 4;
1160 offset += num * 4;
1161 if (csky_debug)
1162 {
1163 gdb_printf (gdb_stdlog,
1164 "csky: push regs_array: r4-r%d\n",
1165 4 + num - 1);
1166 }
1167 for (rn = 4; rn <= 4 + num - 1; rn++)
1168 {
1169 register_offsets[rn] = stacksize - tmp;
1170 if (csky_debug)
1171 {
1172 gdb_printf (gdb_stdlog,
1173 "csky: r%d saved at 0x%x"
1174 " (offset %d)\n", rn,
1175 register_offsets[rn], offset);
1176 }
1177 tmp += 4;
1178 }
1179 }
1180
1181 framesize = stacksize;
1182 if (csky_debug)
1183 gdb_printf (gdb_stdlog, "csky: continuing\n");
1184 continue;
1185 }
1186 else if (CSKY_16_IS_LRW4 (insn) || CSKY_16_IS_MOVI4 (insn))
1187 {
1188 int adjust = 0;
1189 unsigned int insn2;
1190
1191 if (csky_debug)
1192 {
1193 gdb_printf (gdb_stdlog,
1194 "csky: looking at large frame\n");
1195 }
1196 if (CSKY_16_IS_LRW4 (insn))
1197 {
1198 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1199 int offset = ((insn & 0x300) >> 3) | (insn & 0x1f);
1200 int literal_addr = (addr + ( offset << 2)) & 0xfffffffc;
1201 adjust = read_memory_unsigned_integer (literal_addr, 4,
1202 byte_order);
1203 }
1204 else
1205 {
1206 /* CSKY_16_IS_MOVI4 (insn). */
1207 adjust = (insn & 0xff);
1208 }
1209
1210 if (csky_debug)
1211 {
1212 gdb_printf (gdb_stdlog,
1213 "csky: base stacksize=0x%x\n", adjust);
1214 }
1215
1216 /* May have zero or more instructions which modify r4. */
1217 if (csky_debug)
1218 {
1219 gdb_printf (gdb_stdlog,
1220 "csky: looking for r4 adjusters...\n");
1221 }
1222 int offset = 2;
1223 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1224 while (CSKY_IS_R4_ADJUSTER (insn2))
1225 {
1226 if (CSKY_32_IS_ADDI4 (insn2))
1227 {
1228 int imm = (insn2 & 0xfff) + 1;
1229 adjust += imm;
1230 if (csky_debug)
1231 {
1232 gdb_printf (gdb_stdlog,
1233 "csky: addi r4,%d\n", imm);
1234 }
1235 }
1236 else if (CSKY_32_IS_SUBI4 (insn2))
1237 {
1238 int imm = (insn2 & 0xfff) + 1;
1239 adjust -= imm;
1240 if (csky_debug)
1241 {
1242 gdb_printf (gdb_stdlog,
1243 "csky: subi r4,%d\n", imm);
1244 }
1245 }
1246 else if (CSKY_32_IS_NOR4 (insn2))
1247 {
1248 adjust = ~adjust;
1249 if (csky_debug)
1250 {
1251 gdb_printf (gdb_stdlog,
1252 "csky: nor r4,r4,r4\n");
1253 }
1254 }
1255 else if (CSKY_32_IS_ROTLI4 (insn2))
1256 {
1257 int imm = ((insn2 >> 21) & 0x1f);
1258 int temp = adjust >> (32 - imm);
1259 adjust <<= imm;
1260 adjust |= temp;
1261 if (csky_debug)
1262 {
1263 gdb_printf (gdb_stdlog,
1264 "csky: rotli r4,r4,%d\n", imm);
1265 }
1266 }
1267 else if (CSKY_32_IS_LISI4 (insn2))
1268 {
1269 int imm = ((insn2 >> 21) & 0x1f);
1270 adjust <<= imm;
1271 if (csky_debug)
1272 {
1273 gdb_printf (gdb_stdlog,
1274 "csky: lsli r4,r4,%d\n", imm);
1275 }
1276 }
1277 else if (CSKY_32_IS_BSETI4 (insn2))
1278 {
1279 int imm = ((insn2 >> 21) & 0x1f);
1280 adjust |= (1 << imm);
1281 if (csky_debug)
1282 {
1283 gdb_printf (gdb_stdlog,
1284 "csky: bseti r4,r4 %d\n", imm);
1285 }
1286 }
1287 else if (CSKY_32_IS_BCLRI4 (insn2))
1288 {
1289 int imm = ((insn2 >> 21) & 0x1f);
1290 adjust &= ~(1 << imm);
1291 if (csky_debug)
1292 {
1293 gdb_printf (gdb_stdlog,
1294 "csky: bclri r4,r4 %d\n", imm);
1295 }
1296 }
1297 else if (CSKY_32_IS_IXH4 (insn2))
1298 {
1299 adjust *= 3;
1300 if (csky_debug)
1301 {
1302 gdb_printf (gdb_stdlog,
1303 "csky: ixh r4,r4,r4\n");
1304 }
1305 }
1306 else if (CSKY_32_IS_IXW4 (insn2))
1307 {
1308 adjust *= 5;
1309 if (csky_debug)
1310 {
1311 gdb_printf (gdb_stdlog,
1312 "csky: ixw r4,r4,r4\n");
1313 }
1314 }
1315 else if (CSKY_16_IS_ADDI4 (insn2))
1316 {
1317 int imm = (insn2 & 0xff) + 1;
1318 adjust += imm;
1319 if (csky_debug)
1320 {
1321 gdb_printf (gdb_stdlog,
1322 "csky: addi r4,%d\n", imm);
1323 }
1324 }
1325 else if (CSKY_16_IS_SUBI4 (insn2))
1326 {
1327 int imm = (insn2 & 0xff) + 1;
1328 adjust -= imm;
1329 if (csky_debug)
1330 {
1331 gdb_printf (gdb_stdlog,
1332 "csky: subi r4,%d\n", imm);
1333 }
1334 }
1335 else if (CSKY_16_IS_NOR4 (insn2))
1336 {
1337 adjust = ~adjust;
1338 if (csky_debug)
1339 {
1340 gdb_printf (gdb_stdlog,
1341 "csky: nor r4,r4\n");
1342 }
1343 }
1344 else if (CSKY_16_IS_BSETI4 (insn2))
1345 {
1346 int imm = (insn2 & 0x1f);
1347 adjust |= (1 << imm);
1348 if (csky_debug)
1349 {
1350 gdb_printf (gdb_stdlog,
1351 "csky: bseti r4, %d\n", imm);
1352 }
1353 }
1354 else if (CSKY_16_IS_BCLRI4 (insn2))
1355 {
1356 int imm = (insn2 & 0x1f);
1357 adjust &= ~(1 << imm);
1358 if (csky_debug)
1359 {
1360 gdb_printf (gdb_stdlog,
1361 "csky: bclri r4, %d\n", imm);
1362 }
1363 }
1364 else if (CSKY_16_IS_LSLI4 (insn2))
1365 {
1366 int imm = (insn2 & 0x1f);
1367 adjust <<= imm;
1368 if (csky_debug)
1369 {
1370 gdb_printf (gdb_stdlog,
1371 "csky: lsli r4,r4, %d\n", imm);
1372 }
1373 }
1374
1375 offset += insn_len;
1376 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1377 };
1378
1379 if (csky_debug)
1380 {
1381 gdb_printf (gdb_stdlog, "csky: "
1382 "done looking for r4 adjusters\n");
1383 }
1384
1385 /* If the next instruction adjusts the stack pointer, we keep
1386 everything; if not, we scrap it and we've found the end
1387 of the prologue. */
1388 if (CSKY_IS_SUBU4 (insn2))
1389 {
1390 addr += offset;
1391 stacksize += adjust;
1392 if (csky_debug)
1393 {
1394 gdb_printf (gdb_stdlog, "csky: "
1395 "found stack adjustment of 0x%x"
1396 " bytes.\n", adjust);
1397 gdb_printf (gdb_stdlog, "csky: "
1398 "skipping to new address %s\n",
1399 core_addr_to_string_nz (addr));
1400 gdb_printf (gdb_stdlog, "csky: continuing\n");
1401 }
1402 continue;
1403 }
1404
1405 /* None of these instructions are prologue, so don't touch
1406 anything. */
1407 if (csky_debug)
1408 {
1409 gdb_printf (gdb_stdlog, "csky: no subu sp,r4; "
1410 "NOT altering stacksize.\n");
1411 }
1412 break;
1413 }
1414 }
1415
1416 /* This is not a prologue instruction, so stop here. */
1417 if (csky_debug)
1418 {
1419 gdb_printf (gdb_stdlog, "csky: insn is not a prologue"
1420 " insn -- ending scan\n");
1421 }
1422 break;
1423 }
1424
1425 if (this_cache)
1426 {
1427 CORE_ADDR unwound_fp;
1428 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1429 this_cache->framesize = framesize;
1430
1431 if (is_fp_saved)
1432 {
1433 this_cache->framereg = CSKY_FP_REGNUM;
1434 unwound_fp = get_frame_register_unsigned (this_frame,
1435 this_cache->framereg);
1436 this_cache->prev_sp = unwound_fp + adjust_fp;
1437 }
1438 else
1439 {
1440 this_cache->framereg = CSKY_SP_REGNUM;
1441 unwound_fp = get_frame_register_unsigned (this_frame,
1442 this_cache->framereg);
1443 this_cache->prev_sp = unwound_fp + stacksize;
1444 }
1445
1446 /* Note where saved registers are stored. The offsets in
1447 REGISTER_OFFSETS are computed relative to the top of the frame. */
1448 for (rn = 0; rn < CSKY_NUM_GREGS; rn++)
1449 {
1450 if (register_offsets[rn] >= 0)
1451 {
1452 this_cache->saved_regs[rn].set_addr (this_cache->prev_sp
1453 - register_offsets[rn]);
1454 if (csky_debug)
1455 {
1456 CORE_ADDR rn_value = read_memory_unsigned_integer (
1457 this_cache->saved_regs[rn].addr (), 4, byte_order);
1458 gdb_printf (gdb_stdlog, "Saved register %s "
1459 "stored at 0x%08lx, value=0x%08lx\n",
1460 csky_register_names[rn],
1461 (unsigned long)
1462 this_cache->saved_regs[rn].addr (),
1463 (unsigned long) rn_value);
1464 }
1465 }
1466 }
1467 if (lr_type == LR_TYPE_EPC)
1468 {
1469 /* rte || epc . */
1470 this_cache->saved_regs[CSKY_PC_REGNUM]
1471 = this_cache->saved_regs[CSKY_EPC_REGNUM];
1472 }
1473 else if (lr_type == LR_TYPE_FPC)
1474 {
1475 /* rfi || fpc . */
1476 this_cache->saved_regs[CSKY_PC_REGNUM]
1477 = this_cache->saved_regs[CSKY_FPC_REGNUM];
1478 }
1479 else
1480 {
1481 this_cache->saved_regs[CSKY_PC_REGNUM]
1482 = this_cache->saved_regs[CSKY_LR_REGNUM];
1483 }
1484 }
1485
1486 return addr;
1487 }
1488
1489 /* Detect whether PC is at a point where the stack frame has been
1490 destroyed. */
1491
1492 static int
1493 csky_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1494 {
1495 unsigned int insn;
1496 CORE_ADDR addr;
1497 CORE_ADDR func_start, func_end;
1498
1499 if (!find_pc_partial_function (pc, NULL, &func_start, &func_end))
1500 return 0;
1501
1502 bool fp_saved = false;
1503 int insn_len;
1504 for (addr = func_start; addr < func_end; addr += insn_len)
1505 {
1506 /* Get next insn. */
1507 insn_len = csky_get_insn (gdbarch, addr, &insn);
1508
1509 if (insn_len == 2)
1510 {
1511 /* Is sp is saved to fp. */
1512 if (CSKY_16_IS_MOV_FP_SP (insn))
1513 fp_saved = true;
1514 /* If sp was saved to fp and now being restored from
1515 fp then it indicates the start of epilog. */
1516 else if (fp_saved && CSKY_16_IS_MOV_SP_FP (insn))
1517 return pc >= addr;
1518 }
1519 }
1520 return 0;
1521 }
1522
1523 /* Implement the skip_prologue gdbarch hook. */
1524
1525 static CORE_ADDR
1526 csky_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1527 {
1528 CORE_ADDR func_addr, func_end;
1529 const int default_search_limit = 128;
1530
1531 /* See if we can find the end of the prologue using the symbol table. */
1532 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
1533 {
1534 CORE_ADDR post_prologue_pc
1535 = skip_prologue_using_sal (gdbarch, func_addr);
1536
1537 if (post_prologue_pc != 0)
1538 return std::max (pc, post_prologue_pc);
1539 }
1540 else
1541 func_end = pc + default_search_limit;
1542
1543 /* Find the end of prologue. Default lr_type. */
1544 return csky_analyze_prologue (gdbarch, pc, func_end, func_end,
1545 NULL, NULL, LR_TYPE_R15);
1546 }
1547
1548 /* Implement the breakpoint_kind_from_pc gdbarch method. */
1549
1550 static int
1551 csky_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
1552 {
1553 if (csky_pc_is_csky16 (gdbarch, *pcptr))
1554 return CSKY_INSN_SIZE16;
1555 else
1556 return CSKY_INSN_SIZE32;
1557 }
1558
1559 /* Implement the sw_breakpoint_from_kind gdbarch method. */
1560
1561 static const gdb_byte *
1562 csky_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
1563 {
1564 *size = kind;
1565 if (kind == CSKY_INSN_SIZE16)
1566 {
1567 static gdb_byte csky_16_breakpoint[] = { 0, 0 };
1568 return csky_16_breakpoint;
1569 }
1570 else
1571 {
1572 static gdb_byte csky_32_breakpoint[] = { 0, 0, 0, 0 };
1573 return csky_32_breakpoint;
1574 }
1575 }
1576
1577 /* Implement the memory_insert_breakpoint gdbarch method. */
1578
1579 static int
1580 csky_memory_insert_breakpoint (struct gdbarch *gdbarch,
1581 struct bp_target_info *bp_tgt)
1582 {
1583 int val;
1584 const unsigned char *bp;
1585 gdb_byte bp_write_record1[] = { 0, 0, 0, 0 };
1586 gdb_byte bp_write_record2[] = { 0, 0, 0, 0 };
1587 gdb_byte bp_record[] = { 0, 0, 0, 0 };
1588
1589 /* Sanity-check bp_address. */
1590 if (bp_tgt->reqstd_address % 2)
1591 warning (_("Invalid breakpoint address 0x%x is an odd number."),
1592 (unsigned int) bp_tgt->reqstd_address);
1593 scoped_restore restore_memory
1594 = make_scoped_restore_show_memory_breakpoints (1);
1595
1596 /* Determine appropriate breakpoint_kind for this address. */
1597 bp_tgt->kind = csky_breakpoint_kind_from_pc (gdbarch,
1598 &bp_tgt->reqstd_address);
1599
1600 /* Save the memory contents. */
1601 bp_tgt->shadow_len = bp_tgt->kind;
1602
1603 /* Fill bp_tgt->placed_address. */
1604 bp_tgt->placed_address = bp_tgt->reqstd_address;
1605
1606 if (bp_tgt->kind == CSKY_INSN_SIZE16)
1607 {
1608 if ((bp_tgt->reqstd_address % 4) == 0)
1609 {
1610 /* Read two bytes. */
1611 val = target_read_memory (bp_tgt->reqstd_address,
1612 bp_tgt->shadow_contents, 2);
1613 if (val)
1614 return val;
1615
1616 /* Read two bytes. */
1617 val = target_read_memory (bp_tgt->reqstd_address + 2,
1618 bp_record, 2);
1619 if (val)
1620 return val;
1621
1622 /* Write the breakpoint. */
1623 bp_write_record1[2] = bp_record[0];
1624 bp_write_record1[3] = bp_record[1];
1625 bp = bp_write_record1;
1626 val = target_write_raw_memory (bp_tgt->reqstd_address, bp,
1627 CSKY_WR_BKPT_MODE);
1628 }
1629 else
1630 {
1631 val = target_read_memory (bp_tgt->reqstd_address,
1632 bp_tgt->shadow_contents, 2);
1633 if (val)
1634 return val;
1635
1636 val = target_read_memory (bp_tgt->reqstd_address - 2,
1637 bp_record, 2);
1638 if (val)
1639 return val;
1640
1641 /* Write the breakpoint. */
1642 bp_write_record1[0] = bp_record[0];
1643 bp_write_record1[1] = bp_record[1];
1644 bp = bp_write_record1;
1645 val = target_write_raw_memory (bp_tgt->reqstd_address - 2,
1646 bp, CSKY_WR_BKPT_MODE);
1647 }
1648 }
1649 else
1650 {
1651 if (bp_tgt->placed_address % 4 == 0)
1652 {
1653 val = target_read_memory (bp_tgt->reqstd_address,
1654 bp_tgt->shadow_contents,
1655 CSKY_WR_BKPT_MODE);
1656 if (val)
1657 return val;
1658
1659 /* Write the breakpoint. */
1660 bp = bp_write_record1;
1661 val = target_write_raw_memory (bp_tgt->reqstd_address,
1662 bp, CSKY_WR_BKPT_MODE);
1663 }
1664 else
1665 {
1666 val = target_read_memory (bp_tgt->reqstd_address,
1667 bp_tgt->shadow_contents,
1668 CSKY_WR_BKPT_MODE);
1669 if (val)
1670 return val;
1671
1672 val = target_read_memory (bp_tgt->reqstd_address - 2,
1673 bp_record, 2);
1674 if (val)
1675 return val;
1676
1677 val = target_read_memory (bp_tgt->reqstd_address + 4,
1678 bp_record + 2, 2);
1679 if (val)
1680 return val;
1681
1682 bp_write_record1[0] = bp_record[0];
1683 bp_write_record1[1] = bp_record[1];
1684 bp_write_record2[2] = bp_record[2];
1685 bp_write_record2[3] = bp_record[3];
1686
1687 /* Write the breakpoint. */
1688 bp = bp_write_record1;
1689 val = target_write_raw_memory (bp_tgt->reqstd_address - 2, bp,
1690 CSKY_WR_BKPT_MODE);
1691 if (val)
1692 return val;
1693
1694 /* Write the breakpoint. */
1695 bp = bp_write_record2;
1696 val = target_write_raw_memory (bp_tgt->reqstd_address + 2, bp,
1697 CSKY_WR_BKPT_MODE);
1698 }
1699 }
1700 return val;
1701 }
1702
1703 /* Restore the breakpoint shadow_contents to the target. */
1704
1705 static int
1706 csky_memory_remove_breakpoint (struct gdbarch *gdbarch,
1707 struct bp_target_info *bp_tgt)
1708 {
1709 int val;
1710 gdb_byte bp_record[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
1711 /* Different for shadow_len 2 or 4. */
1712 if (bp_tgt->shadow_len == 2)
1713 {
1714 /* Do word-sized writes on word-aligned boundaries and read
1715 padding bytes as necessary. */
1716 if (bp_tgt->reqstd_address % 4 == 0)
1717 {
1718 val = target_read_memory (bp_tgt->reqstd_address + 2,
1719 bp_record + 2, 2);
1720 if (val)
1721 return val;
1722 bp_record[0] = bp_tgt->shadow_contents[0];
1723 bp_record[1] = bp_tgt->shadow_contents[1];
1724 return target_write_raw_memory (bp_tgt->reqstd_address,
1725 bp_record, CSKY_WR_BKPT_MODE);
1726 }
1727 else
1728 {
1729 val = target_read_memory (bp_tgt->reqstd_address - 2,
1730 bp_record, 2);
1731 if (val)
1732 return val;
1733 bp_record[2] = bp_tgt->shadow_contents[0];
1734 bp_record[3] = bp_tgt->shadow_contents[1];
1735 return target_write_raw_memory (bp_tgt->reqstd_address - 2,
1736 bp_record, CSKY_WR_BKPT_MODE);
1737 }
1738 }
1739 else
1740 {
1741 /* Do word-sized writes on word-aligned boundaries and read
1742 padding bytes as necessary. */
1743 if (bp_tgt->placed_address % 4 == 0)
1744 {
1745 return target_write_raw_memory (bp_tgt->reqstd_address,
1746 bp_tgt->shadow_contents,
1747 CSKY_WR_BKPT_MODE);
1748 }
1749 else
1750 {
1751 val = target_read_memory (bp_tgt->reqstd_address - 2,
1752 bp_record, 2);
1753 if (val)
1754 return val;
1755 val = target_read_memory (bp_tgt->reqstd_address + 4,
1756 bp_record+6, 2);
1757 if (val)
1758 return val;
1759
1760 bp_record[2] = bp_tgt->shadow_contents[0];
1761 bp_record[3] = bp_tgt->shadow_contents[1];
1762 bp_record[4] = bp_tgt->shadow_contents[2];
1763 bp_record[5] = bp_tgt->shadow_contents[3];
1764
1765 return target_write_raw_memory (bp_tgt->reqstd_address - 2,
1766 bp_record,
1767 CSKY_WR_BKPT_MODE * 2);
1768 }
1769 }
1770 }
1771
1772 /* Determine link register type. */
1773
1774 static lr_type_t
1775 csky_analyze_lr_type (struct gdbarch *gdbarch,
1776 CORE_ADDR start_pc, CORE_ADDR end_pc)
1777 {
1778 CORE_ADDR addr;
1779 unsigned int insn, insn_len;
1780 insn_len = 2;
1781
1782 for (addr = start_pc; addr < end_pc; addr += insn_len)
1783 {
1784 insn_len = csky_get_insn (gdbarch, addr, &insn);
1785 if (insn_len == 4)
1786 {
1787 if (CSKY_32_IS_MFCR_EPSR (insn) || CSKY_32_IS_MFCR_EPC (insn)
1788 || CSKY_32_IS_RTE (insn))
1789 return LR_TYPE_EPC;
1790 }
1791 else if (CSKY_32_IS_MFCR_FPSR (insn) || CSKY_32_IS_MFCR_FPC (insn)
1792 || CSKY_32_IS_RFI (insn))
1793 return LR_TYPE_FPC;
1794 else if (CSKY_32_IS_JMP (insn) || CSKY_32_IS_BR (insn)
1795 || CSKY_32_IS_JMPIX (insn) || CSKY_32_IS_JMPI (insn))
1796 return LR_TYPE_R15;
1797 else
1798 {
1799 /* 16 bit instruction. */
1800 if (CSKY_16_IS_JMP (insn) || CSKY_16_IS_BR (insn)
1801 || CSKY_16_IS_JMPIX (insn))
1802 return LR_TYPE_R15;
1803 }
1804 }
1805 return LR_TYPE_R15;
1806 }
1807
1808 /* Heuristic unwinder. */
1809
1810 static struct csky_unwind_cache *
1811 csky_frame_unwind_cache (struct frame_info *this_frame)
1812 {
1813 CORE_ADDR prologue_start, prologue_end, func_end, prev_pc, block_addr;
1814 struct csky_unwind_cache *cache;
1815 const struct block *bl;
1816 unsigned long func_size = 0;
1817 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1818 unsigned int sp_regnum = CSKY_SP_REGNUM;
1819
1820 /* Default lr type is r15. */
1821 lr_type_t lr_type = LR_TYPE_R15;
1822
1823 cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
1824 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1825
1826 /* Assume there is no frame until proven otherwise. */
1827 cache->framereg = sp_regnum;
1828
1829 cache->framesize = 0;
1830
1831 prev_pc = get_frame_pc (this_frame);
1832 block_addr = get_frame_address_in_block (this_frame);
1833 if (find_pc_partial_function (block_addr, NULL, &prologue_start,
1834 &func_end) == 0)
1835 /* We couldn't find a function containing block_addr, so bail out
1836 and hope for the best. */
1837 return cache;
1838
1839 /* Get the (function) symbol matching prologue_start. */
1840 bl = block_for_pc (prologue_start);
1841 if (bl != NULL)
1842 func_size = bl->end () - bl->start ();
1843 else
1844 {
1845 struct bound_minimal_symbol msymbol
1846 = lookup_minimal_symbol_by_pc (prologue_start);
1847 if (msymbol.minsym != NULL)
1848 func_size = msymbol.minsym->size ();
1849 }
1850
1851 /* If FUNC_SIZE is 0 we may have a special-case use of lr
1852 e.g. exception or interrupt. */
1853 if (func_size == 0)
1854 lr_type = csky_analyze_lr_type (gdbarch, prologue_start, func_end);
1855
1856 prologue_end = std::min (func_end, prev_pc);
1857
1858 /* Analyze the function prologue. */
1859 csky_analyze_prologue (gdbarch, prologue_start, prologue_end,
1860 func_end, this_frame, cache, lr_type);
1861
1862 /* gdbarch_sp_regnum contains the value and not the address. */
1863 cache->saved_regs[sp_regnum].set_value (cache->prev_sp);
1864 return cache;
1865 }
1866
1867 /* Implement the this_id function for the normal unwinder. */
1868
1869 static void
1870 csky_frame_this_id (struct frame_info *this_frame,
1871 void **this_prologue_cache, struct frame_id *this_id)
1872 {
1873 struct csky_unwind_cache *cache;
1874 struct frame_id id;
1875
1876 if (*this_prologue_cache == NULL)
1877 *this_prologue_cache = csky_frame_unwind_cache (this_frame);
1878 cache = (struct csky_unwind_cache *) *this_prologue_cache;
1879
1880 /* This marks the outermost frame. */
1881 if (cache->prev_sp == 0)
1882 return;
1883
1884 id = frame_id_build (cache->prev_sp, get_frame_func (this_frame));
1885 *this_id = id;
1886 }
1887
1888 /* Implement the prev_register function for the normal unwinder. */
1889
1890 static struct value *
1891 csky_frame_prev_register (struct frame_info *this_frame,
1892 void **this_prologue_cache, int regnum)
1893 {
1894 struct csky_unwind_cache *cache;
1895
1896 if (*this_prologue_cache == NULL)
1897 *this_prologue_cache = csky_frame_unwind_cache (this_frame);
1898 cache = (struct csky_unwind_cache *) *this_prologue_cache;
1899
1900 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
1901 regnum);
1902 }
1903
1904 /* Data structures for the normal prologue-analysis-based
1905 unwinder. */
1906
1907 static const struct frame_unwind csky_unwind_cache = {
1908 "cski prologue",
1909 NORMAL_FRAME,
1910 default_frame_unwind_stop_reason,
1911 csky_frame_this_id,
1912 csky_frame_prev_register,
1913 NULL,
1914 default_frame_sniffer,
1915 NULL,
1916 NULL
1917 };
1918
1919
1920
1921 static int
1922 csky_stub_unwind_sniffer (const struct frame_unwind *self,
1923 struct frame_info *this_frame,
1924 void **this_prologue_cache)
1925 {
1926 CORE_ADDR addr_in_block;
1927
1928 addr_in_block = get_frame_address_in_block (this_frame);
1929
1930 if (find_pc_partial_function (addr_in_block, NULL, NULL, NULL) == 0
1931 || in_plt_section (addr_in_block))
1932 return 1;
1933
1934 return 0;
1935 }
1936
1937 static struct csky_unwind_cache *
1938 csky_make_stub_cache (struct frame_info *this_frame)
1939 {
1940 struct csky_unwind_cache *cache;
1941
1942 cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
1943 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1944 cache->prev_sp = get_frame_register_unsigned (this_frame, CSKY_SP_REGNUM);
1945
1946 return cache;
1947 }
1948
1949 static void
1950 csky_stub_this_id (struct frame_info *this_frame,
1951 void **this_cache,
1952 struct frame_id *this_id)
1953 {
1954 struct csky_unwind_cache *cache;
1955
1956 if (*this_cache == NULL)
1957 *this_cache = csky_make_stub_cache (this_frame);
1958 cache = (struct csky_unwind_cache *) *this_cache;
1959
1960 /* Our frame ID for a stub frame is the current SP and LR. */
1961 *this_id = frame_id_build (cache->prev_sp, get_frame_pc (this_frame));
1962 }
1963
1964 static struct value *
1965 csky_stub_prev_register (struct frame_info *this_frame,
1966 void **this_cache,
1967 int prev_regnum)
1968 {
1969 struct csky_unwind_cache *cache;
1970
1971 if (*this_cache == NULL)
1972 *this_cache = csky_make_stub_cache (this_frame);
1973 cache = (struct csky_unwind_cache *) *this_cache;
1974
1975 /* If we are asked to unwind the PC, then return the LR. */
1976 if (prev_regnum == CSKY_PC_REGNUM)
1977 {
1978 CORE_ADDR lr;
1979
1980 lr = frame_unwind_register_unsigned (this_frame, CSKY_LR_REGNUM);
1981 return frame_unwind_got_constant (this_frame, prev_regnum, lr);
1982 }
1983
1984 if (prev_regnum == CSKY_SP_REGNUM)
1985 return frame_unwind_got_constant (this_frame, prev_regnum, cache->prev_sp);
1986
1987 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
1988 prev_regnum);
1989 }
1990
1991 static frame_unwind csky_stub_unwind = {
1992 "csky stub",
1993 NORMAL_FRAME,
1994 default_frame_unwind_stop_reason,
1995 csky_stub_this_id,
1996 csky_stub_prev_register,
1997 NULL,
1998 csky_stub_unwind_sniffer
1999 };
2000
2001 /* Implement the this_base, this_locals, and this_args hooks
2002 for the normal unwinder. */
2003
2004 static CORE_ADDR
2005 csky_frame_base_address (struct frame_info *this_frame, void **this_cache)
2006 {
2007 struct csky_unwind_cache *cache;
2008
2009 if (*this_cache == NULL)
2010 *this_cache = csky_frame_unwind_cache (this_frame);
2011 cache = (struct csky_unwind_cache *) *this_cache;
2012
2013 return cache->prev_sp - cache->framesize;
2014 }
2015
2016 static const struct frame_base csky_frame_base = {
2017 &csky_unwind_cache,
2018 csky_frame_base_address,
2019 csky_frame_base_address,
2020 csky_frame_base_address
2021 };
2022
2023 /* Initialize register access method. */
2024
2025 static void
2026 csky_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2027 struct dwarf2_frame_state_reg *reg,
2028 struct frame_info *this_frame)
2029 {
2030 if (regnum == gdbarch_pc_regnum (gdbarch))
2031 reg->how = DWARF2_FRAME_REG_RA;
2032 else if (regnum == gdbarch_sp_regnum (gdbarch))
2033 reg->how = DWARF2_FRAME_REG_CFA;
2034 }
2035
2036 /* Create csky register groups. */
2037
2038 static void
2039 csky_init_reggroup ()
2040 {
2041 cr_reggroup = reggroup_new ("cr", USER_REGGROUP);
2042 fr_reggroup = reggroup_new ("fr", USER_REGGROUP);
2043 vr_reggroup = reggroup_new ("vr", USER_REGGROUP);
2044 mmu_reggroup = reggroup_new ("mmu", USER_REGGROUP);
2045 prof_reggroup = reggroup_new ("profiling", USER_REGGROUP);
2046 }
2047
2048 /* Add register groups into reggroup list. */
2049
2050 static void
2051 csky_add_reggroups (struct gdbarch *gdbarch)
2052 {
2053 reggroup_add (gdbarch, cr_reggroup);
2054 reggroup_add (gdbarch, fr_reggroup);
2055 reggroup_add (gdbarch, vr_reggroup);
2056 reggroup_add (gdbarch, mmu_reggroup);
2057 reggroup_add (gdbarch, prof_reggroup);
2058 }
2059
2060 /* Return the groups that a CSKY register can be categorised into. */
2061
2062 static int
2063 csky_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
2064 const struct reggroup *reggroup)
2065 {
2066 int raw_p;
2067
2068 if (gdbarch_register_name (gdbarch, regnum) == NULL
2069 || gdbarch_register_name (gdbarch, regnum)[0] == '\0')
2070 return 0;
2071
2072 if (reggroup == all_reggroup)
2073 return 1;
2074
2075 raw_p = regnum < gdbarch_num_regs (gdbarch);
2076 if (reggroup == save_reggroup || reggroup == restore_reggroup)
2077 return raw_p;
2078
2079 if (((regnum >= CSKY_R0_REGNUM) && (regnum <= CSKY_R0_REGNUM + 31))
2080 && (reggroup == general_reggroup))
2081 return 1;
2082
2083 if (((regnum == CSKY_PC_REGNUM)
2084 || ((regnum >= CSKY_CR0_REGNUM)
2085 && (regnum <= CSKY_CR0_REGNUM + 30)))
2086 && (reggroup == cr_reggroup))
2087 return 2;
2088
2089 if ((((regnum >= CSKY_VR0_REGNUM) && (regnum <= CSKY_VR0_REGNUM + 15))
2090 || ((regnum >= CSKY_VCR0_REGNUM)
2091 && (regnum <= CSKY_VCR0_REGNUM + 2)))
2092 && (reggroup == vr_reggroup))
2093 return 3;
2094
2095 if (((regnum >= CSKY_MMU_REGNUM) && (regnum <= CSKY_MMU_REGNUM + 8))
2096 && (reggroup == mmu_reggroup))
2097 return 4;
2098
2099 if (((regnum >= CSKY_PROFCR_REGNUM)
2100 && (regnum <= CSKY_PROFCR_REGNUM + 48))
2101 && (reggroup == prof_reggroup))
2102 return 5;
2103
2104 if ((((regnum >= CSKY_FR0_REGNUM) && (regnum <= CSKY_FR0_REGNUM + 15))
2105 || ((regnum >= CSKY_VCR0_REGNUM) && (regnum <= CSKY_VCR0_REGNUM + 2)))
2106 && (reggroup == fr_reggroup))
2107 return 6;
2108
2109 return 0;
2110 }
2111
2112 /* Implement the dwarf2_reg_to_regnum gdbarch method. */
2113
2114 static int
2115 csky_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int dw_reg)
2116 {
2117 if (dw_reg < 0 || dw_reg >= CSKY_NUM_REGS)
2118 return -1;
2119 return dw_reg;
2120 }
2121
2122 /* Override interface for command: info register. */
2123
2124 static void
2125 csky_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
2126 struct frame_info *frame, int regnum, int all)
2127 {
2128 /* Call default print_registers_info function. */
2129 default_print_registers_info (gdbarch, file, frame, regnum, all);
2130
2131 /* For command: info register. */
2132 if (regnum == -1 && all == 0)
2133 {
2134 default_print_registers_info (gdbarch, file, frame,
2135 CSKY_PC_REGNUM, 0);
2136 default_print_registers_info (gdbarch, file, frame,
2137 CSKY_EPC_REGNUM, 0);
2138 default_print_registers_info (gdbarch, file, frame,
2139 CSKY_CR0_REGNUM, 0);
2140 default_print_registers_info (gdbarch, file, frame,
2141 CSKY_EPSR_REGNUM, 0);
2142 }
2143 return;
2144 }
2145
2146 /* Initialize the current architecture based on INFO. If possible,
2147 re-use an architecture from ARCHES, which is a list of
2148 architectures already created during this debugging session.
2149
2150 Called at program startup, when reading a core file, and when
2151 reading a binary file. */
2152
2153 static struct gdbarch *
2154 csky_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2155 {
2156 struct gdbarch *gdbarch;
2157
2158 /* Find a candidate among the list of pre-declared architectures. */
2159 arches = gdbarch_list_lookup_by_info (arches, &info);
2160 if (arches != NULL)
2161 return arches->gdbarch;
2162
2163 /* None found, create a new architecture from the information
2164 provided. */
2165 csky_gdbarch_tdep *tdep = new csky_gdbarch_tdep;
2166 gdbarch = gdbarch_alloc (&info, tdep);
2167
2168 /* Target data types. */
2169 set_gdbarch_ptr_bit (gdbarch, 32);
2170 set_gdbarch_addr_bit (gdbarch, 32);
2171 set_gdbarch_short_bit (gdbarch, 16);
2172 set_gdbarch_int_bit (gdbarch, 32);
2173 set_gdbarch_long_bit (gdbarch, 32);
2174 set_gdbarch_long_long_bit (gdbarch, 64);
2175 set_gdbarch_float_bit (gdbarch, 32);
2176 set_gdbarch_double_bit (gdbarch, 64);
2177 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
2178 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
2179
2180 /* Information about the target architecture. */
2181 set_gdbarch_return_value (gdbarch, csky_return_value);
2182 set_gdbarch_breakpoint_kind_from_pc (gdbarch, csky_breakpoint_kind_from_pc);
2183 set_gdbarch_sw_breakpoint_from_kind (gdbarch, csky_sw_breakpoint_from_kind);
2184
2185 /* Register architecture. */
2186 set_gdbarch_num_regs (gdbarch, CSKY_NUM_REGS);
2187 set_gdbarch_pc_regnum (gdbarch, CSKY_PC_REGNUM);
2188 set_gdbarch_sp_regnum (gdbarch, CSKY_SP_REGNUM);
2189 set_gdbarch_register_name (gdbarch, csky_register_name);
2190 set_gdbarch_register_type (gdbarch, csky_register_type);
2191 set_gdbarch_read_pc (gdbarch, csky_read_pc);
2192 set_gdbarch_write_pc (gdbarch, csky_write_pc);
2193 set_gdbarch_print_registers_info (gdbarch, csky_print_registers_info);
2194 csky_add_reggroups (gdbarch);
2195 set_gdbarch_register_reggroup_p (gdbarch, csky_register_reggroup_p);
2196 set_gdbarch_stab_reg_to_regnum (gdbarch, csky_dwarf_reg_to_regnum);
2197 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, csky_dwarf_reg_to_regnum);
2198 dwarf2_frame_set_init_reg (gdbarch, csky_dwarf2_frame_init_reg);
2199
2200 /* Functions to analyze frames. */
2201 frame_base_set_default (gdbarch, &csky_frame_base);
2202 set_gdbarch_skip_prologue (gdbarch, csky_skip_prologue);
2203 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2204 set_gdbarch_frame_align (gdbarch, csky_frame_align);
2205 set_gdbarch_stack_frame_destroyed_p (gdbarch, csky_stack_frame_destroyed_p);
2206
2207 /* Functions handling dummy frames. */
2208 set_gdbarch_push_dummy_call (gdbarch, csky_push_dummy_call);
2209
2210 /* Frame unwinders. Use DWARF debug info if available,
2211 otherwise use our own unwinder. */
2212 dwarf2_append_unwinders (gdbarch);
2213 frame_unwind_append_unwinder (gdbarch, &csky_stub_unwind);
2214 frame_unwind_append_unwinder (gdbarch, &csky_unwind_cache);
2215
2216 /* Breakpoints. */
2217 set_gdbarch_memory_insert_breakpoint (gdbarch,
2218 csky_memory_insert_breakpoint);
2219 set_gdbarch_memory_remove_breakpoint (gdbarch,
2220 csky_memory_remove_breakpoint);
2221
2222 /* Hook in ABI-specific overrides, if they have been registered. */
2223 gdbarch_init_osabi (info, gdbarch);
2224
2225 /* Support simple overlay manager. */
2226 set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
2227 set_gdbarch_char_signed (gdbarch, 0);
2228 return gdbarch;
2229 }
2230
2231 void _initialize_csky_tdep ();
2232 void
2233 _initialize_csky_tdep ()
2234 {
2235
2236 register_gdbarch_init (bfd_arch_csky, csky_gdbarch_init);
2237
2238 csky_init_reggroup ();
2239
2240 /* Allow debugging this file's internals. */
2241 add_setshow_boolean_cmd ("csky", class_maintenance, &csky_debug,
2242 _("Set C-Sky debugging."),
2243 _("Show C-Sky debugging."),
2244 _("When on, C-Sky specific debugging is enabled."),
2245 NULL,
2246 NULL,
2247 &setdebuglist, &showdebuglist);
2248 }