1 /* Target-dependent code for Mitsubishi D10V, for GDB.
2 Copyright (C) 1996, 1997, 2000 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* Contributed by Martin Hunt, hunt@cygnus.com */
30 #include "gdb_string.h"
37 #include "arch-utils.h"
42 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
44 struct frame_extra_info
55 unsigned long (*dmap_register
) (int nr
);
56 unsigned long (*imap_register
) (int nr
);
57 int (*register_sim_regno
) (int nr
);
60 /* These are the addresses the D10V-EVA board maps data and
61 instruction memory to. */
63 #define DMEM_START 0x2000000
64 #define IMEM_START 0x1000000
65 #define STACK_START 0x0007ffe
67 /* d10v register names. */
77 #define NR_DMAP_REGS (gdbarch_tdep (current_gdbarch)->nr_dmap_regs)
78 #define A0_REGNUM (gdbarch_tdep (current_gdbarch)->a0_regnum)
80 /* d10v calling convention. */
82 #define ARG1_REGNUM R0_REGNUM
84 #define RET1_REGNUM R0_REGNUM
88 extern void _initialize_d10v_tdep
PARAMS ((void));
90 static void d10v_eva_prepare_to_trace
PARAMS ((void));
92 static void d10v_eva_get_trace_data
PARAMS ((void));
94 static int prologue_find_regs
PARAMS ((unsigned short op
, struct frame_info
* fi
, CORE_ADDR addr
));
96 extern void d10v_frame_init_saved_regs
PARAMS ((struct frame_info
*));
98 static void do_d10v_pop_frame
PARAMS ((struct frame_info
* fi
));
101 d10v_frame_chain_valid (chain
, frame
)
103 struct frame_info
*frame
; /* not used here */
105 return ((chain
) != 0 && (frame
) != 0 && (frame
)->pc
> IMEM_START
);
109 d10v_stack_align (CORE_ADDR len
)
111 return (len
+ 1) & ~1;
114 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
115 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
116 and TYPE is the type (which is known to be struct, union or array).
118 The d10v returns anything less than 8 bytes in size in
122 d10v_use_struct_convention (gcc_p
, type
)
126 return (TYPE_LENGTH (type
) > 8);
131 d10v_breakpoint_from_pc (pcptr
, lenptr
)
135 static unsigned char breakpoint
[] =
136 {0x2f, 0x90, 0x5e, 0x00};
137 *lenptr
= sizeof (breakpoint
);
141 /* Map the REG_NR onto an ascii name. Return NULL or an empty string
142 when the reg_nr isn't valid. */
146 TS2_IMAP0_REGNUM
= 32,
147 TS2_DMAP_REGNUM
= 34,
148 TS2_NR_DMAP_REGS
= 1,
153 d10v_ts2_register_name (int reg_nr
)
155 static char *register_names
[] =
157 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
158 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
159 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
160 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
161 "imap0", "imap1", "dmap", "a0", "a1"
165 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
167 return register_names
[reg_nr
];
172 TS3_IMAP0_REGNUM
= 36,
173 TS3_DMAP0_REGNUM
= 38,
174 TS3_NR_DMAP_REGS
= 4,
179 d10v_ts3_register_name (int reg_nr
)
181 static char *register_names
[] =
183 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
184 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
185 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
186 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
190 "dmap0", "dmap1", "dmap2", "dmap3"
194 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
196 return register_names
[reg_nr
];
199 /* Access the DMAP/IMAP registers in a target independant way. */
202 d10v_ts2_dmap_register (int reg_nr
)
210 return read_register (TS2_DMAP_REGNUM
);
217 d10v_ts3_dmap_register (int reg_nr
)
219 return read_register (TS3_DMAP0_REGNUM
+ reg_nr
);
223 d10v_dmap_register (int reg_nr
)
225 return gdbarch_tdep (current_gdbarch
)->dmap_register (reg_nr
);
229 d10v_ts2_imap_register (int reg_nr
)
231 return read_register (TS2_IMAP0_REGNUM
+ reg_nr
);
235 d10v_ts3_imap_register (int reg_nr
)
237 return read_register (TS3_IMAP0_REGNUM
+ reg_nr
);
241 d10v_imap_register (int reg_nr
)
243 return gdbarch_tdep (current_gdbarch
)->imap_register (reg_nr
);
246 /* MAP GDB's internal register numbering (determined by the layout fo
247 the REGISTER_BYTE array) onto the simulator's register
251 d10v_ts2_register_sim_regno (int nr
)
253 if (nr
>= TS2_IMAP0_REGNUM
254 && nr
< TS2_IMAP0_REGNUM
+ NR_IMAP_REGS
)
255 return nr
- TS2_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
256 if (nr
== TS2_DMAP_REGNUM
)
257 return nr
- TS2_DMAP_REGNUM
+ SIM_D10V_TS2_DMAP_REGNUM
;
258 if (nr
>= TS2_A0_REGNUM
259 && nr
< TS2_A0_REGNUM
+ NR_A_REGS
)
260 return nr
- TS2_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
265 d10v_ts3_register_sim_regno (int nr
)
267 if (nr
>= TS3_IMAP0_REGNUM
268 && nr
< TS3_IMAP0_REGNUM
+ NR_IMAP_REGS
)
269 return nr
- TS3_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
270 if (nr
>= TS3_DMAP0_REGNUM
271 && nr
< TS3_DMAP0_REGNUM
+ TS3_NR_DMAP_REGS
)
272 return nr
- TS3_DMAP0_REGNUM
+ SIM_D10V_DMAP0_REGNUM
;
273 if (nr
>= TS3_A0_REGNUM
274 && nr
< TS3_A0_REGNUM
+ NR_A_REGS
)
275 return nr
- TS3_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
280 d10v_register_sim_regno (int nr
)
282 return gdbarch_tdep (current_gdbarch
)->register_sim_regno (nr
);
285 /* Index within `registers' of the first byte of the space for
289 d10v_register_byte (reg_nr
)
292 if (reg_nr
< A0_REGNUM
)
294 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
295 return (A0_REGNUM
* 2
296 + (reg_nr
- A0_REGNUM
) * 8);
298 return (A0_REGNUM
* 2
300 + (reg_nr
- A0_REGNUM
- NR_A_REGS
) * 2);
303 /* Number of bytes of storage in the actual machine representation for
307 d10v_register_raw_size (reg_nr
)
310 if (reg_nr
< A0_REGNUM
)
312 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
318 /* Number of bytes of storage in the program's representation
322 d10v_register_virtual_size (reg_nr
)
325 return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (reg_nr
));
328 /* Return the GDB type object for the "standard" data type
329 of data in register N. */
332 d10v_register_virtual_type (reg_nr
)
335 if (reg_nr
>= A0_REGNUM
336 && reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
337 return builtin_type_int64
;
338 else if (reg_nr
== PC_REGNUM
339 || reg_nr
== SP_REGNUM
)
340 return builtin_type_int32
;
342 return builtin_type_int16
;
345 /* convert $pc and $sp to/from virtual addresses */
347 d10v_register_convertible (nr
)
350 return ((nr
) == PC_REGNUM
|| (nr
) == SP_REGNUM
);
354 d10v_register_convert_to_virtual (regnum
, type
, from
, to
)
360 ULONGEST x
= extract_unsigned_integer (from
, REGISTER_RAW_SIZE (regnum
));
361 if (regnum
== PC_REGNUM
)
362 x
= (x
<< 2) | IMEM_START
;
365 store_unsigned_integer (to
, TYPE_LENGTH (type
), x
);
369 d10v_register_convert_to_raw (type
, regnum
, from
, to
)
375 ULONGEST x
= extract_unsigned_integer (from
, TYPE_LENGTH (type
));
377 if (regnum
== PC_REGNUM
)
379 store_unsigned_integer (to
, 2, x
);
387 return ((x
) | DMEM_START
);
394 return (((x
) << 2) | IMEM_START
);
401 return (((x
) & 0x3000000) == DMEM_START
);
408 return (((x
) & 0x3000000) == IMEM_START
);
413 d10v_convert_iaddr_to_raw (x
)
416 return (((x
) >> 2) & 0xffff);
420 d10v_convert_daddr_to_raw (x
)
423 return ((x
) & 0xffff);
426 /* Store the address of the place in which to copy the structure the
427 subroutine will return. This is called from call_function.
429 We store structs through a pointer passed in the first Argument
433 d10v_store_struct_return (addr
, sp
)
437 write_register (ARG1_REGNUM
, (addr
));
440 /* Write into appropriate registers a function return value
441 of type TYPE, given in virtual format.
443 Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
446 d10v_store_return_value (type
, valbuf
)
450 write_register_bytes (REGISTER_BYTE (RET1_REGNUM
),
455 /* Extract from an array REGBUF containing the (raw) register state
456 the address in which a function should return its structure value,
457 as a CORE_ADDR (or an expression that can be used as one). */
460 d10v_extract_struct_value_address (regbuf
)
463 return (extract_address ((regbuf
) + REGISTER_BYTE (ARG1_REGNUM
),
464 REGISTER_RAW_SIZE (ARG1_REGNUM
))
469 d10v_frame_saved_pc (frame
)
470 struct frame_info
*frame
;
472 return ((frame
)->extra_info
->return_pc
);
476 d10v_frame_args_address (fi
)
477 struct frame_info
*fi
;
483 d10v_frame_locals_address (fi
)
484 struct frame_info
*fi
;
489 /* Immediately after a function call, return the saved pc. We can't
490 use frame->return_pc beause that is determined by reading R13 off
491 the stack and that may not be written yet. */
494 d10v_saved_pc_after_call (frame
)
495 struct frame_info
*frame
;
497 return ((read_register (LR_REGNUM
) << 2)
501 /* Discard from the stack the innermost frame, restoring all saved
507 generic_pop_current_frame (do_d10v_pop_frame
);
511 do_d10v_pop_frame (fi
)
512 struct frame_info
*fi
;
519 /* fill out fsr with the address of where each */
520 /* register was stored in the frame */
521 d10v_frame_init_saved_regs (fi
);
523 /* now update the current registers with the old values */
524 for (regnum
= A0_REGNUM
; regnum
< A0_REGNUM
+ NR_A_REGS
; regnum
++)
526 if (fi
->saved_regs
[regnum
])
528 read_memory (fi
->saved_regs
[regnum
], raw_buffer
, REGISTER_RAW_SIZE (regnum
));
529 write_register_bytes (REGISTER_BYTE (regnum
), raw_buffer
, REGISTER_RAW_SIZE (regnum
));
532 for (regnum
= 0; regnum
< SP_REGNUM
; regnum
++)
534 if (fi
->saved_regs
[regnum
])
536 write_register (regnum
, read_memory_unsigned_integer (fi
->saved_regs
[regnum
], REGISTER_RAW_SIZE (regnum
)));
539 if (fi
->saved_regs
[PSW_REGNUM
])
541 write_register (PSW_REGNUM
, read_memory_unsigned_integer (fi
->saved_regs
[PSW_REGNUM
], REGISTER_RAW_SIZE (PSW_REGNUM
)));
544 write_register (PC_REGNUM
, read_register (LR_REGNUM
));
545 write_register (SP_REGNUM
, fp
+ fi
->extra_info
->size
);
546 target_store_registers (-1);
547 flush_cached_frames ();
555 if ((op
& 0x7E1F) == 0x6C1F)
559 if ((op
& 0x7E3F) == 0x6E1F)
563 if ((op
& 0x7FE1) == 0x01E1)
575 if ((op
& 0x7E1F) == 0x681E)
579 if ((op
& 0x7E3F) == 0x3A1E)
586 d10v_skip_prologue (pc
)
590 unsigned short op1
, op2
;
591 CORE_ADDR func_addr
, func_end
;
592 struct symtab_and_line sal
;
594 /* If we have line debugging information, then the end of the */
595 /* prologue should the first assembly instruction of the first source line */
596 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
598 sal
= find_pc_line (func_addr
, 0);
599 if (sal
.end
&& sal
.end
< func_end
)
603 if (target_read_memory (pc
, (char *) &op
, 4))
604 return pc
; /* Can't access it -- assume no prologue. */
608 op
= (unsigned long) read_memory_integer (pc
, 4);
609 if ((op
& 0xC0000000) == 0xC0000000)
611 /* long instruction */
612 if (((op
& 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
613 ((op
& 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
614 ((op
& 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
619 /* short instructions */
620 if ((op
& 0xC0000000) == 0x80000000)
622 op2
= (op
& 0x3FFF8000) >> 15;
627 op1
= (op
& 0x3FFF8000) >> 15;
630 if (check_prologue (op1
))
632 if (!check_prologue (op2
))
634 /* if the previous opcode was really part of the prologue */
635 /* and not just a NOP, then we want to break after both instructions */
649 /* Given a GDB frame, determine the address of the calling function's frame.
650 This will be used to create a new GDB frame struct, and then
651 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
655 d10v_frame_chain (fi
)
656 struct frame_info
*fi
;
658 d10v_frame_init_saved_regs (fi
);
660 if (fi
->extra_info
->return_pc
== IMEM_START
661 || inside_entry_file (fi
->extra_info
->return_pc
))
662 return (CORE_ADDR
) 0;
664 if (!fi
->saved_regs
[FP_REGNUM
])
666 if (!fi
->saved_regs
[SP_REGNUM
]
667 || fi
->saved_regs
[SP_REGNUM
] == STACK_START
)
668 return (CORE_ADDR
) 0;
670 return fi
->saved_regs
[SP_REGNUM
];
673 if (!read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
674 REGISTER_RAW_SIZE (FP_REGNUM
)))
675 return (CORE_ADDR
) 0;
677 return D10V_MAKE_DADDR (read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
678 REGISTER_RAW_SIZE (FP_REGNUM
)));
681 static int next_addr
, uses_frame
;
684 prologue_find_regs (op
, fi
, addr
)
686 struct frame_info
*fi
;
692 if ((op
& 0x7E1F) == 0x6C1F)
694 n
= (op
& 0x1E0) >> 5;
696 fi
->saved_regs
[n
] = next_addr
;
701 else if ((op
& 0x7E3F) == 0x6E1F)
703 n
= (op
& 0x1E0) >> 5;
705 fi
->saved_regs
[n
] = next_addr
;
706 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
711 if ((op
& 0x7FE1) == 0x01E1)
713 n
= (op
& 0x1E) >> 1;
732 if ((op
& 0x7E1F) == 0x681E)
734 n
= (op
& 0x1E0) >> 5;
735 fi
->saved_regs
[n
] = next_addr
;
740 if ((op
& 0x7E3F) == 0x3A1E)
742 n
= (op
& 0x1E0) >> 5;
743 fi
->saved_regs
[n
] = next_addr
;
744 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
751 /* Put here the code to store, into fi->saved_regs, the addresses of
752 the saved registers of frame described by FRAME_INFO. This
753 includes special registers such as pc and fp saved in special ways
754 in the stack frame. sp is even more special: the address we return
755 for it IS the sp for the next frame. */
758 d10v_frame_init_saved_regs (fi
)
759 struct frame_info
*fi
;
763 unsigned short op1
, op2
;
767 memset (fi
->saved_regs
, 0, SIZEOF_FRAME_SAVED_REGS
);
770 pc
= get_pc_function_start (fi
->pc
);
775 op
= (unsigned long) read_memory_integer (pc
, 4);
776 if ((op
& 0xC0000000) == 0xC0000000)
778 /* long instruction */
779 if ((op
& 0x3FFF0000) == 0x01FF0000)
782 short n
= op
& 0xFFFF;
785 else if ((op
& 0x3F0F0000) == 0x340F0000)
787 /* st rn, @(offset,sp) */
788 short offset
= op
& 0xFFFF;
789 short n
= (op
>> 20) & 0xF;
790 fi
->saved_regs
[n
] = next_addr
+ offset
;
792 else if ((op
& 0x3F1F0000) == 0x350F0000)
794 /* st2w rn, @(offset,sp) */
795 short offset
= op
& 0xFFFF;
796 short n
= (op
>> 20) & 0xF;
797 fi
->saved_regs
[n
] = next_addr
+ offset
;
798 fi
->saved_regs
[n
+ 1] = next_addr
+ offset
+ 2;
805 /* short instructions */
806 if ((op
& 0xC0000000) == 0x80000000)
808 op2
= (op
& 0x3FFF8000) >> 15;
813 op1
= (op
& 0x3FFF8000) >> 15;
816 if (!prologue_find_regs (op1
, fi
, pc
) || !prologue_find_regs (op2
, fi
, pc
))
822 fi
->extra_info
->size
= -next_addr
;
825 fp
= D10V_MAKE_DADDR (read_register (SP_REGNUM
));
827 for (i
= 0; i
< NUM_REGS
- 1; i
++)
828 if (fi
->saved_regs
[i
])
830 fi
->saved_regs
[i
] = fp
- (next_addr
- fi
->saved_regs
[i
]);
833 if (fi
->saved_regs
[LR_REGNUM
])
835 CORE_ADDR return_pc
= read_memory_unsigned_integer (fi
->saved_regs
[LR_REGNUM
], REGISTER_RAW_SIZE (LR_REGNUM
));
836 fi
->extra_info
->return_pc
= D10V_MAKE_IADDR (return_pc
);
840 fi
->extra_info
->return_pc
= D10V_MAKE_IADDR (read_register (LR_REGNUM
));
843 /* th SP is not normally (ever?) saved, but check anyway */
844 if (!fi
->saved_regs
[SP_REGNUM
])
846 /* if the FP was saved, that means the current FP is valid, */
847 /* otherwise, it isn't being used, so we use the SP instead */
849 fi
->saved_regs
[SP_REGNUM
] = read_register (FP_REGNUM
) + fi
->extra_info
->size
;
852 fi
->saved_regs
[SP_REGNUM
] = fp
+ fi
->extra_info
->size
;
853 fi
->extra_info
->frameless
= 1;
854 fi
->saved_regs
[FP_REGNUM
] = 0;
860 d10v_init_extra_frame_info (fromleaf
, fi
)
862 struct frame_info
*fi
;
864 fi
->extra_info
= (struct frame_extra_info
*)
865 frame_obstack_alloc (sizeof (struct frame_extra_info
));
866 frame_saved_regs_zalloc (fi
);
868 fi
->extra_info
->frameless
= 0;
869 fi
->extra_info
->size
= 0;
870 fi
->extra_info
->return_pc
= 0;
872 /* The call dummy doesn't save any registers on the stack, so we can
874 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
880 d10v_frame_init_saved_regs (fi
);
885 show_regs (args
, from_tty
)
890 printf_filtered ("PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n",
891 (long) read_register (PC_REGNUM
),
892 (long) D10V_MAKE_IADDR (read_register (PC_REGNUM
)),
893 (long) read_register (PSW_REGNUM
),
894 (long) read_register (24),
895 (long) read_register (25),
896 (long) read_register (23));
897 printf_filtered ("R0-R7 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
898 (long) read_register (0),
899 (long) read_register (1),
900 (long) read_register (2),
901 (long) read_register (3),
902 (long) read_register (4),
903 (long) read_register (5),
904 (long) read_register (6),
905 (long) read_register (7));
906 printf_filtered ("R8-R15 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
907 (long) read_register (8),
908 (long) read_register (9),
909 (long) read_register (10),
910 (long) read_register (11),
911 (long) read_register (12),
912 (long) read_register (13),
913 (long) read_register (14),
914 (long) read_register (15));
915 for (a
= 0; a
< NR_IMAP_REGS
; a
++)
918 printf_filtered (" ");
919 printf_filtered ("IMAP%d %04lx", a
, d10v_imap_register (a
));
921 if (NR_DMAP_REGS
== 1)
922 printf_filtered (" DMAP %04lx\n", d10v_dmap_register (2));
925 for (a
= 0; a
< NR_DMAP_REGS
; a
++)
927 printf_filtered (" DMAP%d %04lx", a
, d10v_dmap_register (a
));
929 printf_filtered ("\n");
931 printf_filtered ("A0-A%d", NR_A_REGS
- 1);
932 for (a
= A0_REGNUM
; a
< A0_REGNUM
+ NR_A_REGS
; a
++)
934 char num
[MAX_REGISTER_RAW_SIZE
];
936 printf_filtered (" ");
937 read_register_gen (a
, (char *) &num
);
938 for (i
= 0; i
< MAX_REGISTER_RAW_SIZE
; i
++)
940 printf_filtered ("%02x", (num
[i
] & 0xff));
943 printf_filtered ("\n");
954 save_pid
= inferior_pid
;
956 pc
= (int) read_register (PC_REGNUM
);
957 inferior_pid
= save_pid
;
958 retval
= D10V_MAKE_IADDR (pc
);
963 d10v_write_pc (val
, pid
)
969 save_pid
= inferior_pid
;
971 write_register (PC_REGNUM
, D10V_CONVERT_IADDR_TO_RAW (val
));
972 inferior_pid
= save_pid
;
978 return (D10V_MAKE_DADDR (read_register (SP_REGNUM
)));
985 write_register (SP_REGNUM
, D10V_CONVERT_DADDR_TO_RAW (val
));
992 write_register (FP_REGNUM
, D10V_CONVERT_DADDR_TO_RAW (val
));
998 return (D10V_MAKE_DADDR (read_register (FP_REGNUM
)));
1001 /* Function: push_return_address (pc)
1002 Set up the return address for the inferior function call.
1003 Needed for targets where we don't actually execute a JSR/BSR instruction */
1006 d10v_push_return_address (pc
, sp
)
1010 write_register (LR_REGNUM
, D10V_CONVERT_IADDR_TO_RAW (CALL_DUMMY_ADDRESS ()));
1015 /* When arguments must be pushed onto the stack, they go on in reverse
1016 order. The below implements a FILO (stack) to do this. */
1021 struct stack_item
*prev
;
1025 static struct stack_item
*push_stack_item
PARAMS ((struct stack_item
* prev
, void *contents
, int len
));
1026 static struct stack_item
*
1027 push_stack_item (prev
, contents
, len
)
1028 struct stack_item
*prev
;
1032 struct stack_item
*si
;
1033 si
= xmalloc (sizeof (struct stack_item
));
1034 si
->data
= xmalloc (len
);
1037 memcpy (si
->data
, contents
, len
);
1041 static struct stack_item
*pop_stack_item
PARAMS ((struct stack_item
* si
));
1042 static struct stack_item
*
1044 struct stack_item
*si
;
1046 struct stack_item
*dead
= si
;
1055 d10v_push_arguments (nargs
, args
, sp
, struct_return
, struct_addr
)
1060 CORE_ADDR struct_addr
;
1063 int regnum
= ARG1_REGNUM
;
1064 struct stack_item
*si
= NULL
;
1066 /* Fill in registers and arg lists */
1067 for (i
= 0; i
< nargs
; i
++)
1069 value_ptr arg
= args
[i
];
1070 struct type
*type
= check_typedef (VALUE_TYPE (arg
));
1071 char *contents
= VALUE_CONTENTS (arg
);
1072 int len
= TYPE_LENGTH (type
);
1073 /* printf ("push: type=%d len=%d\n", type->code, len); */
1074 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
1076 /* pointers require special handling - first convert and
1078 long val
= extract_signed_integer (contents
, len
);
1080 if (TYPE_TARGET_TYPE (type
)
1081 && (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
))
1083 /* function pointer */
1084 val
= D10V_CONVERT_IADDR_TO_RAW (val
);
1086 else if (D10V_IADDR_P (val
))
1088 /* also function pointer! */
1089 val
= D10V_CONVERT_DADDR_TO_RAW (val
);
1096 if (regnum
<= ARGN_REGNUM
)
1097 write_register (regnum
++, val
& 0xffff);
1101 /* arg will go onto stack */
1102 store_address (ptr
, 2, val
& 0xffff);
1103 si
= push_stack_item (si
, ptr
, 2);
1108 int aligned_regnum
= (regnum
+ 1) & ~1;
1109 if (len
<= 2 && regnum
<= ARGN_REGNUM
)
1110 /* fits in a single register, do not align */
1112 long val
= extract_unsigned_integer (contents
, len
);
1113 write_register (regnum
++, val
);
1115 else if (len
<= (ARGN_REGNUM
- aligned_regnum
+ 1) * 2)
1116 /* value fits in remaining registers, store keeping left
1120 regnum
= aligned_regnum
;
1121 for (b
= 0; b
< (len
& ~1); b
+= 2)
1123 long val
= extract_unsigned_integer (&contents
[b
], 2);
1124 write_register (regnum
++, val
);
1128 long val
= extract_unsigned_integer (&contents
[b
], 1);
1129 write_register (regnum
++, (val
<< 8));
1134 /* arg will go onto stack */
1135 regnum
= ARGN_REGNUM
+ 1;
1136 si
= push_stack_item (si
, contents
, len
);
1143 sp
= (sp
- si
->len
) & ~1;
1144 write_memory (sp
, si
->data
, si
->len
);
1145 si
= pop_stack_item (si
);
1152 /* Given a return value in `regbuf' with a type `valtype',
1153 extract and copy its value into `valbuf'. */
1156 d10v_extract_return_value (type
, regbuf
, valbuf
)
1158 char regbuf
[REGISTER_BYTES
];
1162 /* printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM))); */
1163 if (TYPE_CODE (type
) == TYPE_CODE_PTR
1164 && TYPE_TARGET_TYPE (type
)
1165 && (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
))
1167 /* pointer to function */
1170 snum
= extract_address (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1171 store_address (valbuf
, 4, D10V_MAKE_IADDR (snum
));
1173 else if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
1175 /* pointer to data */
1178 snum
= extract_address (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1179 store_address (valbuf
, 4, D10V_MAKE_DADDR (snum
));
1183 len
= TYPE_LENGTH (type
);
1186 unsigned short c
= extract_unsigned_integer (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1187 store_unsigned_integer (valbuf
, 1, c
);
1189 else if ((len
& 1) == 0)
1190 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
), len
);
1193 /* For return values of odd size, the first byte is in the
1194 least significant part of the first register. The
1195 remaining bytes in remaining registers. Interestingly,
1196 when such values are passed in, the last byte is in the
1197 most significant byte of that same register - wierd. */
1198 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
) + 1, len
);
1203 /* Translate a GDB virtual ADDR/LEN into a format the remote target
1204 understands. Returns number of bytes that can be transfered
1205 starting at TARG_ADDR. Return ZERO if no bytes can be transfered
1206 (segmentation fault). Since the simulator knows all about how the
1207 VM system works, we just call that to do the translation. */
1210 remote_d10v_translate_xfer_address (CORE_ADDR memaddr
, int nr_bytes
,
1211 CORE_ADDR
*targ_addr
, int *targ_len
)
1215 out_len
= sim_d10v_translate_addr (memaddr
, nr_bytes
,
1218 d10v_imap_register
);
1219 *targ_addr
= out_addr
;
1220 *targ_len
= out_len
;
1224 /* The following code implements access to, and display of, the D10V's
1225 instruction trace buffer. The buffer consists of 64K or more
1226 4-byte words of data, of which each words includes an 8-bit count,
1227 an 8-bit segment number, and a 16-bit instruction address.
1229 In theory, the trace buffer is continuously capturing instruction
1230 data that the CPU presents on its "debug bus", but in practice, the
1231 ROMified GDB stub only enables tracing when it continues or steps
1232 the program, and stops tracing when the program stops; so it
1233 actually works for GDB to read the buffer counter out of memory and
1234 then read each trace word. The counter records where the tracing
1235 stops, but there is no record of where it started, so we remember
1236 the PC when we resumed and then search backwards in the trace
1237 buffer for a word that includes that address. This is not perfect,
1238 because you will miss trace data if the resumption PC is the target
1239 of a branch. (The value of the buffer counter is semi-random, any
1240 trace data from a previous program stop is gone.) */
1242 /* The address of the last word recorded in the trace buffer. */
1244 #define DBBC_ADDR (0xd80000)
1246 /* The base of the trace buffer, at least for the "Board_0". */
1248 #define TRACE_BUFFER_BASE (0xf40000)
1250 static void trace_command
PARAMS ((char *, int));
1252 static void untrace_command
PARAMS ((char *, int));
1254 static void trace_info
PARAMS ((char *, int));
1256 static void tdisassemble_command
PARAMS ((char *, int));
1258 static void display_trace
PARAMS ((int, int));
1260 /* True when instruction traces are being collected. */
1264 /* Remembered PC. */
1266 static CORE_ADDR last_pc
;
1268 /* True when trace output should be displayed whenever program stops. */
1270 static int trace_display
;
1272 /* True when trace listing should include source lines. */
1274 static int default_trace_show_source
= 1;
1285 trace_command (args
, from_tty
)
1289 /* Clear the host-side trace buffer, allocating space if needed. */
1290 trace_data
.size
= 0;
1291 if (trace_data
.counts
== NULL
)
1292 trace_data
.counts
= (short *) xmalloc (65536 * sizeof (short));
1293 if (trace_data
.addrs
== NULL
)
1294 trace_data
.addrs
= (CORE_ADDR
*) xmalloc (65536 * sizeof (CORE_ADDR
));
1298 printf_filtered ("Tracing is now on.\n");
1302 untrace_command (args
, from_tty
)
1308 printf_filtered ("Tracing is now off.\n");
1312 trace_info (args
, from_tty
)
1318 if (trace_data
.size
)
1320 printf_filtered ("%d entries in trace buffer:\n", trace_data
.size
);
1322 for (i
= 0; i
< trace_data
.size
; ++i
)
1324 printf_filtered ("%d: %d instruction%s at 0x%s\n",
1326 trace_data
.counts
[i
],
1327 (trace_data
.counts
[i
] == 1 ? "" : "s"),
1328 paddr_nz (trace_data
.addrs
[i
]));
1332 printf_filtered ("No entries in trace buffer.\n");
1334 printf_filtered ("Tracing is currently %s.\n", (tracing
? "on" : "off"));
1337 /* Print the instruction at address MEMADDR in debugged memory,
1338 on STREAM. Returns length of the instruction, in bytes. */
1341 print_insn (memaddr
, stream
)
1343 struct ui_file
*stream
;
1345 /* If there's no disassembler, something is very wrong. */
1346 if (tm_print_insn
== NULL
)
1347 internal_error ("print_insn: no disassembler");
1349 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
1350 tm_print_insn_info
.endian
= BFD_ENDIAN_BIG
;
1352 tm_print_insn_info
.endian
= BFD_ENDIAN_LITTLE
;
1353 return (*tm_print_insn
) (memaddr
, &tm_print_insn_info
);
1357 d10v_eva_prepare_to_trace ()
1362 last_pc
= read_register (PC_REGNUM
);
1365 /* Collect trace data from the target board and format it into a form
1366 more useful for display. */
1369 d10v_eva_get_trace_data ()
1371 int count
, i
, j
, oldsize
;
1372 int trace_addr
, trace_seg
, trace_cnt
, next_cnt
;
1373 unsigned int last_trace
, trace_word
, next_word
;
1374 unsigned int *tmpspace
;
1379 tmpspace
= xmalloc (65536 * sizeof (unsigned int));
1381 last_trace
= read_memory_unsigned_integer (DBBC_ADDR
, 2) << 2;
1383 /* Collect buffer contents from the target, stopping when we reach
1384 the word recorded when execution resumed. */
1387 while (last_trace
> 0)
1391 read_memory_unsigned_integer (TRACE_BUFFER_BASE
+ last_trace
, 4);
1392 trace_addr
= trace_word
& 0xffff;
1394 /* Ignore an apparently nonsensical entry. */
1395 if (trace_addr
== 0xffd5)
1397 tmpspace
[count
++] = trace_word
;
1398 if (trace_addr
== last_pc
)
1404 /* Move the data to the host-side trace buffer, adjusting counts to
1405 include the last instruction executed and transforming the address
1406 into something that GDB likes. */
1408 for (i
= 0; i
< count
; ++i
)
1410 trace_word
= tmpspace
[i
];
1411 next_word
= ((i
== 0) ? 0 : tmpspace
[i
- 1]);
1412 trace_addr
= trace_word
& 0xffff;
1413 next_cnt
= (next_word
>> 24) & 0xff;
1414 j
= trace_data
.size
+ count
- i
- 1;
1415 trace_data
.addrs
[j
] = (trace_addr
<< 2) + 0x1000000;
1416 trace_data
.counts
[j
] = next_cnt
+ 1;
1419 oldsize
= trace_data
.size
;
1420 trace_data
.size
+= count
;
1425 display_trace (oldsize
, trace_data
.size
);
1429 tdisassemble_command (arg
, from_tty
)
1434 CORE_ADDR low
, high
;
1440 high
= trace_data
.size
;
1442 else if (!(space_index
= (char *) strchr (arg
, ' ')))
1444 low
= parse_and_eval_address (arg
);
1449 /* Two arguments. */
1450 *space_index
= '\0';
1451 low
= parse_and_eval_address (arg
);
1452 high
= parse_and_eval_address (space_index
+ 1);
1457 printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low
), paddr_u (high
));
1459 display_trace (low
, high
);
1461 printf_filtered ("End of trace dump.\n");
1462 gdb_flush (gdb_stdout
);
1466 display_trace (low
, high
)
1469 int i
, count
, trace_show_source
, first
, suppress
;
1470 CORE_ADDR next_address
;
1472 trace_show_source
= default_trace_show_source
;
1473 if (!have_full_symbols () && !have_partial_symbols ())
1475 trace_show_source
= 0;
1476 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1477 printf_filtered ("Trace will not display any source.\n");
1482 for (i
= low
; i
< high
; ++i
)
1484 next_address
= trace_data
.addrs
[i
];
1485 count
= trace_data
.counts
[i
];
1489 if (trace_show_source
)
1491 struct symtab_and_line sal
, sal_prev
;
1493 sal_prev
= find_pc_line (next_address
- 4, 0);
1494 sal
= find_pc_line (next_address
, 0);
1498 if (first
|| sal
.line
!= sal_prev
.line
)
1499 print_source_lines (sal
.symtab
, sal
.line
, sal
.line
+ 1, 0);
1505 /* FIXME-32x64--assumes sal.pc fits in long. */
1506 printf_filtered ("No source file for address %s.\n",
1507 local_hex_string ((unsigned long) sal
.pc
));
1512 print_address (next_address
, gdb_stdout
);
1513 printf_filtered (":");
1514 printf_filtered ("\t");
1516 next_address
= next_address
+ print_insn (next_address
, gdb_stdout
);
1517 printf_filtered ("\n");
1518 gdb_flush (gdb_stdout
);
1524 static gdbarch_init_ftype d10v_gdbarch_init
;
1526 static struct gdbarch
*
1527 d10v_gdbarch_init (info
, arches
)
1528 struct gdbarch_info info
;
1529 struct gdbarch_list
*arches
;
1531 static LONGEST d10v_call_dummy_words
[] =
1533 struct gdbarch
*gdbarch
;
1535 struct gdbarch_tdep
*tdep
;
1536 gdbarch_register_name_ftype
*d10v_register_name
;
1538 /* Find a candidate among the list of pre-declared architectures. */
1539 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1541 return arches
->gdbarch
;
1543 /* None found, create a new architecture from the information
1545 tdep
= XMALLOC (struct gdbarch_tdep
);
1546 gdbarch
= gdbarch_alloc (&info
, tdep
);
1548 switch (info
.bfd_arch_info
->mach
)
1550 case bfd_mach_d10v_ts2
:
1552 d10v_register_name
= d10v_ts2_register_name
;
1553 tdep
->a0_regnum
= TS2_A0_REGNUM
;
1554 tdep
->nr_dmap_regs
= TS2_NR_DMAP_REGS
;
1555 tdep
->register_sim_regno
= d10v_ts2_register_sim_regno
;
1556 tdep
->dmap_register
= d10v_ts2_dmap_register
;
1557 tdep
->imap_register
= d10v_ts2_imap_register
;
1560 case bfd_mach_d10v_ts3
:
1562 d10v_register_name
= d10v_ts3_register_name
;
1563 tdep
->a0_regnum
= TS3_A0_REGNUM
;
1564 tdep
->nr_dmap_regs
= TS3_NR_DMAP_REGS
;
1565 tdep
->register_sim_regno
= d10v_ts3_register_sim_regno
;
1566 tdep
->dmap_register
= d10v_ts3_dmap_register
;
1567 tdep
->imap_register
= d10v_ts3_imap_register
;
1571 set_gdbarch_read_pc (gdbarch
, d10v_read_pc
);
1572 set_gdbarch_write_pc (gdbarch
, d10v_write_pc
);
1573 set_gdbarch_read_fp (gdbarch
, d10v_read_fp
);
1574 set_gdbarch_write_fp (gdbarch
, d10v_write_fp
);
1575 set_gdbarch_read_sp (gdbarch
, d10v_read_sp
);
1576 set_gdbarch_write_sp (gdbarch
, d10v_write_sp
);
1578 set_gdbarch_num_regs (gdbarch
, d10v_num_regs
);
1579 set_gdbarch_sp_regnum (gdbarch
, 15);
1580 set_gdbarch_fp_regnum (gdbarch
, 11);
1581 set_gdbarch_pc_regnum (gdbarch
, 18);
1582 set_gdbarch_register_name (gdbarch
, d10v_register_name
);
1583 set_gdbarch_register_size (gdbarch
, 2);
1584 set_gdbarch_register_bytes (gdbarch
, (d10v_num_regs
- 2) * 2 + 16);
1585 set_gdbarch_register_byte (gdbarch
, d10v_register_byte
);
1586 set_gdbarch_register_raw_size (gdbarch
, d10v_register_raw_size
);
1587 set_gdbarch_max_register_raw_size (gdbarch
, 8);
1588 set_gdbarch_register_virtual_size (gdbarch
, d10v_register_virtual_size
);
1589 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
1590 set_gdbarch_register_virtual_type (gdbarch
, d10v_register_virtual_type
);
1592 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1593 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1594 set_gdbarch_int_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1595 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1596 set_gdbarch_long_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1597 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1598 set_gdbarch_double_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1599 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1601 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
1602 set_gdbarch_call_dummy_length (gdbarch
, 0);
1603 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
1604 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
1605 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
1606 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
1607 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
1608 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
1609 set_gdbarch_call_dummy_words (gdbarch
, d10v_call_dummy_words
);
1610 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (d10v_call_dummy_words
));
1611 set_gdbarch_call_dummy_p (gdbarch
, 1);
1612 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
1613 set_gdbarch_get_saved_register (gdbarch
, generic_get_saved_register
);
1614 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
1616 set_gdbarch_register_convertible (gdbarch
, d10v_register_convertible
);
1617 set_gdbarch_register_convert_to_virtual (gdbarch
, d10v_register_convert_to_virtual
);
1618 set_gdbarch_register_convert_to_raw (gdbarch
, d10v_register_convert_to_raw
);
1620 set_gdbarch_extract_return_value (gdbarch
, d10v_extract_return_value
);
1621 set_gdbarch_push_arguments (gdbarch
, d10v_push_arguments
);
1622 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
1623 set_gdbarch_push_return_address (gdbarch
, d10v_push_return_address
);
1625 set_gdbarch_d10v_make_daddr (gdbarch
, d10v_make_daddr
);
1626 set_gdbarch_d10v_make_iaddr (gdbarch
, d10v_make_iaddr
);
1627 set_gdbarch_d10v_daddr_p (gdbarch
, d10v_daddr_p
);
1628 set_gdbarch_d10v_iaddr_p (gdbarch
, d10v_iaddr_p
);
1629 set_gdbarch_d10v_convert_daddr_to_raw (gdbarch
, d10v_convert_daddr_to_raw
);
1630 set_gdbarch_d10v_convert_iaddr_to_raw (gdbarch
, d10v_convert_iaddr_to_raw
);
1632 set_gdbarch_store_struct_return (gdbarch
, d10v_store_struct_return
);
1633 set_gdbarch_store_return_value (gdbarch
, d10v_store_return_value
);
1634 set_gdbarch_extract_struct_value_address (gdbarch
, d10v_extract_struct_value_address
);
1635 set_gdbarch_use_struct_convention (gdbarch
, d10v_use_struct_convention
);
1637 set_gdbarch_frame_init_saved_regs (gdbarch
, d10v_frame_init_saved_regs
);
1638 set_gdbarch_init_extra_frame_info (gdbarch
, d10v_init_extra_frame_info
);
1640 set_gdbarch_pop_frame (gdbarch
, d10v_pop_frame
);
1642 set_gdbarch_skip_prologue (gdbarch
, d10v_skip_prologue
);
1643 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1644 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
1645 set_gdbarch_function_start_offset (gdbarch
, 0);
1646 set_gdbarch_breakpoint_from_pc (gdbarch
, d10v_breakpoint_from_pc
);
1648 set_gdbarch_remote_translate_xfer_address (gdbarch
, remote_d10v_translate_xfer_address
);
1650 set_gdbarch_frame_args_skip (gdbarch
, 0);
1651 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
1652 set_gdbarch_frame_chain (gdbarch
, d10v_frame_chain
);
1653 set_gdbarch_frame_chain_valid (gdbarch
, d10v_frame_chain_valid
);
1654 set_gdbarch_frame_saved_pc (gdbarch
, d10v_frame_saved_pc
);
1655 set_gdbarch_frame_args_address (gdbarch
, d10v_frame_args_address
);
1656 set_gdbarch_frame_locals_address (gdbarch
, d10v_frame_locals_address
);
1657 set_gdbarch_saved_pc_after_call (gdbarch
, d10v_saved_pc_after_call
);
1658 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
1659 set_gdbarch_stack_align (gdbarch
, d10v_stack_align
);
1665 extern void (*target_resume_hook
) PARAMS ((void));
1666 extern void (*target_wait_loop_hook
) PARAMS ((void));
1669 _initialize_d10v_tdep ()
1671 register_gdbarch_init (bfd_arch_d10v
, d10v_gdbarch_init
);
1673 tm_print_insn
= print_insn_d10v
;
1675 target_resume_hook
= d10v_eva_prepare_to_trace
;
1676 target_wait_loop_hook
= d10v_eva_get_trace_data
;
1678 add_com ("regs", class_vars
, show_regs
, "Print all registers");
1680 add_com ("itrace", class_support
, trace_command
,
1681 "Enable tracing of instruction execution.");
1683 add_com ("iuntrace", class_support
, untrace_command
,
1684 "Disable tracing of instruction execution.");
1686 add_com ("itdisassemble", class_vars
, tdisassemble_command
,
1687 "Disassemble the trace buffer.\n\
1688 Two optional arguments specify a range of trace buffer entries\n\
1689 as reported by info trace (NOT addresses!).");
1691 add_info ("itrace", trace_info
,
1692 "Display info about the trace data buffer.");
1694 add_show_from_set (add_set_cmd ("itracedisplay", no_class
,
1695 var_integer
, (char *) &trace_display
,
1696 "Set automatic display of trace.\n", &setlist
),
1698 add_show_from_set (add_set_cmd ("itracesource", no_class
,
1699 var_integer
, (char *) &default_trace_show_source
,
1700 "Set display of source code with trace.\n", &setlist
),