1 /* Target-dependent code for Mitsubishi D10V, for GDB.
2 Copyright (C) 1996, 1997, 2000 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* Contributed by Martin Hunt, hunt@cygnus.com */
30 #include "gdb_string.h"
37 #include "arch-utils.h"
42 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
44 struct frame_extra_info
55 unsigned long (*dmap_register
) (int nr
);
56 unsigned long (*imap_register
) (int nr
);
57 int (*register_sim_regno
) (int nr
);
60 /* These are the addresses the D10V-EVA board maps data and
61 instruction memory to. */
63 #define DMEM_START 0x2000000
64 #define IMEM_START 0x1000000
65 #define STACK_START 0x0007ffe
67 /* d10v register names. */
77 #define NR_DMAP_REGS (gdbarch_tdep (current_gdbarch)->nr_dmap_regs)
78 #define A0_REGNUM (gdbarch_tdep (current_gdbarch)->a0_regnum)
80 /* d10v calling convention. */
82 #define ARG1_REGNUM R0_REGNUM
84 #define RET1_REGNUM R0_REGNUM
88 extern void _initialize_d10v_tdep (void);
90 static void d10v_eva_prepare_to_trace (void);
92 static void d10v_eva_get_trace_data (void);
94 static int prologue_find_regs (unsigned short op
, struct frame_info
*fi
,
97 extern void d10v_frame_init_saved_regs (struct frame_info
*);
99 static void do_d10v_pop_frame (struct frame_info
*fi
);
102 d10v_frame_chain_valid (chain
, frame
)
104 struct frame_info
*frame
; /* not used here */
106 return ((chain
) != 0 && (frame
) != 0 && (frame
)->pc
> IMEM_START
);
110 d10v_stack_align (CORE_ADDR len
)
112 return (len
+ 1) & ~1;
115 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
116 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
117 and TYPE is the type (which is known to be struct, union or array).
119 The d10v returns anything less than 8 bytes in size in
123 d10v_use_struct_convention (gcc_p
, type
)
127 return (TYPE_LENGTH (type
) > 8);
132 d10v_breakpoint_from_pc (pcptr
, lenptr
)
136 static unsigned char breakpoint
[] =
137 {0x2f, 0x90, 0x5e, 0x00};
138 *lenptr
= sizeof (breakpoint
);
142 /* Map the REG_NR onto an ascii name. Return NULL or an empty string
143 when the reg_nr isn't valid. */
147 TS2_IMAP0_REGNUM
= 32,
148 TS2_DMAP_REGNUM
= 34,
149 TS2_NR_DMAP_REGS
= 1,
154 d10v_ts2_register_name (int reg_nr
)
156 static char *register_names
[] =
158 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
159 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
160 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
161 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
162 "imap0", "imap1", "dmap", "a0", "a1"
166 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
168 return register_names
[reg_nr
];
173 TS3_IMAP0_REGNUM
= 36,
174 TS3_DMAP0_REGNUM
= 38,
175 TS3_NR_DMAP_REGS
= 4,
180 d10v_ts3_register_name (int reg_nr
)
182 static char *register_names
[] =
184 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
185 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
186 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
187 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
191 "dmap0", "dmap1", "dmap2", "dmap3"
195 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
197 return register_names
[reg_nr
];
200 /* Access the DMAP/IMAP registers in a target independant way. */
203 d10v_ts2_dmap_register (int reg_nr
)
211 return read_register (TS2_DMAP_REGNUM
);
218 d10v_ts3_dmap_register (int reg_nr
)
220 return read_register (TS3_DMAP0_REGNUM
+ reg_nr
);
224 d10v_dmap_register (int reg_nr
)
226 return gdbarch_tdep (current_gdbarch
)->dmap_register (reg_nr
);
230 d10v_ts2_imap_register (int reg_nr
)
232 return read_register (TS2_IMAP0_REGNUM
+ reg_nr
);
236 d10v_ts3_imap_register (int reg_nr
)
238 return read_register (TS3_IMAP0_REGNUM
+ reg_nr
);
242 d10v_imap_register (int reg_nr
)
244 return gdbarch_tdep (current_gdbarch
)->imap_register (reg_nr
);
247 /* MAP GDB's internal register numbering (determined by the layout fo
248 the REGISTER_BYTE array) onto the simulator's register
252 d10v_ts2_register_sim_regno (int nr
)
254 if (nr
>= TS2_IMAP0_REGNUM
255 && nr
< TS2_IMAP0_REGNUM
+ NR_IMAP_REGS
)
256 return nr
- TS2_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
257 if (nr
== TS2_DMAP_REGNUM
)
258 return nr
- TS2_DMAP_REGNUM
+ SIM_D10V_TS2_DMAP_REGNUM
;
259 if (nr
>= TS2_A0_REGNUM
260 && nr
< TS2_A0_REGNUM
+ NR_A_REGS
)
261 return nr
- TS2_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
266 d10v_ts3_register_sim_regno (int nr
)
268 if (nr
>= TS3_IMAP0_REGNUM
269 && nr
< TS3_IMAP0_REGNUM
+ NR_IMAP_REGS
)
270 return nr
- TS3_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
271 if (nr
>= TS3_DMAP0_REGNUM
272 && nr
< TS3_DMAP0_REGNUM
+ TS3_NR_DMAP_REGS
)
273 return nr
- TS3_DMAP0_REGNUM
+ SIM_D10V_DMAP0_REGNUM
;
274 if (nr
>= TS3_A0_REGNUM
275 && nr
< TS3_A0_REGNUM
+ NR_A_REGS
)
276 return nr
- TS3_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
281 d10v_register_sim_regno (int nr
)
283 return gdbarch_tdep (current_gdbarch
)->register_sim_regno (nr
);
286 /* Index within `registers' of the first byte of the space for
290 d10v_register_byte (reg_nr
)
293 if (reg_nr
< A0_REGNUM
)
295 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
296 return (A0_REGNUM
* 2
297 + (reg_nr
- A0_REGNUM
) * 8);
299 return (A0_REGNUM
* 2
301 + (reg_nr
- A0_REGNUM
- NR_A_REGS
) * 2);
304 /* Number of bytes of storage in the actual machine representation for
308 d10v_register_raw_size (reg_nr
)
311 if (reg_nr
< A0_REGNUM
)
313 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
319 /* Number of bytes of storage in the program's representation
323 d10v_register_virtual_size (reg_nr
)
326 return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (reg_nr
));
329 /* Return the GDB type object for the "standard" data type
330 of data in register N. */
333 d10v_register_virtual_type (reg_nr
)
336 if (reg_nr
>= A0_REGNUM
337 && reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
338 return builtin_type_int64
;
339 else if (reg_nr
== PC_REGNUM
340 || reg_nr
== SP_REGNUM
)
341 return builtin_type_int32
;
343 return builtin_type_int16
;
346 /* convert $pc and $sp to/from virtual addresses */
348 d10v_register_convertible (nr
)
351 return ((nr
) == PC_REGNUM
|| (nr
) == SP_REGNUM
);
355 d10v_register_convert_to_virtual (regnum
, type
, from
, to
)
361 ULONGEST x
= extract_unsigned_integer (from
, REGISTER_RAW_SIZE (regnum
));
362 if (regnum
== PC_REGNUM
)
363 x
= (x
<< 2) | IMEM_START
;
366 store_unsigned_integer (to
, TYPE_LENGTH (type
), x
);
370 d10v_register_convert_to_raw (type
, regnum
, from
, to
)
376 ULONGEST x
= extract_unsigned_integer (from
, TYPE_LENGTH (type
));
378 if (regnum
== PC_REGNUM
)
380 store_unsigned_integer (to
, 2, x
);
388 return ((x
) | DMEM_START
);
395 return (((x
) << 2) | IMEM_START
);
402 return (((x
) & 0x3000000) == DMEM_START
);
409 return (((x
) & 0x3000000) == IMEM_START
);
414 d10v_convert_iaddr_to_raw (x
)
417 return (((x
) >> 2) & 0xffff);
421 d10v_convert_daddr_to_raw (x
)
424 return ((x
) & 0xffff);
427 /* Store the address of the place in which to copy the structure the
428 subroutine will return. This is called from call_function.
430 We store structs through a pointer passed in the first Argument
434 d10v_store_struct_return (addr
, sp
)
438 write_register (ARG1_REGNUM
, (addr
));
441 /* Write into appropriate registers a function return value
442 of type TYPE, given in virtual format.
444 Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
447 d10v_store_return_value (type
, valbuf
)
451 write_register_bytes (REGISTER_BYTE (RET1_REGNUM
),
456 /* Extract from an array REGBUF containing the (raw) register state
457 the address in which a function should return its structure value,
458 as a CORE_ADDR (or an expression that can be used as one). */
461 d10v_extract_struct_value_address (regbuf
)
464 return (extract_address ((regbuf
) + REGISTER_BYTE (ARG1_REGNUM
),
465 REGISTER_RAW_SIZE (ARG1_REGNUM
))
470 d10v_frame_saved_pc (frame
)
471 struct frame_info
*frame
;
473 return ((frame
)->extra_info
->return_pc
);
477 d10v_frame_args_address (fi
)
478 struct frame_info
*fi
;
484 d10v_frame_locals_address (fi
)
485 struct frame_info
*fi
;
490 /* Immediately after a function call, return the saved pc. We can't
491 use frame->return_pc beause that is determined by reading R13 off
492 the stack and that may not be written yet. */
495 d10v_saved_pc_after_call (frame
)
496 struct frame_info
*frame
;
498 return ((read_register (LR_REGNUM
) << 2)
502 /* Discard from the stack the innermost frame, restoring all saved
508 generic_pop_current_frame (do_d10v_pop_frame
);
512 do_d10v_pop_frame (fi
)
513 struct frame_info
*fi
;
520 /* fill out fsr with the address of where each */
521 /* register was stored in the frame */
522 d10v_frame_init_saved_regs (fi
);
524 /* now update the current registers with the old values */
525 for (regnum
= A0_REGNUM
; regnum
< A0_REGNUM
+ NR_A_REGS
; regnum
++)
527 if (fi
->saved_regs
[regnum
])
529 read_memory (fi
->saved_regs
[regnum
], raw_buffer
, REGISTER_RAW_SIZE (regnum
));
530 write_register_bytes (REGISTER_BYTE (regnum
), raw_buffer
, REGISTER_RAW_SIZE (regnum
));
533 for (regnum
= 0; regnum
< SP_REGNUM
; regnum
++)
535 if (fi
->saved_regs
[regnum
])
537 write_register (regnum
, read_memory_unsigned_integer (fi
->saved_regs
[regnum
], REGISTER_RAW_SIZE (regnum
)));
540 if (fi
->saved_regs
[PSW_REGNUM
])
542 write_register (PSW_REGNUM
, read_memory_unsigned_integer (fi
->saved_regs
[PSW_REGNUM
], REGISTER_RAW_SIZE (PSW_REGNUM
)));
545 write_register (PC_REGNUM
, read_register (LR_REGNUM
));
546 write_register (SP_REGNUM
, fp
+ fi
->extra_info
->size
);
547 target_store_registers (-1);
548 flush_cached_frames ();
556 if ((op
& 0x7E1F) == 0x6C1F)
560 if ((op
& 0x7E3F) == 0x6E1F)
564 if ((op
& 0x7FE1) == 0x01E1)
576 if ((op
& 0x7E1F) == 0x681E)
580 if ((op
& 0x7E3F) == 0x3A1E)
587 d10v_skip_prologue (pc
)
591 unsigned short op1
, op2
;
592 CORE_ADDR func_addr
, func_end
;
593 struct symtab_and_line sal
;
595 /* If we have line debugging information, then the end of the */
596 /* prologue should the first assembly instruction of the first source line */
597 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
599 sal
= find_pc_line (func_addr
, 0);
600 if (sal
.end
&& sal
.end
< func_end
)
604 if (target_read_memory (pc
, (char *) &op
, 4))
605 return pc
; /* Can't access it -- assume no prologue. */
609 op
= (unsigned long) read_memory_integer (pc
, 4);
610 if ((op
& 0xC0000000) == 0xC0000000)
612 /* long instruction */
613 if (((op
& 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
614 ((op
& 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
615 ((op
& 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
620 /* short instructions */
621 if ((op
& 0xC0000000) == 0x80000000)
623 op2
= (op
& 0x3FFF8000) >> 15;
628 op1
= (op
& 0x3FFF8000) >> 15;
631 if (check_prologue (op1
))
633 if (!check_prologue (op2
))
635 /* if the previous opcode was really part of the prologue */
636 /* and not just a NOP, then we want to break after both instructions */
650 /* Given a GDB frame, determine the address of the calling function's frame.
651 This will be used to create a new GDB frame struct, and then
652 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
656 d10v_frame_chain (fi
)
657 struct frame_info
*fi
;
659 d10v_frame_init_saved_regs (fi
);
661 if (fi
->extra_info
->return_pc
== IMEM_START
662 || inside_entry_file (fi
->extra_info
->return_pc
))
663 return (CORE_ADDR
) 0;
665 if (!fi
->saved_regs
[FP_REGNUM
])
667 if (!fi
->saved_regs
[SP_REGNUM
]
668 || fi
->saved_regs
[SP_REGNUM
] == STACK_START
)
669 return (CORE_ADDR
) 0;
671 return fi
->saved_regs
[SP_REGNUM
];
674 if (!read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
675 REGISTER_RAW_SIZE (FP_REGNUM
)))
676 return (CORE_ADDR
) 0;
678 return D10V_MAKE_DADDR (read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
679 REGISTER_RAW_SIZE (FP_REGNUM
)));
682 static int next_addr
, uses_frame
;
685 prologue_find_regs (op
, fi
, addr
)
687 struct frame_info
*fi
;
693 if ((op
& 0x7E1F) == 0x6C1F)
695 n
= (op
& 0x1E0) >> 5;
697 fi
->saved_regs
[n
] = next_addr
;
702 else if ((op
& 0x7E3F) == 0x6E1F)
704 n
= (op
& 0x1E0) >> 5;
706 fi
->saved_regs
[n
] = next_addr
;
707 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
712 if ((op
& 0x7FE1) == 0x01E1)
714 n
= (op
& 0x1E) >> 1;
733 if ((op
& 0x7E1F) == 0x681E)
735 n
= (op
& 0x1E0) >> 5;
736 fi
->saved_regs
[n
] = next_addr
;
741 if ((op
& 0x7E3F) == 0x3A1E)
743 n
= (op
& 0x1E0) >> 5;
744 fi
->saved_regs
[n
] = next_addr
;
745 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
752 /* Put here the code to store, into fi->saved_regs, the addresses of
753 the saved registers of frame described by FRAME_INFO. This
754 includes special registers such as pc and fp saved in special ways
755 in the stack frame. sp is even more special: the address we return
756 for it IS the sp for the next frame. */
759 d10v_frame_init_saved_regs (fi
)
760 struct frame_info
*fi
;
764 unsigned short op1
, op2
;
768 memset (fi
->saved_regs
, 0, SIZEOF_FRAME_SAVED_REGS
);
771 pc
= get_pc_function_start (fi
->pc
);
776 op
= (unsigned long) read_memory_integer (pc
, 4);
777 if ((op
& 0xC0000000) == 0xC0000000)
779 /* long instruction */
780 if ((op
& 0x3FFF0000) == 0x01FF0000)
783 short n
= op
& 0xFFFF;
786 else if ((op
& 0x3F0F0000) == 0x340F0000)
788 /* st rn, @(offset,sp) */
789 short offset
= op
& 0xFFFF;
790 short n
= (op
>> 20) & 0xF;
791 fi
->saved_regs
[n
] = next_addr
+ offset
;
793 else if ((op
& 0x3F1F0000) == 0x350F0000)
795 /* st2w rn, @(offset,sp) */
796 short offset
= op
& 0xFFFF;
797 short n
= (op
>> 20) & 0xF;
798 fi
->saved_regs
[n
] = next_addr
+ offset
;
799 fi
->saved_regs
[n
+ 1] = next_addr
+ offset
+ 2;
806 /* short instructions */
807 if ((op
& 0xC0000000) == 0x80000000)
809 op2
= (op
& 0x3FFF8000) >> 15;
814 op1
= (op
& 0x3FFF8000) >> 15;
817 if (!prologue_find_regs (op1
, fi
, pc
) || !prologue_find_regs (op2
, fi
, pc
))
823 fi
->extra_info
->size
= -next_addr
;
826 fp
= D10V_MAKE_DADDR (read_register (SP_REGNUM
));
828 for (i
= 0; i
< NUM_REGS
- 1; i
++)
829 if (fi
->saved_regs
[i
])
831 fi
->saved_regs
[i
] = fp
- (next_addr
- fi
->saved_regs
[i
]);
834 if (fi
->saved_regs
[LR_REGNUM
])
836 CORE_ADDR return_pc
= read_memory_unsigned_integer (fi
->saved_regs
[LR_REGNUM
], REGISTER_RAW_SIZE (LR_REGNUM
));
837 fi
->extra_info
->return_pc
= D10V_MAKE_IADDR (return_pc
);
841 fi
->extra_info
->return_pc
= D10V_MAKE_IADDR (read_register (LR_REGNUM
));
844 /* th SP is not normally (ever?) saved, but check anyway */
845 if (!fi
->saved_regs
[SP_REGNUM
])
847 /* if the FP was saved, that means the current FP is valid, */
848 /* otherwise, it isn't being used, so we use the SP instead */
850 fi
->saved_regs
[SP_REGNUM
] = read_register (FP_REGNUM
) + fi
->extra_info
->size
;
853 fi
->saved_regs
[SP_REGNUM
] = fp
+ fi
->extra_info
->size
;
854 fi
->extra_info
->frameless
= 1;
855 fi
->saved_regs
[FP_REGNUM
] = 0;
861 d10v_init_extra_frame_info (fromleaf
, fi
)
863 struct frame_info
*fi
;
865 fi
->extra_info
= (struct frame_extra_info
*)
866 frame_obstack_alloc (sizeof (struct frame_extra_info
));
867 frame_saved_regs_zalloc (fi
);
869 fi
->extra_info
->frameless
= 0;
870 fi
->extra_info
->size
= 0;
871 fi
->extra_info
->return_pc
= 0;
873 /* The call dummy doesn't save any registers on the stack, so we can
875 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
881 d10v_frame_init_saved_regs (fi
);
886 show_regs (args
, from_tty
)
891 printf_filtered ("PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n",
892 (long) read_register (PC_REGNUM
),
893 (long) D10V_MAKE_IADDR (read_register (PC_REGNUM
)),
894 (long) read_register (PSW_REGNUM
),
895 (long) read_register (24),
896 (long) read_register (25),
897 (long) read_register (23));
898 printf_filtered ("R0-R7 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
899 (long) read_register (0),
900 (long) read_register (1),
901 (long) read_register (2),
902 (long) read_register (3),
903 (long) read_register (4),
904 (long) read_register (5),
905 (long) read_register (6),
906 (long) read_register (7));
907 printf_filtered ("R8-R15 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
908 (long) read_register (8),
909 (long) read_register (9),
910 (long) read_register (10),
911 (long) read_register (11),
912 (long) read_register (12),
913 (long) read_register (13),
914 (long) read_register (14),
915 (long) read_register (15));
916 for (a
= 0; a
< NR_IMAP_REGS
; a
++)
919 printf_filtered (" ");
920 printf_filtered ("IMAP%d %04lx", a
, d10v_imap_register (a
));
922 if (NR_DMAP_REGS
== 1)
923 printf_filtered (" DMAP %04lx\n", d10v_dmap_register (2));
926 for (a
= 0; a
< NR_DMAP_REGS
; a
++)
928 printf_filtered (" DMAP%d %04lx", a
, d10v_dmap_register (a
));
930 printf_filtered ("\n");
932 printf_filtered ("A0-A%d", NR_A_REGS
- 1);
933 for (a
= A0_REGNUM
; a
< A0_REGNUM
+ NR_A_REGS
; a
++)
935 char num
[MAX_REGISTER_RAW_SIZE
];
937 printf_filtered (" ");
938 read_register_gen (a
, (char *) &num
);
939 for (i
= 0; i
< MAX_REGISTER_RAW_SIZE
; i
++)
941 printf_filtered ("%02x", (num
[i
] & 0xff));
944 printf_filtered ("\n");
955 save_pid
= inferior_pid
;
957 pc
= (int) read_register (PC_REGNUM
);
958 inferior_pid
= save_pid
;
959 retval
= D10V_MAKE_IADDR (pc
);
964 d10v_write_pc (val
, pid
)
970 save_pid
= inferior_pid
;
972 write_register (PC_REGNUM
, D10V_CONVERT_IADDR_TO_RAW (val
));
973 inferior_pid
= save_pid
;
979 return (D10V_MAKE_DADDR (read_register (SP_REGNUM
)));
986 write_register (SP_REGNUM
, D10V_CONVERT_DADDR_TO_RAW (val
));
993 write_register (FP_REGNUM
, D10V_CONVERT_DADDR_TO_RAW (val
));
999 return (D10V_MAKE_DADDR (read_register (FP_REGNUM
)));
1002 /* Function: push_return_address (pc)
1003 Set up the return address for the inferior function call.
1004 Needed for targets where we don't actually execute a JSR/BSR instruction */
1007 d10v_push_return_address (pc
, sp
)
1011 write_register (LR_REGNUM
, D10V_CONVERT_IADDR_TO_RAW (CALL_DUMMY_ADDRESS ()));
1016 /* When arguments must be pushed onto the stack, they go on in reverse
1017 order. The below implements a FILO (stack) to do this. */
1022 struct stack_item
*prev
;
1026 static struct stack_item
*push_stack_item (struct stack_item
*prev
,
1027 void *contents
, int len
);
1028 static struct stack_item
*
1029 push_stack_item (prev
, contents
, len
)
1030 struct stack_item
*prev
;
1034 struct stack_item
*si
;
1035 si
= xmalloc (sizeof (struct stack_item
));
1036 si
->data
= xmalloc (len
);
1039 memcpy (si
->data
, contents
, len
);
1043 static struct stack_item
*pop_stack_item (struct stack_item
*si
);
1044 static struct stack_item
*
1046 struct stack_item
*si
;
1048 struct stack_item
*dead
= si
;
1057 d10v_push_arguments (nargs
, args
, sp
, struct_return
, struct_addr
)
1062 CORE_ADDR struct_addr
;
1065 int regnum
= ARG1_REGNUM
;
1066 struct stack_item
*si
= NULL
;
1068 /* Fill in registers and arg lists */
1069 for (i
= 0; i
< nargs
; i
++)
1071 value_ptr arg
= args
[i
];
1072 struct type
*type
= check_typedef (VALUE_TYPE (arg
));
1073 char *contents
= VALUE_CONTENTS (arg
);
1074 int len
= TYPE_LENGTH (type
);
1075 /* printf ("push: type=%d len=%d\n", type->code, len); */
1076 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
1078 /* pointers require special handling - first convert and
1080 long val
= extract_signed_integer (contents
, len
);
1082 if (TYPE_TARGET_TYPE (type
)
1083 && (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
))
1085 /* function pointer */
1086 val
= D10V_CONVERT_IADDR_TO_RAW (val
);
1088 else if (D10V_IADDR_P (val
))
1090 /* also function pointer! */
1091 val
= D10V_CONVERT_DADDR_TO_RAW (val
);
1098 if (regnum
<= ARGN_REGNUM
)
1099 write_register (regnum
++, val
& 0xffff);
1103 /* arg will go onto stack */
1104 store_address (ptr
, 2, val
& 0xffff);
1105 si
= push_stack_item (si
, ptr
, 2);
1110 int aligned_regnum
= (regnum
+ 1) & ~1;
1111 if (len
<= 2 && regnum
<= ARGN_REGNUM
)
1112 /* fits in a single register, do not align */
1114 long val
= extract_unsigned_integer (contents
, len
);
1115 write_register (regnum
++, val
);
1117 else if (len
<= (ARGN_REGNUM
- aligned_regnum
+ 1) * 2)
1118 /* value fits in remaining registers, store keeping left
1122 regnum
= aligned_regnum
;
1123 for (b
= 0; b
< (len
& ~1); b
+= 2)
1125 long val
= extract_unsigned_integer (&contents
[b
], 2);
1126 write_register (regnum
++, val
);
1130 long val
= extract_unsigned_integer (&contents
[b
], 1);
1131 write_register (regnum
++, (val
<< 8));
1136 /* arg will go onto stack */
1137 regnum
= ARGN_REGNUM
+ 1;
1138 si
= push_stack_item (si
, contents
, len
);
1145 sp
= (sp
- si
->len
) & ~1;
1146 write_memory (sp
, si
->data
, si
->len
);
1147 si
= pop_stack_item (si
);
1154 /* Given a return value in `regbuf' with a type `valtype',
1155 extract and copy its value into `valbuf'. */
1158 d10v_extract_return_value (type
, regbuf
, valbuf
)
1160 char regbuf
[REGISTER_BYTES
];
1164 /* printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM))); */
1165 if (TYPE_CODE (type
) == TYPE_CODE_PTR
1166 && TYPE_TARGET_TYPE (type
)
1167 && (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
))
1169 /* pointer to function */
1172 snum
= extract_address (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1173 store_address (valbuf
, 4, D10V_MAKE_IADDR (snum
));
1175 else if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
1177 /* pointer to data */
1180 snum
= extract_address (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1181 store_address (valbuf
, 4, D10V_MAKE_DADDR (snum
));
1185 len
= TYPE_LENGTH (type
);
1188 unsigned short c
= extract_unsigned_integer (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1189 store_unsigned_integer (valbuf
, 1, c
);
1191 else if ((len
& 1) == 0)
1192 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
), len
);
1195 /* For return values of odd size, the first byte is in the
1196 least significant part of the first register. The
1197 remaining bytes in remaining registers. Interestingly,
1198 when such values are passed in, the last byte is in the
1199 most significant byte of that same register - wierd. */
1200 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
) + 1, len
);
1205 /* Translate a GDB virtual ADDR/LEN into a format the remote target
1206 understands. Returns number of bytes that can be transfered
1207 starting at TARG_ADDR. Return ZERO if no bytes can be transfered
1208 (segmentation fault). Since the simulator knows all about how the
1209 VM system works, we just call that to do the translation. */
1212 remote_d10v_translate_xfer_address (CORE_ADDR memaddr
, int nr_bytes
,
1213 CORE_ADDR
*targ_addr
, int *targ_len
)
1217 out_len
= sim_d10v_translate_addr (memaddr
, nr_bytes
,
1220 d10v_imap_register
);
1221 *targ_addr
= out_addr
;
1222 *targ_len
= out_len
;
1226 /* The following code implements access to, and display of, the D10V's
1227 instruction trace buffer. The buffer consists of 64K or more
1228 4-byte words of data, of which each words includes an 8-bit count,
1229 an 8-bit segment number, and a 16-bit instruction address.
1231 In theory, the trace buffer is continuously capturing instruction
1232 data that the CPU presents on its "debug bus", but in practice, the
1233 ROMified GDB stub only enables tracing when it continues or steps
1234 the program, and stops tracing when the program stops; so it
1235 actually works for GDB to read the buffer counter out of memory and
1236 then read each trace word. The counter records where the tracing
1237 stops, but there is no record of where it started, so we remember
1238 the PC when we resumed and then search backwards in the trace
1239 buffer for a word that includes that address. This is not perfect,
1240 because you will miss trace data if the resumption PC is the target
1241 of a branch. (The value of the buffer counter is semi-random, any
1242 trace data from a previous program stop is gone.) */
1244 /* The address of the last word recorded in the trace buffer. */
1246 #define DBBC_ADDR (0xd80000)
1248 /* The base of the trace buffer, at least for the "Board_0". */
1250 #define TRACE_BUFFER_BASE (0xf40000)
1252 static void trace_command (char *, int);
1254 static void untrace_command (char *, int);
1256 static void trace_info (char *, int);
1258 static void tdisassemble_command (char *, int);
1260 static void display_trace (int, int);
1262 /* True when instruction traces are being collected. */
1266 /* Remembered PC. */
1268 static CORE_ADDR last_pc
;
1270 /* True when trace output should be displayed whenever program stops. */
1272 static int trace_display
;
1274 /* True when trace listing should include source lines. */
1276 static int default_trace_show_source
= 1;
1287 trace_command (args
, from_tty
)
1291 /* Clear the host-side trace buffer, allocating space if needed. */
1292 trace_data
.size
= 0;
1293 if (trace_data
.counts
== NULL
)
1294 trace_data
.counts
= (short *) xmalloc (65536 * sizeof (short));
1295 if (trace_data
.addrs
== NULL
)
1296 trace_data
.addrs
= (CORE_ADDR
*) xmalloc (65536 * sizeof (CORE_ADDR
));
1300 printf_filtered ("Tracing is now on.\n");
1304 untrace_command (args
, from_tty
)
1310 printf_filtered ("Tracing is now off.\n");
1314 trace_info (args
, from_tty
)
1320 if (trace_data
.size
)
1322 printf_filtered ("%d entries in trace buffer:\n", trace_data
.size
);
1324 for (i
= 0; i
< trace_data
.size
; ++i
)
1326 printf_filtered ("%d: %d instruction%s at 0x%s\n",
1328 trace_data
.counts
[i
],
1329 (trace_data
.counts
[i
] == 1 ? "" : "s"),
1330 paddr_nz (trace_data
.addrs
[i
]));
1334 printf_filtered ("No entries in trace buffer.\n");
1336 printf_filtered ("Tracing is currently %s.\n", (tracing
? "on" : "off"));
1339 /* Print the instruction at address MEMADDR in debugged memory,
1340 on STREAM. Returns length of the instruction, in bytes. */
1343 print_insn (memaddr
, stream
)
1345 struct ui_file
*stream
;
1347 /* If there's no disassembler, something is very wrong. */
1348 if (tm_print_insn
== NULL
)
1349 internal_error ("print_insn: no disassembler");
1351 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
1352 tm_print_insn_info
.endian
= BFD_ENDIAN_BIG
;
1354 tm_print_insn_info
.endian
= BFD_ENDIAN_LITTLE
;
1355 return (*tm_print_insn
) (memaddr
, &tm_print_insn_info
);
1359 d10v_eva_prepare_to_trace ()
1364 last_pc
= read_register (PC_REGNUM
);
1367 /* Collect trace data from the target board and format it into a form
1368 more useful for display. */
1371 d10v_eva_get_trace_data ()
1373 int count
, i
, j
, oldsize
;
1374 int trace_addr
, trace_seg
, trace_cnt
, next_cnt
;
1375 unsigned int last_trace
, trace_word
, next_word
;
1376 unsigned int *tmpspace
;
1381 tmpspace
= xmalloc (65536 * sizeof (unsigned int));
1383 last_trace
= read_memory_unsigned_integer (DBBC_ADDR
, 2) << 2;
1385 /* Collect buffer contents from the target, stopping when we reach
1386 the word recorded when execution resumed. */
1389 while (last_trace
> 0)
1393 read_memory_unsigned_integer (TRACE_BUFFER_BASE
+ last_trace
, 4);
1394 trace_addr
= trace_word
& 0xffff;
1396 /* Ignore an apparently nonsensical entry. */
1397 if (trace_addr
== 0xffd5)
1399 tmpspace
[count
++] = trace_word
;
1400 if (trace_addr
== last_pc
)
1406 /* Move the data to the host-side trace buffer, adjusting counts to
1407 include the last instruction executed and transforming the address
1408 into something that GDB likes. */
1410 for (i
= 0; i
< count
; ++i
)
1412 trace_word
= tmpspace
[i
];
1413 next_word
= ((i
== 0) ? 0 : tmpspace
[i
- 1]);
1414 trace_addr
= trace_word
& 0xffff;
1415 next_cnt
= (next_word
>> 24) & 0xff;
1416 j
= trace_data
.size
+ count
- i
- 1;
1417 trace_data
.addrs
[j
] = (trace_addr
<< 2) + 0x1000000;
1418 trace_data
.counts
[j
] = next_cnt
+ 1;
1421 oldsize
= trace_data
.size
;
1422 trace_data
.size
+= count
;
1427 display_trace (oldsize
, trace_data
.size
);
1431 tdisassemble_command (arg
, from_tty
)
1436 CORE_ADDR low
, high
;
1442 high
= trace_data
.size
;
1444 else if (!(space_index
= (char *) strchr (arg
, ' ')))
1446 low
= parse_and_eval_address (arg
);
1451 /* Two arguments. */
1452 *space_index
= '\0';
1453 low
= parse_and_eval_address (arg
);
1454 high
= parse_and_eval_address (space_index
+ 1);
1459 printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low
), paddr_u (high
));
1461 display_trace (low
, high
);
1463 printf_filtered ("End of trace dump.\n");
1464 gdb_flush (gdb_stdout
);
1468 display_trace (low
, high
)
1471 int i
, count
, trace_show_source
, first
, suppress
;
1472 CORE_ADDR next_address
;
1474 trace_show_source
= default_trace_show_source
;
1475 if (!have_full_symbols () && !have_partial_symbols ())
1477 trace_show_source
= 0;
1478 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1479 printf_filtered ("Trace will not display any source.\n");
1484 for (i
= low
; i
< high
; ++i
)
1486 next_address
= trace_data
.addrs
[i
];
1487 count
= trace_data
.counts
[i
];
1491 if (trace_show_source
)
1493 struct symtab_and_line sal
, sal_prev
;
1495 sal_prev
= find_pc_line (next_address
- 4, 0);
1496 sal
= find_pc_line (next_address
, 0);
1500 if (first
|| sal
.line
!= sal_prev
.line
)
1501 print_source_lines (sal
.symtab
, sal
.line
, sal
.line
+ 1, 0);
1507 /* FIXME-32x64--assumes sal.pc fits in long. */
1508 printf_filtered ("No source file for address %s.\n",
1509 local_hex_string ((unsigned long) sal
.pc
));
1514 print_address (next_address
, gdb_stdout
);
1515 printf_filtered (":");
1516 printf_filtered ("\t");
1518 next_address
= next_address
+ print_insn (next_address
, gdb_stdout
);
1519 printf_filtered ("\n");
1520 gdb_flush (gdb_stdout
);
1526 static gdbarch_init_ftype d10v_gdbarch_init
;
1528 static struct gdbarch
*
1529 d10v_gdbarch_init (info
, arches
)
1530 struct gdbarch_info info
;
1531 struct gdbarch_list
*arches
;
1533 static LONGEST d10v_call_dummy_words
[] =
1535 struct gdbarch
*gdbarch
;
1537 struct gdbarch_tdep
*tdep
;
1538 gdbarch_register_name_ftype
*d10v_register_name
;
1540 /* Find a candidate among the list of pre-declared architectures. */
1541 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1543 return arches
->gdbarch
;
1545 /* None found, create a new architecture from the information
1547 tdep
= XMALLOC (struct gdbarch_tdep
);
1548 gdbarch
= gdbarch_alloc (&info
, tdep
);
1550 switch (info
.bfd_arch_info
->mach
)
1552 case bfd_mach_d10v_ts2
:
1554 d10v_register_name
= d10v_ts2_register_name
;
1555 tdep
->a0_regnum
= TS2_A0_REGNUM
;
1556 tdep
->nr_dmap_regs
= TS2_NR_DMAP_REGS
;
1557 tdep
->register_sim_regno
= d10v_ts2_register_sim_regno
;
1558 tdep
->dmap_register
= d10v_ts2_dmap_register
;
1559 tdep
->imap_register
= d10v_ts2_imap_register
;
1562 case bfd_mach_d10v_ts3
:
1564 d10v_register_name
= d10v_ts3_register_name
;
1565 tdep
->a0_regnum
= TS3_A0_REGNUM
;
1566 tdep
->nr_dmap_regs
= TS3_NR_DMAP_REGS
;
1567 tdep
->register_sim_regno
= d10v_ts3_register_sim_regno
;
1568 tdep
->dmap_register
= d10v_ts3_dmap_register
;
1569 tdep
->imap_register
= d10v_ts3_imap_register
;
1573 set_gdbarch_read_pc (gdbarch
, d10v_read_pc
);
1574 set_gdbarch_write_pc (gdbarch
, d10v_write_pc
);
1575 set_gdbarch_read_fp (gdbarch
, d10v_read_fp
);
1576 set_gdbarch_write_fp (gdbarch
, d10v_write_fp
);
1577 set_gdbarch_read_sp (gdbarch
, d10v_read_sp
);
1578 set_gdbarch_write_sp (gdbarch
, d10v_write_sp
);
1580 set_gdbarch_num_regs (gdbarch
, d10v_num_regs
);
1581 set_gdbarch_sp_regnum (gdbarch
, 15);
1582 set_gdbarch_fp_regnum (gdbarch
, 11);
1583 set_gdbarch_pc_regnum (gdbarch
, 18);
1584 set_gdbarch_register_name (gdbarch
, d10v_register_name
);
1585 set_gdbarch_register_size (gdbarch
, 2);
1586 set_gdbarch_register_bytes (gdbarch
, (d10v_num_regs
- 2) * 2 + 16);
1587 set_gdbarch_register_byte (gdbarch
, d10v_register_byte
);
1588 set_gdbarch_register_raw_size (gdbarch
, d10v_register_raw_size
);
1589 set_gdbarch_max_register_raw_size (gdbarch
, 8);
1590 set_gdbarch_register_virtual_size (gdbarch
, d10v_register_virtual_size
);
1591 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
1592 set_gdbarch_register_virtual_type (gdbarch
, d10v_register_virtual_type
);
1594 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1595 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1596 set_gdbarch_int_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1597 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1598 set_gdbarch_long_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1599 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1600 set_gdbarch_double_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1601 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1603 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
1604 set_gdbarch_call_dummy_length (gdbarch
, 0);
1605 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
1606 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
1607 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
1608 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
1609 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
1610 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
1611 set_gdbarch_call_dummy_words (gdbarch
, d10v_call_dummy_words
);
1612 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (d10v_call_dummy_words
));
1613 set_gdbarch_call_dummy_p (gdbarch
, 1);
1614 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
1615 set_gdbarch_get_saved_register (gdbarch
, generic_get_saved_register
);
1616 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
1618 set_gdbarch_register_convertible (gdbarch
, d10v_register_convertible
);
1619 set_gdbarch_register_convert_to_virtual (gdbarch
, d10v_register_convert_to_virtual
);
1620 set_gdbarch_register_convert_to_raw (gdbarch
, d10v_register_convert_to_raw
);
1622 set_gdbarch_extract_return_value (gdbarch
, d10v_extract_return_value
);
1623 set_gdbarch_push_arguments (gdbarch
, d10v_push_arguments
);
1624 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
1625 set_gdbarch_push_return_address (gdbarch
, d10v_push_return_address
);
1627 set_gdbarch_d10v_make_daddr (gdbarch
, d10v_make_daddr
);
1628 set_gdbarch_d10v_make_iaddr (gdbarch
, d10v_make_iaddr
);
1629 set_gdbarch_d10v_daddr_p (gdbarch
, d10v_daddr_p
);
1630 set_gdbarch_d10v_iaddr_p (gdbarch
, d10v_iaddr_p
);
1631 set_gdbarch_d10v_convert_daddr_to_raw (gdbarch
, d10v_convert_daddr_to_raw
);
1632 set_gdbarch_d10v_convert_iaddr_to_raw (gdbarch
, d10v_convert_iaddr_to_raw
);
1634 set_gdbarch_store_struct_return (gdbarch
, d10v_store_struct_return
);
1635 set_gdbarch_store_return_value (gdbarch
, d10v_store_return_value
);
1636 set_gdbarch_extract_struct_value_address (gdbarch
, d10v_extract_struct_value_address
);
1637 set_gdbarch_use_struct_convention (gdbarch
, d10v_use_struct_convention
);
1639 set_gdbarch_frame_init_saved_regs (gdbarch
, d10v_frame_init_saved_regs
);
1640 set_gdbarch_init_extra_frame_info (gdbarch
, d10v_init_extra_frame_info
);
1642 set_gdbarch_pop_frame (gdbarch
, d10v_pop_frame
);
1644 set_gdbarch_skip_prologue (gdbarch
, d10v_skip_prologue
);
1645 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1646 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
1647 set_gdbarch_function_start_offset (gdbarch
, 0);
1648 set_gdbarch_breakpoint_from_pc (gdbarch
, d10v_breakpoint_from_pc
);
1650 set_gdbarch_remote_translate_xfer_address (gdbarch
, remote_d10v_translate_xfer_address
);
1652 set_gdbarch_frame_args_skip (gdbarch
, 0);
1653 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
1654 set_gdbarch_frame_chain (gdbarch
, d10v_frame_chain
);
1655 set_gdbarch_frame_chain_valid (gdbarch
, d10v_frame_chain_valid
);
1656 set_gdbarch_frame_saved_pc (gdbarch
, d10v_frame_saved_pc
);
1657 set_gdbarch_frame_args_address (gdbarch
, d10v_frame_args_address
);
1658 set_gdbarch_frame_locals_address (gdbarch
, d10v_frame_locals_address
);
1659 set_gdbarch_saved_pc_after_call (gdbarch
, d10v_saved_pc_after_call
);
1660 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
1661 set_gdbarch_stack_align (gdbarch
, d10v_stack_align
);
1667 extern void (*target_resume_hook
) PARAMS ((void));
1668 extern void (*target_wait_loop_hook
) PARAMS ((void));
1671 _initialize_d10v_tdep ()
1673 register_gdbarch_init (bfd_arch_d10v
, d10v_gdbarch_init
);
1675 tm_print_insn
= print_insn_d10v
;
1677 target_resume_hook
= d10v_eva_prepare_to_trace
;
1678 target_wait_loop_hook
= d10v_eva_get_trace_data
;
1680 add_com ("regs", class_vars
, show_regs
, "Print all registers");
1682 add_com ("itrace", class_support
, trace_command
,
1683 "Enable tracing of instruction execution.");
1685 add_com ("iuntrace", class_support
, untrace_command
,
1686 "Disable tracing of instruction execution.");
1688 add_com ("itdisassemble", class_vars
, tdisassemble_command
,
1689 "Disassemble the trace buffer.\n\
1690 Two optional arguments specify a range of trace buffer entries\n\
1691 as reported by info trace (NOT addresses!).");
1693 add_info ("itrace", trace_info
,
1694 "Display info about the trace data buffer.");
1696 add_show_from_set (add_set_cmd ("itracedisplay", no_class
,
1697 var_integer
, (char *) &trace_display
,
1698 "Set automatic display of trace.\n", &setlist
),
1700 add_show_from_set (add_set_cmd ("itracesource", no_class
,
1701 var_integer
, (char *) &default_trace_show_source
,
1702 "Set display of source code with trace.\n", &setlist
),