1 /* Target-dependent code for Mitsubishi D10V, for GDB.
3 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* Contributed by Martin Hunt, hunt@cygnus.com */
31 #include "gdb_string.h"
38 #include "arch-utils.h"
41 #include "floatformat.h"
42 #include "gdb/sim-d10v.h"
43 #include "sim-regno.h"
45 struct frame_extra_info
56 unsigned long (*dmap_register
) (int nr
);
57 unsigned long (*imap_register
) (int nr
);
60 /* These are the addresses the D10V-EVA board maps data and
61 instruction memory to. */
64 DMEM_START
= 0x2000000,
65 IMEM_START
= 0x1000000,
66 STACK_START
= 0x200bffe
69 /* d10v register names. */
84 /* d10v calling convention. */
85 ARG1_REGNUM
= R0_REGNUM
,
86 ARGN_REGNUM
= R3_REGNUM
,
87 RET1_REGNUM
= R0_REGNUM
,
90 #define NR_DMAP_REGS (gdbarch_tdep (current_gdbarch)->nr_dmap_regs)
91 #define A0_REGNUM (gdbarch_tdep (current_gdbarch)->a0_regnum)
95 extern void _initialize_d10v_tdep (void);
97 static CORE_ADDR
d10v_read_sp (void);
99 static CORE_ADDR
d10v_read_fp (void);
101 static void d10v_eva_prepare_to_trace (void);
103 static void d10v_eva_get_trace_data (void);
105 static int prologue_find_regs (unsigned short op
, struct frame_info
*fi
,
108 static void d10v_frame_init_saved_regs (struct frame_info
*);
110 static void do_d10v_pop_frame (struct frame_info
*fi
);
113 d10v_frame_chain_valid (CORE_ADDR chain
, struct frame_info
*frame
)
115 return (get_frame_pc (frame
) > IMEM_START
);
119 d10v_stack_align (CORE_ADDR len
)
121 return (len
+ 1) & ~1;
124 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
125 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
126 and TYPE is the type (which is known to be struct, union or array).
128 The d10v returns anything less than 8 bytes in size in
132 d10v_use_struct_convention (int gcc_p
, struct type
*type
)
136 /* The d10v only passes a struct in a register when that structure
137 has an alignment that matches the size of a register. */
138 /* If the structure doesn't fit in 4 registers, put it on the
140 if (TYPE_LENGTH (type
) > 8)
142 /* If the struct contains only one field, don't put it on the stack
143 - gcc can fit it in one or more registers. */
144 if (TYPE_NFIELDS (type
) == 1)
146 alignment
= TYPE_LENGTH (TYPE_FIELD_TYPE (type
, 0));
147 for (i
= 1; i
< TYPE_NFIELDS (type
); i
++)
149 /* If the alignment changes, just assume it goes on the
151 if (TYPE_LENGTH (TYPE_FIELD_TYPE (type
, i
)) != alignment
)
154 /* If the alignment is suitable for the d10v's 16 bit registers,
155 don't put it on the stack. */
156 if (alignment
== 2 || alignment
== 4)
162 static const unsigned char *
163 d10v_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
165 static unsigned char breakpoint
[] =
166 {0x2f, 0x90, 0x5e, 0x00};
167 *lenptr
= sizeof (breakpoint
);
171 /* Map the REG_NR onto an ascii name. Return NULL or an empty string
172 when the reg_nr isn't valid. */
176 TS2_IMAP0_REGNUM
= 32,
177 TS2_DMAP_REGNUM
= 34,
178 TS2_NR_DMAP_REGS
= 1,
183 d10v_ts2_register_name (int reg_nr
)
185 static char *register_names
[] =
187 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
188 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
189 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
190 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
191 "imap0", "imap1", "dmap", "a0", "a1"
195 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
197 return register_names
[reg_nr
];
202 TS3_IMAP0_REGNUM
= 36,
203 TS3_DMAP0_REGNUM
= 38,
204 TS3_NR_DMAP_REGS
= 4,
209 d10v_ts3_register_name (int reg_nr
)
211 static char *register_names
[] =
213 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
214 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
215 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
216 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
220 "dmap0", "dmap1", "dmap2", "dmap3"
224 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
226 return register_names
[reg_nr
];
229 /* Access the DMAP/IMAP registers in a target independent way.
231 Divide the D10V's 64k data space into four 16k segments:
232 0x0000 -- 0x3fff, 0x4000 -- 0x7fff, 0x8000 -- 0xbfff, and
235 On the TS2, the first two segments (0x0000 -- 0x3fff, 0x4000 --
236 0x7fff) always map to the on-chip data RAM, and the fourth always
237 maps to I/O space. The third (0x8000 - 0xbfff) can be mapped into
238 unified memory or instruction memory, under the control of the
239 single DMAP register.
241 On the TS3, there are four DMAP registers, each of which controls
242 one of the segments. */
245 d10v_ts2_dmap_register (int reg_nr
)
253 return read_register (TS2_DMAP_REGNUM
);
260 d10v_ts3_dmap_register (int reg_nr
)
262 return read_register (TS3_DMAP0_REGNUM
+ reg_nr
);
266 d10v_dmap_register (int reg_nr
)
268 return gdbarch_tdep (current_gdbarch
)->dmap_register (reg_nr
);
272 d10v_ts2_imap_register (int reg_nr
)
274 return read_register (TS2_IMAP0_REGNUM
+ reg_nr
);
278 d10v_ts3_imap_register (int reg_nr
)
280 return read_register (TS3_IMAP0_REGNUM
+ reg_nr
);
284 d10v_imap_register (int reg_nr
)
286 return gdbarch_tdep (current_gdbarch
)->imap_register (reg_nr
);
289 /* MAP GDB's internal register numbering (determined by the layout fo
290 the REGISTER_BYTE array) onto the simulator's register
294 d10v_ts2_register_sim_regno (int nr
)
296 if (legacy_register_sim_regno (nr
) < 0)
297 return legacy_register_sim_regno (nr
);
298 if (nr
>= TS2_IMAP0_REGNUM
299 && nr
< TS2_IMAP0_REGNUM
+ NR_IMAP_REGS
)
300 return nr
- TS2_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
301 if (nr
== TS2_DMAP_REGNUM
)
302 return nr
- TS2_DMAP_REGNUM
+ SIM_D10V_TS2_DMAP_REGNUM
;
303 if (nr
>= TS2_A0_REGNUM
304 && nr
< TS2_A0_REGNUM
+ NR_A_REGS
)
305 return nr
- TS2_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
310 d10v_ts3_register_sim_regno (int nr
)
312 if (legacy_register_sim_regno (nr
) < 0)
313 return legacy_register_sim_regno (nr
);
314 if (nr
>= TS3_IMAP0_REGNUM
315 && nr
< TS3_IMAP0_REGNUM
+ NR_IMAP_REGS
)
316 return nr
- TS3_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
317 if (nr
>= TS3_DMAP0_REGNUM
318 && nr
< TS3_DMAP0_REGNUM
+ TS3_NR_DMAP_REGS
)
319 return nr
- TS3_DMAP0_REGNUM
+ SIM_D10V_DMAP0_REGNUM
;
320 if (nr
>= TS3_A0_REGNUM
321 && nr
< TS3_A0_REGNUM
+ NR_A_REGS
)
322 return nr
- TS3_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
326 /* Index within `registers' of the first byte of the space for
330 d10v_register_byte (int reg_nr
)
332 if (reg_nr
< A0_REGNUM
)
334 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
335 return (A0_REGNUM
* 2
336 + (reg_nr
- A0_REGNUM
) * 8);
338 return (A0_REGNUM
* 2
340 + (reg_nr
- A0_REGNUM
- NR_A_REGS
) * 2);
343 /* Number of bytes of storage in the actual machine representation for
347 d10v_register_raw_size (int reg_nr
)
349 if (reg_nr
< A0_REGNUM
)
351 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
357 /* Return the GDB type object for the "standard" data type
358 of data in register N. */
361 d10v_register_virtual_type (int reg_nr
)
363 if (reg_nr
== PC_REGNUM
)
364 return builtin_type_void_func_ptr
;
365 if (reg_nr
== _SP_REGNUM
|| reg_nr
== _FP_REGNUM
)
366 return builtin_type_void_data_ptr
;
367 else if (reg_nr
>= A0_REGNUM
368 && reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
369 return builtin_type_int64
;
371 return builtin_type_int16
;
375 d10v_daddr_p (CORE_ADDR x
)
377 return (((x
) & 0x3000000) == DMEM_START
);
381 d10v_iaddr_p (CORE_ADDR x
)
383 return (((x
) & 0x3000000) == IMEM_START
);
387 d10v_make_daddr (CORE_ADDR x
)
389 return ((x
) | DMEM_START
);
393 d10v_make_iaddr (CORE_ADDR x
)
395 if (d10v_iaddr_p (x
))
396 return x
; /* Idempotency -- x is already in the IMEM space. */
398 return (((x
) << 2) | IMEM_START
);
402 d10v_convert_iaddr_to_raw (CORE_ADDR x
)
404 return (((x
) >> 2) & 0xffff);
408 d10v_convert_daddr_to_raw (CORE_ADDR x
)
410 return ((x
) & 0xffff);
414 d10v_address_to_pointer (struct type
*type
, void *buf
, CORE_ADDR addr
)
416 /* Is it a code address? */
417 if (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
418 || TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_METHOD
)
420 store_unsigned_integer (buf
, TYPE_LENGTH (type
),
421 d10v_convert_iaddr_to_raw (addr
));
425 /* Strip off any upper segment bits. */
426 store_unsigned_integer (buf
, TYPE_LENGTH (type
),
427 d10v_convert_daddr_to_raw (addr
));
432 d10v_pointer_to_address (struct type
*type
, const void *buf
)
434 CORE_ADDR addr
= extract_address (buf
, TYPE_LENGTH (type
));
436 /* Is it a code address? */
437 if (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
438 || TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_METHOD
439 || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type
)))
440 return d10v_make_iaddr (addr
);
442 return d10v_make_daddr (addr
);
445 /* Don't do anything if we have an integer, this way users can type 'x
446 <addr>' w/o having gdb outsmart them. The internal gdb conversions
447 to the correct space are taken care of in the pointer_to_address
448 function. If we don't do this, 'x $fp' wouldn't work. */
450 d10v_integer_to_address (struct type
*type
, void *buf
)
453 val
= unpack_long (type
, buf
);
457 /* Store the address of the place in which to copy the structure the
458 subroutine will return. This is called from call_function.
460 We store structs through a pointer passed in the first Argument
464 d10v_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
466 write_register (ARG1_REGNUM
, (addr
));
469 /* Write into appropriate registers a function return value
470 of type TYPE, given in virtual format.
472 Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
475 d10v_store_return_value (struct type
*type
, char *valbuf
)
478 /* Only char return values need to be shifted right within R0. */
479 if (TYPE_LENGTH (type
) == 1
480 && TYPE_CODE (type
) == TYPE_CODE_INT
)
482 /* zero the high byte */
483 deprecated_write_register_bytes (REGISTER_BYTE (RET1_REGNUM
), &tmp
, 1);
484 /* copy the low byte */
485 deprecated_write_register_bytes (REGISTER_BYTE (RET1_REGNUM
) + 1,
489 deprecated_write_register_bytes (REGISTER_BYTE (RET1_REGNUM
),
490 valbuf
, TYPE_LENGTH (type
));
493 /* Extract from an array REGBUF containing the (raw) register state
494 the address in which a function should return its structure value,
495 as a CORE_ADDR (or an expression that can be used as one). */
498 d10v_extract_struct_value_address (char *regbuf
)
500 return (extract_address ((regbuf
) + REGISTER_BYTE (ARG1_REGNUM
),
501 REGISTER_RAW_SIZE (ARG1_REGNUM
))
506 d10v_frame_saved_pc (struct frame_info
*frame
)
508 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
509 get_frame_base (frame
),
510 get_frame_base (frame
)))
511 return d10v_make_iaddr (deprecated_read_register_dummy (get_frame_pc (frame
),
512 get_frame_base (frame
),
515 return ((frame
)->extra_info
->return_pc
);
518 /* Immediately after a function call, return the saved pc. We can't
519 use frame->return_pc beause that is determined by reading R13 off
520 the stack and that may not be written yet. */
523 d10v_saved_pc_after_call (struct frame_info
*frame
)
525 return ((read_register (LR_REGNUM
) << 2)
529 /* Discard from the stack the innermost frame, restoring all saved
533 d10v_pop_frame (void)
535 generic_pop_current_frame (do_d10v_pop_frame
);
539 do_d10v_pop_frame (struct frame_info
*fi
)
545 fp
= get_frame_base (fi
);
546 /* fill out fsr with the address of where each */
547 /* register was stored in the frame */
548 d10v_frame_init_saved_regs (fi
);
550 /* now update the current registers with the old values */
551 for (regnum
= A0_REGNUM
; regnum
< A0_REGNUM
+ NR_A_REGS
; regnum
++)
553 if (get_frame_saved_regs (fi
)[regnum
])
555 read_memory (get_frame_saved_regs (fi
)[regnum
], raw_buffer
, REGISTER_RAW_SIZE (regnum
));
556 deprecated_write_register_bytes (REGISTER_BYTE (regnum
), raw_buffer
,
557 REGISTER_RAW_SIZE (regnum
));
560 for (regnum
= 0; regnum
< SP_REGNUM
; regnum
++)
562 if (get_frame_saved_regs (fi
)[regnum
])
564 write_register (regnum
, read_memory_unsigned_integer (get_frame_saved_regs (fi
)[regnum
], REGISTER_RAW_SIZE (regnum
)));
567 if (get_frame_saved_regs (fi
)[PSW_REGNUM
])
569 write_register (PSW_REGNUM
, read_memory_unsigned_integer (get_frame_saved_regs (fi
)[PSW_REGNUM
], REGISTER_RAW_SIZE (PSW_REGNUM
)));
572 write_register (PC_REGNUM
, read_register (LR_REGNUM
));
573 write_register (SP_REGNUM
, fp
+ fi
->extra_info
->size
);
574 target_store_registers (-1);
575 flush_cached_frames ();
579 check_prologue (unsigned short op
)
582 if ((op
& 0x7E1F) == 0x6C1F)
586 if ((op
& 0x7E3F) == 0x6E1F)
590 if ((op
& 0x7FE1) == 0x01E1)
602 if ((op
& 0x7E1F) == 0x681E)
606 if ((op
& 0x7E3F) == 0x3A1E)
613 d10v_skip_prologue (CORE_ADDR pc
)
616 unsigned short op1
, op2
;
617 CORE_ADDR func_addr
, func_end
;
618 struct symtab_and_line sal
;
620 /* If we have line debugging information, then the end of the */
621 /* prologue should the first assembly instruction of the first source line */
622 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
624 sal
= find_pc_line (func_addr
, 0);
625 if (sal
.end
&& sal
.end
< func_end
)
629 if (target_read_memory (pc
, (char *) &op
, 4))
630 return pc
; /* Can't access it -- assume no prologue. */
634 op
= (unsigned long) read_memory_integer (pc
, 4);
635 if ((op
& 0xC0000000) == 0xC0000000)
637 /* long instruction */
638 if (((op
& 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
639 ((op
& 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
640 ((op
& 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
645 /* short instructions */
646 if ((op
& 0xC0000000) == 0x80000000)
648 op2
= (op
& 0x3FFF8000) >> 15;
653 op1
= (op
& 0x3FFF8000) >> 15;
656 if (check_prologue (op1
))
658 if (!check_prologue (op2
))
660 /* if the previous opcode was really part of the prologue */
661 /* and not just a NOP, then we want to break after both instructions */
675 /* Given a GDB frame, determine the address of the calling function's
676 frame. This will be used to create a new GDB frame struct, and
677 then INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC will be
678 called for the new frame. */
681 d10v_frame_chain (struct frame_info
*fi
)
685 /* A generic call dummy's frame is the same as caller's. */
686 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), get_frame_base (fi
),
687 get_frame_base (fi
)))
688 return get_frame_base (fi
);
690 d10v_frame_init_saved_regs (fi
);
693 if (fi
->extra_info
->return_pc
== IMEM_START
694 || inside_entry_file (fi
->extra_info
->return_pc
))
696 /* This is meant to halt the backtrace at "_start".
697 Make sure we don't halt it at a generic dummy frame. */
698 if (!DEPRECATED_PC_IN_CALL_DUMMY (fi
->extra_info
->return_pc
, 0, 0))
699 return (CORE_ADDR
) 0;
702 if (!get_frame_saved_regs (fi
)[FP_REGNUM
])
704 if (!get_frame_saved_regs (fi
)[SP_REGNUM
]
705 || get_frame_saved_regs (fi
)[SP_REGNUM
] == STACK_START
)
706 return (CORE_ADDR
) 0;
708 return get_frame_saved_regs (fi
)[SP_REGNUM
];
711 addr
= read_memory_unsigned_integer (get_frame_saved_regs (fi
)[FP_REGNUM
],
712 REGISTER_RAW_SIZE (FP_REGNUM
));
714 return (CORE_ADDR
) 0;
716 return d10v_make_daddr (addr
);
719 static int next_addr
, uses_frame
;
722 prologue_find_regs (unsigned short op
, struct frame_info
*fi
, CORE_ADDR addr
)
727 if ((op
& 0x7E1F) == 0x6C1F)
729 n
= (op
& 0x1E0) >> 5;
731 get_frame_saved_regs (fi
)[n
] = next_addr
;
736 else if ((op
& 0x7E3F) == 0x6E1F)
738 n
= (op
& 0x1E0) >> 5;
740 get_frame_saved_regs (fi
)[n
] = next_addr
;
741 get_frame_saved_regs (fi
)[n
+ 1] = next_addr
+ 2;
746 if ((op
& 0x7FE1) == 0x01E1)
748 n
= (op
& 0x1E) >> 1;
767 if ((op
& 0x7E1F) == 0x681E)
769 n
= (op
& 0x1E0) >> 5;
770 get_frame_saved_regs (fi
)[n
] = next_addr
;
775 if ((op
& 0x7E3F) == 0x3A1E)
777 n
= (op
& 0x1E0) >> 5;
778 get_frame_saved_regs (fi
)[n
] = next_addr
;
779 get_frame_saved_regs (fi
)[n
+ 1] = next_addr
+ 2;
786 /* Put here the code to store, into fi->saved_regs, the addresses of
787 the saved registers of frame described by FRAME_INFO. This
788 includes special registers such as pc and fp saved in special ways
789 in the stack frame. sp is even more special: the address we return
790 for it IS the sp for the next frame. */
793 d10v_frame_init_saved_regs (struct frame_info
*fi
)
797 unsigned short op1
, op2
;
800 fp
= get_frame_base (fi
);
801 memset (get_frame_saved_regs (fi
), 0, SIZEOF_FRAME_SAVED_REGS
);
804 pc
= get_pc_function_start (get_frame_pc (fi
));
809 op
= (unsigned long) read_memory_integer (pc
, 4);
810 if ((op
& 0xC0000000) == 0xC0000000)
812 /* long instruction */
813 if ((op
& 0x3FFF0000) == 0x01FF0000)
816 short n
= op
& 0xFFFF;
819 else if ((op
& 0x3F0F0000) == 0x340F0000)
821 /* st rn, @(offset,sp) */
822 short offset
= op
& 0xFFFF;
823 short n
= (op
>> 20) & 0xF;
824 get_frame_saved_regs (fi
)[n
] = next_addr
+ offset
;
826 else if ((op
& 0x3F1F0000) == 0x350F0000)
828 /* st2w rn, @(offset,sp) */
829 short offset
= op
& 0xFFFF;
830 short n
= (op
>> 20) & 0xF;
831 get_frame_saved_regs (fi
)[n
] = next_addr
+ offset
;
832 get_frame_saved_regs (fi
)[n
+ 1] = next_addr
+ offset
+ 2;
839 /* short instructions */
840 if ((op
& 0xC0000000) == 0x80000000)
842 op2
= (op
& 0x3FFF8000) >> 15;
847 op1
= (op
& 0x3FFF8000) >> 15;
850 if (!prologue_find_regs (op1
, fi
, pc
)
851 || !prologue_find_regs (op2
, fi
, pc
))
857 fi
->extra_info
->size
= -next_addr
;
860 fp
= d10v_read_sp ();
862 for (i
= 0; i
< NUM_REGS
- 1; i
++)
863 if (get_frame_saved_regs (fi
)[i
])
865 get_frame_saved_regs (fi
)[i
] = fp
- (next_addr
- get_frame_saved_regs (fi
)[i
]);
868 if (get_frame_saved_regs (fi
)[LR_REGNUM
])
871 = read_memory_unsigned_integer (get_frame_saved_regs (fi
)[LR_REGNUM
],
872 REGISTER_RAW_SIZE (LR_REGNUM
));
873 fi
->extra_info
->return_pc
= d10v_make_iaddr (return_pc
);
877 fi
->extra_info
->return_pc
= d10v_make_iaddr (read_register (LR_REGNUM
));
880 /* The SP is not normally (ever?) saved, but check anyway */
881 if (!get_frame_saved_regs (fi
)[SP_REGNUM
])
883 /* if the FP was saved, that means the current FP is valid, */
884 /* otherwise, it isn't being used, so we use the SP instead */
886 get_frame_saved_regs (fi
)[SP_REGNUM
]
887 = d10v_read_fp () + fi
->extra_info
->size
;
890 get_frame_saved_regs (fi
)[SP_REGNUM
] = fp
+ fi
->extra_info
->size
;
891 fi
->extra_info
->frameless
= 1;
892 get_frame_saved_regs (fi
)[FP_REGNUM
] = 0;
898 d10v_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
900 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
901 frame_saved_regs_zalloc (fi
);
903 fi
->extra_info
->frameless
= 0;
904 fi
->extra_info
->size
= 0;
905 fi
->extra_info
->return_pc
= 0;
907 /* If get_frame_pc (fi) is zero, but this is not the outermost frame,
908 then let's snatch the return_pc from the callee, so that
909 DEPRECATED_PC_IN_CALL_DUMMY will work. */
910 if (get_frame_pc (fi
) == 0 && fi
->level
!= 0 && get_next_frame (fi
) != NULL
)
911 deprecated_update_frame_pc_hack (fi
, d10v_frame_saved_pc (get_next_frame (fi
)));
913 /* The call dummy doesn't save any registers on the stack, so we can
915 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), get_frame_base (fi
),
916 get_frame_base (fi
)))
922 d10v_frame_init_saved_regs (fi
);
927 show_regs (char *args
, int from_tty
)
930 printf_filtered ("PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n",
931 (long) read_register (PC_REGNUM
),
932 (long) d10v_make_iaddr (read_register (PC_REGNUM
)),
933 (long) read_register (PSW_REGNUM
),
934 (long) read_register (24),
935 (long) read_register (25),
936 (long) read_register (23));
937 printf_filtered ("R0-R7 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
938 (long) read_register (0),
939 (long) read_register (1),
940 (long) read_register (2),
941 (long) read_register (3),
942 (long) read_register (4),
943 (long) read_register (5),
944 (long) read_register (6),
945 (long) read_register (7));
946 printf_filtered ("R8-R15 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
947 (long) read_register (8),
948 (long) read_register (9),
949 (long) read_register (10),
950 (long) read_register (11),
951 (long) read_register (12),
952 (long) read_register (13),
953 (long) read_register (14),
954 (long) read_register (15));
955 for (a
= 0; a
< NR_IMAP_REGS
; a
++)
958 printf_filtered (" ");
959 printf_filtered ("IMAP%d %04lx", a
, d10v_imap_register (a
));
961 if (NR_DMAP_REGS
== 1)
962 printf_filtered (" DMAP %04lx\n", d10v_dmap_register (2));
965 for (a
= 0; a
< NR_DMAP_REGS
; a
++)
967 printf_filtered (" DMAP%d %04lx", a
, d10v_dmap_register (a
));
969 printf_filtered ("\n");
971 printf_filtered ("A0-A%d", NR_A_REGS
- 1);
972 for (a
= A0_REGNUM
; a
< A0_REGNUM
+ NR_A_REGS
; a
++)
974 char num
[MAX_REGISTER_RAW_SIZE
];
976 printf_filtered (" ");
977 deprecated_read_register_gen (a
, (char *) &num
);
978 for (i
= 0; i
< MAX_REGISTER_RAW_SIZE
; i
++)
980 printf_filtered ("%02x", (num
[i
] & 0xff));
983 printf_filtered ("\n");
987 d10v_read_pc (ptid_t ptid
)
993 save_ptid
= inferior_ptid
;
994 inferior_ptid
= ptid
;
995 pc
= (int) read_register (PC_REGNUM
);
996 inferior_ptid
= save_ptid
;
997 retval
= d10v_make_iaddr (pc
);
1002 d10v_write_pc (CORE_ADDR val
, ptid_t ptid
)
1006 save_ptid
= inferior_ptid
;
1007 inferior_ptid
= ptid
;
1008 write_register (PC_REGNUM
, d10v_convert_iaddr_to_raw (val
));
1009 inferior_ptid
= save_ptid
;
1015 return (d10v_make_daddr (read_register (SP_REGNUM
)));
1019 d10v_write_sp (CORE_ADDR val
)
1021 write_register (SP_REGNUM
, d10v_convert_daddr_to_raw (val
));
1027 return (d10v_make_daddr (read_register (FP_REGNUM
)));
1030 /* Function: push_return_address (pc)
1031 Set up the return address for the inferior function call.
1032 Needed for targets where we don't actually execute a JSR/BSR instruction */
1035 d10v_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1037 write_register (LR_REGNUM
, d10v_convert_iaddr_to_raw (CALL_DUMMY_ADDRESS ()));
1042 /* When arguments must be pushed onto the stack, they go on in reverse
1043 order. The below implements a FILO (stack) to do this. */
1048 struct stack_item
*prev
;
1052 static struct stack_item
*push_stack_item (struct stack_item
*prev
,
1053 void *contents
, int len
);
1054 static struct stack_item
*
1055 push_stack_item (struct stack_item
*prev
, void *contents
, int len
)
1057 struct stack_item
*si
;
1058 si
= xmalloc (sizeof (struct stack_item
));
1059 si
->data
= xmalloc (len
);
1062 memcpy (si
->data
, contents
, len
);
1066 static struct stack_item
*pop_stack_item (struct stack_item
*si
);
1067 static struct stack_item
*
1068 pop_stack_item (struct stack_item
*si
)
1070 struct stack_item
*dead
= si
;
1079 d10v_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1080 int struct_return
, CORE_ADDR struct_addr
)
1083 int regnum
= ARG1_REGNUM
;
1084 struct stack_item
*si
= NULL
;
1087 /* If struct_return is true, then the struct return address will
1088 consume one argument-passing register. No need to actually
1089 write the value to the register -- that's done by
1090 d10v_store_struct_return(). */
1095 /* Fill in registers and arg lists */
1096 for (i
= 0; i
< nargs
; i
++)
1098 struct value
*arg
= args
[i
];
1099 struct type
*type
= check_typedef (VALUE_TYPE (arg
));
1100 char *contents
= VALUE_CONTENTS (arg
);
1101 int len
= TYPE_LENGTH (type
);
1102 int aligned_regnum
= (regnum
+ 1) & ~1;
1104 /* printf ("push: type=%d len=%d\n", TYPE_CODE (type), len); */
1105 if (len
<= 2 && regnum
<= ARGN_REGNUM
)
1106 /* fits in a single register, do not align */
1108 val
= extract_unsigned_integer (contents
, len
);
1109 write_register (regnum
++, val
);
1111 else if (len
<= (ARGN_REGNUM
- aligned_regnum
+ 1) * 2)
1112 /* value fits in remaining registers, store keeping left
1116 regnum
= aligned_regnum
;
1117 for (b
= 0; b
< (len
& ~1); b
+= 2)
1119 val
= extract_unsigned_integer (&contents
[b
], 2);
1120 write_register (regnum
++, val
);
1124 val
= extract_unsigned_integer (&contents
[b
], 1);
1125 write_register (regnum
++, (val
<< 8));
1130 /* arg will go onto stack */
1131 regnum
= ARGN_REGNUM
+ 1;
1132 si
= push_stack_item (si
, contents
, len
);
1138 sp
= (sp
- si
->len
) & ~1;
1139 write_memory (sp
, si
->data
, si
->len
);
1140 si
= pop_stack_item (si
);
1147 /* Given a return value in `regbuf' with a type `valtype',
1148 extract and copy its value into `valbuf'. */
1151 d10v_extract_return_value (struct type
*type
, char regbuf
[REGISTER_BYTES
],
1156 printf("RET: TYPE=%d len=%d r%d=0x%x\n", TYPE_CODE (type
),
1157 TYPE_LENGTH (type
), RET1_REGNUM
- R0_REGNUM
,
1158 (int) extract_unsigned_integer (regbuf
+ REGISTER_BYTE(RET1_REGNUM
),
1159 REGISTER_RAW_SIZE (RET1_REGNUM
)));
1161 len
= TYPE_LENGTH (type
);
1166 c
= extract_unsigned_integer (regbuf
+ REGISTER_BYTE (RET1_REGNUM
),
1167 REGISTER_RAW_SIZE (RET1_REGNUM
));
1168 store_unsigned_integer (valbuf
, 1, c
);
1170 else if ((len
& 1) == 0)
1171 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
), len
);
1174 /* For return values of odd size, the first byte is in the
1175 least significant part of the first register. The
1176 remaining bytes in remaining registers. Interestingly,
1177 when such values are passed in, the last byte is in the
1178 most significant byte of that same register - wierd. */
1179 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
) + 1, len
);
1183 /* Translate a GDB virtual ADDR/LEN into a format the remote target
1184 understands. Returns number of bytes that can be transfered
1185 starting at TARG_ADDR. Return ZERO if no bytes can be transfered
1186 (segmentation fault). Since the simulator knows all about how the
1187 VM system works, we just call that to do the translation. */
1190 remote_d10v_translate_xfer_address (CORE_ADDR memaddr
, int nr_bytes
,
1191 CORE_ADDR
*targ_addr
, int *targ_len
)
1195 out_len
= sim_d10v_translate_addr (memaddr
, nr_bytes
,
1198 d10v_imap_register
);
1199 *targ_addr
= out_addr
;
1200 *targ_len
= out_len
;
1204 /* The following code implements access to, and display of, the D10V's
1205 instruction trace buffer. The buffer consists of 64K or more
1206 4-byte words of data, of which each words includes an 8-bit count,
1207 an 8-bit segment number, and a 16-bit instruction address.
1209 In theory, the trace buffer is continuously capturing instruction
1210 data that the CPU presents on its "debug bus", but in practice, the
1211 ROMified GDB stub only enables tracing when it continues or steps
1212 the program, and stops tracing when the program stops; so it
1213 actually works for GDB to read the buffer counter out of memory and
1214 then read each trace word. The counter records where the tracing
1215 stops, but there is no record of where it started, so we remember
1216 the PC when we resumed and then search backwards in the trace
1217 buffer for a word that includes that address. This is not perfect,
1218 because you will miss trace data if the resumption PC is the target
1219 of a branch. (The value of the buffer counter is semi-random, any
1220 trace data from a previous program stop is gone.) */
1222 /* The address of the last word recorded in the trace buffer. */
1224 #define DBBC_ADDR (0xd80000)
1226 /* The base of the trace buffer, at least for the "Board_0". */
1228 #define TRACE_BUFFER_BASE (0xf40000)
1230 static void trace_command (char *, int);
1232 static void untrace_command (char *, int);
1234 static void trace_info (char *, int);
1236 static void tdisassemble_command (char *, int);
1238 static void display_trace (int, int);
1240 /* True when instruction traces are being collected. */
1244 /* Remembered PC. */
1246 static CORE_ADDR last_pc
;
1248 /* True when trace output should be displayed whenever program stops. */
1250 static int trace_display
;
1252 /* True when trace listing should include source lines. */
1254 static int default_trace_show_source
= 1;
1265 trace_command (char *args
, int from_tty
)
1267 /* Clear the host-side trace buffer, allocating space if needed. */
1268 trace_data
.size
= 0;
1269 if (trace_data
.counts
== NULL
)
1270 trace_data
.counts
= (short *) xmalloc (65536 * sizeof (short));
1271 if (trace_data
.addrs
== NULL
)
1272 trace_data
.addrs
= (CORE_ADDR
*) xmalloc (65536 * sizeof (CORE_ADDR
));
1276 printf_filtered ("Tracing is now on.\n");
1280 untrace_command (char *args
, int from_tty
)
1284 printf_filtered ("Tracing is now off.\n");
1288 trace_info (char *args
, int from_tty
)
1292 if (trace_data
.size
)
1294 printf_filtered ("%d entries in trace buffer:\n", trace_data
.size
);
1296 for (i
= 0; i
< trace_data
.size
; ++i
)
1298 printf_filtered ("%d: %d instruction%s at 0x%s\n",
1300 trace_data
.counts
[i
],
1301 (trace_data
.counts
[i
] == 1 ? "" : "s"),
1302 paddr_nz (trace_data
.addrs
[i
]));
1306 printf_filtered ("No entries in trace buffer.\n");
1308 printf_filtered ("Tracing is currently %s.\n", (tracing
? "on" : "off"));
1311 /* Print the instruction at address MEMADDR in debugged memory,
1312 on STREAM. Returns length of the instruction, in bytes. */
1315 print_insn (CORE_ADDR memaddr
, struct ui_file
*stream
)
1317 /* If there's no disassembler, something is very wrong. */
1318 if (tm_print_insn
== NULL
)
1319 internal_error (__FILE__
, __LINE__
,
1320 "print_insn: no disassembler");
1322 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1323 tm_print_insn_info
.endian
= BFD_ENDIAN_BIG
;
1325 tm_print_insn_info
.endian
= BFD_ENDIAN_LITTLE
;
1326 return TARGET_PRINT_INSN (memaddr
, &tm_print_insn_info
);
1330 d10v_eva_prepare_to_trace (void)
1335 last_pc
= read_register (PC_REGNUM
);
1338 /* Collect trace data from the target board and format it into a form
1339 more useful for display. */
1342 d10v_eva_get_trace_data (void)
1344 int count
, i
, j
, oldsize
;
1345 int trace_addr
, trace_seg
, trace_cnt
, next_cnt
;
1346 unsigned int last_trace
, trace_word
, next_word
;
1347 unsigned int *tmpspace
;
1352 tmpspace
= xmalloc (65536 * sizeof (unsigned int));
1354 last_trace
= read_memory_unsigned_integer (DBBC_ADDR
, 2) << 2;
1356 /* Collect buffer contents from the target, stopping when we reach
1357 the word recorded when execution resumed. */
1360 while (last_trace
> 0)
1364 read_memory_unsigned_integer (TRACE_BUFFER_BASE
+ last_trace
, 4);
1365 trace_addr
= trace_word
& 0xffff;
1367 /* Ignore an apparently nonsensical entry. */
1368 if (trace_addr
== 0xffd5)
1370 tmpspace
[count
++] = trace_word
;
1371 if (trace_addr
== last_pc
)
1377 /* Move the data to the host-side trace buffer, adjusting counts to
1378 include the last instruction executed and transforming the address
1379 into something that GDB likes. */
1381 for (i
= 0; i
< count
; ++i
)
1383 trace_word
= tmpspace
[i
];
1384 next_word
= ((i
== 0) ? 0 : tmpspace
[i
- 1]);
1385 trace_addr
= trace_word
& 0xffff;
1386 next_cnt
= (next_word
>> 24) & 0xff;
1387 j
= trace_data
.size
+ count
- i
- 1;
1388 trace_data
.addrs
[j
] = (trace_addr
<< 2) + 0x1000000;
1389 trace_data
.counts
[j
] = next_cnt
+ 1;
1392 oldsize
= trace_data
.size
;
1393 trace_data
.size
+= count
;
1398 display_trace (oldsize
, trace_data
.size
);
1402 tdisassemble_command (char *arg
, int from_tty
)
1405 CORE_ADDR low
, high
;
1411 high
= trace_data
.size
;
1413 else if (!(space_index
= (char *) strchr (arg
, ' ')))
1415 low
= parse_and_eval_address (arg
);
1420 /* Two arguments. */
1421 *space_index
= '\0';
1422 low
= parse_and_eval_address (arg
);
1423 high
= parse_and_eval_address (space_index
+ 1);
1428 printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low
), paddr_u (high
));
1430 display_trace (low
, high
);
1432 printf_filtered ("End of trace dump.\n");
1433 gdb_flush (gdb_stdout
);
1437 display_trace (int low
, int high
)
1439 int i
, count
, trace_show_source
, first
, suppress
;
1440 CORE_ADDR next_address
;
1442 trace_show_source
= default_trace_show_source
;
1443 if (!have_full_symbols () && !have_partial_symbols ())
1445 trace_show_source
= 0;
1446 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1447 printf_filtered ("Trace will not display any source.\n");
1452 for (i
= low
; i
< high
; ++i
)
1454 next_address
= trace_data
.addrs
[i
];
1455 count
= trace_data
.counts
[i
];
1459 if (trace_show_source
)
1461 struct symtab_and_line sal
, sal_prev
;
1463 sal_prev
= find_pc_line (next_address
- 4, 0);
1464 sal
= find_pc_line (next_address
, 0);
1468 if (first
|| sal
.line
!= sal_prev
.line
)
1469 print_source_lines (sal
.symtab
, sal
.line
, sal
.line
+ 1, 0);
1475 /* FIXME-32x64--assumes sal.pc fits in long. */
1476 printf_filtered ("No source file for address %s.\n",
1477 local_hex_string ((unsigned long) sal
.pc
));
1482 print_address (next_address
, gdb_stdout
);
1483 printf_filtered (":");
1484 printf_filtered ("\t");
1486 next_address
= next_address
+ print_insn (next_address
, gdb_stdout
);
1487 printf_filtered ("\n");
1488 gdb_flush (gdb_stdout
);
1494 static gdbarch_init_ftype d10v_gdbarch_init
;
1496 static struct gdbarch
*
1497 d10v_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1499 static LONGEST d10v_call_dummy_words
[] =
1501 struct gdbarch
*gdbarch
;
1503 struct gdbarch_tdep
*tdep
;
1504 gdbarch_register_name_ftype
*d10v_register_name
;
1505 gdbarch_register_sim_regno_ftype
*d10v_register_sim_regno
;
1507 /* Find a candidate among the list of pre-declared architectures. */
1508 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1510 return arches
->gdbarch
;
1512 /* None found, create a new architecture from the information
1514 tdep
= XMALLOC (struct gdbarch_tdep
);
1515 gdbarch
= gdbarch_alloc (&info
, tdep
);
1517 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1518 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1519 set_gdbarch_deprecated_init_frame_pc (gdbarch
, init_frame_pc_default
);
1521 switch (info
.bfd_arch_info
->mach
)
1523 case bfd_mach_d10v_ts2
:
1525 d10v_register_name
= d10v_ts2_register_name
;
1526 d10v_register_sim_regno
= d10v_ts2_register_sim_regno
;
1527 tdep
->a0_regnum
= TS2_A0_REGNUM
;
1528 tdep
->nr_dmap_regs
= TS2_NR_DMAP_REGS
;
1529 tdep
->dmap_register
= d10v_ts2_dmap_register
;
1530 tdep
->imap_register
= d10v_ts2_imap_register
;
1533 case bfd_mach_d10v_ts3
:
1535 d10v_register_name
= d10v_ts3_register_name
;
1536 d10v_register_sim_regno
= d10v_ts3_register_sim_regno
;
1537 tdep
->a0_regnum
= TS3_A0_REGNUM
;
1538 tdep
->nr_dmap_regs
= TS3_NR_DMAP_REGS
;
1539 tdep
->dmap_register
= d10v_ts3_dmap_register
;
1540 tdep
->imap_register
= d10v_ts3_imap_register
;
1544 set_gdbarch_read_pc (gdbarch
, d10v_read_pc
);
1545 set_gdbarch_write_pc (gdbarch
, d10v_write_pc
);
1546 set_gdbarch_read_fp (gdbarch
, d10v_read_fp
);
1547 set_gdbarch_read_sp (gdbarch
, d10v_read_sp
);
1548 set_gdbarch_write_sp (gdbarch
, d10v_write_sp
);
1550 set_gdbarch_num_regs (gdbarch
, d10v_num_regs
);
1551 set_gdbarch_sp_regnum (gdbarch
, 15);
1552 set_gdbarch_fp_regnum (gdbarch
, 11);
1553 set_gdbarch_pc_regnum (gdbarch
, 18);
1554 set_gdbarch_register_name (gdbarch
, d10v_register_name
);
1555 set_gdbarch_register_size (gdbarch
, 2);
1556 set_gdbarch_register_bytes (gdbarch
, (d10v_num_regs
- 2) * 2 + 16);
1557 set_gdbarch_register_byte (gdbarch
, d10v_register_byte
);
1558 set_gdbarch_register_raw_size (gdbarch
, d10v_register_raw_size
);
1559 set_gdbarch_max_register_raw_size (gdbarch
, 8);
1560 set_gdbarch_register_virtual_size (gdbarch
, generic_register_size
);
1561 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
1562 set_gdbarch_register_virtual_type (gdbarch
, d10v_register_virtual_type
);
1564 set_gdbarch_ptr_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1565 set_gdbarch_addr_bit (gdbarch
, 32);
1566 set_gdbarch_address_to_pointer (gdbarch
, d10v_address_to_pointer
);
1567 set_gdbarch_pointer_to_address (gdbarch
, d10v_pointer_to_address
);
1568 set_gdbarch_integer_to_address (gdbarch
, d10v_integer_to_address
);
1569 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1570 set_gdbarch_int_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1571 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1572 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1573 /* NOTE: The d10v as a 32 bit ``float'' and ``double''. ``long
1574 double'' is 64 bits. */
1575 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1576 set_gdbarch_double_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1577 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1578 switch (info
.byte_order
)
1580 case BFD_ENDIAN_BIG
:
1581 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_big
);
1582 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_single_big
);
1583 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
1585 case BFD_ENDIAN_LITTLE
:
1586 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_little
);
1587 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_single_little
);
1588 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_little
);
1591 internal_error (__FILE__
, __LINE__
,
1592 "d10v_gdbarch_init: bad byte order for float format");
1595 set_gdbarch_call_dummy_length (gdbarch
, 0);
1596 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
1597 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
1598 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
1599 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
1600 set_gdbarch_call_dummy_words (gdbarch
, d10v_call_dummy_words
);
1601 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (d10v_call_dummy_words
));
1602 set_gdbarch_call_dummy_p (gdbarch
, 1);
1603 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
1604 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
1606 set_gdbarch_deprecated_extract_return_value (gdbarch
, d10v_extract_return_value
);
1607 set_gdbarch_push_arguments (gdbarch
, d10v_push_arguments
);
1608 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
1609 set_gdbarch_push_return_address (gdbarch
, d10v_push_return_address
);
1611 set_gdbarch_store_struct_return (gdbarch
, d10v_store_struct_return
);
1612 set_gdbarch_deprecated_store_return_value (gdbarch
, d10v_store_return_value
);
1613 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, d10v_extract_struct_value_address
);
1614 set_gdbarch_use_struct_convention (gdbarch
, d10v_use_struct_convention
);
1616 set_gdbarch_frame_init_saved_regs (gdbarch
, d10v_frame_init_saved_regs
);
1617 set_gdbarch_init_extra_frame_info (gdbarch
, d10v_init_extra_frame_info
);
1619 set_gdbarch_pop_frame (gdbarch
, d10v_pop_frame
);
1621 set_gdbarch_skip_prologue (gdbarch
, d10v_skip_prologue
);
1622 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1623 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
1624 set_gdbarch_function_start_offset (gdbarch
, 0);
1625 set_gdbarch_breakpoint_from_pc (gdbarch
, d10v_breakpoint_from_pc
);
1627 set_gdbarch_remote_translate_xfer_address (gdbarch
, remote_d10v_translate_xfer_address
);
1629 set_gdbarch_frame_args_skip (gdbarch
, 0);
1630 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
1631 set_gdbarch_frame_chain (gdbarch
, d10v_frame_chain
);
1632 set_gdbarch_frame_chain_valid (gdbarch
, d10v_frame_chain_valid
);
1633 set_gdbarch_frame_saved_pc (gdbarch
, d10v_frame_saved_pc
);
1635 set_gdbarch_saved_pc_after_call (gdbarch
, d10v_saved_pc_after_call
);
1636 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
1637 set_gdbarch_stack_align (gdbarch
, d10v_stack_align
);
1639 set_gdbarch_register_sim_regno (gdbarch
, d10v_register_sim_regno
);
1640 set_gdbarch_extra_stack_alignment_needed (gdbarch
, 0);
1646 extern void (*target_resume_hook
) (void);
1647 extern void (*target_wait_loop_hook
) (void);
1650 _initialize_d10v_tdep (void)
1652 register_gdbarch_init (bfd_arch_d10v
, d10v_gdbarch_init
);
1654 tm_print_insn
= print_insn_d10v
;
1656 target_resume_hook
= d10v_eva_prepare_to_trace
;
1657 target_wait_loop_hook
= d10v_eva_get_trace_data
;
1659 add_com ("regs", class_vars
, show_regs
, "Print all registers");
1661 add_com ("itrace", class_support
, trace_command
,
1662 "Enable tracing of instruction execution.");
1664 add_com ("iuntrace", class_support
, untrace_command
,
1665 "Disable tracing of instruction execution.");
1667 add_com ("itdisassemble", class_vars
, tdisassemble_command
,
1668 "Disassemble the trace buffer.\n\
1669 Two optional arguments specify a range of trace buffer entries\n\
1670 as reported by info trace (NOT addresses!).");
1672 add_info ("itrace", trace_info
,
1673 "Display info about the trace data buffer.");
1675 add_show_from_set (add_set_cmd ("itracedisplay", no_class
,
1676 var_integer
, (char *) &trace_display
,
1677 "Set automatic display of trace.\n", &setlist
),
1679 add_show_from_set (add_set_cmd ("itracesource", no_class
,
1680 var_integer
, (char *) &default_trace_show_source
,
1681 "Set display of source code with trace.\n", &setlist
),