import gdb-1999-06-07 snapshot
[binutils-gdb.git] / gdb / d10v-tdep.c
1 /* Target-dependent code for Mitsubishi D10V, for GDB.
2 Copyright (C) 1996, 1997 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 /* Contributed by Martin Hunt, hunt@cygnus.com */
21
22 #include "defs.h"
23 #include "frame.h"
24 #include "obstack.h"
25 #include "symtab.h"
26 #include "gdbtypes.h"
27 #include "gdbcmd.h"
28 #include "gdbcore.h"
29 #include "gdb_string.h"
30 #include "value.h"
31 #include "inferior.h"
32 #include "dis-asm.h"
33 #include "symfile.h"
34 #include "objfiles.h"
35
36 struct frame_extra_info
37 {
38 CORE_ADDR return_pc;
39 int frameless;
40 int size;
41 };
42
43 /* these are the addresses the D10V-EVA board maps data */
44 /* and instruction memory to. */
45
46 #define DMEM_START 0x0000000
47 #define IMEM_START 0x1000000
48 #define STACK_START 0x0007ffe
49
50 /* d10v register naming conventions */
51
52 #define ARG1_REGNUM R0_REGNUM
53 #define ARGN_REGNUM 3
54 #define RET1_REGNUM R0_REGNUM
55
56 /* Local functions */
57
58 extern void _initialize_d10v_tdep PARAMS ((void));
59
60 static void d10v_eva_prepare_to_trace PARAMS ((void));
61
62 static void d10v_eva_get_trace_data PARAMS ((void));
63
64 static int prologue_find_regs PARAMS ((unsigned short op, struct frame_info *fi, CORE_ADDR addr));
65
66 extern void d10v_frame_init_saved_regs PARAMS ((struct frame_info *));
67
68 static void do_d10v_pop_frame PARAMS ((struct frame_info *fi));
69
70 /* FIXME */
71 extern void remote_d10v_translate_xfer_address PARAMS ((CORE_ADDR gdb_addr, int gdb_len, CORE_ADDR *rem_addr, int *rem_len));
72
73 int
74 d10v_frame_chain_valid (chain, frame)
75 CORE_ADDR chain;
76 struct frame_info *frame; /* not used here */
77 {
78 return ((chain) != 0 && (frame) != 0 && (frame)->pc > IMEM_START);
79 }
80
81
82 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
83 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
84 and TYPE is the type (which is known to be struct, union or array).
85
86 The d10v returns anything less than 8 bytes in size in
87 registers. */
88
89 int
90 d10v_use_struct_convention (gcc_p, type)
91 int gcc_p;
92 struct type *type;
93 {
94 return (TYPE_LENGTH (type) > 8);
95 }
96
97
98 unsigned char *
99 d10v_breakpoint_from_pc (pcptr, lenptr)
100 CORE_ADDR *pcptr;
101 int *lenptr;
102 {
103 static unsigned char breakpoint [] = {0x2f, 0x90, 0x5e, 0x00};
104 *lenptr = sizeof (breakpoint);
105 return breakpoint;
106 }
107
108 char *
109 d10v_register_name (reg_nr)
110 int reg_nr;
111 {
112 static char *register_names[] = {
113 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
114 "r8", "r9", "r10","r11","r12", "r13", "r14","r15",
115 "psw","bpsw","pc","bpc", "cr4", "cr5", "cr6", "rpt_c",
116 "rpt_s","rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
117 "imap0","imap1","dmap","a0", "a1"
118 };
119 if (reg_nr < 0)
120 return NULL;
121 if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
122 return NULL;
123 return register_names [reg_nr];
124 }
125
126
127 /* Index within `registers' of the first byte of the space for
128 register REG_NR. */
129
130 int
131 d10v_register_byte (reg_nr)
132 int reg_nr;
133 {
134 if (reg_nr > A0_REGNUM)
135 return ((reg_nr - A0_REGNUM) * 8 + (A0_REGNUM * 2));
136 else
137 return (reg_nr * 2);
138 }
139
140 /* Number of bytes of storage in the actual machine representation for
141 register REG_NR. */
142
143 int
144 d10v_register_raw_size (reg_nr)
145 int reg_nr;
146 {
147 if (reg_nr >= A0_REGNUM)
148 return 8;
149 else
150 return 2;
151 }
152
153 /* Number of bytes of storage in the program's representation
154 for register N. */
155
156 int
157 d10v_register_virtual_size (reg_nr)
158 int reg_nr;
159 {
160 if (reg_nr >= A0_REGNUM)
161 return 8;
162 else if (reg_nr == PC_REGNUM || reg_nr == SP_REGNUM)
163 return 4;
164 else
165 return 2;
166 }
167
168 /* Return the GDB type object for the "standard" data type
169 of data in register N. */
170
171 struct type *
172 d10v_register_virtual_type (reg_nr)
173 int reg_nr;
174 {
175 if (reg_nr >= A0_REGNUM)
176 return builtin_type_long_long;
177 else if (reg_nr == PC_REGNUM || reg_nr == SP_REGNUM)
178 return builtin_type_long;
179 else
180 return builtin_type_short;
181 }
182
183 /* convert $pc and $sp to/from virtual addresses */
184 int
185 d10v_register_convertible (nr)
186 int nr;
187 {
188 return ((nr) == PC_REGNUM || (nr) == SP_REGNUM);
189 }
190
191 void
192 d10v_register_convert_to_virtual (regnum, type, from, to)
193 int regnum;
194 struct type *type;
195 char *from;
196 char *to;
197 {
198 ULONGEST x = extract_unsigned_integer (from, REGISTER_RAW_SIZE (regnum));
199 if (regnum == PC_REGNUM)
200 x = (x << 2) | IMEM_START;
201 else
202 x |= DMEM_START;
203 store_unsigned_integer (to, TYPE_LENGTH (type), x);
204 }
205
206 void
207 d10v_register_convert_to_raw (type, regnum, from, to)
208 struct type *type;
209 int regnum;
210 char *from;
211 char *to;
212 {
213 ULONGEST x = extract_unsigned_integer (from, TYPE_LENGTH (type));
214 x &= 0x3ffff;
215 if (regnum == PC_REGNUM)
216 x >>= 2;
217 store_unsigned_integer (to, 2, x);
218 }
219
220
221 CORE_ADDR
222 d10v_make_daddr (x)
223 CORE_ADDR x;
224 {
225 return ((x) | DMEM_START);
226 }
227
228 CORE_ADDR
229 d10v_make_iaddr (x)
230 CORE_ADDR x;
231 {
232 return (((x) << 2) | IMEM_START);
233 }
234
235 int
236 d10v_daddr_p (x)
237 CORE_ADDR x;
238 {
239 return (((x) & 0x3000000) == DMEM_START);
240 }
241
242 int
243 d10v_iaddr_p (x)
244 CORE_ADDR x;
245 {
246 return (((x) & 0x3000000) == IMEM_START);
247 }
248
249
250 CORE_ADDR
251 d10v_convert_iaddr_to_raw (x)
252 CORE_ADDR x;
253 {
254 return (((x) >> 2) & 0xffff);
255 }
256
257 CORE_ADDR
258 d10v_convert_daddr_to_raw(x)
259 CORE_ADDR x;
260 {
261 return ((x) & 0xffff);
262 }
263
264 /* Store the address of the place in which to copy the structure the
265 subroutine will return. This is called from call_function.
266
267 We store structs through a pointer passed in the first Argument
268 register. */
269
270 void
271 d10v_store_struct_return (addr, sp)
272 CORE_ADDR addr;
273 CORE_ADDR sp;
274 {
275 write_register (ARG1_REGNUM, (addr));
276 }
277
278 /* Write into appropriate registers a function return value
279 of type TYPE, given in virtual format.
280
281 Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
282
283 void
284 d10v_store_return_value (type,valbuf)
285 struct type *type;
286 char *valbuf;
287 {
288 write_register_bytes (REGISTER_BYTE (RET1_REGNUM),
289 valbuf,
290 TYPE_LENGTH (type));
291 }
292
293 /* Extract from an array REGBUF containing the (raw) register state
294 the address in which a function should return its structure value,
295 as a CORE_ADDR (or an expression that can be used as one). */
296
297 CORE_ADDR
298 d10v_extract_struct_value_address (regbuf)
299 char *regbuf;
300 {
301 return (extract_address ((regbuf) + REGISTER_BYTE (ARG1_REGNUM),
302 REGISTER_RAW_SIZE (ARG1_REGNUM))
303 | DMEM_START);
304 }
305
306 CORE_ADDR
307 d10v_frame_saved_pc (frame)
308 struct frame_info *frame;
309 {
310 return ((frame)->extra_info->return_pc);
311 }
312
313 CORE_ADDR
314 d10v_frame_args_address (fi)
315 struct frame_info *fi;
316 {
317 return (fi)->frame;
318 }
319
320 CORE_ADDR
321 d10v_frame_locals_address (fi)
322 struct frame_info *fi;
323 {
324 return (fi)->frame;
325 }
326
327 /* Immediately after a function call, return the saved pc. We can't
328 use frame->return_pc beause that is determined by reading R13 off
329 the stack and that may not be written yet. */
330
331 CORE_ADDR
332 d10v_saved_pc_after_call (frame)
333 struct frame_info *frame;
334 {
335 return ((read_register(LR_REGNUM) << 2)
336 | IMEM_START);
337 }
338
339 /* Discard from the stack the innermost frame, restoring all saved
340 registers. */
341
342 void
343 d10v_pop_frame ()
344 {
345 generic_pop_current_frame (do_d10v_pop_frame);
346 }
347
348 static void
349 do_d10v_pop_frame (fi)
350 struct frame_info *fi;
351 {
352 CORE_ADDR fp;
353 int regnum;
354 char raw_buffer[8];
355
356 fp = FRAME_FP (fi);
357 /* fill out fsr with the address of where each */
358 /* register was stored in the frame */
359 d10v_frame_init_saved_regs (fi);
360
361 /* now update the current registers with the old values */
362 for (regnum = A0_REGNUM; regnum < A0_REGNUM+2 ; regnum++)
363 {
364 if (fi->saved_regs[regnum])
365 {
366 read_memory (fi->saved_regs[regnum], raw_buffer, REGISTER_RAW_SIZE(regnum));
367 write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, REGISTER_RAW_SIZE(regnum));
368 }
369 }
370 for (regnum = 0; regnum < SP_REGNUM; regnum++)
371 {
372 if (fi->saved_regs[regnum])
373 {
374 write_register (regnum, read_memory_unsigned_integer (fi->saved_regs[regnum], REGISTER_RAW_SIZE(regnum)));
375 }
376 }
377 if (fi->saved_regs[PSW_REGNUM])
378 {
379 write_register (PSW_REGNUM, read_memory_unsigned_integer (fi->saved_regs[PSW_REGNUM], REGISTER_RAW_SIZE(PSW_REGNUM)));
380 }
381
382 write_register (PC_REGNUM, read_register (LR_REGNUM));
383 write_register (SP_REGNUM, fp + fi->extra_info->size);
384 target_store_registers (-1);
385 flush_cached_frames ();
386 }
387
388 static int
389 check_prologue (op)
390 unsigned short op;
391 {
392 /* st rn, @-sp */
393 if ((op & 0x7E1F) == 0x6C1F)
394 return 1;
395
396 /* st2w rn, @-sp */
397 if ((op & 0x7E3F) == 0x6E1F)
398 return 1;
399
400 /* subi sp, n */
401 if ((op & 0x7FE1) == 0x01E1)
402 return 1;
403
404 /* mv r11, sp */
405 if (op == 0x417E)
406 return 1;
407
408 /* nop */
409 if (op == 0x5E00)
410 return 1;
411
412 /* st rn, @sp */
413 if ((op & 0x7E1F) == 0x681E)
414 return 1;
415
416 /* st2w rn, @sp */
417 if ((op & 0x7E3F) == 0x3A1E)
418 return 1;
419
420 return 0;
421 }
422
423 CORE_ADDR
424 d10v_skip_prologue (pc)
425 CORE_ADDR pc;
426 {
427 unsigned long op;
428 unsigned short op1, op2;
429 CORE_ADDR func_addr, func_end;
430 struct symtab_and_line sal;
431
432 /* If we have line debugging information, then the end of the */
433 /* prologue should the first assembly instruction of the first source line */
434 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
435 {
436 sal = find_pc_line (func_addr, 0);
437 if ( sal.end && sal.end < func_end)
438 return sal.end;
439 }
440
441 if (target_read_memory (pc, (char *)&op, 4))
442 return pc; /* Can't access it -- assume no prologue. */
443
444 while (1)
445 {
446 op = (unsigned long)read_memory_integer (pc, 4);
447 if ((op & 0xC0000000) == 0xC0000000)
448 {
449 /* long instruction */
450 if ( ((op & 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
451 ((op & 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
452 ((op & 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
453 break;
454 }
455 else
456 {
457 /* short instructions */
458 if ((op & 0xC0000000) == 0x80000000)
459 {
460 op2 = (op & 0x3FFF8000) >> 15;
461 op1 = op & 0x7FFF;
462 }
463 else
464 {
465 op1 = (op & 0x3FFF8000) >> 15;
466 op2 = op & 0x7FFF;
467 }
468 if (check_prologue(op1))
469 {
470 if (!check_prologue(op2))
471 {
472 /* if the previous opcode was really part of the prologue */
473 /* and not just a NOP, then we want to break after both instructions */
474 if (op1 != 0x5E00)
475 pc += 4;
476 break;
477 }
478 }
479 else
480 break;
481 }
482 pc += 4;
483 }
484 return pc;
485 }
486
487 /* Given a GDB frame, determine the address of the calling function's frame.
488 This will be used to create a new GDB frame struct, and then
489 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
490 */
491
492 CORE_ADDR
493 d10v_frame_chain (fi)
494 struct frame_info *fi;
495 {
496 d10v_frame_init_saved_regs (fi);
497
498 if (fi->extra_info->return_pc == IMEM_START
499 || inside_entry_file (fi->extra_info->return_pc))
500 return (CORE_ADDR)0;
501
502 if (!fi->saved_regs[FP_REGNUM])
503 {
504 if (!fi->saved_regs[SP_REGNUM]
505 || fi->saved_regs[SP_REGNUM] == STACK_START)
506 return (CORE_ADDR)0;
507
508 return fi->saved_regs[SP_REGNUM];
509 }
510
511 if (!read_memory_unsigned_integer(fi->saved_regs[FP_REGNUM],
512 REGISTER_RAW_SIZE(FP_REGNUM)))
513 return (CORE_ADDR)0;
514
515 return D10V_MAKE_DADDR (read_memory_unsigned_integer (fi->saved_regs[FP_REGNUM],
516 REGISTER_RAW_SIZE (FP_REGNUM)));
517 }
518
519 static int next_addr, uses_frame;
520
521 static int
522 prologue_find_regs (op, fi, addr)
523 unsigned short op;
524 struct frame_info *fi;
525 CORE_ADDR addr;
526 {
527 int n;
528
529 /* st rn, @-sp */
530 if ((op & 0x7E1F) == 0x6C1F)
531 {
532 n = (op & 0x1E0) >> 5;
533 next_addr -= 2;
534 fi->saved_regs[n] = next_addr;
535 return 1;
536 }
537
538 /* st2w rn, @-sp */
539 else if ((op & 0x7E3F) == 0x6E1F)
540 {
541 n = (op & 0x1E0) >> 5;
542 next_addr -= 4;
543 fi->saved_regs[n] = next_addr;
544 fi->saved_regs[n+1] = next_addr+2;
545 return 1;
546 }
547
548 /* subi sp, n */
549 if ((op & 0x7FE1) == 0x01E1)
550 {
551 n = (op & 0x1E) >> 1;
552 if (n == 0)
553 n = 16;
554 next_addr -= n;
555 return 1;
556 }
557
558 /* mv r11, sp */
559 if (op == 0x417E)
560 {
561 uses_frame = 1;
562 return 1;
563 }
564
565 /* nop */
566 if (op == 0x5E00)
567 return 1;
568
569 /* st rn, @sp */
570 if ((op & 0x7E1F) == 0x681E)
571 {
572 n = (op & 0x1E0) >> 5;
573 fi->saved_regs[n] = next_addr;
574 return 1;
575 }
576
577 /* st2w rn, @sp */
578 if ((op & 0x7E3F) == 0x3A1E)
579 {
580 n = (op & 0x1E0) >> 5;
581 fi->saved_regs[n] = next_addr;
582 fi->saved_regs[n+1] = next_addr+2;
583 return 1;
584 }
585
586 return 0;
587 }
588
589 /* Put here the code to store, into fi->saved_regs, the addresses of
590 the saved registers of frame described by FRAME_INFO. This
591 includes special registers such as pc and fp saved in special ways
592 in the stack frame. sp is even more special: the address we return
593 for it IS the sp for the next frame. */
594
595 void
596 d10v_frame_init_saved_regs (fi)
597 struct frame_info *fi;
598 {
599 CORE_ADDR fp, pc;
600 unsigned long op;
601 unsigned short op1, op2;
602 int i;
603
604 fp = fi->frame;
605 memset (fi->saved_regs, 0, SIZEOF_FRAME_SAVED_REGS);
606 next_addr = 0;
607
608 pc = get_pc_function_start (fi->pc);
609
610 uses_frame = 0;
611 while (1)
612 {
613 op = (unsigned long)read_memory_integer (pc, 4);
614 if ((op & 0xC0000000) == 0xC0000000)
615 {
616 /* long instruction */
617 if ((op & 0x3FFF0000) == 0x01FF0000)
618 {
619 /* add3 sp,sp,n */
620 short n = op & 0xFFFF;
621 next_addr += n;
622 }
623 else if ((op & 0x3F0F0000) == 0x340F0000)
624 {
625 /* st rn, @(offset,sp) */
626 short offset = op & 0xFFFF;
627 short n = (op >> 20) & 0xF;
628 fi->saved_regs[n] = next_addr + offset;
629 }
630 else if ((op & 0x3F1F0000) == 0x350F0000)
631 {
632 /* st2w rn, @(offset,sp) */
633 short offset = op & 0xFFFF;
634 short n = (op >> 20) & 0xF;
635 fi->saved_regs[n] = next_addr + offset;
636 fi->saved_regs[n+1] = next_addr + offset + 2;
637 }
638 else
639 break;
640 }
641 else
642 {
643 /* short instructions */
644 if ((op & 0xC0000000) == 0x80000000)
645 {
646 op2 = (op & 0x3FFF8000) >> 15;
647 op1 = op & 0x7FFF;
648 }
649 else
650 {
651 op1 = (op & 0x3FFF8000) >> 15;
652 op2 = op & 0x7FFF;
653 }
654 if (!prologue_find_regs(op1, fi, pc) || !prologue_find_regs(op2, fi, pc))
655 break;
656 }
657 pc += 4;
658 }
659
660 fi->extra_info->size = -next_addr;
661
662 if (!(fp & 0xffff))
663 fp = D10V_MAKE_DADDR (read_register(SP_REGNUM));
664
665 for (i=0; i<NUM_REGS-1; i++)
666 if (fi->saved_regs[i])
667 {
668 fi->saved_regs[i] = fp - (next_addr - fi->saved_regs[i]);
669 }
670
671 if (fi->saved_regs[LR_REGNUM])
672 {
673 CORE_ADDR return_pc = read_memory_unsigned_integer (fi->saved_regs[LR_REGNUM], REGISTER_RAW_SIZE (LR_REGNUM));
674 fi->extra_info->return_pc = D10V_MAKE_IADDR (return_pc);
675 }
676 else
677 {
678 fi->extra_info->return_pc = D10V_MAKE_IADDR (read_register(LR_REGNUM));
679 }
680
681 /* th SP is not normally (ever?) saved, but check anyway */
682 if (!fi->saved_regs[SP_REGNUM])
683 {
684 /* if the FP was saved, that means the current FP is valid, */
685 /* otherwise, it isn't being used, so we use the SP instead */
686 if (uses_frame)
687 fi->saved_regs[SP_REGNUM] = read_register(FP_REGNUM) + fi->extra_info->size;
688 else
689 {
690 fi->saved_regs[SP_REGNUM] = fp + fi->extra_info->size;
691 fi->extra_info->frameless = 1;
692 fi->saved_regs[FP_REGNUM] = 0;
693 }
694 }
695 }
696
697 void
698 d10v_init_extra_frame_info (fromleaf, fi)
699 int fromleaf;
700 struct frame_info *fi;
701 {
702 fi->extra_info = (struct frame_extra_info *)
703 frame_obstack_alloc (sizeof (struct frame_extra_info));
704 frame_saved_regs_zalloc (fi);
705
706 fi->extra_info->frameless = 0;
707 fi->extra_info->size = 0;
708 fi->extra_info->return_pc = 0;
709
710 /* The call dummy doesn't save any registers on the stack, so we can
711 return now. */
712 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
713 {
714 return;
715 }
716 else
717 {
718 d10v_frame_init_saved_regs (fi);
719 }
720 }
721
722 static void
723 show_regs (args, from_tty)
724 char *args;
725 int from_tty;
726 {
727 int a;
728 printf_filtered ("PC=%04x (0x%x) PSW=%04x RPT_S=%04x RPT_E=%04x RPT_C=%04x\n",
729 read_register (PC_REGNUM), D10V_MAKE_IADDR (read_register (PC_REGNUM)),
730 read_register (PSW_REGNUM),
731 read_register (24),
732 read_register (25),
733 read_register (23));
734 printf_filtered ("R0-R7 %04x %04x %04x %04x %04x %04x %04x %04x\n",
735 read_register (0),
736 read_register (1),
737 read_register (2),
738 read_register (3),
739 read_register (4),
740 read_register (5),
741 read_register (6),
742 read_register (7));
743 printf_filtered ("R8-R15 %04x %04x %04x %04x %04x %04x %04x %04x\n",
744 read_register (8),
745 read_register (9),
746 read_register (10),
747 read_register (11),
748 read_register (12),
749 read_register (13),
750 read_register (14),
751 read_register (15));
752 printf_filtered ("IMAP0 %04x IMAP1 %04x DMAP %04x\n",
753 read_register (IMAP0_REGNUM),
754 read_register (IMAP1_REGNUM),
755 read_register (DMAP_REGNUM));
756 printf_filtered ("A0-A1");
757 for (a = A0_REGNUM; a <= A0_REGNUM + 1; a++)
758 {
759 char num[MAX_REGISTER_RAW_SIZE];
760 int i;
761 printf_filtered (" ");
762 read_register_gen (a, (char *)&num);
763 for (i = 0; i < MAX_REGISTER_RAW_SIZE; i++)
764 {
765 printf_filtered ("%02x", (num[i] & 0xff));
766 }
767 }
768 printf_filtered ("\n");
769 }
770
771 CORE_ADDR
772 d10v_read_pc (pid)
773 int pid;
774 {
775 int save_pid;
776 CORE_ADDR pc;
777 CORE_ADDR retval;
778
779 save_pid = inferior_pid;
780 inferior_pid = pid;
781 pc = (int) read_register (PC_REGNUM);
782 inferior_pid = save_pid;
783 retval = D10V_MAKE_IADDR (pc);
784 return retval;
785 }
786
787 void
788 d10v_write_pc (val, pid)
789 CORE_ADDR val;
790 int pid;
791 {
792 int save_pid;
793
794 save_pid = inferior_pid;
795 inferior_pid = pid;
796 write_register (PC_REGNUM, D10V_CONVERT_IADDR_TO_RAW (val));
797 inferior_pid = save_pid;
798 }
799
800 CORE_ADDR
801 d10v_read_sp ()
802 {
803 return (D10V_MAKE_DADDR (read_register (SP_REGNUM)));
804 }
805
806 void
807 d10v_write_sp (val)
808 CORE_ADDR val;
809 {
810 write_register (SP_REGNUM, D10V_CONVERT_DADDR_TO_RAW (val));
811 }
812
813 void
814 d10v_write_fp (val)
815 CORE_ADDR val;
816 {
817 write_register (FP_REGNUM, D10V_CONVERT_DADDR_TO_RAW (val));
818 }
819
820 CORE_ADDR
821 d10v_read_fp ()
822 {
823 return (D10V_MAKE_DADDR (read_register(FP_REGNUM)));
824 }
825
826 /* Function: push_return_address (pc)
827 Set up the return address for the inferior function call.
828 Needed for targets where we don't actually execute a JSR/BSR instruction */
829
830 CORE_ADDR
831 d10v_push_return_address (pc, sp)
832 CORE_ADDR pc;
833 CORE_ADDR sp;
834 {
835 write_register (LR_REGNUM, D10V_CONVERT_IADDR_TO_RAW (CALL_DUMMY_ADDRESS ()));
836 return sp;
837 }
838
839
840 /* When arguments must be pushed onto the stack, they go on in reverse
841 order. The below implements a FILO (stack) to do this. */
842
843 struct stack_item
844 {
845 int len;
846 struct stack_item *prev;
847 void *data;
848 };
849
850 static struct stack_item *push_stack_item PARAMS ((struct stack_item *prev, void *contents, int len));
851 static struct stack_item *
852 push_stack_item (prev, contents, len)
853 struct stack_item *prev;
854 void *contents;
855 int len;
856 {
857 struct stack_item *si;
858 si = xmalloc (sizeof (struct stack_item));
859 si->data = xmalloc (len);
860 si->len = len;
861 si->prev = prev;
862 memcpy (si->data, contents, len);
863 return si;
864 }
865
866 static struct stack_item *pop_stack_item PARAMS ((struct stack_item *si));
867 static struct stack_item *
868 pop_stack_item (si)
869 struct stack_item *si;
870 {
871 struct stack_item *dead = si;
872 si = si->prev;
873 free (dead->data);
874 free (dead);
875 return si;
876 }
877
878
879 CORE_ADDR
880 d10v_push_arguments (nargs, args, sp, struct_return, struct_addr)
881 int nargs;
882 value_ptr *args;
883 CORE_ADDR sp;
884 int struct_return;
885 CORE_ADDR struct_addr;
886 {
887 int i;
888 int regnum = ARG1_REGNUM;
889 struct stack_item *si = NULL;
890
891 /* Fill in registers and arg lists */
892 for (i = 0; i < nargs; i++)
893 {
894 value_ptr arg = args[i];
895 struct type *type = check_typedef (VALUE_TYPE (arg));
896 char *contents = VALUE_CONTENTS (arg);
897 int len = TYPE_LENGTH (type);
898 /* printf ("push: type=%d len=%d\n", type->code, len); */
899 if (TYPE_CODE (type) == TYPE_CODE_PTR)
900 {
901 /* pointers require special handling - first convert and
902 then store */
903 long val = extract_signed_integer (contents, len);
904 len = 2;
905 if (TYPE_TARGET_TYPE (type)
906 && (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC))
907 {
908 /* function pointer */
909 val = D10V_CONVERT_IADDR_TO_RAW (val);
910 }
911 else if (D10V_IADDR_P (val))
912 {
913 /* also function pointer! */
914 val = D10V_CONVERT_DADDR_TO_RAW (val);
915 }
916 else
917 {
918 /* data pointer */
919 val &= 0xFFFF;
920 }
921 if (regnum <= ARGN_REGNUM)
922 write_register (regnum++, val & 0xffff);
923 else
924 {
925 char ptr[2];
926 /* arg will go onto stack */
927 store_address (ptr, val & 0xffff, 2);
928 si = push_stack_item (si, ptr, 2);
929 }
930 }
931 else
932 {
933 int aligned_regnum = (regnum + 1) & ~1;
934 if (len <= 2 && regnum <= ARGN_REGNUM)
935 /* fits in a single register, do not align */
936 {
937 long val = extract_unsigned_integer (contents, len);
938 write_register (regnum++, val);
939 }
940 else if (len <= (ARGN_REGNUM - aligned_regnum + 1) * 2)
941 /* value fits in remaining registers, store keeping left
942 aligned */
943 {
944 int b;
945 regnum = aligned_regnum;
946 for (b = 0; b < (len & ~1); b += 2)
947 {
948 long val = extract_unsigned_integer (&contents[b], 2);
949 write_register (regnum++, val);
950 }
951 if (b < len)
952 {
953 long val = extract_unsigned_integer (&contents[b], 1);
954 write_register (regnum++, (val << 8));
955 }
956 }
957 else
958 {
959 /* arg will go onto stack */
960 regnum = ARGN_REGNUM + 1;
961 si = push_stack_item (si, contents, len);
962 }
963 }
964 }
965
966 while (si)
967 {
968 sp = (sp - si->len) & ~1;
969 write_memory (sp, si->data, si->len);
970 si = pop_stack_item (si);
971 }
972
973 return sp;
974 }
975
976
977 /* Given a return value in `regbuf' with a type `valtype',
978 extract and copy its value into `valbuf'. */
979
980 void
981 d10v_extract_return_value (type, regbuf, valbuf)
982 struct type *type;
983 char regbuf[REGISTER_BYTES];
984 char *valbuf;
985 {
986 int len;
987 /* printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM))); */
988 if (TYPE_CODE (type) == TYPE_CODE_PTR
989 && TYPE_TARGET_TYPE (type)
990 && (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC))
991 {
992 /* pointer to function */
993 int num;
994 short snum;
995 snum = extract_address (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM));
996 store_address ( valbuf, 4, D10V_MAKE_IADDR(snum));
997 }
998 else if (TYPE_CODE(type) == TYPE_CODE_PTR)
999 {
1000 /* pointer to data */
1001 int num;
1002 short snum;
1003 snum = extract_address (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM));
1004 store_address ( valbuf, 4, D10V_MAKE_DADDR(snum));
1005 }
1006 else
1007 {
1008 len = TYPE_LENGTH (type);
1009 if (len == 1)
1010 {
1011 unsigned short c = extract_unsigned_integer (regbuf + REGISTER_BYTE (RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM));
1012 store_unsigned_integer (valbuf, 1, c);
1013 }
1014 else if ((len & 1) == 0)
1015 memcpy (valbuf, regbuf + REGISTER_BYTE (RET1_REGNUM), len);
1016 else
1017 {
1018 /* For return values of odd size, the first byte is in the
1019 least significant part of the first register. The
1020 remaining bytes in remaining registers. Interestingly,
1021 when such values are passed in, the last byte is in the
1022 most significant byte of that same register - wierd. */
1023 memcpy (valbuf, regbuf + REGISTER_BYTE (RET1_REGNUM) + 1, len);
1024 }
1025 }
1026 }
1027
1028 /* The following code implements access to, and display of, the D10V's
1029 instruction trace buffer. The buffer consists of 64K or more
1030 4-byte words of data, of which each words includes an 8-bit count,
1031 an 8-bit segment number, and a 16-bit instruction address.
1032
1033 In theory, the trace buffer is continuously capturing instruction
1034 data that the CPU presents on its "debug bus", but in practice, the
1035 ROMified GDB stub only enables tracing when it continues or steps
1036 the program, and stops tracing when the program stops; so it
1037 actually works for GDB to read the buffer counter out of memory and
1038 then read each trace word. The counter records where the tracing
1039 stops, but there is no record of where it started, so we remember
1040 the PC when we resumed and then search backwards in the trace
1041 buffer for a word that includes that address. This is not perfect,
1042 because you will miss trace data if the resumption PC is the target
1043 of a branch. (The value of the buffer counter is semi-random, any
1044 trace data from a previous program stop is gone.) */
1045
1046 /* The address of the last word recorded in the trace buffer. */
1047
1048 #define DBBC_ADDR (0xd80000)
1049
1050 /* The base of the trace buffer, at least for the "Board_0". */
1051
1052 #define TRACE_BUFFER_BASE (0xf40000)
1053
1054 static void trace_command PARAMS ((char *, int));
1055
1056 static void untrace_command PARAMS ((char *, int));
1057
1058 static void trace_info PARAMS ((char *, int));
1059
1060 static void tdisassemble_command PARAMS ((char *, int));
1061
1062 static void display_trace PARAMS ((int, int));
1063
1064 /* True when instruction traces are being collected. */
1065
1066 static int tracing;
1067
1068 /* Remembered PC. */
1069
1070 static CORE_ADDR last_pc;
1071
1072 /* True when trace output should be displayed whenever program stops. */
1073
1074 static int trace_display;
1075
1076 /* True when trace listing should include source lines. */
1077
1078 static int default_trace_show_source = 1;
1079
1080 struct trace_buffer {
1081 int size;
1082 short *counts;
1083 CORE_ADDR *addrs;
1084 } trace_data;
1085
1086 static void
1087 trace_command (args, from_tty)
1088 char *args;
1089 int from_tty;
1090 {
1091 /* Clear the host-side trace buffer, allocating space if needed. */
1092 trace_data.size = 0;
1093 if (trace_data.counts == NULL)
1094 trace_data.counts = (short *) xmalloc (65536 * sizeof(short));
1095 if (trace_data.addrs == NULL)
1096 trace_data.addrs = (CORE_ADDR *) xmalloc (65536 * sizeof(CORE_ADDR));
1097
1098 tracing = 1;
1099
1100 printf_filtered ("Tracing is now on.\n");
1101 }
1102
1103 static void
1104 untrace_command (args, from_tty)
1105 char *args;
1106 int from_tty;
1107 {
1108 tracing = 0;
1109
1110 printf_filtered ("Tracing is now off.\n");
1111 }
1112
1113 static void
1114 trace_info (args, from_tty)
1115 char *args;
1116 int from_tty;
1117 {
1118 int i;
1119
1120 if (trace_data.size)
1121 {
1122 printf_filtered ("%d entries in trace buffer:\n", trace_data.size);
1123
1124 for (i = 0; i < trace_data.size; ++i)
1125 {
1126 printf_filtered ("%d: %d instruction%s at 0x%x\n",
1127 i, trace_data.counts[i],
1128 (trace_data.counts[i] == 1 ? "" : "s"),
1129 trace_data.addrs[i]);
1130 }
1131 }
1132 else
1133 printf_filtered ("No entries in trace buffer.\n");
1134
1135 printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off"));
1136 }
1137
1138 /* Print the instruction at address MEMADDR in debugged memory,
1139 on STREAM. Returns length of the instruction, in bytes. */
1140
1141 static int
1142 print_insn (memaddr, stream)
1143 CORE_ADDR memaddr;
1144 GDB_FILE *stream;
1145 {
1146 /* If there's no disassembler, something is very wrong. */
1147 if (tm_print_insn == NULL)
1148 abort ();
1149
1150 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1151 tm_print_insn_info.endian = BFD_ENDIAN_BIG;
1152 else
1153 tm_print_insn_info.endian = BFD_ENDIAN_LITTLE;
1154 return (*tm_print_insn) (memaddr, &tm_print_insn_info);
1155 }
1156
1157 static void
1158 d10v_eva_prepare_to_trace ()
1159 {
1160 if (!tracing)
1161 return;
1162
1163 last_pc = read_register (PC_REGNUM);
1164 }
1165
1166 /* Collect trace data from the target board and format it into a form
1167 more useful for display. */
1168
1169 static void
1170 d10v_eva_get_trace_data ()
1171 {
1172 int count, i, j, oldsize;
1173 int trace_addr, trace_seg, trace_cnt, next_cnt;
1174 unsigned int last_trace, trace_word, next_word;
1175 unsigned int *tmpspace;
1176
1177 if (!tracing)
1178 return;
1179
1180 tmpspace = xmalloc (65536 * sizeof(unsigned int));
1181
1182 last_trace = read_memory_unsigned_integer (DBBC_ADDR, 2) << 2;
1183
1184 /* Collect buffer contents from the target, stopping when we reach
1185 the word recorded when execution resumed. */
1186
1187 count = 0;
1188 while (last_trace > 0)
1189 {
1190 QUIT;
1191 trace_word =
1192 read_memory_unsigned_integer (TRACE_BUFFER_BASE + last_trace, 4);
1193 trace_addr = trace_word & 0xffff;
1194 last_trace -= 4;
1195 /* Ignore an apparently nonsensical entry. */
1196 if (trace_addr == 0xffd5)
1197 continue;
1198 tmpspace[count++] = trace_word;
1199 if (trace_addr == last_pc)
1200 break;
1201 if (count > 65535)
1202 break;
1203 }
1204
1205 /* Move the data to the host-side trace buffer, adjusting counts to
1206 include the last instruction executed and transforming the address
1207 into something that GDB likes. */
1208
1209 for (i = 0; i < count; ++i)
1210 {
1211 trace_word = tmpspace[i];
1212 next_word = ((i == 0) ? 0 : tmpspace[i - 1]);
1213 trace_addr = trace_word & 0xffff;
1214 next_cnt = (next_word >> 24) & 0xff;
1215 j = trace_data.size + count - i - 1;
1216 trace_data.addrs[j] = (trace_addr << 2) + 0x1000000;
1217 trace_data.counts[j] = next_cnt + 1;
1218 }
1219
1220 oldsize = trace_data.size;
1221 trace_data.size += count;
1222
1223 free (tmpspace);
1224
1225 if (trace_display)
1226 display_trace (oldsize, trace_data.size);
1227 }
1228
1229 static void
1230 tdisassemble_command (arg, from_tty)
1231 char *arg;
1232 int from_tty;
1233 {
1234 int i, count;
1235 CORE_ADDR low, high;
1236 char *space_index;
1237
1238 if (!arg)
1239 {
1240 low = 0;
1241 high = trace_data.size;
1242 }
1243 else if (!(space_index = (char *) strchr (arg, ' ')))
1244 {
1245 low = parse_and_eval_address (arg);
1246 high = low + 5;
1247 }
1248 else
1249 {
1250 /* Two arguments. */
1251 *space_index = '\0';
1252 low = parse_and_eval_address (arg);
1253 high = parse_and_eval_address (space_index + 1);
1254 if (high < low)
1255 high = low;
1256 }
1257
1258 printf_filtered ("Dump of trace from %d to %d:\n", low, high);
1259
1260 display_trace (low, high);
1261
1262 printf_filtered ("End of trace dump.\n");
1263 gdb_flush (gdb_stdout);
1264 }
1265
1266 static void
1267 display_trace (low, high)
1268 int low, high;
1269 {
1270 int i, count, trace_show_source, first, suppress;
1271 CORE_ADDR next_address;
1272
1273 trace_show_source = default_trace_show_source;
1274 if (!have_full_symbols () && !have_partial_symbols())
1275 {
1276 trace_show_source = 0;
1277 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1278 printf_filtered ("Trace will not display any source.\n");
1279 }
1280
1281 first = 1;
1282 suppress = 0;
1283 for (i = low; i < high; ++i)
1284 {
1285 next_address = trace_data.addrs[i];
1286 count = trace_data.counts[i];
1287 while (count-- > 0)
1288 {
1289 QUIT;
1290 if (trace_show_source)
1291 {
1292 struct symtab_and_line sal, sal_prev;
1293
1294 sal_prev = find_pc_line (next_address - 4, 0);
1295 sal = find_pc_line (next_address, 0);
1296
1297 if (sal.symtab)
1298 {
1299 if (first || sal.line != sal_prev.line)
1300 print_source_lines (sal.symtab, sal.line, sal.line + 1, 0);
1301 suppress = 0;
1302 }
1303 else
1304 {
1305 if (!suppress)
1306 /* FIXME-32x64--assumes sal.pc fits in long. */
1307 printf_filtered ("No source file for address %s.\n",
1308 local_hex_string((unsigned long) sal.pc));
1309 suppress = 1;
1310 }
1311 }
1312 first = 0;
1313 print_address (next_address, gdb_stdout);
1314 printf_filtered (":");
1315 printf_filtered ("\t");
1316 wrap_here (" ");
1317 next_address = next_address + print_insn (next_address, gdb_stdout);
1318 printf_filtered ("\n");
1319 gdb_flush (gdb_stdout);
1320 }
1321 }
1322 }
1323
1324
1325 extern void (*target_resume_hook) PARAMS ((void));
1326 extern void (*target_wait_loop_hook) PARAMS ((void));
1327
1328 void
1329 _initialize_d10v_tdep ()
1330 {
1331 tm_print_insn = print_insn_d10v;
1332
1333 target_resume_hook = d10v_eva_prepare_to_trace;
1334 target_wait_loop_hook = d10v_eva_get_trace_data;
1335
1336 add_com ("regs", class_vars, show_regs, "Print all registers");
1337
1338 add_com ("trace", class_support, trace_command,
1339 "Enable tracing of instruction execution.");
1340
1341 add_com ("untrace", class_support, untrace_command,
1342 "Disable tracing of instruction execution.");
1343
1344 add_com ("tdisassemble", class_vars, tdisassemble_command,
1345 "Disassemble the trace buffer.\n\
1346 Two optional arguments specify a range of trace buffer entries\n\
1347 as reported by info trace (NOT addresses!).");
1348
1349 add_info ("trace", trace_info,
1350 "Display info about the trace data buffer.");
1351
1352 add_show_from_set (add_set_cmd ("tracedisplay", no_class,
1353 var_integer, (char *)&trace_display,
1354 "Set automatic display of trace.\n", &setlist),
1355 &showlist);
1356 add_show_from_set (add_set_cmd ("tracesource", no_class,
1357 var_integer, (char *)&default_trace_show_source,
1358 "Set display of source code with trace.\n", &setlist),
1359 &showlist);
1360
1361 }