Eliminate ARCH_NUM_REGS.
[binutils-gdb.git] / gdb / gdbserver / low-linux.c
1 /* Low level interface to ptrace, for the remote server for GDB.
2 Copyright 1995, 1996, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include "server.h"
23 #include <sys/wait.h>
24 #include "frame.h"
25 #include "inferior.h"
26
27 #include <stdio.h>
28 #include <sys/param.h>
29 #include <sys/dir.h>
30 #include <sys/ptrace.h>
31 #include <sys/user.h>
32 #include <signal.h>
33 #include <sys/ioctl.h>
34 #include <fcntl.h>
35
36 /***************Begin MY defs*********************/
37 static char my_registers[REGISTER_BYTES];
38 char *registers = my_registers;
39 /***************End MY defs*********************/
40
41 #ifdef HAVE_SYS_REG_H
42 #include <sys/reg.h>
43 #endif
44
45 /* Default the type of the ptrace transfer to int. */
46 #ifndef PTRACE_XFER_TYPE
47 #define PTRACE_XFER_TYPE int
48 #endif
49
50 extern int errno;
51
52 static void initialize_arch (void);
53
54 /* Start an inferior process and returns its pid.
55 ALLARGS is a vector of program-name and args. */
56
57 int
58 create_inferior (char *program, char **allargs)
59 {
60 int pid;
61
62 pid = fork ();
63 if (pid < 0)
64 perror_with_name ("fork");
65
66 if (pid == 0)
67 {
68 ptrace (PTRACE_TRACEME, 0, 0, 0);
69
70 execv (program, allargs);
71
72 fprintf (stderr, "Cannot exec %s: %s.\n", program,
73 errno < sys_nerr ? sys_errlist[errno] : "unknown error");
74 fflush (stderr);
75 _exit (0177);
76 }
77
78 return pid;
79 }
80
81 /* Kill the inferior process. Make us have no inferior. */
82
83 void
84 kill_inferior (void)
85 {
86 if (inferior_pid == 0)
87 return;
88 ptrace (PTRACE_KILL, inferior_pid, 0, 0);
89 wait (0);
90 /*************inferior_died ();****VK**************/
91 }
92
93 /* Return nonzero if the given thread is still alive. */
94 int
95 mythread_alive (int pid)
96 {
97 return 1;
98 }
99
100 /* Wait for process, returns status */
101
102 unsigned char
103 mywait (char *status)
104 {
105 int pid;
106 union wait w;
107
108 pid = wait (&w);
109 if (pid != inferior_pid)
110 perror_with_name ("wait");
111
112 if (WIFEXITED (w))
113 {
114 fprintf (stderr, "\nChild exited with retcode = %x \n", WEXITSTATUS (w));
115 *status = 'W';
116 return ((unsigned char) WEXITSTATUS (w));
117 }
118 else if (!WIFSTOPPED (w))
119 {
120 fprintf (stderr, "\nChild terminated with signal = %x \n", WTERMSIG (w));
121 *status = 'X';
122 return ((unsigned char) WTERMSIG (w));
123 }
124
125 fetch_inferior_registers (0);
126
127 *status = 'T';
128 return ((unsigned char) WSTOPSIG (w));
129 }
130
131 /* Resume execution of the inferior process.
132 If STEP is nonzero, single-step it.
133 If SIGNAL is nonzero, give it that signal. */
134
135 void
136 myresume (int step, int signal)
137 {
138 errno = 0;
139 ptrace (step ? PTRACE_SINGLESTEP : PTRACE_CONT, inferior_pid, 1, signal);
140 if (errno)
141 perror_with_name ("ptrace");
142 }
143
144
145 #if !defined (offsetof)
146 #define offsetof(TYPE, MEMBER) ((unsigned long) &((TYPE *)0)->MEMBER)
147 #endif
148
149 /* U_REGS_OFFSET is the offset of the registers within the u area. */
150 #if !defined (U_REGS_OFFSET)
151 #define U_REGS_OFFSET \
152 ptrace (PT_READ_U, inferior_pid, \
153 (PTRACE_ARG3_TYPE) (offsetof (struct user, u_ar0)), 0) \
154 - KERNEL_U_ADDR
155 #endif
156
157 #ifdef I386_GNULINUX_TARGET
158 /* i386_register_raw_size[i] is the number of bytes of storage in the
159 actual machine representation for register i. */
160 int i386_register_raw_size[MAX_NUM_REGS] = {
161 4, 4, 4, 4,
162 4, 4, 4, 4,
163 4, 4, 4, 4,
164 4, 4, 4, 4,
165 10, 10, 10, 10,
166 10, 10, 10, 10,
167 4, 4, 4, 4,
168 4, 4, 4, 4,
169 16, 16, 16, 16,
170 16, 16, 16, 16,
171 4
172 };
173
174 int i386_register_byte[MAX_NUM_REGS];
175
176 static void
177 initialize_arch (void)
178 {
179 /* Initialize the table saying where each register starts in the
180 register file. */
181 {
182 int i, offset;
183
184 offset = 0;
185 for (i = 0; i < MAX_NUM_REGS; i++)
186 {
187 i386_register_byte[i] = offset;
188 offset += i386_register_raw_size[i];
189 }
190 }
191 }
192
193 /* this table must line up with REGISTER_NAMES in tm-i386v.h */
194 /* symbols like 'EAX' come from <sys/reg.h> */
195 static int regmap[] =
196 {
197 EAX, ECX, EDX, EBX,
198 UESP, EBP, ESI, EDI,
199 EIP, EFL, CS, SS,
200 DS, ES, FS, GS,
201 };
202
203 int
204 i386_register_u_addr (int blockend, int regnum)
205 {
206 #if 0
207 /* this will be needed if fp registers are reinstated */
208 /* for now, you can look at them with 'info float'
209 * sys5 wont let you change them with ptrace anyway
210 */
211 if (regnum >= FP0_REGNUM && regnum <= FP7_REGNUM)
212 {
213 int ubase, fpstate;
214 struct user u;
215 ubase = blockend + 4 * (SS + 1) - KSTKSZ;
216 fpstate = ubase + ((char *) &u.u_fpstate - (char *) &u);
217 return (fpstate + 0x1c + 10 * (regnum - FP0_REGNUM));
218 }
219 else
220 #endif
221 return (blockend + 4 * regmap[regnum]);
222
223 }
224 #elif defined(TARGET_M68K)
225 static void
226 initialize_arch (void)
227 {
228 return;
229 }
230
231 /* This table must line up with REGISTER_NAMES in tm-m68k.h */
232 static int regmap[] =
233 {
234 #ifdef PT_D0
235 PT_D0, PT_D1, PT_D2, PT_D3, PT_D4, PT_D5, PT_D6, PT_D7,
236 PT_A0, PT_A1, PT_A2, PT_A3, PT_A4, PT_A5, PT_A6, PT_USP,
237 PT_SR, PT_PC,
238 #else
239 14, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 15,
240 17, 18,
241 #endif
242 #ifdef PT_FP0
243 PT_FP0, PT_FP1, PT_FP2, PT_FP3, PT_FP4, PT_FP5, PT_FP6, PT_FP7,
244 PT_FPCR, PT_FPSR, PT_FPIAR
245 #else
246 21, 24, 27, 30, 33, 36, 39, 42, 45, 46, 47
247 #endif
248 };
249
250 /* BLOCKEND is the value of u.u_ar0, and points to the place where GS
251 is stored. */
252
253 int
254 m68k_linux_register_u_addr (int blockend, int regnum)
255 {
256 return (blockend + 4 * regmap[regnum]);
257 }
258 #elif defined(IA64_GNULINUX_TARGET)
259 #undef NUM_FREGS
260 #define NUM_FREGS 0
261
262 #include <asm/ptrace_offsets.h>
263
264 static int u_offsets[] =
265 {
266 /* general registers */
267 -1, /* gr0 not available; i.e, it's always zero */
268 PT_R1,
269 PT_R2,
270 PT_R3,
271 PT_R4,
272 PT_R5,
273 PT_R6,
274 PT_R7,
275 PT_R8,
276 PT_R9,
277 PT_R10,
278 PT_R11,
279 PT_R12,
280 PT_R13,
281 PT_R14,
282 PT_R15,
283 PT_R16,
284 PT_R17,
285 PT_R18,
286 PT_R19,
287 PT_R20,
288 PT_R21,
289 PT_R22,
290 PT_R23,
291 PT_R24,
292 PT_R25,
293 PT_R26,
294 PT_R27,
295 PT_R28,
296 PT_R29,
297 PT_R30,
298 PT_R31,
299 /* gr32 through gr127 not directly available via the ptrace interface */
300 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
301 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
302 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
303 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
304 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
305 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
306 /* Floating point registers */
307 -1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0) */
308 PT_F2,
309 PT_F3,
310 PT_F4,
311 PT_F5,
312 PT_F6,
313 PT_F7,
314 PT_F8,
315 PT_F9,
316 PT_F10,
317 PT_F11,
318 PT_F12,
319 PT_F13,
320 PT_F14,
321 PT_F15,
322 PT_F16,
323 PT_F17,
324 PT_F18,
325 PT_F19,
326 PT_F20,
327 PT_F21,
328 PT_F22,
329 PT_F23,
330 PT_F24,
331 PT_F25,
332 PT_F26,
333 PT_F27,
334 PT_F28,
335 PT_F29,
336 PT_F30,
337 PT_F31,
338 PT_F32,
339 PT_F33,
340 PT_F34,
341 PT_F35,
342 PT_F36,
343 PT_F37,
344 PT_F38,
345 PT_F39,
346 PT_F40,
347 PT_F41,
348 PT_F42,
349 PT_F43,
350 PT_F44,
351 PT_F45,
352 PT_F46,
353 PT_F47,
354 PT_F48,
355 PT_F49,
356 PT_F50,
357 PT_F51,
358 PT_F52,
359 PT_F53,
360 PT_F54,
361 PT_F55,
362 PT_F56,
363 PT_F57,
364 PT_F58,
365 PT_F59,
366 PT_F60,
367 PT_F61,
368 PT_F62,
369 PT_F63,
370 PT_F64,
371 PT_F65,
372 PT_F66,
373 PT_F67,
374 PT_F68,
375 PT_F69,
376 PT_F70,
377 PT_F71,
378 PT_F72,
379 PT_F73,
380 PT_F74,
381 PT_F75,
382 PT_F76,
383 PT_F77,
384 PT_F78,
385 PT_F79,
386 PT_F80,
387 PT_F81,
388 PT_F82,
389 PT_F83,
390 PT_F84,
391 PT_F85,
392 PT_F86,
393 PT_F87,
394 PT_F88,
395 PT_F89,
396 PT_F90,
397 PT_F91,
398 PT_F92,
399 PT_F93,
400 PT_F94,
401 PT_F95,
402 PT_F96,
403 PT_F97,
404 PT_F98,
405 PT_F99,
406 PT_F100,
407 PT_F101,
408 PT_F102,
409 PT_F103,
410 PT_F104,
411 PT_F105,
412 PT_F106,
413 PT_F107,
414 PT_F108,
415 PT_F109,
416 PT_F110,
417 PT_F111,
418 PT_F112,
419 PT_F113,
420 PT_F114,
421 PT_F115,
422 PT_F116,
423 PT_F117,
424 PT_F118,
425 PT_F119,
426 PT_F120,
427 PT_F121,
428 PT_F122,
429 PT_F123,
430 PT_F124,
431 PT_F125,
432 PT_F126,
433 PT_F127,
434 /* predicate registers - we don't fetch these individually */
435 -1, -1, -1, -1, -1, -1, -1, -1,
436 -1, -1, -1, -1, -1, -1, -1, -1,
437 -1, -1, -1, -1, -1, -1, -1, -1,
438 -1, -1, -1, -1, -1, -1, -1, -1,
439 -1, -1, -1, -1, -1, -1, -1, -1,
440 -1, -1, -1, -1, -1, -1, -1, -1,
441 -1, -1, -1, -1, -1, -1, -1, -1,
442 -1, -1, -1, -1, -1, -1, -1, -1,
443 /* branch registers */
444 PT_B0,
445 PT_B1,
446 PT_B2,
447 PT_B3,
448 PT_B4,
449 PT_B5,
450 PT_B6,
451 PT_B7,
452 /* virtual frame pointer and virtual return address pointer */
453 -1, -1,
454 /* other registers */
455 PT_PR,
456 PT_CR_IIP, /* ip */
457 PT_CR_IPSR, /* psr */
458 PT_CFM, /* cfm */
459 /* kernel registers not visible via ptrace interface (?) */
460 -1, -1, -1, -1, -1, -1, -1, -1,
461 /* hole */
462 -1, -1, -1, -1, -1, -1, -1, -1,
463 PT_AR_RSC,
464 PT_AR_BSP,
465 PT_AR_BSPSTORE,
466 PT_AR_RNAT,
467 -1,
468 -1, /* Not available: FCR, IA32 floating control register */
469 -1, -1,
470 -1, /* Not available: EFLAG */
471 -1, /* Not available: CSD */
472 -1, /* Not available: SSD */
473 -1, /* Not available: CFLG */
474 -1, /* Not available: FSR */
475 -1, /* Not available: FIR */
476 -1, /* Not available: FDR */
477 -1,
478 PT_AR_CCV,
479 -1, -1, -1,
480 PT_AR_UNAT,
481 -1, -1, -1,
482 PT_AR_FPSR,
483 -1, -1, -1,
484 -1, /* Not available: ITC */
485 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
486 -1, -1, -1, -1, -1, -1, -1, -1, -1,
487 PT_AR_PFS,
488 PT_AR_LC,
489 -1, /* Not available: EC, the Epilog Count register */
490 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
491 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
492 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
493 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
494 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
495 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
496 -1,
497 /* nat bits - not fetched directly; instead we obtain these bits from
498 either rnat or unat or from memory. */
499 -1, -1, -1, -1, -1, -1, -1, -1,
500 -1, -1, -1, -1, -1, -1, -1, -1,
501 -1, -1, -1, -1, -1, -1, -1, -1,
502 -1, -1, -1, -1, -1, -1, -1, -1,
503 -1, -1, -1, -1, -1, -1, -1, -1,
504 -1, -1, -1, -1, -1, -1, -1, -1,
505 -1, -1, -1, -1, -1, -1, -1, -1,
506 -1, -1, -1, -1, -1, -1, -1, -1,
507 -1, -1, -1, -1, -1, -1, -1, -1,
508 -1, -1, -1, -1, -1, -1, -1, -1,
509 -1, -1, -1, -1, -1, -1, -1, -1,
510 -1, -1, -1, -1, -1, -1, -1, -1,
511 -1, -1, -1, -1, -1, -1, -1, -1,
512 -1, -1, -1, -1, -1, -1, -1, -1,
513 -1, -1, -1, -1, -1, -1, -1, -1,
514 -1, -1, -1, -1, -1, -1, -1, -1,
515 };
516
517 int
518 ia64_register_u_addr (int blockend, int regnum)
519 {
520 int addr;
521
522 if (regnum < 0 || regnum >= NUM_REGS)
523 error ("Invalid register number %d.", regnum);
524
525 addr = u_offsets[regnum];
526 if (addr == -1)
527 addr = 0;
528
529 return addr;
530 }
531
532 static void
533 initialize_arch (void)
534 {
535 return;
536 }
537 #endif
538
539 CORE_ADDR
540 register_addr (int regno, CORE_ADDR blockend)
541 {
542 CORE_ADDR addr;
543
544 if (regno < 0 || regno >= NUM_REGS)
545 error ("Invalid register number %d.", regno);
546
547 REGISTER_U_ADDR (addr, blockend, regno);
548
549 return addr;
550 }
551
552 /* Fetch one register. */
553
554 static void
555 fetch_register (int regno)
556 {
557 CORE_ADDR regaddr;
558 register int i;
559
560 /* Offset of registers within the u area. */
561 unsigned int offset;
562
563 offset = U_REGS_OFFSET;
564
565 regaddr = register_addr (regno, offset);
566 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
567 {
568 errno = 0;
569 *(PTRACE_XFER_TYPE *) &registers[REGISTER_BYTE (regno) + i] =
570 ptrace (PTRACE_PEEKUSER, inferior_pid, (PTRACE_ARG3_TYPE) regaddr, 0);
571 regaddr += sizeof (PTRACE_XFER_TYPE);
572 if (errno != 0)
573 {
574 /* Warning, not error, in case we are attached; sometimes the
575 kernel doesn't let us at the registers. */
576 char *err = strerror (errno);
577 char *msg = alloca (strlen (err) + 128);
578 sprintf (msg, "reading register %d: %s", regno, err);
579 error (msg);
580 goto error_exit;
581 }
582 }
583 error_exit:;
584 }
585
586 /* Fetch all registers, or just one, from the child process. */
587
588 void
589 fetch_inferior_registers (int regno)
590 {
591 if (regno == -1 || regno == 0)
592 for (regno = 0; regno < NUM_REGS - NUM_FREGS; regno++)
593 fetch_register (regno);
594 else
595 fetch_register (regno);
596 }
597
598 /* Store our register values back into the inferior.
599 If REGNO is -1, do this for all registers.
600 Otherwise, REGNO specifies which register (so we can save time). */
601
602 void
603 store_inferior_registers (int regno)
604 {
605 CORE_ADDR regaddr;
606 int i;
607 unsigned int offset = U_REGS_OFFSET;
608
609 if (regno >= 0)
610 {
611 #if 0
612 if (CANNOT_STORE_REGISTER (regno))
613 return;
614 #endif
615 regaddr = register_addr (regno, offset);
616 errno = 0;
617 #if 0
618 if (regno == PCOQ_HEAD_REGNUM || regno == PCOQ_TAIL_REGNUM)
619 {
620 scratch = *(int *) &registers[REGISTER_BYTE (regno)] | 0x3;
621 ptrace (PT_WUREGS, inferior_pid, (PTRACE_ARG3_TYPE) regaddr,
622 scratch, 0);
623 if (errno != 0)
624 {
625 /* Error, even if attached. Failing to write these two
626 registers is pretty serious. */
627 sprintf (buf, "writing register number %d", regno);
628 perror_with_name (buf);
629 }
630 }
631 else
632 #endif
633 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
634 {
635 errno = 0;
636 ptrace (PTRACE_POKEUSER, inferior_pid, (PTRACE_ARG3_TYPE) regaddr,
637 *(int *) &registers[REGISTER_BYTE (regno) + i]);
638 if (errno != 0)
639 {
640 /* Warning, not error, in case we are attached; sometimes the
641 kernel doesn't let us at the registers. */
642 char *err = strerror (errno);
643 char *msg = alloca (strlen (err) + 128);
644 sprintf (msg, "writing register %d: %s",
645 regno, err);
646 error (msg);
647 return;
648 }
649 regaddr += sizeof (int);
650 }
651 }
652 else
653 for (regno = 0; regno < NUM_REGS - NUM_FREGS; regno++)
654 store_inferior_registers (regno);
655 }
656
657 /* NOTE! I tried using PTRACE_READDATA, etc., to read and write memory
658 in the NEW_SUN_PTRACE case.
659 It ought to be straightforward. But it appears that writing did
660 not write the data that I specified. I cannot understand where
661 it got the data that it actually did write. */
662
663 /* Copy LEN bytes from inferior's memory starting at MEMADDR
664 to debugger memory starting at MYADDR. */
665
666 void
667 read_inferior_memory (CORE_ADDR memaddr, char *myaddr, int len)
668 {
669 register int i;
670 /* Round starting address down to longword boundary. */
671 register CORE_ADDR addr = memaddr & -sizeof (PTRACE_XFER_TYPE);
672 /* Round ending address up; get number of longwords that makes. */
673 register int count
674 = (((memaddr + len) - addr) + sizeof (PTRACE_XFER_TYPE) - 1)
675 / sizeof (PTRACE_XFER_TYPE);
676 /* Allocate buffer of that many longwords. */
677 register PTRACE_XFER_TYPE *buffer
678 = (PTRACE_XFER_TYPE *) alloca (count * sizeof (PTRACE_XFER_TYPE));
679
680 /* Read all the longwords */
681 for (i = 0; i < count; i++, addr += sizeof (PTRACE_XFER_TYPE))
682 {
683 buffer[i] = ptrace (PTRACE_PEEKTEXT, inferior_pid, addr, 0);
684 }
685
686 /* Copy appropriate bytes out of the buffer. */
687 memcpy (myaddr, (char *) buffer + (memaddr & (sizeof (PTRACE_XFER_TYPE) - 1)), len);
688 }
689
690 /* Copy LEN bytes of data from debugger memory at MYADDR
691 to inferior's memory at MEMADDR.
692 On failure (cannot write the inferior)
693 returns the value of errno. */
694
695 int
696 write_inferior_memory (CORE_ADDR memaddr, char *myaddr, int len)
697 {
698 register int i;
699 /* Round starting address down to longword boundary. */
700 register CORE_ADDR addr = memaddr & -sizeof (PTRACE_XFER_TYPE);
701 /* Round ending address up; get number of longwords that makes. */
702 register int count
703 = (((memaddr + len) - addr) + sizeof (PTRACE_XFER_TYPE) - 1) / sizeof (PTRACE_XFER_TYPE);
704 /* Allocate buffer of that many longwords. */
705 register PTRACE_XFER_TYPE *buffer = (PTRACE_XFER_TYPE *) alloca (count * sizeof (PTRACE_XFER_TYPE));
706 extern int errno;
707
708 /* Fill start and end extra bytes of buffer with existing memory data. */
709
710 buffer[0] = ptrace (PTRACE_PEEKTEXT, inferior_pid, addr, 0);
711
712 if (count > 1)
713 {
714 buffer[count - 1]
715 = ptrace (PTRACE_PEEKTEXT, inferior_pid,
716 addr + (count - 1) * sizeof (PTRACE_XFER_TYPE), 0);
717 }
718
719 /* Copy data to be written over corresponding part of buffer */
720
721 memcpy ((char *) buffer + (memaddr & (sizeof (PTRACE_XFER_TYPE) - 1)), myaddr, len);
722
723 /* Write the entire buffer. */
724
725 for (i = 0; i < count; i++, addr += sizeof (PTRACE_XFER_TYPE))
726 {
727 errno = 0;
728 ptrace (PTRACE_POKETEXT, inferior_pid, addr, buffer[i]);
729 if (errno)
730 return errno;
731 }
732
733 return 0;
734 }
735 \f
736 void
737 initialize_low (void)
738 {
739 initialize_arch ();
740 }