2004-04-17 Randolph Chung <tausq@debian.org>
[binutils-gdb.git] / gdb / hppa-tdep.c
1 /* Target-dependent code for the HP PA architecture, for GDB.
2
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995,
4 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
5 Foundation, Inc.
6
7 Contributed by the Center for Software Science at the
8 University of Utah (pa-gdb-bugs@cs.utah.edu).
9
10 This file is part of GDB.
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place - Suite 330,
25 Boston, MA 02111-1307, USA. */
26
27 #include "defs.h"
28 #include "frame.h"
29 #include "bfd.h"
30 #include "inferior.h"
31 #include "value.h"
32 #include "regcache.h"
33 #include "completer.h"
34 #include "language.h"
35 #include "osabi.h"
36 #include "gdb_assert.h"
37 #include "infttrace.h"
38 #include "arch-utils.h"
39 /* For argument passing to the inferior */
40 #include "symtab.h"
41 #include "infcall.h"
42 #include "dis-asm.h"
43 #include "trad-frame.h"
44 #include "frame-unwind.h"
45 #include "frame-base.h"
46
47 #include "gdb_stat.h"
48 #include "gdb_wait.h"
49
50 #include "gdbcore.h"
51 #include "gdbcmd.h"
52 #include "target.h"
53 #include "symfile.h"
54 #include "objfiles.h"
55 #include "hppa-tdep.h"
56
57 /* Some local constants. */
58 static const int hppa32_num_regs = 128;
59 static const int hppa64_num_regs = 96;
60
61 /* Get at various relevent fields of an instruction word. */
62 #define MASK_5 0x1f
63 #define MASK_11 0x7ff
64 #define MASK_14 0x3fff
65 #define MASK_21 0x1fffff
66
67 /* Define offsets into the call dummy for the _sr4export address.
68 See comments related to CALL_DUMMY for more info. */
69 #define SR4EXPORT_LDIL_OFFSET (INSTRUCTION_SIZE * 12)
70 #define SR4EXPORT_LDO_OFFSET (INSTRUCTION_SIZE * 13)
71
72 /* To support detection of the pseudo-initial frame
73 that threads have. */
74 #define THREAD_INITIAL_FRAME_SYMBOL "__pthread_exit"
75 #define THREAD_INITIAL_FRAME_SYM_LEN sizeof(THREAD_INITIAL_FRAME_SYMBOL)
76
77 /* Sizes (in bytes) of the native unwind entries. */
78 #define UNWIND_ENTRY_SIZE 16
79 #define STUB_UNWIND_ENTRY_SIZE 8
80
81 static int get_field (unsigned word, int from, int to);
82
83 static int extract_5_load (unsigned int);
84
85 static unsigned extract_5R_store (unsigned int);
86
87 static unsigned extract_5r_store (unsigned int);
88
89 struct unwind_table_entry *find_unwind_entry (CORE_ADDR);
90
91 static int extract_17 (unsigned int);
92
93 static int extract_21 (unsigned);
94
95 static int extract_14 (unsigned);
96
97 static void unwind_command (char *, int);
98
99 static int low_sign_extend (unsigned int, unsigned int);
100
101 static int sign_extend (unsigned int, unsigned int);
102
103 static int hppa_alignof (struct type *);
104
105 static int prologue_inst_adjust_sp (unsigned long);
106
107 static int is_branch (unsigned long);
108
109 static int inst_saves_gr (unsigned long);
110
111 static int inst_saves_fr (unsigned long);
112
113 static int compare_unwind_entries (const void *, const void *);
114
115 static void read_unwind_info (struct objfile *);
116
117 static void internalize_unwinds (struct objfile *,
118 struct unwind_table_entry *,
119 asection *, unsigned int,
120 unsigned int, CORE_ADDR);
121 static void record_text_segment_lowaddr (bfd *, asection *, void *);
122 /* FIXME: brobecker 2002-11-07: We will likely be able to make the
123 following functions static, once we hppa is partially multiarched. */
124 int hppa_pc_requires_run_before_use (CORE_ADDR pc);
125 int hppa_instruction_nullified (void);
126
127 /* Handle 32/64-bit struct return conventions. */
128
129 static enum return_value_convention
130 hppa32_return_value (struct gdbarch *gdbarch,
131 struct type *type, struct regcache *regcache,
132 void *readbuf, const void *writebuf)
133 {
134 if (TYPE_CODE (type) == TYPE_CODE_FLT)
135 {
136 if (readbuf != NULL)
137 regcache_cooked_read_part (regcache, FP4_REGNUM, 0,
138 TYPE_LENGTH (type), readbuf);
139 if (writebuf != NULL)
140 regcache_cooked_write_part (regcache, FP4_REGNUM, 0,
141 TYPE_LENGTH (type), writebuf);
142 return RETURN_VALUE_REGISTER_CONVENTION;
143 }
144 if (TYPE_LENGTH (type) <= 2 * 4)
145 {
146 /* The value always lives in the right hand end of the register
147 (or register pair)? */
148 int b;
149 int reg = 28;
150 int part = TYPE_LENGTH (type) % 4;
151 /* The left hand register contains only part of the value,
152 transfer that first so that the rest can be xfered as entire
153 4-byte registers. */
154 if (part > 0)
155 {
156 if (readbuf != NULL)
157 regcache_cooked_read_part (regcache, reg, 4 - part,
158 part, readbuf);
159 if (writebuf != NULL)
160 regcache_cooked_write_part (regcache, reg, 4 - part,
161 part, writebuf);
162 reg++;
163 }
164 /* Now transfer the remaining register values. */
165 for (b = part; b < TYPE_LENGTH (type); b += 4)
166 {
167 if (readbuf != NULL)
168 regcache_cooked_read (regcache, reg, (char *) readbuf + b);
169 if (writebuf != NULL)
170 regcache_cooked_write (regcache, reg, (const char *) writebuf + b);
171 reg++;
172 }
173 return RETURN_VALUE_REGISTER_CONVENTION;
174 }
175 else
176 return RETURN_VALUE_STRUCT_CONVENTION;
177 }
178
179 static enum return_value_convention
180 hppa64_return_value (struct gdbarch *gdbarch,
181 struct type *type, struct regcache *regcache,
182 void *readbuf, const void *writebuf)
183 {
184 /* RM: Floats are returned in FR4R, doubles in FR4. Integral values
185 are in r28, padded on the left. Aggregates less that 65 bits are
186 in r28, right padded. Aggregates upto 128 bits are in r28 and
187 r29, right padded. */
188 if (TYPE_CODE (type) == TYPE_CODE_FLT
189 && TYPE_LENGTH (type) <= 8)
190 {
191 /* Floats are right aligned? */
192 int offset = register_size (gdbarch, FP4_REGNUM) - TYPE_LENGTH (type);
193 if (readbuf != NULL)
194 regcache_cooked_read_part (regcache, FP4_REGNUM, offset,
195 TYPE_LENGTH (type), readbuf);
196 if (writebuf != NULL)
197 regcache_cooked_write_part (regcache, FP4_REGNUM, offset,
198 TYPE_LENGTH (type), writebuf);
199 return RETURN_VALUE_REGISTER_CONVENTION;
200 }
201 else if (TYPE_LENGTH (type) <= 8 && is_integral_type (type))
202 {
203 /* Integrals are right aligned. */
204 int offset = register_size (gdbarch, FP4_REGNUM) - TYPE_LENGTH (type);
205 if (readbuf != NULL)
206 regcache_cooked_read_part (regcache, 28, offset,
207 TYPE_LENGTH (type), readbuf);
208 if (writebuf != NULL)
209 regcache_cooked_write_part (regcache, 28, offset,
210 TYPE_LENGTH (type), writebuf);
211 return RETURN_VALUE_REGISTER_CONVENTION;
212 }
213 else if (TYPE_LENGTH (type) <= 2 * 8)
214 {
215 /* Composite values are left aligned. */
216 int b;
217 for (b = 0; b < TYPE_LENGTH (type); b += 8)
218 {
219 int part = min (8, TYPE_LENGTH (type) - b);
220 if (readbuf != NULL)
221 regcache_cooked_read_part (regcache, 28 + b / 8, 0, part,
222 (char *) readbuf + b);
223 if (writebuf != NULL)
224 regcache_cooked_write_part (regcache, 28 + b / 8, 0, part,
225 (const char *) writebuf + b);
226 }
227 return RETURN_VALUE_REGISTER_CONVENTION;
228 }
229 else
230 return RETURN_VALUE_STRUCT_CONVENTION;
231 }
232
233 /* Routines to extract various sized constants out of hppa
234 instructions. */
235
236 /* This assumes that no garbage lies outside of the lower bits of
237 value. */
238
239 static int
240 sign_extend (unsigned val, unsigned bits)
241 {
242 return (int) (val >> (bits - 1) ? (-1 << bits) | val : val);
243 }
244
245 /* For many immediate values the sign bit is the low bit! */
246
247 static int
248 low_sign_extend (unsigned val, unsigned bits)
249 {
250 return (int) ((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
251 }
252
253 /* Extract the bits at positions between FROM and TO, using HP's numbering
254 (MSB = 0). */
255
256 static int
257 get_field (unsigned word, int from, int to)
258 {
259 return ((word) >> (31 - (to)) & ((1 << ((to) - (from) + 1)) - 1));
260 }
261
262 /* extract the immediate field from a ld{bhw}s instruction */
263
264 static int
265 extract_5_load (unsigned word)
266 {
267 return low_sign_extend (word >> 16 & MASK_5, 5);
268 }
269
270 /* extract the immediate field from a break instruction */
271
272 static unsigned
273 extract_5r_store (unsigned word)
274 {
275 return (word & MASK_5);
276 }
277
278 /* extract the immediate field from a {sr}sm instruction */
279
280 static unsigned
281 extract_5R_store (unsigned word)
282 {
283 return (word >> 16 & MASK_5);
284 }
285
286 /* extract a 14 bit immediate field */
287
288 static int
289 extract_14 (unsigned word)
290 {
291 return low_sign_extend (word & MASK_14, 14);
292 }
293
294 /* extract a 21 bit constant */
295
296 static int
297 extract_21 (unsigned word)
298 {
299 int val;
300
301 word &= MASK_21;
302 word <<= 11;
303 val = get_field (word, 20, 20);
304 val <<= 11;
305 val |= get_field (word, 9, 19);
306 val <<= 2;
307 val |= get_field (word, 5, 6);
308 val <<= 5;
309 val |= get_field (word, 0, 4);
310 val <<= 2;
311 val |= get_field (word, 7, 8);
312 return sign_extend (val, 21) << 11;
313 }
314
315 /* extract a 17 bit constant from branch instructions, returning the
316 19 bit signed value. */
317
318 static int
319 extract_17 (unsigned word)
320 {
321 return sign_extend (get_field (word, 19, 28) |
322 get_field (word, 29, 29) << 10 |
323 get_field (word, 11, 15) << 11 |
324 (word & 0x1) << 16, 17) << 2;
325 }
326 \f
327
328 /* Compare the start address for two unwind entries returning 1 if
329 the first address is larger than the second, -1 if the second is
330 larger than the first, and zero if they are equal. */
331
332 static int
333 compare_unwind_entries (const void *arg1, const void *arg2)
334 {
335 const struct unwind_table_entry *a = arg1;
336 const struct unwind_table_entry *b = arg2;
337
338 if (a->region_start > b->region_start)
339 return 1;
340 else if (a->region_start < b->region_start)
341 return -1;
342 else
343 return 0;
344 }
345
346 static CORE_ADDR low_text_segment_address;
347
348 static void
349 record_text_segment_lowaddr (bfd *abfd, asection *section, void *ignored)
350 {
351 if (((section->flags & (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
352 == (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
353 && section->vma < low_text_segment_address)
354 low_text_segment_address = section->vma;
355 }
356
357 static void
358 internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table,
359 asection *section, unsigned int entries, unsigned int size,
360 CORE_ADDR text_offset)
361 {
362 /* We will read the unwind entries into temporary memory, then
363 fill in the actual unwind table. */
364 if (size > 0)
365 {
366 unsigned long tmp;
367 unsigned i;
368 char *buf = alloca (size);
369
370 low_text_segment_address = -1;
371
372 /* If addresses are 64 bits wide, then unwinds are supposed to
373 be segment relative offsets instead of absolute addresses.
374
375 Note that when loading a shared library (text_offset != 0) the
376 unwinds are already relative to the text_offset that will be
377 passed in. */
378 if (TARGET_PTR_BIT == 64 && text_offset == 0)
379 {
380 bfd_map_over_sections (objfile->obfd,
381 record_text_segment_lowaddr, NULL);
382
383 /* ?!? Mask off some low bits. Should this instead subtract
384 out the lowest section's filepos or something like that?
385 This looks very hokey to me. */
386 low_text_segment_address &= ~0xfff;
387 text_offset += low_text_segment_address;
388 }
389
390 bfd_get_section_contents (objfile->obfd, section, buf, 0, size);
391
392 /* Now internalize the information being careful to handle host/target
393 endian issues. */
394 for (i = 0; i < entries; i++)
395 {
396 table[i].region_start = bfd_get_32 (objfile->obfd,
397 (bfd_byte *) buf);
398 table[i].region_start += text_offset;
399 buf += 4;
400 table[i].region_end = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
401 table[i].region_end += text_offset;
402 buf += 4;
403 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
404 buf += 4;
405 table[i].Cannot_unwind = (tmp >> 31) & 0x1;
406 table[i].Millicode = (tmp >> 30) & 0x1;
407 table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1;
408 table[i].Region_description = (tmp >> 27) & 0x3;
409 table[i].reserved1 = (tmp >> 26) & 0x1;
410 table[i].Entry_SR = (tmp >> 25) & 0x1;
411 table[i].Entry_FR = (tmp >> 21) & 0xf;
412 table[i].Entry_GR = (tmp >> 16) & 0x1f;
413 table[i].Args_stored = (tmp >> 15) & 0x1;
414 table[i].Variable_Frame = (tmp >> 14) & 0x1;
415 table[i].Separate_Package_Body = (tmp >> 13) & 0x1;
416 table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1;
417 table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1;
418 table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1;
419 table[i].Ada_Region = (tmp >> 9) & 0x1;
420 table[i].cxx_info = (tmp >> 8) & 0x1;
421 table[i].cxx_try_catch = (tmp >> 7) & 0x1;
422 table[i].sched_entry_seq = (tmp >> 6) & 0x1;
423 table[i].reserved2 = (tmp >> 5) & 0x1;
424 table[i].Save_SP = (tmp >> 4) & 0x1;
425 table[i].Save_RP = (tmp >> 3) & 0x1;
426 table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1;
427 table[i].extn_ptr_defined = (tmp >> 1) & 0x1;
428 table[i].Cleanup_defined = tmp & 0x1;
429 tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf);
430 buf += 4;
431 table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1;
432 table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1;
433 table[i].Large_frame = (tmp >> 29) & 0x1;
434 table[i].Pseudo_SP_Set = (tmp >> 28) & 0x1;
435 table[i].reserved4 = (tmp >> 27) & 0x1;
436 table[i].Total_frame_size = tmp & 0x7ffffff;
437
438 /* Stub unwinds are handled elsewhere. */
439 table[i].stub_unwind.stub_type = 0;
440 table[i].stub_unwind.padding = 0;
441 }
442 }
443 }
444
445 /* Read in the backtrace information stored in the `$UNWIND_START$' section of
446 the object file. This info is used mainly by find_unwind_entry() to find
447 out the stack frame size and frame pointer used by procedures. We put
448 everything on the psymbol obstack in the objfile so that it automatically
449 gets freed when the objfile is destroyed. */
450
451 static void
452 read_unwind_info (struct objfile *objfile)
453 {
454 asection *unwind_sec, *stub_unwind_sec;
455 unsigned unwind_size, stub_unwind_size, total_size;
456 unsigned index, unwind_entries;
457 unsigned stub_entries, total_entries;
458 CORE_ADDR text_offset;
459 struct obj_unwind_info *ui;
460 obj_private_data_t *obj_private;
461
462 text_offset = ANOFFSET (objfile->section_offsets, 0);
463 ui = (struct obj_unwind_info *) obstack_alloc (&objfile->objfile_obstack,
464 sizeof (struct obj_unwind_info));
465
466 ui->table = NULL;
467 ui->cache = NULL;
468 ui->last = -1;
469
470 /* For reasons unknown the HP PA64 tools generate multiple unwinder
471 sections in a single executable. So we just iterate over every
472 section in the BFD looking for unwinder sections intead of trying
473 to do a lookup with bfd_get_section_by_name.
474
475 First determine the total size of the unwind tables so that we
476 can allocate memory in a nice big hunk. */
477 total_entries = 0;
478 for (unwind_sec = objfile->obfd->sections;
479 unwind_sec;
480 unwind_sec = unwind_sec->next)
481 {
482 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
483 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
484 {
485 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
486 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
487
488 total_entries += unwind_entries;
489 }
490 }
491
492 /* Now compute the size of the stub unwinds. Note the ELF tools do not
493 use stub unwinds at the curren time. */
494 stub_unwind_sec = bfd_get_section_by_name (objfile->obfd, "$UNWIND_END$");
495
496 if (stub_unwind_sec)
497 {
498 stub_unwind_size = bfd_section_size (objfile->obfd, stub_unwind_sec);
499 stub_entries = stub_unwind_size / STUB_UNWIND_ENTRY_SIZE;
500 }
501 else
502 {
503 stub_unwind_size = 0;
504 stub_entries = 0;
505 }
506
507 /* Compute total number of unwind entries and their total size. */
508 total_entries += stub_entries;
509 total_size = total_entries * sizeof (struct unwind_table_entry);
510
511 /* Allocate memory for the unwind table. */
512 ui->table = (struct unwind_table_entry *)
513 obstack_alloc (&objfile->objfile_obstack, total_size);
514 ui->last = total_entries - 1;
515
516 /* Now read in each unwind section and internalize the standard unwind
517 entries. */
518 index = 0;
519 for (unwind_sec = objfile->obfd->sections;
520 unwind_sec;
521 unwind_sec = unwind_sec->next)
522 {
523 if (strcmp (unwind_sec->name, "$UNWIND_START$") == 0
524 || strcmp (unwind_sec->name, ".PARISC.unwind") == 0)
525 {
526 unwind_size = bfd_section_size (objfile->obfd, unwind_sec);
527 unwind_entries = unwind_size / UNWIND_ENTRY_SIZE;
528
529 internalize_unwinds (objfile, &ui->table[index], unwind_sec,
530 unwind_entries, unwind_size, text_offset);
531 index += unwind_entries;
532 }
533 }
534
535 /* Now read in and internalize the stub unwind entries. */
536 if (stub_unwind_size > 0)
537 {
538 unsigned int i;
539 char *buf = alloca (stub_unwind_size);
540
541 /* Read in the stub unwind entries. */
542 bfd_get_section_contents (objfile->obfd, stub_unwind_sec, buf,
543 0, stub_unwind_size);
544
545 /* Now convert them into regular unwind entries. */
546 for (i = 0; i < stub_entries; i++, index++)
547 {
548 /* Clear out the next unwind entry. */
549 memset (&ui->table[index], 0, sizeof (struct unwind_table_entry));
550
551 /* Convert offset & size into region_start and region_end.
552 Stuff away the stub type into "reserved" fields. */
553 ui->table[index].region_start = bfd_get_32 (objfile->obfd,
554 (bfd_byte *) buf);
555 ui->table[index].region_start += text_offset;
556 buf += 4;
557 ui->table[index].stub_unwind.stub_type = bfd_get_8 (objfile->obfd,
558 (bfd_byte *) buf);
559 buf += 2;
560 ui->table[index].region_end
561 = ui->table[index].region_start + 4 *
562 (bfd_get_16 (objfile->obfd, (bfd_byte *) buf) - 1);
563 buf += 2;
564 }
565
566 }
567
568 /* Unwind table needs to be kept sorted. */
569 qsort (ui->table, total_entries, sizeof (struct unwind_table_entry),
570 compare_unwind_entries);
571
572 /* Keep a pointer to the unwind information. */
573 if (objfile->obj_private == NULL)
574 {
575 obj_private = (obj_private_data_t *)
576 obstack_alloc (&objfile->objfile_obstack,
577 sizeof (obj_private_data_t));
578 obj_private->unwind_info = NULL;
579 obj_private->so_info = NULL;
580 obj_private->dp = 0;
581
582 objfile->obj_private = obj_private;
583 }
584 obj_private = (obj_private_data_t *) objfile->obj_private;
585 obj_private->unwind_info = ui;
586 }
587
588 /* Lookup the unwind (stack backtrace) info for the given PC. We search all
589 of the objfiles seeking the unwind table entry for this PC. Each objfile
590 contains a sorted list of struct unwind_table_entry. Since we do a binary
591 search of the unwind tables, we depend upon them to be sorted. */
592
593 struct unwind_table_entry *
594 find_unwind_entry (CORE_ADDR pc)
595 {
596 int first, middle, last;
597 struct objfile *objfile;
598
599 /* A function at address 0? Not in HP-UX! */
600 if (pc == (CORE_ADDR) 0)
601 return NULL;
602
603 ALL_OBJFILES (objfile)
604 {
605 struct obj_unwind_info *ui;
606 ui = NULL;
607 if (objfile->obj_private)
608 ui = ((obj_private_data_t *) (objfile->obj_private))->unwind_info;
609
610 if (!ui)
611 {
612 read_unwind_info (objfile);
613 if (objfile->obj_private == NULL)
614 error ("Internal error reading unwind information.");
615 ui = ((obj_private_data_t *) (objfile->obj_private))->unwind_info;
616 }
617
618 /* First, check the cache */
619
620 if (ui->cache
621 && pc >= ui->cache->region_start
622 && pc <= ui->cache->region_end)
623 return ui->cache;
624
625 /* Not in the cache, do a binary search */
626
627 first = 0;
628 last = ui->last;
629
630 while (first <= last)
631 {
632 middle = (first + last) / 2;
633 if (pc >= ui->table[middle].region_start
634 && pc <= ui->table[middle].region_end)
635 {
636 ui->cache = &ui->table[middle];
637 return &ui->table[middle];
638 }
639
640 if (pc < ui->table[middle].region_start)
641 last = middle - 1;
642 else
643 first = middle + 1;
644 }
645 } /* ALL_OBJFILES() */
646 return NULL;
647 }
648
649 static const unsigned char *
650 hppa_breakpoint_from_pc (CORE_ADDR *pc, int *len)
651 {
652 static const unsigned char breakpoint[] = {0x00, 0x01, 0x00, 0x04};
653 (*len) = sizeof (breakpoint);
654 return breakpoint;
655 }
656
657 /* Return the name of a register. */
658
659 const char *
660 hppa32_register_name (int i)
661 {
662 static char *names[] = {
663 "flags", "r1", "rp", "r3",
664 "r4", "r5", "r6", "r7",
665 "r8", "r9", "r10", "r11",
666 "r12", "r13", "r14", "r15",
667 "r16", "r17", "r18", "r19",
668 "r20", "r21", "r22", "r23",
669 "r24", "r25", "r26", "dp",
670 "ret0", "ret1", "sp", "r31",
671 "sar", "pcoqh", "pcsqh", "pcoqt",
672 "pcsqt", "eiem", "iir", "isr",
673 "ior", "ipsw", "goto", "sr4",
674 "sr0", "sr1", "sr2", "sr3",
675 "sr5", "sr6", "sr7", "cr0",
676 "cr8", "cr9", "ccr", "cr12",
677 "cr13", "cr24", "cr25", "cr26",
678 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
679 "fpsr", "fpe1", "fpe2", "fpe3",
680 "fpe4", "fpe5", "fpe6", "fpe7",
681 "fr4", "fr4R", "fr5", "fr5R",
682 "fr6", "fr6R", "fr7", "fr7R",
683 "fr8", "fr8R", "fr9", "fr9R",
684 "fr10", "fr10R", "fr11", "fr11R",
685 "fr12", "fr12R", "fr13", "fr13R",
686 "fr14", "fr14R", "fr15", "fr15R",
687 "fr16", "fr16R", "fr17", "fr17R",
688 "fr18", "fr18R", "fr19", "fr19R",
689 "fr20", "fr20R", "fr21", "fr21R",
690 "fr22", "fr22R", "fr23", "fr23R",
691 "fr24", "fr24R", "fr25", "fr25R",
692 "fr26", "fr26R", "fr27", "fr27R",
693 "fr28", "fr28R", "fr29", "fr29R",
694 "fr30", "fr30R", "fr31", "fr31R"
695 };
696 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
697 return NULL;
698 else
699 return names[i];
700 }
701
702 const char *
703 hppa64_register_name (int i)
704 {
705 static char *names[] = {
706 "flags", "r1", "rp", "r3",
707 "r4", "r5", "r6", "r7",
708 "r8", "r9", "r10", "r11",
709 "r12", "r13", "r14", "r15",
710 "r16", "r17", "r18", "r19",
711 "r20", "r21", "r22", "r23",
712 "r24", "r25", "r26", "dp",
713 "ret0", "ret1", "sp", "r31",
714 "sar", "pcoqh", "pcsqh", "pcoqt",
715 "pcsqt", "eiem", "iir", "isr",
716 "ior", "ipsw", "goto", "sr4",
717 "sr0", "sr1", "sr2", "sr3",
718 "sr5", "sr6", "sr7", "cr0",
719 "cr8", "cr9", "ccr", "cr12",
720 "cr13", "cr24", "cr25", "cr26",
721 "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",
722 "fpsr", "fpe1", "fpe2", "fpe3",
723 "fr4", "fr5", "fr6", "fr7",
724 "fr8", "fr9", "fr10", "fr11",
725 "fr12", "fr13", "fr14", "fr15",
726 "fr16", "fr17", "fr18", "fr19",
727 "fr20", "fr21", "fr22", "fr23",
728 "fr24", "fr25", "fr26", "fr27",
729 "fr28", "fr29", "fr30", "fr31"
730 };
731 if (i < 0 || i >= (sizeof (names) / sizeof (*names)))
732 return NULL;
733 else
734 return names[i];
735 }
736
737
738
739 /* Return the adjustment necessary to make for addresses on the stack
740 as presented by hpread.c.
741
742 This is necessary because of the stack direction on the PA and the
743 bizarre way in which someone (?) decided they wanted to handle
744 frame pointerless code in GDB. */
745 int
746 hpread_adjust_stack_address (CORE_ADDR func_addr)
747 {
748 struct unwind_table_entry *u;
749
750 u = find_unwind_entry (func_addr);
751 if (!u)
752 return 0;
753 else
754 return u->Total_frame_size << 3;
755 }
756
757 /* This function pushes a stack frame with arguments as part of the
758 inferior function calling mechanism.
759
760 This is the version of the function for the 32-bit PA machines, in
761 which later arguments appear at lower addresses. (The stack always
762 grows towards higher addresses.)
763
764 We simply allocate the appropriate amount of stack space and put
765 arguments into their proper slots. */
766
767 CORE_ADDR
768 hppa32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
769 struct regcache *regcache, CORE_ADDR bp_addr,
770 int nargs, struct value **args, CORE_ADDR sp,
771 int struct_return, CORE_ADDR struct_addr)
772 {
773 /* NOTE: cagney/2004-02-27: This is a guess - its implemented by
774 reverse engineering testsuite failures. */
775
776 /* Stack base address at which any pass-by-reference parameters are
777 stored. */
778 CORE_ADDR struct_end = 0;
779 /* Stack base address at which the first parameter is stored. */
780 CORE_ADDR param_end = 0;
781
782 /* The inner most end of the stack after all the parameters have
783 been pushed. */
784 CORE_ADDR new_sp = 0;
785
786 /* Two passes. First pass computes the location of everything,
787 second pass writes the bytes out. */
788 int write_pass;
789 for (write_pass = 0; write_pass < 2; write_pass++)
790 {
791 CORE_ADDR struct_ptr = 0;
792 CORE_ADDR param_ptr = 0;
793 int reg = 27; /* NOTE: Registers go down. */
794 int i;
795 for (i = 0; i < nargs; i++)
796 {
797 struct value *arg = args[i];
798 struct type *type = check_typedef (VALUE_TYPE (arg));
799 /* The corresponding parameter that is pushed onto the
800 stack, and [possibly] passed in a register. */
801 char param_val[8];
802 int param_len;
803 memset (param_val, 0, sizeof param_val);
804 if (TYPE_LENGTH (type) > 8)
805 {
806 /* Large parameter, pass by reference. Store the value
807 in "struct" area and then pass its address. */
808 param_len = 4;
809 struct_ptr += align_up (TYPE_LENGTH (type), 8);
810 if (write_pass)
811 write_memory (struct_end - struct_ptr, VALUE_CONTENTS (arg),
812 TYPE_LENGTH (type));
813 store_unsigned_integer (param_val, 4, struct_end - struct_ptr);
814 }
815 else if (TYPE_CODE (type) == TYPE_CODE_INT
816 || TYPE_CODE (type) == TYPE_CODE_ENUM)
817 {
818 /* Integer value store, right aligned. "unpack_long"
819 takes care of any sign-extension problems. */
820 param_len = align_up (TYPE_LENGTH (type), 4);
821 store_unsigned_integer (param_val, param_len,
822 unpack_long (type,
823 VALUE_CONTENTS (arg)));
824 }
825 else
826 {
827 /* Small struct value, store right aligned? */
828 param_len = align_up (TYPE_LENGTH (type), 4);
829 memcpy (param_val + param_len - TYPE_LENGTH (type),
830 VALUE_CONTENTS (arg), TYPE_LENGTH (type));
831 }
832 param_ptr += param_len;
833 reg -= param_len / 4;
834 if (write_pass)
835 {
836 write_memory (param_end - param_ptr, param_val, param_len);
837 if (reg >= 23)
838 {
839 regcache_cooked_write (regcache, reg, param_val);
840 if (param_len > 4)
841 regcache_cooked_write (regcache, reg + 1, param_val + 4);
842 }
843 }
844 }
845
846 /* Update the various stack pointers. */
847 if (!write_pass)
848 {
849 struct_end = sp + struct_ptr;
850 /* PARAM_PTR already accounts for all the arguments passed
851 by the user. However, the ABI mandates minimum stack
852 space allocations for outgoing arguments. The ABI also
853 mandates minimum stack alignments which we must
854 preserve. */
855 param_end = struct_end + max (align_up (param_ptr, 8), 16);
856 }
857 }
858
859 /* If a structure has to be returned, set up register 28 to hold its
860 address */
861 if (struct_return)
862 write_register (28, struct_addr);
863
864 /* Set the return address. */
865 regcache_cooked_write_unsigned (regcache, RP_REGNUM, bp_addr);
866
867 /* Update the Stack Pointer. */
868 regcache_cooked_write_unsigned (regcache, SP_REGNUM, param_end + 32);
869
870 /* The stack will have 32 bytes of additional space for a frame marker. */
871 return param_end + 32;
872 }
873
874 /* This function pushes a stack frame with arguments as part of the
875 inferior function calling mechanism.
876
877 This is the version for the PA64, in which later arguments appear
878 at higher addresses. (The stack always grows towards higher
879 addresses.)
880
881 We simply allocate the appropriate amount of stack space and put
882 arguments into their proper slots.
883
884 This ABI also requires that the caller provide an argument pointer
885 to the callee, so we do that too. */
886
887 CORE_ADDR
888 hppa64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
889 struct regcache *regcache, CORE_ADDR bp_addr,
890 int nargs, struct value **args, CORE_ADDR sp,
891 int struct_return, CORE_ADDR struct_addr)
892 {
893 /* NOTE: cagney/2004-02-27: This is a guess - its implemented by
894 reverse engineering testsuite failures. */
895
896 /* Stack base address at which any pass-by-reference parameters are
897 stored. */
898 CORE_ADDR struct_end = 0;
899 /* Stack base address at which the first parameter is stored. */
900 CORE_ADDR param_end = 0;
901
902 /* The inner most end of the stack after all the parameters have
903 been pushed. */
904 CORE_ADDR new_sp = 0;
905
906 /* Two passes. First pass computes the location of everything,
907 second pass writes the bytes out. */
908 int write_pass;
909 for (write_pass = 0; write_pass < 2; write_pass++)
910 {
911 CORE_ADDR struct_ptr = 0;
912 CORE_ADDR param_ptr = 0;
913 int i;
914 for (i = 0; i < nargs; i++)
915 {
916 struct value *arg = args[i];
917 struct type *type = check_typedef (VALUE_TYPE (arg));
918 if ((TYPE_CODE (type) == TYPE_CODE_INT
919 || TYPE_CODE (type) == TYPE_CODE_ENUM)
920 && TYPE_LENGTH (type) <= 8)
921 {
922 /* Integer value store, right aligned. "unpack_long"
923 takes care of any sign-extension problems. */
924 param_ptr += 8;
925 if (write_pass)
926 {
927 ULONGEST val = unpack_long (type, VALUE_CONTENTS (arg));
928 int reg = 27 - param_ptr / 8;
929 write_memory_unsigned_integer (param_end - param_ptr,
930 val, 8);
931 if (reg >= 19)
932 regcache_cooked_write_unsigned (regcache, reg, val);
933 }
934 }
935 else
936 {
937 /* Small struct value, store left aligned? */
938 int reg;
939 if (TYPE_LENGTH (type) > 8)
940 {
941 param_ptr = align_up (param_ptr, 16);
942 reg = 26 - param_ptr / 8;
943 param_ptr += align_up (TYPE_LENGTH (type), 16);
944 }
945 else
946 {
947 param_ptr = align_up (param_ptr, 8);
948 reg = 26 - param_ptr / 8;
949 param_ptr += align_up (TYPE_LENGTH (type), 8);
950 }
951 if (write_pass)
952 {
953 int byte;
954 write_memory (param_end - param_ptr, VALUE_CONTENTS (arg),
955 TYPE_LENGTH (type));
956 for (byte = 0; byte < TYPE_LENGTH (type); byte += 8)
957 {
958 if (reg >= 19)
959 {
960 int len = min (8, TYPE_LENGTH (type) - byte);
961 regcache_cooked_write_part (regcache, reg, 0, len,
962 VALUE_CONTENTS (arg) + byte);
963 }
964 reg--;
965 }
966 }
967 }
968 }
969 /* Update the various stack pointers. */
970 if (!write_pass)
971 {
972 struct_end = sp + struct_ptr;
973 /* PARAM_PTR already accounts for all the arguments passed
974 by the user. However, the ABI mandates minimum stack
975 space allocations for outgoing arguments. The ABI also
976 mandates minimum stack alignments which we must
977 preserve. */
978 param_end = struct_end + max (align_up (param_ptr, 16), 64);
979 }
980 }
981
982 /* If a structure has to be returned, set up register 28 to hold its
983 address */
984 if (struct_return)
985 write_register (28, struct_addr);
986
987 /* Set the return address. */
988 regcache_cooked_write_unsigned (regcache, RP_REGNUM, bp_addr);
989
990 /* Update the Stack Pointer. */
991 regcache_cooked_write_unsigned (regcache, SP_REGNUM, param_end + 64);
992
993 /* The stack will have 32 bytes of additional space for a frame marker. */
994 return param_end + 64;
995 }
996
997 static CORE_ADDR
998 hppa32_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
999 {
1000 /* HP frames are 64-byte (or cache line) aligned (yes that's _byte_
1001 and not _bit_)! */
1002 return align_up (addr, 64);
1003 }
1004
1005 /* Force all frames to 16-byte alignment. Better safe than sorry. */
1006
1007 static CORE_ADDR
1008 hppa64_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1009 {
1010 /* Just always 16-byte align. */
1011 return align_up (addr, 16);
1012 }
1013
1014
1015 /* Get the PC from %r31 if currently in a syscall. Also mask out privilege
1016 bits. */
1017
1018 static CORE_ADDR
1019 hppa_target_read_pc (ptid_t ptid)
1020 {
1021 int flags = read_register_pid (FLAGS_REGNUM, ptid);
1022
1023 /* The following test does not belong here. It is OS-specific, and belongs
1024 in native code. */
1025 /* Test SS_INSYSCALL */
1026 if (flags & 2)
1027 return read_register_pid (31, ptid) & ~0x3;
1028
1029 return read_register_pid (PCOQ_HEAD_REGNUM, ptid) & ~0x3;
1030 }
1031
1032 /* Write out the PC. If currently in a syscall, then also write the new
1033 PC value into %r31. */
1034
1035 static void
1036 hppa_target_write_pc (CORE_ADDR v, ptid_t ptid)
1037 {
1038 int flags = read_register_pid (FLAGS_REGNUM, ptid);
1039
1040 /* The following test does not belong here. It is OS-specific, and belongs
1041 in native code. */
1042 /* If in a syscall, then set %r31. Also make sure to get the
1043 privilege bits set correctly. */
1044 /* Test SS_INSYSCALL */
1045 if (flags & 2)
1046 write_register_pid (31, v | 0x3, ptid);
1047
1048 write_register_pid (PCOQ_HEAD_REGNUM, v, ptid);
1049 write_register_pid (PCOQ_TAIL_REGNUM, v + 4, ptid);
1050 }
1051
1052 /* return the alignment of a type in bytes. Structures have the maximum
1053 alignment required by their fields. */
1054
1055 static int
1056 hppa_alignof (struct type *type)
1057 {
1058 int max_align, align, i;
1059 CHECK_TYPEDEF (type);
1060 switch (TYPE_CODE (type))
1061 {
1062 case TYPE_CODE_PTR:
1063 case TYPE_CODE_INT:
1064 case TYPE_CODE_FLT:
1065 return TYPE_LENGTH (type);
1066 case TYPE_CODE_ARRAY:
1067 return hppa_alignof (TYPE_FIELD_TYPE (type, 0));
1068 case TYPE_CODE_STRUCT:
1069 case TYPE_CODE_UNION:
1070 max_align = 1;
1071 for (i = 0; i < TYPE_NFIELDS (type); i++)
1072 {
1073 /* Bit fields have no real alignment. */
1074 /* if (!TYPE_FIELD_BITPOS (type, i)) */
1075 if (!TYPE_FIELD_BITSIZE (type, i)) /* elz: this should be bitsize */
1076 {
1077 align = hppa_alignof (TYPE_FIELD_TYPE (type, i));
1078 max_align = max (max_align, align);
1079 }
1080 }
1081 return max_align;
1082 default:
1083 return 4;
1084 }
1085 }
1086
1087 /* Return one if PC is in the call path of a trampoline, else return zero.
1088
1089 Note we return one for *any* call trampoline (long-call, arg-reloc), not
1090 just shared library trampolines (import, export). */
1091
1092 static int
1093 hppa_in_solib_call_trampoline (CORE_ADDR pc, char *name)
1094 {
1095 struct minimal_symbol *minsym;
1096 struct unwind_table_entry *u;
1097 static CORE_ADDR dyncall = 0;
1098 static CORE_ADDR sr4export = 0;
1099
1100 #ifdef GDB_TARGET_IS_HPPA_20W
1101 /* PA64 has a completely different stub/trampoline scheme. Is it
1102 better? Maybe. It's certainly harder to determine with any
1103 certainty that we are in a stub because we can not refer to the
1104 unwinders to help.
1105
1106 The heuristic is simple. Try to lookup the current PC value in th
1107 minimal symbol table. If that fails, then assume we are not in a
1108 stub and return.
1109
1110 Then see if the PC value falls within the section bounds for the
1111 section containing the minimal symbol we found in the first
1112 step. If it does, then assume we are not in a stub and return.
1113
1114 Finally peek at the instructions to see if they look like a stub. */
1115 {
1116 struct minimal_symbol *minsym;
1117 asection *sec;
1118 CORE_ADDR addr;
1119 int insn, i;
1120
1121 minsym = lookup_minimal_symbol_by_pc (pc);
1122 if (! minsym)
1123 return 0;
1124
1125 sec = SYMBOL_BFD_SECTION (minsym);
1126
1127 if (bfd_get_section_vma (sec->owner, sec) <= pc
1128 && pc < (bfd_get_section_vma (sec->owner, sec)
1129 + bfd_section_size (sec->owner, sec)))
1130 return 0;
1131
1132 /* We might be in a stub. Peek at the instructions. Stubs are 3
1133 instructions long. */
1134 insn = read_memory_integer (pc, 4);
1135
1136 /* Find out where we think we are within the stub. */
1137 if ((insn & 0xffffc00e) == 0x53610000)
1138 addr = pc;
1139 else if ((insn & 0xffffffff) == 0xe820d000)
1140 addr = pc - 4;
1141 else if ((insn & 0xffffc00e) == 0x537b0000)
1142 addr = pc - 8;
1143 else
1144 return 0;
1145
1146 /* Now verify each insn in the range looks like a stub instruction. */
1147 insn = read_memory_integer (addr, 4);
1148 if ((insn & 0xffffc00e) != 0x53610000)
1149 return 0;
1150
1151 /* Now verify each insn in the range looks like a stub instruction. */
1152 insn = read_memory_integer (addr + 4, 4);
1153 if ((insn & 0xffffffff) != 0xe820d000)
1154 return 0;
1155
1156 /* Now verify each insn in the range looks like a stub instruction. */
1157 insn = read_memory_integer (addr + 8, 4);
1158 if ((insn & 0xffffc00e) != 0x537b0000)
1159 return 0;
1160
1161 /* Looks like a stub. */
1162 return 1;
1163 }
1164 #endif
1165
1166 /* FIXME XXX - dyncall and sr4export must be initialized whenever we get a
1167 new exec file */
1168
1169 /* First see if PC is in one of the two C-library trampolines. */
1170 if (!dyncall)
1171 {
1172 minsym = lookup_minimal_symbol ("$$dyncall", NULL, NULL);
1173 if (minsym)
1174 dyncall = SYMBOL_VALUE_ADDRESS (minsym);
1175 else
1176 dyncall = -1;
1177 }
1178
1179 if (!sr4export)
1180 {
1181 minsym = lookup_minimal_symbol ("_sr4export", NULL, NULL);
1182 if (minsym)
1183 sr4export = SYMBOL_VALUE_ADDRESS (minsym);
1184 else
1185 sr4export = -1;
1186 }
1187
1188 if (pc == dyncall || pc == sr4export)
1189 return 1;
1190
1191 minsym = lookup_minimal_symbol_by_pc (pc);
1192 if (minsym && strcmp (DEPRECATED_SYMBOL_NAME (minsym), ".stub") == 0)
1193 return 1;
1194
1195 /* Get the unwind descriptor corresponding to PC, return zero
1196 if no unwind was found. */
1197 u = find_unwind_entry (pc);
1198 if (!u)
1199 return 0;
1200
1201 /* If this isn't a linker stub, then return now. */
1202 if (u->stub_unwind.stub_type == 0)
1203 return 0;
1204
1205 /* By definition a long-branch stub is a call stub. */
1206 if (u->stub_unwind.stub_type == LONG_BRANCH)
1207 return 1;
1208
1209 /* The call and return path execute the same instructions within
1210 an IMPORT stub! So an IMPORT stub is both a call and return
1211 trampoline. */
1212 if (u->stub_unwind.stub_type == IMPORT)
1213 return 1;
1214
1215 /* Parameter relocation stubs always have a call path and may have a
1216 return path. */
1217 if (u->stub_unwind.stub_type == PARAMETER_RELOCATION
1218 || u->stub_unwind.stub_type == EXPORT)
1219 {
1220 CORE_ADDR addr;
1221
1222 /* Search forward from the current PC until we hit a branch
1223 or the end of the stub. */
1224 for (addr = pc; addr <= u->region_end; addr += 4)
1225 {
1226 unsigned long insn;
1227
1228 insn = read_memory_integer (addr, 4);
1229
1230 /* Does it look like a bl? If so then it's the call path, if
1231 we find a bv or be first, then we're on the return path. */
1232 if ((insn & 0xfc00e000) == 0xe8000000)
1233 return 1;
1234 else if ((insn & 0xfc00e001) == 0xe800c000
1235 || (insn & 0xfc000000) == 0xe0000000)
1236 return 0;
1237 }
1238
1239 /* Should never happen. */
1240 warning ("Unable to find branch in parameter relocation stub.\n");
1241 return 0;
1242 }
1243
1244 /* Unknown stub type. For now, just return zero. */
1245 return 0;
1246 }
1247
1248 /* Return one if PC is in the return path of a trampoline, else return zero.
1249
1250 Note we return one for *any* call trampoline (long-call, arg-reloc), not
1251 just shared library trampolines (import, export). */
1252
1253 static int
1254 hppa_in_solib_return_trampoline (CORE_ADDR pc, char *name)
1255 {
1256 struct unwind_table_entry *u;
1257
1258 /* Get the unwind descriptor corresponding to PC, return zero
1259 if no unwind was found. */
1260 u = find_unwind_entry (pc);
1261 if (!u)
1262 return 0;
1263
1264 /* If this isn't a linker stub or it's just a long branch stub, then
1265 return zero. */
1266 if (u->stub_unwind.stub_type == 0 || u->stub_unwind.stub_type == LONG_BRANCH)
1267 return 0;
1268
1269 /* The call and return path execute the same instructions within
1270 an IMPORT stub! So an IMPORT stub is both a call and return
1271 trampoline. */
1272 if (u->stub_unwind.stub_type == IMPORT)
1273 return 1;
1274
1275 /* Parameter relocation stubs always have a call path and may have a
1276 return path. */
1277 if (u->stub_unwind.stub_type == PARAMETER_RELOCATION
1278 || u->stub_unwind.stub_type == EXPORT)
1279 {
1280 CORE_ADDR addr;
1281
1282 /* Search forward from the current PC until we hit a branch
1283 or the end of the stub. */
1284 for (addr = pc; addr <= u->region_end; addr += 4)
1285 {
1286 unsigned long insn;
1287
1288 insn = read_memory_integer (addr, 4);
1289
1290 /* Does it look like a bl? If so then it's the call path, if
1291 we find a bv or be first, then we're on the return path. */
1292 if ((insn & 0xfc00e000) == 0xe8000000)
1293 return 0;
1294 else if ((insn & 0xfc00e001) == 0xe800c000
1295 || (insn & 0xfc000000) == 0xe0000000)
1296 return 1;
1297 }
1298
1299 /* Should never happen. */
1300 warning ("Unable to find branch in parameter relocation stub.\n");
1301 return 0;
1302 }
1303
1304 /* Unknown stub type. For now, just return zero. */
1305 return 0;
1306
1307 }
1308
1309 /* Figure out if PC is in a trampoline, and if so find out where
1310 the trampoline will jump to. If not in a trampoline, return zero.
1311
1312 Simple code examination probably is not a good idea since the code
1313 sequences in trampolines can also appear in user code.
1314
1315 We use unwinds and information from the minimal symbol table to
1316 determine when we're in a trampoline. This won't work for ELF
1317 (yet) since it doesn't create stub unwind entries. Whether or
1318 not ELF will create stub unwinds or normal unwinds for linker
1319 stubs is still being debated.
1320
1321 This should handle simple calls through dyncall or sr4export,
1322 long calls, argument relocation stubs, and dyncall/sr4export
1323 calling an argument relocation stub. It even handles some stubs
1324 used in dynamic executables. */
1325
1326 static CORE_ADDR
1327 hppa_skip_trampoline_code (CORE_ADDR pc)
1328 {
1329 long orig_pc = pc;
1330 long prev_inst, curr_inst, loc;
1331 static CORE_ADDR dyncall = 0;
1332 static CORE_ADDR dyncall_external = 0;
1333 static CORE_ADDR sr4export = 0;
1334 struct minimal_symbol *msym;
1335 struct unwind_table_entry *u;
1336
1337 /* FIXME XXX - dyncall and sr4export must be initialized whenever we get a
1338 new exec file */
1339
1340 if (!dyncall)
1341 {
1342 msym = lookup_minimal_symbol ("$$dyncall", NULL, NULL);
1343 if (msym)
1344 dyncall = SYMBOL_VALUE_ADDRESS (msym);
1345 else
1346 dyncall = -1;
1347 }
1348
1349 if (!dyncall_external)
1350 {
1351 msym = lookup_minimal_symbol ("$$dyncall_external", NULL, NULL);
1352 if (msym)
1353 dyncall_external = SYMBOL_VALUE_ADDRESS (msym);
1354 else
1355 dyncall_external = -1;
1356 }
1357
1358 if (!sr4export)
1359 {
1360 msym = lookup_minimal_symbol ("_sr4export", NULL, NULL);
1361 if (msym)
1362 sr4export = SYMBOL_VALUE_ADDRESS (msym);
1363 else
1364 sr4export = -1;
1365 }
1366
1367 /* Addresses passed to dyncall may *NOT* be the actual address
1368 of the function. So we may have to do something special. */
1369 if (pc == dyncall)
1370 {
1371 pc = (CORE_ADDR) read_register (22);
1372
1373 /* If bit 30 (counting from the left) is on, then pc is the address of
1374 the PLT entry for this function, not the address of the function
1375 itself. Bit 31 has meaning too, but only for MPE. */
1376 if (pc & 0x2)
1377 pc = (CORE_ADDR) read_memory_integer (pc & ~0x3, TARGET_PTR_BIT / 8);
1378 }
1379 if (pc == dyncall_external)
1380 {
1381 pc = (CORE_ADDR) read_register (22);
1382 pc = (CORE_ADDR) read_memory_integer (pc & ~0x3, TARGET_PTR_BIT / 8);
1383 }
1384 else if (pc == sr4export)
1385 pc = (CORE_ADDR) (read_register (22));
1386
1387 /* Get the unwind descriptor corresponding to PC, return zero
1388 if no unwind was found. */
1389 u = find_unwind_entry (pc);
1390 if (!u)
1391 return 0;
1392
1393 /* If this isn't a linker stub, then return now. */
1394 /* elz: attention here! (FIXME) because of a compiler/linker
1395 error, some stubs which should have a non zero stub_unwind.stub_type
1396 have unfortunately a value of zero. So this function would return here
1397 as if we were not in a trampoline. To fix this, we go look at the partial
1398 symbol information, which reports this guy as a stub.
1399 (FIXME): Unfortunately, we are not that lucky: it turns out that the
1400 partial symbol information is also wrong sometimes. This is because
1401 when it is entered (somread.c::som_symtab_read()) it can happen that
1402 if the type of the symbol (from the som) is Entry, and the symbol is
1403 in a shared library, then it can also be a trampoline. This would
1404 be OK, except that I believe the way they decide if we are ina shared library
1405 does not work. SOOOO..., even if we have a regular function w/o trampolines
1406 its minimal symbol can be assigned type mst_solib_trampoline.
1407 Also, if we find that the symbol is a real stub, then we fix the unwind
1408 descriptor, and define the stub type to be EXPORT.
1409 Hopefully this is correct most of the times. */
1410 if (u->stub_unwind.stub_type == 0)
1411 {
1412
1413 /* elz: NOTE (FIXME!) once the problem with the unwind information is fixed
1414 we can delete all the code which appears between the lines */
1415 /*--------------------------------------------------------------------------*/
1416 msym = lookup_minimal_symbol_by_pc (pc);
1417
1418 if (msym == NULL || MSYMBOL_TYPE (msym) != mst_solib_trampoline)
1419 return orig_pc == pc ? 0 : pc & ~0x3;
1420
1421 else if (msym != NULL && MSYMBOL_TYPE (msym) == mst_solib_trampoline)
1422 {
1423 struct objfile *objfile;
1424 struct minimal_symbol *msymbol;
1425 int function_found = 0;
1426
1427 /* go look if there is another minimal symbol with the same name as
1428 this one, but with type mst_text. This would happen if the msym
1429 is an actual trampoline, in which case there would be another
1430 symbol with the same name corresponding to the real function */
1431
1432 ALL_MSYMBOLS (objfile, msymbol)
1433 {
1434 if (MSYMBOL_TYPE (msymbol) == mst_text
1435 && DEPRECATED_STREQ (DEPRECATED_SYMBOL_NAME (msymbol), DEPRECATED_SYMBOL_NAME (msym)))
1436 {
1437 function_found = 1;
1438 break;
1439 }
1440 }
1441
1442 if (function_found)
1443 /* the type of msym is correct (mst_solib_trampoline), but
1444 the unwind info is wrong, so set it to the correct value */
1445 u->stub_unwind.stub_type = EXPORT;
1446 else
1447 /* the stub type info in the unwind is correct (this is not a
1448 trampoline), but the msym type information is wrong, it
1449 should be mst_text. So we need to fix the msym, and also
1450 get out of this function */
1451 {
1452 MSYMBOL_TYPE (msym) = mst_text;
1453 return orig_pc == pc ? 0 : pc & ~0x3;
1454 }
1455 }
1456
1457 /*--------------------------------------------------------------------------*/
1458 }
1459
1460 /* It's a stub. Search for a branch and figure out where it goes.
1461 Note we have to handle multi insn branch sequences like ldil;ble.
1462 Most (all?) other branches can be determined by examining the contents
1463 of certain registers and the stack. */
1464
1465 loc = pc;
1466 curr_inst = 0;
1467 prev_inst = 0;
1468 while (1)
1469 {
1470 /* Make sure we haven't walked outside the range of this stub. */
1471 if (u != find_unwind_entry (loc))
1472 {
1473 warning ("Unable to find branch in linker stub");
1474 return orig_pc == pc ? 0 : pc & ~0x3;
1475 }
1476
1477 prev_inst = curr_inst;
1478 curr_inst = read_memory_integer (loc, 4);
1479
1480 /* Does it look like a branch external using %r1? Then it's the
1481 branch from the stub to the actual function. */
1482 if ((curr_inst & 0xffe0e000) == 0xe0202000)
1483 {
1484 /* Yup. See if the previous instruction loaded
1485 a value into %r1. If so compute and return the jump address. */
1486 if ((prev_inst & 0xffe00000) == 0x20200000)
1487 return (extract_21 (prev_inst) + extract_17 (curr_inst)) & ~0x3;
1488 else
1489 {
1490 warning ("Unable to find ldil X,%%r1 before ble Y(%%sr4,%%r1).");
1491 return orig_pc == pc ? 0 : pc & ~0x3;
1492 }
1493 }
1494
1495 /* Does it look like a be 0(sr0,%r21)? OR
1496 Does it look like a be, n 0(sr0,%r21)? OR
1497 Does it look like a bve (r21)? (this is on PA2.0)
1498 Does it look like a bve, n(r21)? (this is also on PA2.0)
1499 That's the branch from an
1500 import stub to an export stub.
1501
1502 It is impossible to determine the target of the branch via
1503 simple examination of instructions and/or data (consider
1504 that the address in the plabel may be the address of the
1505 bind-on-reference routine in the dynamic loader).
1506
1507 So we have try an alternative approach.
1508
1509 Get the name of the symbol at our current location; it should
1510 be a stub symbol with the same name as the symbol in the
1511 shared library.
1512
1513 Then lookup a minimal symbol with the same name; we should
1514 get the minimal symbol for the target routine in the shared
1515 library as those take precedence of import/export stubs. */
1516 if ((curr_inst == 0xe2a00000) ||
1517 (curr_inst == 0xe2a00002) ||
1518 (curr_inst == 0xeaa0d000) ||
1519 (curr_inst == 0xeaa0d002))
1520 {
1521 struct minimal_symbol *stubsym, *libsym;
1522
1523 stubsym = lookup_minimal_symbol_by_pc (loc);
1524 if (stubsym == NULL)
1525 {
1526 warning ("Unable to find symbol for 0x%lx", loc);
1527 return orig_pc == pc ? 0 : pc & ~0x3;
1528 }
1529
1530 libsym = lookup_minimal_symbol (DEPRECATED_SYMBOL_NAME (stubsym), NULL, NULL);
1531 if (libsym == NULL)
1532 {
1533 warning ("Unable to find library symbol for %s\n",
1534 DEPRECATED_SYMBOL_NAME (stubsym));
1535 return orig_pc == pc ? 0 : pc & ~0x3;
1536 }
1537
1538 return SYMBOL_VALUE (libsym);
1539 }
1540
1541 /* Does it look like bl X,%rp or bl X,%r0? Another way to do a
1542 branch from the stub to the actual function. */
1543 /*elz */
1544 else if ((curr_inst & 0xffe0e000) == 0xe8400000
1545 || (curr_inst & 0xffe0e000) == 0xe8000000
1546 || (curr_inst & 0xffe0e000) == 0xe800A000)
1547 return (loc + extract_17 (curr_inst) + 8) & ~0x3;
1548
1549 /* Does it look like bv (rp)? Note this depends on the
1550 current stack pointer being the same as the stack
1551 pointer in the stub itself! This is a branch on from the
1552 stub back to the original caller. */
1553 /*else if ((curr_inst & 0xffe0e000) == 0xe840c000) */
1554 else if ((curr_inst & 0xffe0f000) == 0xe840c000)
1555 {
1556 /* Yup. See if the previous instruction loaded
1557 rp from sp - 8. */
1558 if (prev_inst == 0x4bc23ff1)
1559 return (read_memory_integer
1560 (read_register (HPPA_SP_REGNUM) - 8, 4)) & ~0x3;
1561 else
1562 {
1563 warning ("Unable to find restore of %%rp before bv (%%rp).");
1564 return orig_pc == pc ? 0 : pc & ~0x3;
1565 }
1566 }
1567
1568 /* elz: added this case to capture the new instruction
1569 at the end of the return part of an export stub used by
1570 the PA2.0: BVE, n (rp) */
1571 else if ((curr_inst & 0xffe0f000) == 0xe840d000)
1572 {
1573 return (read_memory_integer
1574 (read_register (HPPA_SP_REGNUM) - 24, TARGET_PTR_BIT / 8)) & ~0x3;
1575 }
1576
1577 /* What about be,n 0(sr0,%rp)? It's just another way we return to
1578 the original caller from the stub. Used in dynamic executables. */
1579 else if (curr_inst == 0xe0400002)
1580 {
1581 /* The value we jump to is sitting in sp - 24. But that's
1582 loaded several instructions before the be instruction.
1583 I guess we could check for the previous instruction being
1584 mtsp %r1,%sr0 if we want to do sanity checking. */
1585 return (read_memory_integer
1586 (read_register (HPPA_SP_REGNUM) - 24, TARGET_PTR_BIT / 8)) & ~0x3;
1587 }
1588
1589 /* Haven't found the branch yet, but we're still in the stub.
1590 Keep looking. */
1591 loc += 4;
1592 }
1593 }
1594
1595
1596 /* For the given instruction (INST), return any adjustment it makes
1597 to the stack pointer or zero for no adjustment.
1598
1599 This only handles instructions commonly found in prologues. */
1600
1601 static int
1602 prologue_inst_adjust_sp (unsigned long inst)
1603 {
1604 /* This must persist across calls. */
1605 static int save_high21;
1606
1607 /* The most common way to perform a stack adjustment ldo X(sp),sp */
1608 if ((inst & 0xffffc000) == 0x37de0000)
1609 return extract_14 (inst);
1610
1611 /* stwm X,D(sp) */
1612 if ((inst & 0xffe00000) == 0x6fc00000)
1613 return extract_14 (inst);
1614
1615 /* std,ma X,D(sp) */
1616 if ((inst & 0xffe00008) == 0x73c00008)
1617 return (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
1618
1619 /* addil high21,%r1; ldo low11,(%r1),%r30)
1620 save high bits in save_high21 for later use. */
1621 if ((inst & 0xffe00000) == 0x28200000)
1622 {
1623 save_high21 = extract_21 (inst);
1624 return 0;
1625 }
1626
1627 if ((inst & 0xffff0000) == 0x343e0000)
1628 return save_high21 + extract_14 (inst);
1629
1630 /* fstws as used by the HP compilers. */
1631 if ((inst & 0xffffffe0) == 0x2fd01220)
1632 return extract_5_load (inst);
1633
1634 /* No adjustment. */
1635 return 0;
1636 }
1637
1638 /* Return nonzero if INST is a branch of some kind, else return zero. */
1639
1640 static int
1641 is_branch (unsigned long inst)
1642 {
1643 switch (inst >> 26)
1644 {
1645 case 0x20:
1646 case 0x21:
1647 case 0x22:
1648 case 0x23:
1649 case 0x27:
1650 case 0x28:
1651 case 0x29:
1652 case 0x2a:
1653 case 0x2b:
1654 case 0x2f:
1655 case 0x30:
1656 case 0x31:
1657 case 0x32:
1658 case 0x33:
1659 case 0x38:
1660 case 0x39:
1661 case 0x3a:
1662 case 0x3b:
1663 return 1;
1664
1665 default:
1666 return 0;
1667 }
1668 }
1669
1670 /* Return the register number for a GR which is saved by INST or
1671 zero it INST does not save a GR. */
1672
1673 static int
1674 inst_saves_gr (unsigned long inst)
1675 {
1676 /* Does it look like a stw? */
1677 if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b
1678 || (inst >> 26) == 0x1f
1679 || ((inst >> 26) == 0x1f
1680 && ((inst >> 6) == 0xa)))
1681 return extract_5R_store (inst);
1682
1683 /* Does it look like a std? */
1684 if ((inst >> 26) == 0x1c
1685 || ((inst >> 26) == 0x03
1686 && ((inst >> 6) & 0xf) == 0xb))
1687 return extract_5R_store (inst);
1688
1689 /* Does it look like a stwm? GCC & HPC may use this in prologues. */
1690 if ((inst >> 26) == 0x1b)
1691 return extract_5R_store (inst);
1692
1693 /* Does it look like sth or stb? HPC versions 9.0 and later use these
1694 too. */
1695 if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18
1696 || ((inst >> 26) == 0x3
1697 && (((inst >> 6) & 0xf) == 0x8
1698 || (inst >> 6) & 0xf) == 0x9))
1699 return extract_5R_store (inst);
1700
1701 return 0;
1702 }
1703
1704 /* Return the register number for a FR which is saved by INST or
1705 zero it INST does not save a FR.
1706
1707 Note we only care about full 64bit register stores (that's the only
1708 kind of stores the prologue will use).
1709
1710 FIXME: What about argument stores with the HP compiler in ANSI mode? */
1711
1712 static int
1713 inst_saves_fr (unsigned long inst)
1714 {
1715 /* is this an FSTD ? */
1716 if ((inst & 0xfc00dfc0) == 0x2c001200)
1717 return extract_5r_store (inst);
1718 if ((inst & 0xfc000002) == 0x70000002)
1719 return extract_5R_store (inst);
1720 /* is this an FSTW ? */
1721 if ((inst & 0xfc00df80) == 0x24001200)
1722 return extract_5r_store (inst);
1723 if ((inst & 0xfc000002) == 0x7c000000)
1724 return extract_5R_store (inst);
1725 return 0;
1726 }
1727
1728 /* Advance PC across any function entry prologue instructions
1729 to reach some "real" code.
1730
1731 Use information in the unwind table to determine what exactly should
1732 be in the prologue. */
1733
1734
1735 CORE_ADDR
1736 skip_prologue_hard_way (CORE_ADDR pc)
1737 {
1738 char buf[4];
1739 CORE_ADDR orig_pc = pc;
1740 unsigned long inst, stack_remaining, save_gr, save_fr, save_rp, save_sp;
1741 unsigned long args_stored, status, i, restart_gr, restart_fr;
1742 struct unwind_table_entry *u;
1743
1744 restart_gr = 0;
1745 restart_fr = 0;
1746
1747 restart:
1748 u = find_unwind_entry (pc);
1749 if (!u)
1750 return pc;
1751
1752 /* If we are not at the beginning of a function, then return now. */
1753 if ((pc & ~0x3) != u->region_start)
1754 return pc;
1755
1756 /* This is how much of a frame adjustment we need to account for. */
1757 stack_remaining = u->Total_frame_size << 3;
1758
1759 /* Magic register saves we want to know about. */
1760 save_rp = u->Save_RP;
1761 save_sp = u->Save_SP;
1762
1763 /* An indication that args may be stored into the stack. Unfortunately
1764 the HPUX compilers tend to set this in cases where no args were
1765 stored too!. */
1766 args_stored = 1;
1767
1768 /* Turn the Entry_GR field into a bitmask. */
1769 save_gr = 0;
1770 for (i = 3; i < u->Entry_GR + 3; i++)
1771 {
1772 /* Frame pointer gets saved into a special location. */
1773 if (u->Save_SP && i == HPPA_FP_REGNUM)
1774 continue;
1775
1776 save_gr |= (1 << i);
1777 }
1778 save_gr &= ~restart_gr;
1779
1780 /* Turn the Entry_FR field into a bitmask too. */
1781 save_fr = 0;
1782 for (i = 12; i < u->Entry_FR + 12; i++)
1783 save_fr |= (1 << i);
1784 save_fr &= ~restart_fr;
1785
1786 /* Loop until we find everything of interest or hit a branch.
1787
1788 For unoptimized GCC code and for any HP CC code this will never ever
1789 examine any user instructions.
1790
1791 For optimzied GCC code we're faced with problems. GCC will schedule
1792 its prologue and make prologue instructions available for delay slot
1793 filling. The end result is user code gets mixed in with the prologue
1794 and a prologue instruction may be in the delay slot of the first branch
1795 or call.
1796
1797 Some unexpected things are expected with debugging optimized code, so
1798 we allow this routine to walk past user instructions in optimized
1799 GCC code. */
1800 while (save_gr || save_fr || save_rp || save_sp || stack_remaining > 0
1801 || args_stored)
1802 {
1803 unsigned int reg_num;
1804 unsigned long old_stack_remaining, old_save_gr, old_save_fr;
1805 unsigned long old_save_rp, old_save_sp, next_inst;
1806
1807 /* Save copies of all the triggers so we can compare them later
1808 (only for HPC). */
1809 old_save_gr = save_gr;
1810 old_save_fr = save_fr;
1811 old_save_rp = save_rp;
1812 old_save_sp = save_sp;
1813 old_stack_remaining = stack_remaining;
1814
1815 status = target_read_memory (pc, buf, 4);
1816 inst = extract_unsigned_integer (buf, 4);
1817
1818 /* Yow! */
1819 if (status != 0)
1820 return pc;
1821
1822 /* Note the interesting effects of this instruction. */
1823 stack_remaining -= prologue_inst_adjust_sp (inst);
1824
1825 /* There are limited ways to store the return pointer into the
1826 stack. */
1827 if (inst == 0x6bc23fd9 || inst == 0x0fc212c1)
1828 save_rp = 0;
1829
1830 /* These are the only ways we save SP into the stack. At this time
1831 the HP compilers never bother to save SP into the stack. */
1832 if ((inst & 0xffffc000) == 0x6fc10000
1833 || (inst & 0xffffc00c) == 0x73c10008)
1834 save_sp = 0;
1835
1836 /* Are we loading some register with an offset from the argument
1837 pointer? */
1838 if ((inst & 0xffe00000) == 0x37a00000
1839 || (inst & 0xffffffe0) == 0x081d0240)
1840 {
1841 pc += 4;
1842 continue;
1843 }
1844
1845 /* Account for general and floating-point register saves. */
1846 reg_num = inst_saves_gr (inst);
1847 save_gr &= ~(1 << reg_num);
1848
1849 /* Ugh. Also account for argument stores into the stack.
1850 Unfortunately args_stored only tells us that some arguments
1851 where stored into the stack. Not how many or what kind!
1852
1853 This is a kludge as on the HP compiler sets this bit and it
1854 never does prologue scheduling. So once we see one, skip past
1855 all of them. We have similar code for the fp arg stores below.
1856
1857 FIXME. Can still die if we have a mix of GR and FR argument
1858 stores! */
1859 if (reg_num >= (TARGET_PTR_BIT == 64 ? 19 : 23) && reg_num <= 26)
1860 {
1861 while (reg_num >= (TARGET_PTR_BIT == 64 ? 19 : 23) && reg_num <= 26)
1862 {
1863 pc += 4;
1864 status = target_read_memory (pc, buf, 4);
1865 inst = extract_unsigned_integer (buf, 4);
1866 if (status != 0)
1867 return pc;
1868 reg_num = inst_saves_gr (inst);
1869 }
1870 args_stored = 0;
1871 continue;
1872 }
1873
1874 reg_num = inst_saves_fr (inst);
1875 save_fr &= ~(1 << reg_num);
1876
1877 status = target_read_memory (pc + 4, buf, 4);
1878 next_inst = extract_unsigned_integer (buf, 4);
1879
1880 /* Yow! */
1881 if (status != 0)
1882 return pc;
1883
1884 /* We've got to be read to handle the ldo before the fp register
1885 save. */
1886 if ((inst & 0xfc000000) == 0x34000000
1887 && inst_saves_fr (next_inst) >= 4
1888 && inst_saves_fr (next_inst) <= (TARGET_PTR_BIT == 64 ? 11 : 7))
1889 {
1890 /* So we drop into the code below in a reasonable state. */
1891 reg_num = inst_saves_fr (next_inst);
1892 pc -= 4;
1893 }
1894
1895 /* Ugh. Also account for argument stores into the stack.
1896 This is a kludge as on the HP compiler sets this bit and it
1897 never does prologue scheduling. So once we see one, skip past
1898 all of them. */
1899 if (reg_num >= 4 && reg_num <= (TARGET_PTR_BIT == 64 ? 11 : 7))
1900 {
1901 while (reg_num >= 4 && reg_num <= (TARGET_PTR_BIT == 64 ? 11 : 7))
1902 {
1903 pc += 8;
1904 status = target_read_memory (pc, buf, 4);
1905 inst = extract_unsigned_integer (buf, 4);
1906 if (status != 0)
1907 return pc;
1908 if ((inst & 0xfc000000) != 0x34000000)
1909 break;
1910 status = target_read_memory (pc + 4, buf, 4);
1911 next_inst = extract_unsigned_integer (buf, 4);
1912 if (status != 0)
1913 return pc;
1914 reg_num = inst_saves_fr (next_inst);
1915 }
1916 args_stored = 0;
1917 continue;
1918 }
1919
1920 /* Quit if we hit any kind of branch. This can happen if a prologue
1921 instruction is in the delay slot of the first call/branch. */
1922 if (is_branch (inst))
1923 break;
1924
1925 /* What a crock. The HP compilers set args_stored even if no
1926 arguments were stored into the stack (boo hiss). This could
1927 cause this code to then skip a bunch of user insns (up to the
1928 first branch).
1929
1930 To combat this we try to identify when args_stored was bogusly
1931 set and clear it. We only do this when args_stored is nonzero,
1932 all other resources are accounted for, and nothing changed on
1933 this pass. */
1934 if (args_stored
1935 && !(save_gr || save_fr || save_rp || save_sp || stack_remaining > 0)
1936 && old_save_gr == save_gr && old_save_fr == save_fr
1937 && old_save_rp == save_rp && old_save_sp == save_sp
1938 && old_stack_remaining == stack_remaining)
1939 break;
1940
1941 /* Bump the PC. */
1942 pc += 4;
1943 }
1944
1945 /* We've got a tenative location for the end of the prologue. However
1946 because of limitations in the unwind descriptor mechanism we may
1947 have went too far into user code looking for the save of a register
1948 that does not exist. So, if there registers we expected to be saved
1949 but never were, mask them out and restart.
1950
1951 This should only happen in optimized code, and should be very rare. */
1952 if (save_gr || (save_fr && !(restart_fr || restart_gr)))
1953 {
1954 pc = orig_pc;
1955 restart_gr = save_gr;
1956 restart_fr = save_fr;
1957 goto restart;
1958 }
1959
1960 return pc;
1961 }
1962
1963
1964 /* Return the address of the PC after the last prologue instruction if
1965 we can determine it from the debug symbols. Else return zero. */
1966
1967 static CORE_ADDR
1968 after_prologue (CORE_ADDR pc)
1969 {
1970 struct symtab_and_line sal;
1971 CORE_ADDR func_addr, func_end;
1972 struct symbol *f;
1973
1974 /* If we can not find the symbol in the partial symbol table, then
1975 there is no hope we can determine the function's start address
1976 with this code. */
1977 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
1978 return 0;
1979
1980 /* Get the line associated with FUNC_ADDR. */
1981 sal = find_pc_line (func_addr, 0);
1982
1983 /* There are only two cases to consider. First, the end of the source line
1984 is within the function bounds. In that case we return the end of the
1985 source line. Second is the end of the source line extends beyond the
1986 bounds of the current function. We need to use the slow code to
1987 examine instructions in that case.
1988
1989 Anything else is simply a bug elsewhere. Fixing it here is absolutely
1990 the wrong thing to do. In fact, it should be entirely possible for this
1991 function to always return zero since the slow instruction scanning code
1992 is supposed to *always* work. If it does not, then it is a bug. */
1993 if (sal.end < func_end)
1994 return sal.end;
1995 else
1996 return 0;
1997 }
1998
1999 /* To skip prologues, I use this predicate. Returns either PC itself
2000 if the code at PC does not look like a function prologue; otherwise
2001 returns an address that (if we're lucky) follows the prologue. If
2002 LENIENT, then we must skip everything which is involved in setting
2003 up the frame (it's OK to skip more, just so long as we don't skip
2004 anything which might clobber the registers which are being saved.
2005 Currently we must not skip more on the alpha, but we might the lenient
2006 stuff some day. */
2007
2008 static CORE_ADDR
2009 hppa_skip_prologue (CORE_ADDR pc)
2010 {
2011 unsigned long inst;
2012 int offset;
2013 CORE_ADDR post_prologue_pc;
2014 char buf[4];
2015
2016 /* See if we can determine the end of the prologue via the symbol table.
2017 If so, then return either PC, or the PC after the prologue, whichever
2018 is greater. */
2019
2020 post_prologue_pc = after_prologue (pc);
2021
2022 /* If after_prologue returned a useful address, then use it. Else
2023 fall back on the instruction skipping code.
2024
2025 Some folks have claimed this causes problems because the breakpoint
2026 may be the first instruction of the prologue. If that happens, then
2027 the instruction skipping code has a bug that needs to be fixed. */
2028 if (post_prologue_pc != 0)
2029 return max (pc, post_prologue_pc);
2030 else
2031 return (skip_prologue_hard_way (pc));
2032 }
2033
2034 struct hppa_frame_cache
2035 {
2036 CORE_ADDR base;
2037 struct trad_frame_saved_reg *saved_regs;
2038 };
2039
2040 static struct hppa_frame_cache *
2041 hppa_frame_cache (struct frame_info *next_frame, void **this_cache)
2042 {
2043 struct hppa_frame_cache *cache;
2044 long saved_gr_mask;
2045 long saved_fr_mask;
2046 CORE_ADDR this_sp;
2047 long frame_size;
2048 struct unwind_table_entry *u;
2049 int i;
2050
2051 if ((*this_cache) != NULL)
2052 return (*this_cache);
2053 cache = FRAME_OBSTACK_ZALLOC (struct hppa_frame_cache);
2054 (*this_cache) = cache;
2055 cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
2056
2057 /* Yow! */
2058 u = find_unwind_entry (frame_func_unwind (next_frame));
2059 if (!u)
2060 return (*this_cache);
2061
2062 /* Turn the Entry_GR field into a bitmask. */
2063 saved_gr_mask = 0;
2064 for (i = 3; i < u->Entry_GR + 3; i++)
2065 {
2066 /* Frame pointer gets saved into a special location. */
2067 if (u->Save_SP && i == HPPA_FP_REGNUM)
2068 continue;
2069
2070 saved_gr_mask |= (1 << i);
2071 }
2072
2073 /* Turn the Entry_FR field into a bitmask too. */
2074 saved_fr_mask = 0;
2075 for (i = 12; i < u->Entry_FR + 12; i++)
2076 saved_fr_mask |= (1 << i);
2077
2078 /* Loop until we find everything of interest or hit a branch.
2079
2080 For unoptimized GCC code and for any HP CC code this will never ever
2081 examine any user instructions.
2082
2083 For optimized GCC code we're faced with problems. GCC will schedule
2084 its prologue and make prologue instructions available for delay slot
2085 filling. The end result is user code gets mixed in with the prologue
2086 and a prologue instruction may be in the delay slot of the first branch
2087 or call.
2088
2089 Some unexpected things are expected with debugging optimized code, so
2090 we allow this routine to walk past user instructions in optimized
2091 GCC code. */
2092 {
2093 int final_iteration = 0;
2094 CORE_ADDR pc;
2095 CORE_ADDR end_pc;
2096 int looking_for_sp = u->Save_SP;
2097 int looking_for_rp = u->Save_RP;
2098 int fp_loc = -1;
2099 end_pc = skip_prologue_using_sal (frame_func_unwind (next_frame));
2100 if (end_pc == 0)
2101 end_pc = frame_pc_unwind (next_frame);
2102 frame_size = 0;
2103 for (pc = frame_func_unwind (next_frame);
2104 ((saved_gr_mask || saved_fr_mask
2105 || looking_for_sp || looking_for_rp
2106 || frame_size < (u->Total_frame_size << 3))
2107 && pc <= end_pc);
2108 pc += 4)
2109 {
2110 int reg;
2111 char buf4[4];
2112 long status = target_read_memory (pc, buf4, sizeof buf4);
2113 long inst = extract_unsigned_integer (buf4, sizeof buf4);
2114
2115 /* Note the interesting effects of this instruction. */
2116 frame_size += prologue_inst_adjust_sp (inst);
2117
2118 /* There are limited ways to store the return pointer into the
2119 stack. */
2120 if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
2121 {
2122 looking_for_rp = 0;
2123 cache->saved_regs[RP_REGNUM].addr = -20;
2124 }
2125 else if (inst == 0x0fc212c1) /* std rp,-0x10(sr0,sp) */
2126 {
2127 looking_for_rp = 0;
2128 cache->saved_regs[RP_REGNUM].addr = -16;
2129 }
2130
2131 /* Check to see if we saved SP into the stack. This also
2132 happens to indicate the location of the saved frame
2133 pointer. */
2134 if ((inst & 0xffffc000) == 0x6fc10000 /* stw,ma r1,N(sr0,sp) */
2135 || (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
2136 {
2137 looking_for_sp = 0;
2138 cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
2139 }
2140
2141 /* Account for general and floating-point register saves. */
2142 reg = inst_saves_gr (inst);
2143 if (reg >= 3 && reg <= 18
2144 && (!u->Save_SP || reg != HPPA_FP_REGNUM))
2145 {
2146 saved_gr_mask &= ~(1 << reg);
2147 if ((inst >> 26) == 0x1b && extract_14 (inst) >= 0)
2148 /* stwm with a positive displacement is a _post_
2149 _modify_. */
2150 cache->saved_regs[reg].addr = 0;
2151 else if ((inst & 0xfc00000c) == 0x70000008)
2152 /* A std has explicit post_modify forms. */
2153 cache->saved_regs[reg].addr = 0;
2154 else
2155 {
2156 CORE_ADDR offset;
2157
2158 if ((inst >> 26) == 0x1c)
2159 offset = (inst & 0x1 ? -1 << 13 : 0) | (((inst >> 4) & 0x3ff) << 3);
2160 else if ((inst >> 26) == 0x03)
2161 offset = low_sign_extend (inst & 0x1f, 5);
2162 else
2163 offset = extract_14 (inst);
2164
2165 /* Handle code with and without frame pointers. */
2166 if (u->Save_SP)
2167 cache->saved_regs[reg].addr = offset;
2168 else
2169 cache->saved_regs[reg].addr = (u->Total_frame_size << 3) + offset;
2170 }
2171 }
2172
2173 /* GCC handles callee saved FP regs a little differently.
2174
2175 It emits an instruction to put the value of the start of
2176 the FP store area into %r1. It then uses fstds,ma with a
2177 basereg of %r1 for the stores.
2178
2179 HP CC emits them at the current stack pointer modifying the
2180 stack pointer as it stores each register. */
2181
2182 /* ldo X(%r3),%r1 or ldo X(%r30),%r1. */
2183 if ((inst & 0xffffc000) == 0x34610000
2184 || (inst & 0xffffc000) == 0x37c10000)
2185 fp_loc = extract_14 (inst);
2186
2187 reg = inst_saves_fr (inst);
2188 if (reg >= 12 && reg <= 21)
2189 {
2190 /* Note +4 braindamage below is necessary because the FP
2191 status registers are internally 8 registers rather than
2192 the expected 4 registers. */
2193 saved_fr_mask &= ~(1 << reg);
2194 if (fp_loc == -1)
2195 {
2196 /* 1st HP CC FP register store. After this
2197 instruction we've set enough state that the GCC and
2198 HPCC code are both handled in the same manner. */
2199 cache->saved_regs[reg + FP4_REGNUM + 4].addr = 0;
2200 fp_loc = 8;
2201 }
2202 else
2203 {
2204 cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
2205 fp_loc += 8;
2206 }
2207 }
2208
2209 /* Quit if we hit any kind of branch the previous iteration. */
2210 if (final_iteration)
2211 break;
2212 /* We want to look precisely one instruction beyond the branch
2213 if we have not found everything yet. */
2214 if (is_branch (inst))
2215 final_iteration = 1;
2216 }
2217 }
2218
2219 {
2220 /* The frame base always represents the value of %sp at entry to
2221 the current function (and is thus equivalent to the "saved"
2222 stack pointer. */
2223 CORE_ADDR this_sp = frame_unwind_register_unsigned (next_frame, HPPA_SP_REGNUM);
2224 /* FIXME: cagney/2004-02-22: This assumes that the frame has been
2225 created. If it hasn't everything will be out-of-wack. */
2226 if (u->Save_SP && trad_frame_addr_p (cache->saved_regs, HPPA_SP_REGNUM))
2227 /* Both we're expecting the SP to be saved and the SP has been
2228 saved. The entry SP value is saved at this frame's SP
2229 address. */
2230 cache->base = read_memory_integer (this_sp, TARGET_PTR_BIT / 8);
2231 else
2232 /* The prologue has been slowly allocating stack space. Adjust
2233 the SP back. */
2234 cache->base = this_sp - frame_size;
2235 trad_frame_set_value (cache->saved_regs, HPPA_SP_REGNUM, cache->base);
2236 }
2237
2238 /* The PC is found in the "return register", "Millicode" uses "r31"
2239 as the return register while normal code uses "rp". */
2240 if (u->Millicode)
2241 cache->saved_regs[PCOQ_HEAD_REGNUM] = cache->saved_regs[31];
2242 else
2243 cache->saved_regs[PCOQ_HEAD_REGNUM] = cache->saved_regs[RP_REGNUM];
2244
2245 {
2246 /* Convert all the offsets into addresses. */
2247 int reg;
2248 for (reg = 0; reg < NUM_REGS; reg++)
2249 {
2250 if (trad_frame_addr_p (cache->saved_regs, reg))
2251 cache->saved_regs[reg].addr += cache->base;
2252 }
2253 }
2254
2255 return (*this_cache);
2256 }
2257
2258 static void
2259 hppa_frame_this_id (struct frame_info *next_frame, void **this_cache,
2260 struct frame_id *this_id)
2261 {
2262 struct hppa_frame_cache *info = hppa_frame_cache (next_frame, this_cache);
2263 (*this_id) = frame_id_build (info->base, frame_func_unwind (next_frame));
2264 }
2265
2266 static void
2267 hppa_frame_prev_register (struct frame_info *next_frame,
2268 void **this_cache,
2269 int regnum, int *optimizedp,
2270 enum lval_type *lvalp, CORE_ADDR *addrp,
2271 int *realnump, void *valuep)
2272 {
2273 struct hppa_frame_cache *info = hppa_frame_cache (next_frame, this_cache);
2274 struct gdbarch *gdbarch = get_frame_arch (next_frame);
2275 if (regnum == PCOQ_TAIL_REGNUM)
2276 {
2277 /* The PCOQ TAIL, or NPC, needs to be computed from the unwound
2278 PC register. */
2279 *optimizedp = 0;
2280 *lvalp = not_lval;
2281 *addrp = 0;
2282 *realnump = 0;
2283 if (valuep)
2284 {
2285 int regsize = register_size (gdbarch, PCOQ_HEAD_REGNUM);
2286 CORE_ADDR pc;
2287 int optimized;
2288 enum lval_type lval;
2289 CORE_ADDR addr;
2290 int realnum;
2291 bfd_byte value[MAX_REGISTER_SIZE];
2292 trad_frame_prev_register (next_frame, info->saved_regs,
2293 PCOQ_HEAD_REGNUM, &optimized, &lval, &addr,
2294 &realnum, &value);
2295 pc = extract_unsigned_integer (&value, regsize);
2296 store_unsigned_integer (valuep, regsize, pc + 4);
2297 }
2298 }
2299 else
2300 {
2301 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
2302 optimizedp, lvalp, addrp, realnump, valuep);
2303 }
2304 }
2305
2306 static const struct frame_unwind hppa_frame_unwind =
2307 {
2308 NORMAL_FRAME,
2309 hppa_frame_this_id,
2310 hppa_frame_prev_register
2311 };
2312
2313 static const struct frame_unwind *
2314 hppa_frame_unwind_sniffer (struct frame_info *next_frame)
2315 {
2316 return &hppa_frame_unwind;
2317 }
2318
2319 static CORE_ADDR
2320 hppa_frame_base_address (struct frame_info *next_frame,
2321 void **this_cache)
2322 {
2323 struct hppa_frame_cache *info = hppa_frame_cache (next_frame,
2324 this_cache);
2325 return info->base;
2326 }
2327
2328 static const struct frame_base hppa_frame_base = {
2329 &hppa_frame_unwind,
2330 hppa_frame_base_address,
2331 hppa_frame_base_address,
2332 hppa_frame_base_address
2333 };
2334
2335 static const struct frame_base *
2336 hppa_frame_base_sniffer (struct frame_info *next_frame)
2337 {
2338 return &hppa_frame_base;
2339 }
2340
2341 static struct frame_id
2342 hppa_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
2343 {
2344 return frame_id_build (frame_unwind_register_unsigned (next_frame,
2345 HPPA_SP_REGNUM),
2346 frame_pc_unwind (next_frame));
2347 }
2348
2349 static CORE_ADDR
2350 hppa_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2351 {
2352 return frame_unwind_register_signed (next_frame, PCOQ_HEAD_REGNUM) & ~3;
2353 }
2354
2355 /* Instead of this nasty cast, add a method pvoid() that prints out a
2356 host VOID data type (remember %p isn't portable). */
2357
2358 static CORE_ADDR
2359 hppa_pointer_to_address_hack (void *ptr)
2360 {
2361 gdb_assert (sizeof (ptr) == TYPE_LENGTH (builtin_type_void_data_ptr));
2362 return POINTER_TO_ADDRESS (builtin_type_void_data_ptr, &ptr);
2363 }
2364
2365 static void
2366 unwind_command (char *exp, int from_tty)
2367 {
2368 CORE_ADDR address;
2369 struct unwind_table_entry *u;
2370
2371 /* If we have an expression, evaluate it and use it as the address. */
2372
2373 if (exp != 0 && *exp != 0)
2374 address = parse_and_eval_address (exp);
2375 else
2376 return;
2377
2378 u = find_unwind_entry (address);
2379
2380 if (!u)
2381 {
2382 printf_unfiltered ("Can't find unwind table entry for %s\n", exp);
2383 return;
2384 }
2385
2386 printf_unfiltered ("unwind_table_entry (0x%s):\n",
2387 paddr_nz (hppa_pointer_to_address_hack (u)));
2388
2389 printf_unfiltered ("\tregion_start = ");
2390 print_address (u->region_start, gdb_stdout);
2391
2392 printf_unfiltered ("\n\tregion_end = ");
2393 print_address (u->region_end, gdb_stdout);
2394
2395 #define pif(FLD) if (u->FLD) printf_unfiltered (" "#FLD);
2396
2397 printf_unfiltered ("\n\tflags =");
2398 pif (Cannot_unwind);
2399 pif (Millicode);
2400 pif (Millicode_save_sr0);
2401 pif (Entry_SR);
2402 pif (Args_stored);
2403 pif (Variable_Frame);
2404 pif (Separate_Package_Body);
2405 pif (Frame_Extension_Millicode);
2406 pif (Stack_Overflow_Check);
2407 pif (Two_Instruction_SP_Increment);
2408 pif (Ada_Region);
2409 pif (Save_SP);
2410 pif (Save_RP);
2411 pif (Save_MRP_in_frame);
2412 pif (extn_ptr_defined);
2413 pif (Cleanup_defined);
2414 pif (MPE_XL_interrupt_marker);
2415 pif (HP_UX_interrupt_marker);
2416 pif (Large_frame);
2417
2418 putchar_unfiltered ('\n');
2419
2420 #define pin(FLD) printf_unfiltered ("\t"#FLD" = 0x%x\n", u->FLD);
2421
2422 pin (Region_description);
2423 pin (Entry_FR);
2424 pin (Entry_GR);
2425 pin (Total_frame_size);
2426 }
2427
2428 void
2429 hppa_skip_permanent_breakpoint (void)
2430 {
2431 /* To step over a breakpoint instruction on the PA takes some
2432 fiddling with the instruction address queue.
2433
2434 When we stop at a breakpoint, the IA queue front (the instruction
2435 we're executing now) points at the breakpoint instruction, and
2436 the IA queue back (the next instruction to execute) points to
2437 whatever instruction we would execute after the breakpoint, if it
2438 were an ordinary instruction. This is the case even if the
2439 breakpoint is in the delay slot of a branch instruction.
2440
2441 Clearly, to step past the breakpoint, we need to set the queue
2442 front to the back. But what do we put in the back? What
2443 instruction comes after that one? Because of the branch delay
2444 slot, the next insn is always at the back + 4. */
2445 write_register (PCOQ_HEAD_REGNUM, read_register (PCOQ_TAIL_REGNUM));
2446 write_register (PCSQ_HEAD_REGNUM, read_register (PCSQ_TAIL_REGNUM));
2447
2448 write_register (PCOQ_TAIL_REGNUM, read_register (PCOQ_TAIL_REGNUM) + 4);
2449 /* We can leave the tail's space the same, since there's no jump. */
2450 }
2451
2452 int
2453 hppa_pc_requires_run_before_use (CORE_ADDR pc)
2454 {
2455 /* Sometimes we may pluck out a minimal symbol that has a negative address.
2456
2457 An example of this occurs when an a.out is linked against a foo.sl.
2458 The foo.sl defines a global bar(), and the a.out declares a signature
2459 for bar(). However, the a.out doesn't directly call bar(), but passes
2460 its address in another call.
2461
2462 If you have this scenario and attempt to "break bar" before running,
2463 gdb will find a minimal symbol for bar() in the a.out. But that
2464 symbol's address will be negative. What this appears to denote is
2465 an index backwards from the base of the procedure linkage table (PLT)
2466 into the data linkage table (DLT), the end of which is contiguous
2467 with the start of the PLT. This is clearly not a valid address for
2468 us to set a breakpoint on.
2469
2470 Note that one must be careful in how one checks for a negative address.
2471 0xc0000000 is a legitimate address of something in a shared text
2472 segment, for example. Since I don't know what the possible range
2473 is of these "really, truly negative" addresses that come from the
2474 minimal symbols, I'm resorting to the gross hack of checking the
2475 top byte of the address for all 1's. Sigh. */
2476
2477 return (!target_has_stack && (pc & 0xFF000000));
2478 }
2479
2480 int
2481 hppa_instruction_nullified (void)
2482 {
2483 /* brobecker 2002/11/07: Couldn't we use a ULONGEST here? It would
2484 avoid the type cast. I'm leaving it as is for now as I'm doing
2485 semi-mechanical multiarching-related changes. */
2486 const int ipsw = (int) read_register (IPSW_REGNUM);
2487 const int flags = (int) read_register (FLAGS_REGNUM);
2488
2489 return ((ipsw & 0x00200000) && !(flags & 0x2));
2490 }
2491
2492 /* Return the GDB type object for the "standard" data type of data
2493 in register N. */
2494
2495 static struct type *
2496 hppa32_register_type (struct gdbarch *gdbarch, int reg_nr)
2497 {
2498 if (reg_nr < FP4_REGNUM)
2499 return builtin_type_uint32;
2500 else
2501 return builtin_type_ieee_single_big;
2502 }
2503
2504 /* Return the GDB type object for the "standard" data type of data
2505 in register N. hppa64 version. */
2506
2507 static struct type *
2508 hppa64_register_type (struct gdbarch *gdbarch, int reg_nr)
2509 {
2510 if (reg_nr < FP4_REGNUM)
2511 return builtin_type_uint64;
2512 else
2513 return builtin_type_ieee_double_big;
2514 }
2515
2516 /* Return True if REGNUM is not a register available to the user
2517 through ptrace(). */
2518
2519 static int
2520 hppa_cannot_store_register (int regnum)
2521 {
2522 return (regnum == 0
2523 || regnum == PCSQ_HEAD_REGNUM
2524 || (regnum >= PCSQ_TAIL_REGNUM && regnum < IPSW_REGNUM)
2525 || (regnum > IPSW_REGNUM && regnum < FP4_REGNUM));
2526
2527 }
2528
2529 static CORE_ADDR
2530 hppa_smash_text_address (CORE_ADDR addr)
2531 {
2532 /* The low two bits of the PC on the PA contain the privilege level.
2533 Some genius implementing a (non-GCC) compiler apparently decided
2534 this means that "addresses" in a text section therefore include a
2535 privilege level, and thus symbol tables should contain these bits.
2536 This seems like a bonehead thing to do--anyway, it seems to work
2537 for our purposes to just ignore those bits. */
2538
2539 return (addr &= ~0x3);
2540 }
2541
2542 /* Get the ith function argument for the current function. */
2543 CORE_ADDR
2544 hppa_fetch_pointer_argument (struct frame_info *frame, int argi,
2545 struct type *type)
2546 {
2547 CORE_ADDR addr;
2548 get_frame_register (frame, R0_REGNUM + 26 - argi, &addr);
2549 return addr;
2550 }
2551
2552 /* Here is a table of C type sizes on hppa with various compiles
2553 and options. I measured this on PA 9000/800 with HP-UX 11.11
2554 and these compilers:
2555
2556 /usr/ccs/bin/cc HP92453-01 A.11.01.21
2557 /opt/ansic/bin/cc HP92453-01 B.11.11.28706.GP
2558 /opt/aCC/bin/aCC B3910B A.03.45
2559 gcc gcc 3.3.2 native hppa2.0w-hp-hpux11.11
2560
2561 cc : 1 2 4 4 8 : 4 8 -- : 4 4
2562 ansic +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2563 ansic +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2564 ansic +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2565 acc +DA1.1 : 1 2 4 4 8 : 4 8 16 : 4 4
2566 acc +DA2.0 : 1 2 4 4 8 : 4 8 16 : 4 4
2567 acc +DA2.0W : 1 2 4 8 8 : 4 8 16 : 8 8
2568 gcc : 1 2 4 4 8 : 4 8 16 : 4 4
2569
2570 Each line is:
2571
2572 compiler and options
2573 char, short, int, long, long long
2574 float, double, long double
2575 char *, void (*)()
2576
2577 So all these compilers use either ILP32 or LP64 model.
2578 TODO: gcc has more options so it needs more investigation.
2579
2580 For floating point types, see:
2581
2582 http://docs.hp.com/hpux/pdf/B3906-90006.pdf
2583 HP-UX floating-point guide, hpux 11.00
2584
2585 -- chastain 2003-12-18 */
2586
2587 static struct gdbarch *
2588 hppa_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2589 {
2590 struct gdbarch_tdep *tdep;
2591 struct gdbarch *gdbarch;
2592
2593 /* Try to determine the ABI of the object we are loading. */
2594 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
2595 {
2596 /* If it's a SOM file, assume it's HP/UX SOM. */
2597 if (bfd_get_flavour (info.abfd) == bfd_target_som_flavour)
2598 info.osabi = GDB_OSABI_HPUX_SOM;
2599 }
2600
2601 /* find a candidate among the list of pre-declared architectures. */
2602 arches = gdbarch_list_lookup_by_info (arches, &info);
2603 if (arches != NULL)
2604 return (arches->gdbarch);
2605
2606 /* If none found, then allocate and initialize one. */
2607 tdep = XMALLOC (struct gdbarch_tdep);
2608 gdbarch = gdbarch_alloc (&info, tdep);
2609
2610 /* Determine from the bfd_arch_info structure if we are dealing with
2611 a 32 or 64 bits architecture. If the bfd_arch_info is not available,
2612 then default to a 32bit machine. */
2613 if (info.bfd_arch_info != NULL)
2614 tdep->bytes_per_address =
2615 info.bfd_arch_info->bits_per_address / info.bfd_arch_info->bits_per_byte;
2616 else
2617 tdep->bytes_per_address = 4;
2618
2619 /* Some parts of the gdbarch vector depend on whether we are running
2620 on a 32 bits or 64 bits target. */
2621 switch (tdep->bytes_per_address)
2622 {
2623 case 4:
2624 set_gdbarch_num_regs (gdbarch, hppa32_num_regs);
2625 set_gdbarch_register_name (gdbarch, hppa32_register_name);
2626 set_gdbarch_register_type (gdbarch, hppa32_register_type);
2627 break;
2628 case 8:
2629 set_gdbarch_num_regs (gdbarch, hppa64_num_regs);
2630 set_gdbarch_register_name (gdbarch, hppa64_register_name);
2631 set_gdbarch_register_type (gdbarch, hppa64_register_type);
2632 break;
2633 default:
2634 internal_error (__FILE__, __LINE__, "Unsupported address size: %d",
2635 tdep->bytes_per_address);
2636 }
2637
2638 set_gdbarch_long_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
2639 set_gdbarch_ptr_bit (gdbarch, tdep->bytes_per_address * TARGET_CHAR_BIT);
2640
2641 /* The following gdbarch vector elements are the same in both ILP32
2642 and LP64, but might show differences some day. */
2643 set_gdbarch_long_long_bit (gdbarch, 64);
2644 set_gdbarch_long_double_bit (gdbarch, 128);
2645 set_gdbarch_long_double_format (gdbarch, &floatformat_ia64_quad_big);
2646
2647 /* The following gdbarch vector elements do not depend on the address
2648 size, or in any other gdbarch element previously set. */
2649 set_gdbarch_skip_prologue (gdbarch, hppa_skip_prologue);
2650 set_gdbarch_skip_trampoline_code (gdbarch, hppa_skip_trampoline_code);
2651 set_gdbarch_in_solib_call_trampoline (gdbarch, hppa_in_solib_call_trampoline);
2652 set_gdbarch_in_solib_return_trampoline (gdbarch,
2653 hppa_in_solib_return_trampoline);
2654 set_gdbarch_inner_than (gdbarch, core_addr_greaterthan);
2655 set_gdbarch_sp_regnum (gdbarch, HPPA_SP_REGNUM);
2656 set_gdbarch_fp0_regnum (gdbarch, HPPA_FP0_REGNUM);
2657 set_gdbarch_cannot_store_register (gdbarch, hppa_cannot_store_register);
2658 set_gdbarch_addr_bits_remove (gdbarch, hppa_smash_text_address);
2659 set_gdbarch_smash_text_address (gdbarch, hppa_smash_text_address);
2660 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2661 set_gdbarch_read_pc (gdbarch, hppa_target_read_pc);
2662 set_gdbarch_write_pc (gdbarch, hppa_target_write_pc);
2663
2664 /* Helper for function argument information. */
2665 set_gdbarch_fetch_pointer_argument (gdbarch, hppa_fetch_pointer_argument);
2666
2667 set_gdbarch_print_insn (gdbarch, print_insn_hppa);
2668
2669 /* When a hardware watchpoint triggers, we'll move the inferior past
2670 it by removing all eventpoints; stepping past the instruction
2671 that caused the trigger; reinserting eventpoints; and checking
2672 whether any watched location changed. */
2673 set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
2674
2675 /* Inferior function call methods. */
2676 switch (tdep->bytes_per_address)
2677 {
2678 case 4:
2679 set_gdbarch_push_dummy_call (gdbarch, hppa32_push_dummy_call);
2680 set_gdbarch_frame_align (gdbarch, hppa32_frame_align);
2681 break;
2682 case 8:
2683 set_gdbarch_push_dummy_call (gdbarch, hppa64_push_dummy_call);
2684 set_gdbarch_frame_align (gdbarch, hppa64_frame_align);
2685 break;
2686 default:
2687 internal_error (__FILE__, __LINE__, "bad switch");
2688 }
2689
2690 /* Struct return methods. */
2691 switch (tdep->bytes_per_address)
2692 {
2693 case 4:
2694 set_gdbarch_return_value (gdbarch, hppa32_return_value);
2695 break;
2696 case 8:
2697 set_gdbarch_return_value (gdbarch, hppa64_return_value);
2698 break;
2699 default:
2700 internal_error (__FILE__, __LINE__, "bad switch");
2701 }
2702
2703 set_gdbarch_breakpoint_from_pc (gdbarch, hppa_breakpoint_from_pc);
2704
2705 /* Frame unwind methods. */
2706 set_gdbarch_unwind_dummy_id (gdbarch, hppa_unwind_dummy_id);
2707 set_gdbarch_unwind_pc (gdbarch, hppa_unwind_pc);
2708 frame_unwind_append_sniffer (gdbarch, hppa_frame_unwind_sniffer);
2709 frame_base_append_sniffer (gdbarch, hppa_frame_base_sniffer);
2710
2711 /* Hook in ABI-specific overrides, if they have been registered. */
2712 gdbarch_init_osabi (info, gdbarch);
2713
2714 return gdbarch;
2715 }
2716
2717 static void
2718 hppa_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
2719 {
2720 /* Nothing to print for the moment. */
2721 }
2722
2723 void
2724 _initialize_hppa_tdep (void)
2725 {
2726 struct cmd_list_element *c;
2727 void break_at_finish_command (char *arg, int from_tty);
2728 void tbreak_at_finish_command (char *arg, int from_tty);
2729 void break_at_finish_at_depth_command (char *arg, int from_tty);
2730
2731 gdbarch_register (bfd_arch_hppa, hppa_gdbarch_init, hppa_dump_tdep);
2732
2733 add_cmd ("unwind", class_maintenance, unwind_command,
2734 "Print unwind table entry at given address.",
2735 &maintenanceprintlist);
2736
2737 deprecate_cmd (add_com ("xbreak", class_breakpoint,
2738 break_at_finish_command,
2739 concat ("Set breakpoint at procedure exit. \n\
2740 Argument may be function name, or \"*\" and an address.\n\
2741 If function is specified, break at end of code for that function.\n\
2742 If an address is specified, break at the end of the function that contains \n\
2743 that exact address.\n",
2744 "With no arg, uses current execution address of selected stack frame.\n\
2745 This is useful for breaking on return to a stack frame.\n\
2746 \n\
2747 Multiple breakpoints at one place are permitted, and useful if conditional.\n\
2748 \n\
2749 Do \"help breakpoints\" for info on other commands dealing with breakpoints.", NULL)), NULL);
2750 deprecate_cmd (add_com_alias ("xb", "xbreak", class_breakpoint, 1), NULL);
2751 deprecate_cmd (add_com_alias ("xbr", "xbreak", class_breakpoint, 1), NULL);
2752 deprecate_cmd (add_com_alias ("xbre", "xbreak", class_breakpoint, 1), NULL);
2753 deprecate_cmd (add_com_alias ("xbrea", "xbreak", class_breakpoint, 1), NULL);
2754
2755 deprecate_cmd (c = add_com ("txbreak", class_breakpoint,
2756 tbreak_at_finish_command,
2757 "Set temporary breakpoint at procedure exit. Either there should\n\
2758 be no argument or the argument must be a depth.\n"), NULL);
2759 set_cmd_completer (c, location_completer);
2760
2761 if (xdb_commands)
2762 deprecate_cmd (add_com ("bx", class_breakpoint,
2763 break_at_finish_at_depth_command,
2764 "Set breakpoint at procedure exit. Either there should\n\
2765 be no argument or the argument must be a depth.\n"), NULL);
2766 }
2767