* hppa-pinsn.c (print_insn): Improve handling of be and ble
[binutils-gdb.git] / gdb / hppah-tdep.c
1 /* Machine-dependent code which would otherwise be in inflow.c and core.c,
2 for GDB, the GNU debugger. This code is for the HP PA-RISC cpu.
3 Copyright 1986, 1987, 1989, 1990, 1991, 1992 Free Software Foundation, Inc.
4
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
23
24 #include "defs.h"
25 #include "frame.h"
26 #include "inferior.h"
27 #include "value.h"
28
29 /* For argument passing to the inferior */
30 #include "symtab.h"
31
32 #ifdef USG
33 #include <sys/types.h>
34 #endif
35
36 #include <sys/param.h>
37 #include <sys/dir.h>
38 #include <signal.h>
39 #include <sys/ioctl.h>
40
41 #ifdef COFF_ENCAPSULATE
42 #include "a.out.encap.h"
43 #else
44 #include <a.out.h>
45 #endif
46 #ifndef N_SET_MAGIC
47 #define N_SET_MAGIC(exec, val) ((exec).a_magic = (val))
48 #endif
49
50 /*#include <sys/user.h> After a.out.h */
51 #include <sys/file.h>
52 #include <sys/stat.h>
53 #include <machine/psl.h>
54 #include "wait.h"
55
56 #include "gdbcore.h"
57 #include "gdbcmd.h"
58 #include "target.h"
59
60 \f
61 /* Last modification time of executable file.
62 Also used in source.c to compare against mtime of a source file. */
63
64 extern int exec_mtime;
65
66 /* Virtual addresses of bounds of the two areas of memory in the core file. */
67
68 /* extern CORE_ADDR data_start; */
69 extern CORE_ADDR data_end;
70 extern CORE_ADDR stack_start;
71 extern CORE_ADDR stack_end;
72
73 /* Virtual addresses of bounds of two areas of memory in the exec file.
74 Note that the data area in the exec file is used only when there is no core file. */
75
76 extern CORE_ADDR text_start;
77 extern CORE_ADDR text_end;
78
79 extern CORE_ADDR exec_data_start;
80 extern CORE_ADDR exec_data_end;
81
82 /* Address in executable file of start of text area data. */
83
84 extern int text_offset;
85
86 /* Address in executable file of start of data area data. */
87
88 extern int exec_data_offset;
89
90 /* Address in core file of start of data area data. */
91
92 extern int data_offset;
93
94 /* Address in core file of start of stack area data. */
95
96 extern int stack_offset;
97
98 struct header file_hdr;
99 struct som_exec_auxhdr exec_hdr;
100 \f
101 /* Routines to extract various sized constants out of hppa
102 instructions. */
103
104 /* This assumes that no garbage lies outside of the lower bits of
105 value. */
106
107 int
108 sign_extend (val, bits)
109 unsigned val, bits;
110 {
111 return (int)(val >> bits - 1 ? (-1 << bits) | val : val);
112 }
113
114 /* For many immediate values the sign bit is the low bit! */
115
116 int
117 low_sign_extend (val, bits)
118 unsigned val, bits;
119 {
120 return (int)((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
121 }
122 /* extract the immediate field from a ld{bhw}s instruction */
123
124
125
126 unsigned
127 get_field (val, from, to)
128 unsigned val, from, to;
129 {
130 val = val >> 31 - to;
131 return val & ((1 << 32 - from) - 1);
132 }
133
134 unsigned
135 set_field (val, from, to, new_val)
136 unsigned *val, from, to;
137 {
138 unsigned mask = ~((1 << (to - from + 1)) << (31 - from));
139 return *val = *val & mask | (new_val << (31 - from));
140 }
141
142 /* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
143
144 extract_3 (word)
145 unsigned word;
146 {
147 return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
148 }
149
150 extract_5_load (word)
151 unsigned word;
152 {
153 return low_sign_extend (word >> 16 & MASK_5, 5);
154 }
155
156 /* extract the immediate field from a st{bhw}s instruction */
157
158 int
159 extract_5_store (word)
160 unsigned word;
161 {
162 return low_sign_extend (word & MASK_5, 5);
163 }
164
165 /* extract an 11 bit immediate field */
166
167 int
168 extract_11 (word)
169 unsigned word;
170 {
171 return low_sign_extend (word & MASK_11, 11);
172 }
173
174 /* extract a 14 bit immediate field */
175
176 int
177 extract_14 (word)
178 unsigned word;
179 {
180 return low_sign_extend (word & MASK_14, 14);
181 }
182
183 /* deposit a 14 bit constant in a word */
184
185 unsigned
186 deposit_14 (opnd, word)
187 int opnd;
188 unsigned word;
189 {
190 unsigned sign = (opnd < 0 ? 1 : 0);
191
192 return word | ((unsigned)opnd << 1 & MASK_14) | sign;
193 }
194
195 /* extract a 21 bit constant */
196
197 int
198 extract_21 (word)
199 unsigned word;
200 {
201 int val;
202
203 word &= MASK_21;
204 word <<= 11;
205 val = GET_FIELD (word, 20, 20);
206 val <<= 11;
207 val |= GET_FIELD (word, 9, 19);
208 val <<= 2;
209 val |= GET_FIELD (word, 5, 6);
210 val <<= 5;
211 val |= GET_FIELD (word, 0, 4);
212 val <<= 2;
213 val |= GET_FIELD (word, 7, 8);
214 return sign_extend (val, 21) << 11;
215 }
216
217 /* deposit a 21 bit constant in a word. Although 21 bit constants are
218 usually the top 21 bits of a 32 bit constant, we assume that only
219 the low 21 bits of opnd are relevant */
220
221 unsigned
222 deposit_21 (opnd, word)
223 unsigned opnd, word;
224 {
225 unsigned val = 0;
226
227 val |= GET_FIELD (opnd, 11 + 14, 11 + 18);
228 val <<= 2;
229 val |= GET_FIELD (opnd, 11 + 12, 11 + 13);
230 val <<= 2;
231 val |= GET_FIELD (opnd, 11 + 19, 11 + 20);
232 val <<= 11;
233 val |= GET_FIELD (opnd, 11 + 1, 11 + 11);
234 val <<= 1;
235 val |= GET_FIELD (opnd, 11 + 0, 11 + 0);
236 return word | val;
237 }
238
239 /* extract a 12 bit constant from branch instructions */
240
241 int
242 extract_12 (word)
243 unsigned word;
244 {
245 return sign_extend (GET_FIELD (word, 19, 28) |
246 GET_FIELD (word, 29, 29) << 10 |
247 (word & 0x1) << 11, 12) << 2;
248 }
249
250 /* extract a 17 bit constant from branch instructions, returning the
251 19 bit signed value. */
252
253 int
254 extract_17 (word)
255 unsigned word;
256 {
257 return sign_extend (GET_FIELD (word, 19, 28) |
258 GET_FIELD (word, 29, 29) << 10 |
259 GET_FIELD (word, 11, 15) << 11 |
260 (word & 0x1) << 16, 17) << 2;
261 }
262 \f
263 CORE_ADDR
264 frame_saved_pc (frame)
265 FRAME frame;
266 {
267 if (get_current_frame () == frame)
268 {
269 struct frame_saved_regs saved_regs;
270 CORE_ADDR pc = get_frame_pc (frame);
271 int flags;
272
273 flags = read_register (FLAGS_REGNUM);
274 get_frame_saved_regs (frame, &saved_regs);
275 if (pc >= millicode_start && pc < millicode_end
276 || (flags & 2)) /* In system call? */
277 return read_register (31) & ~3;
278 else if (saved_regs.regs[RP_REGNUM])
279 return read_memory_integer (saved_regs.regs[RP_REGNUM], 4) & ~3;
280 else
281 return read_register (RP_REGNUM) & ~3;
282 }
283 return read_memory_integer (frame->frame - 20, 4) & ~0x3;
284 }
285
286 /* To see if a frame chain is valid, see if the caller looks like it
287 was compiled with gcc. */
288
289 int frame_chain_valid (chain, thisframe)
290 FRAME_ADDR chain;
291 FRAME thisframe;
292 {
293 if (chain && (chain > 0x60000000))
294 {
295 CORE_ADDR pc = get_pc_function_start (FRAME_SAVED_PC (thisframe));
296
297 if (inside_entry_file (pc))
298 return 0;
299 /* look for stw rp, -20(0,sp); copy 4,1; copy sp, 4 */
300 if (read_memory_integer (pc, 4) == 0x6BC23FD9)
301 pc = pc + 4;
302
303 if (read_memory_integer (pc, 4) == 0x8040241 &&
304 read_memory_integer (pc + 4, 4) == 0x81E0244)
305 return 1;
306 else
307 return 0;
308 }
309 else
310 return 0;
311 }
312
313 /* Some helper functions. gcc_p returns 1 if the function beginning at
314 pc appears to have been compiled with gcc. hpux_cc_p returns 1 if
315 fn was compiled with hpux cc. gcc functions look like :
316
317 stw rp,-0x14(sp) ; optional
318 or r4,r0,r1
319 or sp,r0,r4
320 stwm r1,framesize(sp)
321
322 hpux cc functions look like:
323
324 stw rp,-0x14(sp) ; optional.
325 stwm r3,framesiz(sp)
326 */
327
328 gcc_p (pc)
329 CORE_ADDR pc;
330 {
331 if (read_memory_integer (pc, 4) == 0x6BC23FD9)
332 pc = pc + 4;
333
334 if (read_memory_integer (pc, 4) == 0x8040241 &&
335 read_memory_integer (pc + 4, 4) == 0x81E0244)
336 return 1;
337 return 0;
338 }
339
340 /*
341 * These functions deal with saving and restoring register state
342 * around a function call in the inferior. They keep the stack
343 * double-word aligned; eventually, on an hp700, the stack will have
344 * to be aligned to a 64-byte boundary.
345 */
346
347 int
348 push_dummy_frame ()
349 {
350 register CORE_ADDR sp = read_register (SP_REGNUM);
351 register int regnum;
352 int int_buffer;
353 double freg_buffer;
354 /* Space for "arguments"; the RP goes in here. */
355 sp += 48;
356 int_buffer = read_register (RP_REGNUM) | 0x3;
357 write_memory (sp - 20, (char *)&int_buffer, 4);
358 int_buffer = read_register (FP_REGNUM);
359 write_memory (sp, (char *)&int_buffer, 4);
360 write_register (FP_REGNUM, sp);
361 sp += 8;
362 for (regnum = 1; regnum < 32; regnum++)
363 if (regnum != RP_REGNUM && regnum != FP_REGNUM)
364 sp = push_word (sp, read_register (regnum));
365 sp += 4;
366 for (regnum = FP0_REGNUM; regnum < NUM_REGS; regnum++)
367 { read_register_bytes (REGISTER_BYTE (regnum), (char *)&freg_buffer, 8);
368 sp = push_bytes (sp, (char *)&freg_buffer, 8);}
369 sp = push_word (sp, read_register (IPSW_REGNUM));
370 sp = push_word (sp, read_register (SAR_REGNUM));
371 sp = push_word (sp, read_register (PCOQ_HEAD_REGNUM));
372 sp = push_word (sp, read_register (PCSQ_HEAD_REGNUM));
373 sp = push_word (sp, read_register (PCOQ_TAIL_REGNUM));
374 sp = push_word (sp, read_register (PCSQ_TAIL_REGNUM));
375 write_register (SP_REGNUM, sp);
376 }
377
378 find_dummy_frame_regs (frame, frame_saved_regs)
379 struct frame_info *frame;
380 struct frame_saved_regs *frame_saved_regs;
381 {
382 CORE_ADDR fp = frame->frame;
383 int i;
384
385 frame_saved_regs->regs[RP_REGNUM] = fp - 20 & ~0x3;
386 frame_saved_regs->regs[FP_REGNUM] = fp;
387 frame_saved_regs->regs[1] = fp + 8;
388 frame_saved_regs->regs[3] = fp + 12;
389 for (fp += 16, i = 5; i < 32; fp += 4, i++)
390 frame_saved_regs->regs[i] = fp;
391 fp += 4;
392 for (i = FP0_REGNUM; i < NUM_REGS; i++, fp += 8)
393 frame_saved_regs->regs[i] = fp;
394 frame_saved_regs->regs[IPSW_REGNUM] = fp; fp += 4;
395 frame_saved_regs->regs[SAR_REGNUM] = fp; fp += 4;
396 frame_saved_regs->regs[PCOQ_HEAD_REGNUM] = fp; fp +=4;
397 frame_saved_regs->regs[PCSQ_HEAD_REGNUM] = fp; fp +=4;
398 frame_saved_regs->regs[PCOQ_TAIL_REGNUM] = fp; fp +=4;
399 frame_saved_regs->regs[PCSQ_TAIL_REGNUM] = fp;
400 }
401
402 int
403 hp_pop_frame ()
404 {
405 register FRAME frame = get_current_frame ();
406 register CORE_ADDR fp;
407 register int regnum;
408 struct frame_saved_regs fsr;
409 struct frame_info *fi;
410 double freg_buffer;
411 fi = get_frame_info (frame);
412 fp = fi->frame;
413 get_frame_saved_regs (fi, &fsr);
414 if (fsr.regs[IPSW_REGNUM]) /* Restoring a call dummy frame */
415 hp_restore_pc_queue (&fsr);
416 for (regnum = 31; regnum > 0; regnum--)
417 if (fsr.regs[regnum])
418 write_register (regnum, read_memory_integer (fsr.regs[regnum], 4));
419 for (regnum = NUM_REGS - 1; regnum >= FP0_REGNUM ; regnum--)
420 if (fsr.regs[regnum])
421 { read_memory (fsr.regs[regnum], (char *)&freg_buffer, 8);
422 write_register_bytes (REGISTER_BYTE (regnum), (char *)&freg_buffer, 8);
423 }
424 if (fsr.regs[IPSW_REGNUM])
425 write_register (IPSW_REGNUM,
426 read_memory_integer (fsr.regs[IPSW_REGNUM], 4));
427 if (fsr.regs[SAR_REGNUM])
428 write_register (SAR_REGNUM,
429 read_memory_integer (fsr.regs[SAR_REGNUM], 4));
430 if (fsr.regs[PCOQ_TAIL_REGNUM])
431 write_register (PCOQ_TAIL_REGNUM,
432 read_memory_integer (fsr.regs[PCOQ_TAIL_REGNUM], 4));
433 write_register (FP_REGNUM, read_memory_integer (fp, 4));
434 if (fsr.regs[IPSW_REGNUM]) /* call dummy */
435 write_register (SP_REGNUM, fp - 48);
436 else
437 write_register (SP_REGNUM, fp);
438 flush_cached_frames ();
439 set_current_frame (create_new_frame (read_register (FP_REGNUM),
440 read_pc ()));
441 }
442
443 /*
444 * After returning to a dummy on the stack, restore the instruction
445 * queue space registers. */
446
447 int
448 hp_restore_pc_queue (fsr)
449 struct frame_saved_regs *fsr;
450 {
451 CORE_ADDR pc = read_pc ();
452 CORE_ADDR new_pc = read_memory_integer (fsr->regs[PCOQ_HEAD_REGNUM], 4);
453 int pid;
454 WAITTYPE w;
455 int insn_count;
456
457 /* Advance past break instruction in the call dummy. */
458 pc += 4; write_register (PCOQ_HEAD_REGNUM, pc);
459 pc += 4; write_register (PCOQ_TAIL_REGNUM, pc);
460
461 /*
462 * HPUX doesn't let us set the space registers or the space
463 * registers of the PC queue through ptrace. Boo, hiss.
464 * Conveniently, the call dummy has this sequence of instructions
465 * after the break:
466 * mtsp r21, sr0
467 * ble,n 0(sr0, r22)
468 *
469 * So, load up the registers and single step until we are in the
470 * right place.
471 */
472
473 write_register (21, read_memory_integer (fsr->regs[PCSQ_HEAD_REGNUM], 4));
474 write_register (22, new_pc);
475
476 for (insn_count = 0; insn_count < 3; insn_count++)
477 {
478 resume (1, 0);
479 target_wait(&w);
480
481 if (!WIFSTOPPED (w))
482 {
483 stop_signal = WTERMSIG (w);
484 terminal_ours_for_output ();
485 printf ("\nProgram terminated with signal %d, %s\n",
486 stop_signal, safe_strsignal (stop_signal));
487 fflush (stdout);
488 return 0;
489 }
490 }
491 fetch_inferior_registers (-1);
492 return 1;
493 }
494
495 CORE_ADDR
496 hp_push_arguments (nargs, args, sp, struct_return, struct_addr)
497 int nargs;
498 value *args;
499 CORE_ADDR sp;
500 int struct_return;
501 CORE_ADDR struct_addr;
502 {
503 /* array of arguments' offsets */
504 int *offset = (int *)alloca(nargs);
505 int cum = 0;
506 int i, alignment;
507
508 for (i = 0; i < nargs; i++)
509 {
510 cum += TYPE_LENGTH (VALUE_TYPE (args[i]));
511 /* value must go at proper alignment. Assume alignment is a
512 power of two.*/
513 alignment = hp_alignof (VALUE_TYPE (args[i]));
514 if (cum % alignment)
515 cum = (cum + alignment) & -alignment;
516 offset[i] = -cum;
517 }
518 sp += min ((cum + 7) & -8, 16);
519 for (i = 0; i < nargs; i++)
520 {
521 write_memory (sp + offset[i], VALUE_CONTENTS (args[i]),
522 TYPE_LENGTH (VALUE_TYPE (args[i])));
523 }
524 if (struct_return)
525 write_register (28, struct_addr);
526 return sp + 32;
527 }
528
529 /* return the alignment of a type in bytes. Structures have the maximum
530 alignment required by their fields. */
531
532 int
533 hp_alignof (arg)
534 struct type *arg;
535 {
536 int max_align, align, i;
537 switch (TYPE_CODE (arg))
538 {
539 case TYPE_CODE_PTR:
540 case TYPE_CODE_INT:
541 case TYPE_CODE_FLT:
542 return TYPE_LENGTH (arg);
543 case TYPE_CODE_ARRAY:
544 return hp_alignof (TYPE_FIELD_TYPE (arg, 0));
545 case TYPE_CODE_STRUCT:
546 case TYPE_CODE_UNION:
547 max_align = 2;
548 for (i = 0; i < TYPE_NFIELDS (arg); i++)
549 {
550 /* Bit fields have no real alignment. */
551 if (!TYPE_FIELD_BITPOS (arg, i))
552 {
553 align = hp_alignof (TYPE_FIELD_TYPE (arg, i));
554 max_align = max (max_align, align);
555 }
556 }
557 return max_align;
558 default:
559 return 4;
560 }
561 }
562
563 /* Print the register regnum, or all registers if regnum is -1 */
564
565 pa_do_registers_info (regnum, fpregs)
566 int regnum;
567 int fpregs;
568 {
569 char raw_regs [REGISTER_BYTES];
570 int i;
571
572 for (i = 0; i < NUM_REGS; i++)
573 read_relative_register_raw_bytes (i, raw_regs + REGISTER_BYTE (i));
574 if (regnum == -1)
575 pa_print_registers (raw_regs, regnum, fpregs);
576 else if (regnum < FP0_REGNUM)
577 {
578 printf ("%s %x\n", reg_names[regnum], *(long *)(raw_regs +
579 REGISTER_BYTE (regnum)));
580 }
581 else
582 pa_print_fp_reg (regnum);
583 }
584
585 pa_print_registers (raw_regs, regnum, fpregs)
586 char *raw_regs;
587 int regnum;
588 int fpregs;
589 {
590 int i;
591
592 for (i = 0; i < 18; i++)
593 printf ("%8.8s: %8x %8.8s: %8x %8.8s: %8x %8.8s: %8x\n",
594 reg_names[i],
595 *(int *)(raw_regs + REGISTER_BYTE (i)),
596 reg_names[i + 18],
597 *(int *)(raw_regs + REGISTER_BYTE (i + 18)),
598 reg_names[i + 36],
599 *(int *)(raw_regs + REGISTER_BYTE (i + 36)),
600 reg_names[i + 54],
601 *(int *)(raw_regs + REGISTER_BYTE (i + 54)));
602
603 if (fpregs)
604 for (i = 72; i < NUM_REGS; i++)
605 pa_print_fp_reg (i);
606 }
607
608 pa_print_fp_reg (i)
609 int i;
610 {
611 unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE];
612 unsigned char virtual_buffer[MAX_REGISTER_VIRTUAL_SIZE];
613 REGISTER_TYPE val;
614
615 /* Get the data in raw format, then convert also to virtual format. */
616 read_relative_register_raw_bytes (i, raw_buffer);
617 REGISTER_CONVERT_TO_VIRTUAL (i, raw_buffer, virtual_buffer);
618
619 fputs_filtered (reg_names[i], stdout);
620 print_spaces_filtered (15 - strlen (reg_names[i]), stdout);
621
622 val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, stdout, 0,
623 1, 0, Val_pretty_default);
624 printf_filtered ("\n");
625
626 }
627
628 /* Function calls that pass into a new compilation unit must pass through a
629 small piece of code that does long format (`external' in HPPA parlance)
630 jumps. We figure out where the trampoline is going to end up, and return
631 the PC of the final destination. If we aren't in a trampoline, we just
632 return NULL. */
633
634 CORE_ADDR
635 skip_trampoline_code (pc)
636 CORE_ADDR pc;
637 {
638 long inst0, inst1;
639
640 inst0 = read_memory_integer (pc, 4);
641 inst1 = read_memory_integer (pc+4, 4);
642
643 if ( (inst0 & 0xffe00000) == 0x20200000 /* ldil xxx, r1 */
644 && (inst1 & 0xffe0e002) == 0xe0202002) /* be,n yyy(sr4, r1) */
645 pc = extract_21 (inst0) + extract_17 (inst1);
646 else
647 pc = NULL;
648
649 return pc;
650 }