1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988-2022 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "opcode/i386.h"
22 #include "arch-utils.h"
24 #include "dummy-frame.h"
25 #include "dwarf2/frame.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
37 #include "reggroups.h"
42 #include "target-float.h"
47 #include "i386-tdep.h"
48 #include "i387-tdep.h"
49 #include "gdbsupport/x86-xstate.h"
54 #include "record-full.h"
55 #include "target-descriptions.h"
56 #include "arch/i386.h"
61 #include "stap-probe.h"
62 #include "user-regs.h"
63 #include "cli/cli-utils.h"
64 #include "expression.h"
65 #include "parser-defs.h"
68 #include <unordered_set>
75 static const char * const i386_register_names
[] =
77 "eax", "ecx", "edx", "ebx",
78 "esp", "ebp", "esi", "edi",
79 "eip", "eflags", "cs", "ss",
80 "ds", "es", "fs", "gs",
81 "st0", "st1", "st2", "st3",
82 "st4", "st5", "st6", "st7",
83 "fctrl", "fstat", "ftag", "fiseg",
84 "fioff", "foseg", "fooff", "fop",
85 "xmm0", "xmm1", "xmm2", "xmm3",
86 "xmm4", "xmm5", "xmm6", "xmm7",
90 static const char * const i386_zmm_names
[] =
92 "zmm0", "zmm1", "zmm2", "zmm3",
93 "zmm4", "zmm5", "zmm6", "zmm7"
96 static const char * const i386_zmmh_names
[] =
98 "zmm0h", "zmm1h", "zmm2h", "zmm3h",
99 "zmm4h", "zmm5h", "zmm6h", "zmm7h"
102 static const char * const i386_k_names
[] =
104 "k0", "k1", "k2", "k3",
105 "k4", "k5", "k6", "k7"
108 static const char * const i386_ymm_names
[] =
110 "ymm0", "ymm1", "ymm2", "ymm3",
111 "ymm4", "ymm5", "ymm6", "ymm7",
114 static const char * const i386_ymmh_names
[] =
116 "ymm0h", "ymm1h", "ymm2h", "ymm3h",
117 "ymm4h", "ymm5h", "ymm6h", "ymm7h",
120 static const char * const i386_mpx_names
[] =
122 "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
125 static const char * const i386_pkeys_names
[] =
130 /* Register names for MPX pseudo-registers. */
132 static const char * const i386_bnd_names
[] =
134 "bnd0", "bnd1", "bnd2", "bnd3"
137 /* Register names for MMX pseudo-registers. */
139 static const char * const i386_mmx_names
[] =
141 "mm0", "mm1", "mm2", "mm3",
142 "mm4", "mm5", "mm6", "mm7"
145 /* Register names for byte pseudo-registers. */
147 static const char * const i386_byte_names
[] =
149 "al", "cl", "dl", "bl",
150 "ah", "ch", "dh", "bh"
153 /* Register names for word pseudo-registers. */
155 static const char * const i386_word_names
[] =
157 "ax", "cx", "dx", "bx",
161 /* Constant used for reading/writing pseudo registers. In 64-bit mode, we have
162 16 lower ZMM regs that extend corresponding xmm/ymm registers. In addition,
163 we have 16 upper ZMM regs that have to be handled differently. */
165 const int num_lower_zmm_regs
= 16;
170 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
172 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
173 int mm0_regnum
= tdep
->mm0_regnum
;
178 regnum
-= mm0_regnum
;
179 return regnum
>= 0 && regnum
< tdep
->num_mmx_regs
;
185 i386_byte_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
187 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
189 regnum
-= tdep
->al_regnum
;
190 return regnum
>= 0 && regnum
< tdep
->num_byte_regs
;
196 i386_word_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
198 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
200 regnum
-= tdep
->ax_regnum
;
201 return regnum
>= 0 && regnum
< tdep
->num_word_regs
;
204 /* Dword register? */
207 i386_dword_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
209 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
210 int eax_regnum
= tdep
->eax_regnum
;
215 regnum
-= eax_regnum
;
216 return regnum
>= 0 && regnum
< tdep
->num_dword_regs
;
219 /* AVX512 register? */
222 i386_zmmh_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
224 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
225 int zmm0h_regnum
= tdep
->zmm0h_regnum
;
227 if (zmm0h_regnum
< 0)
230 regnum
-= zmm0h_regnum
;
231 return regnum
>= 0 && regnum
< tdep
->num_zmm_regs
;
235 i386_zmm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
237 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
238 int zmm0_regnum
= tdep
->zmm0_regnum
;
243 regnum
-= zmm0_regnum
;
244 return regnum
>= 0 && regnum
< tdep
->num_zmm_regs
;
248 i386_k_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
250 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
251 int k0_regnum
= tdep
->k0_regnum
;
257 return regnum
>= 0 && regnum
< I387_NUM_K_REGS
;
261 i386_ymmh_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
263 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
264 int ymm0h_regnum
= tdep
->ymm0h_regnum
;
266 if (ymm0h_regnum
< 0)
269 regnum
-= ymm0h_regnum
;
270 return regnum
>= 0 && regnum
< tdep
->num_ymm_regs
;
276 i386_ymm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
278 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
279 int ymm0_regnum
= tdep
->ymm0_regnum
;
284 regnum
-= ymm0_regnum
;
285 return regnum
>= 0 && regnum
< tdep
->num_ymm_regs
;
289 i386_ymmh_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
291 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
292 int ymm16h_regnum
= tdep
->ymm16h_regnum
;
294 if (ymm16h_regnum
< 0)
297 regnum
-= ymm16h_regnum
;
298 return regnum
>= 0 && regnum
< tdep
->num_ymm_avx512_regs
;
302 i386_ymm_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
304 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
305 int ymm16_regnum
= tdep
->ymm16_regnum
;
307 if (ymm16_regnum
< 0)
310 regnum
-= ymm16_regnum
;
311 return regnum
>= 0 && regnum
< tdep
->num_ymm_avx512_regs
;
317 i386_bnd_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
319 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
320 int bnd0_regnum
= tdep
->bnd0_regnum
;
325 regnum
-= bnd0_regnum
;
326 return regnum
>= 0 && regnum
< I387_NUM_BND_REGS
;
332 i386_xmm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
334 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
335 int num_xmm_regs
= I387_NUM_XMM_REGS (tdep
);
337 if (num_xmm_regs
== 0)
340 regnum
-= I387_XMM0_REGNUM (tdep
);
341 return regnum
>= 0 && regnum
< num_xmm_regs
;
344 /* XMM_512 register? */
347 i386_xmm_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
349 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
350 int num_xmm_avx512_regs
= I387_NUM_XMM_AVX512_REGS (tdep
);
352 if (num_xmm_avx512_regs
== 0)
355 regnum
-= I387_XMM16_REGNUM (tdep
);
356 return regnum
>= 0 && regnum
< num_xmm_avx512_regs
;
360 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
362 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
364 if (I387_NUM_XMM_REGS (tdep
) == 0)
367 return (regnum
== I387_MXCSR_REGNUM (tdep
));
373 i386_fp_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
375 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
377 if (I387_ST0_REGNUM (tdep
) < 0)
380 return (I387_ST0_REGNUM (tdep
) <= regnum
381 && regnum
< I387_FCTRL_REGNUM (tdep
));
385 i386_fpc_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
387 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
389 if (I387_ST0_REGNUM (tdep
) < 0)
392 return (I387_FCTRL_REGNUM (tdep
) <= regnum
393 && regnum
< I387_XMM0_REGNUM (tdep
));
396 /* BNDr (raw) register? */
399 i386_bndr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
401 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
403 if (I387_BND0R_REGNUM (tdep
) < 0)
406 regnum
-= tdep
->bnd0r_regnum
;
407 return regnum
>= 0 && regnum
< I387_NUM_BND_REGS
;
410 /* BND control register? */
413 i386_mpx_ctrl_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
415 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
417 if (I387_BNDCFGU_REGNUM (tdep
) < 0)
420 regnum
-= I387_BNDCFGU_REGNUM (tdep
);
421 return regnum
>= 0 && regnum
< I387_NUM_MPX_CTRL_REGS
;
427 i386_pkru_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
429 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
430 int pkru_regnum
= tdep
->pkru_regnum
;
435 regnum
-= pkru_regnum
;
436 return regnum
>= 0 && regnum
< I387_NUM_PKEYS_REGS
;
439 /* Return the name of register REGNUM, or the empty string if it is
440 an anonymous register. */
443 i386_register_name (struct gdbarch
*gdbarch
, int regnum
)
445 /* Hide the upper YMM registers. */
446 if (i386_ymmh_regnum_p (gdbarch
, regnum
))
449 /* Hide the upper YMM16-31 registers. */
450 if (i386_ymmh_avx512_regnum_p (gdbarch
, regnum
))
453 /* Hide the upper ZMM registers. */
454 if (i386_zmmh_regnum_p (gdbarch
, regnum
))
457 return tdesc_register_name (gdbarch
, regnum
);
460 /* Return the name of register REGNUM. */
463 i386_pseudo_register_name (struct gdbarch
*gdbarch
, int regnum
)
465 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
466 if (i386_bnd_regnum_p (gdbarch
, regnum
))
467 return i386_bnd_names
[regnum
- tdep
->bnd0_regnum
];
468 if (i386_mmx_regnum_p (gdbarch
, regnum
))
469 return i386_mmx_names
[regnum
- I387_MM0_REGNUM (tdep
)];
470 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
471 return i386_ymm_names
[regnum
- tdep
->ymm0_regnum
];
472 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
473 return i386_zmm_names
[regnum
- tdep
->zmm0_regnum
];
474 else if (i386_byte_regnum_p (gdbarch
, regnum
))
475 return i386_byte_names
[regnum
- tdep
->al_regnum
];
476 else if (i386_word_regnum_p (gdbarch
, regnum
))
477 return i386_word_names
[regnum
- tdep
->ax_regnum
];
479 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
482 /* Convert a dbx register number REG to the appropriate register
483 number used by GDB. */
486 i386_dbx_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
488 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
490 /* This implements what GCC calls the "default" register map
491 (dbx_register_map[]). */
493 if (reg
>= 0 && reg
<= 7)
495 /* General-purpose registers. The debug info calls %ebp
496 register 4, and %esp register 5. */
503 else if (reg
>= 12 && reg
<= 19)
505 /* Floating-point registers. */
506 return reg
- 12 + I387_ST0_REGNUM (tdep
);
508 else if (reg
>= 21 && reg
<= 28)
511 int ymm0_regnum
= tdep
->ymm0_regnum
;
514 && i386_xmm_regnum_p (gdbarch
, reg
))
515 return reg
- 21 + ymm0_regnum
;
517 return reg
- 21 + I387_XMM0_REGNUM (tdep
);
519 else if (reg
>= 29 && reg
<= 36)
522 return reg
- 29 + I387_MM0_REGNUM (tdep
);
525 /* This will hopefully provoke a warning. */
526 return gdbarch_num_cooked_regs (gdbarch
);
529 /* Convert SVR4 DWARF register number REG to the appropriate register number
533 i386_svr4_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
535 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
537 /* This implements the GCC register map that tries to be compatible
538 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
540 /* The SVR4 register numbering includes %eip and %eflags, and
541 numbers the floating point registers differently. */
542 if (reg
>= 0 && reg
<= 9)
544 /* General-purpose registers. */
547 else if (reg
>= 11 && reg
<= 18)
549 /* Floating-point registers. */
550 return reg
- 11 + I387_ST0_REGNUM (tdep
);
552 else if (reg
>= 21 && reg
<= 36)
554 /* The SSE and MMX registers have the same numbers as with dbx. */
555 return i386_dbx_reg_to_regnum (gdbarch
, reg
);
560 case 37: return I387_FCTRL_REGNUM (tdep
);
561 case 38: return I387_FSTAT_REGNUM (tdep
);
562 case 39: return I387_MXCSR_REGNUM (tdep
);
563 case 40: return I386_ES_REGNUM
;
564 case 41: return I386_CS_REGNUM
;
565 case 42: return I386_SS_REGNUM
;
566 case 43: return I386_DS_REGNUM
;
567 case 44: return I386_FS_REGNUM
;
568 case 45: return I386_GS_REGNUM
;
574 /* Wrapper on i386_svr4_dwarf_reg_to_regnum to return
575 num_regs + num_pseudo_regs for other debug formats. */
578 i386_svr4_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
580 int regnum
= i386_svr4_dwarf_reg_to_regnum (gdbarch
, reg
);
583 return gdbarch_num_cooked_regs (gdbarch
);
589 /* This is the variable that is set with "set disassembly-flavor", and
590 its legitimate values. */
591 static const char att_flavor
[] = "att";
592 static const char intel_flavor
[] = "intel";
593 static const char *const valid_flavors
[] =
599 static const char *disassembly_flavor
= att_flavor
;
602 /* Use the program counter to determine the contents and size of a
603 breakpoint instruction. Return a pointer to a string of bytes that
604 encode a breakpoint instruction, store the length of the string in
605 *LEN and optionally adjust *PC to point to the correct memory
606 location for inserting the breakpoint.
608 On the i386 we have a single breakpoint that fits in a single byte
609 and can be inserted anywhere.
611 This function is 64-bit safe. */
613 constexpr gdb_byte i386_break_insn
[] = { 0xcc }; /* int 3 */
615 typedef BP_MANIPULATION (i386_break_insn
) i386_breakpoint
;
618 /* Displaced instruction handling. */
620 /* Skip the legacy instruction prefixes in INSN.
621 Not all prefixes are valid for any particular insn
622 but we needn't care, the insn will fault if it's invalid.
623 The result is a pointer to the first opcode byte,
624 or NULL if we run off the end of the buffer. */
627 i386_skip_prefixes (gdb_byte
*insn
, size_t max_len
)
629 gdb_byte
*end
= insn
+ max_len
;
635 case DATA_PREFIX_OPCODE
:
636 case ADDR_PREFIX_OPCODE
:
637 case CS_PREFIX_OPCODE
:
638 case DS_PREFIX_OPCODE
:
639 case ES_PREFIX_OPCODE
:
640 case FS_PREFIX_OPCODE
:
641 case GS_PREFIX_OPCODE
:
642 case SS_PREFIX_OPCODE
:
643 case LOCK_PREFIX_OPCODE
:
644 case REPE_PREFIX_OPCODE
:
645 case REPNE_PREFIX_OPCODE
:
657 i386_absolute_jmp_p (const gdb_byte
*insn
)
659 /* jmp far (absolute address in operand). */
665 /* jump near, absolute indirect (/4). */
666 if ((insn
[1] & 0x38) == 0x20)
669 /* jump far, absolute indirect (/5). */
670 if ((insn
[1] & 0x38) == 0x28)
677 /* Return non-zero if INSN is a jump, zero otherwise. */
680 i386_jmp_p (const gdb_byte
*insn
)
682 /* jump short, relative. */
686 /* jump near, relative. */
690 return i386_absolute_jmp_p (insn
);
694 i386_absolute_call_p (const gdb_byte
*insn
)
696 /* call far, absolute. */
702 /* Call near, absolute indirect (/2). */
703 if ((insn
[1] & 0x38) == 0x10)
706 /* Call far, absolute indirect (/3). */
707 if ((insn
[1] & 0x38) == 0x18)
715 i386_ret_p (const gdb_byte
*insn
)
719 case 0xc2: /* ret near, pop N bytes. */
720 case 0xc3: /* ret near */
721 case 0xca: /* ret far, pop N bytes. */
722 case 0xcb: /* ret far */
723 case 0xcf: /* iret */
732 i386_call_p (const gdb_byte
*insn
)
734 if (i386_absolute_call_p (insn
))
737 /* call near, relative. */
744 /* Return non-zero if INSN is a system call, and set *LENGTHP to its
745 length in bytes. Otherwise, return zero. */
748 i386_syscall_p (const gdb_byte
*insn
, int *lengthp
)
750 /* Is it 'int $0x80'? */
751 if ((insn
[0] == 0xcd && insn
[1] == 0x80)
752 /* Or is it 'sysenter'? */
753 || (insn
[0] == 0x0f && insn
[1] == 0x34)
754 /* Or is it 'syscall'? */
755 || (insn
[0] == 0x0f && insn
[1] == 0x05))
764 /* The gdbarch insn_is_call method. */
767 i386_insn_is_call (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
769 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
771 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
772 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
774 return i386_call_p (insn
);
777 /* The gdbarch insn_is_ret method. */
780 i386_insn_is_ret (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
782 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
784 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
785 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
787 return i386_ret_p (insn
);
790 /* The gdbarch insn_is_jump method. */
793 i386_insn_is_jump (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
795 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
797 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
798 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
800 return i386_jmp_p (insn
);
803 /* Some kernels may run one past a syscall insn, so we have to cope. */
805 displaced_step_copy_insn_closure_up
806 i386_displaced_step_copy_insn (struct gdbarch
*gdbarch
,
807 CORE_ADDR from
, CORE_ADDR to
,
808 struct regcache
*regs
)
810 size_t len
= gdbarch_max_insn_length (gdbarch
);
811 std::unique_ptr
<i386_displaced_step_copy_insn_closure
> closure
812 (new i386_displaced_step_copy_insn_closure (len
));
813 gdb_byte
*buf
= closure
->buf
.data ();
815 read_memory (from
, buf
, len
);
817 /* GDB may get control back after the insn after the syscall.
818 Presumably this is a kernel bug.
819 If this is a syscall, make sure there's a nop afterwards. */
824 insn
= i386_skip_prefixes (buf
, len
);
825 if (insn
!= NULL
&& i386_syscall_p (insn
, &syscall_length
))
826 insn
[syscall_length
] = NOP_OPCODE
;
829 write_memory (to
, buf
, len
);
831 displaced_debug_printf ("%s->%s: %s",
832 paddress (gdbarch
, from
), paddress (gdbarch
, to
),
833 displaced_step_dump_bytes (buf
, len
).c_str ());
835 /* This is a work around for a problem with g++ 4.8. */
836 return displaced_step_copy_insn_closure_up (closure
.release ());
839 /* Fix up the state of registers and memory after having single-stepped
840 a displaced instruction. */
843 i386_displaced_step_fixup (struct gdbarch
*gdbarch
,
844 struct displaced_step_copy_insn_closure
*closure_
,
845 CORE_ADDR from
, CORE_ADDR to
,
846 struct regcache
*regs
)
848 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
850 /* The offset we applied to the instruction's address.
851 This could well be negative (when viewed as a signed 32-bit
852 value), but ULONGEST won't reflect that, so take care when
854 ULONGEST insn_offset
= to
- from
;
856 i386_displaced_step_copy_insn_closure
*closure
857 = (i386_displaced_step_copy_insn_closure
*) closure_
;
858 gdb_byte
*insn
= closure
->buf
.data ();
859 /* The start of the insn, needed in case we see some prefixes. */
860 gdb_byte
*insn_start
= insn
;
862 displaced_debug_printf ("fixup (%s, %s), insn = 0x%02x 0x%02x ...",
863 paddress (gdbarch
, from
), paddress (gdbarch
, to
),
866 /* The list of issues to contend with here is taken from
867 resume_execution in arch/i386/kernel/kprobes.c, Linux 2.6.20.
868 Yay for Free Software! */
870 /* Relocate the %eip, if necessary. */
872 /* The instruction recognizers we use assume any leading prefixes
873 have been skipped. */
875 /* This is the size of the buffer in closure. */
876 size_t max_insn_len
= gdbarch_max_insn_length (gdbarch
);
877 gdb_byte
*opcode
= i386_skip_prefixes (insn
, max_insn_len
);
878 /* If there are too many prefixes, just ignore the insn.
879 It will fault when run. */
884 /* Except in the case of absolute or indirect jump or call
885 instructions, or a return instruction, the new eip is relative to
886 the displaced instruction; make it relative. Well, signal
887 handler returns don't need relocation either, but we use the
888 value of %eip to recognize those; see below. */
889 if (! i386_absolute_jmp_p (insn
)
890 && ! i386_absolute_call_p (insn
)
891 && ! i386_ret_p (insn
))
896 regcache_cooked_read_unsigned (regs
, I386_EIP_REGNUM
, &orig_eip
);
898 /* A signal trampoline system call changes the %eip, resuming
899 execution of the main program after the signal handler has
900 returned. That makes them like 'return' instructions; we
901 shouldn't relocate %eip.
903 But most system calls don't, and we do need to relocate %eip.
905 Our heuristic for distinguishing these cases: if stepping
906 over the system call instruction left control directly after
907 the instruction, the we relocate --- control almost certainly
908 doesn't belong in the displaced copy. Otherwise, we assume
909 the instruction has put control where it belongs, and leave
910 it unrelocated. Goodness help us if there are PC-relative
912 if (i386_syscall_p (insn
, &insn_len
)
913 && orig_eip
!= to
+ (insn
- insn_start
) + insn_len
914 /* GDB can get control back after the insn after the syscall.
915 Presumably this is a kernel bug.
916 i386_displaced_step_copy_insn ensures its a nop,
917 we add one to the length for it. */
918 && orig_eip
!= to
+ (insn
- insn_start
) + insn_len
+ 1)
919 displaced_debug_printf ("syscall changed %%eip; not relocating");
922 ULONGEST eip
= (orig_eip
- insn_offset
) & 0xffffffffUL
;
924 /* If we just stepped over a breakpoint insn, we don't backup
925 the pc on purpose; this is to match behaviour without
928 regcache_cooked_write_unsigned (regs
, I386_EIP_REGNUM
, eip
);
930 displaced_debug_printf ("relocated %%eip from %s to %s",
931 paddress (gdbarch
, orig_eip
),
932 paddress (gdbarch
, eip
));
936 /* If the instruction was PUSHFL, then the TF bit will be set in the
937 pushed value, and should be cleared. We'll leave this for later,
938 since GDB already messes up the TF flag when stepping over a
941 /* If the instruction was a call, the return address now atop the
942 stack is the address following the copied instruction. We need
943 to make it the address following the original instruction. */
944 if (i386_call_p (insn
))
948 const ULONGEST retaddr_len
= 4;
950 regcache_cooked_read_unsigned (regs
, I386_ESP_REGNUM
, &esp
);
951 retaddr
= read_memory_unsigned_integer (esp
, retaddr_len
, byte_order
);
952 retaddr
= (retaddr
- insn_offset
) & 0xffffffffUL
;
953 write_memory_unsigned_integer (esp
, retaddr_len
, byte_order
, retaddr
);
955 displaced_debug_printf ("relocated return addr at %s to %s",
956 paddress (gdbarch
, esp
),
957 paddress (gdbarch
, retaddr
));
962 append_insns (CORE_ADDR
*to
, ULONGEST len
, const gdb_byte
*buf
)
964 target_write_memory (*to
, buf
, len
);
969 i386_relocate_instruction (struct gdbarch
*gdbarch
,
970 CORE_ADDR
*to
, CORE_ADDR oldloc
)
972 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
973 gdb_byte buf
[I386_MAX_INSN_LEN
];
974 int offset
= 0, rel32
, newrel
;
976 gdb_byte
*insn
= buf
;
978 read_memory (oldloc
, buf
, I386_MAX_INSN_LEN
);
980 insn_length
= gdb_buffered_insn_length (gdbarch
, insn
,
981 I386_MAX_INSN_LEN
, oldloc
);
983 /* Get past the prefixes. */
984 insn
= i386_skip_prefixes (insn
, I386_MAX_INSN_LEN
);
986 /* Adjust calls with 32-bit relative addresses as push/jump, with
987 the address pushed being the location where the original call in
988 the user program would return to. */
991 gdb_byte push_buf
[16];
992 unsigned int ret_addr
;
994 /* Where "ret" in the original code will return to. */
995 ret_addr
= oldloc
+ insn_length
;
996 push_buf
[0] = 0x68; /* pushq $... */
997 store_unsigned_integer (&push_buf
[1], 4, byte_order
, ret_addr
);
999 append_insns (to
, 5, push_buf
);
1001 /* Convert the relative call to a relative jump. */
1004 /* Adjust the destination offset. */
1005 rel32
= extract_signed_integer (insn
+ 1, 4, byte_order
);
1006 newrel
= (oldloc
- *to
) + rel32
;
1007 store_signed_integer (insn
+ 1, 4, byte_order
, newrel
);
1009 displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
1010 hex_string (rel32
), paddress (gdbarch
, oldloc
),
1011 hex_string (newrel
), paddress (gdbarch
, *to
));
1013 /* Write the adjusted jump into its displaced location. */
1014 append_insns (to
, 5, insn
);
1018 /* Adjust jumps with 32-bit relative addresses. Calls are already
1020 if (insn
[0] == 0xe9)
1022 /* Adjust conditional jumps. */
1023 else if (insn
[0] == 0x0f && (insn
[1] & 0xf0) == 0x80)
1028 rel32
= extract_signed_integer (insn
+ offset
, 4, byte_order
);
1029 newrel
= (oldloc
- *to
) + rel32
;
1030 store_signed_integer (insn
+ offset
, 4, byte_order
, newrel
);
1031 displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
1032 hex_string (rel32
), paddress (gdbarch
, oldloc
),
1033 hex_string (newrel
), paddress (gdbarch
, *to
));
1036 /* Write the adjusted instructions into their displaced
1038 append_insns (to
, insn_length
, buf
);
1042 #ifdef I386_REGNO_TO_SYMMETRY
1043 #error "The Sequent Symmetry is no longer supported."
1046 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
1047 and %esp "belong" to the calling function. Therefore these
1048 registers should be saved if they're going to be modified. */
1050 /* The maximum number of saved registers. This should include all
1051 registers mentioned above, and %eip. */
1052 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
1054 struct i386_frame_cache
1062 /* Saved registers. */
1063 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
1068 /* Stack space reserved for local variables. */
1072 /* Allocate and initialize a frame cache. */
1074 static struct i386_frame_cache
*
1075 i386_alloc_frame_cache (void)
1077 struct i386_frame_cache
*cache
;
1080 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
1085 cache
->sp_offset
= -4;
1088 /* Saved registers. We initialize these to -1 since zero is a valid
1089 offset (that's where %ebp is supposed to be stored). */
1090 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
1091 cache
->saved_regs
[i
] = -1;
1092 cache
->saved_sp
= 0;
1093 cache
->saved_sp_reg
= -1;
1094 cache
->pc_in_eax
= 0;
1096 /* Frameless until proven otherwise. */
1102 /* If the instruction at PC is a jump, return the address of its
1103 target. Otherwise, return PC. */
1106 i386_follow_jump (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1108 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1113 if (target_read_code (pc
, &op
, 1))
1120 op
= read_code_unsigned_integer (pc
+ 1, 1, byte_order
);
1126 /* Relative jump: if data16 == 0, disp32, else disp16. */
1129 delta
= read_memory_integer (pc
+ 2, 2, byte_order
);
1131 /* Include the size of the jmp instruction (including the
1137 delta
= read_memory_integer (pc
+ 1, 4, byte_order
);
1139 /* Include the size of the jmp instruction. */
1144 /* Relative jump, disp8 (ignore data16). */
1145 delta
= read_memory_integer (pc
+ data16
+ 1, 1, byte_order
);
1147 delta
+= data16
+ 2;
1154 /* Check whether PC points at a prologue for a function returning a
1155 structure or union. If so, it updates CACHE and returns the
1156 address of the first instruction after the code sequence that
1157 removes the "hidden" argument from the stack or CURRENT_PC,
1158 whichever is smaller. Otherwise, return PC. */
1161 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
1162 struct i386_frame_cache
*cache
)
1164 /* Functions that return a structure or union start with:
1167 xchgl %eax, (%esp) 0x87 0x04 0x24
1168 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
1170 (the System V compiler puts out the second `xchg' instruction,
1171 and the assembler doesn't try to optimize it, so the 'sib' form
1172 gets generated). This sequence is used to get the address of the
1173 return buffer for a function that returns a structure. */
1174 static gdb_byte proto1
[3] = { 0x87, 0x04, 0x24 };
1175 static gdb_byte proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
1179 if (current_pc
<= pc
)
1182 if (target_read_code (pc
, &op
, 1))
1185 if (op
!= 0x58) /* popl %eax */
1188 if (target_read_code (pc
+ 1, buf
, 4))
1191 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
1194 if (current_pc
== pc
)
1196 cache
->sp_offset
+= 4;
1200 if (current_pc
== pc
+ 1)
1202 cache
->pc_in_eax
= 1;
1206 if (buf
[1] == proto1
[1])
1213 i386_skip_probe (CORE_ADDR pc
)
1215 /* A function may start with
1229 if (target_read_code (pc
, &op
, 1))
1232 if (op
== 0x68 || op
== 0x6a)
1236 /* Skip past the `pushl' instruction; it has either a one-byte or a
1237 four-byte operand, depending on the opcode. */
1243 /* Read the following 8 bytes, which should be `call _probe' (6
1244 bytes) followed by `addl $4,%esp' (2 bytes). */
1245 read_memory (pc
+ delta
, buf
, sizeof (buf
));
1246 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
1247 pc
+= delta
+ sizeof (buf
);
1253 /* GCC 4.1 and later, can put code in the prologue to realign the
1254 stack pointer. Check whether PC points to such code, and update
1255 CACHE accordingly. Return the first instruction after the code
1256 sequence or CURRENT_PC, whichever is smaller. If we don't
1257 recognize the code, return PC. */
1260 i386_analyze_stack_align (CORE_ADDR pc
, CORE_ADDR current_pc
,
1261 struct i386_frame_cache
*cache
)
1263 /* There are 2 code sequences to re-align stack before the frame
1266 1. Use a caller-saved saved register:
1272 2. Use a callee-saved saved register:
1279 "andl $-XXX, %esp" can be either 3 bytes or 6 bytes:
1281 0x83 0xe4 0xf0 andl $-16, %esp
1282 0x81 0xe4 0x00 0xff 0xff 0xff andl $-256, %esp
1287 int offset
, offset_and
;
1288 static int regnums
[8] = {
1289 I386_EAX_REGNUM
, /* %eax */
1290 I386_ECX_REGNUM
, /* %ecx */
1291 I386_EDX_REGNUM
, /* %edx */
1292 I386_EBX_REGNUM
, /* %ebx */
1293 I386_ESP_REGNUM
, /* %esp */
1294 I386_EBP_REGNUM
, /* %ebp */
1295 I386_ESI_REGNUM
, /* %esi */
1296 I386_EDI_REGNUM
/* %edi */
1299 if (target_read_code (pc
, buf
, sizeof buf
))
1302 /* Check caller-saved saved register. The first instruction has
1303 to be "leal 4(%esp), %reg". */
1304 if (buf
[0] == 0x8d && buf
[2] == 0x24 && buf
[3] == 0x4)
1306 /* MOD must be binary 10 and R/M must be binary 100. */
1307 if ((buf
[1] & 0xc7) != 0x44)
1310 /* REG has register number. */
1311 reg
= (buf
[1] >> 3) & 7;
1316 /* Check callee-saved saved register. The first instruction
1317 has to be "pushl %reg". */
1318 if ((buf
[0] & 0xf8) != 0x50)
1324 /* The next instruction has to be "leal 8(%esp), %reg". */
1325 if (buf
[1] != 0x8d || buf
[3] != 0x24 || buf
[4] != 0x8)
1328 /* MOD must be binary 10 and R/M must be binary 100. */
1329 if ((buf
[2] & 0xc7) != 0x44)
1332 /* REG has register number. Registers in pushl and leal have to
1334 if (reg
!= ((buf
[2] >> 3) & 7))
1340 /* Rigister can't be %esp nor %ebp. */
1341 if (reg
== 4 || reg
== 5)
1344 /* The next instruction has to be "andl $-XXX, %esp". */
1345 if (buf
[offset
+ 1] != 0xe4
1346 || (buf
[offset
] != 0x81 && buf
[offset
] != 0x83))
1349 offset_and
= offset
;
1350 offset
+= buf
[offset
] == 0x81 ? 6 : 3;
1352 /* The next instruction has to be "pushl -4(%reg)". 8bit -4 is
1353 0xfc. REG must be binary 110 and MOD must be binary 01. */
1354 if (buf
[offset
] != 0xff
1355 || buf
[offset
+ 2] != 0xfc
1356 || (buf
[offset
+ 1] & 0xf8) != 0x70)
1359 /* R/M has register. Registers in leal and pushl have to be the
1361 if (reg
!= (buf
[offset
+ 1] & 7))
1364 if (current_pc
> pc
+ offset_and
)
1365 cache
->saved_sp_reg
= regnums
[reg
];
1367 return std::min (pc
+ offset
+ 3, current_pc
);
1370 /* Maximum instruction length we need to handle. */
1371 #define I386_MAX_MATCHED_INSN_LEN 6
1373 /* Instruction description. */
1377 gdb_byte insn
[I386_MAX_MATCHED_INSN_LEN
];
1378 gdb_byte mask
[I386_MAX_MATCHED_INSN_LEN
];
1381 /* Return whether instruction at PC matches PATTERN. */
1384 i386_match_pattern (CORE_ADDR pc
, struct i386_insn pattern
)
1388 if (target_read_code (pc
, &op
, 1))
1391 if ((op
& pattern
.mask
[0]) == pattern
.insn
[0])
1393 gdb_byte buf
[I386_MAX_MATCHED_INSN_LEN
- 1];
1394 int insn_matched
= 1;
1397 gdb_assert (pattern
.len
> 1);
1398 gdb_assert (pattern
.len
<= I386_MAX_MATCHED_INSN_LEN
);
1400 if (target_read_code (pc
+ 1, buf
, pattern
.len
- 1))
1403 for (i
= 1; i
< pattern
.len
; i
++)
1405 if ((buf
[i
- 1] & pattern
.mask
[i
]) != pattern
.insn
[i
])
1408 return insn_matched
;
1413 /* Search for the instruction at PC in the list INSN_PATTERNS. Return
1414 the first instruction description that matches. Otherwise, return
1417 static struct i386_insn
*
1418 i386_match_insn (CORE_ADDR pc
, struct i386_insn
*insn_patterns
)
1420 struct i386_insn
*pattern
;
1422 for (pattern
= insn_patterns
; pattern
->len
> 0; pattern
++)
1424 if (i386_match_pattern (pc
, *pattern
))
1431 /* Return whether PC points inside a sequence of instructions that
1432 matches INSN_PATTERNS. */
1435 i386_match_insn_block (CORE_ADDR pc
, struct i386_insn
*insn_patterns
)
1437 CORE_ADDR current_pc
;
1439 struct i386_insn
*insn
;
1441 insn
= i386_match_insn (pc
, insn_patterns
);
1446 ix
= insn
- insn_patterns
;
1447 for (i
= ix
- 1; i
>= 0; i
--)
1449 current_pc
-= insn_patterns
[i
].len
;
1451 if (!i386_match_pattern (current_pc
, insn_patterns
[i
]))
1455 current_pc
= pc
+ insn
->len
;
1456 for (insn
= insn_patterns
+ ix
+ 1; insn
->len
> 0; insn
++)
1458 if (!i386_match_pattern (current_pc
, *insn
))
1461 current_pc
+= insn
->len
;
1467 /* Some special instructions that might be migrated by GCC into the
1468 part of the prologue that sets up the new stack frame. Because the
1469 stack frame hasn't been setup yet, no registers have been saved
1470 yet, and only the scratch registers %eax, %ecx and %edx can be
1473 static i386_insn i386_frame_setup_skip_insns
[] =
1475 /* Check for `movb imm8, r' and `movl imm32, r'.
1477 ??? Should we handle 16-bit operand-sizes here? */
1479 /* `movb imm8, %al' and `movb imm8, %ah' */
1480 /* `movb imm8, %cl' and `movb imm8, %ch' */
1481 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
1482 /* `movb imm8, %dl' and `movb imm8, %dh' */
1483 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
1484 /* `movl imm32, %eax' and `movl imm32, %ecx' */
1485 { 5, { 0xb8 }, { 0xfe } },
1486 /* `movl imm32, %edx' */
1487 { 5, { 0xba }, { 0xff } },
1489 /* Check for `mov imm32, r32'. Note that there is an alternative
1490 encoding for `mov m32, %eax'.
1492 ??? Should we handle SIB addressing here?
1493 ??? Should we handle 16-bit operand-sizes here? */
1495 /* `movl m32, %eax' */
1496 { 5, { 0xa1 }, { 0xff } },
1497 /* `movl m32, %eax' and `mov; m32, %ecx' */
1498 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
1499 /* `movl m32, %edx' */
1500 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
1502 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
1503 Because of the symmetry, there are actually two ways to encode
1504 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
1505 opcode bytes 0x31 and 0x33 for `xorl'. */
1507 /* `subl %eax, %eax' */
1508 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
1509 /* `subl %ecx, %ecx' */
1510 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
1511 /* `subl %edx, %edx' */
1512 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
1513 /* `xorl %eax, %eax' */
1514 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
1515 /* `xorl %ecx, %ecx' */
1516 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
1517 /* `xorl %edx, %edx' */
1518 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
1522 /* Check whether PC points to an endbr32 instruction. */
1524 i386_skip_endbr (CORE_ADDR pc
)
1526 static const gdb_byte endbr32
[] = { 0xf3, 0x0f, 0x1e, 0xfb };
1528 gdb_byte buf
[sizeof (endbr32
)];
1530 /* Stop there if we can't read the code */
1531 if (target_read_code (pc
, buf
, sizeof (endbr32
)))
1534 /* If the instruction isn't an endbr32, stop */
1535 if (memcmp (buf
, endbr32
, sizeof (endbr32
)) != 0)
1538 return pc
+ sizeof (endbr32
);
1541 /* Check whether PC points to a no-op instruction. */
1543 i386_skip_noop (CORE_ADDR pc
)
1548 if (target_read_code (pc
, &op
, 1))
1554 /* Ignore `nop' instruction. */
1558 if (target_read_code (pc
, &op
, 1))
1562 /* Ignore no-op instruction `mov %edi, %edi'.
1563 Microsoft system dlls often start with
1564 a `mov %edi,%edi' instruction.
1565 The 5 bytes before the function start are
1566 filled with `nop' instructions.
1567 This pattern can be used for hot-patching:
1568 The `mov %edi, %edi' instruction can be replaced by a
1569 near jump to the location of the 5 `nop' instructions
1570 which can be replaced by a 32-bit jump to anywhere
1571 in the 32-bit address space. */
1573 else if (op
== 0x8b)
1575 if (target_read_code (pc
+ 1, &op
, 1))
1581 if (target_read_code (pc
, &op
, 1))
1591 /* Check whether PC points at a code that sets up a new stack frame.
1592 If so, it updates CACHE and returns the address of the first
1593 instruction after the sequence that sets up the frame or LIMIT,
1594 whichever is smaller. If we don't recognize the code, return PC. */
1597 i386_analyze_frame_setup (struct gdbarch
*gdbarch
,
1598 CORE_ADDR pc
, CORE_ADDR limit
,
1599 struct i386_frame_cache
*cache
)
1601 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1602 struct i386_insn
*insn
;
1609 if (target_read_code (pc
, &op
, 1))
1612 if (op
== 0x55) /* pushl %ebp */
1614 /* Take into account that we've executed the `pushl %ebp' that
1615 starts this instruction sequence. */
1616 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
1617 cache
->sp_offset
+= 4;
1620 /* If that's all, return now. */
1624 /* Check for some special instructions that might be migrated by
1625 GCC into the prologue and skip them. At this point in the
1626 prologue, code should only touch the scratch registers %eax,
1627 %ecx and %edx, so while the number of possibilities is sheer,
1630 Make sure we only skip these instructions if we later see the
1631 `movl %esp, %ebp' that actually sets up the frame. */
1632 while (pc
+ skip
< limit
)
1634 insn
= i386_match_insn (pc
+ skip
, i386_frame_setup_skip_insns
);
1641 /* If that's all, return now. */
1642 if (limit
<= pc
+ skip
)
1645 if (target_read_code (pc
+ skip
, &op
, 1))
1648 /* The i386 prologue looks like
1654 and a different prologue can be generated for atom.
1658 lea -0x10(%esp),%esp
1660 We handle both of them here. */
1664 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
1666 if (read_code_unsigned_integer (pc
+ skip
+ 1, 1, byte_order
)
1672 if (read_code_unsigned_integer (pc
+ skip
+ 1, 1, byte_order
)
1677 case 0x8d: /* Check for 'lea (%ebp), %ebp'. */
1678 if (read_code_unsigned_integer (pc
+ skip
+ 1, 2, byte_order
)
1687 /* OK, we actually have a frame. We just don't know how large
1688 it is yet. Set its size to zero. We'll adjust it if
1689 necessary. We also now commit to skipping the special
1690 instructions mentioned before. */
1693 /* If that's all, return now. */
1697 /* Check for stack adjustment
1703 NOTE: You can't subtract a 16-bit immediate from a 32-bit
1704 reg, so we don't have to worry about a data16 prefix. */
1705 if (target_read_code (pc
, &op
, 1))
1709 /* `subl' with 8-bit immediate. */
1710 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0xec)
1711 /* Some instruction starting with 0x83 other than `subl'. */
1714 /* `subl' with signed 8-bit immediate (though it wouldn't
1715 make sense to be negative). */
1716 cache
->locals
= read_code_integer (pc
+ 2, 1, byte_order
);
1719 else if (op
== 0x81)
1721 /* Maybe it is `subl' with a 32-bit immediate. */
1722 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0xec)
1723 /* Some instruction starting with 0x81 other than `subl'. */
1726 /* It is `subl' with a 32-bit immediate. */
1727 cache
->locals
= read_code_integer (pc
+ 2, 4, byte_order
);
1730 else if (op
== 0x8d)
1732 /* The ModR/M byte is 0x64. */
1733 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0x64)
1735 /* 'lea' with 8-bit displacement. */
1736 cache
->locals
= -1 * read_code_integer (pc
+ 3, 1, byte_order
);
1741 /* Some instruction other than `subl' nor 'lea'. */
1745 else if (op
== 0xc8) /* enter */
1747 cache
->locals
= read_code_unsigned_integer (pc
+ 1, 2, byte_order
);
1754 /* Check whether PC points at code that saves registers on the stack.
1755 If so, it updates CACHE and returns the address of the first
1756 instruction after the register saves or CURRENT_PC, whichever is
1757 smaller. Otherwise, return PC. */
1760 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
1761 struct i386_frame_cache
*cache
)
1763 CORE_ADDR offset
= 0;
1767 if (cache
->locals
> 0)
1768 offset
-= cache
->locals
;
1769 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
1771 if (target_read_code (pc
, &op
, 1))
1773 if (op
< 0x50 || op
> 0x57)
1777 cache
->saved_regs
[op
- 0x50] = offset
;
1778 cache
->sp_offset
+= 4;
1785 /* Do a full analysis of the prologue at PC and update CACHE
1786 accordingly. Bail out early if CURRENT_PC is reached. Return the
1787 address where the analysis stopped.
1789 We handle these cases:
1791 The startup sequence can be at the start of the function, or the
1792 function can start with a branch to startup code at the end.
1794 %ebp can be set up with either the 'enter' instruction, or "pushl
1795 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
1796 once used in the System V compiler).
1798 Local space is allocated just below the saved %ebp by either the
1799 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
1800 16-bit unsigned argument for space to allocate, and the 'addl'
1801 instruction could have either a signed byte, or 32-bit immediate.
1803 Next, the registers used by this function are pushed. With the
1804 System V compiler they will always be in the order: %edi, %esi,
1805 %ebx (and sometimes a harmless bug causes it to also save but not
1806 restore %eax); however, the code below is willing to see the pushes
1807 in any order, and will handle up to 8 of them.
1809 If the setup sequence is at the end of the function, then the next
1810 instruction will be a branch back to the start. */
1813 i386_analyze_prologue (struct gdbarch
*gdbarch
,
1814 CORE_ADDR pc
, CORE_ADDR current_pc
,
1815 struct i386_frame_cache
*cache
)
1817 pc
= i386_skip_endbr (pc
);
1818 pc
= i386_skip_noop (pc
);
1819 pc
= i386_follow_jump (gdbarch
, pc
);
1820 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
1821 pc
= i386_skip_probe (pc
);
1822 pc
= i386_analyze_stack_align (pc
, current_pc
, cache
);
1823 pc
= i386_analyze_frame_setup (gdbarch
, pc
, current_pc
, cache
);
1824 return i386_analyze_register_saves (pc
, current_pc
, cache
);
1827 /* Return PC of first real instruction. */
1830 i386_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
)
1832 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1834 static gdb_byte pic_pat
[6] =
1836 0xe8, 0, 0, 0, 0, /* call 0x0 */
1837 0x5b, /* popl %ebx */
1839 struct i386_frame_cache cache
;
1843 CORE_ADDR func_addr
;
1845 if (find_pc_partial_function (start_pc
, NULL
, &func_addr
, NULL
))
1847 CORE_ADDR post_prologue_pc
1848 = skip_prologue_using_sal (gdbarch
, func_addr
);
1849 struct compunit_symtab
*cust
= find_pc_compunit_symtab (func_addr
);
1851 /* LLVM backend (Clang/Flang) always emits a line note before the
1852 prologue and another one after. We trust clang and newer Intel
1853 compilers to emit usable line notes. */
1854 if (post_prologue_pc
1856 && cust
->producer () != NULL
1857 && (producer_is_llvm (cust
->producer ())
1858 || producer_is_icc_ge_19 (cust
->producer ()))))
1859 return std::max (start_pc
, post_prologue_pc
);
1863 pc
= i386_analyze_prologue (gdbarch
, start_pc
, 0xffffffff, &cache
);
1864 if (cache
.locals
< 0)
1867 /* Found valid frame setup. */
1869 /* The native cc on SVR4 in -K PIC mode inserts the following code
1870 to get the address of the global offset table (GOT) into register
1875 movl %ebx,x(%ebp) (optional)
1878 This code is with the rest of the prologue (at the end of the
1879 function), so we have to skip it to get to the first real
1880 instruction at the start of the function. */
1882 for (i
= 0; i
< 6; i
++)
1884 if (target_read_code (pc
+ i
, &op
, 1))
1887 if (pic_pat
[i
] != op
)
1894 if (target_read_code (pc
+ delta
, &op
, 1))
1897 if (op
== 0x89) /* movl %ebx, x(%ebp) */
1899 op
= read_code_unsigned_integer (pc
+ delta
+ 1, 1, byte_order
);
1901 if (op
== 0x5d) /* One byte offset from %ebp. */
1903 else if (op
== 0x9d) /* Four byte offset from %ebp. */
1905 else /* Unexpected instruction. */
1908 if (target_read_code (pc
+ delta
, &op
, 1))
1913 if (delta
> 0 && op
== 0x81
1914 && read_code_unsigned_integer (pc
+ delta
+ 1, 1, byte_order
)
1921 /* If the function starts with a branch (to startup code at the end)
1922 the last instruction should bring us back to the first
1923 instruction of the real code. */
1924 if (i386_follow_jump (gdbarch
, start_pc
) != start_pc
)
1925 pc
= i386_follow_jump (gdbarch
, pc
);
1930 /* Check that the code pointed to by PC corresponds to a call to
1931 __main, skip it if so. Return PC otherwise. */
1934 i386_skip_main_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1936 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1939 if (target_read_code (pc
, &op
, 1))
1945 if (target_read_code (pc
+ 1, buf
, sizeof buf
) == 0)
1947 /* Make sure address is computed correctly as a 32bit
1948 integer even if CORE_ADDR is 64 bit wide. */
1949 struct bound_minimal_symbol s
;
1950 CORE_ADDR call_dest
;
1952 call_dest
= pc
+ 5 + extract_signed_integer (buf
, 4, byte_order
);
1953 call_dest
= call_dest
& 0xffffffffU
;
1954 s
= lookup_minimal_symbol_by_pc (call_dest
);
1955 if (s
.minsym
!= NULL
1956 && s
.minsym
->linkage_name () != NULL
1957 && strcmp (s
.minsym
->linkage_name (), "__main") == 0)
1965 /* This function is 64-bit safe. */
1968 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1972 frame_unwind_register (next_frame
, gdbarch_pc_regnum (gdbarch
), buf
);
1973 return extract_typed_address (buf
, builtin_type (gdbarch
)->builtin_func_ptr
);
1977 /* Normal frames. */
1980 i386_frame_cache_1 (struct frame_info
*this_frame
,
1981 struct i386_frame_cache
*cache
)
1983 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1984 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1988 cache
->pc
= get_frame_func (this_frame
);
1990 /* In principle, for normal frames, %ebp holds the frame pointer,
1991 which holds the base address for the current stack frame.
1992 However, for functions that don't need it, the frame pointer is
1993 optional. For these "frameless" functions the frame pointer is
1994 actually the frame pointer of the calling frame. Signal
1995 trampolines are just a special case of a "frameless" function.
1996 They (usually) share their frame pointer with the frame that was
1997 in progress when the signal occurred. */
1999 get_frame_register (this_frame
, I386_EBP_REGNUM
, buf
);
2000 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
);
2001 if (cache
->base
== 0)
2007 /* For normal frames, %eip is stored at 4(%ebp). */
2008 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
2011 i386_analyze_prologue (gdbarch
, cache
->pc
, get_frame_pc (this_frame
),
2014 if (cache
->locals
< 0)
2016 /* We didn't find a valid frame, which means that CACHE->base
2017 currently holds the frame pointer for our calling frame. If
2018 we're at the start of a function, or somewhere half-way its
2019 prologue, the function's frame probably hasn't been fully
2020 setup yet. Try to reconstruct the base address for the stack
2021 frame by looking at the stack pointer. For truly "frameless"
2022 functions this might work too. */
2024 if (cache
->saved_sp_reg
!= -1)
2026 /* Saved stack pointer has been saved. */
2027 get_frame_register (this_frame
, cache
->saved_sp_reg
, buf
);
2028 cache
->saved_sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2030 /* We're halfway aligning the stack. */
2031 cache
->base
= ((cache
->saved_sp
- 4) & 0xfffffff0) - 4;
2032 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->saved_sp
- 4;
2034 /* This will be added back below. */
2035 cache
->saved_regs
[I386_EIP_REGNUM
] -= cache
->base
;
2037 else if (cache
->pc
!= 0
2038 || target_read_code (get_frame_pc (this_frame
), buf
, 1))
2040 /* We're in a known function, but did not find a frame
2041 setup. Assume that the function does not use %ebp.
2042 Alternatively, we may have jumped to an invalid
2043 address; in that case there is definitely no new
2045 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2046 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
)
2050 /* We're in an unknown function. We could not find the start
2051 of the function to analyze the prologue; our best option is
2052 to assume a typical frame layout with the caller's %ebp
2054 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
2057 if (cache
->saved_sp_reg
!= -1)
2059 /* Saved stack pointer has been saved (but the SAVED_SP_REG
2060 register may be unavailable). */
2061 if (cache
->saved_sp
== 0
2062 && deprecated_frame_register_read (this_frame
,
2063 cache
->saved_sp_reg
, buf
))
2064 cache
->saved_sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2066 /* Now that we have the base address for the stack frame we can
2067 calculate the value of %esp in the calling frame. */
2068 else if (cache
->saved_sp
== 0)
2069 cache
->saved_sp
= cache
->base
+ 8;
2071 /* Adjust all the saved registers such that they contain addresses
2072 instead of offsets. */
2073 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
2074 if (cache
->saved_regs
[i
] != -1)
2075 cache
->saved_regs
[i
] += cache
->base
;
2080 static struct i386_frame_cache
*
2081 i386_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2083 struct i386_frame_cache
*cache
;
2086 return (struct i386_frame_cache
*) *this_cache
;
2088 cache
= i386_alloc_frame_cache ();
2089 *this_cache
= cache
;
2093 i386_frame_cache_1 (this_frame
, cache
);
2095 catch (const gdb_exception_error
&ex
)
2097 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2105 i386_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2106 struct frame_id
*this_id
)
2108 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2111 (*this_id
) = frame_id_build_unavailable_stack (cache
->pc
);
2112 else if (cache
->base
== 0)
2114 /* This marks the outermost frame. */
2118 /* See the end of i386_push_dummy_call. */
2119 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
2123 static enum unwind_stop_reason
2124 i386_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2127 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2130 return UNWIND_UNAVAILABLE
;
2132 /* This marks the outermost frame. */
2133 if (cache
->base
== 0)
2134 return UNWIND_OUTERMOST
;
2136 return UNWIND_NO_REASON
;
2139 static struct value
*
2140 i386_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
2143 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2145 gdb_assert (regnum
>= 0);
2147 /* The System V ABI says that:
2149 "The flags register contains the system flags, such as the
2150 direction flag and the carry flag. The direction flag must be
2151 set to the forward (that is, zero) direction before entry and
2152 upon exit from a function. Other user flags have no specified
2153 role in the standard calling sequence and are not preserved."
2155 To guarantee the "upon exit" part of that statement we fake a
2156 saved flags register that has its direction flag cleared.
2158 Note that GCC doesn't seem to rely on the fact that the direction
2159 flag is cleared after a function return; it always explicitly
2160 clears the flag before operations where it matters.
2162 FIXME: kettenis/20030316: I'm not quite sure whether this is the
2163 right thing to do. The way we fake the flags register here makes
2164 it impossible to change it. */
2166 if (regnum
== I386_EFLAGS_REGNUM
)
2170 val
= get_frame_register_unsigned (this_frame
, regnum
);
2172 return frame_unwind_got_constant (this_frame
, regnum
, val
);
2175 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
2176 return frame_unwind_got_register (this_frame
, regnum
, I386_EAX_REGNUM
);
2178 if (regnum
== I386_ESP_REGNUM
2179 && (cache
->saved_sp
!= 0 || cache
->saved_sp_reg
!= -1))
2181 /* If the SP has been saved, but we don't know where, then this
2182 means that SAVED_SP_REG register was found unavailable back
2183 when we built the cache. */
2184 if (cache
->saved_sp
== 0)
2185 return frame_unwind_got_register (this_frame
, regnum
,
2186 cache
->saved_sp_reg
);
2188 return frame_unwind_got_constant (this_frame
, regnum
,
2192 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
2193 return frame_unwind_got_memory (this_frame
, regnum
,
2194 cache
->saved_regs
[regnum
]);
2196 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
2199 static const struct frame_unwind i386_frame_unwind
=
2203 i386_frame_unwind_stop_reason
,
2205 i386_frame_prev_register
,
2207 default_frame_sniffer
2210 /* Normal frames, but in a function epilogue. */
2212 /* Implement the stack_frame_destroyed_p gdbarch method.
2214 The epilogue is defined here as the 'ret' instruction, which will
2215 follow any instruction such as 'leave' or 'pop %ebp' that destroys
2216 the function's stack frame. */
2219 i386_stack_frame_destroyed_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
2222 struct compunit_symtab
*cust
;
2224 cust
= find_pc_compunit_symtab (pc
);
2225 if (cust
!= NULL
&& cust
->epilogue_unwind_valid ())
2228 if (target_read_memory (pc
, &insn
, 1))
2229 return 0; /* Can't read memory at pc. */
2231 if (insn
!= 0xc3) /* 'ret' instruction. */
2238 i386_epilogue_frame_sniffer (const struct frame_unwind
*self
,
2239 struct frame_info
*this_frame
,
2240 void **this_prologue_cache
)
2242 if (frame_relative_level (this_frame
) == 0)
2243 return i386_stack_frame_destroyed_p (get_frame_arch (this_frame
),
2244 get_frame_pc (this_frame
));
2249 static struct i386_frame_cache
*
2250 i386_epilogue_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2252 struct i386_frame_cache
*cache
;
2256 return (struct i386_frame_cache
*) *this_cache
;
2258 cache
= i386_alloc_frame_cache ();
2259 *this_cache
= cache
;
2263 cache
->pc
= get_frame_func (this_frame
);
2265 /* At this point the stack looks as if we just entered the
2266 function, with the return address at the top of the
2268 sp
= get_frame_register_unsigned (this_frame
, I386_ESP_REGNUM
);
2269 cache
->base
= sp
+ cache
->sp_offset
;
2270 cache
->saved_sp
= cache
->base
+ 8;
2271 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->base
+ 4;
2275 catch (const gdb_exception_error
&ex
)
2277 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2284 static enum unwind_stop_reason
2285 i386_epilogue_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2288 struct i386_frame_cache
*cache
=
2289 i386_epilogue_frame_cache (this_frame
, this_cache
);
2292 return UNWIND_UNAVAILABLE
;
2294 return UNWIND_NO_REASON
;
2298 i386_epilogue_frame_this_id (struct frame_info
*this_frame
,
2300 struct frame_id
*this_id
)
2302 struct i386_frame_cache
*cache
=
2303 i386_epilogue_frame_cache (this_frame
, this_cache
);
2306 (*this_id
) = frame_id_build_unavailable_stack (cache
->pc
);
2308 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
2311 static struct value
*
2312 i386_epilogue_frame_prev_register (struct frame_info
*this_frame
,
2313 void **this_cache
, int regnum
)
2315 /* Make sure we've initialized the cache. */
2316 i386_epilogue_frame_cache (this_frame
, this_cache
);
2318 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
2321 static const struct frame_unwind i386_epilogue_frame_unwind
=
2325 i386_epilogue_frame_unwind_stop_reason
,
2326 i386_epilogue_frame_this_id
,
2327 i386_epilogue_frame_prev_register
,
2329 i386_epilogue_frame_sniffer
2333 /* Stack-based trampolines. */
2335 /* These trampolines are used on cross x86 targets, when taking the
2336 address of a nested function. When executing these trampolines,
2337 no stack frame is set up, so we are in a similar situation as in
2338 epilogues and i386_epilogue_frame_this_id can be re-used. */
2340 /* Static chain passed in register. */
2342 static i386_insn i386_tramp_chain_in_reg_insns
[] =
2344 /* `movl imm32, %eax' and `movl imm32, %ecx' */
2345 { 5, { 0xb8 }, { 0xfe } },
2348 { 5, { 0xe9 }, { 0xff } },
2353 /* Static chain passed on stack (when regparm=3). */
2355 static i386_insn i386_tramp_chain_on_stack_insns
[] =
2358 { 5, { 0x68 }, { 0xff } },
2361 { 5, { 0xe9 }, { 0xff } },
2366 /* Return whether PC points inside a stack trampoline. */
2369 i386_in_stack_tramp_p (CORE_ADDR pc
)
2374 /* A stack trampoline is detected if no name is associated
2375 to the current pc and if it points inside a trampoline
2378 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2382 if (target_read_memory (pc
, &insn
, 1))
2385 if (!i386_match_insn_block (pc
, i386_tramp_chain_in_reg_insns
)
2386 && !i386_match_insn_block (pc
, i386_tramp_chain_on_stack_insns
))
2393 i386_stack_tramp_frame_sniffer (const struct frame_unwind
*self
,
2394 struct frame_info
*this_frame
,
2397 if (frame_relative_level (this_frame
) == 0)
2398 return i386_in_stack_tramp_p (get_frame_pc (this_frame
));
2403 static const struct frame_unwind i386_stack_tramp_frame_unwind
=
2407 i386_epilogue_frame_unwind_stop_reason
,
2408 i386_epilogue_frame_this_id
,
2409 i386_epilogue_frame_prev_register
,
2411 i386_stack_tramp_frame_sniffer
2414 /* Generate a bytecode expression to get the value of the saved PC. */
2417 i386_gen_return_address (struct gdbarch
*gdbarch
,
2418 struct agent_expr
*ax
, struct axs_value
*value
,
2421 /* The following sequence assumes the traditional use of the base
2423 ax_reg (ax
, I386_EBP_REGNUM
);
2425 ax_simple (ax
, aop_add
);
2426 value
->type
= register_type (gdbarch
, I386_EIP_REGNUM
);
2427 value
->kind
= axs_lvalue_memory
;
2431 /* Signal trampolines. */
2433 static struct i386_frame_cache
*
2434 i386_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2436 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2437 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
2438 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2439 struct i386_frame_cache
*cache
;
2444 return (struct i386_frame_cache
*) *this_cache
;
2446 cache
= i386_alloc_frame_cache ();
2450 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2451 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
) - 4;
2453 addr
= tdep
->sigcontext_addr (this_frame
);
2454 if (tdep
->sc_reg_offset
)
2458 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
2460 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
2461 if (tdep
->sc_reg_offset
[i
] != -1)
2462 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
2466 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
2467 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
2472 catch (const gdb_exception_error
&ex
)
2474 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2478 *this_cache
= cache
;
2482 static enum unwind_stop_reason
2483 i386_sigtramp_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2486 struct i386_frame_cache
*cache
=
2487 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2490 return UNWIND_UNAVAILABLE
;
2492 return UNWIND_NO_REASON
;
2496 i386_sigtramp_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2497 struct frame_id
*this_id
)
2499 struct i386_frame_cache
*cache
=
2500 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2503 (*this_id
) = frame_id_build_unavailable_stack (get_frame_pc (this_frame
));
2506 /* See the end of i386_push_dummy_call. */
2507 (*this_id
) = frame_id_build (cache
->base
+ 8, get_frame_pc (this_frame
));
2511 static struct value
*
2512 i386_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2513 void **this_cache
, int regnum
)
2515 /* Make sure we've initialized the cache. */
2516 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2518 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
2522 i386_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2523 struct frame_info
*this_frame
,
2524 void **this_prologue_cache
)
2526 gdbarch
*arch
= get_frame_arch (this_frame
);
2527 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (arch
);
2529 /* We shouldn't even bother if we don't have a sigcontext_addr
2531 if (tdep
->sigcontext_addr
== NULL
)
2534 if (tdep
->sigtramp_p
!= NULL
)
2536 if (tdep
->sigtramp_p (this_frame
))
2540 if (tdep
->sigtramp_start
!= 0)
2542 CORE_ADDR pc
= get_frame_pc (this_frame
);
2544 gdb_assert (tdep
->sigtramp_end
!= 0);
2545 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
2552 static const struct frame_unwind i386_sigtramp_frame_unwind
=
2556 i386_sigtramp_frame_unwind_stop_reason
,
2557 i386_sigtramp_frame_this_id
,
2558 i386_sigtramp_frame_prev_register
,
2560 i386_sigtramp_frame_sniffer
2565 i386_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
2567 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2572 static const struct frame_base i386_frame_base
=
2575 i386_frame_base_address
,
2576 i386_frame_base_address
,
2577 i386_frame_base_address
2580 static struct frame_id
2581 i386_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
2585 fp
= get_frame_register_unsigned (this_frame
, I386_EBP_REGNUM
);
2587 /* See the end of i386_push_dummy_call. */
2588 return frame_id_build (fp
+ 8, get_frame_pc (this_frame
));
2591 /* _Decimal128 function return values need 16-byte alignment on the
2595 i386_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
2597 return sp
& -(CORE_ADDR
)16;
2601 /* Figure out where the longjmp will land. Slurp the args out of the
2602 stack. We expect the first arg to be a pointer to the jmp_buf
2603 structure from which we extract the address that we will land at.
2604 This address is copied into PC. This routine returns non-zero on
2608 i386_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
2611 CORE_ADDR sp
, jb_addr
;
2612 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2613 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2614 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
2615 int jb_pc_offset
= tdep
->jb_pc_offset
;
2617 /* If JB_PC_OFFSET is -1, we have no way to find out where the
2618 longjmp will land. */
2619 if (jb_pc_offset
== -1)
2622 get_frame_register (frame
, I386_ESP_REGNUM
, buf
);
2623 sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2624 if (target_read_memory (sp
+ 4, buf
, 4))
2627 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
2628 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, 4))
2631 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
2636 /* Check whether TYPE must be 16-byte-aligned when passed as a
2637 function argument. 16-byte vectors, _Decimal128 and structures or
2638 unions containing such types must be 16-byte-aligned; other
2639 arguments are 4-byte-aligned. */
2642 i386_16_byte_align_p (struct type
*type
)
2644 type
= check_typedef (type
);
2645 if ((type
->code () == TYPE_CODE_DECFLOAT
2646 || (type
->code () == TYPE_CODE_ARRAY
&& type
->is_vector ()))
2647 && TYPE_LENGTH (type
) == 16)
2649 if (type
->code () == TYPE_CODE_ARRAY
)
2650 return i386_16_byte_align_p (TYPE_TARGET_TYPE (type
));
2651 if (type
->code () == TYPE_CODE_STRUCT
2652 || type
->code () == TYPE_CODE_UNION
)
2655 for (i
= 0; i
< type
->num_fields (); i
++)
2657 if (field_is_static (&type
->field (i
)))
2659 if (i386_16_byte_align_p (type
->field (i
).type ()))
2666 /* Implementation for set_gdbarch_push_dummy_code. */
2669 i386_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
2670 struct value
**args
, int nargs
, struct type
*value_type
,
2671 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
2672 struct regcache
*regcache
)
2674 /* Use 0xcc breakpoint - 1 byte. */
2678 /* Keep the stack aligned. */
2682 /* The "push_dummy_call" gdbarch method, optionally with the thiscall
2683 calling convention. */
2686 i386_thiscall_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2687 struct regcache
*regcache
, CORE_ADDR bp_addr
,
2688 int nargs
, struct value
**args
, CORE_ADDR sp
,
2689 function_call_return_method return_method
,
2690 CORE_ADDR struct_addr
, bool thiscall
)
2692 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2698 /* BND registers can be in arbitrary values at the moment of the
2699 inferior call. This can cause boundary violations that are not
2700 due to a real bug or even desired by the user. The best to be done
2701 is set the BND registers to allow access to the whole memory, INIT
2702 state, before pushing the inferior call. */
2703 i387_reset_bnd_regs (gdbarch
, regcache
);
2705 /* Determine the total space required for arguments and struct
2706 return address in a first pass (allowing for 16-byte-aligned
2707 arguments), then push arguments in a second pass. */
2709 for (write_pass
= 0; write_pass
< 2; write_pass
++)
2711 int args_space_used
= 0;
2713 if (return_method
== return_method_struct
)
2717 /* Push value address. */
2718 store_unsigned_integer (buf
, 4, byte_order
, struct_addr
);
2719 write_memory (sp
, buf
, 4);
2720 args_space_used
+= 4;
2726 for (i
= thiscall
? 1 : 0; i
< nargs
; i
++)
2728 int len
= TYPE_LENGTH (value_enclosing_type (args
[i
]));
2732 if (i386_16_byte_align_p (value_enclosing_type (args
[i
])))
2733 args_space_used
= align_up (args_space_used
, 16);
2735 write_memory (sp
+ args_space_used
,
2736 value_contents_all (args
[i
]).data (), len
);
2737 /* The System V ABI says that:
2739 "An argument's size is increased, if necessary, to make it a
2740 multiple of [32-bit] words. This may require tail padding,
2741 depending on the size of the argument."
2743 This makes sure the stack stays word-aligned. */
2744 args_space_used
+= align_up (len
, 4);
2748 if (i386_16_byte_align_p (value_enclosing_type (args
[i
])))
2749 args_space
= align_up (args_space
, 16);
2750 args_space
+= align_up (len
, 4);
2758 /* The original System V ABI only requires word alignment,
2759 but modern incarnations need 16-byte alignment in order
2760 to support SSE. Since wasting a few bytes here isn't
2761 harmful we unconditionally enforce 16-byte alignment. */
2766 /* Store return address. */
2768 store_unsigned_integer (buf
, 4, byte_order
, bp_addr
);
2769 write_memory (sp
, buf
, 4);
2771 /* Finally, update the stack pointer... */
2772 store_unsigned_integer (buf
, 4, byte_order
, sp
);
2773 regcache
->cooked_write (I386_ESP_REGNUM
, buf
);
2775 /* ...and fake a frame pointer. */
2776 regcache
->cooked_write (I386_EBP_REGNUM
, buf
);
2778 /* The 'this' pointer needs to be in ECX. */
2780 regcache
->cooked_write (I386_ECX_REGNUM
,
2781 value_contents_all (args
[0]).data ());
2783 /* If the PLT is position-independent, the SYSTEM V ABI requires %ebx to be
2784 set to the address of the GOT when doing a call to a PLT address.
2785 Note that we do not try to determine whether the PLT is
2786 position-independent, we just set the register regardless. */
2787 CORE_ADDR func_addr
= find_function_addr (function
, nullptr, nullptr);
2788 if (in_plt_section (func_addr
))
2790 struct objfile
*objf
= nullptr;
2791 asection
*asect
= nullptr;
2792 obj_section
*osect
= nullptr;
2794 /* Get object file containing func_addr. */
2795 obj_section
*func_section
= find_pc_section (func_addr
);
2796 if (func_section
!= nullptr)
2797 objf
= func_section
->objfile
;
2799 if (objf
!= nullptr)
2801 /* Get corresponding .got.plt or .got section. */
2802 asect
= bfd_get_section_by_name (objf
->obfd
, ".got.plt");
2803 if (asect
== nullptr)
2804 asect
= bfd_get_section_by_name (objf
->obfd
, ".got");
2807 if (asect
!= nullptr)
2808 /* Translate asection to obj_section. */
2809 osect
= maint_obj_section_from_bfd_section (objf
->obfd
, asect
, objf
);
2811 if (osect
!= nullptr)
2813 /* Store the section address in %ebx. */
2814 store_unsigned_integer (buf
, 4, byte_order
, osect
->addr ());
2815 regcache
->cooked_write (I386_EBX_REGNUM
, buf
);
2819 /* If we would only do this for a position-independent PLT, it would
2820 make sense to issue a warning here. */
2824 /* MarkK wrote: This "+ 8" is all over the place:
2825 (i386_frame_this_id, i386_sigtramp_frame_this_id,
2826 i386_dummy_id). It's there, since all frame unwinders for
2827 a given target have to agree (within a certain margin) on the
2828 definition of the stack address of a frame. Otherwise frame id
2829 comparison might not work correctly. Since DWARF2/GCC uses the
2830 stack address *before* the function call as a frame's CFA. On
2831 the i386, when %ebp is used as a frame pointer, the offset
2832 between the contents %ebp and the CFA as defined by GCC. */
2836 /* Implement the "push_dummy_call" gdbarch method. */
2839 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2840 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
2841 struct value
**args
, CORE_ADDR sp
,
2842 function_call_return_method return_method
,
2843 CORE_ADDR struct_addr
)
2845 return i386_thiscall_push_dummy_call (gdbarch
, function
, regcache
, bp_addr
,
2846 nargs
, args
, sp
, return_method
,
2847 struct_addr
, false);
2850 /* These registers are used for returning integers (and on some
2851 targets also for returning `struct' and `union' values when their
2852 size and alignment match an integer type). */
2853 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
2854 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
2856 /* Read, for architecture GDBARCH, a function return value of TYPE
2857 from REGCACHE, and copy that into VALBUF. */
2860 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2861 struct regcache
*regcache
, gdb_byte
*valbuf
)
2863 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
2864 int len
= TYPE_LENGTH (type
);
2865 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
2867 /* _Float16 and _Float16 _Complex values are returned via xmm0. */
2868 if (((type
->code () == TYPE_CODE_FLT
) && len
== 2)
2869 || ((type
->code () == TYPE_CODE_COMPLEX
) && len
== 4))
2871 regcache
->raw_read (I387_XMM0_REGNUM (tdep
), valbuf
);
2874 else if (type
->code () == TYPE_CODE_FLT
)
2876 if (tdep
->st0_regnum
< 0)
2878 warning (_("Cannot find floating-point return value."));
2879 memset (valbuf
, 0, len
);
2883 /* Floating-point return values can be found in %st(0). Convert
2884 its contents to the desired type. This is probably not
2885 exactly how it would happen on the target itself, but it is
2886 the best we can do. */
2887 regcache
->raw_read (I386_ST0_REGNUM
, buf
);
2888 target_float_convert (buf
, i387_ext_type (gdbarch
), valbuf
, type
);
2892 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
2893 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
2895 if (len
<= low_size
)
2897 regcache
->raw_read (LOW_RETURN_REGNUM
, buf
);
2898 memcpy (valbuf
, buf
, len
);
2900 else if (len
<= (low_size
+ high_size
))
2902 regcache
->raw_read (LOW_RETURN_REGNUM
, buf
);
2903 memcpy (valbuf
, buf
, low_size
);
2904 regcache
->raw_read (HIGH_RETURN_REGNUM
, buf
);
2905 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
2908 internal_error (__FILE__
, __LINE__
,
2909 _("Cannot extract return value of %d bytes long."),
2914 /* Write, for architecture GDBARCH, a function return value of TYPE
2915 from VALBUF into REGCACHE. */
2918 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2919 struct regcache
*regcache
, const gdb_byte
*valbuf
)
2921 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
2922 int len
= TYPE_LENGTH (type
);
2924 if (type
->code () == TYPE_CODE_FLT
)
2927 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
2929 if (tdep
->st0_regnum
< 0)
2931 warning (_("Cannot set floating-point return value."));
2935 /* Returning floating-point values is a bit tricky. Apart from
2936 storing the return value in %st(0), we have to simulate the
2937 state of the FPU at function return point. */
2939 /* Convert the value found in VALBUF to the extended
2940 floating-point format used by the FPU. This is probably
2941 not exactly how it would happen on the target itself, but
2942 it is the best we can do. */
2943 target_float_convert (valbuf
, type
, buf
, i387_ext_type (gdbarch
));
2944 regcache
->raw_write (I386_ST0_REGNUM
, buf
);
2946 /* Set the top of the floating-point register stack to 7. The
2947 actual value doesn't really matter, but 7 is what a normal
2948 function return would end up with if the program started out
2949 with a freshly initialized FPU. */
2950 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
2952 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
2954 /* Mark %st(1) through %st(7) as empty. Since we set the top of
2955 the floating-point register stack to 7, the appropriate value
2956 for the tag word is 0x3fff. */
2957 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);
2961 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
2962 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
2964 if (len
<= low_size
)
2965 regcache
->raw_write_part (LOW_RETURN_REGNUM
, 0, len
, valbuf
);
2966 else if (len
<= (low_size
+ high_size
))
2968 regcache
->raw_write (LOW_RETURN_REGNUM
, valbuf
);
2969 regcache
->raw_write_part (HIGH_RETURN_REGNUM
, 0, len
- low_size
,
2973 internal_error (__FILE__
, __LINE__
,
2974 _("Cannot store return value of %d bytes long."), len
);
2979 /* This is the variable that is set with "set struct-convention", and
2980 its legitimate values. */
2981 static const char default_struct_convention
[] = "default";
2982 static const char pcc_struct_convention
[] = "pcc";
2983 static const char reg_struct_convention
[] = "reg";
2984 static const char *const valid_conventions
[] =
2986 default_struct_convention
,
2987 pcc_struct_convention
,
2988 reg_struct_convention
,
2991 static const char *struct_convention
= default_struct_convention
;
2993 /* Return non-zero if TYPE, which is assumed to be a structure,
2994 a union type, or an array type, should be returned in registers
2995 for architecture GDBARCH. */
2998 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
3000 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
3001 enum type_code code
= type
->code ();
3002 int len
= TYPE_LENGTH (type
);
3004 gdb_assert (code
== TYPE_CODE_STRUCT
3005 || code
== TYPE_CODE_UNION
3006 || code
== TYPE_CODE_ARRAY
);
3008 if (struct_convention
== pcc_struct_convention
3009 || (struct_convention
== default_struct_convention
3010 && tdep
->struct_return
== pcc_struct_return
))
3013 /* Structures consisting of a single `float', `double' or 'long
3014 double' member are returned in %st(0). */
3015 if (code
== TYPE_CODE_STRUCT
&& type
->num_fields () == 1)
3017 type
= check_typedef (type
->field (0).type ());
3018 if (type
->code () == TYPE_CODE_FLT
)
3019 return (len
== 4 || len
== 8 || len
== 12);
3022 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
3025 /* Determine, for architecture GDBARCH, how a return value of TYPE
3026 should be returned. If it is supposed to be returned in registers,
3027 and READBUF is non-zero, read the appropriate value from REGCACHE,
3028 and copy it into READBUF. If WRITEBUF is non-zero, write the value
3029 from WRITEBUF into REGCACHE. */
3031 static enum return_value_convention
3032 i386_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
3033 struct type
*type
, struct regcache
*regcache
,
3034 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
3036 enum type_code code
= type
->code ();
3038 if (((code
== TYPE_CODE_STRUCT
3039 || code
== TYPE_CODE_UNION
3040 || code
== TYPE_CODE_ARRAY
)
3041 && !i386_reg_struct_return_p (gdbarch
, type
))
3042 /* Complex double and long double uses the struct return convention. */
3043 || (code
== TYPE_CODE_COMPLEX
&& TYPE_LENGTH (type
) == 16)
3044 || (code
== TYPE_CODE_COMPLEX
&& TYPE_LENGTH (type
) == 24)
3045 /* 128-bit decimal float uses the struct return convention. */
3046 || (code
== TYPE_CODE_DECFLOAT
&& TYPE_LENGTH (type
) == 16))
3048 /* The System V ABI says that:
3050 "A function that returns a structure or union also sets %eax
3051 to the value of the original address of the caller's area
3052 before it returns. Thus when the caller receives control
3053 again, the address of the returned object resides in register
3054 %eax and can be used to access the object."
3056 So the ABI guarantees that we can always find the return
3057 value just after the function has returned. */
3059 /* Note that the ABI doesn't mention functions returning arrays,
3060 which is something possible in certain languages such as Ada.
3061 In this case, the value is returned as if it was wrapped in
3062 a record, so the convention applied to records also applies
3069 regcache_raw_read_unsigned (regcache
, I386_EAX_REGNUM
, &addr
);
3070 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
3073 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
3076 /* This special case is for structures consisting of a single
3077 `float', `double' or 'long double' member. These structures are
3078 returned in %st(0). For these structures, we call ourselves
3079 recursively, changing TYPE into the type of the first member of
3080 the structure. Since that should work for all structures that
3081 have only one member, we don't bother to check the member's type
3083 if (code
== TYPE_CODE_STRUCT
&& type
->num_fields () == 1)
3085 type
= check_typedef (type
->field (0).type ());
3086 return i386_return_value (gdbarch
, function
, type
, regcache
,
3091 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
3093 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
3095 return RETURN_VALUE_REGISTER_CONVENTION
;
3100 i387_ext_type (struct gdbarch
*gdbarch
)
3102 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
3104 if (!tdep
->i387_ext_type
)
3106 tdep
->i387_ext_type
= tdesc_find_type (gdbarch
, "i387_ext");
3107 gdb_assert (tdep
->i387_ext_type
!= NULL
);
3110 return tdep
->i387_ext_type
;
3113 /* Construct type for pseudo BND registers. We can't use
3114 tdesc_find_type since a complement of one value has to be used
3115 to describe the upper bound. */
3117 static struct type
*
3118 i386_bnd_type (struct gdbarch
*gdbarch
)
3120 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
3123 if (!tdep
->i386_bnd_type
)
3126 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3128 /* The type we're building is described bellow: */
3133 void *ubound
; /* One complement of raw ubound field. */
3137 t
= arch_composite_type (gdbarch
,
3138 "__gdb_builtin_type_bound128", TYPE_CODE_STRUCT
);
3140 append_composite_type_field (t
, "lbound", bt
->builtin_data_ptr
);
3141 append_composite_type_field (t
, "ubound", bt
->builtin_data_ptr
);
3143 t
->set_name ("builtin_type_bound128");
3144 tdep
->i386_bnd_type
= t
;
3147 return tdep
->i386_bnd_type
;
3150 /* Construct vector type for pseudo ZMM registers. We can't use
3151 tdesc_find_type since ZMM isn't described in target description. */
3153 static struct type
*
3154 i386_zmm_type (struct gdbarch
*gdbarch
)
3156 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
3158 if (!tdep
->i386_zmm_type
)
3160 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3162 /* The type we're building is this: */
3164 union __gdb_builtin_type_vec512i
3166 int128_t v4_int128
[4];
3167 int64_t v8_int64
[8];
3168 int32_t v16_int32
[16];
3169 int16_t v32_int16
[32];
3170 int8_t v64_int8
[64];
3171 double v8_double
[8];
3172 float v16_float
[16];
3173 float16_t v32_half
[32];
3174 bfloat16_t v32_bfloat16
[32];
3180 t
= arch_composite_type (gdbarch
,
3181 "__gdb_builtin_type_vec512i", TYPE_CODE_UNION
);
3182 append_composite_type_field (t
, "v32_bfloat16",
3183 init_vector_type (bt
->builtin_bfloat16
, 32));
3184 append_composite_type_field (t
, "v32_half",
3185 init_vector_type (bt
->builtin_half
, 32));
3186 append_composite_type_field (t
, "v16_float",
3187 init_vector_type (bt
->builtin_float
, 16));
3188 append_composite_type_field (t
, "v8_double",
3189 init_vector_type (bt
->builtin_double
, 8));
3190 append_composite_type_field (t
, "v64_int8",
3191 init_vector_type (bt
->builtin_int8
, 64));
3192 append_composite_type_field (t
, "v32_int16",
3193 init_vector_type (bt
->builtin_int16
, 32));
3194 append_composite_type_field (t
, "v16_int32",
3195 init_vector_type (bt
->builtin_int32
, 16));
3196 append_composite_type_field (t
, "v8_int64",
3197 init_vector_type (bt
->builtin_int64
, 8));
3198 append_composite_type_field (t
, "v4_int128",
3199 init_vector_type (bt
->builtin_int128
, 4));
3201 t
->set_is_vector (true);
3202 t
->set_name ("builtin_type_vec512i");
3203 tdep
->i386_zmm_type
= t
;
3206 return tdep
->i386_zmm_type
;
3209 /* Construct vector type for pseudo YMM registers. We can't use
3210 tdesc_find_type since YMM isn't described in target description. */
3212 static struct type
*
3213 i386_ymm_type (struct gdbarch
*gdbarch
)
3215 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
3217 if (!tdep
->i386_ymm_type
)
3219 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3221 /* The type we're building is this: */
3223 union __gdb_builtin_type_vec256i
3225 int128_t v2_int128
[2];
3226 int64_t v4_int64
[4];
3227 int32_t v8_int32
[8];
3228 int16_t v16_int16
[16];
3229 int8_t v32_int8
[32];
3230 double v4_double
[4];
3232 float16_t v16_half
[16];
3233 bfloat16_t v16_bfloat16
[16];
3239 t
= arch_composite_type (gdbarch
,
3240 "__gdb_builtin_type_vec256i", TYPE_CODE_UNION
);
3241 append_composite_type_field (t
, "v16_bfloat16",
3242 init_vector_type (bt
->builtin_bfloat16
, 16));
3243 append_composite_type_field (t
, "v16_half",
3244 init_vector_type (bt
->builtin_half
, 16));
3245 append_composite_type_field (t
, "v8_float",
3246 init_vector_type (bt
->builtin_float
, 8));
3247 append_composite_type_field (t
, "v4_double",
3248 init_vector_type (bt
->builtin_double
, 4));
3249 append_composite_type_field (t
, "v32_int8",
3250 init_vector_type (bt
->builtin_int8
, 32));
3251 append_composite_type_field (t
, "v16_int16",
3252 init_vector_type (bt
->builtin_int16
, 16));
3253 append_composite_type_field (t
, "v8_int32",
3254 init_vector_type (bt
->builtin_int32
, 8));
3255 append_composite_type_field (t
, "v4_int64",
3256 init_vector_type (bt
->builtin_int64
, 4));
3257 append_composite_type_field (t
, "v2_int128",
3258 init_vector_type (bt
->builtin_int128
, 2));
3260 t
->set_is_vector (true);
3261 t
->set_name ("builtin_type_vec256i");
3262 tdep
->i386_ymm_type
= t
;
3265 return tdep
->i386_ymm_type
;
3268 /* Construct vector type for MMX registers. */
3269 static struct type
*
3270 i386_mmx_type (struct gdbarch
*gdbarch
)
3272 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
3274 if (!tdep
->i386_mmx_type
)
3276 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3278 /* The type we're building is this: */
3280 union __gdb_builtin_type_vec64i
3283 int32_t v2_int32
[2];
3284 int16_t v4_int16
[4];
3291 t
= arch_composite_type (gdbarch
,
3292 "__gdb_builtin_type_vec64i", TYPE_CODE_UNION
);
3294 append_composite_type_field (t
, "uint64", bt
->builtin_int64
);
3295 append_composite_type_field (t
, "v2_int32",
3296 init_vector_type (bt
->builtin_int32
, 2));
3297 append_composite_type_field (t
, "v4_int16",
3298 init_vector_type (bt
->builtin_int16
, 4));
3299 append_composite_type_field (t
, "v8_int8",
3300 init_vector_type (bt
->builtin_int8
, 8));
3302 t
->set_is_vector (true);
3303 t
->set_name ("builtin_type_vec64i");
3304 tdep
->i386_mmx_type
= t
;
3307 return tdep
->i386_mmx_type
;
3310 /* Return the GDB type object for the "standard" data type of data in
3314 i386_pseudo_register_type (struct gdbarch
*gdbarch
, int regnum
)
3316 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3317 return i386_bnd_type (gdbarch
);
3318 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3319 return i386_mmx_type (gdbarch
);
3320 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3321 return i386_ymm_type (gdbarch
);
3322 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3323 return i386_ymm_type (gdbarch
);
3324 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3325 return i386_zmm_type (gdbarch
);
3328 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3329 if (i386_byte_regnum_p (gdbarch
, regnum
))
3330 return bt
->builtin_int8
;
3331 else if (i386_word_regnum_p (gdbarch
, regnum
))
3332 return bt
->builtin_int16
;
3333 else if (i386_dword_regnum_p (gdbarch
, regnum
))
3334 return bt
->builtin_int32
;
3335 else if (i386_k_regnum_p (gdbarch
, regnum
))
3336 return bt
->builtin_int64
;
3339 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3342 /* Map a cooked register onto a raw register or memory. For the i386,
3343 the MMX registers need to be mapped onto floating point registers. */
3346 i386_mmx_regnum_to_fp_regnum (readable_regcache
*regcache
, int regnum
)
3348 gdbarch
*arch
= regcache
->arch ();
3349 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (arch
);
3354 mmxreg
= regnum
- tdep
->mm0_regnum
;
3355 regcache
->raw_read (I387_FSTAT_REGNUM (tdep
), &fstat
);
3356 tos
= (fstat
>> 11) & 0x7;
3357 fpreg
= (mmxreg
+ tos
) % 8;
3359 return (I387_ST0_REGNUM (tdep
) + fpreg
);
3362 /* A helper function for us by i386_pseudo_register_read_value and
3363 amd64_pseudo_register_read_value. It does all the work but reads
3364 the data into an already-allocated value. */
3367 i386_pseudo_register_read_into_value (struct gdbarch
*gdbarch
,
3368 readable_regcache
*regcache
,
3370 struct value
*result_value
)
3372 gdb_byte raw_buf
[I386_MAX_REGISTER_SIZE
];
3373 enum register_status status
;
3374 gdb_byte
*buf
= value_contents_raw (result_value
).data ();
3376 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3378 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
3380 /* Extract (always little endian). */
3381 status
= regcache
->raw_read (fpnum
, raw_buf
);
3382 if (status
!= REG_VALID
)
3383 mark_value_bytes_unavailable (result_value
, 0,
3384 TYPE_LENGTH (value_type (result_value
)));
3386 memcpy (buf
, raw_buf
, register_size (gdbarch
, regnum
));
3390 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
3391 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3393 regnum
-= tdep
->bnd0_regnum
;
3395 /* Extract (always little endian). Read lower 128bits. */
3396 status
= regcache
->raw_read (I387_BND0R_REGNUM (tdep
) + regnum
,
3398 if (status
!= REG_VALID
)
3399 mark_value_bytes_unavailable (result_value
, 0, 16);
3402 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
3403 LONGEST upper
, lower
;
3404 int size
= TYPE_LENGTH (builtin_type (gdbarch
)->builtin_data_ptr
);
3406 lower
= extract_unsigned_integer (raw_buf
, 8, byte_order
);
3407 upper
= extract_unsigned_integer (raw_buf
+ 8, 8, byte_order
);
3410 memcpy (buf
, &lower
, size
);
3411 memcpy (buf
+ size
, &upper
, size
);
3414 else if (i386_k_regnum_p (gdbarch
, regnum
))
3416 regnum
-= tdep
->k0_regnum
;
3418 /* Extract (always little endian). */
3419 status
= regcache
->raw_read (tdep
->k0_regnum
+ regnum
, raw_buf
);
3420 if (status
!= REG_VALID
)
3421 mark_value_bytes_unavailable (result_value
, 0, 8);
3423 memcpy (buf
, raw_buf
, 8);
3425 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3427 regnum
-= tdep
->zmm0_regnum
;
3429 if (regnum
< num_lower_zmm_regs
)
3431 /* Extract (always little endian). Read lower 128bits. */
3432 status
= regcache
->raw_read (I387_XMM0_REGNUM (tdep
) + regnum
,
3434 if (status
!= REG_VALID
)
3435 mark_value_bytes_unavailable (result_value
, 0, 16);
3437 memcpy (buf
, raw_buf
, 16);
3439 /* Extract (always little endian). Read upper 128bits. */
3440 status
= regcache
->raw_read (tdep
->ymm0h_regnum
+ regnum
,
3442 if (status
!= REG_VALID
)
3443 mark_value_bytes_unavailable (result_value
, 16, 16);
3445 memcpy (buf
+ 16, raw_buf
, 16);
3449 /* Extract (always little endian). Read lower 128bits. */
3450 status
= regcache
->raw_read (I387_XMM16_REGNUM (tdep
) + regnum
3451 - num_lower_zmm_regs
,
3453 if (status
!= REG_VALID
)
3454 mark_value_bytes_unavailable (result_value
, 0, 16);
3456 memcpy (buf
, raw_buf
, 16);
3458 /* Extract (always little endian). Read upper 128bits. */
3459 status
= regcache
->raw_read (I387_YMM16H_REGNUM (tdep
) + regnum
3460 - num_lower_zmm_regs
,
3462 if (status
!= REG_VALID
)
3463 mark_value_bytes_unavailable (result_value
, 16, 16);
3465 memcpy (buf
+ 16, raw_buf
, 16);
3468 /* Read upper 256bits. */
3469 status
= regcache
->raw_read (tdep
->zmm0h_regnum
+ regnum
,
3471 if (status
!= REG_VALID
)
3472 mark_value_bytes_unavailable (result_value
, 32, 32);
3474 memcpy (buf
+ 32, raw_buf
, 32);
3476 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3478 regnum
-= tdep
->ymm0_regnum
;
3480 /* Extract (always little endian). Read lower 128bits. */
3481 status
= regcache
->raw_read (I387_XMM0_REGNUM (tdep
) + regnum
,
3483 if (status
!= REG_VALID
)
3484 mark_value_bytes_unavailable (result_value
, 0, 16);
3486 memcpy (buf
, raw_buf
, 16);
3487 /* Read upper 128bits. */
3488 status
= regcache
->raw_read (tdep
->ymm0h_regnum
+ regnum
,
3490 if (status
!= REG_VALID
)
3491 mark_value_bytes_unavailable (result_value
, 16, 32);
3493 memcpy (buf
+ 16, raw_buf
, 16);
3495 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3497 regnum
-= tdep
->ymm16_regnum
;
3498 /* Extract (always little endian). Read lower 128bits. */
3499 status
= regcache
->raw_read (I387_XMM16_REGNUM (tdep
) + regnum
,
3501 if (status
!= REG_VALID
)
3502 mark_value_bytes_unavailable (result_value
, 0, 16);
3504 memcpy (buf
, raw_buf
, 16);
3505 /* Read upper 128bits. */
3506 status
= regcache
->raw_read (tdep
->ymm16h_regnum
+ regnum
,
3508 if (status
!= REG_VALID
)
3509 mark_value_bytes_unavailable (result_value
, 16, 16);
3511 memcpy (buf
+ 16, raw_buf
, 16);
3513 else if (i386_word_regnum_p (gdbarch
, regnum
))
3515 int gpnum
= regnum
- tdep
->ax_regnum
;
3517 /* Extract (always little endian). */
3518 status
= regcache
->raw_read (gpnum
, raw_buf
);
3519 if (status
!= REG_VALID
)
3520 mark_value_bytes_unavailable (result_value
, 0,
3521 TYPE_LENGTH (value_type (result_value
)));
3523 memcpy (buf
, raw_buf
, 2);
3525 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3527 int gpnum
= regnum
- tdep
->al_regnum
;
3529 /* Extract (always little endian). We read both lower and
3531 status
= regcache
->raw_read (gpnum
% 4, raw_buf
);
3532 if (status
!= REG_VALID
)
3533 mark_value_bytes_unavailable (result_value
, 0,
3534 TYPE_LENGTH (value_type (result_value
)));
3535 else if (gpnum
>= 4)
3536 memcpy (buf
, raw_buf
+ 1, 1);
3538 memcpy (buf
, raw_buf
, 1);
3541 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3545 static struct value
*
3546 i386_pseudo_register_read_value (struct gdbarch
*gdbarch
,
3547 readable_regcache
*regcache
,
3550 struct value
*result
;
3552 result
= allocate_value (register_type (gdbarch
, regnum
));
3553 VALUE_LVAL (result
) = lval_register
;
3554 VALUE_REGNUM (result
) = regnum
;
3556 i386_pseudo_register_read_into_value (gdbarch
, regcache
, regnum
, result
);
3562 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3563 int regnum
, const gdb_byte
*buf
)
3565 gdb_byte raw_buf
[I386_MAX_REGISTER_SIZE
];
3567 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3569 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
3572 regcache
->raw_read (fpnum
, raw_buf
);
3573 /* ... Modify ... (always little endian). */
3574 memcpy (raw_buf
, buf
, register_size (gdbarch
, regnum
));
3576 regcache
->raw_write (fpnum
, raw_buf
);
3580 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
3582 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3584 ULONGEST upper
, lower
;
3585 int size
= TYPE_LENGTH (builtin_type (gdbarch
)->builtin_data_ptr
);
3586 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
3588 /* New values from input value. */
3589 regnum
-= tdep
->bnd0_regnum
;
3590 lower
= extract_unsigned_integer (buf
, size
, byte_order
);
3591 upper
= extract_unsigned_integer (buf
+ size
, size
, byte_order
);
3593 /* Fetching register buffer. */
3594 regcache
->raw_read (I387_BND0R_REGNUM (tdep
) + regnum
,
3599 /* Set register bits. */
3600 memcpy (raw_buf
, &lower
, 8);
3601 memcpy (raw_buf
+ 8, &upper
, 8);
3603 regcache
->raw_write (I387_BND0R_REGNUM (tdep
) + regnum
, raw_buf
);
3605 else if (i386_k_regnum_p (gdbarch
, regnum
))
3607 regnum
-= tdep
->k0_regnum
;
3609 regcache
->raw_write (tdep
->k0_regnum
+ regnum
, buf
);
3611 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3613 regnum
-= tdep
->zmm0_regnum
;
3615 if (regnum
< num_lower_zmm_regs
)
3617 /* Write lower 128bits. */
3618 regcache
->raw_write (I387_XMM0_REGNUM (tdep
) + regnum
, buf
);
3619 /* Write upper 128bits. */
3620 regcache
->raw_write (I387_YMM0_REGNUM (tdep
) + regnum
, buf
+ 16);
3624 /* Write lower 128bits. */
3625 regcache
->raw_write (I387_XMM16_REGNUM (tdep
) + regnum
3626 - num_lower_zmm_regs
, buf
);
3627 /* Write upper 128bits. */
3628 regcache
->raw_write (I387_YMM16H_REGNUM (tdep
) + regnum
3629 - num_lower_zmm_regs
, buf
+ 16);
3631 /* Write upper 256bits. */
3632 regcache
->raw_write (tdep
->zmm0h_regnum
+ regnum
, buf
+ 32);
3634 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3636 regnum
-= tdep
->ymm0_regnum
;
3638 /* ... Write lower 128bits. */
3639 regcache
->raw_write (I387_XMM0_REGNUM (tdep
) + regnum
, buf
);
3640 /* ... Write upper 128bits. */
3641 regcache
->raw_write (tdep
->ymm0h_regnum
+ regnum
, buf
+ 16);
3643 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3645 regnum
-= tdep
->ymm16_regnum
;
3647 /* ... Write lower 128bits. */
3648 regcache
->raw_write (I387_XMM16_REGNUM (tdep
) + regnum
, buf
);
3649 /* ... Write upper 128bits. */
3650 regcache
->raw_write (tdep
->ymm16h_regnum
+ regnum
, buf
+ 16);
3652 else if (i386_word_regnum_p (gdbarch
, regnum
))
3654 int gpnum
= regnum
- tdep
->ax_regnum
;
3657 regcache
->raw_read (gpnum
, raw_buf
);
3658 /* ... Modify ... (always little endian). */
3659 memcpy (raw_buf
, buf
, 2);
3661 regcache
->raw_write (gpnum
, raw_buf
);
3663 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3665 int gpnum
= regnum
- tdep
->al_regnum
;
3667 /* Read ... We read both lower and upper registers. */
3668 regcache
->raw_read (gpnum
% 4, raw_buf
);
3669 /* ... Modify ... (always little endian). */
3671 memcpy (raw_buf
+ 1, buf
, 1);
3673 memcpy (raw_buf
, buf
, 1);
3675 regcache
->raw_write (gpnum
% 4, raw_buf
);
3678 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3682 /* Implement the 'ax_pseudo_register_collect' gdbarch method. */
3685 i386_ax_pseudo_register_collect (struct gdbarch
*gdbarch
,
3686 struct agent_expr
*ax
, int regnum
)
3688 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
3690 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3692 /* MMX to FPU register mapping depends on current TOS. Let's just
3693 not care and collect everything... */
3696 ax_reg_mask (ax
, I387_FSTAT_REGNUM (tdep
));
3697 for (i
= 0; i
< 8; i
++)
3698 ax_reg_mask (ax
, I387_ST0_REGNUM (tdep
) + i
);
3701 else if (i386_bnd_regnum_p (gdbarch
, regnum
))
3703 regnum
-= tdep
->bnd0_regnum
;
3704 ax_reg_mask (ax
, I387_BND0R_REGNUM (tdep
) + regnum
);
3707 else if (i386_k_regnum_p (gdbarch
, regnum
))
3709 regnum
-= tdep
->k0_regnum
;
3710 ax_reg_mask (ax
, tdep
->k0_regnum
+ regnum
);
3713 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3715 regnum
-= tdep
->zmm0_regnum
;
3716 if (regnum
< num_lower_zmm_regs
)
3718 ax_reg_mask (ax
, I387_XMM0_REGNUM (tdep
) + regnum
);
3719 ax_reg_mask (ax
, tdep
->ymm0h_regnum
+ regnum
);
3723 ax_reg_mask (ax
, I387_XMM16_REGNUM (tdep
) + regnum
3724 - num_lower_zmm_regs
);
3725 ax_reg_mask (ax
, I387_YMM16H_REGNUM (tdep
) + regnum
3726 - num_lower_zmm_regs
);
3728 ax_reg_mask (ax
, tdep
->zmm0h_regnum
+ regnum
);
3731 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3733 regnum
-= tdep
->ymm0_regnum
;
3734 ax_reg_mask (ax
, I387_XMM0_REGNUM (tdep
) + regnum
);
3735 ax_reg_mask (ax
, tdep
->ymm0h_regnum
+ regnum
);
3738 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3740 regnum
-= tdep
->ymm16_regnum
;
3741 ax_reg_mask (ax
, I387_XMM16_REGNUM (tdep
) + regnum
);
3742 ax_reg_mask (ax
, tdep
->ymm16h_regnum
+ regnum
);
3745 else if (i386_word_regnum_p (gdbarch
, regnum
))
3747 int gpnum
= regnum
- tdep
->ax_regnum
;
3749 ax_reg_mask (ax
, gpnum
);
3752 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3754 int gpnum
= regnum
- tdep
->al_regnum
;
3756 ax_reg_mask (ax
, gpnum
% 4);
3760 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3765 /* Return the register number of the register allocated by GCC after
3766 REGNUM, or -1 if there is no such register. */
3769 i386_next_regnum (int regnum
)
3771 /* GCC allocates the registers in the order:
3773 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
3775 Since storing a variable in %esp doesn't make any sense we return
3776 -1 for %ebp and for %esp itself. */
3777 static int next_regnum
[] =
3779 I386_EDX_REGNUM
, /* Slot for %eax. */
3780 I386_EBX_REGNUM
, /* Slot for %ecx. */
3781 I386_ECX_REGNUM
, /* Slot for %edx. */
3782 I386_ESI_REGNUM
, /* Slot for %ebx. */
3783 -1, -1, /* Slots for %esp and %ebp. */
3784 I386_EDI_REGNUM
, /* Slot for %esi. */
3785 I386_EBP_REGNUM
/* Slot for %edi. */
3788 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
3789 return next_regnum
[regnum
];
3794 /* Return nonzero if a value of type TYPE stored in register REGNUM
3795 needs any special handling. */
3798 i386_convert_register_p (struct gdbarch
*gdbarch
,
3799 int regnum
, struct type
*type
)
3801 int len
= TYPE_LENGTH (type
);
3803 /* Values may be spread across multiple registers. Most debugging
3804 formats aren't expressive enough to specify the locations, so
3805 some heuristics is involved. Right now we only handle types that
3806 have a length that is a multiple of the word size, since GCC
3807 doesn't seem to put any other types into registers. */
3808 if (len
> 4 && len
% 4 == 0)
3810 int last_regnum
= regnum
;
3814 last_regnum
= i386_next_regnum (last_regnum
);
3818 if (last_regnum
!= -1)
3822 return i387_convert_register_p (gdbarch
, regnum
, type
);
3825 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
3826 return its contents in TO. */
3829 i386_register_to_value (struct frame_info
*frame
, int regnum
,
3830 struct type
*type
, gdb_byte
*to
,
3831 int *optimizedp
, int *unavailablep
)
3833 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
3834 int len
= TYPE_LENGTH (type
);
3836 if (i386_fp_regnum_p (gdbarch
, regnum
))
3837 return i387_register_to_value (frame
, regnum
, type
, to
,
3838 optimizedp
, unavailablep
);
3840 /* Read a value spread across multiple registers. */
3842 gdb_assert (len
> 4 && len
% 4 == 0);
3846 gdb_assert (regnum
!= -1);
3847 gdb_assert (register_size (gdbarch
, regnum
) == 4);
3849 if (!get_frame_register_bytes (frame
, regnum
, 0,
3850 gdb::make_array_view (to
,
3851 register_size (gdbarch
,
3853 optimizedp
, unavailablep
))
3856 regnum
= i386_next_regnum (regnum
);
3861 *optimizedp
= *unavailablep
= 0;
3865 /* Write the contents FROM of a value of type TYPE into register
3866 REGNUM in frame FRAME. */
3869 i386_value_to_register (struct frame_info
*frame
, int regnum
,
3870 struct type
*type
, const gdb_byte
*from
)
3872 int len
= TYPE_LENGTH (type
);
3874 if (i386_fp_regnum_p (get_frame_arch (frame
), regnum
))
3876 i387_value_to_register (frame
, regnum
, type
, from
);
3880 /* Write a value spread across multiple registers. */
3882 gdb_assert (len
> 4 && len
% 4 == 0);
3886 gdb_assert (regnum
!= -1);
3887 gdb_assert (register_size (get_frame_arch (frame
), regnum
) == 4);
3889 put_frame_register (frame
, regnum
, from
);
3890 regnum
= i386_next_regnum (regnum
);
3896 /* Supply register REGNUM from the buffer specified by GREGS and LEN
3897 in the general-purpose register set REGSET to register cache
3898 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3901 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
3902 int regnum
, const void *gregs
, size_t len
)
3904 struct gdbarch
*gdbarch
= regcache
->arch ();
3905 const i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
3906 const gdb_byte
*regs
= (const gdb_byte
*) gregs
;
3909 gdb_assert (len
>= tdep
->sizeof_gregset
);
3911 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
3913 if ((regnum
== i
|| regnum
== -1)
3914 && tdep
->gregset_reg_offset
[i
] != -1)
3915 regcache
->raw_supply (i
, regs
+ tdep
->gregset_reg_offset
[i
]);
3919 /* Collect register REGNUM from the register cache REGCACHE and store
3920 it in the buffer specified by GREGS and LEN as described by the
3921 general-purpose register set REGSET. If REGNUM is -1, do this for
3922 all registers in REGSET. */
3925 i386_collect_gregset (const struct regset
*regset
,
3926 const struct regcache
*regcache
,
3927 int regnum
, void *gregs
, size_t len
)
3929 struct gdbarch
*gdbarch
= regcache
->arch ();
3930 const i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
3931 gdb_byte
*regs
= (gdb_byte
*) gregs
;
3934 gdb_assert (len
>= tdep
->sizeof_gregset
);
3936 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
3938 if ((regnum
== i
|| regnum
== -1)
3939 && tdep
->gregset_reg_offset
[i
] != -1)
3940 regcache
->raw_collect (i
, regs
+ tdep
->gregset_reg_offset
[i
]);
3944 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
3945 in the floating-point register set REGSET to register cache
3946 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3949 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
3950 int regnum
, const void *fpregs
, size_t len
)
3952 struct gdbarch
*gdbarch
= regcache
->arch ();
3953 const i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
3955 if (len
== I387_SIZEOF_FXSAVE
)
3957 i387_supply_fxsave (regcache
, regnum
, fpregs
);
3961 gdb_assert (len
>= tdep
->sizeof_fpregset
);
3962 i387_supply_fsave (regcache
, regnum
, fpregs
);
3965 /* Collect register REGNUM from the register cache REGCACHE and store
3966 it in the buffer specified by FPREGS and LEN as described by the
3967 floating-point register set REGSET. If REGNUM is -1, do this for
3968 all registers in REGSET. */
3971 i386_collect_fpregset (const struct regset
*regset
,
3972 const struct regcache
*regcache
,
3973 int regnum
, void *fpregs
, size_t len
)
3975 struct gdbarch
*gdbarch
= regcache
->arch ();
3976 const i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
3978 if (len
== I387_SIZEOF_FXSAVE
)
3980 i387_collect_fxsave (regcache
, regnum
, fpregs
);
3984 gdb_assert (len
>= tdep
->sizeof_fpregset
);
3985 i387_collect_fsave (regcache
, regnum
, fpregs
);
3988 /* Register set definitions. */
3990 const struct regset i386_gregset
=
3992 NULL
, i386_supply_gregset
, i386_collect_gregset
3995 const struct regset i386_fpregset
=
3997 NULL
, i386_supply_fpregset
, i386_collect_fpregset
4000 /* Default iterator over core file register note sections. */
4003 i386_iterate_over_regset_sections (struct gdbarch
*gdbarch
,
4004 iterate_over_regset_sections_cb
*cb
,
4006 const struct regcache
*regcache
)
4008 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
4010 cb (".reg", tdep
->sizeof_gregset
, tdep
->sizeof_gregset
, &i386_gregset
, NULL
,
4012 if (tdep
->sizeof_fpregset
)
4013 cb (".reg2", tdep
->sizeof_fpregset
, tdep
->sizeof_fpregset
, tdep
->fpregset
,
4018 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
4021 i386_pe_skip_trampoline_code (struct frame_info
*frame
,
4022 CORE_ADDR pc
, char *name
)
4024 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
4025 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4028 if (pc
&& read_memory_unsigned_integer (pc
, 2, byte_order
) == 0x25ff)
4030 unsigned long indirect
=
4031 read_memory_unsigned_integer (pc
+ 2, 4, byte_order
);
4032 struct minimal_symbol
*indsym
=
4033 indirect
? lookup_minimal_symbol_by_pc (indirect
).minsym
: 0;
4034 const char *symname
= indsym
? indsym
->linkage_name () : 0;
4038 if (startswith (symname
, "__imp_")
4039 || startswith (symname
, "_imp_"))
4041 read_memory_unsigned_integer (indirect
, 4, byte_order
);
4044 return 0; /* Not a trampoline. */
4048 /* Return whether the THIS_FRAME corresponds to a sigtramp
4052 i386_sigtramp_p (struct frame_info
*this_frame
)
4054 CORE_ADDR pc
= get_frame_pc (this_frame
);
4057 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
4058 return (name
&& strcmp ("_sigtramp", name
) == 0);
4062 /* We have two flavours of disassembly. The machinery on this page
4063 deals with switching between those. */
4066 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
4068 gdb_assert (disassembly_flavor
== att_flavor
4069 || disassembly_flavor
== intel_flavor
);
4071 info
->disassembler_options
= disassembly_flavor
;
4073 return default_print_insn (pc
, info
);
4077 /* There are a few i386 architecture variants that differ only
4078 slightly from the generic i386 target. For now, we don't give them
4079 their own source file, but include them here. As a consequence,
4080 they'll always be included. */
4082 /* System V Release 4 (SVR4). */
4084 /* Return whether THIS_FRAME corresponds to a SVR4 sigtramp
4088 i386_svr4_sigtramp_p (struct frame_info
*this_frame
)
4090 CORE_ADDR pc
= get_frame_pc (this_frame
);
4093 /* The origin of these symbols is currently unknown. */
4094 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
4095 return (name
&& (strcmp ("_sigreturn", name
) == 0
4096 || strcmp ("sigvechandler", name
) == 0));
4099 /* Assuming THIS_FRAME is for a SVR4 sigtramp routine, return the
4100 address of the associated sigcontext (ucontext) structure. */
4103 i386_svr4_sigcontext_addr (struct frame_info
*this_frame
)
4105 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
4106 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4110 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
4111 sp
= extract_unsigned_integer (buf
, 4, byte_order
);
4113 return read_memory_unsigned_integer (sp
+ 8, 4, byte_order
);
4118 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
4122 i386_stap_is_single_operand (struct gdbarch
*gdbarch
, const char *s
)
4124 return (*s
== '$' /* Literal number. */
4125 || (isdigit (*s
) && s
[1] == '(' && s
[2] == '%') /* Displacement. */
4126 || (*s
== '(' && s
[1] == '%') /* Register indirection. */
4127 || (*s
== '%' && isalpha (s
[1]))); /* Register access. */
4130 /* Helper function for i386_stap_parse_special_token.
4132 This function parses operands of the form `-8+3+1(%rbp)', which
4133 must be interpreted as `*(-8 + 3 - 1 + (void *) $eax)'.
4135 Return true if the operand was parsed successfully, false
4138 static expr::operation_up
4139 i386_stap_parse_special_token_triplet (struct gdbarch
*gdbarch
,
4140 struct stap_parse_info
*p
)
4142 const char *s
= p
->arg
;
4144 if (isdigit (*s
) || *s
== '-' || *s
== '+')
4148 long displacements
[3];
4153 got_minus
[0] = false;
4159 got_minus
[0] = true;
4162 if (!isdigit ((unsigned char) *s
))
4165 displacements
[0] = strtol (s
, &endp
, 10);
4168 if (*s
!= '+' && *s
!= '-')
4170 /* We are not dealing with a triplet. */
4174 got_minus
[1] = false;
4180 got_minus
[1] = true;
4183 if (!isdigit ((unsigned char) *s
))
4186 displacements
[1] = strtol (s
, &endp
, 10);
4189 if (*s
!= '+' && *s
!= '-')
4191 /* We are not dealing with a triplet. */
4195 got_minus
[2] = false;
4201 got_minus
[2] = true;
4204 if (!isdigit ((unsigned char) *s
))
4207 displacements
[2] = strtol (s
, &endp
, 10);
4210 if (*s
!= '(' || s
[1] != '%')
4216 while (isalnum (*s
))
4222 len
= s
- start
- 1;
4223 std::string
regname (start
, len
);
4225 if (user_reg_map_name_to_regnum (gdbarch
, regname
.c_str (), len
) == -1)
4226 error (_("Invalid register name `%s' on expression `%s'."),
4227 regname
.c_str (), p
->saved_arg
);
4230 for (i
= 0; i
< 3; i
++)
4232 LONGEST this_val
= displacements
[i
];
4234 this_val
= -this_val
;
4240 using namespace expr
;
4242 struct type
*long_type
= builtin_type (gdbarch
)->builtin_long
;
4244 = make_operation
<long_const_operation
> (long_type
, value
);
4247 = make_operation
<register_operation
> (std::move (regname
));
4248 struct type
*void_ptr
= builtin_type (gdbarch
)->builtin_data_ptr
;
4249 reg
= make_operation
<unop_cast_operation
> (std::move (reg
), void_ptr
);
4252 = make_operation
<add_operation
> (std::move (reg
), std::move (offset
));
4253 struct type
*arg_ptr_type
= lookup_pointer_type (p
->arg_type
);
4254 sum
= make_operation
<unop_cast_operation
> (std::move (sum
),
4256 return make_operation
<unop_ind_operation
> (std::move (sum
));
4262 /* Helper function for i386_stap_parse_special_token.
4264 This function parses operands of the form `register base +
4265 (register index * size) + offset', as represented in
4266 `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4268 Return true if the operand was parsed successfully, false
4271 static expr::operation_up
4272 i386_stap_parse_special_token_three_arg_disp (struct gdbarch
*gdbarch
,
4273 struct stap_parse_info
*p
)
4275 const char *s
= p
->arg
;
4277 if (isdigit (*s
) || *s
== '(' || *s
== '-' || *s
== '+')
4279 bool offset_minus
= false;
4281 bool size_minus
= false;
4292 offset_minus
= true;
4295 if (offset_minus
&& !isdigit (*s
))
4302 offset
= strtol (s
, &endp
, 10);
4306 if (*s
!= '(' || s
[1] != '%')
4312 while (isalnum (*s
))
4315 if (*s
!= ',' || s
[1] != '%')
4318 len_base
= s
- start
;
4319 std::string
base (start
, len_base
);
4321 if (user_reg_map_name_to_regnum (gdbarch
, base
.c_str (), len_base
) == -1)
4322 error (_("Invalid register name `%s' on expression `%s'."),
4323 base
.c_str (), p
->saved_arg
);
4328 while (isalnum (*s
))
4331 len_index
= s
- start
;
4332 std::string
index (start
, len_index
);
4334 if (user_reg_map_name_to_regnum (gdbarch
, index
.c_str (),
4336 error (_("Invalid register name `%s' on expression `%s'."),
4337 index
.c_str (), p
->saved_arg
);
4339 if (*s
!= ',' && *s
!= ')')
4355 size
= strtol (s
, &endp
, 10);
4365 using namespace expr
;
4367 struct type
*long_type
= builtin_type (gdbarch
)->builtin_long
;
4368 operation_up reg
= make_operation
<register_operation
> (std::move (base
));
4375 = make_operation
<long_const_operation
> (long_type
, offset
);
4376 reg
= make_operation
<add_operation
> (std::move (reg
),
4380 operation_up ind_reg
4381 = make_operation
<register_operation
> (std::move (index
));
4388 = make_operation
<long_const_operation
> (long_type
, size
);
4389 ind_reg
= make_operation
<mul_operation
> (std::move (ind_reg
),
4394 = make_operation
<add_operation
> (std::move (reg
),
4395 std::move (ind_reg
));
4397 struct type
*arg_ptr_type
= lookup_pointer_type (p
->arg_type
);
4398 sum
= make_operation
<unop_cast_operation
> (std::move (sum
),
4400 return make_operation
<unop_ind_operation
> (std::move (sum
));
4406 /* Implementation of `gdbarch_stap_parse_special_token', as defined in
4410 i386_stap_parse_special_token (struct gdbarch
*gdbarch
,
4411 struct stap_parse_info
*p
)
4413 /* The special tokens to be parsed here are:
4415 - `register base + (register index * size) + offset', as represented
4416 in `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4418 - Operands of the form `-8+3+1(%rbp)', which must be interpreted as
4419 `*(-8 + 3 - 1 + (void *) $eax)'. */
4421 expr::operation_up result
4422 = i386_stap_parse_special_token_triplet (gdbarch
, p
);
4424 if (result
== nullptr)
4425 result
= i386_stap_parse_special_token_three_arg_disp (gdbarch
, p
);
4430 /* Implementation of 'gdbarch_stap_adjust_register', as defined in
4434 i386_stap_adjust_register (struct gdbarch
*gdbarch
, struct stap_parse_info
*p
,
4435 const std::string
®name
, int regnum
)
4437 static const std::unordered_set
<std::string
> reg_assoc
4438 = { "ax", "bx", "cx", "dx",
4439 "si", "di", "bp", "sp" };
4441 /* If we are dealing with a register whose size is less than the size
4442 specified by the "[-]N@" prefix, and it is one of the registers that
4443 we know has an extended variant available, then use the extended
4444 version of the register instead. */
4445 if (register_size (gdbarch
, regnum
) < TYPE_LENGTH (p
->arg_type
)
4446 && reg_assoc
.find (regname
) != reg_assoc
.end ())
4447 return "e" + regname
;
4449 /* Otherwise, just use the requested register. */
4455 /* gdbarch gnu_triplet_regexp method. Both arches are acceptable as GDB always
4456 also supplies -m64 or -m32 by gdbarch_gcc_target_options. */
4459 i386_gnu_triplet_regexp (struct gdbarch
*gdbarch
)
4461 return "(x86_64|i.86)";
4466 /* Implement the "in_indirect_branch_thunk" gdbarch function. */
4469 i386_in_indirect_branch_thunk (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
4471 return x86_in_indirect_branch_thunk (pc
, i386_register_names
,
4472 I386_EAX_REGNUM
, I386_EIP_REGNUM
);
4478 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
4480 static const char *const stap_integer_prefixes
[] = { "$", NULL
};
4481 static const char *const stap_register_prefixes
[] = { "%", NULL
};
4482 static const char *const stap_register_indirection_prefixes
[] = { "(",
4484 static const char *const stap_register_indirection_suffixes
[] = { ")",
4487 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
4488 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
4490 /* Registering SystemTap handlers. */
4491 set_gdbarch_stap_integer_prefixes (gdbarch
, stap_integer_prefixes
);
4492 set_gdbarch_stap_register_prefixes (gdbarch
, stap_register_prefixes
);
4493 set_gdbarch_stap_register_indirection_prefixes (gdbarch
,
4494 stap_register_indirection_prefixes
);
4495 set_gdbarch_stap_register_indirection_suffixes (gdbarch
,
4496 stap_register_indirection_suffixes
);
4497 set_gdbarch_stap_is_single_operand (gdbarch
,
4498 i386_stap_is_single_operand
);
4499 set_gdbarch_stap_parse_special_token (gdbarch
,
4500 i386_stap_parse_special_token
);
4501 set_gdbarch_stap_adjust_register (gdbarch
,
4502 i386_stap_adjust_register
);
4504 set_gdbarch_in_indirect_branch_thunk (gdbarch
,
4505 i386_in_indirect_branch_thunk
);
4508 /* System V Release 4 (SVR4). */
4511 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
4513 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
4515 /* System V Release 4 uses ELF. */
4516 i386_elf_init_abi (info
, gdbarch
);
4518 /* System V Release 4 has shared libraries. */
4519 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
4521 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
4522 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
4523 tdep
->sc_pc_offset
= 36 + 14 * 4;
4524 tdep
->sc_sp_offset
= 36 + 17 * 4;
4526 tdep
->jb_pc_offset
= 20;
4531 /* i386 register groups. In addition to the normal groups, add "mmx"
4534 static const reggroup
*i386_sse_reggroup
;
4535 static const reggroup
*i386_mmx_reggroup
;
4538 i386_init_reggroups (void)
4540 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
4541 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
4545 i386_add_reggroups (struct gdbarch
*gdbarch
)
4547 reggroup_add (gdbarch
, i386_sse_reggroup
);
4548 reggroup_add (gdbarch
, i386_mmx_reggroup
);
4552 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
4553 const struct reggroup
*group
)
4555 const i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
4556 int fp_regnum_p
, mmx_regnum_p
, xmm_regnum_p
, mxcsr_regnum_p
,
4557 ymm_regnum_p
, ymmh_regnum_p
, ymm_avx512_regnum_p
, ymmh_avx512_regnum_p
,
4558 bndr_regnum_p
, bnd_regnum_p
, zmm_regnum_p
, zmmh_regnum_p
,
4559 mpx_ctrl_regnum_p
, xmm_avx512_regnum_p
,
4560 avx512_p
, avx_p
, sse_p
, pkru_regnum_p
;
4562 /* Don't include pseudo registers, except for MMX, in any register
4564 if (i386_byte_regnum_p (gdbarch
, regnum
))
4567 if (i386_word_regnum_p (gdbarch
, regnum
))
4570 if (i386_dword_regnum_p (gdbarch
, regnum
))
4573 mmx_regnum_p
= i386_mmx_regnum_p (gdbarch
, regnum
);
4574 if (group
== i386_mmx_reggroup
)
4575 return mmx_regnum_p
;
4577 pkru_regnum_p
= i386_pkru_regnum_p(gdbarch
, regnum
);
4578 xmm_regnum_p
= i386_xmm_regnum_p (gdbarch
, regnum
);
4579 xmm_avx512_regnum_p
= i386_xmm_avx512_regnum_p (gdbarch
, regnum
);
4580 mxcsr_regnum_p
= i386_mxcsr_regnum_p (gdbarch
, regnum
);
4581 if (group
== i386_sse_reggroup
)
4582 return xmm_regnum_p
|| xmm_avx512_regnum_p
|| mxcsr_regnum_p
;
4584 ymm_regnum_p
= i386_ymm_regnum_p (gdbarch
, regnum
);
4585 ymm_avx512_regnum_p
= i386_ymm_avx512_regnum_p (gdbarch
, regnum
);
4586 zmm_regnum_p
= i386_zmm_regnum_p (gdbarch
, regnum
);
4588 avx512_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4589 == X86_XSTATE_AVX_AVX512_MASK
);
4590 avx_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4591 == X86_XSTATE_AVX_MASK
) && !avx512_p
;
4592 sse_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4593 == X86_XSTATE_SSE_MASK
) && !avx512_p
&& ! avx_p
;
4595 if (group
== vector_reggroup
)
4596 return (mmx_regnum_p
4597 || (zmm_regnum_p
&& avx512_p
)
4598 || ((ymm_regnum_p
|| ymm_avx512_regnum_p
) && avx_p
)
4599 || ((xmm_regnum_p
|| xmm_avx512_regnum_p
) && sse_p
)
4602 fp_regnum_p
= (i386_fp_regnum_p (gdbarch
, regnum
)
4603 || i386_fpc_regnum_p (gdbarch
, regnum
));
4604 if (group
== float_reggroup
)
4607 /* For "info reg all", don't include upper YMM registers nor XMM
4608 registers when AVX is supported. */
4609 ymmh_regnum_p
= i386_ymmh_regnum_p (gdbarch
, regnum
);
4610 ymmh_avx512_regnum_p
= i386_ymmh_avx512_regnum_p (gdbarch
, regnum
);
4611 zmmh_regnum_p
= i386_zmmh_regnum_p (gdbarch
, regnum
);
4612 if (group
== all_reggroup
4613 && (((xmm_regnum_p
|| xmm_avx512_regnum_p
) && !sse_p
)
4614 || ((ymm_regnum_p
|| ymm_avx512_regnum_p
) && !avx_p
)
4616 || ymmh_avx512_regnum_p
4620 bnd_regnum_p
= i386_bnd_regnum_p (gdbarch
, regnum
);
4621 if (group
== all_reggroup
4622 && ((bnd_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4623 return bnd_regnum_p
;
4625 bndr_regnum_p
= i386_bndr_regnum_p (gdbarch
, regnum
);
4626 if (group
== all_reggroup
4627 && ((bndr_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4630 mpx_ctrl_regnum_p
= i386_mpx_ctrl_regnum_p (gdbarch
, regnum
);
4631 if (group
== all_reggroup
4632 && ((mpx_ctrl_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4633 return mpx_ctrl_regnum_p
;
4635 if (group
== general_reggroup
)
4636 return (!fp_regnum_p
4640 && !xmm_avx512_regnum_p
4643 && !ymm_avx512_regnum_p
4644 && !ymmh_avx512_regnum_p
4647 && !mpx_ctrl_regnum_p
4652 return default_register_reggroup_p (gdbarch
, regnum
, group
);
4656 /* Get the ARGIth function argument for the current function. */
4659 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
4662 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
4663 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4664 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
4665 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4, byte_order
);
4668 #define PREFIX_REPZ 0x01
4669 #define PREFIX_REPNZ 0x02
4670 #define PREFIX_LOCK 0x04
4671 #define PREFIX_DATA 0x08
4672 #define PREFIX_ADDR 0x10
4684 /* i386 arith/logic operations */
4697 struct i386_record_s
4699 struct gdbarch
*gdbarch
;
4700 struct regcache
*regcache
;
4701 CORE_ADDR orig_addr
;
4707 uint8_t mod
, reg
, rm
;
4716 /* Parse the "modrm" part of the memory address irp->addr points at.
4717 Returns -1 if something goes wrong, 0 otherwise. */
4720 i386_record_modrm (struct i386_record_s
*irp
)
4722 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4724 if (record_read_memory (gdbarch
, irp
->addr
, &irp
->modrm
, 1))
4728 irp
->mod
= (irp
->modrm
>> 6) & 3;
4729 irp
->reg
= (irp
->modrm
>> 3) & 7;
4730 irp
->rm
= irp
->modrm
& 7;
4735 /* Extract the memory address that the current instruction writes to,
4736 and return it in *ADDR. Return -1 if something goes wrong. */
4739 i386_record_lea_modrm_addr (struct i386_record_s
*irp
, uint64_t *addr
)
4741 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4742 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4747 if (irp
->aflag
|| irp
->regmap
[X86_RECORD_R8_REGNUM
])
4754 uint8_t base
= irp
->rm
;
4759 if (record_read_memory (gdbarch
, irp
->addr
, &byte
, 1))
4762 scale
= (byte
>> 6) & 3;
4763 index
= ((byte
>> 3) & 7) | irp
->rex_x
;
4771 if ((base
& 7) == 5)
4774 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 4))
4777 *addr
= extract_signed_integer (buf
, 4, byte_order
);
4778 if (irp
->regmap
[X86_RECORD_R8_REGNUM
] && !havesib
)
4779 *addr
+= irp
->addr
+ irp
->rip_offset
;
4783 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 1))
4786 *addr
= (int8_t) buf
[0];
4789 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 4))
4791 *addr
= extract_signed_integer (buf
, 4, byte_order
);
4799 if (base
== 4 && irp
->popl_esp_hack
)
4800 *addr
+= irp
->popl_esp_hack
;
4801 regcache_raw_read_unsigned (irp
->regcache
, irp
->regmap
[base
],
4804 if (irp
->aflag
== 2)
4809 *addr
= (uint32_t) (offset64
+ *addr
);
4811 if (havesib
&& (index
!= 4 || scale
!= 0))
4813 regcache_raw_read_unsigned (irp
->regcache
, irp
->regmap
[index
],
4815 if (irp
->aflag
== 2)
4816 *addr
+= offset64
<< scale
;
4818 *addr
= (uint32_t) (*addr
+ (offset64
<< scale
));
4823 /* Since we are in 64-bit mode with ADDR32 prefix, zero-extend
4824 address from 32-bit to 64-bit. */
4825 *addr
= (uint32_t) *addr
;
4836 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 2))
4839 *addr
= extract_signed_integer (buf
, 2, byte_order
);
4845 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 1))
4848 *addr
= (int8_t) buf
[0];
4851 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 2))
4854 *addr
= extract_signed_integer (buf
, 2, byte_order
);
4861 regcache_raw_read_unsigned (irp
->regcache
,
4862 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4864 *addr
= (uint32_t) (*addr
+ offset64
);
4865 regcache_raw_read_unsigned (irp
->regcache
,
4866 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4868 *addr
= (uint32_t) (*addr
+ offset64
);
4871 regcache_raw_read_unsigned (irp
->regcache
,
4872 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4874 *addr
= (uint32_t) (*addr
+ offset64
);
4875 regcache_raw_read_unsigned (irp
->regcache
,
4876 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4878 *addr
= (uint32_t) (*addr
+ offset64
);
4881 regcache_raw_read_unsigned (irp
->regcache
,
4882 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4884 *addr
= (uint32_t) (*addr
+ offset64
);
4885 regcache_raw_read_unsigned (irp
->regcache
,
4886 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4888 *addr
= (uint32_t) (*addr
+ offset64
);
4891 regcache_raw_read_unsigned (irp
->regcache
,
4892 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4894 *addr
= (uint32_t) (*addr
+ offset64
);
4895 regcache_raw_read_unsigned (irp
->regcache
,
4896 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4898 *addr
= (uint32_t) (*addr
+ offset64
);
4901 regcache_raw_read_unsigned (irp
->regcache
,
4902 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4904 *addr
= (uint32_t) (*addr
+ offset64
);
4907 regcache_raw_read_unsigned (irp
->regcache
,
4908 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4910 *addr
= (uint32_t) (*addr
+ offset64
);
4913 regcache_raw_read_unsigned (irp
->regcache
,
4914 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4916 *addr
= (uint32_t) (*addr
+ offset64
);
4919 regcache_raw_read_unsigned (irp
->regcache
,
4920 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4922 *addr
= (uint32_t) (*addr
+ offset64
);
4932 /* Record the address and contents of the memory that will be changed
4933 by the current instruction. Return -1 if something goes wrong, 0
4937 i386_record_lea_modrm (struct i386_record_s
*irp
)
4939 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4942 if (irp
->override
>= 0)
4944 if (record_full_memory_query
)
4947 Process record ignores the memory change of instruction at address %s\n\
4948 because it can't get the value of the segment register.\n\
4949 Do you want to stop the program?"),
4950 paddress (gdbarch
, irp
->orig_addr
)))
4957 if (i386_record_lea_modrm_addr (irp
, &addr
))
4960 if (record_full_arch_list_add_mem (addr
, 1 << irp
->ot
))
4966 /* Record the effects of a push operation. Return -1 if something
4967 goes wrong, 0 otherwise. */
4970 i386_record_push (struct i386_record_s
*irp
, int size
)
4974 if (record_full_arch_list_add_reg (irp
->regcache
,
4975 irp
->regmap
[X86_RECORD_RESP_REGNUM
]))
4977 regcache_raw_read_unsigned (irp
->regcache
,
4978 irp
->regmap
[X86_RECORD_RESP_REGNUM
],
4980 if (record_full_arch_list_add_mem ((CORE_ADDR
) addr
- size
, size
))
4987 /* Defines contents to record. */
4988 #define I386_SAVE_FPU_REGS 0xfffd
4989 #define I386_SAVE_FPU_ENV 0xfffe
4990 #define I386_SAVE_FPU_ENV_REG_STACK 0xffff
4992 /* Record the values of the floating point registers which will be
4993 changed by the current instruction. Returns -1 if something is
4994 wrong, 0 otherwise. */
4996 static int i386_record_floats (struct gdbarch
*gdbarch
,
4997 struct i386_record_s
*ir
,
5000 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
5003 /* Oza: Because of floating point insn push/pop of fpu stack is going to
5004 happen. Currently we store st0-st7 registers, but we need not store all
5005 registers all the time, in future we use ftag register and record only
5006 those who are not marked as an empty. */
5008 if (I386_SAVE_FPU_REGS
== iregnum
)
5010 for (i
= I387_ST0_REGNUM (tdep
); i
<= I387_ST0_REGNUM (tdep
) + 7; i
++)
5012 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
5016 else if (I386_SAVE_FPU_ENV
== iregnum
)
5018 for (i
= I387_FCTRL_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
5020 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
5024 else if (I386_SAVE_FPU_ENV_REG_STACK
== iregnum
)
5026 for (i
= I387_ST0_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
5027 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
5030 else if ((iregnum
>= I387_ST0_REGNUM (tdep
)) &&
5031 (iregnum
<= I387_FOP_REGNUM (tdep
)))
5033 if (record_full_arch_list_add_reg (ir
->regcache
,iregnum
))
5038 /* Parameter error. */
5041 if(I386_SAVE_FPU_ENV
!= iregnum
)
5043 for (i
= I387_FCTRL_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
5045 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
5052 /* Parse the current instruction, and record the values of the
5053 registers and memory that will be changed by the current
5054 instruction. Returns -1 if something goes wrong, 0 otherwise. */
5056 #define I386_RECORD_FULL_ARCH_LIST_ADD_REG(regnum) \
5057 record_full_arch_list_add_reg (ir.regcache, ir.regmap[(regnum)])
5060 i386_process_record (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
5061 CORE_ADDR input_addr
)
5063 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
5069 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
5070 struct i386_record_s ir
;
5071 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (gdbarch
);
5075 memset (&ir
, 0, sizeof (struct i386_record_s
));
5076 ir
.regcache
= regcache
;
5077 ir
.addr
= input_addr
;
5078 ir
.orig_addr
= input_addr
;
5082 ir
.popl_esp_hack
= 0;
5083 ir
.regmap
= tdep
->record_regmap
;
5084 ir
.gdbarch
= gdbarch
;
5086 if (record_debug
> 1)
5087 gdb_printf (gdb_stdlog
, "Process record: i386_process_record "
5089 paddress (gdbarch
, ir
.addr
));
5094 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
5097 switch (opcode8
) /* Instruction prefixes */
5099 case REPE_PREFIX_OPCODE
:
5100 prefixes
|= PREFIX_REPZ
;
5102 case REPNE_PREFIX_OPCODE
:
5103 prefixes
|= PREFIX_REPNZ
;
5105 case LOCK_PREFIX_OPCODE
:
5106 prefixes
|= PREFIX_LOCK
;
5108 case CS_PREFIX_OPCODE
:
5109 ir
.override
= X86_RECORD_CS_REGNUM
;
5111 case SS_PREFIX_OPCODE
:
5112 ir
.override
= X86_RECORD_SS_REGNUM
;
5114 case DS_PREFIX_OPCODE
:
5115 ir
.override
= X86_RECORD_DS_REGNUM
;
5117 case ES_PREFIX_OPCODE
:
5118 ir
.override
= X86_RECORD_ES_REGNUM
;
5120 case FS_PREFIX_OPCODE
:
5121 ir
.override
= X86_RECORD_FS_REGNUM
;
5123 case GS_PREFIX_OPCODE
:
5124 ir
.override
= X86_RECORD_GS_REGNUM
;
5126 case DATA_PREFIX_OPCODE
:
5127 prefixes
|= PREFIX_DATA
;
5129 case ADDR_PREFIX_OPCODE
:
5130 prefixes
|= PREFIX_ADDR
;
5132 case 0x40: /* i386 inc %eax */
5133 case 0x41: /* i386 inc %ecx */
5134 case 0x42: /* i386 inc %edx */
5135 case 0x43: /* i386 inc %ebx */
5136 case 0x44: /* i386 inc %esp */
5137 case 0x45: /* i386 inc %ebp */
5138 case 0x46: /* i386 inc %esi */
5139 case 0x47: /* i386 inc %edi */
5140 case 0x48: /* i386 dec %eax */
5141 case 0x49: /* i386 dec %ecx */
5142 case 0x4a: /* i386 dec %edx */
5143 case 0x4b: /* i386 dec %ebx */
5144 case 0x4c: /* i386 dec %esp */
5145 case 0x4d: /* i386 dec %ebp */
5146 case 0x4e: /* i386 dec %esi */
5147 case 0x4f: /* i386 dec %edi */
5148 if (ir
.regmap
[X86_RECORD_R8_REGNUM
]) /* 64 bit target */
5151 rex_w
= (opcode8
>> 3) & 1;
5152 rex_r
= (opcode8
& 0x4) << 1;
5153 ir
.rex_x
= (opcode8
& 0x2) << 2;
5154 ir
.rex_b
= (opcode8
& 0x1) << 3;
5156 else /* 32 bit target */
5165 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && rex_w
== 1)
5171 if (prefixes
& PREFIX_DATA
)
5174 if (prefixes
& PREFIX_ADDR
)
5176 else if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5179 /* Now check op code. */
5180 opcode
= (uint32_t) opcode8
;
5185 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
5188 opcode
= (uint32_t) opcode8
| 0x0f00;
5192 case 0x00: /* arith & logic */
5240 if (((opcode
>> 3) & 7) != OP_CMPL
)
5242 if ((opcode
& 1) == 0)
5245 ir
.ot
= ir
.dflag
+ OT_WORD
;
5247 switch ((opcode
>> 1) & 3)
5249 case 0: /* OP Ev, Gv */
5250 if (i386_record_modrm (&ir
))
5254 if (i386_record_lea_modrm (&ir
))
5260 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5262 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5265 case 1: /* OP Gv, Ev */
5266 if (i386_record_modrm (&ir
))
5269 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5271 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5273 case 2: /* OP A, Iv */
5274 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5278 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5281 case 0x80: /* GRP1 */
5285 if (i386_record_modrm (&ir
))
5288 if (ir
.reg
!= OP_CMPL
)
5290 if ((opcode
& 1) == 0)
5293 ir
.ot
= ir
.dflag
+ OT_WORD
;
5300 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5301 if (i386_record_lea_modrm (&ir
))
5305 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
5307 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5310 case 0x40: /* inc */
5319 case 0x48: /* dec */
5328 I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode
& 7);
5329 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5332 case 0xf6: /* GRP3 */
5334 if ((opcode
& 1) == 0)
5337 ir
.ot
= ir
.dflag
+ OT_WORD
;
5338 if (i386_record_modrm (&ir
))
5341 if (ir
.mod
!= 3 && ir
.reg
== 0)
5342 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5347 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5353 if (i386_record_lea_modrm (&ir
))
5359 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5361 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5363 if (ir
.reg
== 3) /* neg */
5364 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5370 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5371 if (ir
.ot
!= OT_BYTE
)
5372 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5373 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5377 opcode
= opcode
<< 8 | ir
.modrm
;
5383 case 0xfe: /* GRP4 */
5384 case 0xff: /* GRP5 */
5385 if (i386_record_modrm (&ir
))
5387 if (ir
.reg
>= 2 && opcode
== 0xfe)
5390 opcode
= opcode
<< 8 | ir
.modrm
;
5397 if ((opcode
& 1) == 0)
5400 ir
.ot
= ir
.dflag
+ OT_WORD
;
5403 if (i386_record_lea_modrm (&ir
))
5409 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5411 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5413 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5416 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5418 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5420 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5423 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
5424 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5426 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5430 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5433 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5435 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5440 opcode
= opcode
<< 8 | ir
.modrm
;
5446 case 0x84: /* test */
5450 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5453 case 0x98: /* CWDE/CBW */
5454 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5457 case 0x99: /* CDQ/CWD */
5458 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5459 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5462 case 0x0faf: /* imul */
5465 ir
.ot
= ir
.dflag
+ OT_WORD
;
5466 if (i386_record_modrm (&ir
))
5469 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5470 else if (opcode
== 0x6b)
5473 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5475 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5476 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5479 case 0x0fc0: /* xadd */
5481 if ((opcode
& 1) == 0)
5484 ir
.ot
= ir
.dflag
+ OT_WORD
;
5485 if (i386_record_modrm (&ir
))
5490 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5492 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5493 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5495 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5499 if (i386_record_lea_modrm (&ir
))
5501 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5503 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5505 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5508 case 0x0fb0: /* cmpxchg */
5510 if ((opcode
& 1) == 0)
5513 ir
.ot
= ir
.dflag
+ OT_WORD
;
5514 if (i386_record_modrm (&ir
))
5519 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5520 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5522 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5526 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5527 if (i386_record_lea_modrm (&ir
))
5530 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5533 case 0x0fc7: /* cmpxchg8b / rdrand / rdseed */
5534 if (i386_record_modrm (&ir
))
5538 /* rdrand and rdseed use the 3 bits of the REG field of ModR/M as
5539 an extended opcode. rdrand has bits 110 (/6) and rdseed
5540 has bits 111 (/7). */
5541 if (ir
.reg
== 6 || ir
.reg
== 7)
5543 /* The storage register is described by the 3 R/M bits, but the
5544 REX.B prefix may be used to give access to registers
5545 R8~R15. In this case ir.rex_b + R/M will give us the register
5546 in the range R8~R15.
5548 REX.W may also be used to access 64-bit registers, but we
5549 already record entire registers and not just partial bits
5551 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rex_b
+ ir
.rm
);
5552 /* These instructions also set conditional bits. */
5553 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5558 /* We don't handle this particular instruction yet. */
5560 opcode
= opcode
<< 8 | ir
.modrm
;
5564 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5565 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5566 if (i386_record_lea_modrm (&ir
))
5568 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5571 case 0x50: /* push */
5581 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5583 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5587 case 0x06: /* push es */
5588 case 0x0e: /* push cs */
5589 case 0x16: /* push ss */
5590 case 0x1e: /* push ds */
5591 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5596 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5600 case 0x0fa0: /* push fs */
5601 case 0x0fa8: /* push gs */
5602 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5607 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5611 case 0x60: /* pusha */
5612 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5617 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 4)))
5621 case 0x58: /* pop */
5629 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5630 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 0x7) | ir
.rex_b
);
5633 case 0x61: /* popa */
5634 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5639 for (regnum
= X86_RECORD_REAX_REGNUM
;
5640 regnum
<= X86_RECORD_REDI_REGNUM
;
5642 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5645 case 0x8f: /* pop */
5646 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5647 ir
.ot
= ir
.dflag
? OT_QUAD
: OT_WORD
;
5649 ir
.ot
= ir
.dflag
+ OT_WORD
;
5650 if (i386_record_modrm (&ir
))
5653 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
5656 ir
.popl_esp_hack
= 1 << ir
.ot
;
5657 if (i386_record_lea_modrm (&ir
))
5660 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5663 case 0xc8: /* enter */
5664 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
5665 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5667 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5671 case 0xc9: /* leave */
5672 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5673 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
5676 case 0x07: /* pop es */
5677 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5682 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5683 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_ES_REGNUM
);
5684 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5687 case 0x17: /* pop ss */
5688 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5693 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5694 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_SS_REGNUM
);
5695 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5698 case 0x1f: /* pop ds */
5699 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5704 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5705 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_DS_REGNUM
);
5706 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5709 case 0x0fa1: /* pop fs */
5710 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5711 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_FS_REGNUM
);
5712 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5715 case 0x0fa9: /* pop gs */
5716 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5717 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM
);
5718 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5721 case 0x88: /* mov */
5725 if ((opcode
& 1) == 0)
5728 ir
.ot
= ir
.dflag
+ OT_WORD
;
5730 if (i386_record_modrm (&ir
))
5735 if (opcode
== 0xc6 || opcode
== 0xc7)
5736 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5737 if (i386_record_lea_modrm (&ir
))
5742 if (opcode
== 0xc6 || opcode
== 0xc7)
5744 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5746 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5750 case 0x8a: /* mov */
5752 if ((opcode
& 1) == 0)
5755 ir
.ot
= ir
.dflag
+ OT_WORD
;
5756 if (i386_record_modrm (&ir
))
5759 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5761 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5764 case 0x8c: /* mov seg */
5765 if (i386_record_modrm (&ir
))
5770 opcode
= opcode
<< 8 | ir
.modrm
;
5775 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5779 if (i386_record_lea_modrm (&ir
))
5784 case 0x8e: /* mov seg */
5785 if (i386_record_modrm (&ir
))
5790 regnum
= X86_RECORD_ES_REGNUM
;
5793 regnum
= X86_RECORD_SS_REGNUM
;
5796 regnum
= X86_RECORD_DS_REGNUM
;
5799 regnum
= X86_RECORD_FS_REGNUM
;
5802 regnum
= X86_RECORD_GS_REGNUM
;
5806 opcode
= opcode
<< 8 | ir
.modrm
;
5810 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5811 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5814 case 0x0fb6: /* movzbS */
5815 case 0x0fb7: /* movzwS */
5816 case 0x0fbe: /* movsbS */
5817 case 0x0fbf: /* movswS */
5818 if (i386_record_modrm (&ir
))
5820 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
5823 case 0x8d: /* lea */
5824 if (i386_record_modrm (&ir
))
5829 opcode
= opcode
<< 8 | ir
.modrm
;
5834 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5836 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5839 case 0xa0: /* mov EAX */
5842 case 0xd7: /* xlat */
5843 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5846 case 0xa2: /* mov EAX */
5848 if (ir
.override
>= 0)
5850 if (record_full_memory_query
)
5853 Process record ignores the memory change of instruction at address %s\n\
5854 because it can't get the value of the segment register.\n\
5855 Do you want to stop the program?"),
5856 paddress (gdbarch
, ir
.orig_addr
)))
5862 if ((opcode
& 1) == 0)
5865 ir
.ot
= ir
.dflag
+ OT_WORD
;
5868 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 8))
5871 addr
= extract_unsigned_integer (buf
, 8, byte_order
);
5875 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 4))
5878 addr
= extract_unsigned_integer (buf
, 4, byte_order
);
5882 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 2))
5885 addr
= extract_unsigned_integer (buf
, 2, byte_order
);
5887 if (record_full_arch_list_add_mem (addr
, 1 << ir
.ot
))
5892 case 0xb0: /* mov R, Ib */
5900 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((ir
.regmap
[X86_RECORD_R8_REGNUM
])
5901 ? ((opcode
& 0x7) | ir
.rex_b
)
5902 : ((opcode
& 0x7) & 0x3));
5905 case 0xb8: /* mov R, Iv */
5913 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 0x7) | ir
.rex_b
);
5916 case 0x91: /* xchg R, EAX */
5923 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5924 I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode
& 0x7);
5927 case 0x86: /* xchg Ev, Gv */
5929 if ((opcode
& 1) == 0)
5932 ir
.ot
= ir
.dflag
+ OT_WORD
;
5933 if (i386_record_modrm (&ir
))
5938 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5940 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5944 if (i386_record_lea_modrm (&ir
))
5948 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5950 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5953 case 0xc4: /* les Gv */
5954 case 0xc5: /* lds Gv */
5955 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5961 case 0x0fb2: /* lss Gv */
5962 case 0x0fb4: /* lfs Gv */
5963 case 0x0fb5: /* lgs Gv */
5964 if (i386_record_modrm (&ir
))
5972 opcode
= opcode
<< 8 | ir
.modrm
;
5977 case 0xc4: /* les Gv */
5978 regnum
= X86_RECORD_ES_REGNUM
;
5980 case 0xc5: /* lds Gv */
5981 regnum
= X86_RECORD_DS_REGNUM
;
5983 case 0x0fb2: /* lss Gv */
5984 regnum
= X86_RECORD_SS_REGNUM
;
5986 case 0x0fb4: /* lfs Gv */
5987 regnum
= X86_RECORD_FS_REGNUM
;
5989 case 0x0fb5: /* lgs Gv */
5990 regnum
= X86_RECORD_GS_REGNUM
;
5993 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5994 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
5995 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5998 case 0xc0: /* shifts */
6004 if ((opcode
& 1) == 0)
6007 ir
.ot
= ir
.dflag
+ OT_WORD
;
6008 if (i386_record_modrm (&ir
))
6010 if (ir
.mod
!= 3 && (opcode
== 0xd2 || opcode
== 0xd3))
6012 if (i386_record_lea_modrm (&ir
))
6018 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
6020 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
6022 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6029 if (i386_record_modrm (&ir
))
6033 if (record_full_arch_list_add_reg (ir
.regcache
, ir
.rm
))
6038 if (i386_record_lea_modrm (&ir
))
6043 case 0xd8: /* Floats. */
6051 if (i386_record_modrm (&ir
))
6053 ir
.reg
|= ((opcode
& 7) << 3);
6059 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
6067 /* For fcom, ficom nothing to do. */
6073 /* For fcomp, ficomp pop FPU stack, store all. */
6074 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6101 /* For fadd, fmul, fsub, fsubr, fdiv, fdivr, fiadd, fimul,
6102 fisub, fisubr, fidiv, fidivr, modR/M.reg is an extension
6103 of code, always affects st(0) register. */
6104 if (i386_record_floats (gdbarch
, &ir
, I387_ST0_REGNUM (tdep
)))
6128 /* Handling fld, fild. */
6129 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6133 switch (ir
.reg
>> 4)
6136 if (record_full_arch_list_add_mem (addr64
, 4))
6140 if (record_full_arch_list_add_mem (addr64
, 8))
6146 if (record_full_arch_list_add_mem (addr64
, 2))
6152 switch (ir
.reg
>> 4)
6155 if (record_full_arch_list_add_mem (addr64
, 4))
6157 if (3 == (ir
.reg
& 7))
6159 /* For fstp m32fp. */
6160 if (i386_record_floats (gdbarch
, &ir
,
6161 I386_SAVE_FPU_REGS
))
6166 if (record_full_arch_list_add_mem (addr64
, 4))
6168 if ((3 == (ir
.reg
& 7))
6169 || (5 == (ir
.reg
& 7))
6170 || (7 == (ir
.reg
& 7)))
6172 /* For fstp insn. */
6173 if (i386_record_floats (gdbarch
, &ir
,
6174 I386_SAVE_FPU_REGS
))
6179 if (record_full_arch_list_add_mem (addr64
, 8))
6181 if (3 == (ir
.reg
& 7))
6183 /* For fstp m64fp. */
6184 if (i386_record_floats (gdbarch
, &ir
,
6185 I386_SAVE_FPU_REGS
))
6190 if ((3 <= (ir
.reg
& 7)) && (6 <= (ir
.reg
& 7)))
6192 /* For fistp, fbld, fild, fbstp. */
6193 if (i386_record_floats (gdbarch
, &ir
,
6194 I386_SAVE_FPU_REGS
))
6199 if (record_full_arch_list_add_mem (addr64
, 2))
6208 if (i386_record_floats (gdbarch
, &ir
,
6209 I386_SAVE_FPU_ENV_REG_STACK
))
6214 if (i386_record_floats (gdbarch
, &ir
, I387_FCTRL_REGNUM (tdep
)))
6219 if (i386_record_floats (gdbarch
, &ir
,
6220 I386_SAVE_FPU_ENV_REG_STACK
))
6226 if (record_full_arch_list_add_mem (addr64
, 28))
6231 if (record_full_arch_list_add_mem (addr64
, 14))
6237 if (record_full_arch_list_add_mem (addr64
, 2))
6239 /* Insn fstp, fbstp. */
6240 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6245 if (record_full_arch_list_add_mem (addr64
, 10))
6251 if (record_full_arch_list_add_mem (addr64
, 28))
6257 if (record_full_arch_list_add_mem (addr64
, 14))
6261 if (record_full_arch_list_add_mem (addr64
, 80))
6264 if (i386_record_floats (gdbarch
, &ir
,
6265 I386_SAVE_FPU_ENV_REG_STACK
))
6269 if (record_full_arch_list_add_mem (addr64
, 8))
6272 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6277 opcode
= opcode
<< 8 | ir
.modrm
;
6282 /* Opcode is an extension of modR/M byte. */
6288 if (i386_record_floats (gdbarch
, &ir
, I387_ST0_REGNUM (tdep
)))
6292 if (0x0c == (ir
.modrm
>> 4))
6294 if ((ir
.modrm
& 0x0f) <= 7)
6296 if (i386_record_floats (gdbarch
, &ir
,
6297 I386_SAVE_FPU_REGS
))
6302 if (i386_record_floats (gdbarch
, &ir
,
6303 I387_ST0_REGNUM (tdep
)))
6305 /* If only st(0) is changing, then we have already
6307 if ((ir
.modrm
& 0x0f) - 0x08)
6309 if (i386_record_floats (gdbarch
, &ir
,
6310 I387_ST0_REGNUM (tdep
) +
6311 ((ir
.modrm
& 0x0f) - 0x08)))
6329 if (i386_record_floats (gdbarch
, &ir
,
6330 I387_ST0_REGNUM (tdep
)))
6348 if (i386_record_floats (gdbarch
, &ir
,
6349 I386_SAVE_FPU_REGS
))
6353 if (i386_record_floats (gdbarch
, &ir
,
6354 I387_ST0_REGNUM (tdep
)))
6356 if (i386_record_floats (gdbarch
, &ir
,
6357 I387_ST0_REGNUM (tdep
) + 1))
6364 if (0xe9 == ir
.modrm
)
6366 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6369 else if ((0x0c == ir
.modrm
>> 4) || (0x0d == ir
.modrm
>> 4))
6371 if (i386_record_floats (gdbarch
, &ir
,
6372 I387_ST0_REGNUM (tdep
)))
6374 if (((ir
.modrm
& 0x0f) > 0) && ((ir
.modrm
& 0x0f) <= 7))
6376 if (i386_record_floats (gdbarch
, &ir
,
6377 I387_ST0_REGNUM (tdep
) +
6381 else if ((ir
.modrm
& 0x0f) - 0x08)
6383 if (i386_record_floats (gdbarch
, &ir
,
6384 I387_ST0_REGNUM (tdep
) +
6385 ((ir
.modrm
& 0x0f) - 0x08)))
6391 if (0xe3 == ir
.modrm
)
6393 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_ENV
))
6396 else if ((0x0c == ir
.modrm
>> 4) || (0x0d == ir
.modrm
>> 4))
6398 if (i386_record_floats (gdbarch
, &ir
,
6399 I387_ST0_REGNUM (tdep
)))
6401 if (((ir
.modrm
& 0x0f) > 0) && ((ir
.modrm
& 0x0f) <= 7))
6403 if (i386_record_floats (gdbarch
, &ir
,
6404 I387_ST0_REGNUM (tdep
) +
6408 else if ((ir
.modrm
& 0x0f) - 0x08)
6410 if (i386_record_floats (gdbarch
, &ir
,
6411 I387_ST0_REGNUM (tdep
) +
6412 ((ir
.modrm
& 0x0f) - 0x08)))
6418 if ((0x0c == ir
.modrm
>> 4)
6419 || (0x0d == ir
.modrm
>> 4)
6420 || (0x0f == ir
.modrm
>> 4))
6422 if ((ir
.modrm
& 0x0f) <= 7)
6424 if (i386_record_floats (gdbarch
, &ir
,
6425 I387_ST0_REGNUM (tdep
) +
6431 if (i386_record_floats (gdbarch
, &ir
,
6432 I387_ST0_REGNUM (tdep
) +
6433 ((ir
.modrm
& 0x0f) - 0x08)))
6439 if (0x0c == ir
.modrm
>> 4)
6441 if (i386_record_floats (gdbarch
, &ir
,
6442 I387_FTAG_REGNUM (tdep
)))
6445 else if ((0x0d == ir
.modrm
>> 4) || (0x0e == ir
.modrm
>> 4))
6447 if ((ir
.modrm
& 0x0f) <= 7)
6449 if (i386_record_floats (gdbarch
, &ir
,
6450 I387_ST0_REGNUM (tdep
) +
6456 if (i386_record_floats (gdbarch
, &ir
,
6457 I386_SAVE_FPU_REGS
))
6463 if ((0x0c == ir
.modrm
>> 4)
6464 || (0x0e == ir
.modrm
>> 4)
6465 || (0x0f == ir
.modrm
>> 4)
6466 || (0xd9 == ir
.modrm
))
6468 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6473 if (0xe0 == ir
.modrm
)
6475 if (record_full_arch_list_add_reg (ir
.regcache
,
6479 else if ((0x0f == ir
.modrm
>> 4) || (0x0e == ir
.modrm
>> 4))
6481 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6489 case 0xa4: /* movsS */
6491 case 0xaa: /* stosS */
6493 case 0x6c: /* insS */
6495 regcache_raw_read_unsigned (ir
.regcache
,
6496 ir
.regmap
[X86_RECORD_RECX_REGNUM
],
6502 if ((opcode
& 1) == 0)
6505 ir
.ot
= ir
.dflag
+ OT_WORD
;
6506 regcache_raw_read_unsigned (ir
.regcache
,
6507 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
6510 regcache_raw_read_unsigned (ir
.regcache
,
6511 ir
.regmap
[X86_RECORD_ES_REGNUM
],
6513 regcache_raw_read_unsigned (ir
.regcache
,
6514 ir
.regmap
[X86_RECORD_DS_REGNUM
],
6516 if (ir
.aflag
&& (es
!= ds
))
6518 /* addr += ((uint32_t) read_register (I386_ES_REGNUM)) << 4; */
6519 if (record_full_memory_query
)
6522 Process record ignores the memory change of instruction at address %s\n\
6523 because it can't get the value of the segment register.\n\
6524 Do you want to stop the program?"),
6525 paddress (gdbarch
, ir
.orig_addr
)))
6531 if (record_full_arch_list_add_mem (addr
, 1 << ir
.ot
))
6535 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6536 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6537 if (opcode
== 0xa4 || opcode
== 0xa5)
6538 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6539 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6540 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6544 case 0xa6: /* cmpsS */
6546 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6547 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6548 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6549 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6550 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6553 case 0xac: /* lodsS */
6555 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6556 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6557 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6558 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6559 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6562 case 0xae: /* scasS */
6564 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6565 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6566 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6567 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6570 case 0x6e: /* outsS */
6572 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6573 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6574 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6575 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6578 case 0xe4: /* port I/O */
6582 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6583 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6593 case 0xc2: /* ret im */
6594 case 0xc3: /* ret */
6595 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6596 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6599 case 0xca: /* lret im */
6600 case 0xcb: /* lret */
6601 case 0xcf: /* iret */
6602 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
6603 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6604 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6607 case 0xe8: /* call im */
6608 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
6610 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6614 case 0x9a: /* lcall im */
6615 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6620 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
6621 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6625 case 0xe9: /* jmp im */
6626 case 0xea: /* ljmp im */
6627 case 0xeb: /* jmp Jb */
6628 case 0x70: /* jcc Jb */
6644 case 0x0f80: /* jcc Jv */
6662 case 0x0f90: /* setcc Gv */
6678 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6680 if (i386_record_modrm (&ir
))
6683 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rex_b
? (ir
.rm
| ir
.rex_b
)
6687 if (i386_record_lea_modrm (&ir
))
6692 case 0x0f40: /* cmov Gv, Ev */
6708 if (i386_record_modrm (&ir
))
6711 if (ir
.dflag
== OT_BYTE
)
6713 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
6717 case 0x9c: /* pushf */
6718 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6719 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
6721 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6725 case 0x9d: /* popf */
6726 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6727 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6730 case 0x9e: /* sahf */
6731 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6737 case 0xf5: /* cmc */
6738 case 0xf8: /* clc */
6739 case 0xf9: /* stc */
6740 case 0xfc: /* cld */
6741 case 0xfd: /* std */
6742 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6745 case 0x9f: /* lahf */
6746 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6751 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6752 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6755 /* bit operations */
6756 case 0x0fba: /* bt/bts/btr/btc Gv, im */
6757 ir
.ot
= ir
.dflag
+ OT_WORD
;
6758 if (i386_record_modrm (&ir
))
6763 opcode
= opcode
<< 8 | ir
.modrm
;
6769 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6772 if (i386_record_lea_modrm (&ir
))
6776 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6779 case 0x0fa3: /* bt Gv, Ev */
6780 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6783 case 0x0fab: /* bts */
6784 case 0x0fb3: /* btr */
6785 case 0x0fbb: /* btc */
6786 ir
.ot
= ir
.dflag
+ OT_WORD
;
6787 if (i386_record_modrm (&ir
))
6790 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6794 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
6796 regcache_raw_read_unsigned (ir
.regcache
,
6797 ir
.regmap
[ir
.reg
| rex_r
],
6802 addr64
+= ((int16_t) addr
>> 4) << 4;
6805 addr64
+= ((int32_t) addr
>> 5) << 5;
6808 addr64
+= ((int64_t) addr
>> 6) << 6;
6811 if (record_full_arch_list_add_mem (addr64
, 1 << ir
.ot
))
6813 if (i386_record_lea_modrm (&ir
))
6816 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6819 case 0x0fbc: /* bsf */
6820 case 0x0fbd: /* bsr */
6821 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
6822 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6826 case 0x27: /* daa */
6827 case 0x2f: /* das */
6828 case 0x37: /* aaa */
6829 case 0x3f: /* aas */
6830 case 0xd4: /* aam */
6831 case 0xd5: /* aad */
6832 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6837 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6838 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6842 case 0x90: /* nop */
6843 if (prefixes
& PREFIX_LOCK
)
6850 case 0x9b: /* fwait */
6851 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
6853 opcode
= (uint32_t) opcode8
;
6859 case 0xcc: /* int3 */
6860 gdb_printf (gdb_stderr
,
6861 _("Process record does not support instruction "
6868 case 0xcd: /* int */
6872 if (record_read_memory (gdbarch
, ir
.addr
, &interrupt
, 1))
6875 if (interrupt
!= 0x80
6876 || tdep
->i386_intx80_record
== NULL
)
6878 gdb_printf (gdb_stderr
,
6879 _("Process record does not support "
6880 "instruction int 0x%02x.\n"),
6885 ret
= tdep
->i386_intx80_record (ir
.regcache
);
6892 case 0xce: /* into */
6893 gdb_printf (gdb_stderr
,
6894 _("Process record does not support "
6895 "instruction into.\n"));
6900 case 0xfa: /* cli */
6901 case 0xfb: /* sti */
6904 case 0x62: /* bound */
6905 gdb_printf (gdb_stderr
,
6906 _("Process record does not support "
6907 "instruction bound.\n"));
6912 case 0x0fc8: /* bswap reg */
6920 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 7) | ir
.rex_b
);
6923 case 0xd6: /* salc */
6924 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6929 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6930 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6933 case 0xe0: /* loopnz */
6934 case 0xe1: /* loopz */
6935 case 0xe2: /* loop */
6936 case 0xe3: /* jecxz */
6937 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6938 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6941 case 0x0f30: /* wrmsr */
6942 gdb_printf (gdb_stderr
,
6943 _("Process record does not support "
6944 "instruction wrmsr.\n"));
6949 case 0x0f32: /* rdmsr */
6950 gdb_printf (gdb_stderr
,
6951 _("Process record does not support "
6952 "instruction rdmsr.\n"));
6957 case 0x0f31: /* rdtsc */
6958 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6959 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
6962 case 0x0f34: /* sysenter */
6965 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6970 if (tdep
->i386_sysenter_record
== NULL
)
6972 gdb_printf (gdb_stderr
,
6973 _("Process record does not support "
6974 "instruction sysenter.\n"));
6978 ret
= tdep
->i386_sysenter_record (ir
.regcache
);
6984 case 0x0f35: /* sysexit */
6985 gdb_printf (gdb_stderr
,
6986 _("Process record does not support "
6987 "instruction sysexit.\n"));
6992 case 0x0f05: /* syscall */
6995 if (tdep
->i386_syscall_record
== NULL
)
6997 gdb_printf (gdb_stderr
,
6998 _("Process record does not support "
6999 "instruction syscall.\n"));
7003 ret
= tdep
->i386_syscall_record (ir
.regcache
);
7009 case 0x0f07: /* sysret */
7010 gdb_printf (gdb_stderr
,
7011 _("Process record does not support "
7012 "instruction sysret.\n"));
7017 case 0x0fa2: /* cpuid */
7018 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7019 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
7020 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7021 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM
);
7024 case 0xf4: /* hlt */
7025 gdb_printf (gdb_stderr
,
7026 _("Process record does not support "
7027 "instruction hlt.\n"));
7033 if (i386_record_modrm (&ir
))
7040 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7044 if (i386_record_lea_modrm (&ir
))
7053 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7057 opcode
= opcode
<< 8 | ir
.modrm
;
7064 if (i386_record_modrm (&ir
))
7075 opcode
= opcode
<< 8 | ir
.modrm
;
7078 if (ir
.override
>= 0)
7080 if (record_full_memory_query
)
7083 Process record ignores the memory change of instruction at address %s\n\
7084 because it can't get the value of the segment register.\n\
7085 Do you want to stop the program?"),
7086 paddress (gdbarch
, ir
.orig_addr
)))
7092 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
7094 if (record_full_arch_list_add_mem (addr64
, 2))
7097 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
7099 if (record_full_arch_list_add_mem (addr64
, 8))
7104 if (record_full_arch_list_add_mem (addr64
, 4))
7115 case 0: /* monitor */
7118 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7122 opcode
= opcode
<< 8 | ir
.modrm
;
7130 if (ir
.override
>= 0)
7132 if (record_full_memory_query
)
7135 Process record ignores the memory change of instruction at address %s\n\
7136 because it can't get the value of the segment register.\n\
7137 Do you want to stop the program?"),
7138 paddress (gdbarch
, ir
.orig_addr
)))
7146 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
7148 if (record_full_arch_list_add_mem (addr64
, 2))
7151 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
7153 if (record_full_arch_list_add_mem (addr64
, 8))
7158 if (record_full_arch_list_add_mem (addr64
, 4))
7170 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7171 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7175 else if (ir
.rm
== 1)
7183 opcode
= opcode
<< 8 | ir
.modrm
;
7190 if (record_full_arch_list_add_reg (ir
.regcache
, ir
.rm
| ir
.rex_b
))
7196 if (i386_record_lea_modrm (&ir
))
7199 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7202 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7204 case 7: /* invlpg */
7207 if (ir
.rm
== 0 && ir
.regmap
[X86_RECORD_R8_REGNUM
])
7208 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM
);
7212 opcode
= opcode
<< 8 | ir
.modrm
;
7217 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7221 opcode
= opcode
<< 8 | ir
.modrm
;
7227 case 0x0f08: /* invd */
7228 case 0x0f09: /* wbinvd */
7231 case 0x63: /* arpl */
7232 if (i386_record_modrm (&ir
))
7234 if (ir
.mod
== 3 || ir
.regmap
[X86_RECORD_R8_REGNUM
])
7236 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.regmap
[X86_RECORD_R8_REGNUM
]
7237 ? (ir
.reg
| rex_r
) : ir
.rm
);
7241 ir
.ot
= ir
.dflag
? OT_LONG
: OT_WORD
;
7242 if (i386_record_lea_modrm (&ir
))
7245 if (!ir
.regmap
[X86_RECORD_R8_REGNUM
])
7246 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7249 case 0x0f02: /* lar */
7250 case 0x0f03: /* lsl */
7251 if (i386_record_modrm (&ir
))
7253 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
7254 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7258 if (i386_record_modrm (&ir
))
7260 if (ir
.mod
== 3 && ir
.reg
== 3)
7263 opcode
= opcode
<< 8 | ir
.modrm
;
7275 /* nop (multi byte) */
7278 case 0x0f20: /* mov reg, crN */
7279 case 0x0f22: /* mov crN, reg */
7280 if (i386_record_modrm (&ir
))
7282 if ((ir
.modrm
& 0xc0) != 0xc0)
7285 opcode
= opcode
<< 8 | ir
.modrm
;
7296 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7298 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7302 opcode
= opcode
<< 8 | ir
.modrm
;
7308 case 0x0f21: /* mov reg, drN */
7309 case 0x0f23: /* mov drN, reg */
7310 if (i386_record_modrm (&ir
))
7312 if ((ir
.modrm
& 0xc0) != 0xc0 || ir
.reg
== 4
7313 || ir
.reg
== 5 || ir
.reg
>= 8)
7316 opcode
= opcode
<< 8 | ir
.modrm
;
7320 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7322 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7325 case 0x0f06: /* clts */
7326 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7329 /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
7331 case 0x0f0d: /* 3DNow! prefetch */
7334 case 0x0f0e: /* 3DNow! femms */
7335 case 0x0f77: /* emms */
7336 if (i386_fpc_regnum_p (gdbarch
, I387_FTAG_REGNUM(tdep
)))
7338 record_full_arch_list_add_reg (ir
.regcache
, I387_FTAG_REGNUM(tdep
));
7341 case 0x0f0f: /* 3DNow! data */
7342 if (i386_record_modrm (&ir
))
7344 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
7349 case 0x0c: /* 3DNow! pi2fw */
7350 case 0x0d: /* 3DNow! pi2fd */
7351 case 0x1c: /* 3DNow! pf2iw */
7352 case 0x1d: /* 3DNow! pf2id */
7353 case 0x8a: /* 3DNow! pfnacc */
7354 case 0x8e: /* 3DNow! pfpnacc */
7355 case 0x90: /* 3DNow! pfcmpge */
7356 case 0x94: /* 3DNow! pfmin */
7357 case 0x96: /* 3DNow! pfrcp */
7358 case 0x97: /* 3DNow! pfrsqrt */
7359 case 0x9a: /* 3DNow! pfsub */
7360 case 0x9e: /* 3DNow! pfadd */
7361 case 0xa0: /* 3DNow! pfcmpgt */
7362 case 0xa4: /* 3DNow! pfmax */
7363 case 0xa6: /* 3DNow! pfrcpit1 */
7364 case 0xa7: /* 3DNow! pfrsqit1 */
7365 case 0xaa: /* 3DNow! pfsubr */
7366 case 0xae: /* 3DNow! pfacc */
7367 case 0xb0: /* 3DNow! pfcmpeq */
7368 case 0xb4: /* 3DNow! pfmul */
7369 case 0xb6: /* 3DNow! pfrcpit2 */
7370 case 0xb7: /* 3DNow! pmulhrw */
7371 case 0xbb: /* 3DNow! pswapd */
7372 case 0xbf: /* 3DNow! pavgusb */
7373 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.reg
))
7374 goto no_support_3dnow_data
;
7375 record_full_arch_list_add_reg (ir
.regcache
, ir
.reg
);
7379 no_support_3dnow_data
:
7380 opcode
= (opcode
<< 8) | opcode8
;
7386 case 0x0faa: /* rsm */
7387 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7388 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7389 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
7390 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7391 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM
);
7392 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
7393 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
7394 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
7395 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
7399 if (i386_record_modrm (&ir
))
7403 case 0: /* fxsave */
7407 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7408 if (i386_record_lea_modrm_addr (&ir
, &tmpu64
))
7410 if (record_full_arch_list_add_mem (tmpu64
, 512))
7415 case 1: /* fxrstor */
7419 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7421 for (i
= I387_MM0_REGNUM (tdep
);
7422 i386_mmx_regnum_p (gdbarch
, i
); i
++)
7423 record_full_arch_list_add_reg (ir
.regcache
, i
);
7425 for (i
= I387_XMM0_REGNUM (tdep
);
7426 i386_xmm_regnum_p (gdbarch
, i
); i
++)
7427 record_full_arch_list_add_reg (ir
.regcache
, i
);
7429 if (i386_mxcsr_regnum_p (gdbarch
, I387_MXCSR_REGNUM(tdep
)))
7430 record_full_arch_list_add_reg (ir
.regcache
,
7431 I387_MXCSR_REGNUM(tdep
));
7433 for (i
= I387_ST0_REGNUM (tdep
);
7434 i386_fp_regnum_p (gdbarch
, i
); i
++)
7435 record_full_arch_list_add_reg (ir
.regcache
, i
);
7437 for (i
= I387_FCTRL_REGNUM (tdep
);
7438 i386_fpc_regnum_p (gdbarch
, i
); i
++)
7439 record_full_arch_list_add_reg (ir
.regcache
, i
);
7443 case 2: /* ldmxcsr */
7444 if (!i386_mxcsr_regnum_p (gdbarch
, I387_MXCSR_REGNUM(tdep
)))
7446 record_full_arch_list_add_reg (ir
.regcache
, I387_MXCSR_REGNUM(tdep
));
7449 case 3: /* stmxcsr */
7451 if (i386_record_lea_modrm (&ir
))
7455 case 5: /* lfence */
7456 case 6: /* mfence */
7457 case 7: /* sfence clflush */
7461 opcode
= (opcode
<< 8) | ir
.modrm
;
7467 case 0x0fc3: /* movnti */
7468 ir
.ot
= (ir
.dflag
== 2) ? OT_QUAD
: OT_LONG
;
7469 if (i386_record_modrm (&ir
))
7474 if (i386_record_lea_modrm (&ir
))
7478 /* Add prefix to opcode. */
7593 /* Mask out PREFIX_ADDR. */
7594 switch ((prefixes
& ~PREFIX_ADDR
))
7606 reswitch_prefix_add
:
7614 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
7617 opcode
= (uint32_t) opcode8
| opcode
<< 8;
7618 goto reswitch_prefix_add
;
7621 case 0x0f10: /* movups */
7622 case 0x660f10: /* movupd */
7623 case 0xf30f10: /* movss */
7624 case 0xf20f10: /* movsd */
7625 case 0x0f12: /* movlps */
7626 case 0x660f12: /* movlpd */
7627 case 0xf30f12: /* movsldup */
7628 case 0xf20f12: /* movddup */
7629 case 0x0f14: /* unpcklps */
7630 case 0x660f14: /* unpcklpd */
7631 case 0x0f15: /* unpckhps */
7632 case 0x660f15: /* unpckhpd */
7633 case 0x0f16: /* movhps */
7634 case 0x660f16: /* movhpd */
7635 case 0xf30f16: /* movshdup */
7636 case 0x0f28: /* movaps */
7637 case 0x660f28: /* movapd */
7638 case 0x0f2a: /* cvtpi2ps */
7639 case 0x660f2a: /* cvtpi2pd */
7640 case 0xf30f2a: /* cvtsi2ss */
7641 case 0xf20f2a: /* cvtsi2sd */
7642 case 0x0f2c: /* cvttps2pi */
7643 case 0x660f2c: /* cvttpd2pi */
7644 case 0x0f2d: /* cvtps2pi */
7645 case 0x660f2d: /* cvtpd2pi */
7646 case 0x660f3800: /* pshufb */
7647 case 0x660f3801: /* phaddw */
7648 case 0x660f3802: /* phaddd */
7649 case 0x660f3803: /* phaddsw */
7650 case 0x660f3804: /* pmaddubsw */
7651 case 0x660f3805: /* phsubw */
7652 case 0x660f3806: /* phsubd */
7653 case 0x660f3807: /* phsubsw */
7654 case 0x660f3808: /* psignb */
7655 case 0x660f3809: /* psignw */
7656 case 0x660f380a: /* psignd */
7657 case 0x660f380b: /* pmulhrsw */
7658 case 0x660f3810: /* pblendvb */
7659 case 0x660f3814: /* blendvps */
7660 case 0x660f3815: /* blendvpd */
7661 case 0x660f381c: /* pabsb */
7662 case 0x660f381d: /* pabsw */
7663 case 0x660f381e: /* pabsd */
7664 case 0x660f3820: /* pmovsxbw */
7665 case 0x660f3821: /* pmovsxbd */
7666 case 0x660f3822: /* pmovsxbq */
7667 case 0x660f3823: /* pmovsxwd */
7668 case 0x660f3824: /* pmovsxwq */
7669 case 0x660f3825: /* pmovsxdq */
7670 case 0x660f3828: /* pmuldq */
7671 case 0x660f3829: /* pcmpeqq */
7672 case 0x660f382a: /* movntdqa */
7673 case 0x660f3a08: /* roundps */
7674 case 0x660f3a09: /* roundpd */
7675 case 0x660f3a0a: /* roundss */
7676 case 0x660f3a0b: /* roundsd */
7677 case 0x660f3a0c: /* blendps */
7678 case 0x660f3a0d: /* blendpd */
7679 case 0x660f3a0e: /* pblendw */
7680 case 0x660f3a0f: /* palignr */
7681 case 0x660f3a20: /* pinsrb */
7682 case 0x660f3a21: /* insertps */
7683 case 0x660f3a22: /* pinsrd pinsrq */
7684 case 0x660f3a40: /* dpps */
7685 case 0x660f3a41: /* dppd */
7686 case 0x660f3a42: /* mpsadbw */
7687 case 0x660f3a60: /* pcmpestrm */
7688 case 0x660f3a61: /* pcmpestri */
7689 case 0x660f3a62: /* pcmpistrm */
7690 case 0x660f3a63: /* pcmpistri */
7691 case 0x0f51: /* sqrtps */
7692 case 0x660f51: /* sqrtpd */
7693 case 0xf20f51: /* sqrtsd */
7694 case 0xf30f51: /* sqrtss */
7695 case 0x0f52: /* rsqrtps */
7696 case 0xf30f52: /* rsqrtss */
7697 case 0x0f53: /* rcpps */
7698 case 0xf30f53: /* rcpss */
7699 case 0x0f54: /* andps */
7700 case 0x660f54: /* andpd */
7701 case 0x0f55: /* andnps */
7702 case 0x660f55: /* andnpd */
7703 case 0x0f56: /* orps */
7704 case 0x660f56: /* orpd */
7705 case 0x0f57: /* xorps */
7706 case 0x660f57: /* xorpd */
7707 case 0x0f58: /* addps */
7708 case 0x660f58: /* addpd */
7709 case 0xf20f58: /* addsd */
7710 case 0xf30f58: /* addss */
7711 case 0x0f59: /* mulps */
7712 case 0x660f59: /* mulpd */
7713 case 0xf20f59: /* mulsd */
7714 case 0xf30f59: /* mulss */
7715 case 0x0f5a: /* cvtps2pd */
7716 case 0x660f5a: /* cvtpd2ps */
7717 case 0xf20f5a: /* cvtsd2ss */
7718 case 0xf30f5a: /* cvtss2sd */
7719 case 0x0f5b: /* cvtdq2ps */
7720 case 0x660f5b: /* cvtps2dq */
7721 case 0xf30f5b: /* cvttps2dq */
7722 case 0x0f5c: /* subps */
7723 case 0x660f5c: /* subpd */
7724 case 0xf20f5c: /* subsd */
7725 case 0xf30f5c: /* subss */
7726 case 0x0f5d: /* minps */
7727 case 0x660f5d: /* minpd */
7728 case 0xf20f5d: /* minsd */
7729 case 0xf30f5d: /* minss */
7730 case 0x0f5e: /* divps */
7731 case 0x660f5e: /* divpd */
7732 case 0xf20f5e: /* divsd */
7733 case 0xf30f5e: /* divss */
7734 case 0x0f5f: /* maxps */
7735 case 0x660f5f: /* maxpd */
7736 case 0xf20f5f: /* maxsd */
7737 case 0xf30f5f: /* maxss */
7738 case 0x660f60: /* punpcklbw */
7739 case 0x660f61: /* punpcklwd */
7740 case 0x660f62: /* punpckldq */
7741 case 0x660f63: /* packsswb */
7742 case 0x660f64: /* pcmpgtb */
7743 case 0x660f65: /* pcmpgtw */
7744 case 0x660f66: /* pcmpgtd */
7745 case 0x660f67: /* packuswb */
7746 case 0x660f68: /* punpckhbw */
7747 case 0x660f69: /* punpckhwd */
7748 case 0x660f6a: /* punpckhdq */
7749 case 0x660f6b: /* packssdw */
7750 case 0x660f6c: /* punpcklqdq */
7751 case 0x660f6d: /* punpckhqdq */
7752 case 0x660f6e: /* movd */
7753 case 0x660f6f: /* movdqa */
7754 case 0xf30f6f: /* movdqu */
7755 case 0x660f70: /* pshufd */
7756 case 0xf20f70: /* pshuflw */
7757 case 0xf30f70: /* pshufhw */
7758 case 0x660f74: /* pcmpeqb */
7759 case 0x660f75: /* pcmpeqw */
7760 case 0x660f76: /* pcmpeqd */
7761 case 0x660f7c: /* haddpd */
7762 case 0xf20f7c: /* haddps */
7763 case 0x660f7d: /* hsubpd */
7764 case 0xf20f7d: /* hsubps */
7765 case 0xf30f7e: /* movq */
7766 case 0x0fc2: /* cmpps */
7767 case 0x660fc2: /* cmppd */
7768 case 0xf20fc2: /* cmpsd */
7769 case 0xf30fc2: /* cmpss */
7770 case 0x660fc4: /* pinsrw */
7771 case 0x0fc6: /* shufps */
7772 case 0x660fc6: /* shufpd */
7773 case 0x660fd0: /* addsubpd */
7774 case 0xf20fd0: /* addsubps */
7775 case 0x660fd1: /* psrlw */
7776 case 0x660fd2: /* psrld */
7777 case 0x660fd3: /* psrlq */
7778 case 0x660fd4: /* paddq */
7779 case 0x660fd5: /* pmullw */
7780 case 0xf30fd6: /* movq2dq */
7781 case 0x660fd8: /* psubusb */
7782 case 0x660fd9: /* psubusw */
7783 case 0x660fda: /* pminub */
7784 case 0x660fdb: /* pand */
7785 case 0x660fdc: /* paddusb */
7786 case 0x660fdd: /* paddusw */
7787 case 0x660fde: /* pmaxub */
7788 case 0x660fdf: /* pandn */
7789 case 0x660fe0: /* pavgb */
7790 case 0x660fe1: /* psraw */
7791 case 0x660fe2: /* psrad */
7792 case 0x660fe3: /* pavgw */
7793 case 0x660fe4: /* pmulhuw */
7794 case 0x660fe5: /* pmulhw */
7795 case 0x660fe6: /* cvttpd2dq */
7796 case 0xf20fe6: /* cvtpd2dq */
7797 case 0xf30fe6: /* cvtdq2pd */
7798 case 0x660fe8: /* psubsb */
7799 case 0x660fe9: /* psubsw */
7800 case 0x660fea: /* pminsw */
7801 case 0x660feb: /* por */
7802 case 0x660fec: /* paddsb */
7803 case 0x660fed: /* paddsw */
7804 case 0x660fee: /* pmaxsw */
7805 case 0x660fef: /* pxor */
7806 case 0xf20ff0: /* lddqu */
7807 case 0x660ff1: /* psllw */
7808 case 0x660ff2: /* pslld */
7809 case 0x660ff3: /* psllq */
7810 case 0x660ff4: /* pmuludq */
7811 case 0x660ff5: /* pmaddwd */
7812 case 0x660ff6: /* psadbw */
7813 case 0x660ff8: /* psubb */
7814 case 0x660ff9: /* psubw */
7815 case 0x660ffa: /* psubd */
7816 case 0x660ffb: /* psubq */
7817 case 0x660ffc: /* paddb */
7818 case 0x660ffd: /* paddw */
7819 case 0x660ffe: /* paddd */
7820 if (i386_record_modrm (&ir
))
7823 if (!i386_xmm_regnum_p (gdbarch
, I387_XMM0_REGNUM (tdep
) + ir
.reg
))
7825 record_full_arch_list_add_reg (ir
.regcache
,
7826 I387_XMM0_REGNUM (tdep
) + ir
.reg
);
7827 if ((opcode
& 0xfffffffc) == 0x660f3a60)
7828 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7831 case 0x0f11: /* movups */
7832 case 0x660f11: /* movupd */
7833 case 0xf30f11: /* movss */
7834 case 0xf20f11: /* movsd */
7835 case 0x0f13: /* movlps */
7836 case 0x660f13: /* movlpd */
7837 case 0x0f17: /* movhps */
7838 case 0x660f17: /* movhpd */
7839 case 0x0f29: /* movaps */
7840 case 0x660f29: /* movapd */
7841 case 0x660f3a14: /* pextrb */
7842 case 0x660f3a15: /* pextrw */
7843 case 0x660f3a16: /* pextrd pextrq */
7844 case 0x660f3a17: /* extractps */
7845 case 0x660f7f: /* movdqa */
7846 case 0xf30f7f: /* movdqu */
7847 if (i386_record_modrm (&ir
))
7851 if (opcode
== 0x0f13 || opcode
== 0x660f13
7852 || opcode
== 0x0f17 || opcode
== 0x660f17)
7855 if (!i386_xmm_regnum_p (gdbarch
,
7856 I387_XMM0_REGNUM (tdep
) + ir
.rm
))
7858 record_full_arch_list_add_reg (ir
.regcache
,
7859 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
7881 if (i386_record_lea_modrm (&ir
))
7886 case 0x0f2b: /* movntps */
7887 case 0x660f2b: /* movntpd */
7888 case 0x0fe7: /* movntq */
7889 case 0x660fe7: /* movntdq */
7892 if (opcode
== 0x0fe7)
7896 if (i386_record_lea_modrm (&ir
))
7900 case 0xf30f2c: /* cvttss2si */
7901 case 0xf20f2c: /* cvttsd2si */
7902 case 0xf30f2d: /* cvtss2si */
7903 case 0xf20f2d: /* cvtsd2si */
7904 case 0xf20f38f0: /* crc32 */
7905 case 0xf20f38f1: /* crc32 */
7906 case 0x0f50: /* movmskps */
7907 case 0x660f50: /* movmskpd */
7908 case 0x0fc5: /* pextrw */
7909 case 0x660fc5: /* pextrw */
7910 case 0x0fd7: /* pmovmskb */
7911 case 0x660fd7: /* pmovmskb */
7912 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
7915 case 0x0f3800: /* pshufb */
7916 case 0x0f3801: /* phaddw */
7917 case 0x0f3802: /* phaddd */
7918 case 0x0f3803: /* phaddsw */
7919 case 0x0f3804: /* pmaddubsw */
7920 case 0x0f3805: /* phsubw */
7921 case 0x0f3806: /* phsubd */
7922 case 0x0f3807: /* phsubsw */
7923 case 0x0f3808: /* psignb */
7924 case 0x0f3809: /* psignw */
7925 case 0x0f380a: /* psignd */
7926 case 0x0f380b: /* pmulhrsw */
7927 case 0x0f381c: /* pabsb */
7928 case 0x0f381d: /* pabsw */
7929 case 0x0f381e: /* pabsd */
7930 case 0x0f382b: /* packusdw */
7931 case 0x0f3830: /* pmovzxbw */
7932 case 0x0f3831: /* pmovzxbd */
7933 case 0x0f3832: /* pmovzxbq */
7934 case 0x0f3833: /* pmovzxwd */
7935 case 0x0f3834: /* pmovzxwq */
7936 case 0x0f3835: /* pmovzxdq */
7937 case 0x0f3837: /* pcmpgtq */
7938 case 0x0f3838: /* pminsb */
7939 case 0x0f3839: /* pminsd */
7940 case 0x0f383a: /* pminuw */
7941 case 0x0f383b: /* pminud */
7942 case 0x0f383c: /* pmaxsb */
7943 case 0x0f383d: /* pmaxsd */
7944 case 0x0f383e: /* pmaxuw */
7945 case 0x0f383f: /* pmaxud */
7946 case 0x0f3840: /* pmulld */
7947 case 0x0f3841: /* phminposuw */
7948 case 0x0f3a0f: /* palignr */
7949 case 0x0f60: /* punpcklbw */
7950 case 0x0f61: /* punpcklwd */
7951 case 0x0f62: /* punpckldq */
7952 case 0x0f63: /* packsswb */
7953 case 0x0f64: /* pcmpgtb */
7954 case 0x0f65: /* pcmpgtw */
7955 case 0x0f66: /* pcmpgtd */
7956 case 0x0f67: /* packuswb */
7957 case 0x0f68: /* punpckhbw */
7958 case 0x0f69: /* punpckhwd */
7959 case 0x0f6a: /* punpckhdq */
7960 case 0x0f6b: /* packssdw */
7961 case 0x0f6e: /* movd */
7962 case 0x0f6f: /* movq */
7963 case 0x0f70: /* pshufw */
7964 case 0x0f74: /* pcmpeqb */
7965 case 0x0f75: /* pcmpeqw */
7966 case 0x0f76: /* pcmpeqd */
7967 case 0x0fc4: /* pinsrw */
7968 case 0x0fd1: /* psrlw */
7969 case 0x0fd2: /* psrld */
7970 case 0x0fd3: /* psrlq */
7971 case 0x0fd4: /* paddq */
7972 case 0x0fd5: /* pmullw */
7973 case 0xf20fd6: /* movdq2q */
7974 case 0x0fd8: /* psubusb */
7975 case 0x0fd9: /* psubusw */
7976 case 0x0fda: /* pminub */
7977 case 0x0fdb: /* pand */
7978 case 0x0fdc: /* paddusb */
7979 case 0x0fdd: /* paddusw */
7980 case 0x0fde: /* pmaxub */
7981 case 0x0fdf: /* pandn */
7982 case 0x0fe0: /* pavgb */
7983 case 0x0fe1: /* psraw */
7984 case 0x0fe2: /* psrad */
7985 case 0x0fe3: /* pavgw */
7986 case 0x0fe4: /* pmulhuw */
7987 case 0x0fe5: /* pmulhw */
7988 case 0x0fe8: /* psubsb */
7989 case 0x0fe9: /* psubsw */
7990 case 0x0fea: /* pminsw */
7991 case 0x0feb: /* por */
7992 case 0x0fec: /* paddsb */
7993 case 0x0fed: /* paddsw */
7994 case 0x0fee: /* pmaxsw */
7995 case 0x0fef: /* pxor */
7996 case 0x0ff1: /* psllw */
7997 case 0x0ff2: /* pslld */
7998 case 0x0ff3: /* psllq */
7999 case 0x0ff4: /* pmuludq */
8000 case 0x0ff5: /* pmaddwd */
8001 case 0x0ff6: /* psadbw */
8002 case 0x0ff8: /* psubb */
8003 case 0x0ff9: /* psubw */
8004 case 0x0ffa: /* psubd */
8005 case 0x0ffb: /* psubq */
8006 case 0x0ffc: /* paddb */
8007 case 0x0ffd: /* paddw */
8008 case 0x0ffe: /* paddd */
8009 if (i386_record_modrm (&ir
))
8011 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.reg
))
8013 record_full_arch_list_add_reg (ir
.regcache
,
8014 I387_MM0_REGNUM (tdep
) + ir
.reg
);
8017 case 0x0f71: /* psllw */
8018 case 0x0f72: /* pslld */
8019 case 0x0f73: /* psllq */
8020 if (i386_record_modrm (&ir
))
8022 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.rm
))
8024 record_full_arch_list_add_reg (ir
.regcache
,
8025 I387_MM0_REGNUM (tdep
) + ir
.rm
);
8028 case 0x660f71: /* psllw */
8029 case 0x660f72: /* pslld */
8030 case 0x660f73: /* psllq */
8031 if (i386_record_modrm (&ir
))
8034 if (!i386_xmm_regnum_p (gdbarch
, I387_XMM0_REGNUM (tdep
) + ir
.rm
))
8036 record_full_arch_list_add_reg (ir
.regcache
,
8037 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
8040 case 0x0f7e: /* movd */
8041 case 0x660f7e: /* movd */
8042 if (i386_record_modrm (&ir
))
8045 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
8052 if (i386_record_lea_modrm (&ir
))
8057 case 0x0f7f: /* movq */
8058 if (i386_record_modrm (&ir
))
8062 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.rm
))
8064 record_full_arch_list_add_reg (ir
.regcache
,
8065 I387_MM0_REGNUM (tdep
) + ir
.rm
);
8070 if (i386_record_lea_modrm (&ir
))
8075 case 0xf30fb8: /* popcnt */
8076 if (i386_record_modrm (&ir
))
8078 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
8079 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
8082 case 0x660fd6: /* movq */
8083 if (i386_record_modrm (&ir
))
8088 if (!i386_xmm_regnum_p (gdbarch
,
8089 I387_XMM0_REGNUM (tdep
) + ir
.rm
))
8091 record_full_arch_list_add_reg (ir
.regcache
,
8092 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
8097 if (i386_record_lea_modrm (&ir
))
8102 case 0x660f3817: /* ptest */
8103 case 0x0f2e: /* ucomiss */
8104 case 0x660f2e: /* ucomisd */
8105 case 0x0f2f: /* comiss */
8106 case 0x660f2f: /* comisd */
8107 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
8110 case 0x0ff7: /* maskmovq */
8111 regcache_raw_read_unsigned (ir
.regcache
,
8112 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
8114 if (record_full_arch_list_add_mem (addr
, 64))
8118 case 0x660ff7: /* maskmovdqu */
8119 regcache_raw_read_unsigned (ir
.regcache
,
8120 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
8122 if (record_full_arch_list_add_mem (addr
, 128))
8137 /* In the future, maybe still need to deal with need_dasm. */
8138 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REIP_REGNUM
);
8139 if (record_full_arch_list_add_end ())
8145 gdb_printf (gdb_stderr
,
8146 _("Process record does not support instruction 0x%02x "
8147 "at address %s.\n"),
8148 (unsigned int) (opcode
),
8149 paddress (gdbarch
, ir
.orig_addr
));
8153 static const int i386_record_regmap
[] =
8155 I386_EAX_REGNUM
, I386_ECX_REGNUM
, I386_EDX_REGNUM
, I386_EBX_REGNUM
,
8156 I386_ESP_REGNUM
, I386_EBP_REGNUM
, I386_ESI_REGNUM
, I386_EDI_REGNUM
,
8157 0, 0, 0, 0, 0, 0, 0, 0,
8158 I386_EIP_REGNUM
, I386_EFLAGS_REGNUM
, I386_CS_REGNUM
, I386_SS_REGNUM
,
8159 I386_DS_REGNUM
, I386_ES_REGNUM
, I386_FS_REGNUM
, I386_GS_REGNUM
8162 /* Check that the given address appears suitable for a fast
8163 tracepoint, which on x86-64 means that we need an instruction of at
8164 least 5 bytes, so that we can overwrite it with a 4-byte-offset
8165 jump and not have to worry about program jumps to an address in the
8166 middle of the tracepoint jump. On x86, it may be possible to use
8167 4-byte jumps with a 2-byte offset to a trampoline located in the
8168 bottom 64 KiB of memory. Returns 1 if OK, and writes a size
8169 of instruction to replace, and 0 if not, plus an explanatory
8173 i386_fast_tracepoint_valid_at (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
8178 /* Ask the target for the minimum instruction length supported. */
8179 jumplen
= target_get_min_fast_tracepoint_insn_len ();
8183 /* If the target does not support the get_min_fast_tracepoint_insn_len
8184 operation, assume that fast tracepoints will always be implemented
8185 using 4-byte relative jumps on both x86 and x86-64. */
8188 else if (jumplen
== 0)
8190 /* If the target does support get_min_fast_tracepoint_insn_len but
8191 returns zero, then the IPA has not loaded yet. In this case,
8192 we optimistically assume that truncated 2-byte relative jumps
8193 will be available on x86, and compensate later if this assumption
8194 turns out to be incorrect. On x86-64 architectures, 4-byte relative
8195 jumps will always be used. */
8196 jumplen
= (register_size (gdbarch
, 0) == 8) ? 5 : 4;
8199 /* Check for fit. */
8200 len
= gdb_insn_length (gdbarch
, addr
);
8204 /* Return a bit of target-specific detail to add to the caller's
8205 generic failure message. */
8207 *msg
= string_printf (_("; instruction is only %d bytes long, "
8208 "need at least %d bytes for the jump"),
8220 /* Return a floating-point format for a floating-point variable of
8221 length LEN in bits. If non-NULL, NAME is the name of its type.
8222 If no suitable type is found, return NULL. */
8224 static const struct floatformat
**
8225 i386_floatformat_for_type (struct gdbarch
*gdbarch
,
8226 const char *name
, int len
)
8228 if (len
== 128 && name
)
8229 if (strcmp (name
, "__float128") == 0
8230 || strcmp (name
, "_Float128") == 0
8231 || strcmp (name
, "complex _Float128") == 0
8232 || strcmp (name
, "complex(kind=16)") == 0
8233 || strcmp (name
, "complex*32") == 0
8234 || strcmp (name
, "COMPLEX*32") == 0
8235 || strcmp (name
, "quad complex") == 0
8236 || strcmp (name
, "real(kind=16)") == 0
8237 || strcmp (name
, "real*16") == 0
8238 || strcmp (name
, "REAL*16") == 0)
8239 return floatformats_ieee_quad
;
8241 return default_floatformat_for_type (gdbarch
, name
, len
);
8245 i386_validate_tdesc_p (i386_gdbarch_tdep
*tdep
,
8246 struct tdesc_arch_data
*tdesc_data
)
8248 const struct target_desc
*tdesc
= tdep
->tdesc
;
8249 const struct tdesc_feature
*feature_core
;
8251 const struct tdesc_feature
*feature_sse
, *feature_avx
, *feature_mpx
,
8252 *feature_avx512
, *feature_pkeys
, *feature_segments
;
8253 int i
, num_regs
, valid_p
;
8255 if (! tdesc_has_registers (tdesc
))
8258 /* Get core registers. */
8259 feature_core
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.core");
8260 if (feature_core
== NULL
)
8263 /* Get SSE registers. */
8264 feature_sse
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.sse");
8266 /* Try AVX registers. */
8267 feature_avx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx");
8269 /* Try MPX registers. */
8270 feature_mpx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx");
8272 /* Try AVX512 registers. */
8273 feature_avx512
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx512");
8275 /* Try segment base registers. */
8276 feature_segments
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.segments");
8279 feature_pkeys
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.pkeys");
8283 /* The XCR0 bits. */
8286 /* AVX512 register description requires AVX register description. */
8290 tdep
->xcr0
= X86_XSTATE_AVX_AVX512_MASK
;
8292 /* It may have been set by OSABI initialization function. */
8293 if (tdep
->k0_regnum
< 0)
8295 tdep
->k_register_names
= i386_k_names
;
8296 tdep
->k0_regnum
= I386_K0_REGNUM
;
8299 for (i
= 0; i
< I387_NUM_K_REGS
; i
++)
8300 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8301 tdep
->k0_regnum
+ i
,
8304 if (tdep
->num_zmm_regs
== 0)
8306 tdep
->zmmh_register_names
= i386_zmmh_names
;
8307 tdep
->num_zmm_regs
= 8;
8308 tdep
->zmm0h_regnum
= I386_ZMM0H_REGNUM
;
8311 for (i
= 0; i
< tdep
->num_zmm_regs
; i
++)
8312 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8313 tdep
->zmm0h_regnum
+ i
,
8314 tdep
->zmmh_register_names
[i
]);
8316 for (i
= 0; i
< tdep
->num_xmm_avx512_regs
; i
++)
8317 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8318 tdep
->xmm16_regnum
+ i
,
8319 tdep
->xmm_avx512_register_names
[i
]);
8321 for (i
= 0; i
< tdep
->num_ymm_avx512_regs
; i
++)
8322 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8323 tdep
->ymm16h_regnum
+ i
,
8324 tdep
->ymm16h_register_names
[i
]);
8328 /* AVX register description requires SSE register description. */
8332 if (!feature_avx512
)
8333 tdep
->xcr0
= X86_XSTATE_AVX_MASK
;
8335 /* It may have been set by OSABI initialization function. */
8336 if (tdep
->num_ymm_regs
== 0)
8338 tdep
->ymmh_register_names
= i386_ymmh_names
;
8339 tdep
->num_ymm_regs
= 8;
8340 tdep
->ymm0h_regnum
= I386_YMM0H_REGNUM
;
8343 for (i
= 0; i
< tdep
->num_ymm_regs
; i
++)
8344 valid_p
&= tdesc_numbered_register (feature_avx
, tdesc_data
,
8345 tdep
->ymm0h_regnum
+ i
,
8346 tdep
->ymmh_register_names
[i
]);
8348 else if (feature_sse
)
8349 tdep
->xcr0
= X86_XSTATE_SSE_MASK
;
8352 tdep
->xcr0
= X86_XSTATE_X87_MASK
;
8353 tdep
->num_xmm_regs
= 0;
8356 num_regs
= tdep
->num_core_regs
;
8357 for (i
= 0; i
< num_regs
; i
++)
8358 valid_p
&= tdesc_numbered_register (feature_core
, tdesc_data
, i
,
8359 tdep
->register_names
[i
]);
8363 /* Need to include %mxcsr, so add one. */
8364 num_regs
+= tdep
->num_xmm_regs
+ 1;
8365 for (; i
< num_regs
; i
++)
8366 valid_p
&= tdesc_numbered_register (feature_sse
, tdesc_data
, i
,
8367 tdep
->register_names
[i
]);
8372 tdep
->xcr0
|= X86_XSTATE_MPX_MASK
;
8374 if (tdep
->bnd0r_regnum
< 0)
8376 tdep
->mpx_register_names
= i386_mpx_names
;
8377 tdep
->bnd0r_regnum
= I386_BND0R_REGNUM
;
8378 tdep
->bndcfgu_regnum
= I386_BNDCFGU_REGNUM
;
8381 for (i
= 0; i
< I387_NUM_MPX_REGS
; i
++)
8382 valid_p
&= tdesc_numbered_register (feature_mpx
, tdesc_data
,
8383 I387_BND0R_REGNUM (tdep
) + i
,
8384 tdep
->mpx_register_names
[i
]);
8387 if (feature_segments
)
8389 if (tdep
->fsbase_regnum
< 0)
8390 tdep
->fsbase_regnum
= I386_FSBASE_REGNUM
;
8391 valid_p
&= tdesc_numbered_register (feature_segments
, tdesc_data
,
8392 tdep
->fsbase_regnum
, "fs_base");
8393 valid_p
&= tdesc_numbered_register (feature_segments
, tdesc_data
,
8394 tdep
->fsbase_regnum
+ 1, "gs_base");
8399 tdep
->xcr0
|= X86_XSTATE_PKRU
;
8400 if (tdep
->pkru_regnum
< 0)
8402 tdep
->pkeys_register_names
= i386_pkeys_names
;
8403 tdep
->pkru_regnum
= I386_PKRU_REGNUM
;
8404 tdep
->num_pkeys_regs
= 1;
8407 for (i
= 0; i
< I387_NUM_PKEYS_REGS
; i
++)
8408 valid_p
&= tdesc_numbered_register (feature_pkeys
, tdesc_data
,
8409 I387_PKRU_REGNUM (tdep
) + i
,
8410 tdep
->pkeys_register_names
[i
]);
8418 /* Implement the type_align gdbarch function. */
8421 i386_type_align (struct gdbarch
*gdbarch
, struct type
*type
)
8423 type
= check_typedef (type
);
8425 if (gdbarch_ptr_bit (gdbarch
) == 32)
8427 if ((type
->code () == TYPE_CODE_INT
8428 || type
->code () == TYPE_CODE_FLT
)
8429 && TYPE_LENGTH (type
) > 4)
8432 /* Handle x86's funny long double. */
8433 if (type
->code () == TYPE_CODE_FLT
8434 && gdbarch_long_double_bit (gdbarch
) == TYPE_LENGTH (type
) * 8)
8442 /* Note: This is called for both i386 and amd64. */
8444 static struct gdbarch
*
8445 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
8447 struct gdbarch
*gdbarch
;
8448 const struct target_desc
*tdesc
;
8454 /* If there is already a candidate, use it. */
8455 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
8457 return arches
->gdbarch
;
8459 /* Allocate space for the new architecture. Assume i386 for now. */
8460 i386_gdbarch_tdep
*tdep
= new i386_gdbarch_tdep
;
8461 gdbarch
= gdbarch_alloc (&info
, tdep
);
8463 /* General-purpose registers. */
8464 tdep
->gregset_reg_offset
= NULL
;
8465 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
8466 tdep
->sizeof_gregset
= 0;
8468 /* Floating-point registers. */
8469 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
8470 tdep
->fpregset
= &i386_fpregset
;
8472 /* The default settings include the FPU registers, the MMX registers
8473 and the SSE registers. This can be overridden for a specific ABI
8474 by adjusting the members `st0_regnum', `mm0_regnum' and
8475 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
8476 will show up in the output of "info all-registers". */
8478 tdep
->st0_regnum
= I386_ST0_REGNUM
;
8480 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
8481 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
8483 tdep
->jb_pc_offset
= -1;
8484 tdep
->struct_return
= pcc_struct_return
;
8485 tdep
->sigtramp_start
= 0;
8486 tdep
->sigtramp_end
= 0;
8487 tdep
->sigtramp_p
= i386_sigtramp_p
;
8488 tdep
->sigcontext_addr
= NULL
;
8489 tdep
->sc_reg_offset
= NULL
;
8490 tdep
->sc_pc_offset
= -1;
8491 tdep
->sc_sp_offset
= -1;
8493 tdep
->xsave_xcr0_offset
= -1;
8495 tdep
->record_regmap
= i386_record_regmap
;
8497 set_gdbarch_type_align (gdbarch
, i386_type_align
);
8499 /* The format used for `long double' on almost all i386 targets is
8500 the i387 extended floating-point format. In fact, of all targets
8501 in the GCC 2.95 tree, only OSF/1 does it different, and insists
8502 on having a `long double' that's not `long' at all. */
8503 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
8505 /* Although the i387 extended floating-point has only 80 significant
8506 bits, a `long double' actually takes up 96, probably to enforce
8508 set_gdbarch_long_double_bit (gdbarch
, 96);
8510 /* Support of bfloat16 format. */
8511 set_gdbarch_bfloat16_format (gdbarch
, floatformats_bfloat16
);
8513 /* Support for floating-point data type variants. */
8514 set_gdbarch_floatformat_for_type (gdbarch
, i386_floatformat_for_type
);
8516 /* Register numbers of various important registers. */
8517 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
8518 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
8519 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
8520 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
8522 /* NOTE: kettenis/20040418: GCC does have two possible register
8523 numbering schemes on the i386: dbx and SVR4. These schemes
8524 differ in how they number %ebp, %esp, %eflags, and the
8525 floating-point registers, and are implemented by the arrays
8526 dbx_register_map[] and svr4_dbx_register_map in
8527 gcc/config/i386.c. GCC also defines a third numbering scheme in
8528 gcc/config/i386.c, which it designates as the "default" register
8529 map used in 64bit mode. This last register numbering scheme is
8530 implemented in dbx64_register_map, and is used for AMD64; see
8533 Currently, each GCC i386 target always uses the same register
8534 numbering scheme across all its supported debugging formats
8535 i.e. SDB (COFF), stabs and DWARF 2. This is because
8536 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
8537 DBX_REGISTER_NUMBER macro which is defined by each target's
8538 respective config header in a manner independent of the requested
8539 output debugging format.
8541 This does not match the arrangement below, which presumes that
8542 the SDB and stabs numbering schemes differ from the DWARF and
8543 DWARF 2 ones. The reason for this arrangement is that it is
8544 likely to get the numbering scheme for the target's
8545 default/native debug format right. For targets where GCC is the
8546 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
8547 targets where the native toolchain uses a different numbering
8548 scheme for a particular debug format (stabs-in-ELF on Solaris)
8549 the defaults below will have to be overridden, like
8550 i386_elf_init_abi() does. */
8552 /* Use the dbx register numbering scheme for stabs and COFF. */
8553 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
8554 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
8556 /* Use the SVR4 register numbering scheme for DWARF 2. */
8557 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_dwarf_reg_to_regnum
);
8559 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
8560 be in use on any of the supported i386 targets. */
8562 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
8564 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
8566 /* Call dummy code. */
8567 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
8568 set_gdbarch_push_dummy_code (gdbarch
, i386_push_dummy_code
);
8569 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
8570 set_gdbarch_frame_align (gdbarch
, i386_frame_align
);
8572 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
8573 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
8574 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
8576 set_gdbarch_return_value (gdbarch
, i386_return_value
);
8578 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
8580 /* Stack grows downward. */
8581 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
8583 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, i386_breakpoint::kind_from_pc
);
8584 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, i386_breakpoint::bp_from_kind
);
8586 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
8587 set_gdbarch_max_insn_length (gdbarch
, I386_MAX_INSN_LEN
);
8589 set_gdbarch_frame_args_skip (gdbarch
, 8);
8591 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
8593 set_gdbarch_dummy_id (gdbarch
, i386_dummy_id
);
8595 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
8597 /* Add the i386 register groups. */
8598 i386_add_reggroups (gdbarch
);
8599 tdep
->register_reggroup_p
= i386_register_reggroup_p
;
8601 /* Helper for function argument information. */
8602 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
8604 /* Hook the function epilogue frame unwinder. This unwinder is
8605 appended to the list first, so that it supercedes the DWARF
8606 unwinder in function epilogues (where the DWARF unwinder
8607 currently fails). */
8608 frame_unwind_append_unwinder (gdbarch
, &i386_epilogue_frame_unwind
);
8610 /* Hook in the DWARF CFI frame unwinder. This unwinder is appended
8611 to the list before the prologue-based unwinders, so that DWARF
8612 CFI info will be used if it is available. */
8613 dwarf2_append_unwinders (gdbarch
);
8615 frame_base_set_default (gdbarch
, &i386_frame_base
);
8617 /* Pseudo registers may be changed by amd64_init_abi. */
8618 set_gdbarch_pseudo_register_read_value (gdbarch
,
8619 i386_pseudo_register_read_value
);
8620 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
8621 set_gdbarch_ax_pseudo_register_collect (gdbarch
,
8622 i386_ax_pseudo_register_collect
);
8624 set_tdesc_pseudo_register_type (gdbarch
, i386_pseudo_register_type
);
8625 set_tdesc_pseudo_register_name (gdbarch
, i386_pseudo_register_name
);
8627 /* Override the normal target description method to make the AVX
8628 upper halves anonymous. */
8629 set_gdbarch_register_name (gdbarch
, i386_register_name
);
8631 /* Even though the default ABI only includes general-purpose registers,
8632 floating-point registers and the SSE registers, we have to leave a
8633 gap for the upper AVX, MPX and AVX512 registers. */
8634 set_gdbarch_num_regs (gdbarch
, I386_NUM_REGS
);
8636 set_gdbarch_gnu_triplet_regexp (gdbarch
, i386_gnu_triplet_regexp
);
8638 /* Get the x86 target description from INFO. */
8639 tdesc
= info
.target_desc
;
8640 if (! tdesc_has_registers (tdesc
))
8641 tdesc
= i386_target_description (X86_XSTATE_SSE_MASK
, false);
8642 tdep
->tdesc
= tdesc
;
8644 tdep
->num_core_regs
= I386_NUM_GREGS
+ I387_NUM_REGS
;
8645 tdep
->register_names
= i386_register_names
;
8647 /* No upper YMM registers. */
8648 tdep
->ymmh_register_names
= NULL
;
8649 tdep
->ymm0h_regnum
= -1;
8651 /* No upper ZMM registers. */
8652 tdep
->zmmh_register_names
= NULL
;
8653 tdep
->zmm0h_regnum
= -1;
8655 /* No high XMM registers. */
8656 tdep
->xmm_avx512_register_names
= NULL
;
8657 tdep
->xmm16_regnum
= -1;
8659 /* No upper YMM16-31 registers. */
8660 tdep
->ymm16h_register_names
= NULL
;
8661 tdep
->ymm16h_regnum
= -1;
8663 tdep
->num_byte_regs
= 8;
8664 tdep
->num_word_regs
= 8;
8665 tdep
->num_dword_regs
= 0;
8666 tdep
->num_mmx_regs
= 8;
8667 tdep
->num_ymm_regs
= 0;
8669 /* No MPX registers. */
8670 tdep
->bnd0r_regnum
= -1;
8671 tdep
->bndcfgu_regnum
= -1;
8673 /* No AVX512 registers. */
8674 tdep
->k0_regnum
= -1;
8675 tdep
->num_zmm_regs
= 0;
8676 tdep
->num_ymm_avx512_regs
= 0;
8677 tdep
->num_xmm_avx512_regs
= 0;
8679 /* No PKEYS registers */
8680 tdep
->pkru_regnum
= -1;
8681 tdep
->num_pkeys_regs
= 0;
8683 /* No segment base registers. */
8684 tdep
->fsbase_regnum
= -1;
8686 tdesc_arch_data_up tdesc_data
= tdesc_data_alloc ();
8688 set_gdbarch_relocate_instruction (gdbarch
, i386_relocate_instruction
);
8690 set_gdbarch_gen_return_address (gdbarch
, i386_gen_return_address
);
8692 set_gdbarch_insn_is_call (gdbarch
, i386_insn_is_call
);
8693 set_gdbarch_insn_is_ret (gdbarch
, i386_insn_is_ret
);
8694 set_gdbarch_insn_is_jump (gdbarch
, i386_insn_is_jump
);
8696 /* Hook in ABI-specific overrides, if they have been registered.
8697 Note: If INFO specifies a 64 bit arch, this is where we turn
8698 a 32-bit i386 into a 64-bit amd64. */
8699 info
.tdesc_data
= tdesc_data
.get ();
8700 gdbarch_init_osabi (info
, gdbarch
);
8702 if (!i386_validate_tdesc_p (tdep
, tdesc_data
.get ()))
8705 gdbarch_free (gdbarch
);
8709 num_bnd_cooked
= (tdep
->bnd0r_regnum
> 0 ? I387_NUM_BND_REGS
: 0);
8711 /* Wire in pseudo registers. Number of pseudo registers may be
8713 set_gdbarch_num_pseudo_regs (gdbarch
, (tdep
->num_byte_regs
8714 + tdep
->num_word_regs
8715 + tdep
->num_dword_regs
8716 + tdep
->num_mmx_regs
8717 + tdep
->num_ymm_regs
8719 + tdep
->num_ymm_avx512_regs
8720 + tdep
->num_zmm_regs
));
8722 /* Target description may be changed. */
8723 tdesc
= tdep
->tdesc
;
8725 tdesc_use_registers (gdbarch
, tdesc
, std::move (tdesc_data
));
8727 /* Override gdbarch_register_reggroup_p set in tdesc_use_registers. */
8728 set_gdbarch_register_reggroup_p (gdbarch
, tdep
->register_reggroup_p
);
8730 /* Make %al the first pseudo-register. */
8731 tdep
->al_regnum
= gdbarch_num_regs (gdbarch
);
8732 tdep
->ax_regnum
= tdep
->al_regnum
+ tdep
->num_byte_regs
;
8734 ymm0_regnum
= tdep
->ax_regnum
+ tdep
->num_word_regs
;
8735 if (tdep
->num_dword_regs
)
8737 /* Support dword pseudo-register if it hasn't been disabled. */
8738 tdep
->eax_regnum
= ymm0_regnum
;
8739 ymm0_regnum
+= tdep
->num_dword_regs
;
8742 tdep
->eax_regnum
= -1;
8744 mm0_regnum
= ymm0_regnum
;
8745 if (tdep
->num_ymm_regs
)
8747 /* Support YMM pseudo-register if it is available. */
8748 tdep
->ymm0_regnum
= ymm0_regnum
;
8749 mm0_regnum
+= tdep
->num_ymm_regs
;
8752 tdep
->ymm0_regnum
= -1;
8754 if (tdep
->num_ymm_avx512_regs
)
8756 /* Support YMM16-31 pseudo registers if available. */
8757 tdep
->ymm16_regnum
= mm0_regnum
;
8758 mm0_regnum
+= tdep
->num_ymm_avx512_regs
;
8761 tdep
->ymm16_regnum
= -1;
8763 if (tdep
->num_zmm_regs
)
8765 /* Support ZMM pseudo-register if it is available. */
8766 tdep
->zmm0_regnum
= mm0_regnum
;
8767 mm0_regnum
+= tdep
->num_zmm_regs
;
8770 tdep
->zmm0_regnum
= -1;
8772 bnd0_regnum
= mm0_regnum
;
8773 if (tdep
->num_mmx_regs
!= 0)
8775 /* Support MMX pseudo-register if MMX hasn't been disabled. */
8776 tdep
->mm0_regnum
= mm0_regnum
;
8777 bnd0_regnum
+= tdep
->num_mmx_regs
;
8780 tdep
->mm0_regnum
= -1;
8782 if (tdep
->bnd0r_regnum
> 0)
8783 tdep
->bnd0_regnum
= bnd0_regnum
;
8785 tdep
-> bnd0_regnum
= -1;
8787 /* Hook in the legacy prologue-based unwinders last (fallback). */
8788 frame_unwind_append_unwinder (gdbarch
, &i386_stack_tramp_frame_unwind
);
8789 frame_unwind_append_unwinder (gdbarch
, &i386_sigtramp_frame_unwind
);
8790 frame_unwind_append_unwinder (gdbarch
, &i386_frame_unwind
);
8792 /* If we have a register mapping, enable the generic core file
8793 support, unless it has already been enabled. */
8794 if (tdep
->gregset_reg_offset
8795 && !gdbarch_iterate_over_regset_sections_p (gdbarch
))
8796 set_gdbarch_iterate_over_regset_sections
8797 (gdbarch
, i386_iterate_over_regset_sections
);
8799 set_gdbarch_fast_tracepoint_valid_at (gdbarch
,
8800 i386_fast_tracepoint_valid_at
);
8807 /* Return the target description for a specified XSAVE feature mask. */
8809 const struct target_desc
*
8810 i386_target_description (uint64_t xcr0
, bool segments
)
8812 static target_desc
*i386_tdescs \
8813 [2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
8814 target_desc
**tdesc
;
8816 tdesc
= &i386_tdescs
[(xcr0
& X86_XSTATE_SSE
) ? 1 : 0]
8817 [(xcr0
& X86_XSTATE_AVX
) ? 1 : 0]
8818 [(xcr0
& X86_XSTATE_MPX
) ? 1 : 0]
8819 [(xcr0
& X86_XSTATE_AVX512
) ? 1 : 0]
8820 [(xcr0
& X86_XSTATE_PKRU
) ? 1 : 0]
8824 *tdesc
= i386_create_target_description (xcr0
, false, segments
);
8829 #define MPX_BASE_MASK (~(ULONGEST) 0xfff)
8831 /* Find the bound directory base address. */
8833 static unsigned long
8834 i386_mpx_bd_base (void)
8836 struct regcache
*rcache
;
8838 enum register_status regstatus
;
8840 rcache
= get_current_regcache ();
8841 gdbarch
*arch
= rcache
->arch ();
8842 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (arch
);
8844 regstatus
= regcache_raw_read_unsigned (rcache
, tdep
->bndcfgu_regnum
, &ret
);
8846 if (regstatus
!= REG_VALID
)
8847 error (_("BNDCFGU register invalid, read status %d."), regstatus
);
8849 return ret
& MPX_BASE_MASK
;
8853 i386_mpx_enabled (void)
8855 gdbarch
*arch
= get_current_arch ();
8856 i386_gdbarch_tdep
*tdep
= (i386_gdbarch_tdep
*) gdbarch_tdep (arch
);
8857 const struct target_desc
*tdesc
= tdep
->tdesc
;
8859 return (tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx") != NULL
);
8862 #define MPX_BD_MASK 0xfffffff00000ULL /* select bits [47:20] */
8863 #define MPX_BT_MASK 0x0000000ffff8 /* select bits [19:3] */
8864 #define MPX_BD_MASK_32 0xfffff000 /* select bits [31:12] */
8865 #define MPX_BT_MASK_32 0x00000ffc /* select bits [11:2] */
8867 /* Find the bound table entry given the pointer location and the base
8868 address of the table. */
8871 i386_mpx_get_bt_entry (CORE_ADDR ptr
, CORE_ADDR bd_base
)
8875 CORE_ADDR mpx_bd_mask
, bd_ptr_r_shift
, bd_ptr_l_shift
;
8876 CORE_ADDR bt_mask
, bt_select_r_shift
, bt_select_l_shift
;
8877 CORE_ADDR bd_entry_addr
;
8880 struct gdbarch
*gdbarch
= get_current_arch ();
8881 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8884 if (gdbarch_ptr_bit (gdbarch
) == 64)
8886 mpx_bd_mask
= (CORE_ADDR
) MPX_BD_MASK
;
8887 bd_ptr_r_shift
= 20;
8889 bt_select_r_shift
= 3;
8890 bt_select_l_shift
= 5;
8891 bt_mask
= (CORE_ADDR
) MPX_BT_MASK
;
8893 if ( sizeof (CORE_ADDR
) == 4)
8894 error (_("bound table examination not supported\
8895 for 64-bit process with 32-bit GDB"));
8899 mpx_bd_mask
= MPX_BD_MASK_32
;
8900 bd_ptr_r_shift
= 12;
8902 bt_select_r_shift
= 2;
8903 bt_select_l_shift
= 4;
8904 bt_mask
= MPX_BT_MASK_32
;
8907 offset1
= ((ptr
& mpx_bd_mask
) >> bd_ptr_r_shift
) << bd_ptr_l_shift
;
8908 bd_entry_addr
= bd_base
+ offset1
;
8909 bd_entry
= read_memory_typed_address (bd_entry_addr
, data_ptr_type
);
8911 if ((bd_entry
& 0x1) == 0)
8912 error (_("Invalid bounds directory entry at %s."),
8913 paddress (get_current_arch (), bd_entry_addr
));
8915 /* Clearing status bit. */
8917 bt_addr
= bd_entry
& ~bt_select_r_shift
;
8918 offset2
= ((ptr
& bt_mask
) >> bt_select_r_shift
) << bt_select_l_shift
;
8920 return bt_addr
+ offset2
;
8923 /* Print routine for the mpx bounds. */
8926 i386_mpx_print_bounds (const CORE_ADDR bt_entry
[4])
8928 struct ui_out
*uiout
= current_uiout
;
8930 struct gdbarch
*gdbarch
= get_current_arch ();
8931 CORE_ADDR onecompl
= ~((CORE_ADDR
) 0);
8932 int bounds_in_map
= ((~bt_entry
[1] == 0 && bt_entry
[0] == onecompl
) ? 1 : 0);
8934 if (bounds_in_map
== 1)
8936 uiout
->text ("Null bounds on map:");
8937 uiout
->text (" pointer value = ");
8938 uiout
->field_core_addr ("pointer-value", gdbarch
, bt_entry
[2]);
8944 uiout
->text ("{lbound = ");
8945 uiout
->field_core_addr ("lower-bound", gdbarch
, bt_entry
[0]);
8946 uiout
->text (", ubound = ");
8948 /* The upper bound is stored in 1's complement. */
8949 uiout
->field_core_addr ("upper-bound", gdbarch
, ~bt_entry
[1]);
8950 uiout
->text ("}: pointer value = ");
8951 uiout
->field_core_addr ("pointer-value", gdbarch
, bt_entry
[2]);
8953 if (gdbarch_ptr_bit (gdbarch
) == 64)
8954 size
= ( (~(int64_t) bt_entry
[1]) - (int64_t) bt_entry
[0]);
8956 size
= ( ~((int32_t) bt_entry
[1]) - (int32_t) bt_entry
[0]);
8958 /* In case the bounds are 0x0 and 0xffff... the difference will be -1.
8959 -1 represents in this sense full memory access, and there is no need
8962 size
= (size
> -1 ? size
+ 1 : size
);
8963 uiout
->text (", size = ");
8964 uiout
->field_string ("size", plongest (size
));
8966 uiout
->text (", metadata = ");
8967 uiout
->field_core_addr ("metadata", gdbarch
, bt_entry
[3]);
8972 /* Implement the command "show mpx bound". */
8975 i386_mpx_info_bounds (const char *args
, int from_tty
)
8977 CORE_ADDR bd_base
= 0;
8979 CORE_ADDR bt_entry_addr
= 0;
8980 CORE_ADDR bt_entry
[4];
8982 struct gdbarch
*gdbarch
= get_current_arch ();
8983 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8985 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_i386
8986 || !i386_mpx_enabled ())
8988 gdb_printf (_("Intel Memory Protection Extensions not "
8989 "supported on this target.\n"));
8995 gdb_printf (_("Address of pointer variable expected.\n"));
8999 addr
= parse_and_eval_address (args
);
9001 bd_base
= i386_mpx_bd_base ();
9002 bt_entry_addr
= i386_mpx_get_bt_entry (addr
, bd_base
);
9004 memset (bt_entry
, 0, sizeof (bt_entry
));
9006 for (i
= 0; i
< 4; i
++)
9007 bt_entry
[i
] = read_memory_typed_address (bt_entry_addr
9008 + i
* TYPE_LENGTH (data_ptr_type
),
9011 i386_mpx_print_bounds (bt_entry
);
9014 /* Implement the command "set mpx bound". */
9017 i386_mpx_set_bounds (const char *args
, int from_tty
)
9019 CORE_ADDR bd_base
= 0;
9020 CORE_ADDR addr
, lower
, upper
;
9021 CORE_ADDR bt_entry_addr
= 0;
9022 CORE_ADDR bt_entry
[2];
9023 const char *input
= args
;
9025 struct gdbarch
*gdbarch
= get_current_arch ();
9026 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
9027 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
9029 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_i386
9030 || !i386_mpx_enabled ())
9031 error (_("Intel Memory Protection Extensions not supported\
9035 error (_("Pointer value expected."));
9037 addr
= value_as_address (parse_to_comma_and_eval (&input
));
9039 if (input
[0] == ',')
9041 if (input
[0] == '\0')
9042 error (_("wrong number of arguments: missing lower and upper bound."));
9043 lower
= value_as_address (parse_to_comma_and_eval (&input
));
9045 if (input
[0] == ',')
9047 if (input
[0] == '\0')
9048 error (_("Wrong number of arguments; Missing upper bound."));
9049 upper
= value_as_address (parse_to_comma_and_eval (&input
));
9051 bd_base
= i386_mpx_bd_base ();
9052 bt_entry_addr
= i386_mpx_get_bt_entry (addr
, bd_base
);
9053 for (i
= 0; i
< 2; i
++)
9054 bt_entry
[i
] = read_memory_typed_address (bt_entry_addr
9055 + i
* TYPE_LENGTH (data_ptr_type
),
9057 bt_entry
[0] = (uint64_t) lower
;
9058 bt_entry
[1] = ~(uint64_t) upper
;
9060 for (i
= 0; i
< 2; i
++)
9061 write_memory_unsigned_integer (bt_entry_addr
9062 + i
* TYPE_LENGTH (data_ptr_type
),
9063 TYPE_LENGTH (data_ptr_type
), byte_order
,
9067 static struct cmd_list_element
*mpx_set_cmdlist
, *mpx_show_cmdlist
;
9069 void _initialize_i386_tdep ();
9071 _initialize_i386_tdep ()
9073 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
9075 /* Add the variable that controls the disassembly flavor. */
9076 add_setshow_enum_cmd ("disassembly-flavor", no_class
, valid_flavors
,
9077 &disassembly_flavor
, _("\
9078 Set the disassembly flavor."), _("\
9079 Show the disassembly flavor."), _("\
9080 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
9082 NULL
, /* FIXME: i18n: */
9083 &setlist
, &showlist
);
9085 /* Add the variable that controls the convention for returning
9087 add_setshow_enum_cmd ("struct-convention", no_class
, valid_conventions
,
9088 &struct_convention
, _("\
9089 Set the convention for returning small structs."), _("\
9090 Show the convention for returning small structs."), _("\
9091 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
9094 NULL
, /* FIXME: i18n: */
9095 &setlist
, &showlist
);
9097 /* Add "mpx" prefix for the set and show commands. */
9099 add_setshow_prefix_cmd
9100 ("mpx", class_support
,
9101 _("Set Intel Memory Protection Extensions specific variables."),
9102 _("Show Intel Memory Protection Extensions specific variables."),
9103 &mpx_set_cmdlist
, &mpx_show_cmdlist
, &setlist
, &showlist
);
9105 /* Add "bound" command for the show mpx commands list. */
9107 add_cmd ("bound", no_class
, i386_mpx_info_bounds
,
9108 "Show the memory bounds for a given array/pointer storage\
9109 in the bound table.",
9112 /* Add "bound" command for the set mpx commands list. */
9114 add_cmd ("bound", no_class
, i386_mpx_set_bounds
,
9115 "Set the memory bounds for a given array/pointer storage\
9116 in the bound table.",
9119 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
9120 i386_svr4_init_abi
);
9122 /* Initialize the i386-specific register groups. */
9123 i386_init_reggroups ();
9125 /* Tell remote stub that we support XML target description. */
9126 register_remote_support_xml ("i386");