1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
25 #include "arch-utils.h"
27 #include "dummy-frame.h"
28 #include "dwarf2-frame.h"
30 #include "floatformat.h"
32 #include "frame-base.h"
33 #include "frame-unwind.h"
40 #include "reggroups.h"
48 #include "gdb_assert.h"
49 #include "gdb_string.h"
51 #include "i386-tdep.h"
52 #include "i387-tdep.h"
56 static char *i386_register_names
[] =
58 "eax", "ecx", "edx", "ebx",
59 "esp", "ebp", "esi", "edi",
60 "eip", "eflags", "cs", "ss",
61 "ds", "es", "fs", "gs",
62 "st0", "st1", "st2", "st3",
63 "st4", "st5", "st6", "st7",
64 "fctrl", "fstat", "ftag", "fiseg",
65 "fioff", "foseg", "fooff", "fop",
66 "xmm0", "xmm1", "xmm2", "xmm3",
67 "xmm4", "xmm5", "xmm6", "xmm7",
71 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
73 /* Register names for MMX pseudo-registers. */
75 static char *i386_mmx_names
[] =
77 "mm0", "mm1", "mm2", "mm3",
78 "mm4", "mm5", "mm6", "mm7"
81 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
84 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
86 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
91 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
97 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
99 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
101 #define I387_ST0_REGNUM tdep->st0_regnum
102 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
104 if (I387_NUM_XMM_REGS
== 0)
107 return (I387_XMM0_REGNUM
<= regnum
&& regnum
< I387_MXCSR_REGNUM
);
109 #undef I387_ST0_REGNUM
110 #undef I387_NUM_XMM_REGS
114 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
116 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
118 #define I387_ST0_REGNUM tdep->st0_regnum
119 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
121 if (I387_NUM_XMM_REGS
== 0)
124 return (regnum
== I387_MXCSR_REGNUM
);
126 #undef I387_ST0_REGNUM
127 #undef I387_NUM_XMM_REGS
130 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
131 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
132 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
137 i386_fp_regnum_p (int regnum
)
139 if (I387_ST0_REGNUM
< 0)
142 return (I387_ST0_REGNUM
<= regnum
&& regnum
< I387_FCTRL_REGNUM
);
146 i386_fpc_regnum_p (int regnum
)
148 if (I387_ST0_REGNUM
< 0)
151 return (I387_FCTRL_REGNUM
<= regnum
&& regnum
< I387_XMM0_REGNUM
);
154 /* Return the name of register REG. */
157 i386_register_name (int reg
)
159 if (i386_mmx_regnum_p (current_gdbarch
, reg
))
160 return i386_mmx_names
[reg
- I387_MM0_REGNUM
];
162 if (reg
>= 0 && reg
< i386_num_register_names
)
163 return i386_register_names
[reg
];
168 /* Convert a dbx register number REG to the appropriate register
169 number used by GDB. */
172 i386_dbx_reg_to_regnum (int reg
)
174 /* This implements what GCC calls the "default" register map
175 (dbx_register_map[]). */
177 if (reg
>= 0 && reg
<= 7)
179 /* General-purpose registers. The debug info calls %ebp
180 register 4, and %esp register 5. */
187 else if (reg
>= 12 && reg
<= 19)
189 /* Floating-point registers. */
190 return reg
- 12 + I387_ST0_REGNUM
;
192 else if (reg
>= 21 && reg
<= 28)
195 return reg
- 21 + I387_XMM0_REGNUM
;
197 else if (reg
>= 29 && reg
<= 36)
200 return reg
- 29 + I387_MM0_REGNUM
;
203 /* This will hopefully provoke a warning. */
204 return NUM_REGS
+ NUM_PSEUDO_REGS
;
207 /* Convert SVR4 register number REG to the appropriate register number
211 i386_svr4_reg_to_regnum (int reg
)
213 /* This implements the GCC register map that tries to be compatible
214 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
216 /* The SVR4 register numbering includes %eip and %eflags, and
217 numbers the floating point registers differently. */
218 if (reg
>= 0 && reg
<= 9)
220 /* General-purpose registers. */
223 else if (reg
>= 11 && reg
<= 18)
225 /* Floating-point registers. */
226 return reg
- 11 + I387_ST0_REGNUM
;
230 /* The SSE and MMX registers have the same numbers as with dbx. */
231 return i386_dbx_reg_to_regnum (reg
);
234 /* This will hopefully provoke a warning. */
235 return NUM_REGS
+ NUM_PSEUDO_REGS
;
238 #undef I387_ST0_REGNUM
239 #undef I387_MM0_REGNUM
240 #undef I387_NUM_XMM_REGS
243 /* This is the variable that is set with "set disassembly-flavor", and
244 its legitimate values. */
245 static const char att_flavor
[] = "att";
246 static const char intel_flavor
[] = "intel";
247 static const char *valid_flavors
[] =
253 static const char *disassembly_flavor
= att_flavor
;
256 /* Use the program counter to determine the contents and size of a
257 breakpoint instruction. Return a pointer to a string of bytes that
258 encode a breakpoint instruction, store the length of the string in
259 *LEN and optionally adjust *PC to point to the correct memory
260 location for inserting the breakpoint.
262 On the i386 we have a single breakpoint that fits in a single byte
263 and can be inserted anywhere.
265 This function is 64-bit safe. */
267 static const unsigned char *
268 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
270 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
272 *len
= sizeof (break_insn
);
276 #ifdef I386_REGNO_TO_SYMMETRY
277 #error "The Sequent Symmetry is no longer supported."
280 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
281 and %esp "belong" to the calling function. Therefore these
282 registers should be saved if they're going to be modified. */
284 /* The maximum number of saved registers. This should include all
285 registers mentioned above, and %eip. */
286 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
288 struct i386_frame_cache
295 /* Saved registers. */
296 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
300 /* Stack space reserved for local variables. */
304 /* Allocate and initialize a frame cache. */
306 static struct i386_frame_cache
*
307 i386_alloc_frame_cache (void)
309 struct i386_frame_cache
*cache
;
312 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
316 cache
->sp_offset
= -4;
319 /* Saved registers. We initialize these to -1 since zero is a valid
320 offset (that's where %ebp is supposed to be stored). */
321 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
322 cache
->saved_regs
[i
] = -1;
324 cache
->pc_in_eax
= 0;
326 /* Frameless until proven otherwise. */
332 /* If the instruction at PC is a jump, return the address of its
333 target. Otherwise, return PC. */
336 i386_follow_jump (CORE_ADDR pc
)
342 op
= read_memory_unsigned_integer (pc
, 1);
346 op
= read_memory_unsigned_integer (pc
+ 1, 1);
352 /* Relative jump: if data16 == 0, disp32, else disp16. */
355 delta
= read_memory_integer (pc
+ 2, 2);
357 /* Include the size of the jmp instruction (including the
363 delta
= read_memory_integer (pc
+ 1, 4);
365 /* Include the size of the jmp instruction. */
370 /* Relative jump, disp8 (ignore data16). */
371 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
380 /* Check whether PC points at a prologue for a function returning a
381 structure or union. If so, it updates CACHE and returns the
382 address of the first instruction after the code sequence that
383 removes the "hidden" argument from the stack or CURRENT_PC,
384 whichever is smaller. Otherwise, return PC. */
387 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
388 struct i386_frame_cache
*cache
)
390 /* Functions that return a structure or union start with:
393 xchgl %eax, (%esp) 0x87 0x04 0x24
394 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
396 (the System V compiler puts out the second `xchg' instruction,
397 and the assembler doesn't try to optimize it, so the 'sib' form
398 gets generated). This sequence is used to get the address of the
399 return buffer for a function that returns a structure. */
400 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
401 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
402 unsigned char buf
[4];
405 if (current_pc
<= pc
)
408 op
= read_memory_unsigned_integer (pc
, 1);
410 if (op
!= 0x58) /* popl %eax */
413 read_memory (pc
+ 1, buf
, 4);
414 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
417 if (current_pc
== pc
)
419 cache
->sp_offset
+= 4;
423 if (current_pc
== pc
+ 1)
425 cache
->pc_in_eax
= 1;
429 if (buf
[1] == proto1
[1])
436 i386_skip_probe (CORE_ADDR pc
)
438 /* A function may start with
449 unsigned char buf
[8];
452 op
= read_memory_unsigned_integer (pc
, 1);
454 if (op
== 0x68 || op
== 0x6a)
458 /* Skip past the `pushl' instruction; it has either a one-byte or a
459 four-byte operand, depending on the opcode. */
465 /* Read the following 8 bytes, which should be `call _probe' (6
466 bytes) followed by `addl $4,%esp' (2 bytes). */
467 read_memory (pc
+ delta
, buf
, sizeof (buf
));
468 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
469 pc
+= delta
+ sizeof (buf
);
475 /* Check whether PC points at a code that sets up a new stack frame.
476 If so, it updates CACHE and returns the address of the first
477 instruction after the sequence that sets removes the "hidden"
478 argument from the stack or CURRENT_PC, whichever is smaller.
479 Otherwise, return PC. */
482 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
483 struct i386_frame_cache
*cache
)
488 if (current_pc
<= pc
)
491 op
= read_memory_unsigned_integer (pc
, 1);
493 if (op
== 0x55) /* pushl %ebp */
495 /* Take into account that we've executed the `pushl %ebp' that
496 starts this instruction sequence. */
497 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
498 cache
->sp_offset
+= 4;
500 /* If that's all, return now. */
501 if (current_pc
<= pc
+ 1)
504 op
= read_memory_unsigned_integer (pc
+ 1, 1);
506 /* Check for some special instructions that might be migrated
507 by GCC into the prologue. We check for
521 Because of the symmetry, there are actually two ways to
522 encode these instructions; with opcode bytes 0x29 and 0x2b
523 for `subl' and opcode bytes 0x31 and 0x33 for `xorl'.
525 Make sure we only skip these instructions if we later see the
526 `movl %esp, %ebp' that actually sets up the frame. */
527 while (op
== 0x29 || op
== 0x2b || op
== 0x31 || op
== 0x33)
529 op
= read_memory_unsigned_integer (pc
+ skip
+ 2, 1);
532 case 0xdb: /* %ebx */
533 case 0xc9: /* %ecx */
534 case 0xd2: /* %edx */
535 case 0xc0: /* %eax */
542 op
= read_memory_unsigned_integer (pc
+ skip
+ 1, 1);
545 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
549 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xec)
553 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xe5)
560 /* OK, we actually have a frame. We just don't know how large
561 it is yet. Set its size to zero. We'll adjust it if
562 necessary. We also now commit to skipping the special
563 instructions mentioned before. */
567 /* If that's all, return now. */
568 if (current_pc
<= pc
+ 3)
571 /* Check for stack adjustment
575 NOTE: You can't subtract a 16-bit immediate from a 32-bit
576 reg, so we don't have to worry about a data16 prefix. */
577 op
= read_memory_unsigned_integer (pc
+ 3, 1);
580 /* `subl' with 8-bit immediate. */
581 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
582 /* Some instruction starting with 0x83 other than `subl'. */
585 /* `subl' with signed byte immediate (though it wouldn't make
586 sense to be negative). */
587 cache
->locals
= read_memory_integer (pc
+ 5, 1);
592 /* Maybe it is `subl' with a 32-bit immediate. */
593 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
594 /* Some instruction starting with 0x81 other than `subl'. */
597 /* It is `subl' with a 32-bit immediate. */
598 cache
->locals
= read_memory_integer (pc
+ 5, 4);
603 /* Some instruction other than `subl'. */
607 else if (op
== 0xc8) /* enter $XXX */
609 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
616 /* Check whether PC points at code that saves registers on the stack.
617 If so, it updates CACHE and returns the address of the first
618 instruction after the register saves or CURRENT_PC, whichever is
619 smaller. Otherwise, return PC. */
622 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
623 struct i386_frame_cache
*cache
)
625 CORE_ADDR offset
= 0;
629 if (cache
->locals
> 0)
630 offset
-= cache
->locals
;
631 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
633 op
= read_memory_unsigned_integer (pc
, 1);
634 if (op
< 0x50 || op
> 0x57)
638 cache
->saved_regs
[op
- 0x50] = offset
;
639 cache
->sp_offset
+= 4;
646 /* Do a full analysis of the prologue at PC and update CACHE
647 accordingly. Bail out early if CURRENT_PC is reached. Return the
648 address where the analysis stopped.
650 We handle these cases:
652 The startup sequence can be at the start of the function, or the
653 function can start with a branch to startup code at the end.
655 %ebp can be set up with either the 'enter' instruction, or "pushl
656 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
657 once used in the System V compiler).
659 Local space is allocated just below the saved %ebp by either the
660 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
661 16-bit unsigned argument for space to allocate, and the 'addl'
662 instruction could have either a signed byte, or 32-bit immediate.
664 Next, the registers used by this function are pushed. With the
665 System V compiler they will always be in the order: %edi, %esi,
666 %ebx (and sometimes a harmless bug causes it to also save but not
667 restore %eax); however, the code below is willing to see the pushes
668 in any order, and will handle up to 8 of them.
670 If the setup sequence is at the end of the function, then the next
671 instruction will be a branch back to the start. */
674 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
675 struct i386_frame_cache
*cache
)
677 pc
= i386_follow_jump (pc
);
678 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
679 pc
= i386_skip_probe (pc
);
680 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
681 return i386_analyze_register_saves (pc
, current_pc
, cache
);
684 /* Return PC of first real instruction. */
687 i386_skip_prologue (CORE_ADDR start_pc
)
689 static unsigned char pic_pat
[6] =
691 0xe8, 0, 0, 0, 0, /* call 0x0 */
692 0x5b, /* popl %ebx */
694 struct i386_frame_cache cache
;
700 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
701 if (cache
.locals
< 0)
704 /* Found valid frame setup. */
706 /* The native cc on SVR4 in -K PIC mode inserts the following code
707 to get the address of the global offset table (GOT) into register
712 movl %ebx,x(%ebp) (optional)
715 This code is with the rest of the prologue (at the end of the
716 function), so we have to skip it to get to the first real
717 instruction at the start of the function. */
719 for (i
= 0; i
< 6; i
++)
721 op
= read_memory_unsigned_integer (pc
+ i
, 1);
722 if (pic_pat
[i
] != op
)
729 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
731 if (op
== 0x89) /* movl %ebx, x(%ebp) */
733 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
735 if (op
== 0x5d) /* One byte offset from %ebp. */
737 else if (op
== 0x9d) /* Four byte offset from %ebp. */
739 else /* Unexpected instruction. */
742 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
746 if (delta
> 0 && op
== 0x81
747 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
753 /* If the function starts with a branch (to startup code at the end)
754 the last instruction should bring us back to the first
755 instruction of the real code. */
756 if (i386_follow_jump (start_pc
) != start_pc
)
757 pc
= i386_follow_jump (pc
);
762 /* This function is 64-bit safe. */
765 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
769 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
770 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
776 static struct i386_frame_cache
*
777 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
779 struct i386_frame_cache
*cache
;
786 cache
= i386_alloc_frame_cache ();
789 /* In principle, for normal frames, %ebp holds the frame pointer,
790 which holds the base address for the current stack frame.
791 However, for functions that don't need it, the frame pointer is
792 optional. For these "frameless" functions the frame pointer is
793 actually the frame pointer of the calling frame. Signal
794 trampolines are just a special case of a "frameless" function.
795 They (usually) share their frame pointer with the frame that was
796 in progress when the signal occurred. */
798 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
799 cache
->base
= extract_unsigned_integer (buf
, 4);
800 if (cache
->base
== 0)
803 /* For normal frames, %eip is stored at 4(%ebp). */
804 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
806 cache
->pc
= frame_func_unwind (next_frame
);
808 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
810 if (cache
->locals
< 0)
812 /* We didn't find a valid frame, which means that CACHE->base
813 currently holds the frame pointer for our calling frame. If
814 we're at the start of a function, or somewhere half-way its
815 prologue, the function's frame probably hasn't been fully
816 setup yet. Try to reconstruct the base address for the stack
817 frame by looking at the stack pointer. For truly "frameless"
818 functions this might work too. */
820 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
821 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
824 /* Now that we have the base address for the stack frame we can
825 calculate the value of %esp in the calling frame. */
826 cache
->saved_sp
= cache
->base
+ 8;
828 /* Adjust all the saved registers such that they contain addresses
829 instead of offsets. */
830 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
831 if (cache
->saved_regs
[i
] != -1)
832 cache
->saved_regs
[i
] += cache
->base
;
838 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
839 struct frame_id
*this_id
)
841 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
843 /* This marks the outermost frame. */
844 if (cache
->base
== 0)
847 /* See the end of i386_push_dummy_call. */
848 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
852 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
853 int regnum
, int *optimizedp
,
854 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
855 int *realnump
, void *valuep
)
857 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
859 gdb_assert (regnum
>= 0);
861 /* The System V ABI says that:
863 "The flags register contains the system flags, such as the
864 direction flag and the carry flag. The direction flag must be
865 set to the forward (that is, zero) direction before entry and
866 upon exit from a function. Other user flags have no specified
867 role in the standard calling sequence and are not preserved."
869 To guarantee the "upon exit" part of that statement we fake a
870 saved flags register that has its direction flag cleared.
872 Note that GCC doesn't seem to rely on the fact that the direction
873 flag is cleared after a function return; it always explicitly
874 clears the flag before operations where it matters.
876 FIXME: kettenis/20030316: I'm not quite sure whether this is the
877 right thing to do. The way we fake the flags register here makes
878 it impossible to change it. */
880 if (regnum
== I386_EFLAGS_REGNUM
)
890 /* Clear the direction flag. */
891 val
= frame_unwind_register_unsigned (next_frame
,
894 store_unsigned_integer (valuep
, 4, val
);
900 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
902 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
903 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
907 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
915 /* Store the value. */
916 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
921 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
924 *lvalp
= lval_memory
;
925 *addrp
= cache
->saved_regs
[regnum
];
929 /* Read the value in from memory. */
930 read_memory (*addrp
, valuep
,
931 register_size (current_gdbarch
, regnum
));
936 frame_register_unwind (next_frame
, regnum
,
937 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
940 static const struct frame_unwind i386_frame_unwind
=
944 i386_frame_prev_register
947 static const struct frame_unwind
*
948 i386_frame_sniffer (struct frame_info
*next_frame
)
950 return &i386_frame_unwind
;
954 /* Signal trampolines. */
956 static struct i386_frame_cache
*
957 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
959 struct i386_frame_cache
*cache
;
960 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
967 cache
= i386_alloc_frame_cache ();
969 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
970 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
972 addr
= tdep
->sigcontext_addr (next_frame
);
973 if (tdep
->sc_reg_offset
)
977 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
979 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
980 if (tdep
->sc_reg_offset
[i
] != -1)
981 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
985 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
986 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
994 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
995 struct frame_id
*this_id
)
997 struct i386_frame_cache
*cache
=
998 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1000 /* See the end of i386_push_dummy_call. */
1001 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
1005 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1007 int regnum
, int *optimizedp
,
1008 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1009 int *realnump
, void *valuep
)
1011 /* Make sure we've initialized the cache. */
1012 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1014 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
1015 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1018 static const struct frame_unwind i386_sigtramp_frame_unwind
=
1021 i386_sigtramp_frame_this_id
,
1022 i386_sigtramp_frame_prev_register
1025 static const struct frame_unwind
*
1026 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1028 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (next_frame
));
1030 /* We shouldn't even bother if we don't have a sigcontext_addr
1032 if (tdep
->sigcontext_addr
== NULL
)
1035 if (tdep
->sigtramp_p
!= NULL
)
1037 if (tdep
->sigtramp_p (next_frame
))
1038 return &i386_sigtramp_frame_unwind
;
1041 if (tdep
->sigtramp_start
!= 0)
1043 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1045 gdb_assert (tdep
->sigtramp_end
!= 0);
1046 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
1047 return &i386_sigtramp_frame_unwind
;
1055 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1057 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1062 static const struct frame_base i386_frame_base
=
1065 i386_frame_base_address
,
1066 i386_frame_base_address
,
1067 i386_frame_base_address
1070 static struct frame_id
1071 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1076 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1077 fp
= extract_unsigned_integer (buf
, 4);
1079 /* See the end of i386_push_dummy_call. */
1080 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1084 /* Figure out where the longjmp will land. Slurp the args out of the
1085 stack. We expect the first arg to be a pointer to the jmp_buf
1086 structure from which we extract the address that we will land at.
1087 This address is copied into PC. This routine returns non-zero on
1090 This function is 64-bit safe. */
1093 i386_get_longjmp_target (CORE_ADDR
*pc
)
1096 CORE_ADDR sp
, jb_addr
;
1097 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1098 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1100 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1101 longjmp will land. */
1102 if (jb_pc_offset
== -1)
1105 /* Don't use I386_ESP_REGNUM here, since this function is also used
1107 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1108 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1109 if (target_read_memory (sp
+ len
, buf
, len
))
1112 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1113 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1116 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1122 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1123 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1124 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1125 CORE_ADDR struct_addr
)
1130 /* Push arguments in reverse order. */
1131 for (i
= nargs
- 1; i
>= 0; i
--)
1133 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1135 /* The System V ABI says that:
1137 "An argument's size is increased, if necessary, to make it a
1138 multiple of [32-bit] words. This may require tail padding,
1139 depending on the size of the argument."
1141 This makes sure the stack says word-aligned. */
1142 sp
-= (len
+ 3) & ~3;
1143 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1146 /* Push value address. */
1150 store_unsigned_integer (buf
, 4, struct_addr
);
1151 write_memory (sp
, buf
, 4);
1154 /* Store return address. */
1156 store_unsigned_integer (buf
, 4, bp_addr
);
1157 write_memory (sp
, buf
, 4);
1159 /* Finally, update the stack pointer... */
1160 store_unsigned_integer (buf
, 4, sp
);
1161 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1163 /* ...and fake a frame pointer. */
1164 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1166 /* MarkK wrote: This "+ 8" is all over the place:
1167 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1168 i386_unwind_dummy_id). It's there, since all frame unwinders for
1169 a given target have to agree (within a certain margin) on the
1170 definition of the stack address of a frame. Otherwise
1171 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1172 stack address *before* the function call as a frame's CFA. On
1173 the i386, when %ebp is used as a frame pointer, the offset
1174 between the contents %ebp and the CFA as defined by GCC. */
1178 /* These registers are used for returning integers (and on some
1179 targets also for returning `struct' and `union' values when their
1180 size and alignment match an integer type). */
1181 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1182 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1184 /* Read, for architecture GDBARCH, a function return value of TYPE
1185 from REGCACHE, and copy that into VALBUF. */
1188 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1189 struct regcache
*regcache
, void *valbuf
)
1191 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1192 int len
= TYPE_LENGTH (type
);
1193 char buf
[I386_MAX_REGISTER_SIZE
];
1195 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1197 if (tdep
->st0_regnum
< 0)
1199 warning ("Cannot find floating-point return value.");
1200 memset (valbuf
, 0, len
);
1204 /* Floating-point return values can be found in %st(0). Convert
1205 its contents to the desired type. This is probably not
1206 exactly how it would happen on the target itself, but it is
1207 the best we can do. */
1208 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1209 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1213 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1214 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1216 if (len
<= low_size
)
1218 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1219 memcpy (valbuf
, buf
, len
);
1221 else if (len
<= (low_size
+ high_size
))
1223 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1224 memcpy (valbuf
, buf
, low_size
);
1225 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1226 memcpy ((char *) valbuf
+ low_size
, buf
, len
- low_size
);
1229 internal_error (__FILE__
, __LINE__
,
1230 "Cannot extract return value of %d bytes long.", len
);
1234 /* Write, for architecture GDBARCH, a function return value of TYPE
1235 from VALBUF into REGCACHE. */
1238 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1239 struct regcache
*regcache
, const void *valbuf
)
1241 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1242 int len
= TYPE_LENGTH (type
);
1244 /* Define I387_ST0_REGNUM such that we use the proper definitions
1245 for the architecture. */
1246 #define I387_ST0_REGNUM I386_ST0_REGNUM
1248 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1251 char buf
[I386_MAX_REGISTER_SIZE
];
1253 if (tdep
->st0_regnum
< 0)
1255 warning ("Cannot set floating-point return value.");
1259 /* Returning floating-point values is a bit tricky. Apart from
1260 storing the return value in %st(0), we have to simulate the
1261 state of the FPU at function return point. */
1263 /* Convert the value found in VALBUF to the extended
1264 floating-point format used by the FPU. This is probably
1265 not exactly how it would happen on the target itself, but
1266 it is the best we can do. */
1267 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1268 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1270 /* Set the top of the floating-point register stack to 7. The
1271 actual value doesn't really matter, but 7 is what a normal
1272 function return would end up with if the program started out
1273 with a freshly initialized FPU. */
1274 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1276 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM
, fstat
);
1278 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1279 the floating-point register stack to 7, the appropriate value
1280 for the tag word is 0x3fff. */
1281 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM
, 0x3fff);
1285 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1286 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1288 if (len
<= low_size
)
1289 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1290 else if (len
<= (low_size
+ high_size
))
1292 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1293 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1294 len
- low_size
, (char *) valbuf
+ low_size
);
1297 internal_error (__FILE__
, __LINE__
,
1298 "Cannot store return value of %d bytes long.", len
);
1301 #undef I387_ST0_REGNUM
1305 /* This is the variable that is set with "set struct-convention", and
1306 its legitimate values. */
1307 static const char default_struct_convention
[] = "default";
1308 static const char pcc_struct_convention
[] = "pcc";
1309 static const char reg_struct_convention
[] = "reg";
1310 static const char *valid_conventions
[] =
1312 default_struct_convention
,
1313 pcc_struct_convention
,
1314 reg_struct_convention
,
1317 static const char *struct_convention
= default_struct_convention
;
1319 /* Return non-zero if TYPE, which is assumed to be a structure or
1320 union type, should be returned in registers for architecture
1324 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
1326 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1327 enum type_code code
= TYPE_CODE (type
);
1328 int len
= TYPE_LENGTH (type
);
1330 gdb_assert (code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
);
1332 if (struct_convention
== pcc_struct_convention
1333 || (struct_convention
== default_struct_convention
1334 && tdep
->struct_return
== pcc_struct_return
))
1337 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
1340 /* Determine, for architecture GDBARCH, how a return value of TYPE
1341 should be returned. If it is supposed to be returned in registers,
1342 and READBUF is non-zero, read the appropriate value from REGCACHE,
1343 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1344 from WRITEBUF into REGCACHE. */
1346 static enum return_value_convention
1347 i386_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1348 struct regcache
*regcache
, void *readbuf
,
1349 const void *writebuf
)
1351 enum type_code code
= TYPE_CODE (type
);
1353 if ((code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
)
1354 && !i386_reg_struct_return_p (gdbarch
, type
))
1355 return RETURN_VALUE_STRUCT_CONVENTION
;
1357 /* This special case is for structures consisting of a single
1358 `float' or `double' member. These structures are returned in
1359 %st(0). For these structures, we call ourselves recursively,
1360 changing TYPE into the type of the first member of the structure.
1361 Since that should work for all structures that have only one
1362 member, we don't bother to check the member's type here. */
1363 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1365 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1366 return i386_return_value (gdbarch
, type
, regcache
, readbuf
, writebuf
);
1370 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
1372 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
1374 return RETURN_VALUE_REGISTER_CONVENTION
;
1378 /* Return the GDB type object for the "standard" data type of data in
1379 register REGNUM. Perhaps %esi and %edi should go here, but
1380 potentially they could be used for things other than address. */
1382 static struct type
*
1383 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1385 if (regnum
== I386_EIP_REGNUM
1386 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1387 return lookup_pointer_type (builtin_type_void
);
1389 if (i386_fp_regnum_p (regnum
))
1390 return builtin_type_i387_ext
;
1392 if (i386_sse_regnum_p (gdbarch
, regnum
))
1393 return builtin_type_vec128i
;
1395 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1396 return builtin_type_vec64i
;
1398 return builtin_type_int
;
1401 /* Map a cooked register onto a raw register or memory. For the i386,
1402 the MMX registers need to be mapped onto floating point registers. */
1405 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1407 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1412 /* Define I387_ST0_REGNUM such that we use the proper definitions
1413 for REGCACHE's architecture. */
1414 #define I387_ST0_REGNUM tdep->st0_regnum
1416 mmxreg
= regnum
- tdep
->mm0_regnum
;
1417 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1418 tos
= (fstat
>> 11) & 0x7;
1419 fpreg
= (mmxreg
+ tos
) % 8;
1421 return (I387_ST0_REGNUM
+ fpreg
);
1423 #undef I387_ST0_REGNUM
1427 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1428 int regnum
, void *buf
)
1430 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1432 char mmx_buf
[MAX_REGISTER_SIZE
];
1433 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1435 /* Extract (always little endian). */
1436 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1437 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1440 regcache_raw_read (regcache
, regnum
, buf
);
1444 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1445 int regnum
, const void *buf
)
1447 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1449 char mmx_buf
[MAX_REGISTER_SIZE
];
1450 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1453 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1454 /* ... Modify ... (always little endian). */
1455 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1457 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1460 regcache_raw_write (regcache
, regnum
, buf
);
1464 /* Return the register number of the register allocated by GCC after
1465 REGNUM, or -1 if there is no such register. */
1468 i386_next_regnum (int regnum
)
1470 /* GCC allocates the registers in the order:
1472 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1474 Since storing a variable in %esp doesn't make any sense we return
1475 -1 for %ebp and for %esp itself. */
1476 static int next_regnum
[] =
1478 I386_EDX_REGNUM
, /* Slot for %eax. */
1479 I386_EBX_REGNUM
, /* Slot for %ecx. */
1480 I386_ECX_REGNUM
, /* Slot for %edx. */
1481 I386_ESI_REGNUM
, /* Slot for %ebx. */
1482 -1, -1, /* Slots for %esp and %ebp. */
1483 I386_EDI_REGNUM
, /* Slot for %esi. */
1484 I386_EBP_REGNUM
/* Slot for %edi. */
1487 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1488 return next_regnum
[regnum
];
1493 /* Return nonzero if a value of type TYPE stored in register REGNUM
1494 needs any special handling. */
1497 i386_convert_register_p (int regnum
, struct type
*type
)
1499 int len
= TYPE_LENGTH (type
);
1501 /* Values may be spread across multiple registers. Most debugging
1502 formats aren't expressive enough to specify the locations, so
1503 some heuristics is involved. Right now we only handle types that
1504 have a length that is a multiple of the word size, since GCC
1505 doesn't seem to put any other types into registers. */
1506 if (len
> 4 && len
% 4 == 0)
1508 int last_regnum
= regnum
;
1512 last_regnum
= i386_next_regnum (last_regnum
);
1516 if (last_regnum
!= -1)
1520 return i386_fp_regnum_p (regnum
);
1523 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1524 return its contents in TO. */
1527 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1528 struct type
*type
, void *to
)
1530 int len
= TYPE_LENGTH (type
);
1533 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1534 available in FRAME (i.e. if it wasn't saved)? */
1536 if (i386_fp_regnum_p (regnum
))
1538 i387_register_to_value (frame
, regnum
, type
, to
);
1542 /* Read a value spread across multiple registers. */
1544 gdb_assert (len
> 4 && len
% 4 == 0);
1548 gdb_assert (regnum
!= -1);
1549 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1551 get_frame_register (frame
, regnum
, buf
);
1552 regnum
= i386_next_regnum (regnum
);
1558 /* Write the contents FROM of a value of type TYPE into register
1559 REGNUM in frame FRAME. */
1562 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1563 struct type
*type
, const void *from
)
1565 int len
= TYPE_LENGTH (type
);
1566 const char *buf
= from
;
1568 if (i386_fp_regnum_p (regnum
))
1570 i387_value_to_register (frame
, regnum
, type
, from
);
1574 /* Write a value spread across multiple registers. */
1576 gdb_assert (len
> 4 && len
% 4 == 0);
1580 gdb_assert (regnum
!= -1);
1581 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1583 put_frame_register (frame
, regnum
, buf
);
1584 regnum
= i386_next_regnum (regnum
);
1590 /* Supply register REGNUM from the general-purpose register set REGSET
1591 to register cache REGCACHE. If REGNUM is -1, do this for all
1592 registers in REGSET. */
1595 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
1596 int regnum
, const void *gregs
, size_t len
)
1598 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1599 const char *regs
= gregs
;
1602 gdb_assert (len
== tdep
->sizeof_gregset
);
1604 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1606 if ((regnum
== i
|| regnum
== -1)
1607 && tdep
->gregset_reg_offset
[i
] != -1)
1608 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1612 /* Supply register REGNUM from the floating-point register set REGSET
1613 to register cache REGCACHE. If REGNUM is -1, do this for all
1614 registers in REGSET. */
1617 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
1618 int regnum
, const void *fpregs
, size_t len
)
1620 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1622 if (len
== I387_SIZEOF_FXSAVE
)
1624 i387_supply_fxsave (regcache
, regnum
, fpregs
);
1628 gdb_assert (len
== tdep
->sizeof_fpregset
);
1629 i387_supply_fsave (regcache
, regnum
, fpregs
);
1632 /* Return the appropriate register set for the core section identified
1633 by SECT_NAME and SECT_SIZE. */
1635 const struct regset
*
1636 i386_regset_from_core_section (struct gdbarch
*gdbarch
,
1637 const char *sect_name
, size_t sect_size
)
1639 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1641 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
1643 if (tdep
->gregset
== NULL
)
1645 tdep
->gregset
= XMALLOC (struct regset
);
1646 tdep
->gregset
->descr
= tdep
;
1647 tdep
->gregset
->supply_regset
= i386_supply_gregset
;
1649 return tdep
->gregset
;
1652 if ((strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
1653 || (strcmp (sect_name
, ".reg-xfp") == 0
1654 && sect_size
== I387_SIZEOF_FXSAVE
))
1656 if (tdep
->fpregset
== NULL
)
1658 tdep
->fpregset
= XMALLOC (struct regset
);
1659 tdep
->fpregset
->descr
= tdep
;
1660 tdep
->fpregset
->supply_regset
= i386_supply_fpregset
;
1662 return tdep
->fpregset
;
1669 #ifdef STATIC_TRANSFORM_NAME
1670 /* SunPRO encodes the static variables. This is not related to C++
1671 mangling, it is done for C too. */
1674 sunpro_static_transform_name (char *name
)
1677 if (IS_STATIC_TRANSFORM_NAME (name
))
1679 /* For file-local statics there will be a period, a bunch of
1680 junk (the contents of which match a string given in the
1681 N_OPT), a period and the name. For function-local statics
1682 there will be a bunch of junk (which seems to change the
1683 second character from 'A' to 'B'), a period, the name of the
1684 function, and the name. So just skip everything before the
1686 p
= strrchr (name
, '.');
1692 #endif /* STATIC_TRANSFORM_NAME */
1695 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1698 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1700 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1702 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1703 struct minimal_symbol
*indsym
=
1704 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1705 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1709 if (strncmp (symname
, "__imp_", 6) == 0
1710 || strncmp (symname
, "_imp_", 5) == 0)
1711 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1714 return 0; /* Not a trampoline. */
1718 /* Return whether the frame preceding NEXT_FRAME corresponds to a
1719 sigtramp routine. */
1722 i386_sigtramp_p (struct frame_info
*next_frame
)
1724 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1727 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1728 return (name
&& strcmp ("_sigtramp", name
) == 0);
1732 /* We have two flavours of disassembly. The machinery on this page
1733 deals with switching between those. */
1736 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
1738 gdb_assert (disassembly_flavor
== att_flavor
1739 || disassembly_flavor
== intel_flavor
);
1741 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1742 constified, cast to prevent a compiler warning. */
1743 info
->disassembler_options
= (char *) disassembly_flavor
;
1744 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1746 return print_insn_i386 (pc
, info
);
1750 /* There are a few i386 architecture variants that differ only
1751 slightly from the generic i386 target. For now, we don't give them
1752 their own source file, but include them here. As a consequence,
1753 they'll always be included. */
1755 /* System V Release 4 (SVR4). */
1757 /* Return whether the frame preceding NEXT_FRAME corresponds to a SVR4
1758 sigtramp routine. */
1761 i386_svr4_sigtramp_p (struct frame_info
*next_frame
)
1763 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1766 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1767 currently unknown. */
1768 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1769 return (name
&& (strcmp ("_sigreturn", name
) == 0
1770 || strcmp ("_sigacthandler", name
) == 0
1771 || strcmp ("sigvechandler", name
) == 0));
1774 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1775 routine, return the address of the associated sigcontext (ucontext)
1779 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1784 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1785 sp
= extract_unsigned_integer (buf
, 4);
1787 return read_memory_unsigned_integer (sp
+ 8, 4);
1794 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1796 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
1797 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
1800 /* System V Release 4 (SVR4). */
1803 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1805 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1807 /* System V Release 4 uses ELF. */
1808 i386_elf_init_abi (info
, gdbarch
);
1810 /* System V Release 4 has shared libraries. */
1811 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1812 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1814 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
1815 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1816 tdep
->sc_pc_offset
= 36 + 14 * 4;
1817 tdep
->sc_sp_offset
= 36 + 17 * 4;
1819 tdep
->jb_pc_offset
= 20;
1825 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1827 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1829 /* DJGPP doesn't have any special frames for signal handlers. */
1830 tdep
->sigtramp_p
= NULL
;
1832 tdep
->jb_pc_offset
= 36;
1838 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1840 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1842 tdep
->jb_pc_offset
= 24;
1846 /* i386 register groups. In addition to the normal groups, add "mmx"
1849 static struct reggroup
*i386_sse_reggroup
;
1850 static struct reggroup
*i386_mmx_reggroup
;
1853 i386_init_reggroups (void)
1855 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1856 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1860 i386_add_reggroups (struct gdbarch
*gdbarch
)
1862 reggroup_add (gdbarch
, i386_sse_reggroup
);
1863 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1864 reggroup_add (gdbarch
, general_reggroup
);
1865 reggroup_add (gdbarch
, float_reggroup
);
1866 reggroup_add (gdbarch
, all_reggroup
);
1867 reggroup_add (gdbarch
, save_reggroup
);
1868 reggroup_add (gdbarch
, restore_reggroup
);
1869 reggroup_add (gdbarch
, vector_reggroup
);
1870 reggroup_add (gdbarch
, system_reggroup
);
1874 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1875 struct reggroup
*group
)
1877 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
1878 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
1879 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1880 || i386_fpc_regnum_p (regnum
));
1881 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
1883 if (group
== i386_mmx_reggroup
)
1884 return mmx_regnum_p
;
1885 if (group
== i386_sse_reggroup
)
1886 return sse_regnum_p
;
1887 if (group
== vector_reggroup
)
1888 return (mmx_regnum_p
|| sse_regnum_p
);
1889 if (group
== float_reggroup
)
1891 if (group
== general_reggroup
)
1892 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1894 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1898 /* Get the ARGIth function argument for the current function. */
1901 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1904 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
1905 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
1909 static struct gdbarch
*
1910 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1912 struct gdbarch_tdep
*tdep
;
1913 struct gdbarch
*gdbarch
;
1915 /* If there is already a candidate, use it. */
1916 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1918 return arches
->gdbarch
;
1920 /* Allocate space for the new architecture. */
1921 tdep
= XMALLOC (struct gdbarch_tdep
);
1922 gdbarch
= gdbarch_alloc (&info
, tdep
);
1924 /* General-purpose registers. */
1925 tdep
->gregset
= NULL
;
1926 tdep
->gregset_reg_offset
= NULL
;
1927 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
1928 tdep
->sizeof_gregset
= 0;
1930 /* Floating-point registers. */
1931 tdep
->fpregset
= NULL
;
1932 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
1934 /* The default settings include the FPU registers, the MMX registers
1935 and the SSE registers. This can be overridden for a specific ABI
1936 by adjusting the members `st0_regnum', `mm0_regnum' and
1937 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
1938 will show up in the output of "info all-registers". Ideally we
1939 should try to autodetect whether they are available, such that we
1940 can prevent "info all-registers" from displaying registers that
1943 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
1944 [the SSE registers] always (even when they don't exist) or never
1945 showing them to the user (even when they do exist), I prefer the
1946 former over the latter. */
1948 tdep
->st0_regnum
= I386_ST0_REGNUM
;
1950 /* The MMX registers are implemented as pseudo-registers. Put off
1951 calculating the register number for %mm0 until we know the number
1952 of raw registers. */
1953 tdep
->mm0_regnum
= 0;
1955 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
1956 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
1958 tdep
->jb_pc_offset
= -1;
1959 tdep
->struct_return
= pcc_struct_return
;
1960 tdep
->sigtramp_start
= 0;
1961 tdep
->sigtramp_end
= 0;
1962 tdep
->sigtramp_p
= i386_sigtramp_p
;
1963 tdep
->sigcontext_addr
= NULL
;
1964 tdep
->sc_reg_offset
= NULL
;
1965 tdep
->sc_pc_offset
= -1;
1966 tdep
->sc_sp_offset
= -1;
1968 /* The format used for `long double' on almost all i386 targets is
1969 the i387 extended floating-point format. In fact, of all targets
1970 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1971 on having a `long double' that's not `long' at all. */
1972 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1974 /* Although the i387 extended floating-point has only 80 significant
1975 bits, a `long double' actually takes up 96, probably to enforce
1977 set_gdbarch_long_double_bit (gdbarch
, 96);
1979 /* The default ABI includes general-purpose registers,
1980 floating-point registers, and the SSE registers. */
1981 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
1982 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1983 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1985 /* Register numbers of various important registers. */
1986 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1987 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1988 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1989 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1991 /* NOTE: kettenis/20040418: GCC does have two possible register
1992 numbering schemes on the i386: dbx and SVR4. These schemes
1993 differ in how they number %ebp, %esp, %eflags, and the
1994 floating-point registers, and are implemented by the arrays
1995 dbx_register_map[] and svr4_dbx_register_map in
1996 gcc/config/i386.c. GCC also defines a third numbering scheme in
1997 gcc/config/i386.c, which it designates as the "default" register
1998 map used in 64bit mode. This last register numbering scheme is
1999 implemented in dbx64_register_map, and is used for AMD64; see
2002 Currently, each GCC i386 target always uses the same register
2003 numbering scheme across all its supported debugging formats
2004 i.e. SDB (COFF), stabs and DWARF 2. This is because
2005 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
2006 DBX_REGISTER_NUMBER macro which is defined by each target's
2007 respective config header in a manner independent of the requested
2008 output debugging format.
2010 This does not match the arrangement below, which presumes that
2011 the SDB and stabs numbering schemes differ from the DWARF and
2012 DWARF 2 ones. The reason for this arrangement is that it is
2013 likely to get the numbering scheme for the target's
2014 default/native debug format right. For targets where GCC is the
2015 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
2016 targets where the native toolchain uses a different numbering
2017 scheme for a particular debug format (stabs-in-ELF on Solaris)
2018 the defaults below will have to be overridden, like
2019 i386_elf_init_abi() does. */
2021 /* Use the dbx register numbering scheme for stabs and COFF. */
2022 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2023 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
2025 /* Use the SVR4 register numbering scheme for DWARF and DWARF 2. */
2026 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2027 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
2029 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
2030 be in use on any of the supported i386 targets. */
2032 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
2034 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
2036 /* Call dummy code. */
2037 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
2039 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
2040 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
2041 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
2043 set_gdbarch_return_value (gdbarch
, i386_return_value
);
2045 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
2047 /* Stack grows downward. */
2048 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2050 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
2051 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
2053 set_gdbarch_frame_args_skip (gdbarch
, 8);
2055 /* Wire in the MMX registers. */
2056 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
2057 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
2058 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
2060 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
2062 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
2064 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
2066 /* Add the i386 register groups. */
2067 i386_add_reggroups (gdbarch
);
2068 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
2070 /* Helper for function argument information. */
2071 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
2073 /* Hook in the DWARF CFI frame unwinder. */
2074 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
2076 frame_base_set_default (gdbarch
, &i386_frame_base
);
2078 /* Hook in ABI-specific overrides, if they have been registered. */
2079 gdbarch_init_osabi (info
, gdbarch
);
2081 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
2082 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
2084 /* If we have a register mapping, enable the generic core file
2085 support, unless it has already been enabled. */
2086 if (tdep
->gregset_reg_offset
2087 && !gdbarch_regset_from_core_section_p (gdbarch
))
2088 set_gdbarch_regset_from_core_section (gdbarch
,
2089 i386_regset_from_core_section
);
2091 /* Unless support for MMX has been disabled, make %mm0 the first
2093 if (tdep
->mm0_regnum
== 0)
2094 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
2099 static enum gdb_osabi
2100 i386_coff_osabi_sniffer (bfd
*abfd
)
2102 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
2103 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
2104 return GDB_OSABI_GO32
;
2106 return GDB_OSABI_UNKNOWN
;
2109 static enum gdb_osabi
2110 i386_nlm_osabi_sniffer (bfd
*abfd
)
2112 return GDB_OSABI_NETWARE
;
2116 /* Provide a prototype to silence -Wmissing-prototypes. */
2117 void _initialize_i386_tdep (void);
2120 _initialize_i386_tdep (void)
2122 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2124 /* Add the variable that controls the disassembly flavor. */
2126 struct cmd_list_element
*new_cmd
;
2128 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
2130 &disassembly_flavor
,
2132 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
2133 and the default value is \"att\".",
2135 add_show_from_set (new_cmd
, &showlist
);
2138 /* Add the variable that controls the convention for returning
2141 struct cmd_list_element
*new_cmd
;
2143 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
2145 &struct_convention
, "\
2146 Set the convention for returning small structs, valid values \
2147 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
2149 add_show_from_set (new_cmd
, &showlist
);
2152 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2153 i386_coff_osabi_sniffer
);
2154 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
2155 i386_nlm_osabi_sniffer
);
2157 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2158 i386_svr4_init_abi
);
2159 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2160 i386_go32_init_abi
);
2161 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
2164 /* Initialize the i386 specific register groups. */
2165 i386_init_reggroups ();