1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988-2021 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "opcode/i386.h"
22 #include "arch-utils.h"
24 #include "dummy-frame.h"
25 #include "dwarf2/frame.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
37 #include "reggroups.h"
42 #include "target-float.h"
47 #include "i386-tdep.h"
48 #include "i387-tdep.h"
49 #include "gdbsupport/x86-xstate.h"
54 #include "record-full.h"
55 #include "target-descriptions.h"
56 #include "arch/i386.h"
61 #include "stap-probe.h"
62 #include "user-regs.h"
63 #include "cli/cli-utils.h"
64 #include "expression.h"
65 #include "parser-defs.h"
68 #include <unordered_set>
73 static const char * const i386_register_names
[] =
75 "eax", "ecx", "edx", "ebx",
76 "esp", "ebp", "esi", "edi",
77 "eip", "eflags", "cs", "ss",
78 "ds", "es", "fs", "gs",
79 "st0", "st1", "st2", "st3",
80 "st4", "st5", "st6", "st7",
81 "fctrl", "fstat", "ftag", "fiseg",
82 "fioff", "foseg", "fooff", "fop",
83 "xmm0", "xmm1", "xmm2", "xmm3",
84 "xmm4", "xmm5", "xmm6", "xmm7",
88 static const char * const i386_zmm_names
[] =
90 "zmm0", "zmm1", "zmm2", "zmm3",
91 "zmm4", "zmm5", "zmm6", "zmm7"
94 static const char * const i386_zmmh_names
[] =
96 "zmm0h", "zmm1h", "zmm2h", "zmm3h",
97 "zmm4h", "zmm5h", "zmm6h", "zmm7h"
100 static const char * const i386_k_names
[] =
102 "k0", "k1", "k2", "k3",
103 "k4", "k5", "k6", "k7"
106 static const char * const i386_ymm_names
[] =
108 "ymm0", "ymm1", "ymm2", "ymm3",
109 "ymm4", "ymm5", "ymm6", "ymm7",
112 static const char * const i386_ymmh_names
[] =
114 "ymm0h", "ymm1h", "ymm2h", "ymm3h",
115 "ymm4h", "ymm5h", "ymm6h", "ymm7h",
118 static const char * const i386_mpx_names
[] =
120 "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
123 static const char * const i386_pkeys_names
[] =
128 /* Register names for MPX pseudo-registers. */
130 static const char * const i386_bnd_names
[] =
132 "bnd0", "bnd1", "bnd2", "bnd3"
135 /* Register names for MMX pseudo-registers. */
137 static const char * const i386_mmx_names
[] =
139 "mm0", "mm1", "mm2", "mm3",
140 "mm4", "mm5", "mm6", "mm7"
143 /* Register names for byte pseudo-registers. */
145 static const char * const i386_byte_names
[] =
147 "al", "cl", "dl", "bl",
148 "ah", "ch", "dh", "bh"
151 /* Register names for word pseudo-registers. */
153 static const char * const i386_word_names
[] =
155 "ax", "cx", "dx", "bx",
159 /* Constant used for reading/writing pseudo registers. In 64-bit mode, we have
160 16 lower ZMM regs that extend corresponding xmm/ymm registers. In addition,
161 we have 16 upper ZMM regs that have to be handled differently. */
163 const int num_lower_zmm_regs
= 16;
168 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
170 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
171 int mm0_regnum
= tdep
->mm0_regnum
;
176 regnum
-= mm0_regnum
;
177 return regnum
>= 0 && regnum
< tdep
->num_mmx_regs
;
183 i386_byte_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
185 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
187 regnum
-= tdep
->al_regnum
;
188 return regnum
>= 0 && regnum
< tdep
->num_byte_regs
;
194 i386_word_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
196 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
198 regnum
-= tdep
->ax_regnum
;
199 return regnum
>= 0 && regnum
< tdep
->num_word_regs
;
202 /* Dword register? */
205 i386_dword_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
207 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
208 int eax_regnum
= tdep
->eax_regnum
;
213 regnum
-= eax_regnum
;
214 return regnum
>= 0 && regnum
< tdep
->num_dword_regs
;
217 /* AVX512 register? */
220 i386_zmmh_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
222 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
223 int zmm0h_regnum
= tdep
->zmm0h_regnum
;
225 if (zmm0h_regnum
< 0)
228 regnum
-= zmm0h_regnum
;
229 return regnum
>= 0 && regnum
< tdep
->num_zmm_regs
;
233 i386_zmm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
235 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
236 int zmm0_regnum
= tdep
->zmm0_regnum
;
241 regnum
-= zmm0_regnum
;
242 return regnum
>= 0 && regnum
< tdep
->num_zmm_regs
;
246 i386_k_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
248 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
249 int k0_regnum
= tdep
->k0_regnum
;
255 return regnum
>= 0 && regnum
< I387_NUM_K_REGS
;
259 i386_ymmh_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
261 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
262 int ymm0h_regnum
= tdep
->ymm0h_regnum
;
264 if (ymm0h_regnum
< 0)
267 regnum
-= ymm0h_regnum
;
268 return regnum
>= 0 && regnum
< tdep
->num_ymm_regs
;
274 i386_ymm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
276 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
277 int ymm0_regnum
= tdep
->ymm0_regnum
;
282 regnum
-= ymm0_regnum
;
283 return regnum
>= 0 && regnum
< tdep
->num_ymm_regs
;
287 i386_ymmh_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
289 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
290 int ymm16h_regnum
= tdep
->ymm16h_regnum
;
292 if (ymm16h_regnum
< 0)
295 regnum
-= ymm16h_regnum
;
296 return regnum
>= 0 && regnum
< tdep
->num_ymm_avx512_regs
;
300 i386_ymm_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
302 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
303 int ymm16_regnum
= tdep
->ymm16_regnum
;
305 if (ymm16_regnum
< 0)
308 regnum
-= ymm16_regnum
;
309 return regnum
>= 0 && regnum
< tdep
->num_ymm_avx512_regs
;
315 i386_bnd_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
317 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
318 int bnd0_regnum
= tdep
->bnd0_regnum
;
323 regnum
-= bnd0_regnum
;
324 return regnum
>= 0 && regnum
< I387_NUM_BND_REGS
;
330 i386_xmm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
332 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
333 int num_xmm_regs
= I387_NUM_XMM_REGS (tdep
);
335 if (num_xmm_regs
== 0)
338 regnum
-= I387_XMM0_REGNUM (tdep
);
339 return regnum
>= 0 && regnum
< num_xmm_regs
;
342 /* XMM_512 register? */
345 i386_xmm_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
347 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
348 int num_xmm_avx512_regs
= I387_NUM_XMM_AVX512_REGS (tdep
);
350 if (num_xmm_avx512_regs
== 0)
353 regnum
-= I387_XMM16_REGNUM (tdep
);
354 return regnum
>= 0 && regnum
< num_xmm_avx512_regs
;
358 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
360 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
362 if (I387_NUM_XMM_REGS (tdep
) == 0)
365 return (regnum
== I387_MXCSR_REGNUM (tdep
));
371 i386_fp_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
373 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
375 if (I387_ST0_REGNUM (tdep
) < 0)
378 return (I387_ST0_REGNUM (tdep
) <= regnum
379 && regnum
< I387_FCTRL_REGNUM (tdep
));
383 i386_fpc_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
385 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
387 if (I387_ST0_REGNUM (tdep
) < 0)
390 return (I387_FCTRL_REGNUM (tdep
) <= regnum
391 && regnum
< I387_XMM0_REGNUM (tdep
));
394 /* BNDr (raw) register? */
397 i386_bndr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
399 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
401 if (I387_BND0R_REGNUM (tdep
) < 0)
404 regnum
-= tdep
->bnd0r_regnum
;
405 return regnum
>= 0 && regnum
< I387_NUM_BND_REGS
;
408 /* BND control register? */
411 i386_mpx_ctrl_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
413 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
415 if (I387_BNDCFGU_REGNUM (tdep
) < 0)
418 regnum
-= I387_BNDCFGU_REGNUM (tdep
);
419 return regnum
>= 0 && regnum
< I387_NUM_MPX_CTRL_REGS
;
425 i386_pkru_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
427 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
428 int pkru_regnum
= tdep
->pkru_regnum
;
433 regnum
-= pkru_regnum
;
434 return regnum
>= 0 && regnum
< I387_NUM_PKEYS_REGS
;
437 /* Return the name of register REGNUM, or the empty string if it is
438 an anonymous register. */
441 i386_register_name (struct gdbarch
*gdbarch
, int regnum
)
443 /* Hide the upper YMM registers. */
444 if (i386_ymmh_regnum_p (gdbarch
, regnum
))
447 /* Hide the upper YMM16-31 registers. */
448 if (i386_ymmh_avx512_regnum_p (gdbarch
, regnum
))
451 /* Hide the upper ZMM registers. */
452 if (i386_zmmh_regnum_p (gdbarch
, regnum
))
455 return tdesc_register_name (gdbarch
, regnum
);
458 /* Return the name of register REGNUM. */
461 i386_pseudo_register_name (struct gdbarch
*gdbarch
, int regnum
)
463 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
464 if (i386_bnd_regnum_p (gdbarch
, regnum
))
465 return i386_bnd_names
[regnum
- tdep
->bnd0_regnum
];
466 if (i386_mmx_regnum_p (gdbarch
, regnum
))
467 return i386_mmx_names
[regnum
- I387_MM0_REGNUM (tdep
)];
468 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
469 return i386_ymm_names
[regnum
- tdep
->ymm0_regnum
];
470 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
471 return i386_zmm_names
[regnum
- tdep
->zmm0_regnum
];
472 else if (i386_byte_regnum_p (gdbarch
, regnum
))
473 return i386_byte_names
[regnum
- tdep
->al_regnum
];
474 else if (i386_word_regnum_p (gdbarch
, regnum
))
475 return i386_word_names
[regnum
- tdep
->ax_regnum
];
477 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
480 /* Convert a dbx register number REG to the appropriate register
481 number used by GDB. */
484 i386_dbx_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
486 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
488 /* This implements what GCC calls the "default" register map
489 (dbx_register_map[]). */
491 if (reg
>= 0 && reg
<= 7)
493 /* General-purpose registers. The debug info calls %ebp
494 register 4, and %esp register 5. */
501 else if (reg
>= 12 && reg
<= 19)
503 /* Floating-point registers. */
504 return reg
- 12 + I387_ST0_REGNUM (tdep
);
506 else if (reg
>= 21 && reg
<= 28)
509 int ymm0_regnum
= tdep
->ymm0_regnum
;
512 && i386_xmm_regnum_p (gdbarch
, reg
))
513 return reg
- 21 + ymm0_regnum
;
515 return reg
- 21 + I387_XMM0_REGNUM (tdep
);
517 else if (reg
>= 29 && reg
<= 36)
520 return reg
- 29 + I387_MM0_REGNUM (tdep
);
523 /* This will hopefully provoke a warning. */
524 return gdbarch_num_cooked_regs (gdbarch
);
527 /* Convert SVR4 DWARF register number REG to the appropriate register number
531 i386_svr4_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
533 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
535 /* This implements the GCC register map that tries to be compatible
536 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
538 /* The SVR4 register numbering includes %eip and %eflags, and
539 numbers the floating point registers differently. */
540 if (reg
>= 0 && reg
<= 9)
542 /* General-purpose registers. */
545 else if (reg
>= 11 && reg
<= 18)
547 /* Floating-point registers. */
548 return reg
- 11 + I387_ST0_REGNUM (tdep
);
550 else if (reg
>= 21 && reg
<= 36)
552 /* The SSE and MMX registers have the same numbers as with dbx. */
553 return i386_dbx_reg_to_regnum (gdbarch
, reg
);
558 case 37: return I387_FCTRL_REGNUM (tdep
);
559 case 38: return I387_FSTAT_REGNUM (tdep
);
560 case 39: return I387_MXCSR_REGNUM (tdep
);
561 case 40: return I386_ES_REGNUM
;
562 case 41: return I386_CS_REGNUM
;
563 case 42: return I386_SS_REGNUM
;
564 case 43: return I386_DS_REGNUM
;
565 case 44: return I386_FS_REGNUM
;
566 case 45: return I386_GS_REGNUM
;
572 /* Wrapper on i386_svr4_dwarf_reg_to_regnum to return
573 num_regs + num_pseudo_regs for other debug formats. */
576 i386_svr4_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
578 int regnum
= i386_svr4_dwarf_reg_to_regnum (gdbarch
, reg
);
581 return gdbarch_num_cooked_regs (gdbarch
);
587 /* This is the variable that is set with "set disassembly-flavor", and
588 its legitimate values. */
589 static const char att_flavor
[] = "att";
590 static const char intel_flavor
[] = "intel";
591 static const char *const valid_flavors
[] =
597 static const char *disassembly_flavor
= att_flavor
;
600 /* Use the program counter to determine the contents and size of a
601 breakpoint instruction. Return a pointer to a string of bytes that
602 encode a breakpoint instruction, store the length of the string in
603 *LEN and optionally adjust *PC to point to the correct memory
604 location for inserting the breakpoint.
606 On the i386 we have a single breakpoint that fits in a single byte
607 and can be inserted anywhere.
609 This function is 64-bit safe. */
611 constexpr gdb_byte i386_break_insn
[] = { 0xcc }; /* int 3 */
613 typedef BP_MANIPULATION (i386_break_insn
) i386_breakpoint
;
616 /* Displaced instruction handling. */
618 /* Skip the legacy instruction prefixes in INSN.
619 Not all prefixes are valid for any particular insn
620 but we needn't care, the insn will fault if it's invalid.
621 The result is a pointer to the first opcode byte,
622 or NULL if we run off the end of the buffer. */
625 i386_skip_prefixes (gdb_byte
*insn
, size_t max_len
)
627 gdb_byte
*end
= insn
+ max_len
;
633 case DATA_PREFIX_OPCODE
:
634 case ADDR_PREFIX_OPCODE
:
635 case CS_PREFIX_OPCODE
:
636 case DS_PREFIX_OPCODE
:
637 case ES_PREFIX_OPCODE
:
638 case FS_PREFIX_OPCODE
:
639 case GS_PREFIX_OPCODE
:
640 case SS_PREFIX_OPCODE
:
641 case LOCK_PREFIX_OPCODE
:
642 case REPE_PREFIX_OPCODE
:
643 case REPNE_PREFIX_OPCODE
:
655 i386_absolute_jmp_p (const gdb_byte
*insn
)
657 /* jmp far (absolute address in operand). */
663 /* jump near, absolute indirect (/4). */
664 if ((insn
[1] & 0x38) == 0x20)
667 /* jump far, absolute indirect (/5). */
668 if ((insn
[1] & 0x38) == 0x28)
675 /* Return non-zero if INSN is a jump, zero otherwise. */
678 i386_jmp_p (const gdb_byte
*insn
)
680 /* jump short, relative. */
684 /* jump near, relative. */
688 return i386_absolute_jmp_p (insn
);
692 i386_absolute_call_p (const gdb_byte
*insn
)
694 /* call far, absolute. */
700 /* Call near, absolute indirect (/2). */
701 if ((insn
[1] & 0x38) == 0x10)
704 /* Call far, absolute indirect (/3). */
705 if ((insn
[1] & 0x38) == 0x18)
713 i386_ret_p (const gdb_byte
*insn
)
717 case 0xc2: /* ret near, pop N bytes. */
718 case 0xc3: /* ret near */
719 case 0xca: /* ret far, pop N bytes. */
720 case 0xcb: /* ret far */
721 case 0xcf: /* iret */
730 i386_call_p (const gdb_byte
*insn
)
732 if (i386_absolute_call_p (insn
))
735 /* call near, relative. */
742 /* Return non-zero if INSN is a system call, and set *LENGTHP to its
743 length in bytes. Otherwise, return zero. */
746 i386_syscall_p (const gdb_byte
*insn
, int *lengthp
)
748 /* Is it 'int $0x80'? */
749 if ((insn
[0] == 0xcd && insn
[1] == 0x80)
750 /* Or is it 'sysenter'? */
751 || (insn
[0] == 0x0f && insn
[1] == 0x34)
752 /* Or is it 'syscall'? */
753 || (insn
[0] == 0x0f && insn
[1] == 0x05))
762 /* The gdbarch insn_is_call method. */
765 i386_insn_is_call (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
767 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
769 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
770 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
772 return i386_call_p (insn
);
775 /* The gdbarch insn_is_ret method. */
778 i386_insn_is_ret (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
780 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
782 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
783 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
785 return i386_ret_p (insn
);
788 /* The gdbarch insn_is_jump method. */
791 i386_insn_is_jump (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
793 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
795 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
796 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
798 return i386_jmp_p (insn
);
801 /* Some kernels may run one past a syscall insn, so we have to cope. */
803 displaced_step_copy_insn_closure_up
804 i386_displaced_step_copy_insn (struct gdbarch
*gdbarch
,
805 CORE_ADDR from
, CORE_ADDR to
,
806 struct regcache
*regs
)
808 size_t len
= gdbarch_max_insn_length (gdbarch
);
809 std::unique_ptr
<i386_displaced_step_copy_insn_closure
> closure
810 (new i386_displaced_step_copy_insn_closure (len
));
811 gdb_byte
*buf
= closure
->buf
.data ();
813 read_memory (from
, buf
, len
);
815 /* GDB may get control back after the insn after the syscall.
816 Presumably this is a kernel bug.
817 If this is a syscall, make sure there's a nop afterwards. */
822 insn
= i386_skip_prefixes (buf
, len
);
823 if (insn
!= NULL
&& i386_syscall_p (insn
, &syscall_length
))
824 insn
[syscall_length
] = NOP_OPCODE
;
827 write_memory (to
, buf
, len
);
829 displaced_debug_printf ("%s->%s: %s",
830 paddress (gdbarch
, from
), paddress (gdbarch
, to
),
831 displaced_step_dump_bytes (buf
, len
).c_str ());
833 /* This is a work around for a problem with g++ 4.8. */
834 return displaced_step_copy_insn_closure_up (closure
.release ());
837 /* Fix up the state of registers and memory after having single-stepped
838 a displaced instruction. */
841 i386_displaced_step_fixup (struct gdbarch
*gdbarch
,
842 struct displaced_step_copy_insn_closure
*closure_
,
843 CORE_ADDR from
, CORE_ADDR to
,
844 struct regcache
*regs
)
846 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
848 /* The offset we applied to the instruction's address.
849 This could well be negative (when viewed as a signed 32-bit
850 value), but ULONGEST won't reflect that, so take care when
852 ULONGEST insn_offset
= to
- from
;
854 i386_displaced_step_copy_insn_closure
*closure
855 = (i386_displaced_step_copy_insn_closure
*) closure_
;
856 gdb_byte
*insn
= closure
->buf
.data ();
857 /* The start of the insn, needed in case we see some prefixes. */
858 gdb_byte
*insn_start
= insn
;
860 displaced_debug_printf ("fixup (%s, %s), insn = 0x%02x 0x%02x ...",
861 paddress (gdbarch
, from
), paddress (gdbarch
, to
),
864 /* The list of issues to contend with here is taken from
865 resume_execution in arch/i386/kernel/kprobes.c, Linux 2.6.20.
866 Yay for Free Software! */
868 /* Relocate the %eip, if necessary. */
870 /* The instruction recognizers we use assume any leading prefixes
871 have been skipped. */
873 /* This is the size of the buffer in closure. */
874 size_t max_insn_len
= gdbarch_max_insn_length (gdbarch
);
875 gdb_byte
*opcode
= i386_skip_prefixes (insn
, max_insn_len
);
876 /* If there are too many prefixes, just ignore the insn.
877 It will fault when run. */
882 /* Except in the case of absolute or indirect jump or call
883 instructions, or a return instruction, the new eip is relative to
884 the displaced instruction; make it relative. Well, signal
885 handler returns don't need relocation either, but we use the
886 value of %eip to recognize those; see below. */
887 if (! i386_absolute_jmp_p (insn
)
888 && ! i386_absolute_call_p (insn
)
889 && ! i386_ret_p (insn
))
894 regcache_cooked_read_unsigned (regs
, I386_EIP_REGNUM
, &orig_eip
);
896 /* A signal trampoline system call changes the %eip, resuming
897 execution of the main program after the signal handler has
898 returned. That makes them like 'return' instructions; we
899 shouldn't relocate %eip.
901 But most system calls don't, and we do need to relocate %eip.
903 Our heuristic for distinguishing these cases: if stepping
904 over the system call instruction left control directly after
905 the instruction, the we relocate --- control almost certainly
906 doesn't belong in the displaced copy. Otherwise, we assume
907 the instruction has put control where it belongs, and leave
908 it unrelocated. Goodness help us if there are PC-relative
910 if (i386_syscall_p (insn
, &insn_len
)
911 && orig_eip
!= to
+ (insn
- insn_start
) + insn_len
912 /* GDB can get control back after the insn after the syscall.
913 Presumably this is a kernel bug.
914 i386_displaced_step_copy_insn ensures its a nop,
915 we add one to the length for it. */
916 && orig_eip
!= to
+ (insn
- insn_start
) + insn_len
+ 1)
917 displaced_debug_printf ("syscall changed %%eip; not relocating");
920 ULONGEST eip
= (orig_eip
- insn_offset
) & 0xffffffffUL
;
922 /* If we just stepped over a breakpoint insn, we don't backup
923 the pc on purpose; this is to match behaviour without
926 regcache_cooked_write_unsigned (regs
, I386_EIP_REGNUM
, eip
);
928 displaced_debug_printf ("relocated %%eip from %s to %s",
929 paddress (gdbarch
, orig_eip
),
930 paddress (gdbarch
, eip
));
934 /* If the instruction was PUSHFL, then the TF bit will be set in the
935 pushed value, and should be cleared. We'll leave this for later,
936 since GDB already messes up the TF flag when stepping over a
939 /* If the instruction was a call, the return address now atop the
940 stack is the address following the copied instruction. We need
941 to make it the address following the original instruction. */
942 if (i386_call_p (insn
))
946 const ULONGEST retaddr_len
= 4;
948 regcache_cooked_read_unsigned (regs
, I386_ESP_REGNUM
, &esp
);
949 retaddr
= read_memory_unsigned_integer (esp
, retaddr_len
, byte_order
);
950 retaddr
= (retaddr
- insn_offset
) & 0xffffffffUL
;
951 write_memory_unsigned_integer (esp
, retaddr_len
, byte_order
, retaddr
);
953 displaced_debug_printf ("relocated return addr at %s to %s",
954 paddress (gdbarch
, esp
),
955 paddress (gdbarch
, retaddr
));
960 append_insns (CORE_ADDR
*to
, ULONGEST len
, const gdb_byte
*buf
)
962 target_write_memory (*to
, buf
, len
);
967 i386_relocate_instruction (struct gdbarch
*gdbarch
,
968 CORE_ADDR
*to
, CORE_ADDR oldloc
)
970 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
971 gdb_byte buf
[I386_MAX_INSN_LEN
];
972 int offset
= 0, rel32
, newrel
;
974 gdb_byte
*insn
= buf
;
976 read_memory (oldloc
, buf
, I386_MAX_INSN_LEN
);
978 insn_length
= gdb_buffered_insn_length (gdbarch
, insn
,
979 I386_MAX_INSN_LEN
, oldloc
);
981 /* Get past the prefixes. */
982 insn
= i386_skip_prefixes (insn
, I386_MAX_INSN_LEN
);
984 /* Adjust calls with 32-bit relative addresses as push/jump, with
985 the address pushed being the location where the original call in
986 the user program would return to. */
989 gdb_byte push_buf
[16];
990 unsigned int ret_addr
;
992 /* Where "ret" in the original code will return to. */
993 ret_addr
= oldloc
+ insn_length
;
994 push_buf
[0] = 0x68; /* pushq $... */
995 store_unsigned_integer (&push_buf
[1], 4, byte_order
, ret_addr
);
997 append_insns (to
, 5, push_buf
);
999 /* Convert the relative call to a relative jump. */
1002 /* Adjust the destination offset. */
1003 rel32
= extract_signed_integer (insn
+ 1, 4, byte_order
);
1004 newrel
= (oldloc
- *to
) + rel32
;
1005 store_signed_integer (insn
+ 1, 4, byte_order
, newrel
);
1007 displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
1008 hex_string (rel32
), paddress (gdbarch
, oldloc
),
1009 hex_string (newrel
), paddress (gdbarch
, *to
));
1011 /* Write the adjusted jump into its displaced location. */
1012 append_insns (to
, 5, insn
);
1016 /* Adjust jumps with 32-bit relative addresses. Calls are already
1018 if (insn
[0] == 0xe9)
1020 /* Adjust conditional jumps. */
1021 else if (insn
[0] == 0x0f && (insn
[1] & 0xf0) == 0x80)
1026 rel32
= extract_signed_integer (insn
+ offset
, 4, byte_order
);
1027 newrel
= (oldloc
- *to
) + rel32
;
1028 store_signed_integer (insn
+ offset
, 4, byte_order
, newrel
);
1029 displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
1030 hex_string (rel32
), paddress (gdbarch
, oldloc
),
1031 hex_string (newrel
), paddress (gdbarch
, *to
));
1034 /* Write the adjusted instructions into their displaced
1036 append_insns (to
, insn_length
, buf
);
1040 #ifdef I386_REGNO_TO_SYMMETRY
1041 #error "The Sequent Symmetry is no longer supported."
1044 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
1045 and %esp "belong" to the calling function. Therefore these
1046 registers should be saved if they're going to be modified. */
1048 /* The maximum number of saved registers. This should include all
1049 registers mentioned above, and %eip. */
1050 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
1052 struct i386_frame_cache
1060 /* Saved registers. */
1061 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
1066 /* Stack space reserved for local variables. */
1070 /* Allocate and initialize a frame cache. */
1072 static struct i386_frame_cache
*
1073 i386_alloc_frame_cache (void)
1075 struct i386_frame_cache
*cache
;
1078 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
1083 cache
->sp_offset
= -4;
1086 /* Saved registers. We initialize these to -1 since zero is a valid
1087 offset (that's where %ebp is supposed to be stored). */
1088 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
1089 cache
->saved_regs
[i
] = -1;
1090 cache
->saved_sp
= 0;
1091 cache
->saved_sp_reg
= -1;
1092 cache
->pc_in_eax
= 0;
1094 /* Frameless until proven otherwise. */
1100 /* If the instruction at PC is a jump, return the address of its
1101 target. Otherwise, return PC. */
1104 i386_follow_jump (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1106 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1111 if (target_read_code (pc
, &op
, 1))
1118 op
= read_code_unsigned_integer (pc
+ 1, 1, byte_order
);
1124 /* Relative jump: if data16 == 0, disp32, else disp16. */
1127 delta
= read_memory_integer (pc
+ 2, 2, byte_order
);
1129 /* Include the size of the jmp instruction (including the
1135 delta
= read_memory_integer (pc
+ 1, 4, byte_order
);
1137 /* Include the size of the jmp instruction. */
1142 /* Relative jump, disp8 (ignore data16). */
1143 delta
= read_memory_integer (pc
+ data16
+ 1, 1, byte_order
);
1145 delta
+= data16
+ 2;
1152 /* Check whether PC points at a prologue for a function returning a
1153 structure or union. If so, it updates CACHE and returns the
1154 address of the first instruction after the code sequence that
1155 removes the "hidden" argument from the stack or CURRENT_PC,
1156 whichever is smaller. Otherwise, return PC. */
1159 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
1160 struct i386_frame_cache
*cache
)
1162 /* Functions that return a structure or union start with:
1165 xchgl %eax, (%esp) 0x87 0x04 0x24
1166 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
1168 (the System V compiler puts out the second `xchg' instruction,
1169 and the assembler doesn't try to optimize it, so the 'sib' form
1170 gets generated). This sequence is used to get the address of the
1171 return buffer for a function that returns a structure. */
1172 static gdb_byte proto1
[3] = { 0x87, 0x04, 0x24 };
1173 static gdb_byte proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
1177 if (current_pc
<= pc
)
1180 if (target_read_code (pc
, &op
, 1))
1183 if (op
!= 0x58) /* popl %eax */
1186 if (target_read_code (pc
+ 1, buf
, 4))
1189 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
1192 if (current_pc
== pc
)
1194 cache
->sp_offset
+= 4;
1198 if (current_pc
== pc
+ 1)
1200 cache
->pc_in_eax
= 1;
1204 if (buf
[1] == proto1
[1])
1211 i386_skip_probe (CORE_ADDR pc
)
1213 /* A function may start with
1227 if (target_read_code (pc
, &op
, 1))
1230 if (op
== 0x68 || op
== 0x6a)
1234 /* Skip past the `pushl' instruction; it has either a one-byte or a
1235 four-byte operand, depending on the opcode. */
1241 /* Read the following 8 bytes, which should be `call _probe' (6
1242 bytes) followed by `addl $4,%esp' (2 bytes). */
1243 read_memory (pc
+ delta
, buf
, sizeof (buf
));
1244 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
1245 pc
+= delta
+ sizeof (buf
);
1251 /* GCC 4.1 and later, can put code in the prologue to realign the
1252 stack pointer. Check whether PC points to such code, and update
1253 CACHE accordingly. Return the first instruction after the code
1254 sequence or CURRENT_PC, whichever is smaller. If we don't
1255 recognize the code, return PC. */
1258 i386_analyze_stack_align (CORE_ADDR pc
, CORE_ADDR current_pc
,
1259 struct i386_frame_cache
*cache
)
1261 /* There are 2 code sequences to re-align stack before the frame
1264 1. Use a caller-saved saved register:
1270 2. Use a callee-saved saved register:
1277 "andl $-XXX, %esp" can be either 3 bytes or 6 bytes:
1279 0x83 0xe4 0xf0 andl $-16, %esp
1280 0x81 0xe4 0x00 0xff 0xff 0xff andl $-256, %esp
1285 int offset
, offset_and
;
1286 static int regnums
[8] = {
1287 I386_EAX_REGNUM
, /* %eax */
1288 I386_ECX_REGNUM
, /* %ecx */
1289 I386_EDX_REGNUM
, /* %edx */
1290 I386_EBX_REGNUM
, /* %ebx */
1291 I386_ESP_REGNUM
, /* %esp */
1292 I386_EBP_REGNUM
, /* %ebp */
1293 I386_ESI_REGNUM
, /* %esi */
1294 I386_EDI_REGNUM
/* %edi */
1297 if (target_read_code (pc
, buf
, sizeof buf
))
1300 /* Check caller-saved saved register. The first instruction has
1301 to be "leal 4(%esp), %reg". */
1302 if (buf
[0] == 0x8d && buf
[2] == 0x24 && buf
[3] == 0x4)
1304 /* MOD must be binary 10 and R/M must be binary 100. */
1305 if ((buf
[1] & 0xc7) != 0x44)
1308 /* REG has register number. */
1309 reg
= (buf
[1] >> 3) & 7;
1314 /* Check callee-saved saved register. The first instruction
1315 has to be "pushl %reg". */
1316 if ((buf
[0] & 0xf8) != 0x50)
1322 /* The next instruction has to be "leal 8(%esp), %reg". */
1323 if (buf
[1] != 0x8d || buf
[3] != 0x24 || buf
[4] != 0x8)
1326 /* MOD must be binary 10 and R/M must be binary 100. */
1327 if ((buf
[2] & 0xc7) != 0x44)
1330 /* REG has register number. Registers in pushl and leal have to
1332 if (reg
!= ((buf
[2] >> 3) & 7))
1338 /* Rigister can't be %esp nor %ebp. */
1339 if (reg
== 4 || reg
== 5)
1342 /* The next instruction has to be "andl $-XXX, %esp". */
1343 if (buf
[offset
+ 1] != 0xe4
1344 || (buf
[offset
] != 0x81 && buf
[offset
] != 0x83))
1347 offset_and
= offset
;
1348 offset
+= buf
[offset
] == 0x81 ? 6 : 3;
1350 /* The next instruction has to be "pushl -4(%reg)". 8bit -4 is
1351 0xfc. REG must be binary 110 and MOD must be binary 01. */
1352 if (buf
[offset
] != 0xff
1353 || buf
[offset
+ 2] != 0xfc
1354 || (buf
[offset
+ 1] & 0xf8) != 0x70)
1357 /* R/M has register. Registers in leal and pushl have to be the
1359 if (reg
!= (buf
[offset
+ 1] & 7))
1362 if (current_pc
> pc
+ offset_and
)
1363 cache
->saved_sp_reg
= regnums
[reg
];
1365 return std::min (pc
+ offset
+ 3, current_pc
);
1368 /* Maximum instruction length we need to handle. */
1369 #define I386_MAX_MATCHED_INSN_LEN 6
1371 /* Instruction description. */
1375 gdb_byte insn
[I386_MAX_MATCHED_INSN_LEN
];
1376 gdb_byte mask
[I386_MAX_MATCHED_INSN_LEN
];
1379 /* Return whether instruction at PC matches PATTERN. */
1382 i386_match_pattern (CORE_ADDR pc
, struct i386_insn pattern
)
1386 if (target_read_code (pc
, &op
, 1))
1389 if ((op
& pattern
.mask
[0]) == pattern
.insn
[0])
1391 gdb_byte buf
[I386_MAX_MATCHED_INSN_LEN
- 1];
1392 int insn_matched
= 1;
1395 gdb_assert (pattern
.len
> 1);
1396 gdb_assert (pattern
.len
<= I386_MAX_MATCHED_INSN_LEN
);
1398 if (target_read_code (pc
+ 1, buf
, pattern
.len
- 1))
1401 for (i
= 1; i
< pattern
.len
; i
++)
1403 if ((buf
[i
- 1] & pattern
.mask
[i
]) != pattern
.insn
[i
])
1406 return insn_matched
;
1411 /* Search for the instruction at PC in the list INSN_PATTERNS. Return
1412 the first instruction description that matches. Otherwise, return
1415 static struct i386_insn
*
1416 i386_match_insn (CORE_ADDR pc
, struct i386_insn
*insn_patterns
)
1418 struct i386_insn
*pattern
;
1420 for (pattern
= insn_patterns
; pattern
->len
> 0; pattern
++)
1422 if (i386_match_pattern (pc
, *pattern
))
1429 /* Return whether PC points inside a sequence of instructions that
1430 matches INSN_PATTERNS. */
1433 i386_match_insn_block (CORE_ADDR pc
, struct i386_insn
*insn_patterns
)
1435 CORE_ADDR current_pc
;
1437 struct i386_insn
*insn
;
1439 insn
= i386_match_insn (pc
, insn_patterns
);
1444 ix
= insn
- insn_patterns
;
1445 for (i
= ix
- 1; i
>= 0; i
--)
1447 current_pc
-= insn_patterns
[i
].len
;
1449 if (!i386_match_pattern (current_pc
, insn_patterns
[i
]))
1453 current_pc
= pc
+ insn
->len
;
1454 for (insn
= insn_patterns
+ ix
+ 1; insn
->len
> 0; insn
++)
1456 if (!i386_match_pattern (current_pc
, *insn
))
1459 current_pc
+= insn
->len
;
1465 /* Some special instructions that might be migrated by GCC into the
1466 part of the prologue that sets up the new stack frame. Because the
1467 stack frame hasn't been setup yet, no registers have been saved
1468 yet, and only the scratch registers %eax, %ecx and %edx can be
1471 static i386_insn i386_frame_setup_skip_insns
[] =
1473 /* Check for `movb imm8, r' and `movl imm32, r'.
1475 ??? Should we handle 16-bit operand-sizes here? */
1477 /* `movb imm8, %al' and `movb imm8, %ah' */
1478 /* `movb imm8, %cl' and `movb imm8, %ch' */
1479 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
1480 /* `movb imm8, %dl' and `movb imm8, %dh' */
1481 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
1482 /* `movl imm32, %eax' and `movl imm32, %ecx' */
1483 { 5, { 0xb8 }, { 0xfe } },
1484 /* `movl imm32, %edx' */
1485 { 5, { 0xba }, { 0xff } },
1487 /* Check for `mov imm32, r32'. Note that there is an alternative
1488 encoding for `mov m32, %eax'.
1490 ??? Should we handle SIB addressing here?
1491 ??? Should we handle 16-bit operand-sizes here? */
1493 /* `movl m32, %eax' */
1494 { 5, { 0xa1 }, { 0xff } },
1495 /* `movl m32, %eax' and `mov; m32, %ecx' */
1496 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
1497 /* `movl m32, %edx' */
1498 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
1500 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
1501 Because of the symmetry, there are actually two ways to encode
1502 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
1503 opcode bytes 0x31 and 0x33 for `xorl'. */
1505 /* `subl %eax, %eax' */
1506 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
1507 /* `subl %ecx, %ecx' */
1508 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
1509 /* `subl %edx, %edx' */
1510 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
1511 /* `xorl %eax, %eax' */
1512 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
1513 /* `xorl %ecx, %ecx' */
1514 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
1515 /* `xorl %edx, %edx' */
1516 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
1520 /* Check whether PC points to an endbr32 instruction. */
1522 i386_skip_endbr (CORE_ADDR pc
)
1524 static const gdb_byte endbr32
[] = { 0xf3, 0x0f, 0x1e, 0xfb };
1526 gdb_byte buf
[sizeof (endbr32
)];
1528 /* Stop there if we can't read the code */
1529 if (target_read_code (pc
, buf
, sizeof (endbr32
)))
1532 /* If the instruction isn't an endbr32, stop */
1533 if (memcmp (buf
, endbr32
, sizeof (endbr32
)) != 0)
1536 return pc
+ sizeof (endbr32
);
1539 /* Check whether PC points to a no-op instruction. */
1541 i386_skip_noop (CORE_ADDR pc
)
1546 if (target_read_code (pc
, &op
, 1))
1552 /* Ignore `nop' instruction. */
1556 if (target_read_code (pc
, &op
, 1))
1560 /* Ignore no-op instruction `mov %edi, %edi'.
1561 Microsoft system dlls often start with
1562 a `mov %edi,%edi' instruction.
1563 The 5 bytes before the function start are
1564 filled with `nop' instructions.
1565 This pattern can be used for hot-patching:
1566 The `mov %edi, %edi' instruction can be replaced by a
1567 near jump to the location of the 5 `nop' instructions
1568 which can be replaced by a 32-bit jump to anywhere
1569 in the 32-bit address space. */
1571 else if (op
== 0x8b)
1573 if (target_read_code (pc
+ 1, &op
, 1))
1579 if (target_read_code (pc
, &op
, 1))
1589 /* Check whether PC points at a code that sets up a new stack frame.
1590 If so, it updates CACHE and returns the address of the first
1591 instruction after the sequence that sets up the frame or LIMIT,
1592 whichever is smaller. If we don't recognize the code, return PC. */
1595 i386_analyze_frame_setup (struct gdbarch
*gdbarch
,
1596 CORE_ADDR pc
, CORE_ADDR limit
,
1597 struct i386_frame_cache
*cache
)
1599 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1600 struct i386_insn
*insn
;
1607 if (target_read_code (pc
, &op
, 1))
1610 if (op
== 0x55) /* pushl %ebp */
1612 /* Take into account that we've executed the `pushl %ebp' that
1613 starts this instruction sequence. */
1614 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
1615 cache
->sp_offset
+= 4;
1618 /* If that's all, return now. */
1622 /* Check for some special instructions that might be migrated by
1623 GCC into the prologue and skip them. At this point in the
1624 prologue, code should only touch the scratch registers %eax,
1625 %ecx and %edx, so while the number of possibilities is sheer,
1628 Make sure we only skip these instructions if we later see the
1629 `movl %esp, %ebp' that actually sets up the frame. */
1630 while (pc
+ skip
< limit
)
1632 insn
= i386_match_insn (pc
+ skip
, i386_frame_setup_skip_insns
);
1639 /* If that's all, return now. */
1640 if (limit
<= pc
+ skip
)
1643 if (target_read_code (pc
+ skip
, &op
, 1))
1646 /* The i386 prologue looks like
1652 and a different prologue can be generated for atom.
1656 lea -0x10(%esp),%esp
1658 We handle both of them here. */
1662 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
1664 if (read_code_unsigned_integer (pc
+ skip
+ 1, 1, byte_order
)
1670 if (read_code_unsigned_integer (pc
+ skip
+ 1, 1, byte_order
)
1675 case 0x8d: /* Check for 'lea (%ebp), %ebp'. */
1676 if (read_code_unsigned_integer (pc
+ skip
+ 1, 2, byte_order
)
1685 /* OK, we actually have a frame. We just don't know how large
1686 it is yet. Set its size to zero. We'll adjust it if
1687 necessary. We also now commit to skipping the special
1688 instructions mentioned before. */
1691 /* If that's all, return now. */
1695 /* Check for stack adjustment
1701 NOTE: You can't subtract a 16-bit immediate from a 32-bit
1702 reg, so we don't have to worry about a data16 prefix. */
1703 if (target_read_code (pc
, &op
, 1))
1707 /* `subl' with 8-bit immediate. */
1708 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0xec)
1709 /* Some instruction starting with 0x83 other than `subl'. */
1712 /* `subl' with signed 8-bit immediate (though it wouldn't
1713 make sense to be negative). */
1714 cache
->locals
= read_code_integer (pc
+ 2, 1, byte_order
);
1717 else if (op
== 0x81)
1719 /* Maybe it is `subl' with a 32-bit immediate. */
1720 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0xec)
1721 /* Some instruction starting with 0x81 other than `subl'. */
1724 /* It is `subl' with a 32-bit immediate. */
1725 cache
->locals
= read_code_integer (pc
+ 2, 4, byte_order
);
1728 else if (op
== 0x8d)
1730 /* The ModR/M byte is 0x64. */
1731 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0x64)
1733 /* 'lea' with 8-bit displacement. */
1734 cache
->locals
= -1 * read_code_integer (pc
+ 3, 1, byte_order
);
1739 /* Some instruction other than `subl' nor 'lea'. */
1743 else if (op
== 0xc8) /* enter */
1745 cache
->locals
= read_code_unsigned_integer (pc
+ 1, 2, byte_order
);
1752 /* Check whether PC points at code that saves registers on the stack.
1753 If so, it updates CACHE and returns the address of the first
1754 instruction after the register saves or CURRENT_PC, whichever is
1755 smaller. Otherwise, return PC. */
1758 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
1759 struct i386_frame_cache
*cache
)
1761 CORE_ADDR offset
= 0;
1765 if (cache
->locals
> 0)
1766 offset
-= cache
->locals
;
1767 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
1769 if (target_read_code (pc
, &op
, 1))
1771 if (op
< 0x50 || op
> 0x57)
1775 cache
->saved_regs
[op
- 0x50] = offset
;
1776 cache
->sp_offset
+= 4;
1783 /* Do a full analysis of the prologue at PC and update CACHE
1784 accordingly. Bail out early if CURRENT_PC is reached. Return the
1785 address where the analysis stopped.
1787 We handle these cases:
1789 The startup sequence can be at the start of the function, or the
1790 function can start with a branch to startup code at the end.
1792 %ebp can be set up with either the 'enter' instruction, or "pushl
1793 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
1794 once used in the System V compiler).
1796 Local space is allocated just below the saved %ebp by either the
1797 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
1798 16-bit unsigned argument for space to allocate, and the 'addl'
1799 instruction could have either a signed byte, or 32-bit immediate.
1801 Next, the registers used by this function are pushed. With the
1802 System V compiler they will always be in the order: %edi, %esi,
1803 %ebx (and sometimes a harmless bug causes it to also save but not
1804 restore %eax); however, the code below is willing to see the pushes
1805 in any order, and will handle up to 8 of them.
1807 If the setup sequence is at the end of the function, then the next
1808 instruction will be a branch back to the start. */
1811 i386_analyze_prologue (struct gdbarch
*gdbarch
,
1812 CORE_ADDR pc
, CORE_ADDR current_pc
,
1813 struct i386_frame_cache
*cache
)
1815 pc
= i386_skip_endbr (pc
);
1816 pc
= i386_skip_noop (pc
);
1817 pc
= i386_follow_jump (gdbarch
, pc
);
1818 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
1819 pc
= i386_skip_probe (pc
);
1820 pc
= i386_analyze_stack_align (pc
, current_pc
, cache
);
1821 pc
= i386_analyze_frame_setup (gdbarch
, pc
, current_pc
, cache
);
1822 return i386_analyze_register_saves (pc
, current_pc
, cache
);
1825 /* Return PC of first real instruction. */
1828 i386_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
)
1830 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1832 static gdb_byte pic_pat
[6] =
1834 0xe8, 0, 0, 0, 0, /* call 0x0 */
1835 0x5b, /* popl %ebx */
1837 struct i386_frame_cache cache
;
1841 CORE_ADDR func_addr
;
1843 if (find_pc_partial_function (start_pc
, NULL
, &func_addr
, NULL
))
1845 CORE_ADDR post_prologue_pc
1846 = skip_prologue_using_sal (gdbarch
, func_addr
);
1847 struct compunit_symtab
*cust
= find_pc_compunit_symtab (func_addr
);
1849 /* LLVM backend (Clang/Flang) always emits a line note before the
1850 prologue and another one after. We trust clang and newer Intel
1851 compilers to emit usable line notes. */
1852 if (post_prologue_pc
1854 && COMPUNIT_PRODUCER (cust
) != NULL
1855 && (producer_is_llvm (COMPUNIT_PRODUCER (cust
))
1856 || producer_is_icc_ge_19 (COMPUNIT_PRODUCER (cust
)))))
1857 return std::max (start_pc
, post_prologue_pc
);
1861 pc
= i386_analyze_prologue (gdbarch
, start_pc
, 0xffffffff, &cache
);
1862 if (cache
.locals
< 0)
1865 /* Found valid frame setup. */
1867 /* The native cc on SVR4 in -K PIC mode inserts the following code
1868 to get the address of the global offset table (GOT) into register
1873 movl %ebx,x(%ebp) (optional)
1876 This code is with the rest of the prologue (at the end of the
1877 function), so we have to skip it to get to the first real
1878 instruction at the start of the function. */
1880 for (i
= 0; i
< 6; i
++)
1882 if (target_read_code (pc
+ i
, &op
, 1))
1885 if (pic_pat
[i
] != op
)
1892 if (target_read_code (pc
+ delta
, &op
, 1))
1895 if (op
== 0x89) /* movl %ebx, x(%ebp) */
1897 op
= read_code_unsigned_integer (pc
+ delta
+ 1, 1, byte_order
);
1899 if (op
== 0x5d) /* One byte offset from %ebp. */
1901 else if (op
== 0x9d) /* Four byte offset from %ebp. */
1903 else /* Unexpected instruction. */
1906 if (target_read_code (pc
+ delta
, &op
, 1))
1911 if (delta
> 0 && op
== 0x81
1912 && read_code_unsigned_integer (pc
+ delta
+ 1, 1, byte_order
)
1919 /* If the function starts with a branch (to startup code at the end)
1920 the last instruction should bring us back to the first
1921 instruction of the real code. */
1922 if (i386_follow_jump (gdbarch
, start_pc
) != start_pc
)
1923 pc
= i386_follow_jump (gdbarch
, pc
);
1928 /* Check that the code pointed to by PC corresponds to a call to
1929 __main, skip it if so. Return PC otherwise. */
1932 i386_skip_main_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1934 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1937 if (target_read_code (pc
, &op
, 1))
1943 if (target_read_code (pc
+ 1, buf
, sizeof buf
) == 0)
1945 /* Make sure address is computed correctly as a 32bit
1946 integer even if CORE_ADDR is 64 bit wide. */
1947 struct bound_minimal_symbol s
;
1948 CORE_ADDR call_dest
;
1950 call_dest
= pc
+ 5 + extract_signed_integer (buf
, 4, byte_order
);
1951 call_dest
= call_dest
& 0xffffffffU
;
1952 s
= lookup_minimal_symbol_by_pc (call_dest
);
1953 if (s
.minsym
!= NULL
1954 && s
.minsym
->linkage_name () != NULL
1955 && strcmp (s
.minsym
->linkage_name (), "__main") == 0)
1963 /* This function is 64-bit safe. */
1966 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1970 frame_unwind_register (next_frame
, gdbarch_pc_regnum (gdbarch
), buf
);
1971 return extract_typed_address (buf
, builtin_type (gdbarch
)->builtin_func_ptr
);
1975 /* Normal frames. */
1978 i386_frame_cache_1 (struct frame_info
*this_frame
,
1979 struct i386_frame_cache
*cache
)
1981 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1982 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1986 cache
->pc
= get_frame_func (this_frame
);
1988 /* In principle, for normal frames, %ebp holds the frame pointer,
1989 which holds the base address for the current stack frame.
1990 However, for functions that don't need it, the frame pointer is
1991 optional. For these "frameless" functions the frame pointer is
1992 actually the frame pointer of the calling frame. Signal
1993 trampolines are just a special case of a "frameless" function.
1994 They (usually) share their frame pointer with the frame that was
1995 in progress when the signal occurred. */
1997 get_frame_register (this_frame
, I386_EBP_REGNUM
, buf
);
1998 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
);
1999 if (cache
->base
== 0)
2005 /* For normal frames, %eip is stored at 4(%ebp). */
2006 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
2009 i386_analyze_prologue (gdbarch
, cache
->pc
, get_frame_pc (this_frame
),
2012 if (cache
->locals
< 0)
2014 /* We didn't find a valid frame, which means that CACHE->base
2015 currently holds the frame pointer for our calling frame. If
2016 we're at the start of a function, or somewhere half-way its
2017 prologue, the function's frame probably hasn't been fully
2018 setup yet. Try to reconstruct the base address for the stack
2019 frame by looking at the stack pointer. For truly "frameless"
2020 functions this might work too. */
2022 if (cache
->saved_sp_reg
!= -1)
2024 /* Saved stack pointer has been saved. */
2025 get_frame_register (this_frame
, cache
->saved_sp_reg
, buf
);
2026 cache
->saved_sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2028 /* We're halfway aligning the stack. */
2029 cache
->base
= ((cache
->saved_sp
- 4) & 0xfffffff0) - 4;
2030 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->saved_sp
- 4;
2032 /* This will be added back below. */
2033 cache
->saved_regs
[I386_EIP_REGNUM
] -= cache
->base
;
2035 else if (cache
->pc
!= 0
2036 || target_read_code (get_frame_pc (this_frame
), buf
, 1))
2038 /* We're in a known function, but did not find a frame
2039 setup. Assume that the function does not use %ebp.
2040 Alternatively, we may have jumped to an invalid
2041 address; in that case there is definitely no new
2043 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2044 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
)
2048 /* We're in an unknown function. We could not find the start
2049 of the function to analyze the prologue; our best option is
2050 to assume a typical frame layout with the caller's %ebp
2052 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
2055 if (cache
->saved_sp_reg
!= -1)
2057 /* Saved stack pointer has been saved (but the SAVED_SP_REG
2058 register may be unavailable). */
2059 if (cache
->saved_sp
== 0
2060 && deprecated_frame_register_read (this_frame
,
2061 cache
->saved_sp_reg
, buf
))
2062 cache
->saved_sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2064 /* Now that we have the base address for the stack frame we can
2065 calculate the value of %esp in the calling frame. */
2066 else if (cache
->saved_sp
== 0)
2067 cache
->saved_sp
= cache
->base
+ 8;
2069 /* Adjust all the saved registers such that they contain addresses
2070 instead of offsets. */
2071 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
2072 if (cache
->saved_regs
[i
] != -1)
2073 cache
->saved_regs
[i
] += cache
->base
;
2078 static struct i386_frame_cache
*
2079 i386_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2081 struct i386_frame_cache
*cache
;
2084 return (struct i386_frame_cache
*) *this_cache
;
2086 cache
= i386_alloc_frame_cache ();
2087 *this_cache
= cache
;
2091 i386_frame_cache_1 (this_frame
, cache
);
2093 catch (const gdb_exception_error
&ex
)
2095 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2103 i386_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2104 struct frame_id
*this_id
)
2106 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2109 (*this_id
) = frame_id_build_unavailable_stack (cache
->pc
);
2110 else if (cache
->base
== 0)
2112 /* This marks the outermost frame. */
2116 /* See the end of i386_push_dummy_call. */
2117 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
2121 static enum unwind_stop_reason
2122 i386_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2125 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2128 return UNWIND_UNAVAILABLE
;
2130 /* This marks the outermost frame. */
2131 if (cache
->base
== 0)
2132 return UNWIND_OUTERMOST
;
2134 return UNWIND_NO_REASON
;
2137 static struct value
*
2138 i386_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
2141 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2143 gdb_assert (regnum
>= 0);
2145 /* The System V ABI says that:
2147 "The flags register contains the system flags, such as the
2148 direction flag and the carry flag. The direction flag must be
2149 set to the forward (that is, zero) direction before entry and
2150 upon exit from a function. Other user flags have no specified
2151 role in the standard calling sequence and are not preserved."
2153 To guarantee the "upon exit" part of that statement we fake a
2154 saved flags register that has its direction flag cleared.
2156 Note that GCC doesn't seem to rely on the fact that the direction
2157 flag is cleared after a function return; it always explicitly
2158 clears the flag before operations where it matters.
2160 FIXME: kettenis/20030316: I'm not quite sure whether this is the
2161 right thing to do. The way we fake the flags register here makes
2162 it impossible to change it. */
2164 if (regnum
== I386_EFLAGS_REGNUM
)
2168 val
= get_frame_register_unsigned (this_frame
, regnum
);
2170 return frame_unwind_got_constant (this_frame
, regnum
, val
);
2173 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
2174 return frame_unwind_got_register (this_frame
, regnum
, I386_EAX_REGNUM
);
2176 if (regnum
== I386_ESP_REGNUM
2177 && (cache
->saved_sp
!= 0 || cache
->saved_sp_reg
!= -1))
2179 /* If the SP has been saved, but we don't know where, then this
2180 means that SAVED_SP_REG register was found unavailable back
2181 when we built the cache. */
2182 if (cache
->saved_sp
== 0)
2183 return frame_unwind_got_register (this_frame
, regnum
,
2184 cache
->saved_sp_reg
);
2186 return frame_unwind_got_constant (this_frame
, regnum
,
2190 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
2191 return frame_unwind_got_memory (this_frame
, regnum
,
2192 cache
->saved_regs
[regnum
]);
2194 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
2197 static const struct frame_unwind i386_frame_unwind
=
2201 i386_frame_unwind_stop_reason
,
2203 i386_frame_prev_register
,
2205 default_frame_sniffer
2208 /* Normal frames, but in a function epilogue. */
2210 /* Implement the stack_frame_destroyed_p gdbarch method.
2212 The epilogue is defined here as the 'ret' instruction, which will
2213 follow any instruction such as 'leave' or 'pop %ebp' that destroys
2214 the function's stack frame. */
2217 i386_stack_frame_destroyed_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
2220 struct compunit_symtab
*cust
;
2222 cust
= find_pc_compunit_symtab (pc
);
2223 if (cust
!= NULL
&& COMPUNIT_EPILOGUE_UNWIND_VALID (cust
))
2226 if (target_read_memory (pc
, &insn
, 1))
2227 return 0; /* Can't read memory at pc. */
2229 if (insn
!= 0xc3) /* 'ret' instruction. */
2236 i386_epilogue_frame_sniffer (const struct frame_unwind
*self
,
2237 struct frame_info
*this_frame
,
2238 void **this_prologue_cache
)
2240 if (frame_relative_level (this_frame
) == 0)
2241 return i386_stack_frame_destroyed_p (get_frame_arch (this_frame
),
2242 get_frame_pc (this_frame
));
2247 static struct i386_frame_cache
*
2248 i386_epilogue_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2250 struct i386_frame_cache
*cache
;
2254 return (struct i386_frame_cache
*) *this_cache
;
2256 cache
= i386_alloc_frame_cache ();
2257 *this_cache
= cache
;
2261 cache
->pc
= get_frame_func (this_frame
);
2263 /* At this point the stack looks as if we just entered the
2264 function, with the return address at the top of the
2266 sp
= get_frame_register_unsigned (this_frame
, I386_ESP_REGNUM
);
2267 cache
->base
= sp
+ cache
->sp_offset
;
2268 cache
->saved_sp
= cache
->base
+ 8;
2269 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->base
+ 4;
2273 catch (const gdb_exception_error
&ex
)
2275 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2282 static enum unwind_stop_reason
2283 i386_epilogue_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2286 struct i386_frame_cache
*cache
=
2287 i386_epilogue_frame_cache (this_frame
, this_cache
);
2290 return UNWIND_UNAVAILABLE
;
2292 return UNWIND_NO_REASON
;
2296 i386_epilogue_frame_this_id (struct frame_info
*this_frame
,
2298 struct frame_id
*this_id
)
2300 struct i386_frame_cache
*cache
=
2301 i386_epilogue_frame_cache (this_frame
, this_cache
);
2304 (*this_id
) = frame_id_build_unavailable_stack (cache
->pc
);
2306 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
2309 static struct value
*
2310 i386_epilogue_frame_prev_register (struct frame_info
*this_frame
,
2311 void **this_cache
, int regnum
)
2313 /* Make sure we've initialized the cache. */
2314 i386_epilogue_frame_cache (this_frame
, this_cache
);
2316 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
2319 static const struct frame_unwind i386_epilogue_frame_unwind
=
2323 i386_epilogue_frame_unwind_stop_reason
,
2324 i386_epilogue_frame_this_id
,
2325 i386_epilogue_frame_prev_register
,
2327 i386_epilogue_frame_sniffer
2331 /* Stack-based trampolines. */
2333 /* These trampolines are used on cross x86 targets, when taking the
2334 address of a nested function. When executing these trampolines,
2335 no stack frame is set up, so we are in a similar situation as in
2336 epilogues and i386_epilogue_frame_this_id can be re-used. */
2338 /* Static chain passed in register. */
2340 static i386_insn i386_tramp_chain_in_reg_insns
[] =
2342 /* `movl imm32, %eax' and `movl imm32, %ecx' */
2343 { 5, { 0xb8 }, { 0xfe } },
2346 { 5, { 0xe9 }, { 0xff } },
2351 /* Static chain passed on stack (when regparm=3). */
2353 static i386_insn i386_tramp_chain_on_stack_insns
[] =
2356 { 5, { 0x68 }, { 0xff } },
2359 { 5, { 0xe9 }, { 0xff } },
2364 /* Return whether PC points inside a stack trampoline. */
2367 i386_in_stack_tramp_p (CORE_ADDR pc
)
2372 /* A stack trampoline is detected if no name is associated
2373 to the current pc and if it points inside a trampoline
2376 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2380 if (target_read_memory (pc
, &insn
, 1))
2383 if (!i386_match_insn_block (pc
, i386_tramp_chain_in_reg_insns
)
2384 && !i386_match_insn_block (pc
, i386_tramp_chain_on_stack_insns
))
2391 i386_stack_tramp_frame_sniffer (const struct frame_unwind
*self
,
2392 struct frame_info
*this_frame
,
2395 if (frame_relative_level (this_frame
) == 0)
2396 return i386_in_stack_tramp_p (get_frame_pc (this_frame
));
2401 static const struct frame_unwind i386_stack_tramp_frame_unwind
=
2405 i386_epilogue_frame_unwind_stop_reason
,
2406 i386_epilogue_frame_this_id
,
2407 i386_epilogue_frame_prev_register
,
2409 i386_stack_tramp_frame_sniffer
2412 /* Generate a bytecode expression to get the value of the saved PC. */
2415 i386_gen_return_address (struct gdbarch
*gdbarch
,
2416 struct agent_expr
*ax
, struct axs_value
*value
,
2419 /* The following sequence assumes the traditional use of the base
2421 ax_reg (ax
, I386_EBP_REGNUM
);
2423 ax_simple (ax
, aop_add
);
2424 value
->type
= register_type (gdbarch
, I386_EIP_REGNUM
);
2425 value
->kind
= axs_lvalue_memory
;
2429 /* Signal trampolines. */
2431 static struct i386_frame_cache
*
2432 i386_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2434 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2435 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2436 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2437 struct i386_frame_cache
*cache
;
2442 return (struct i386_frame_cache
*) *this_cache
;
2444 cache
= i386_alloc_frame_cache ();
2448 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2449 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
) - 4;
2451 addr
= tdep
->sigcontext_addr (this_frame
);
2452 if (tdep
->sc_reg_offset
)
2456 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
2458 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
2459 if (tdep
->sc_reg_offset
[i
] != -1)
2460 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
2464 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
2465 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
2470 catch (const gdb_exception_error
&ex
)
2472 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2476 *this_cache
= cache
;
2480 static enum unwind_stop_reason
2481 i386_sigtramp_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2484 struct i386_frame_cache
*cache
=
2485 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2488 return UNWIND_UNAVAILABLE
;
2490 return UNWIND_NO_REASON
;
2494 i386_sigtramp_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2495 struct frame_id
*this_id
)
2497 struct i386_frame_cache
*cache
=
2498 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2501 (*this_id
) = frame_id_build_unavailable_stack (get_frame_pc (this_frame
));
2504 /* See the end of i386_push_dummy_call. */
2505 (*this_id
) = frame_id_build (cache
->base
+ 8, get_frame_pc (this_frame
));
2509 static struct value
*
2510 i386_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2511 void **this_cache
, int regnum
)
2513 /* Make sure we've initialized the cache. */
2514 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2516 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
2520 i386_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2521 struct frame_info
*this_frame
,
2522 void **this_prologue_cache
)
2524 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
2526 /* We shouldn't even bother if we don't have a sigcontext_addr
2528 if (tdep
->sigcontext_addr
== NULL
)
2531 if (tdep
->sigtramp_p
!= NULL
)
2533 if (tdep
->sigtramp_p (this_frame
))
2537 if (tdep
->sigtramp_start
!= 0)
2539 CORE_ADDR pc
= get_frame_pc (this_frame
);
2541 gdb_assert (tdep
->sigtramp_end
!= 0);
2542 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
2549 static const struct frame_unwind i386_sigtramp_frame_unwind
=
2553 i386_sigtramp_frame_unwind_stop_reason
,
2554 i386_sigtramp_frame_this_id
,
2555 i386_sigtramp_frame_prev_register
,
2557 i386_sigtramp_frame_sniffer
2562 i386_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
2564 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2569 static const struct frame_base i386_frame_base
=
2572 i386_frame_base_address
,
2573 i386_frame_base_address
,
2574 i386_frame_base_address
2577 static struct frame_id
2578 i386_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
2582 fp
= get_frame_register_unsigned (this_frame
, I386_EBP_REGNUM
);
2584 /* See the end of i386_push_dummy_call. */
2585 return frame_id_build (fp
+ 8, get_frame_pc (this_frame
));
2588 /* _Decimal128 function return values need 16-byte alignment on the
2592 i386_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
2594 return sp
& -(CORE_ADDR
)16;
2598 /* Figure out where the longjmp will land. Slurp the args out of the
2599 stack. We expect the first arg to be a pointer to the jmp_buf
2600 structure from which we extract the address that we will land at.
2601 This address is copied into PC. This routine returns non-zero on
2605 i386_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
2608 CORE_ADDR sp
, jb_addr
;
2609 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2610 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2611 int jb_pc_offset
= gdbarch_tdep (gdbarch
)->jb_pc_offset
;
2613 /* If JB_PC_OFFSET is -1, we have no way to find out where the
2614 longjmp will land. */
2615 if (jb_pc_offset
== -1)
2618 get_frame_register (frame
, I386_ESP_REGNUM
, buf
);
2619 sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2620 if (target_read_memory (sp
+ 4, buf
, 4))
2623 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
2624 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, 4))
2627 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
2632 /* Check whether TYPE must be 16-byte-aligned when passed as a
2633 function argument. 16-byte vectors, _Decimal128 and structures or
2634 unions containing such types must be 16-byte-aligned; other
2635 arguments are 4-byte-aligned. */
2638 i386_16_byte_align_p (struct type
*type
)
2640 type
= check_typedef (type
);
2641 if ((type
->code () == TYPE_CODE_DECFLOAT
2642 || (type
->code () == TYPE_CODE_ARRAY
&& type
->is_vector ()))
2643 && TYPE_LENGTH (type
) == 16)
2645 if (type
->code () == TYPE_CODE_ARRAY
)
2646 return i386_16_byte_align_p (TYPE_TARGET_TYPE (type
));
2647 if (type
->code () == TYPE_CODE_STRUCT
2648 || type
->code () == TYPE_CODE_UNION
)
2651 for (i
= 0; i
< type
->num_fields (); i
++)
2653 if (field_is_static (&type
->field (i
)))
2655 if (i386_16_byte_align_p (type
->field (i
).type ()))
2662 /* Implementation for set_gdbarch_push_dummy_code. */
2665 i386_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
2666 struct value
**args
, int nargs
, struct type
*value_type
,
2667 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
2668 struct regcache
*regcache
)
2670 /* Use 0xcc breakpoint - 1 byte. */
2674 /* Keep the stack aligned. */
2678 /* The "push_dummy_call" gdbarch method, optionally with the thiscall
2679 calling convention. */
2682 i386_thiscall_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2683 struct regcache
*regcache
, CORE_ADDR bp_addr
,
2684 int nargs
, struct value
**args
, CORE_ADDR sp
,
2685 function_call_return_method return_method
,
2686 CORE_ADDR struct_addr
, bool thiscall
)
2688 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2694 /* BND registers can be in arbitrary values at the moment of the
2695 inferior call. This can cause boundary violations that are not
2696 due to a real bug or even desired by the user. The best to be done
2697 is set the BND registers to allow access to the whole memory, INIT
2698 state, before pushing the inferior call. */
2699 i387_reset_bnd_regs (gdbarch
, regcache
);
2701 /* Determine the total space required for arguments and struct
2702 return address in a first pass (allowing for 16-byte-aligned
2703 arguments), then push arguments in a second pass. */
2705 for (write_pass
= 0; write_pass
< 2; write_pass
++)
2707 int args_space_used
= 0;
2709 if (return_method
== return_method_struct
)
2713 /* Push value address. */
2714 store_unsigned_integer (buf
, 4, byte_order
, struct_addr
);
2715 write_memory (sp
, buf
, 4);
2716 args_space_used
+= 4;
2722 for (i
= thiscall
? 1 : 0; i
< nargs
; i
++)
2724 int len
= TYPE_LENGTH (value_enclosing_type (args
[i
]));
2728 if (i386_16_byte_align_p (value_enclosing_type (args
[i
])))
2729 args_space_used
= align_up (args_space_used
, 16);
2731 write_memory (sp
+ args_space_used
,
2732 value_contents_all (args
[i
]), len
);
2733 /* The System V ABI says that:
2735 "An argument's size is increased, if necessary, to make it a
2736 multiple of [32-bit] words. This may require tail padding,
2737 depending on the size of the argument."
2739 This makes sure the stack stays word-aligned. */
2740 args_space_used
+= align_up (len
, 4);
2744 if (i386_16_byte_align_p (value_enclosing_type (args
[i
])))
2745 args_space
= align_up (args_space
, 16);
2746 args_space
+= align_up (len
, 4);
2754 /* The original System V ABI only requires word alignment,
2755 but modern incarnations need 16-byte alignment in order
2756 to support SSE. Since wasting a few bytes here isn't
2757 harmful we unconditionally enforce 16-byte alignment. */
2762 /* Store return address. */
2764 store_unsigned_integer (buf
, 4, byte_order
, bp_addr
);
2765 write_memory (sp
, buf
, 4);
2767 /* Finally, update the stack pointer... */
2768 store_unsigned_integer (buf
, 4, byte_order
, sp
);
2769 regcache
->cooked_write (I386_ESP_REGNUM
, buf
);
2771 /* ...and fake a frame pointer. */
2772 regcache
->cooked_write (I386_EBP_REGNUM
, buf
);
2774 /* The 'this' pointer needs to be in ECX. */
2776 regcache
->cooked_write (I386_ECX_REGNUM
, value_contents_all (args
[0]));
2778 /* MarkK wrote: This "+ 8" is all over the place:
2779 (i386_frame_this_id, i386_sigtramp_frame_this_id,
2780 i386_dummy_id). It's there, since all frame unwinders for
2781 a given target have to agree (within a certain margin) on the
2782 definition of the stack address of a frame. Otherwise frame id
2783 comparison might not work correctly. Since DWARF2/GCC uses the
2784 stack address *before* the function call as a frame's CFA. On
2785 the i386, when %ebp is used as a frame pointer, the offset
2786 between the contents %ebp and the CFA as defined by GCC. */
2790 /* Implement the "push_dummy_call" gdbarch method. */
2793 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2794 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
2795 struct value
**args
, CORE_ADDR sp
,
2796 function_call_return_method return_method
,
2797 CORE_ADDR struct_addr
)
2799 return i386_thiscall_push_dummy_call (gdbarch
, function
, regcache
, bp_addr
,
2800 nargs
, args
, sp
, return_method
,
2801 struct_addr
, false);
2804 /* These registers are used for returning integers (and on some
2805 targets also for returning `struct' and `union' values when their
2806 size and alignment match an integer type). */
2807 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
2808 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
2810 /* Read, for architecture GDBARCH, a function return value of TYPE
2811 from REGCACHE, and copy that into VALBUF. */
2814 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2815 struct regcache
*regcache
, gdb_byte
*valbuf
)
2817 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2818 int len
= TYPE_LENGTH (type
);
2819 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
2821 if (type
->code () == TYPE_CODE_FLT
)
2823 if (tdep
->st0_regnum
< 0)
2825 warning (_("Cannot find floating-point return value."));
2826 memset (valbuf
, 0, len
);
2830 /* Floating-point return values can be found in %st(0). Convert
2831 its contents to the desired type. This is probably not
2832 exactly how it would happen on the target itself, but it is
2833 the best we can do. */
2834 regcache
->raw_read (I386_ST0_REGNUM
, buf
);
2835 target_float_convert (buf
, i387_ext_type (gdbarch
), valbuf
, type
);
2839 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
2840 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
2842 if (len
<= low_size
)
2844 regcache
->raw_read (LOW_RETURN_REGNUM
, buf
);
2845 memcpy (valbuf
, buf
, len
);
2847 else if (len
<= (low_size
+ high_size
))
2849 regcache
->raw_read (LOW_RETURN_REGNUM
, buf
);
2850 memcpy (valbuf
, buf
, low_size
);
2851 regcache
->raw_read (HIGH_RETURN_REGNUM
, buf
);
2852 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
2855 internal_error (__FILE__
, __LINE__
,
2856 _("Cannot extract return value of %d bytes long."),
2861 /* Write, for architecture GDBARCH, a function return value of TYPE
2862 from VALBUF into REGCACHE. */
2865 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2866 struct regcache
*regcache
, const gdb_byte
*valbuf
)
2868 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2869 int len
= TYPE_LENGTH (type
);
2871 if (type
->code () == TYPE_CODE_FLT
)
2874 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
2876 if (tdep
->st0_regnum
< 0)
2878 warning (_("Cannot set floating-point return value."));
2882 /* Returning floating-point values is a bit tricky. Apart from
2883 storing the return value in %st(0), we have to simulate the
2884 state of the FPU at function return point. */
2886 /* Convert the value found in VALBUF to the extended
2887 floating-point format used by the FPU. This is probably
2888 not exactly how it would happen on the target itself, but
2889 it is the best we can do. */
2890 target_float_convert (valbuf
, type
, buf
, i387_ext_type (gdbarch
));
2891 regcache
->raw_write (I386_ST0_REGNUM
, buf
);
2893 /* Set the top of the floating-point register stack to 7. The
2894 actual value doesn't really matter, but 7 is what a normal
2895 function return would end up with if the program started out
2896 with a freshly initialized FPU. */
2897 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
2899 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
2901 /* Mark %st(1) through %st(7) as empty. Since we set the top of
2902 the floating-point register stack to 7, the appropriate value
2903 for the tag word is 0x3fff. */
2904 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);
2908 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
2909 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
2911 if (len
<= low_size
)
2912 regcache
->raw_write_part (LOW_RETURN_REGNUM
, 0, len
, valbuf
);
2913 else if (len
<= (low_size
+ high_size
))
2915 regcache
->raw_write (LOW_RETURN_REGNUM
, valbuf
);
2916 regcache
->raw_write_part (HIGH_RETURN_REGNUM
, 0, len
- low_size
,
2920 internal_error (__FILE__
, __LINE__
,
2921 _("Cannot store return value of %d bytes long."), len
);
2926 /* This is the variable that is set with "set struct-convention", and
2927 its legitimate values. */
2928 static const char default_struct_convention
[] = "default";
2929 static const char pcc_struct_convention
[] = "pcc";
2930 static const char reg_struct_convention
[] = "reg";
2931 static const char *const valid_conventions
[] =
2933 default_struct_convention
,
2934 pcc_struct_convention
,
2935 reg_struct_convention
,
2938 static const char *struct_convention
= default_struct_convention
;
2940 /* Return non-zero if TYPE, which is assumed to be a structure,
2941 a union type, or an array type, should be returned in registers
2942 for architecture GDBARCH. */
2945 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
2947 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2948 enum type_code code
= type
->code ();
2949 int len
= TYPE_LENGTH (type
);
2951 gdb_assert (code
== TYPE_CODE_STRUCT
2952 || code
== TYPE_CODE_UNION
2953 || code
== TYPE_CODE_ARRAY
);
2955 if (struct_convention
== pcc_struct_convention
2956 || (struct_convention
== default_struct_convention
2957 && tdep
->struct_return
== pcc_struct_return
))
2960 /* Structures consisting of a single `float', `double' or 'long
2961 double' member are returned in %st(0). */
2962 if (code
== TYPE_CODE_STRUCT
&& type
->num_fields () == 1)
2964 type
= check_typedef (type
->field (0).type ());
2965 if (type
->code () == TYPE_CODE_FLT
)
2966 return (len
== 4 || len
== 8 || len
== 12);
2969 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
2972 /* Determine, for architecture GDBARCH, how a return value of TYPE
2973 should be returned. If it is supposed to be returned in registers,
2974 and READBUF is non-zero, read the appropriate value from REGCACHE,
2975 and copy it into READBUF. If WRITEBUF is non-zero, write the value
2976 from WRITEBUF into REGCACHE. */
2978 static enum return_value_convention
2979 i386_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
2980 struct type
*type
, struct regcache
*regcache
,
2981 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
2983 enum type_code code
= type
->code ();
2985 if (((code
== TYPE_CODE_STRUCT
2986 || code
== TYPE_CODE_UNION
2987 || code
== TYPE_CODE_ARRAY
)
2988 && !i386_reg_struct_return_p (gdbarch
, type
))
2989 /* Complex double and long double uses the struct return convention. */
2990 || (code
== TYPE_CODE_COMPLEX
&& TYPE_LENGTH (type
) == 16)
2991 || (code
== TYPE_CODE_COMPLEX
&& TYPE_LENGTH (type
) == 24)
2992 /* 128-bit decimal float uses the struct return convention. */
2993 || (code
== TYPE_CODE_DECFLOAT
&& TYPE_LENGTH (type
) == 16))
2995 /* The System V ABI says that:
2997 "A function that returns a structure or union also sets %eax
2998 to the value of the original address of the caller's area
2999 before it returns. Thus when the caller receives control
3000 again, the address of the returned object resides in register
3001 %eax and can be used to access the object."
3003 So the ABI guarantees that we can always find the return
3004 value just after the function has returned. */
3006 /* Note that the ABI doesn't mention functions returning arrays,
3007 which is something possible in certain languages such as Ada.
3008 In this case, the value is returned as if it was wrapped in
3009 a record, so the convention applied to records also applies
3016 regcache_raw_read_unsigned (regcache
, I386_EAX_REGNUM
, &addr
);
3017 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
3020 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
3023 /* This special case is for structures consisting of a single
3024 `float', `double' or 'long double' member. These structures are
3025 returned in %st(0). For these structures, we call ourselves
3026 recursively, changing TYPE into the type of the first member of
3027 the structure. Since that should work for all structures that
3028 have only one member, we don't bother to check the member's type
3030 if (code
== TYPE_CODE_STRUCT
&& type
->num_fields () == 1)
3032 type
= check_typedef (type
->field (0).type ());
3033 return i386_return_value (gdbarch
, function
, type
, regcache
,
3038 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
3040 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
3042 return RETURN_VALUE_REGISTER_CONVENTION
;
3047 i387_ext_type (struct gdbarch
*gdbarch
)
3049 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3051 if (!tdep
->i387_ext_type
)
3053 tdep
->i387_ext_type
= tdesc_find_type (gdbarch
, "i387_ext");
3054 gdb_assert (tdep
->i387_ext_type
!= NULL
);
3057 return tdep
->i387_ext_type
;
3060 /* Construct type for pseudo BND registers. We can't use
3061 tdesc_find_type since a complement of one value has to be used
3062 to describe the upper bound. */
3064 static struct type
*
3065 i386_bnd_type (struct gdbarch
*gdbarch
)
3067 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3070 if (!tdep
->i386_bnd_type
)
3073 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3075 /* The type we're building is described bellow: */
3080 void *ubound
; /* One complement of raw ubound field. */
3084 t
= arch_composite_type (gdbarch
,
3085 "__gdb_builtin_type_bound128", TYPE_CODE_STRUCT
);
3087 append_composite_type_field (t
, "lbound", bt
->builtin_data_ptr
);
3088 append_composite_type_field (t
, "ubound", bt
->builtin_data_ptr
);
3090 t
->set_name ("builtin_type_bound128");
3091 tdep
->i386_bnd_type
= t
;
3094 return tdep
->i386_bnd_type
;
3097 /* Construct vector type for pseudo ZMM registers. We can't use
3098 tdesc_find_type since ZMM isn't described in target description. */
3100 static struct type
*
3101 i386_zmm_type (struct gdbarch
*gdbarch
)
3103 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3105 if (!tdep
->i386_zmm_type
)
3107 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3109 /* The type we're building is this: */
3111 union __gdb_builtin_type_vec512i
3113 int128_t v4_int128
[4];
3114 int64_t v8_int64
[8];
3115 int32_t v16_int32
[16];
3116 int16_t v32_int16
[32];
3117 int8_t v64_int8
[64];
3118 double v8_double
[8];
3119 float v16_float
[16];
3120 float16_t v32_half
[32];
3121 bfloat16_t v32_bfloat16
[32];
3127 t
= arch_composite_type (gdbarch
,
3128 "__gdb_builtin_type_vec512i", TYPE_CODE_UNION
);
3129 append_composite_type_field (t
, "v32_bfloat16",
3130 init_vector_type (bt
->builtin_bfloat16
, 32));
3131 append_composite_type_field (t
, "v32_half",
3132 init_vector_type (bt
->builtin_half
, 32));
3133 append_composite_type_field (t
, "v16_float",
3134 init_vector_type (bt
->builtin_float
, 16));
3135 append_composite_type_field (t
, "v8_double",
3136 init_vector_type (bt
->builtin_double
, 8));
3137 append_composite_type_field (t
, "v64_int8",
3138 init_vector_type (bt
->builtin_int8
, 64));
3139 append_composite_type_field (t
, "v32_int16",
3140 init_vector_type (bt
->builtin_int16
, 32));
3141 append_composite_type_field (t
, "v16_int32",
3142 init_vector_type (bt
->builtin_int32
, 16));
3143 append_composite_type_field (t
, "v8_int64",
3144 init_vector_type (bt
->builtin_int64
, 8));
3145 append_composite_type_field (t
, "v4_int128",
3146 init_vector_type (bt
->builtin_int128
, 4));
3148 t
->set_is_vector (true);
3149 t
->set_name ("builtin_type_vec512i");
3150 tdep
->i386_zmm_type
= t
;
3153 return tdep
->i386_zmm_type
;
3156 /* Construct vector type for pseudo YMM registers. We can't use
3157 tdesc_find_type since YMM isn't described in target description. */
3159 static struct type
*
3160 i386_ymm_type (struct gdbarch
*gdbarch
)
3162 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3164 if (!tdep
->i386_ymm_type
)
3166 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3168 /* The type we're building is this: */
3170 union __gdb_builtin_type_vec256i
3172 int128_t v2_int128
[2];
3173 int64_t v4_int64
[4];
3174 int32_t v8_int32
[8];
3175 int16_t v16_int16
[16];
3176 int8_t v32_int8
[32];
3177 double v4_double
[4];
3179 float16_t v16_half
[16];
3180 bfloat16_t v16_bfloat16
[16];
3186 t
= arch_composite_type (gdbarch
,
3187 "__gdb_builtin_type_vec256i", TYPE_CODE_UNION
);
3188 append_composite_type_field (t
, "v16_bfloat16",
3189 init_vector_type (bt
->builtin_bfloat16
, 16));
3190 append_composite_type_field (t
, "v16_half",
3191 init_vector_type (bt
->builtin_half
, 16));
3192 append_composite_type_field (t
, "v8_float",
3193 init_vector_type (bt
->builtin_float
, 8));
3194 append_composite_type_field (t
, "v4_double",
3195 init_vector_type (bt
->builtin_double
, 4));
3196 append_composite_type_field (t
, "v32_int8",
3197 init_vector_type (bt
->builtin_int8
, 32));
3198 append_composite_type_field (t
, "v16_int16",
3199 init_vector_type (bt
->builtin_int16
, 16));
3200 append_composite_type_field (t
, "v8_int32",
3201 init_vector_type (bt
->builtin_int32
, 8));
3202 append_composite_type_field (t
, "v4_int64",
3203 init_vector_type (bt
->builtin_int64
, 4));
3204 append_composite_type_field (t
, "v2_int128",
3205 init_vector_type (bt
->builtin_int128
, 2));
3207 t
->set_is_vector (true);
3208 t
->set_name ("builtin_type_vec256i");
3209 tdep
->i386_ymm_type
= t
;
3212 return tdep
->i386_ymm_type
;
3215 /* Construct vector type for MMX registers. */
3216 static struct type
*
3217 i386_mmx_type (struct gdbarch
*gdbarch
)
3219 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3221 if (!tdep
->i386_mmx_type
)
3223 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3225 /* The type we're building is this: */
3227 union __gdb_builtin_type_vec64i
3230 int32_t v2_int32
[2];
3231 int16_t v4_int16
[4];
3238 t
= arch_composite_type (gdbarch
,
3239 "__gdb_builtin_type_vec64i", TYPE_CODE_UNION
);
3241 append_composite_type_field (t
, "uint64", bt
->builtin_int64
);
3242 append_composite_type_field (t
, "v2_int32",
3243 init_vector_type (bt
->builtin_int32
, 2));
3244 append_composite_type_field (t
, "v4_int16",
3245 init_vector_type (bt
->builtin_int16
, 4));
3246 append_composite_type_field (t
, "v8_int8",
3247 init_vector_type (bt
->builtin_int8
, 8));
3249 t
->set_is_vector (true);
3250 t
->set_name ("builtin_type_vec64i");
3251 tdep
->i386_mmx_type
= t
;
3254 return tdep
->i386_mmx_type
;
3257 /* Return the GDB type object for the "standard" data type of data in
3261 i386_pseudo_register_type (struct gdbarch
*gdbarch
, int regnum
)
3263 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3264 return i386_bnd_type (gdbarch
);
3265 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3266 return i386_mmx_type (gdbarch
);
3267 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3268 return i386_ymm_type (gdbarch
);
3269 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3270 return i386_ymm_type (gdbarch
);
3271 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3272 return i386_zmm_type (gdbarch
);
3275 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3276 if (i386_byte_regnum_p (gdbarch
, regnum
))
3277 return bt
->builtin_int8
;
3278 else if (i386_word_regnum_p (gdbarch
, regnum
))
3279 return bt
->builtin_int16
;
3280 else if (i386_dword_regnum_p (gdbarch
, regnum
))
3281 return bt
->builtin_int32
;
3282 else if (i386_k_regnum_p (gdbarch
, regnum
))
3283 return bt
->builtin_int64
;
3286 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3289 /* Map a cooked register onto a raw register or memory. For the i386,
3290 the MMX registers need to be mapped onto floating point registers. */
3293 i386_mmx_regnum_to_fp_regnum (readable_regcache
*regcache
, int regnum
)
3295 struct gdbarch_tdep
*tdep
= gdbarch_tdep (regcache
->arch ());
3300 mmxreg
= regnum
- tdep
->mm0_regnum
;
3301 regcache
->raw_read (I387_FSTAT_REGNUM (tdep
), &fstat
);
3302 tos
= (fstat
>> 11) & 0x7;
3303 fpreg
= (mmxreg
+ tos
) % 8;
3305 return (I387_ST0_REGNUM (tdep
) + fpreg
);
3308 /* A helper function for us by i386_pseudo_register_read_value and
3309 amd64_pseudo_register_read_value. It does all the work but reads
3310 the data into an already-allocated value. */
3313 i386_pseudo_register_read_into_value (struct gdbarch
*gdbarch
,
3314 readable_regcache
*regcache
,
3316 struct value
*result_value
)
3318 gdb_byte raw_buf
[I386_MAX_REGISTER_SIZE
];
3319 enum register_status status
;
3320 gdb_byte
*buf
= value_contents_raw (result_value
);
3322 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3324 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
3326 /* Extract (always little endian). */
3327 status
= regcache
->raw_read (fpnum
, raw_buf
);
3328 if (status
!= REG_VALID
)
3329 mark_value_bytes_unavailable (result_value
, 0,
3330 TYPE_LENGTH (value_type (result_value
)));
3332 memcpy (buf
, raw_buf
, register_size (gdbarch
, regnum
));
3336 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3337 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3339 regnum
-= tdep
->bnd0_regnum
;
3341 /* Extract (always little endian). Read lower 128bits. */
3342 status
= regcache
->raw_read (I387_BND0R_REGNUM (tdep
) + regnum
,
3344 if (status
!= REG_VALID
)
3345 mark_value_bytes_unavailable (result_value
, 0, 16);
3348 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
3349 LONGEST upper
, lower
;
3350 int size
= TYPE_LENGTH (builtin_type (gdbarch
)->builtin_data_ptr
);
3352 lower
= extract_unsigned_integer (raw_buf
, 8, byte_order
);
3353 upper
= extract_unsigned_integer (raw_buf
+ 8, 8, byte_order
);
3356 memcpy (buf
, &lower
, size
);
3357 memcpy (buf
+ size
, &upper
, size
);
3360 else if (i386_k_regnum_p (gdbarch
, regnum
))
3362 regnum
-= tdep
->k0_regnum
;
3364 /* Extract (always little endian). */
3365 status
= regcache
->raw_read (tdep
->k0_regnum
+ regnum
, raw_buf
);
3366 if (status
!= REG_VALID
)
3367 mark_value_bytes_unavailable (result_value
, 0, 8);
3369 memcpy (buf
, raw_buf
, 8);
3371 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3373 regnum
-= tdep
->zmm0_regnum
;
3375 if (regnum
< num_lower_zmm_regs
)
3377 /* Extract (always little endian). Read lower 128bits. */
3378 status
= regcache
->raw_read (I387_XMM0_REGNUM (tdep
) + regnum
,
3380 if (status
!= REG_VALID
)
3381 mark_value_bytes_unavailable (result_value
, 0, 16);
3383 memcpy (buf
, raw_buf
, 16);
3385 /* Extract (always little endian). Read upper 128bits. */
3386 status
= regcache
->raw_read (tdep
->ymm0h_regnum
+ regnum
,
3388 if (status
!= REG_VALID
)
3389 mark_value_bytes_unavailable (result_value
, 16, 16);
3391 memcpy (buf
+ 16, raw_buf
, 16);
3395 /* Extract (always little endian). Read lower 128bits. */
3396 status
= regcache
->raw_read (I387_XMM16_REGNUM (tdep
) + regnum
3397 - num_lower_zmm_regs
,
3399 if (status
!= REG_VALID
)
3400 mark_value_bytes_unavailable (result_value
, 0, 16);
3402 memcpy (buf
, raw_buf
, 16);
3404 /* Extract (always little endian). Read upper 128bits. */
3405 status
= regcache
->raw_read (I387_YMM16H_REGNUM (tdep
) + regnum
3406 - num_lower_zmm_regs
,
3408 if (status
!= REG_VALID
)
3409 mark_value_bytes_unavailable (result_value
, 16, 16);
3411 memcpy (buf
+ 16, raw_buf
, 16);
3414 /* Read upper 256bits. */
3415 status
= regcache
->raw_read (tdep
->zmm0h_regnum
+ regnum
,
3417 if (status
!= REG_VALID
)
3418 mark_value_bytes_unavailable (result_value
, 32, 32);
3420 memcpy (buf
+ 32, raw_buf
, 32);
3422 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3424 regnum
-= tdep
->ymm0_regnum
;
3426 /* Extract (always little endian). Read lower 128bits. */
3427 status
= regcache
->raw_read (I387_XMM0_REGNUM (tdep
) + regnum
,
3429 if (status
!= REG_VALID
)
3430 mark_value_bytes_unavailable (result_value
, 0, 16);
3432 memcpy (buf
, raw_buf
, 16);
3433 /* Read upper 128bits. */
3434 status
= regcache
->raw_read (tdep
->ymm0h_regnum
+ regnum
,
3436 if (status
!= REG_VALID
)
3437 mark_value_bytes_unavailable (result_value
, 16, 32);
3439 memcpy (buf
+ 16, raw_buf
, 16);
3441 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3443 regnum
-= tdep
->ymm16_regnum
;
3444 /* Extract (always little endian). Read lower 128bits. */
3445 status
= regcache
->raw_read (I387_XMM16_REGNUM (tdep
) + regnum
,
3447 if (status
!= REG_VALID
)
3448 mark_value_bytes_unavailable (result_value
, 0, 16);
3450 memcpy (buf
, raw_buf
, 16);
3451 /* Read upper 128bits. */
3452 status
= regcache
->raw_read (tdep
->ymm16h_regnum
+ regnum
,
3454 if (status
!= REG_VALID
)
3455 mark_value_bytes_unavailable (result_value
, 16, 16);
3457 memcpy (buf
+ 16, raw_buf
, 16);
3459 else if (i386_word_regnum_p (gdbarch
, regnum
))
3461 int gpnum
= regnum
- tdep
->ax_regnum
;
3463 /* Extract (always little endian). */
3464 status
= regcache
->raw_read (gpnum
, raw_buf
);
3465 if (status
!= REG_VALID
)
3466 mark_value_bytes_unavailable (result_value
, 0,
3467 TYPE_LENGTH (value_type (result_value
)));
3469 memcpy (buf
, raw_buf
, 2);
3471 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3473 int gpnum
= regnum
- tdep
->al_regnum
;
3475 /* Extract (always little endian). We read both lower and
3477 status
= regcache
->raw_read (gpnum
% 4, raw_buf
);
3478 if (status
!= REG_VALID
)
3479 mark_value_bytes_unavailable (result_value
, 0,
3480 TYPE_LENGTH (value_type (result_value
)));
3481 else if (gpnum
>= 4)
3482 memcpy (buf
, raw_buf
+ 1, 1);
3484 memcpy (buf
, raw_buf
, 1);
3487 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3491 static struct value
*
3492 i386_pseudo_register_read_value (struct gdbarch
*gdbarch
,
3493 readable_regcache
*regcache
,
3496 struct value
*result
;
3498 result
= allocate_value (register_type (gdbarch
, regnum
));
3499 VALUE_LVAL (result
) = lval_register
;
3500 VALUE_REGNUM (result
) = regnum
;
3502 i386_pseudo_register_read_into_value (gdbarch
, regcache
, regnum
, result
);
3508 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3509 int regnum
, const gdb_byte
*buf
)
3511 gdb_byte raw_buf
[I386_MAX_REGISTER_SIZE
];
3513 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3515 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
3518 regcache
->raw_read (fpnum
, raw_buf
);
3519 /* ... Modify ... (always little endian). */
3520 memcpy (raw_buf
, buf
, register_size (gdbarch
, regnum
));
3522 regcache
->raw_write (fpnum
, raw_buf
);
3526 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3528 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3530 ULONGEST upper
, lower
;
3531 int size
= TYPE_LENGTH (builtin_type (gdbarch
)->builtin_data_ptr
);
3532 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
3534 /* New values from input value. */
3535 regnum
-= tdep
->bnd0_regnum
;
3536 lower
= extract_unsigned_integer (buf
, size
, byte_order
);
3537 upper
= extract_unsigned_integer (buf
+ size
, size
, byte_order
);
3539 /* Fetching register buffer. */
3540 regcache
->raw_read (I387_BND0R_REGNUM (tdep
) + regnum
,
3545 /* Set register bits. */
3546 memcpy (raw_buf
, &lower
, 8);
3547 memcpy (raw_buf
+ 8, &upper
, 8);
3549 regcache
->raw_write (I387_BND0R_REGNUM (tdep
) + regnum
, raw_buf
);
3551 else if (i386_k_regnum_p (gdbarch
, regnum
))
3553 regnum
-= tdep
->k0_regnum
;
3555 regcache
->raw_write (tdep
->k0_regnum
+ regnum
, buf
);
3557 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3559 regnum
-= tdep
->zmm0_regnum
;
3561 if (regnum
< num_lower_zmm_regs
)
3563 /* Write lower 128bits. */
3564 regcache
->raw_write (I387_XMM0_REGNUM (tdep
) + regnum
, buf
);
3565 /* Write upper 128bits. */
3566 regcache
->raw_write (I387_YMM0_REGNUM (tdep
) + regnum
, buf
+ 16);
3570 /* Write lower 128bits. */
3571 regcache
->raw_write (I387_XMM16_REGNUM (tdep
) + regnum
3572 - num_lower_zmm_regs
, buf
);
3573 /* Write upper 128bits. */
3574 regcache
->raw_write (I387_YMM16H_REGNUM (tdep
) + regnum
3575 - num_lower_zmm_regs
, buf
+ 16);
3577 /* Write upper 256bits. */
3578 regcache
->raw_write (tdep
->zmm0h_regnum
+ regnum
, buf
+ 32);
3580 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3582 regnum
-= tdep
->ymm0_regnum
;
3584 /* ... Write lower 128bits. */
3585 regcache
->raw_write (I387_XMM0_REGNUM (tdep
) + regnum
, buf
);
3586 /* ... Write upper 128bits. */
3587 regcache
->raw_write (tdep
->ymm0h_regnum
+ regnum
, buf
+ 16);
3589 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3591 regnum
-= tdep
->ymm16_regnum
;
3593 /* ... Write lower 128bits. */
3594 regcache
->raw_write (I387_XMM16_REGNUM (tdep
) + regnum
, buf
);
3595 /* ... Write upper 128bits. */
3596 regcache
->raw_write (tdep
->ymm16h_regnum
+ regnum
, buf
+ 16);
3598 else if (i386_word_regnum_p (gdbarch
, regnum
))
3600 int gpnum
= regnum
- tdep
->ax_regnum
;
3603 regcache
->raw_read (gpnum
, raw_buf
);
3604 /* ... Modify ... (always little endian). */
3605 memcpy (raw_buf
, buf
, 2);
3607 regcache
->raw_write (gpnum
, raw_buf
);
3609 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3611 int gpnum
= regnum
- tdep
->al_regnum
;
3613 /* Read ... We read both lower and upper registers. */
3614 regcache
->raw_read (gpnum
% 4, raw_buf
);
3615 /* ... Modify ... (always little endian). */
3617 memcpy (raw_buf
+ 1, buf
, 1);
3619 memcpy (raw_buf
, buf
, 1);
3621 regcache
->raw_write (gpnum
% 4, raw_buf
);
3624 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3628 /* Implement the 'ax_pseudo_register_collect' gdbarch method. */
3631 i386_ax_pseudo_register_collect (struct gdbarch
*gdbarch
,
3632 struct agent_expr
*ax
, int regnum
)
3634 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3636 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3638 /* MMX to FPU register mapping depends on current TOS. Let's just
3639 not care and collect everything... */
3642 ax_reg_mask (ax
, I387_FSTAT_REGNUM (tdep
));
3643 for (i
= 0; i
< 8; i
++)
3644 ax_reg_mask (ax
, I387_ST0_REGNUM (tdep
) + i
);
3647 else if (i386_bnd_regnum_p (gdbarch
, regnum
))
3649 regnum
-= tdep
->bnd0_regnum
;
3650 ax_reg_mask (ax
, I387_BND0R_REGNUM (tdep
) + regnum
);
3653 else if (i386_k_regnum_p (gdbarch
, regnum
))
3655 regnum
-= tdep
->k0_regnum
;
3656 ax_reg_mask (ax
, tdep
->k0_regnum
+ regnum
);
3659 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3661 regnum
-= tdep
->zmm0_regnum
;
3662 if (regnum
< num_lower_zmm_regs
)
3664 ax_reg_mask (ax
, I387_XMM0_REGNUM (tdep
) + regnum
);
3665 ax_reg_mask (ax
, tdep
->ymm0h_regnum
+ regnum
);
3669 ax_reg_mask (ax
, I387_XMM16_REGNUM (tdep
) + regnum
3670 - num_lower_zmm_regs
);
3671 ax_reg_mask (ax
, I387_YMM16H_REGNUM (tdep
) + regnum
3672 - num_lower_zmm_regs
);
3674 ax_reg_mask (ax
, tdep
->zmm0h_regnum
+ regnum
);
3677 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3679 regnum
-= tdep
->ymm0_regnum
;
3680 ax_reg_mask (ax
, I387_XMM0_REGNUM (tdep
) + regnum
);
3681 ax_reg_mask (ax
, tdep
->ymm0h_regnum
+ regnum
);
3684 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3686 regnum
-= tdep
->ymm16_regnum
;
3687 ax_reg_mask (ax
, I387_XMM16_REGNUM (tdep
) + regnum
);
3688 ax_reg_mask (ax
, tdep
->ymm16h_regnum
+ regnum
);
3691 else if (i386_word_regnum_p (gdbarch
, regnum
))
3693 int gpnum
= regnum
- tdep
->ax_regnum
;
3695 ax_reg_mask (ax
, gpnum
);
3698 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3700 int gpnum
= regnum
- tdep
->al_regnum
;
3702 ax_reg_mask (ax
, gpnum
% 4);
3706 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3711 /* Return the register number of the register allocated by GCC after
3712 REGNUM, or -1 if there is no such register. */
3715 i386_next_regnum (int regnum
)
3717 /* GCC allocates the registers in the order:
3719 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
3721 Since storing a variable in %esp doesn't make any sense we return
3722 -1 for %ebp and for %esp itself. */
3723 static int next_regnum
[] =
3725 I386_EDX_REGNUM
, /* Slot for %eax. */
3726 I386_EBX_REGNUM
, /* Slot for %ecx. */
3727 I386_ECX_REGNUM
, /* Slot for %edx. */
3728 I386_ESI_REGNUM
, /* Slot for %ebx. */
3729 -1, -1, /* Slots for %esp and %ebp. */
3730 I386_EDI_REGNUM
, /* Slot for %esi. */
3731 I386_EBP_REGNUM
/* Slot for %edi. */
3734 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
3735 return next_regnum
[regnum
];
3740 /* Return nonzero if a value of type TYPE stored in register REGNUM
3741 needs any special handling. */
3744 i386_convert_register_p (struct gdbarch
*gdbarch
,
3745 int regnum
, struct type
*type
)
3747 int len
= TYPE_LENGTH (type
);
3749 /* Values may be spread across multiple registers. Most debugging
3750 formats aren't expressive enough to specify the locations, so
3751 some heuristics is involved. Right now we only handle types that
3752 have a length that is a multiple of the word size, since GCC
3753 doesn't seem to put any other types into registers. */
3754 if (len
> 4 && len
% 4 == 0)
3756 int last_regnum
= regnum
;
3760 last_regnum
= i386_next_regnum (last_regnum
);
3764 if (last_regnum
!= -1)
3768 return i387_convert_register_p (gdbarch
, regnum
, type
);
3771 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
3772 return its contents in TO. */
3775 i386_register_to_value (struct frame_info
*frame
, int regnum
,
3776 struct type
*type
, gdb_byte
*to
,
3777 int *optimizedp
, int *unavailablep
)
3779 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
3780 int len
= TYPE_LENGTH (type
);
3782 if (i386_fp_regnum_p (gdbarch
, regnum
))
3783 return i387_register_to_value (frame
, regnum
, type
, to
,
3784 optimizedp
, unavailablep
);
3786 /* Read a value spread across multiple registers. */
3788 gdb_assert (len
> 4 && len
% 4 == 0);
3792 gdb_assert (regnum
!= -1);
3793 gdb_assert (register_size (gdbarch
, regnum
) == 4);
3795 if (!get_frame_register_bytes (frame
, regnum
, 0,
3796 gdb::make_array_view (to
,
3797 register_size (gdbarch
,
3799 optimizedp
, unavailablep
))
3802 regnum
= i386_next_regnum (regnum
);
3807 *optimizedp
= *unavailablep
= 0;
3811 /* Write the contents FROM of a value of type TYPE into register
3812 REGNUM in frame FRAME. */
3815 i386_value_to_register (struct frame_info
*frame
, int regnum
,
3816 struct type
*type
, const gdb_byte
*from
)
3818 int len
= TYPE_LENGTH (type
);
3820 if (i386_fp_regnum_p (get_frame_arch (frame
), regnum
))
3822 i387_value_to_register (frame
, regnum
, type
, from
);
3826 /* Write a value spread across multiple registers. */
3828 gdb_assert (len
> 4 && len
% 4 == 0);
3832 gdb_assert (regnum
!= -1);
3833 gdb_assert (register_size (get_frame_arch (frame
), regnum
) == 4);
3835 put_frame_register (frame
, regnum
, from
);
3836 regnum
= i386_next_regnum (regnum
);
3842 /* Supply register REGNUM from the buffer specified by GREGS and LEN
3843 in the general-purpose register set REGSET to register cache
3844 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3847 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
3848 int regnum
, const void *gregs
, size_t len
)
3850 struct gdbarch
*gdbarch
= regcache
->arch ();
3851 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3852 const gdb_byte
*regs
= (const gdb_byte
*) gregs
;
3855 gdb_assert (len
>= tdep
->sizeof_gregset
);
3857 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
3859 if ((regnum
== i
|| regnum
== -1)
3860 && tdep
->gregset_reg_offset
[i
] != -1)
3861 regcache
->raw_supply (i
, regs
+ tdep
->gregset_reg_offset
[i
]);
3865 /* Collect register REGNUM from the register cache REGCACHE and store
3866 it in the buffer specified by GREGS and LEN as described by the
3867 general-purpose register set REGSET. If REGNUM is -1, do this for
3868 all registers in REGSET. */
3871 i386_collect_gregset (const struct regset
*regset
,
3872 const struct regcache
*regcache
,
3873 int regnum
, void *gregs
, size_t len
)
3875 struct gdbarch
*gdbarch
= regcache
->arch ();
3876 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3877 gdb_byte
*regs
= (gdb_byte
*) gregs
;
3880 gdb_assert (len
>= tdep
->sizeof_gregset
);
3882 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
3884 if ((regnum
== i
|| regnum
== -1)
3885 && tdep
->gregset_reg_offset
[i
] != -1)
3886 regcache
->raw_collect (i
, regs
+ tdep
->gregset_reg_offset
[i
]);
3890 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
3891 in the floating-point register set REGSET to register cache
3892 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3895 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
3896 int regnum
, const void *fpregs
, size_t len
)
3898 struct gdbarch
*gdbarch
= regcache
->arch ();
3899 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3901 if (len
== I387_SIZEOF_FXSAVE
)
3903 i387_supply_fxsave (regcache
, regnum
, fpregs
);
3907 gdb_assert (len
>= tdep
->sizeof_fpregset
);
3908 i387_supply_fsave (regcache
, regnum
, fpregs
);
3911 /* Collect register REGNUM from the register cache REGCACHE and store
3912 it in the buffer specified by FPREGS and LEN as described by the
3913 floating-point register set REGSET. If REGNUM is -1, do this for
3914 all registers in REGSET. */
3917 i386_collect_fpregset (const struct regset
*regset
,
3918 const struct regcache
*regcache
,
3919 int regnum
, void *fpregs
, size_t len
)
3921 struct gdbarch
*gdbarch
= regcache
->arch ();
3922 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3924 if (len
== I387_SIZEOF_FXSAVE
)
3926 i387_collect_fxsave (regcache
, regnum
, fpregs
);
3930 gdb_assert (len
>= tdep
->sizeof_fpregset
);
3931 i387_collect_fsave (regcache
, regnum
, fpregs
);
3934 /* Register set definitions. */
3936 const struct regset i386_gregset
=
3938 NULL
, i386_supply_gregset
, i386_collect_gregset
3941 const struct regset i386_fpregset
=
3943 NULL
, i386_supply_fpregset
, i386_collect_fpregset
3946 /* Default iterator over core file register note sections. */
3949 i386_iterate_over_regset_sections (struct gdbarch
*gdbarch
,
3950 iterate_over_regset_sections_cb
*cb
,
3952 const struct regcache
*regcache
)
3954 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3956 cb (".reg", tdep
->sizeof_gregset
, tdep
->sizeof_gregset
, &i386_gregset
, NULL
,
3958 if (tdep
->sizeof_fpregset
)
3959 cb (".reg2", tdep
->sizeof_fpregset
, tdep
->sizeof_fpregset
, tdep
->fpregset
,
3964 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
3967 i386_pe_skip_trampoline_code (struct frame_info
*frame
,
3968 CORE_ADDR pc
, char *name
)
3970 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
3971 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3974 if (pc
&& read_memory_unsigned_integer (pc
, 2, byte_order
) == 0x25ff)
3976 unsigned long indirect
=
3977 read_memory_unsigned_integer (pc
+ 2, 4, byte_order
);
3978 struct minimal_symbol
*indsym
=
3979 indirect
? lookup_minimal_symbol_by_pc (indirect
).minsym
: 0;
3980 const char *symname
= indsym
? indsym
->linkage_name () : 0;
3984 if (startswith (symname
, "__imp_")
3985 || startswith (symname
, "_imp_"))
3987 read_memory_unsigned_integer (indirect
, 4, byte_order
);
3990 return 0; /* Not a trampoline. */
3994 /* Return whether the THIS_FRAME corresponds to a sigtramp
3998 i386_sigtramp_p (struct frame_info
*this_frame
)
4000 CORE_ADDR pc
= get_frame_pc (this_frame
);
4003 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
4004 return (name
&& strcmp ("_sigtramp", name
) == 0);
4008 /* We have two flavours of disassembly. The machinery on this page
4009 deals with switching between those. */
4012 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
4014 gdb_assert (disassembly_flavor
== att_flavor
4015 || disassembly_flavor
== intel_flavor
);
4017 info
->disassembler_options
= disassembly_flavor
;
4019 return default_print_insn (pc
, info
);
4023 /* There are a few i386 architecture variants that differ only
4024 slightly from the generic i386 target. For now, we don't give them
4025 their own source file, but include them here. As a consequence,
4026 they'll always be included. */
4028 /* System V Release 4 (SVR4). */
4030 /* Return whether THIS_FRAME corresponds to a SVR4 sigtramp
4034 i386_svr4_sigtramp_p (struct frame_info
*this_frame
)
4036 CORE_ADDR pc
= get_frame_pc (this_frame
);
4039 /* The origin of these symbols is currently unknown. */
4040 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
4041 return (name
&& (strcmp ("_sigreturn", name
) == 0
4042 || strcmp ("sigvechandler", name
) == 0));
4045 /* Assuming THIS_FRAME is for a SVR4 sigtramp routine, return the
4046 address of the associated sigcontext (ucontext) structure. */
4049 i386_svr4_sigcontext_addr (struct frame_info
*this_frame
)
4051 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
4052 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4056 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
4057 sp
= extract_unsigned_integer (buf
, 4, byte_order
);
4059 return read_memory_unsigned_integer (sp
+ 8, 4, byte_order
);
4064 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
4068 i386_stap_is_single_operand (struct gdbarch
*gdbarch
, const char *s
)
4070 return (*s
== '$' /* Literal number. */
4071 || (isdigit (*s
) && s
[1] == '(' && s
[2] == '%') /* Displacement. */
4072 || (*s
== '(' && s
[1] == '%') /* Register indirection. */
4073 || (*s
== '%' && isalpha (s
[1]))); /* Register access. */
4076 /* Helper function for i386_stap_parse_special_token.
4078 This function parses operands of the form `-8+3+1(%rbp)', which
4079 must be interpreted as `*(-8 + 3 - 1 + (void *) $eax)'.
4081 Return true if the operand was parsed successfully, false
4084 static expr::operation_up
4085 i386_stap_parse_special_token_triplet (struct gdbarch
*gdbarch
,
4086 struct stap_parse_info
*p
)
4088 const char *s
= p
->arg
;
4090 if (isdigit (*s
) || *s
== '-' || *s
== '+')
4094 long displacements
[3];
4099 got_minus
[0] = false;
4105 got_minus
[0] = true;
4108 if (!isdigit ((unsigned char) *s
))
4111 displacements
[0] = strtol (s
, &endp
, 10);
4114 if (*s
!= '+' && *s
!= '-')
4116 /* We are not dealing with a triplet. */
4120 got_minus
[1] = false;
4126 got_minus
[1] = true;
4129 if (!isdigit ((unsigned char) *s
))
4132 displacements
[1] = strtol (s
, &endp
, 10);
4135 if (*s
!= '+' && *s
!= '-')
4137 /* We are not dealing with a triplet. */
4141 got_minus
[2] = false;
4147 got_minus
[2] = true;
4150 if (!isdigit ((unsigned char) *s
))
4153 displacements
[2] = strtol (s
, &endp
, 10);
4156 if (*s
!= '(' || s
[1] != '%')
4162 while (isalnum (*s
))
4168 len
= s
- start
- 1;
4169 std::string
regname (start
, len
);
4171 if (user_reg_map_name_to_regnum (gdbarch
, regname
.c_str (), len
) == -1)
4172 error (_("Invalid register name `%s' on expression `%s'."),
4173 regname
.c_str (), p
->saved_arg
);
4176 for (i
= 0; i
< 3; i
++)
4178 LONGEST this_val
= displacements
[i
];
4180 this_val
= -this_val
;
4186 using namespace expr
;
4188 struct type
*long_type
= builtin_type (gdbarch
)->builtin_long
;
4190 = make_operation
<long_const_operation
> (long_type
, value
);
4193 = make_operation
<register_operation
> (std::move (regname
));
4194 struct type
*void_ptr
= builtin_type (gdbarch
)->builtin_data_ptr
;
4195 reg
= make_operation
<unop_cast_operation
> (std::move (reg
), void_ptr
);
4198 = make_operation
<add_operation
> (std::move (reg
), std::move (offset
));
4199 struct type
*arg_ptr_type
= lookup_pointer_type (p
->arg_type
);
4200 sum
= make_operation
<unop_cast_operation
> (std::move (sum
),
4202 return make_operation
<unop_ind_operation
> (std::move (sum
));
4208 /* Helper function for i386_stap_parse_special_token.
4210 This function parses operands of the form `register base +
4211 (register index * size) + offset', as represented in
4212 `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4214 Return true if the operand was parsed successfully, false
4217 static expr::operation_up
4218 i386_stap_parse_special_token_three_arg_disp (struct gdbarch
*gdbarch
,
4219 struct stap_parse_info
*p
)
4221 const char *s
= p
->arg
;
4223 if (isdigit (*s
) || *s
== '(' || *s
== '-' || *s
== '+')
4225 bool offset_minus
= false;
4227 bool size_minus
= false;
4238 offset_minus
= true;
4241 if (offset_minus
&& !isdigit (*s
))
4248 offset
= strtol (s
, &endp
, 10);
4252 if (*s
!= '(' || s
[1] != '%')
4258 while (isalnum (*s
))
4261 if (*s
!= ',' || s
[1] != '%')
4264 len_base
= s
- start
;
4265 std::string
base (start
, len_base
);
4267 if (user_reg_map_name_to_regnum (gdbarch
, base
.c_str (), len_base
) == -1)
4268 error (_("Invalid register name `%s' on expression `%s'."),
4269 base
.c_str (), p
->saved_arg
);
4274 while (isalnum (*s
))
4277 len_index
= s
- start
;
4278 std::string
index (start
, len_index
);
4280 if (user_reg_map_name_to_regnum (gdbarch
, index
.c_str (),
4282 error (_("Invalid register name `%s' on expression `%s'."),
4283 index
.c_str (), p
->saved_arg
);
4285 if (*s
!= ',' && *s
!= ')')
4301 size
= strtol (s
, &endp
, 10);
4311 using namespace expr
;
4313 struct type
*long_type
= builtin_type (gdbarch
)->builtin_long
;
4314 operation_up reg
= make_operation
<register_operation
> (std::move (base
));
4321 = make_operation
<long_const_operation
> (long_type
, offset
);
4322 reg
= make_operation
<add_operation
> (std::move (reg
),
4326 operation_up ind_reg
4327 = make_operation
<register_operation
> (std::move (index
));
4334 = make_operation
<long_const_operation
> (long_type
, size
);
4335 ind_reg
= make_operation
<mul_operation
> (std::move (ind_reg
),
4340 = make_operation
<add_operation
> (std::move (reg
),
4341 std::move (ind_reg
));
4343 struct type
*arg_ptr_type
= lookup_pointer_type (p
->arg_type
);
4344 sum
= make_operation
<unop_cast_operation
> (std::move (sum
),
4346 return make_operation
<unop_ind_operation
> (std::move (sum
));
4352 /* Implementation of `gdbarch_stap_parse_special_token', as defined in
4356 i386_stap_parse_special_token (struct gdbarch
*gdbarch
,
4357 struct stap_parse_info
*p
)
4359 /* The special tokens to be parsed here are:
4361 - `register base + (register index * size) + offset', as represented
4362 in `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4364 - Operands of the form `-8+3+1(%rbp)', which must be interpreted as
4365 `*(-8 + 3 - 1 + (void *) $eax)'. */
4367 expr::operation_up result
4368 = i386_stap_parse_special_token_triplet (gdbarch
, p
);
4370 if (result
== nullptr)
4371 result
= i386_stap_parse_special_token_three_arg_disp (gdbarch
, p
);
4376 /* Implementation of 'gdbarch_stap_adjust_register', as defined in
4380 i386_stap_adjust_register (struct gdbarch
*gdbarch
, struct stap_parse_info
*p
,
4381 const std::string
®name
, int regnum
)
4383 static const std::unordered_set
<std::string
> reg_assoc
4384 = { "ax", "bx", "cx", "dx",
4385 "si", "di", "bp", "sp" };
4387 /* If we are dealing with a register whose size is less than the size
4388 specified by the "[-]N@" prefix, and it is one of the registers that
4389 we know has an extended variant available, then use the extended
4390 version of the register instead. */
4391 if (register_size (gdbarch
, regnum
) < TYPE_LENGTH (p
->arg_type
)
4392 && reg_assoc
.find (regname
) != reg_assoc
.end ())
4393 return "e" + regname
;
4395 /* Otherwise, just use the requested register. */
4401 /* gdbarch gnu_triplet_regexp method. Both arches are acceptable as GDB always
4402 also supplies -m64 or -m32 by gdbarch_gcc_target_options. */
4405 i386_gnu_triplet_regexp (struct gdbarch
*gdbarch
)
4407 return "(x86_64|i.86)";
4412 /* Implement the "in_indirect_branch_thunk" gdbarch function. */
4415 i386_in_indirect_branch_thunk (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
4417 return x86_in_indirect_branch_thunk (pc
, i386_register_names
,
4418 I386_EAX_REGNUM
, I386_EIP_REGNUM
);
4424 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
4426 static const char *const stap_integer_prefixes
[] = { "$", NULL
};
4427 static const char *const stap_register_prefixes
[] = { "%", NULL
};
4428 static const char *const stap_register_indirection_prefixes
[] = { "(",
4430 static const char *const stap_register_indirection_suffixes
[] = { ")",
4433 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
4434 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
4436 /* Registering SystemTap handlers. */
4437 set_gdbarch_stap_integer_prefixes (gdbarch
, stap_integer_prefixes
);
4438 set_gdbarch_stap_register_prefixes (gdbarch
, stap_register_prefixes
);
4439 set_gdbarch_stap_register_indirection_prefixes (gdbarch
,
4440 stap_register_indirection_prefixes
);
4441 set_gdbarch_stap_register_indirection_suffixes (gdbarch
,
4442 stap_register_indirection_suffixes
);
4443 set_gdbarch_stap_is_single_operand (gdbarch
,
4444 i386_stap_is_single_operand
);
4445 set_gdbarch_stap_parse_special_token (gdbarch
,
4446 i386_stap_parse_special_token
);
4447 set_gdbarch_stap_adjust_register (gdbarch
,
4448 i386_stap_adjust_register
);
4450 set_gdbarch_in_indirect_branch_thunk (gdbarch
,
4451 i386_in_indirect_branch_thunk
);
4454 /* System V Release 4 (SVR4). */
4457 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
4459 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4461 /* System V Release 4 uses ELF. */
4462 i386_elf_init_abi (info
, gdbarch
);
4464 /* System V Release 4 has shared libraries. */
4465 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
4467 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
4468 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
4469 tdep
->sc_pc_offset
= 36 + 14 * 4;
4470 tdep
->sc_sp_offset
= 36 + 17 * 4;
4472 tdep
->jb_pc_offset
= 20;
4477 /* i386 register groups. In addition to the normal groups, add "mmx"
4480 static struct reggroup
*i386_sse_reggroup
;
4481 static struct reggroup
*i386_mmx_reggroup
;
4484 i386_init_reggroups (void)
4486 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
4487 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
4491 i386_add_reggroups (struct gdbarch
*gdbarch
)
4493 reggroup_add (gdbarch
, i386_sse_reggroup
);
4494 reggroup_add (gdbarch
, i386_mmx_reggroup
);
4495 reggroup_add (gdbarch
, general_reggroup
);
4496 reggroup_add (gdbarch
, float_reggroup
);
4497 reggroup_add (gdbarch
, all_reggroup
);
4498 reggroup_add (gdbarch
, save_reggroup
);
4499 reggroup_add (gdbarch
, restore_reggroup
);
4500 reggroup_add (gdbarch
, vector_reggroup
);
4501 reggroup_add (gdbarch
, system_reggroup
);
4505 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
4506 struct reggroup
*group
)
4508 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4509 int fp_regnum_p
, mmx_regnum_p
, xmm_regnum_p
, mxcsr_regnum_p
,
4510 ymm_regnum_p
, ymmh_regnum_p
, ymm_avx512_regnum_p
, ymmh_avx512_regnum_p
,
4511 bndr_regnum_p
, bnd_regnum_p
, zmm_regnum_p
, zmmh_regnum_p
,
4512 mpx_ctrl_regnum_p
, xmm_avx512_regnum_p
,
4513 avx512_p
, avx_p
, sse_p
, pkru_regnum_p
;
4515 /* Don't include pseudo registers, except for MMX, in any register
4517 if (i386_byte_regnum_p (gdbarch
, regnum
))
4520 if (i386_word_regnum_p (gdbarch
, regnum
))
4523 if (i386_dword_regnum_p (gdbarch
, regnum
))
4526 mmx_regnum_p
= i386_mmx_regnum_p (gdbarch
, regnum
);
4527 if (group
== i386_mmx_reggroup
)
4528 return mmx_regnum_p
;
4530 pkru_regnum_p
= i386_pkru_regnum_p(gdbarch
, regnum
);
4531 xmm_regnum_p
= i386_xmm_regnum_p (gdbarch
, regnum
);
4532 xmm_avx512_regnum_p
= i386_xmm_avx512_regnum_p (gdbarch
, regnum
);
4533 mxcsr_regnum_p
= i386_mxcsr_regnum_p (gdbarch
, regnum
);
4534 if (group
== i386_sse_reggroup
)
4535 return xmm_regnum_p
|| xmm_avx512_regnum_p
|| mxcsr_regnum_p
;
4537 ymm_regnum_p
= i386_ymm_regnum_p (gdbarch
, regnum
);
4538 ymm_avx512_regnum_p
= i386_ymm_avx512_regnum_p (gdbarch
, regnum
);
4539 zmm_regnum_p
= i386_zmm_regnum_p (gdbarch
, regnum
);
4541 avx512_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4542 == X86_XSTATE_AVX_AVX512_MASK
);
4543 avx_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4544 == X86_XSTATE_AVX_MASK
) && !avx512_p
;
4545 sse_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4546 == X86_XSTATE_SSE_MASK
) && !avx512_p
&& ! avx_p
;
4548 if (group
== vector_reggroup
)
4549 return (mmx_regnum_p
4550 || (zmm_regnum_p
&& avx512_p
)
4551 || ((ymm_regnum_p
|| ymm_avx512_regnum_p
) && avx_p
)
4552 || ((xmm_regnum_p
|| xmm_avx512_regnum_p
) && sse_p
)
4555 fp_regnum_p
= (i386_fp_regnum_p (gdbarch
, regnum
)
4556 || i386_fpc_regnum_p (gdbarch
, regnum
));
4557 if (group
== float_reggroup
)
4560 /* For "info reg all", don't include upper YMM registers nor XMM
4561 registers when AVX is supported. */
4562 ymmh_regnum_p
= i386_ymmh_regnum_p (gdbarch
, regnum
);
4563 ymmh_avx512_regnum_p
= i386_ymmh_avx512_regnum_p (gdbarch
, regnum
);
4564 zmmh_regnum_p
= i386_zmmh_regnum_p (gdbarch
, regnum
);
4565 if (group
== all_reggroup
4566 && (((xmm_regnum_p
|| xmm_avx512_regnum_p
) && !sse_p
)
4567 || ((ymm_regnum_p
|| ymm_avx512_regnum_p
) && !avx_p
)
4569 || ymmh_avx512_regnum_p
4573 bnd_regnum_p
= i386_bnd_regnum_p (gdbarch
, regnum
);
4574 if (group
== all_reggroup
4575 && ((bnd_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4576 return bnd_regnum_p
;
4578 bndr_regnum_p
= i386_bndr_regnum_p (gdbarch
, regnum
);
4579 if (group
== all_reggroup
4580 && ((bndr_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4583 mpx_ctrl_regnum_p
= i386_mpx_ctrl_regnum_p (gdbarch
, regnum
);
4584 if (group
== all_reggroup
4585 && ((mpx_ctrl_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4586 return mpx_ctrl_regnum_p
;
4588 if (group
== general_reggroup
)
4589 return (!fp_regnum_p
4593 && !xmm_avx512_regnum_p
4596 && !ymm_avx512_regnum_p
4597 && !ymmh_avx512_regnum_p
4600 && !mpx_ctrl_regnum_p
4605 return default_register_reggroup_p (gdbarch
, regnum
, group
);
4609 /* Get the ARGIth function argument for the current function. */
4612 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
4615 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
4616 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4617 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
4618 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4, byte_order
);
4621 #define PREFIX_REPZ 0x01
4622 #define PREFIX_REPNZ 0x02
4623 #define PREFIX_LOCK 0x04
4624 #define PREFIX_DATA 0x08
4625 #define PREFIX_ADDR 0x10
4637 /* i386 arith/logic operations */
4650 struct i386_record_s
4652 struct gdbarch
*gdbarch
;
4653 struct regcache
*regcache
;
4654 CORE_ADDR orig_addr
;
4660 uint8_t mod
, reg
, rm
;
4669 /* Parse the "modrm" part of the memory address irp->addr points at.
4670 Returns -1 if something goes wrong, 0 otherwise. */
4673 i386_record_modrm (struct i386_record_s
*irp
)
4675 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4677 if (record_read_memory (gdbarch
, irp
->addr
, &irp
->modrm
, 1))
4681 irp
->mod
= (irp
->modrm
>> 6) & 3;
4682 irp
->reg
= (irp
->modrm
>> 3) & 7;
4683 irp
->rm
= irp
->modrm
& 7;
4688 /* Extract the memory address that the current instruction writes to,
4689 and return it in *ADDR. Return -1 if something goes wrong. */
4692 i386_record_lea_modrm_addr (struct i386_record_s
*irp
, uint64_t *addr
)
4694 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4695 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4700 if (irp
->aflag
|| irp
->regmap
[X86_RECORD_R8_REGNUM
])
4707 uint8_t base
= irp
->rm
;
4712 if (record_read_memory (gdbarch
, irp
->addr
, &byte
, 1))
4715 scale
= (byte
>> 6) & 3;
4716 index
= ((byte
>> 3) & 7) | irp
->rex_x
;
4724 if ((base
& 7) == 5)
4727 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 4))
4730 *addr
= extract_signed_integer (buf
, 4, byte_order
);
4731 if (irp
->regmap
[X86_RECORD_R8_REGNUM
] && !havesib
)
4732 *addr
+= irp
->addr
+ irp
->rip_offset
;
4736 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 1))
4739 *addr
= (int8_t) buf
[0];
4742 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 4))
4744 *addr
= extract_signed_integer (buf
, 4, byte_order
);
4752 if (base
== 4 && irp
->popl_esp_hack
)
4753 *addr
+= irp
->popl_esp_hack
;
4754 regcache_raw_read_unsigned (irp
->regcache
, irp
->regmap
[base
],
4757 if (irp
->aflag
== 2)
4762 *addr
= (uint32_t) (offset64
+ *addr
);
4764 if (havesib
&& (index
!= 4 || scale
!= 0))
4766 regcache_raw_read_unsigned (irp
->regcache
, irp
->regmap
[index
],
4768 if (irp
->aflag
== 2)
4769 *addr
+= offset64
<< scale
;
4771 *addr
= (uint32_t) (*addr
+ (offset64
<< scale
));
4776 /* Since we are in 64-bit mode with ADDR32 prefix, zero-extend
4777 address from 32-bit to 64-bit. */
4778 *addr
= (uint32_t) *addr
;
4789 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 2))
4792 *addr
= extract_signed_integer (buf
, 2, byte_order
);
4798 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 1))
4801 *addr
= (int8_t) buf
[0];
4804 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 2))
4807 *addr
= extract_signed_integer (buf
, 2, byte_order
);
4814 regcache_raw_read_unsigned (irp
->regcache
,
4815 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4817 *addr
= (uint32_t) (*addr
+ offset64
);
4818 regcache_raw_read_unsigned (irp
->regcache
,
4819 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4821 *addr
= (uint32_t) (*addr
+ offset64
);
4824 regcache_raw_read_unsigned (irp
->regcache
,
4825 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4827 *addr
= (uint32_t) (*addr
+ offset64
);
4828 regcache_raw_read_unsigned (irp
->regcache
,
4829 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4831 *addr
= (uint32_t) (*addr
+ offset64
);
4834 regcache_raw_read_unsigned (irp
->regcache
,
4835 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4837 *addr
= (uint32_t) (*addr
+ offset64
);
4838 regcache_raw_read_unsigned (irp
->regcache
,
4839 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4841 *addr
= (uint32_t) (*addr
+ offset64
);
4844 regcache_raw_read_unsigned (irp
->regcache
,
4845 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4847 *addr
= (uint32_t) (*addr
+ offset64
);
4848 regcache_raw_read_unsigned (irp
->regcache
,
4849 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4851 *addr
= (uint32_t) (*addr
+ offset64
);
4854 regcache_raw_read_unsigned (irp
->regcache
,
4855 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4857 *addr
= (uint32_t) (*addr
+ offset64
);
4860 regcache_raw_read_unsigned (irp
->regcache
,
4861 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4863 *addr
= (uint32_t) (*addr
+ offset64
);
4866 regcache_raw_read_unsigned (irp
->regcache
,
4867 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4869 *addr
= (uint32_t) (*addr
+ offset64
);
4872 regcache_raw_read_unsigned (irp
->regcache
,
4873 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4875 *addr
= (uint32_t) (*addr
+ offset64
);
4885 /* Record the address and contents of the memory that will be changed
4886 by the current instruction. Return -1 if something goes wrong, 0
4890 i386_record_lea_modrm (struct i386_record_s
*irp
)
4892 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4895 if (irp
->override
>= 0)
4897 if (record_full_memory_query
)
4900 Process record ignores the memory change of instruction at address %s\n\
4901 because it can't get the value of the segment register.\n\
4902 Do you want to stop the program?"),
4903 paddress (gdbarch
, irp
->orig_addr
)))
4910 if (i386_record_lea_modrm_addr (irp
, &addr
))
4913 if (record_full_arch_list_add_mem (addr
, 1 << irp
->ot
))
4919 /* Record the effects of a push operation. Return -1 if something
4920 goes wrong, 0 otherwise. */
4923 i386_record_push (struct i386_record_s
*irp
, int size
)
4927 if (record_full_arch_list_add_reg (irp
->regcache
,
4928 irp
->regmap
[X86_RECORD_RESP_REGNUM
]))
4930 regcache_raw_read_unsigned (irp
->regcache
,
4931 irp
->regmap
[X86_RECORD_RESP_REGNUM
],
4933 if (record_full_arch_list_add_mem ((CORE_ADDR
) addr
- size
, size
))
4940 /* Defines contents to record. */
4941 #define I386_SAVE_FPU_REGS 0xfffd
4942 #define I386_SAVE_FPU_ENV 0xfffe
4943 #define I386_SAVE_FPU_ENV_REG_STACK 0xffff
4945 /* Record the values of the floating point registers which will be
4946 changed by the current instruction. Returns -1 if something is
4947 wrong, 0 otherwise. */
4949 static int i386_record_floats (struct gdbarch
*gdbarch
,
4950 struct i386_record_s
*ir
,
4953 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4956 /* Oza: Because of floating point insn push/pop of fpu stack is going to
4957 happen. Currently we store st0-st7 registers, but we need not store all
4958 registers all the time, in future we use ftag register and record only
4959 those who are not marked as an empty. */
4961 if (I386_SAVE_FPU_REGS
== iregnum
)
4963 for (i
= I387_ST0_REGNUM (tdep
); i
<= I387_ST0_REGNUM (tdep
) + 7; i
++)
4965 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4969 else if (I386_SAVE_FPU_ENV
== iregnum
)
4971 for (i
= I387_FCTRL_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
4973 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4977 else if (I386_SAVE_FPU_ENV_REG_STACK
== iregnum
)
4979 for (i
= I387_ST0_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
4980 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4983 else if ((iregnum
>= I387_ST0_REGNUM (tdep
)) &&
4984 (iregnum
<= I387_FOP_REGNUM (tdep
)))
4986 if (record_full_arch_list_add_reg (ir
->regcache
,iregnum
))
4991 /* Parameter error. */
4994 if(I386_SAVE_FPU_ENV
!= iregnum
)
4996 for (i
= I387_FCTRL_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
4998 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
5005 /* Parse the current instruction, and record the values of the
5006 registers and memory that will be changed by the current
5007 instruction. Returns -1 if something goes wrong, 0 otherwise. */
5009 #define I386_RECORD_FULL_ARCH_LIST_ADD_REG(regnum) \
5010 record_full_arch_list_add_reg (ir.regcache, ir.regmap[(regnum)])
5013 i386_process_record (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
5014 CORE_ADDR input_addr
)
5016 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
5022 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
5023 struct i386_record_s ir
;
5024 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
5028 memset (&ir
, 0, sizeof (struct i386_record_s
));
5029 ir
.regcache
= regcache
;
5030 ir
.addr
= input_addr
;
5031 ir
.orig_addr
= input_addr
;
5035 ir
.popl_esp_hack
= 0;
5036 ir
.regmap
= tdep
->record_regmap
;
5037 ir
.gdbarch
= gdbarch
;
5039 if (record_debug
> 1)
5040 fprintf_unfiltered (gdb_stdlog
, "Process record: i386_process_record "
5042 paddress (gdbarch
, ir
.addr
));
5047 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
5050 switch (opcode8
) /* Instruction prefixes */
5052 case REPE_PREFIX_OPCODE
:
5053 prefixes
|= PREFIX_REPZ
;
5055 case REPNE_PREFIX_OPCODE
:
5056 prefixes
|= PREFIX_REPNZ
;
5058 case LOCK_PREFIX_OPCODE
:
5059 prefixes
|= PREFIX_LOCK
;
5061 case CS_PREFIX_OPCODE
:
5062 ir
.override
= X86_RECORD_CS_REGNUM
;
5064 case SS_PREFIX_OPCODE
:
5065 ir
.override
= X86_RECORD_SS_REGNUM
;
5067 case DS_PREFIX_OPCODE
:
5068 ir
.override
= X86_RECORD_DS_REGNUM
;
5070 case ES_PREFIX_OPCODE
:
5071 ir
.override
= X86_RECORD_ES_REGNUM
;
5073 case FS_PREFIX_OPCODE
:
5074 ir
.override
= X86_RECORD_FS_REGNUM
;
5076 case GS_PREFIX_OPCODE
:
5077 ir
.override
= X86_RECORD_GS_REGNUM
;
5079 case DATA_PREFIX_OPCODE
:
5080 prefixes
|= PREFIX_DATA
;
5082 case ADDR_PREFIX_OPCODE
:
5083 prefixes
|= PREFIX_ADDR
;
5085 case 0x40: /* i386 inc %eax */
5086 case 0x41: /* i386 inc %ecx */
5087 case 0x42: /* i386 inc %edx */
5088 case 0x43: /* i386 inc %ebx */
5089 case 0x44: /* i386 inc %esp */
5090 case 0x45: /* i386 inc %ebp */
5091 case 0x46: /* i386 inc %esi */
5092 case 0x47: /* i386 inc %edi */
5093 case 0x48: /* i386 dec %eax */
5094 case 0x49: /* i386 dec %ecx */
5095 case 0x4a: /* i386 dec %edx */
5096 case 0x4b: /* i386 dec %ebx */
5097 case 0x4c: /* i386 dec %esp */
5098 case 0x4d: /* i386 dec %ebp */
5099 case 0x4e: /* i386 dec %esi */
5100 case 0x4f: /* i386 dec %edi */
5101 if (ir
.regmap
[X86_RECORD_R8_REGNUM
]) /* 64 bit target */
5104 rex_w
= (opcode8
>> 3) & 1;
5105 rex_r
= (opcode8
& 0x4) << 1;
5106 ir
.rex_x
= (opcode8
& 0x2) << 2;
5107 ir
.rex_b
= (opcode8
& 0x1) << 3;
5109 else /* 32 bit target */
5118 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && rex_w
== 1)
5124 if (prefixes
& PREFIX_DATA
)
5127 if (prefixes
& PREFIX_ADDR
)
5129 else if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5132 /* Now check op code. */
5133 opcode
= (uint32_t) opcode8
;
5138 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
5141 opcode
= (uint32_t) opcode8
| 0x0f00;
5145 case 0x00: /* arith & logic */
5193 if (((opcode
>> 3) & 7) != OP_CMPL
)
5195 if ((opcode
& 1) == 0)
5198 ir
.ot
= ir
.dflag
+ OT_WORD
;
5200 switch ((opcode
>> 1) & 3)
5202 case 0: /* OP Ev, Gv */
5203 if (i386_record_modrm (&ir
))
5207 if (i386_record_lea_modrm (&ir
))
5213 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5215 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5218 case 1: /* OP Gv, Ev */
5219 if (i386_record_modrm (&ir
))
5222 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5224 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5226 case 2: /* OP A, Iv */
5227 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5231 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5234 case 0x80: /* GRP1 */
5238 if (i386_record_modrm (&ir
))
5241 if (ir
.reg
!= OP_CMPL
)
5243 if ((opcode
& 1) == 0)
5246 ir
.ot
= ir
.dflag
+ OT_WORD
;
5253 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5254 if (i386_record_lea_modrm (&ir
))
5258 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
5260 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5263 case 0x40: /* inc */
5272 case 0x48: /* dec */
5281 I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode
& 7);
5282 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5285 case 0xf6: /* GRP3 */
5287 if ((opcode
& 1) == 0)
5290 ir
.ot
= ir
.dflag
+ OT_WORD
;
5291 if (i386_record_modrm (&ir
))
5294 if (ir
.mod
!= 3 && ir
.reg
== 0)
5295 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5300 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5306 if (i386_record_lea_modrm (&ir
))
5312 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5314 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5316 if (ir
.reg
== 3) /* neg */
5317 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5323 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5324 if (ir
.ot
!= OT_BYTE
)
5325 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5326 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5330 opcode
= opcode
<< 8 | ir
.modrm
;
5336 case 0xfe: /* GRP4 */
5337 case 0xff: /* GRP5 */
5338 if (i386_record_modrm (&ir
))
5340 if (ir
.reg
>= 2 && opcode
== 0xfe)
5343 opcode
= opcode
<< 8 | ir
.modrm
;
5350 if ((opcode
& 1) == 0)
5353 ir
.ot
= ir
.dflag
+ OT_WORD
;
5356 if (i386_record_lea_modrm (&ir
))
5362 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5364 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5366 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5369 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5371 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5373 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5376 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
5377 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5379 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5383 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5386 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5388 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5393 opcode
= opcode
<< 8 | ir
.modrm
;
5399 case 0x84: /* test */
5403 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5406 case 0x98: /* CWDE/CBW */
5407 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5410 case 0x99: /* CDQ/CWD */
5411 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5412 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5415 case 0x0faf: /* imul */
5418 ir
.ot
= ir
.dflag
+ OT_WORD
;
5419 if (i386_record_modrm (&ir
))
5422 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5423 else if (opcode
== 0x6b)
5426 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5428 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5429 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5432 case 0x0fc0: /* xadd */
5434 if ((opcode
& 1) == 0)
5437 ir
.ot
= ir
.dflag
+ OT_WORD
;
5438 if (i386_record_modrm (&ir
))
5443 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5445 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5446 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5448 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5452 if (i386_record_lea_modrm (&ir
))
5454 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5456 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5458 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5461 case 0x0fb0: /* cmpxchg */
5463 if ((opcode
& 1) == 0)
5466 ir
.ot
= ir
.dflag
+ OT_WORD
;
5467 if (i386_record_modrm (&ir
))
5472 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5473 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5475 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5479 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5480 if (i386_record_lea_modrm (&ir
))
5483 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5486 case 0x0fc7: /* cmpxchg8b / rdrand / rdseed */
5487 if (i386_record_modrm (&ir
))
5491 /* rdrand and rdseed use the 3 bits of the REG field of ModR/M as
5492 an extended opcode. rdrand has bits 110 (/6) and rdseed
5493 has bits 111 (/7). */
5494 if (ir
.reg
== 6 || ir
.reg
== 7)
5496 /* The storage register is described by the 3 R/M bits, but the
5497 REX.B prefix may be used to give access to registers
5498 R8~R15. In this case ir.rex_b + R/M will give us the register
5499 in the range R8~R15.
5501 REX.W may also be used to access 64-bit registers, but we
5502 already record entire registers and not just partial bits
5504 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rex_b
+ ir
.rm
);
5505 /* These instructions also set conditional bits. */
5506 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5511 /* We don't handle this particular instruction yet. */
5513 opcode
= opcode
<< 8 | ir
.modrm
;
5517 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5518 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5519 if (i386_record_lea_modrm (&ir
))
5521 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5524 case 0x50: /* push */
5534 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5536 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5540 case 0x06: /* push es */
5541 case 0x0e: /* push cs */
5542 case 0x16: /* push ss */
5543 case 0x1e: /* push ds */
5544 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5549 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5553 case 0x0fa0: /* push fs */
5554 case 0x0fa8: /* push gs */
5555 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5560 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5564 case 0x60: /* pusha */
5565 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5570 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 4)))
5574 case 0x58: /* pop */
5582 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5583 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 0x7) | ir
.rex_b
);
5586 case 0x61: /* popa */
5587 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5592 for (regnum
= X86_RECORD_REAX_REGNUM
;
5593 regnum
<= X86_RECORD_REDI_REGNUM
;
5595 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5598 case 0x8f: /* pop */
5599 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5600 ir
.ot
= ir
.dflag
? OT_QUAD
: OT_WORD
;
5602 ir
.ot
= ir
.dflag
+ OT_WORD
;
5603 if (i386_record_modrm (&ir
))
5606 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
5609 ir
.popl_esp_hack
= 1 << ir
.ot
;
5610 if (i386_record_lea_modrm (&ir
))
5613 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5616 case 0xc8: /* enter */
5617 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
5618 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5620 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5624 case 0xc9: /* leave */
5625 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5626 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
5629 case 0x07: /* pop es */
5630 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5635 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5636 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_ES_REGNUM
);
5637 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5640 case 0x17: /* pop ss */
5641 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5646 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5647 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_SS_REGNUM
);
5648 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5651 case 0x1f: /* pop ds */
5652 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5657 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5658 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_DS_REGNUM
);
5659 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5662 case 0x0fa1: /* pop fs */
5663 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5664 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_FS_REGNUM
);
5665 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5668 case 0x0fa9: /* pop gs */
5669 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5670 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM
);
5671 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5674 case 0x88: /* mov */
5678 if ((opcode
& 1) == 0)
5681 ir
.ot
= ir
.dflag
+ OT_WORD
;
5683 if (i386_record_modrm (&ir
))
5688 if (opcode
== 0xc6 || opcode
== 0xc7)
5689 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5690 if (i386_record_lea_modrm (&ir
))
5695 if (opcode
== 0xc6 || opcode
== 0xc7)
5697 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5699 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5703 case 0x8a: /* mov */
5705 if ((opcode
& 1) == 0)
5708 ir
.ot
= ir
.dflag
+ OT_WORD
;
5709 if (i386_record_modrm (&ir
))
5712 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5714 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5717 case 0x8c: /* mov seg */
5718 if (i386_record_modrm (&ir
))
5723 opcode
= opcode
<< 8 | ir
.modrm
;
5728 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5732 if (i386_record_lea_modrm (&ir
))
5737 case 0x8e: /* mov seg */
5738 if (i386_record_modrm (&ir
))
5743 regnum
= X86_RECORD_ES_REGNUM
;
5746 regnum
= X86_RECORD_SS_REGNUM
;
5749 regnum
= X86_RECORD_DS_REGNUM
;
5752 regnum
= X86_RECORD_FS_REGNUM
;
5755 regnum
= X86_RECORD_GS_REGNUM
;
5759 opcode
= opcode
<< 8 | ir
.modrm
;
5763 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5764 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5767 case 0x0fb6: /* movzbS */
5768 case 0x0fb7: /* movzwS */
5769 case 0x0fbe: /* movsbS */
5770 case 0x0fbf: /* movswS */
5771 if (i386_record_modrm (&ir
))
5773 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
5776 case 0x8d: /* lea */
5777 if (i386_record_modrm (&ir
))
5782 opcode
= opcode
<< 8 | ir
.modrm
;
5787 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5789 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5792 case 0xa0: /* mov EAX */
5795 case 0xd7: /* xlat */
5796 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5799 case 0xa2: /* mov EAX */
5801 if (ir
.override
>= 0)
5803 if (record_full_memory_query
)
5806 Process record ignores the memory change of instruction at address %s\n\
5807 because it can't get the value of the segment register.\n\
5808 Do you want to stop the program?"),
5809 paddress (gdbarch
, ir
.orig_addr
)))
5815 if ((opcode
& 1) == 0)
5818 ir
.ot
= ir
.dflag
+ OT_WORD
;
5821 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 8))
5824 addr
= extract_unsigned_integer (buf
, 8, byte_order
);
5828 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 4))
5831 addr
= extract_unsigned_integer (buf
, 4, byte_order
);
5835 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 2))
5838 addr
= extract_unsigned_integer (buf
, 2, byte_order
);
5840 if (record_full_arch_list_add_mem (addr
, 1 << ir
.ot
))
5845 case 0xb0: /* mov R, Ib */
5853 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((ir
.regmap
[X86_RECORD_R8_REGNUM
])
5854 ? ((opcode
& 0x7) | ir
.rex_b
)
5855 : ((opcode
& 0x7) & 0x3));
5858 case 0xb8: /* mov R, Iv */
5866 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 0x7) | ir
.rex_b
);
5869 case 0x91: /* xchg R, EAX */
5876 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5877 I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode
& 0x7);
5880 case 0x86: /* xchg Ev, Gv */
5882 if ((opcode
& 1) == 0)
5885 ir
.ot
= ir
.dflag
+ OT_WORD
;
5886 if (i386_record_modrm (&ir
))
5891 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5893 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5897 if (i386_record_lea_modrm (&ir
))
5901 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5903 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5906 case 0xc4: /* les Gv */
5907 case 0xc5: /* lds Gv */
5908 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5914 case 0x0fb2: /* lss Gv */
5915 case 0x0fb4: /* lfs Gv */
5916 case 0x0fb5: /* lgs Gv */
5917 if (i386_record_modrm (&ir
))
5925 opcode
= opcode
<< 8 | ir
.modrm
;
5930 case 0xc4: /* les Gv */
5931 regnum
= X86_RECORD_ES_REGNUM
;
5933 case 0xc5: /* lds Gv */
5934 regnum
= X86_RECORD_DS_REGNUM
;
5936 case 0x0fb2: /* lss Gv */
5937 regnum
= X86_RECORD_SS_REGNUM
;
5939 case 0x0fb4: /* lfs Gv */
5940 regnum
= X86_RECORD_FS_REGNUM
;
5942 case 0x0fb5: /* lgs Gv */
5943 regnum
= X86_RECORD_GS_REGNUM
;
5946 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5947 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
5948 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5951 case 0xc0: /* shifts */
5957 if ((opcode
& 1) == 0)
5960 ir
.ot
= ir
.dflag
+ OT_WORD
;
5961 if (i386_record_modrm (&ir
))
5963 if (ir
.mod
!= 3 && (opcode
== 0xd2 || opcode
== 0xd3))
5965 if (i386_record_lea_modrm (&ir
))
5971 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5973 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5975 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5982 if (i386_record_modrm (&ir
))
5986 if (record_full_arch_list_add_reg (ir
.regcache
, ir
.rm
))
5991 if (i386_record_lea_modrm (&ir
))
5996 case 0xd8: /* Floats. */
6004 if (i386_record_modrm (&ir
))
6006 ir
.reg
|= ((opcode
& 7) << 3);
6012 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
6020 /* For fcom, ficom nothing to do. */
6026 /* For fcomp, ficomp pop FPU stack, store all. */
6027 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6054 /* For fadd, fmul, fsub, fsubr, fdiv, fdivr, fiadd, fimul,
6055 fisub, fisubr, fidiv, fidivr, modR/M.reg is an extension
6056 of code, always affects st(0) register. */
6057 if (i386_record_floats (gdbarch
, &ir
, I387_ST0_REGNUM (tdep
)))
6081 /* Handling fld, fild. */
6082 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6086 switch (ir
.reg
>> 4)
6089 if (record_full_arch_list_add_mem (addr64
, 4))
6093 if (record_full_arch_list_add_mem (addr64
, 8))
6099 if (record_full_arch_list_add_mem (addr64
, 2))
6105 switch (ir
.reg
>> 4)
6108 if (record_full_arch_list_add_mem (addr64
, 4))
6110 if (3 == (ir
.reg
& 7))
6112 /* For fstp m32fp. */
6113 if (i386_record_floats (gdbarch
, &ir
,
6114 I386_SAVE_FPU_REGS
))
6119 if (record_full_arch_list_add_mem (addr64
, 4))
6121 if ((3 == (ir
.reg
& 7))
6122 || (5 == (ir
.reg
& 7))
6123 || (7 == (ir
.reg
& 7)))
6125 /* For fstp insn. */
6126 if (i386_record_floats (gdbarch
, &ir
,
6127 I386_SAVE_FPU_REGS
))
6132 if (record_full_arch_list_add_mem (addr64
, 8))
6134 if (3 == (ir
.reg
& 7))
6136 /* For fstp m64fp. */
6137 if (i386_record_floats (gdbarch
, &ir
,
6138 I386_SAVE_FPU_REGS
))
6143 if ((3 <= (ir
.reg
& 7)) && (6 <= (ir
.reg
& 7)))
6145 /* For fistp, fbld, fild, fbstp. */
6146 if (i386_record_floats (gdbarch
, &ir
,
6147 I386_SAVE_FPU_REGS
))
6152 if (record_full_arch_list_add_mem (addr64
, 2))
6161 if (i386_record_floats (gdbarch
, &ir
,
6162 I386_SAVE_FPU_ENV_REG_STACK
))
6167 if (i386_record_floats (gdbarch
, &ir
, I387_FCTRL_REGNUM (tdep
)))
6172 if (i386_record_floats (gdbarch
, &ir
,
6173 I386_SAVE_FPU_ENV_REG_STACK
))
6179 if (record_full_arch_list_add_mem (addr64
, 28))
6184 if (record_full_arch_list_add_mem (addr64
, 14))
6190 if (record_full_arch_list_add_mem (addr64
, 2))
6192 /* Insn fstp, fbstp. */
6193 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6198 if (record_full_arch_list_add_mem (addr64
, 10))
6204 if (record_full_arch_list_add_mem (addr64
, 28))
6210 if (record_full_arch_list_add_mem (addr64
, 14))
6214 if (record_full_arch_list_add_mem (addr64
, 80))
6217 if (i386_record_floats (gdbarch
, &ir
,
6218 I386_SAVE_FPU_ENV_REG_STACK
))
6222 if (record_full_arch_list_add_mem (addr64
, 8))
6225 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6230 opcode
= opcode
<< 8 | ir
.modrm
;
6235 /* Opcode is an extension of modR/M byte. */
6241 if (i386_record_floats (gdbarch
, &ir
, I387_ST0_REGNUM (tdep
)))
6245 if (0x0c == (ir
.modrm
>> 4))
6247 if ((ir
.modrm
& 0x0f) <= 7)
6249 if (i386_record_floats (gdbarch
, &ir
,
6250 I386_SAVE_FPU_REGS
))
6255 if (i386_record_floats (gdbarch
, &ir
,
6256 I387_ST0_REGNUM (tdep
)))
6258 /* If only st(0) is changing, then we have already
6260 if ((ir
.modrm
& 0x0f) - 0x08)
6262 if (i386_record_floats (gdbarch
, &ir
,
6263 I387_ST0_REGNUM (tdep
) +
6264 ((ir
.modrm
& 0x0f) - 0x08)))
6282 if (i386_record_floats (gdbarch
, &ir
,
6283 I387_ST0_REGNUM (tdep
)))
6301 if (i386_record_floats (gdbarch
, &ir
,
6302 I386_SAVE_FPU_REGS
))
6306 if (i386_record_floats (gdbarch
, &ir
,
6307 I387_ST0_REGNUM (tdep
)))
6309 if (i386_record_floats (gdbarch
, &ir
,
6310 I387_ST0_REGNUM (tdep
) + 1))
6317 if (0xe9 == ir
.modrm
)
6319 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6322 else if ((0x0c == ir
.modrm
>> 4) || (0x0d == ir
.modrm
>> 4))
6324 if (i386_record_floats (gdbarch
, &ir
,
6325 I387_ST0_REGNUM (tdep
)))
6327 if (((ir
.modrm
& 0x0f) > 0) && ((ir
.modrm
& 0x0f) <= 7))
6329 if (i386_record_floats (gdbarch
, &ir
,
6330 I387_ST0_REGNUM (tdep
) +
6334 else if ((ir
.modrm
& 0x0f) - 0x08)
6336 if (i386_record_floats (gdbarch
, &ir
,
6337 I387_ST0_REGNUM (tdep
) +
6338 ((ir
.modrm
& 0x0f) - 0x08)))
6344 if (0xe3 == ir
.modrm
)
6346 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_ENV
))
6349 else if ((0x0c == ir
.modrm
>> 4) || (0x0d == ir
.modrm
>> 4))
6351 if (i386_record_floats (gdbarch
, &ir
,
6352 I387_ST0_REGNUM (tdep
)))
6354 if (((ir
.modrm
& 0x0f) > 0) && ((ir
.modrm
& 0x0f) <= 7))
6356 if (i386_record_floats (gdbarch
, &ir
,
6357 I387_ST0_REGNUM (tdep
) +
6361 else if ((ir
.modrm
& 0x0f) - 0x08)
6363 if (i386_record_floats (gdbarch
, &ir
,
6364 I387_ST0_REGNUM (tdep
) +
6365 ((ir
.modrm
& 0x0f) - 0x08)))
6371 if ((0x0c == ir
.modrm
>> 4)
6372 || (0x0d == ir
.modrm
>> 4)
6373 || (0x0f == ir
.modrm
>> 4))
6375 if ((ir
.modrm
& 0x0f) <= 7)
6377 if (i386_record_floats (gdbarch
, &ir
,
6378 I387_ST0_REGNUM (tdep
) +
6384 if (i386_record_floats (gdbarch
, &ir
,
6385 I387_ST0_REGNUM (tdep
) +
6386 ((ir
.modrm
& 0x0f) - 0x08)))
6392 if (0x0c == ir
.modrm
>> 4)
6394 if (i386_record_floats (gdbarch
, &ir
,
6395 I387_FTAG_REGNUM (tdep
)))
6398 else if ((0x0d == ir
.modrm
>> 4) || (0x0e == ir
.modrm
>> 4))
6400 if ((ir
.modrm
& 0x0f) <= 7)
6402 if (i386_record_floats (gdbarch
, &ir
,
6403 I387_ST0_REGNUM (tdep
) +
6409 if (i386_record_floats (gdbarch
, &ir
,
6410 I386_SAVE_FPU_REGS
))
6416 if ((0x0c == ir
.modrm
>> 4)
6417 || (0x0e == ir
.modrm
>> 4)
6418 || (0x0f == ir
.modrm
>> 4)
6419 || (0xd9 == ir
.modrm
))
6421 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6426 if (0xe0 == ir
.modrm
)
6428 if (record_full_arch_list_add_reg (ir
.regcache
,
6432 else if ((0x0f == ir
.modrm
>> 4) || (0x0e == ir
.modrm
>> 4))
6434 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6442 case 0xa4: /* movsS */
6444 case 0xaa: /* stosS */
6446 case 0x6c: /* insS */
6448 regcache_raw_read_unsigned (ir
.regcache
,
6449 ir
.regmap
[X86_RECORD_RECX_REGNUM
],
6455 if ((opcode
& 1) == 0)
6458 ir
.ot
= ir
.dflag
+ OT_WORD
;
6459 regcache_raw_read_unsigned (ir
.regcache
,
6460 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
6463 regcache_raw_read_unsigned (ir
.regcache
,
6464 ir
.regmap
[X86_RECORD_ES_REGNUM
],
6466 regcache_raw_read_unsigned (ir
.regcache
,
6467 ir
.regmap
[X86_RECORD_DS_REGNUM
],
6469 if (ir
.aflag
&& (es
!= ds
))
6471 /* addr += ((uint32_t) read_register (I386_ES_REGNUM)) << 4; */
6472 if (record_full_memory_query
)
6475 Process record ignores the memory change of instruction at address %s\n\
6476 because it can't get the value of the segment register.\n\
6477 Do you want to stop the program?"),
6478 paddress (gdbarch
, ir
.orig_addr
)))
6484 if (record_full_arch_list_add_mem (addr
, 1 << ir
.ot
))
6488 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6489 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6490 if (opcode
== 0xa4 || opcode
== 0xa5)
6491 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6492 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6493 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6497 case 0xa6: /* cmpsS */
6499 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6500 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6501 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6502 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6503 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6506 case 0xac: /* lodsS */
6508 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6509 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6510 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6511 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6512 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6515 case 0xae: /* scasS */
6517 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6518 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6519 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6520 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6523 case 0x6e: /* outsS */
6525 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6526 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6527 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6528 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6531 case 0xe4: /* port I/O */
6535 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6536 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6546 case 0xc2: /* ret im */
6547 case 0xc3: /* ret */
6548 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6549 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6552 case 0xca: /* lret im */
6553 case 0xcb: /* lret */
6554 case 0xcf: /* iret */
6555 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
6556 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6557 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6560 case 0xe8: /* call im */
6561 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
6563 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6567 case 0x9a: /* lcall im */
6568 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6573 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
6574 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6578 case 0xe9: /* jmp im */
6579 case 0xea: /* ljmp im */
6580 case 0xeb: /* jmp Jb */
6581 case 0x70: /* jcc Jb */
6597 case 0x0f80: /* jcc Jv */
6615 case 0x0f90: /* setcc Gv */
6631 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6633 if (i386_record_modrm (&ir
))
6636 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rex_b
? (ir
.rm
| ir
.rex_b
)
6640 if (i386_record_lea_modrm (&ir
))
6645 case 0x0f40: /* cmov Gv, Ev */
6661 if (i386_record_modrm (&ir
))
6664 if (ir
.dflag
== OT_BYTE
)
6666 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
6670 case 0x9c: /* pushf */
6671 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6672 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
6674 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6678 case 0x9d: /* popf */
6679 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6680 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6683 case 0x9e: /* sahf */
6684 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6690 case 0xf5: /* cmc */
6691 case 0xf8: /* clc */
6692 case 0xf9: /* stc */
6693 case 0xfc: /* cld */
6694 case 0xfd: /* std */
6695 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6698 case 0x9f: /* lahf */
6699 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6704 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6705 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6708 /* bit operations */
6709 case 0x0fba: /* bt/bts/btr/btc Gv, im */
6710 ir
.ot
= ir
.dflag
+ OT_WORD
;
6711 if (i386_record_modrm (&ir
))
6716 opcode
= opcode
<< 8 | ir
.modrm
;
6722 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6725 if (i386_record_lea_modrm (&ir
))
6729 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6732 case 0x0fa3: /* bt Gv, Ev */
6733 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6736 case 0x0fab: /* bts */
6737 case 0x0fb3: /* btr */
6738 case 0x0fbb: /* btc */
6739 ir
.ot
= ir
.dflag
+ OT_WORD
;
6740 if (i386_record_modrm (&ir
))
6743 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6747 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
6749 regcache_raw_read_unsigned (ir
.regcache
,
6750 ir
.regmap
[ir
.reg
| rex_r
],
6755 addr64
+= ((int16_t) addr
>> 4) << 4;
6758 addr64
+= ((int32_t) addr
>> 5) << 5;
6761 addr64
+= ((int64_t) addr
>> 6) << 6;
6764 if (record_full_arch_list_add_mem (addr64
, 1 << ir
.ot
))
6766 if (i386_record_lea_modrm (&ir
))
6769 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6772 case 0x0fbc: /* bsf */
6773 case 0x0fbd: /* bsr */
6774 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
6775 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6779 case 0x27: /* daa */
6780 case 0x2f: /* das */
6781 case 0x37: /* aaa */
6782 case 0x3f: /* aas */
6783 case 0xd4: /* aam */
6784 case 0xd5: /* aad */
6785 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6790 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6791 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6795 case 0x90: /* nop */
6796 if (prefixes
& PREFIX_LOCK
)
6803 case 0x9b: /* fwait */
6804 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
6806 opcode
= (uint32_t) opcode8
;
6812 case 0xcc: /* int3 */
6813 printf_unfiltered (_("Process record does not support instruction "
6820 case 0xcd: /* int */
6824 if (record_read_memory (gdbarch
, ir
.addr
, &interrupt
, 1))
6827 if (interrupt
!= 0x80
6828 || tdep
->i386_intx80_record
== NULL
)
6830 printf_unfiltered (_("Process record does not support "
6831 "instruction int 0x%02x.\n"),
6836 ret
= tdep
->i386_intx80_record (ir
.regcache
);
6843 case 0xce: /* into */
6844 printf_unfiltered (_("Process record does not support "
6845 "instruction into.\n"));
6850 case 0xfa: /* cli */
6851 case 0xfb: /* sti */
6854 case 0x62: /* bound */
6855 printf_unfiltered (_("Process record does not support "
6856 "instruction bound.\n"));
6861 case 0x0fc8: /* bswap reg */
6869 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 7) | ir
.rex_b
);
6872 case 0xd6: /* salc */
6873 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6878 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6879 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6882 case 0xe0: /* loopnz */
6883 case 0xe1: /* loopz */
6884 case 0xe2: /* loop */
6885 case 0xe3: /* jecxz */
6886 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6887 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6890 case 0x0f30: /* wrmsr */
6891 printf_unfiltered (_("Process record does not support "
6892 "instruction wrmsr.\n"));
6897 case 0x0f32: /* rdmsr */
6898 printf_unfiltered (_("Process record does not support "
6899 "instruction rdmsr.\n"));
6904 case 0x0f31: /* rdtsc */
6905 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6906 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
6909 case 0x0f34: /* sysenter */
6912 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6917 if (tdep
->i386_sysenter_record
== NULL
)
6919 printf_unfiltered (_("Process record does not support "
6920 "instruction sysenter.\n"));
6924 ret
= tdep
->i386_sysenter_record (ir
.regcache
);
6930 case 0x0f35: /* sysexit */
6931 printf_unfiltered (_("Process record does not support "
6932 "instruction sysexit.\n"));
6937 case 0x0f05: /* syscall */
6940 if (tdep
->i386_syscall_record
== NULL
)
6942 printf_unfiltered (_("Process record does not support "
6943 "instruction syscall.\n"));
6947 ret
= tdep
->i386_syscall_record (ir
.regcache
);
6953 case 0x0f07: /* sysret */
6954 printf_unfiltered (_("Process record does not support "
6955 "instruction sysret.\n"));
6960 case 0x0fa2: /* cpuid */
6961 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6962 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6963 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
6964 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM
);
6967 case 0xf4: /* hlt */
6968 printf_unfiltered (_("Process record does not support "
6969 "instruction hlt.\n"));
6975 if (i386_record_modrm (&ir
))
6982 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6986 if (i386_record_lea_modrm (&ir
))
6995 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6999 opcode
= opcode
<< 8 | ir
.modrm
;
7006 if (i386_record_modrm (&ir
))
7017 opcode
= opcode
<< 8 | ir
.modrm
;
7020 if (ir
.override
>= 0)
7022 if (record_full_memory_query
)
7025 Process record ignores the memory change of instruction at address %s\n\
7026 because it can't get the value of the segment register.\n\
7027 Do you want to stop the program?"),
7028 paddress (gdbarch
, ir
.orig_addr
)))
7034 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
7036 if (record_full_arch_list_add_mem (addr64
, 2))
7039 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
7041 if (record_full_arch_list_add_mem (addr64
, 8))
7046 if (record_full_arch_list_add_mem (addr64
, 4))
7057 case 0: /* monitor */
7060 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7064 opcode
= opcode
<< 8 | ir
.modrm
;
7072 if (ir
.override
>= 0)
7074 if (record_full_memory_query
)
7077 Process record ignores the memory change of instruction at address %s\n\
7078 because it can't get the value of the segment register.\n\
7079 Do you want to stop the program?"),
7080 paddress (gdbarch
, ir
.orig_addr
)))
7088 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
7090 if (record_full_arch_list_add_mem (addr64
, 2))
7093 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
7095 if (record_full_arch_list_add_mem (addr64
, 8))
7100 if (record_full_arch_list_add_mem (addr64
, 4))
7112 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7113 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7117 else if (ir
.rm
== 1)
7125 opcode
= opcode
<< 8 | ir
.modrm
;
7132 if (record_full_arch_list_add_reg (ir
.regcache
, ir
.rm
| ir
.rex_b
))
7138 if (i386_record_lea_modrm (&ir
))
7141 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7144 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7146 case 7: /* invlpg */
7149 if (ir
.rm
== 0 && ir
.regmap
[X86_RECORD_R8_REGNUM
])
7150 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM
);
7154 opcode
= opcode
<< 8 | ir
.modrm
;
7159 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7163 opcode
= opcode
<< 8 | ir
.modrm
;
7169 case 0x0f08: /* invd */
7170 case 0x0f09: /* wbinvd */
7173 case 0x63: /* arpl */
7174 if (i386_record_modrm (&ir
))
7176 if (ir
.mod
== 3 || ir
.regmap
[X86_RECORD_R8_REGNUM
])
7178 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.regmap
[X86_RECORD_R8_REGNUM
]
7179 ? (ir
.reg
| rex_r
) : ir
.rm
);
7183 ir
.ot
= ir
.dflag
? OT_LONG
: OT_WORD
;
7184 if (i386_record_lea_modrm (&ir
))
7187 if (!ir
.regmap
[X86_RECORD_R8_REGNUM
])
7188 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7191 case 0x0f02: /* lar */
7192 case 0x0f03: /* lsl */
7193 if (i386_record_modrm (&ir
))
7195 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
7196 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7200 if (i386_record_modrm (&ir
))
7202 if (ir
.mod
== 3 && ir
.reg
== 3)
7205 opcode
= opcode
<< 8 | ir
.modrm
;
7217 /* nop (multi byte) */
7220 case 0x0f20: /* mov reg, crN */
7221 case 0x0f22: /* mov crN, reg */
7222 if (i386_record_modrm (&ir
))
7224 if ((ir
.modrm
& 0xc0) != 0xc0)
7227 opcode
= opcode
<< 8 | ir
.modrm
;
7238 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7240 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7244 opcode
= opcode
<< 8 | ir
.modrm
;
7250 case 0x0f21: /* mov reg, drN */
7251 case 0x0f23: /* mov drN, reg */
7252 if (i386_record_modrm (&ir
))
7254 if ((ir
.modrm
& 0xc0) != 0xc0 || ir
.reg
== 4
7255 || ir
.reg
== 5 || ir
.reg
>= 8)
7258 opcode
= opcode
<< 8 | ir
.modrm
;
7262 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7264 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7267 case 0x0f06: /* clts */
7268 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7271 /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
7273 case 0x0f0d: /* 3DNow! prefetch */
7276 case 0x0f0e: /* 3DNow! femms */
7277 case 0x0f77: /* emms */
7278 if (i386_fpc_regnum_p (gdbarch
, I387_FTAG_REGNUM(tdep
)))
7280 record_full_arch_list_add_reg (ir
.regcache
, I387_FTAG_REGNUM(tdep
));
7283 case 0x0f0f: /* 3DNow! data */
7284 if (i386_record_modrm (&ir
))
7286 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
7291 case 0x0c: /* 3DNow! pi2fw */
7292 case 0x0d: /* 3DNow! pi2fd */
7293 case 0x1c: /* 3DNow! pf2iw */
7294 case 0x1d: /* 3DNow! pf2id */
7295 case 0x8a: /* 3DNow! pfnacc */
7296 case 0x8e: /* 3DNow! pfpnacc */
7297 case 0x90: /* 3DNow! pfcmpge */
7298 case 0x94: /* 3DNow! pfmin */
7299 case 0x96: /* 3DNow! pfrcp */
7300 case 0x97: /* 3DNow! pfrsqrt */
7301 case 0x9a: /* 3DNow! pfsub */
7302 case 0x9e: /* 3DNow! pfadd */
7303 case 0xa0: /* 3DNow! pfcmpgt */
7304 case 0xa4: /* 3DNow! pfmax */
7305 case 0xa6: /* 3DNow! pfrcpit1 */
7306 case 0xa7: /* 3DNow! pfrsqit1 */
7307 case 0xaa: /* 3DNow! pfsubr */
7308 case 0xae: /* 3DNow! pfacc */
7309 case 0xb0: /* 3DNow! pfcmpeq */
7310 case 0xb4: /* 3DNow! pfmul */
7311 case 0xb6: /* 3DNow! pfrcpit2 */
7312 case 0xb7: /* 3DNow! pmulhrw */
7313 case 0xbb: /* 3DNow! pswapd */
7314 case 0xbf: /* 3DNow! pavgusb */
7315 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.reg
))
7316 goto no_support_3dnow_data
;
7317 record_full_arch_list_add_reg (ir
.regcache
, ir
.reg
);
7321 no_support_3dnow_data
:
7322 opcode
= (opcode
<< 8) | opcode8
;
7328 case 0x0faa: /* rsm */
7329 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7330 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7331 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
7332 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7333 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM
);
7334 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
7335 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
7336 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
7337 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
7341 if (i386_record_modrm (&ir
))
7345 case 0: /* fxsave */
7349 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7350 if (i386_record_lea_modrm_addr (&ir
, &tmpu64
))
7352 if (record_full_arch_list_add_mem (tmpu64
, 512))
7357 case 1: /* fxrstor */
7361 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7363 for (i
= I387_MM0_REGNUM (tdep
);
7364 i386_mmx_regnum_p (gdbarch
, i
); i
++)
7365 record_full_arch_list_add_reg (ir
.regcache
, i
);
7367 for (i
= I387_XMM0_REGNUM (tdep
);
7368 i386_xmm_regnum_p (gdbarch
, i
); i
++)
7369 record_full_arch_list_add_reg (ir
.regcache
, i
);
7371 if (i386_mxcsr_regnum_p (gdbarch
, I387_MXCSR_REGNUM(tdep
)))
7372 record_full_arch_list_add_reg (ir
.regcache
,
7373 I387_MXCSR_REGNUM(tdep
));
7375 for (i
= I387_ST0_REGNUM (tdep
);
7376 i386_fp_regnum_p (gdbarch
, i
); i
++)
7377 record_full_arch_list_add_reg (ir
.regcache
, i
);
7379 for (i
= I387_FCTRL_REGNUM (tdep
);
7380 i386_fpc_regnum_p (gdbarch
, i
); i
++)
7381 record_full_arch_list_add_reg (ir
.regcache
, i
);
7385 case 2: /* ldmxcsr */
7386 if (!i386_mxcsr_regnum_p (gdbarch
, I387_MXCSR_REGNUM(tdep
)))
7388 record_full_arch_list_add_reg (ir
.regcache
, I387_MXCSR_REGNUM(tdep
));
7391 case 3: /* stmxcsr */
7393 if (i386_record_lea_modrm (&ir
))
7397 case 5: /* lfence */
7398 case 6: /* mfence */
7399 case 7: /* sfence clflush */
7403 opcode
= (opcode
<< 8) | ir
.modrm
;
7409 case 0x0fc3: /* movnti */
7410 ir
.ot
= (ir
.dflag
== 2) ? OT_QUAD
: OT_LONG
;
7411 if (i386_record_modrm (&ir
))
7416 if (i386_record_lea_modrm (&ir
))
7420 /* Add prefix to opcode. */
7535 /* Mask out PREFIX_ADDR. */
7536 switch ((prefixes
& ~PREFIX_ADDR
))
7548 reswitch_prefix_add
:
7556 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
7559 opcode
= (uint32_t) opcode8
| opcode
<< 8;
7560 goto reswitch_prefix_add
;
7563 case 0x0f10: /* movups */
7564 case 0x660f10: /* movupd */
7565 case 0xf30f10: /* movss */
7566 case 0xf20f10: /* movsd */
7567 case 0x0f12: /* movlps */
7568 case 0x660f12: /* movlpd */
7569 case 0xf30f12: /* movsldup */
7570 case 0xf20f12: /* movddup */
7571 case 0x0f14: /* unpcklps */
7572 case 0x660f14: /* unpcklpd */
7573 case 0x0f15: /* unpckhps */
7574 case 0x660f15: /* unpckhpd */
7575 case 0x0f16: /* movhps */
7576 case 0x660f16: /* movhpd */
7577 case 0xf30f16: /* movshdup */
7578 case 0x0f28: /* movaps */
7579 case 0x660f28: /* movapd */
7580 case 0x0f2a: /* cvtpi2ps */
7581 case 0x660f2a: /* cvtpi2pd */
7582 case 0xf30f2a: /* cvtsi2ss */
7583 case 0xf20f2a: /* cvtsi2sd */
7584 case 0x0f2c: /* cvttps2pi */
7585 case 0x660f2c: /* cvttpd2pi */
7586 case 0x0f2d: /* cvtps2pi */
7587 case 0x660f2d: /* cvtpd2pi */
7588 case 0x660f3800: /* pshufb */
7589 case 0x660f3801: /* phaddw */
7590 case 0x660f3802: /* phaddd */
7591 case 0x660f3803: /* phaddsw */
7592 case 0x660f3804: /* pmaddubsw */
7593 case 0x660f3805: /* phsubw */
7594 case 0x660f3806: /* phsubd */
7595 case 0x660f3807: /* phsubsw */
7596 case 0x660f3808: /* psignb */
7597 case 0x660f3809: /* psignw */
7598 case 0x660f380a: /* psignd */
7599 case 0x660f380b: /* pmulhrsw */
7600 case 0x660f3810: /* pblendvb */
7601 case 0x660f3814: /* blendvps */
7602 case 0x660f3815: /* blendvpd */
7603 case 0x660f381c: /* pabsb */
7604 case 0x660f381d: /* pabsw */
7605 case 0x660f381e: /* pabsd */
7606 case 0x660f3820: /* pmovsxbw */
7607 case 0x660f3821: /* pmovsxbd */
7608 case 0x660f3822: /* pmovsxbq */
7609 case 0x660f3823: /* pmovsxwd */
7610 case 0x660f3824: /* pmovsxwq */
7611 case 0x660f3825: /* pmovsxdq */
7612 case 0x660f3828: /* pmuldq */
7613 case 0x660f3829: /* pcmpeqq */
7614 case 0x660f382a: /* movntdqa */
7615 case 0x660f3a08: /* roundps */
7616 case 0x660f3a09: /* roundpd */
7617 case 0x660f3a0a: /* roundss */
7618 case 0x660f3a0b: /* roundsd */
7619 case 0x660f3a0c: /* blendps */
7620 case 0x660f3a0d: /* blendpd */
7621 case 0x660f3a0e: /* pblendw */
7622 case 0x660f3a0f: /* palignr */
7623 case 0x660f3a20: /* pinsrb */
7624 case 0x660f3a21: /* insertps */
7625 case 0x660f3a22: /* pinsrd pinsrq */
7626 case 0x660f3a40: /* dpps */
7627 case 0x660f3a41: /* dppd */
7628 case 0x660f3a42: /* mpsadbw */
7629 case 0x660f3a60: /* pcmpestrm */
7630 case 0x660f3a61: /* pcmpestri */
7631 case 0x660f3a62: /* pcmpistrm */
7632 case 0x660f3a63: /* pcmpistri */
7633 case 0x0f51: /* sqrtps */
7634 case 0x660f51: /* sqrtpd */
7635 case 0xf20f51: /* sqrtsd */
7636 case 0xf30f51: /* sqrtss */
7637 case 0x0f52: /* rsqrtps */
7638 case 0xf30f52: /* rsqrtss */
7639 case 0x0f53: /* rcpps */
7640 case 0xf30f53: /* rcpss */
7641 case 0x0f54: /* andps */
7642 case 0x660f54: /* andpd */
7643 case 0x0f55: /* andnps */
7644 case 0x660f55: /* andnpd */
7645 case 0x0f56: /* orps */
7646 case 0x660f56: /* orpd */
7647 case 0x0f57: /* xorps */
7648 case 0x660f57: /* xorpd */
7649 case 0x0f58: /* addps */
7650 case 0x660f58: /* addpd */
7651 case 0xf20f58: /* addsd */
7652 case 0xf30f58: /* addss */
7653 case 0x0f59: /* mulps */
7654 case 0x660f59: /* mulpd */
7655 case 0xf20f59: /* mulsd */
7656 case 0xf30f59: /* mulss */
7657 case 0x0f5a: /* cvtps2pd */
7658 case 0x660f5a: /* cvtpd2ps */
7659 case 0xf20f5a: /* cvtsd2ss */
7660 case 0xf30f5a: /* cvtss2sd */
7661 case 0x0f5b: /* cvtdq2ps */
7662 case 0x660f5b: /* cvtps2dq */
7663 case 0xf30f5b: /* cvttps2dq */
7664 case 0x0f5c: /* subps */
7665 case 0x660f5c: /* subpd */
7666 case 0xf20f5c: /* subsd */
7667 case 0xf30f5c: /* subss */
7668 case 0x0f5d: /* minps */
7669 case 0x660f5d: /* minpd */
7670 case 0xf20f5d: /* minsd */
7671 case 0xf30f5d: /* minss */
7672 case 0x0f5e: /* divps */
7673 case 0x660f5e: /* divpd */
7674 case 0xf20f5e: /* divsd */
7675 case 0xf30f5e: /* divss */
7676 case 0x0f5f: /* maxps */
7677 case 0x660f5f: /* maxpd */
7678 case 0xf20f5f: /* maxsd */
7679 case 0xf30f5f: /* maxss */
7680 case 0x660f60: /* punpcklbw */
7681 case 0x660f61: /* punpcklwd */
7682 case 0x660f62: /* punpckldq */
7683 case 0x660f63: /* packsswb */
7684 case 0x660f64: /* pcmpgtb */
7685 case 0x660f65: /* pcmpgtw */
7686 case 0x660f66: /* pcmpgtd */
7687 case 0x660f67: /* packuswb */
7688 case 0x660f68: /* punpckhbw */
7689 case 0x660f69: /* punpckhwd */
7690 case 0x660f6a: /* punpckhdq */
7691 case 0x660f6b: /* packssdw */
7692 case 0x660f6c: /* punpcklqdq */
7693 case 0x660f6d: /* punpckhqdq */
7694 case 0x660f6e: /* movd */
7695 case 0x660f6f: /* movdqa */
7696 case 0xf30f6f: /* movdqu */
7697 case 0x660f70: /* pshufd */
7698 case 0xf20f70: /* pshuflw */
7699 case 0xf30f70: /* pshufhw */
7700 case 0x660f74: /* pcmpeqb */
7701 case 0x660f75: /* pcmpeqw */
7702 case 0x660f76: /* pcmpeqd */
7703 case 0x660f7c: /* haddpd */
7704 case 0xf20f7c: /* haddps */
7705 case 0x660f7d: /* hsubpd */
7706 case 0xf20f7d: /* hsubps */
7707 case 0xf30f7e: /* movq */
7708 case 0x0fc2: /* cmpps */
7709 case 0x660fc2: /* cmppd */
7710 case 0xf20fc2: /* cmpsd */
7711 case 0xf30fc2: /* cmpss */
7712 case 0x660fc4: /* pinsrw */
7713 case 0x0fc6: /* shufps */
7714 case 0x660fc6: /* shufpd */
7715 case 0x660fd0: /* addsubpd */
7716 case 0xf20fd0: /* addsubps */
7717 case 0x660fd1: /* psrlw */
7718 case 0x660fd2: /* psrld */
7719 case 0x660fd3: /* psrlq */
7720 case 0x660fd4: /* paddq */
7721 case 0x660fd5: /* pmullw */
7722 case 0xf30fd6: /* movq2dq */
7723 case 0x660fd8: /* psubusb */
7724 case 0x660fd9: /* psubusw */
7725 case 0x660fda: /* pminub */
7726 case 0x660fdb: /* pand */
7727 case 0x660fdc: /* paddusb */
7728 case 0x660fdd: /* paddusw */
7729 case 0x660fde: /* pmaxub */
7730 case 0x660fdf: /* pandn */
7731 case 0x660fe0: /* pavgb */
7732 case 0x660fe1: /* psraw */
7733 case 0x660fe2: /* psrad */
7734 case 0x660fe3: /* pavgw */
7735 case 0x660fe4: /* pmulhuw */
7736 case 0x660fe5: /* pmulhw */
7737 case 0x660fe6: /* cvttpd2dq */
7738 case 0xf20fe6: /* cvtpd2dq */
7739 case 0xf30fe6: /* cvtdq2pd */
7740 case 0x660fe8: /* psubsb */
7741 case 0x660fe9: /* psubsw */
7742 case 0x660fea: /* pminsw */
7743 case 0x660feb: /* por */
7744 case 0x660fec: /* paddsb */
7745 case 0x660fed: /* paddsw */
7746 case 0x660fee: /* pmaxsw */
7747 case 0x660fef: /* pxor */
7748 case 0xf20ff0: /* lddqu */
7749 case 0x660ff1: /* psllw */
7750 case 0x660ff2: /* pslld */
7751 case 0x660ff3: /* psllq */
7752 case 0x660ff4: /* pmuludq */
7753 case 0x660ff5: /* pmaddwd */
7754 case 0x660ff6: /* psadbw */
7755 case 0x660ff8: /* psubb */
7756 case 0x660ff9: /* psubw */
7757 case 0x660ffa: /* psubd */
7758 case 0x660ffb: /* psubq */
7759 case 0x660ffc: /* paddb */
7760 case 0x660ffd: /* paddw */
7761 case 0x660ffe: /* paddd */
7762 if (i386_record_modrm (&ir
))
7765 if (!i386_xmm_regnum_p (gdbarch
, I387_XMM0_REGNUM (tdep
) + ir
.reg
))
7767 record_full_arch_list_add_reg (ir
.regcache
,
7768 I387_XMM0_REGNUM (tdep
) + ir
.reg
);
7769 if ((opcode
& 0xfffffffc) == 0x660f3a60)
7770 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7773 case 0x0f11: /* movups */
7774 case 0x660f11: /* movupd */
7775 case 0xf30f11: /* movss */
7776 case 0xf20f11: /* movsd */
7777 case 0x0f13: /* movlps */
7778 case 0x660f13: /* movlpd */
7779 case 0x0f17: /* movhps */
7780 case 0x660f17: /* movhpd */
7781 case 0x0f29: /* movaps */
7782 case 0x660f29: /* movapd */
7783 case 0x660f3a14: /* pextrb */
7784 case 0x660f3a15: /* pextrw */
7785 case 0x660f3a16: /* pextrd pextrq */
7786 case 0x660f3a17: /* extractps */
7787 case 0x660f7f: /* movdqa */
7788 case 0xf30f7f: /* movdqu */
7789 if (i386_record_modrm (&ir
))
7793 if (opcode
== 0x0f13 || opcode
== 0x660f13
7794 || opcode
== 0x0f17 || opcode
== 0x660f17)
7797 if (!i386_xmm_regnum_p (gdbarch
,
7798 I387_XMM0_REGNUM (tdep
) + ir
.rm
))
7800 record_full_arch_list_add_reg (ir
.regcache
,
7801 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
7823 if (i386_record_lea_modrm (&ir
))
7828 case 0x0f2b: /* movntps */
7829 case 0x660f2b: /* movntpd */
7830 case 0x0fe7: /* movntq */
7831 case 0x660fe7: /* movntdq */
7834 if (opcode
== 0x0fe7)
7838 if (i386_record_lea_modrm (&ir
))
7842 case 0xf30f2c: /* cvttss2si */
7843 case 0xf20f2c: /* cvttsd2si */
7844 case 0xf30f2d: /* cvtss2si */
7845 case 0xf20f2d: /* cvtsd2si */
7846 case 0xf20f38f0: /* crc32 */
7847 case 0xf20f38f1: /* crc32 */
7848 case 0x0f50: /* movmskps */
7849 case 0x660f50: /* movmskpd */
7850 case 0x0fc5: /* pextrw */
7851 case 0x660fc5: /* pextrw */
7852 case 0x0fd7: /* pmovmskb */
7853 case 0x660fd7: /* pmovmskb */
7854 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
7857 case 0x0f3800: /* pshufb */
7858 case 0x0f3801: /* phaddw */
7859 case 0x0f3802: /* phaddd */
7860 case 0x0f3803: /* phaddsw */
7861 case 0x0f3804: /* pmaddubsw */
7862 case 0x0f3805: /* phsubw */
7863 case 0x0f3806: /* phsubd */
7864 case 0x0f3807: /* phsubsw */
7865 case 0x0f3808: /* psignb */
7866 case 0x0f3809: /* psignw */
7867 case 0x0f380a: /* psignd */
7868 case 0x0f380b: /* pmulhrsw */
7869 case 0x0f381c: /* pabsb */
7870 case 0x0f381d: /* pabsw */
7871 case 0x0f381e: /* pabsd */
7872 case 0x0f382b: /* packusdw */
7873 case 0x0f3830: /* pmovzxbw */
7874 case 0x0f3831: /* pmovzxbd */
7875 case 0x0f3832: /* pmovzxbq */
7876 case 0x0f3833: /* pmovzxwd */
7877 case 0x0f3834: /* pmovzxwq */
7878 case 0x0f3835: /* pmovzxdq */
7879 case 0x0f3837: /* pcmpgtq */
7880 case 0x0f3838: /* pminsb */
7881 case 0x0f3839: /* pminsd */
7882 case 0x0f383a: /* pminuw */
7883 case 0x0f383b: /* pminud */
7884 case 0x0f383c: /* pmaxsb */
7885 case 0x0f383d: /* pmaxsd */
7886 case 0x0f383e: /* pmaxuw */
7887 case 0x0f383f: /* pmaxud */
7888 case 0x0f3840: /* pmulld */
7889 case 0x0f3841: /* phminposuw */
7890 case 0x0f3a0f: /* palignr */
7891 case 0x0f60: /* punpcklbw */
7892 case 0x0f61: /* punpcklwd */
7893 case 0x0f62: /* punpckldq */
7894 case 0x0f63: /* packsswb */
7895 case 0x0f64: /* pcmpgtb */
7896 case 0x0f65: /* pcmpgtw */
7897 case 0x0f66: /* pcmpgtd */
7898 case 0x0f67: /* packuswb */
7899 case 0x0f68: /* punpckhbw */
7900 case 0x0f69: /* punpckhwd */
7901 case 0x0f6a: /* punpckhdq */
7902 case 0x0f6b: /* packssdw */
7903 case 0x0f6e: /* movd */
7904 case 0x0f6f: /* movq */
7905 case 0x0f70: /* pshufw */
7906 case 0x0f74: /* pcmpeqb */
7907 case 0x0f75: /* pcmpeqw */
7908 case 0x0f76: /* pcmpeqd */
7909 case 0x0fc4: /* pinsrw */
7910 case 0x0fd1: /* psrlw */
7911 case 0x0fd2: /* psrld */
7912 case 0x0fd3: /* psrlq */
7913 case 0x0fd4: /* paddq */
7914 case 0x0fd5: /* pmullw */
7915 case 0xf20fd6: /* movdq2q */
7916 case 0x0fd8: /* psubusb */
7917 case 0x0fd9: /* psubusw */
7918 case 0x0fda: /* pminub */
7919 case 0x0fdb: /* pand */
7920 case 0x0fdc: /* paddusb */
7921 case 0x0fdd: /* paddusw */
7922 case 0x0fde: /* pmaxub */
7923 case 0x0fdf: /* pandn */
7924 case 0x0fe0: /* pavgb */
7925 case 0x0fe1: /* psraw */
7926 case 0x0fe2: /* psrad */
7927 case 0x0fe3: /* pavgw */
7928 case 0x0fe4: /* pmulhuw */
7929 case 0x0fe5: /* pmulhw */
7930 case 0x0fe8: /* psubsb */
7931 case 0x0fe9: /* psubsw */
7932 case 0x0fea: /* pminsw */
7933 case 0x0feb: /* por */
7934 case 0x0fec: /* paddsb */
7935 case 0x0fed: /* paddsw */
7936 case 0x0fee: /* pmaxsw */
7937 case 0x0fef: /* pxor */
7938 case 0x0ff1: /* psllw */
7939 case 0x0ff2: /* pslld */
7940 case 0x0ff3: /* psllq */
7941 case 0x0ff4: /* pmuludq */
7942 case 0x0ff5: /* pmaddwd */
7943 case 0x0ff6: /* psadbw */
7944 case 0x0ff8: /* psubb */
7945 case 0x0ff9: /* psubw */
7946 case 0x0ffa: /* psubd */
7947 case 0x0ffb: /* psubq */
7948 case 0x0ffc: /* paddb */
7949 case 0x0ffd: /* paddw */
7950 case 0x0ffe: /* paddd */
7951 if (i386_record_modrm (&ir
))
7953 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.reg
))
7955 record_full_arch_list_add_reg (ir
.regcache
,
7956 I387_MM0_REGNUM (tdep
) + ir
.reg
);
7959 case 0x0f71: /* psllw */
7960 case 0x0f72: /* pslld */
7961 case 0x0f73: /* psllq */
7962 if (i386_record_modrm (&ir
))
7964 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.rm
))
7966 record_full_arch_list_add_reg (ir
.regcache
,
7967 I387_MM0_REGNUM (tdep
) + ir
.rm
);
7970 case 0x660f71: /* psllw */
7971 case 0x660f72: /* pslld */
7972 case 0x660f73: /* psllq */
7973 if (i386_record_modrm (&ir
))
7976 if (!i386_xmm_regnum_p (gdbarch
, I387_XMM0_REGNUM (tdep
) + ir
.rm
))
7978 record_full_arch_list_add_reg (ir
.regcache
,
7979 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
7982 case 0x0f7e: /* movd */
7983 case 0x660f7e: /* movd */
7984 if (i386_record_modrm (&ir
))
7987 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7994 if (i386_record_lea_modrm (&ir
))
7999 case 0x0f7f: /* movq */
8000 if (i386_record_modrm (&ir
))
8004 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.rm
))
8006 record_full_arch_list_add_reg (ir
.regcache
,
8007 I387_MM0_REGNUM (tdep
) + ir
.rm
);
8012 if (i386_record_lea_modrm (&ir
))
8017 case 0xf30fb8: /* popcnt */
8018 if (i386_record_modrm (&ir
))
8020 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
8021 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
8024 case 0x660fd6: /* movq */
8025 if (i386_record_modrm (&ir
))
8030 if (!i386_xmm_regnum_p (gdbarch
,
8031 I387_XMM0_REGNUM (tdep
) + ir
.rm
))
8033 record_full_arch_list_add_reg (ir
.regcache
,
8034 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
8039 if (i386_record_lea_modrm (&ir
))
8044 case 0x660f3817: /* ptest */
8045 case 0x0f2e: /* ucomiss */
8046 case 0x660f2e: /* ucomisd */
8047 case 0x0f2f: /* comiss */
8048 case 0x660f2f: /* comisd */
8049 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
8052 case 0x0ff7: /* maskmovq */
8053 regcache_raw_read_unsigned (ir
.regcache
,
8054 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
8056 if (record_full_arch_list_add_mem (addr
, 64))
8060 case 0x660ff7: /* maskmovdqu */
8061 regcache_raw_read_unsigned (ir
.regcache
,
8062 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
8064 if (record_full_arch_list_add_mem (addr
, 128))
8079 /* In the future, maybe still need to deal with need_dasm. */
8080 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REIP_REGNUM
);
8081 if (record_full_arch_list_add_end ())
8087 printf_unfiltered (_("Process record does not support instruction 0x%02x "
8088 "at address %s.\n"),
8089 (unsigned int) (opcode
),
8090 paddress (gdbarch
, ir
.orig_addr
));
8094 static const int i386_record_regmap
[] =
8096 I386_EAX_REGNUM
, I386_ECX_REGNUM
, I386_EDX_REGNUM
, I386_EBX_REGNUM
,
8097 I386_ESP_REGNUM
, I386_EBP_REGNUM
, I386_ESI_REGNUM
, I386_EDI_REGNUM
,
8098 0, 0, 0, 0, 0, 0, 0, 0,
8099 I386_EIP_REGNUM
, I386_EFLAGS_REGNUM
, I386_CS_REGNUM
, I386_SS_REGNUM
,
8100 I386_DS_REGNUM
, I386_ES_REGNUM
, I386_FS_REGNUM
, I386_GS_REGNUM
8103 /* Check that the given address appears suitable for a fast
8104 tracepoint, which on x86-64 means that we need an instruction of at
8105 least 5 bytes, so that we can overwrite it with a 4-byte-offset
8106 jump and not have to worry about program jumps to an address in the
8107 middle of the tracepoint jump. On x86, it may be possible to use
8108 4-byte jumps with a 2-byte offset to a trampoline located in the
8109 bottom 64 KiB of memory. Returns 1 if OK, and writes a size
8110 of instruction to replace, and 0 if not, plus an explanatory
8114 i386_fast_tracepoint_valid_at (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
8119 /* Ask the target for the minimum instruction length supported. */
8120 jumplen
= target_get_min_fast_tracepoint_insn_len ();
8124 /* If the target does not support the get_min_fast_tracepoint_insn_len
8125 operation, assume that fast tracepoints will always be implemented
8126 using 4-byte relative jumps on both x86 and x86-64. */
8129 else if (jumplen
== 0)
8131 /* If the target does support get_min_fast_tracepoint_insn_len but
8132 returns zero, then the IPA has not loaded yet. In this case,
8133 we optimistically assume that truncated 2-byte relative jumps
8134 will be available on x86, and compensate later if this assumption
8135 turns out to be incorrect. On x86-64 architectures, 4-byte relative
8136 jumps will always be used. */
8137 jumplen
= (register_size (gdbarch
, 0) == 8) ? 5 : 4;
8140 /* Check for fit. */
8141 len
= gdb_insn_length (gdbarch
, addr
);
8145 /* Return a bit of target-specific detail to add to the caller's
8146 generic failure message. */
8148 *msg
= string_printf (_("; instruction is only %d bytes long, "
8149 "need at least %d bytes for the jump"),
8161 /* Return a floating-point format for a floating-point variable of
8162 length LEN in bits. If non-NULL, NAME is the name of its type.
8163 If no suitable type is found, return NULL. */
8165 static const struct floatformat
**
8166 i386_floatformat_for_type (struct gdbarch
*gdbarch
,
8167 const char *name
, int len
)
8169 if (len
== 128 && name
)
8170 if (strcmp (name
, "__float128") == 0
8171 || strcmp (name
, "_Float128") == 0
8172 || strcmp (name
, "complex _Float128") == 0
8173 || strcmp (name
, "complex(kind=16)") == 0
8174 || strcmp (name
, "complex*32") == 0
8175 || strcmp (name
, "COMPLEX*32") == 0
8176 || strcmp (name
, "quad complex") == 0
8177 || strcmp (name
, "real(kind=16)") == 0
8178 || strcmp (name
, "real*16") == 0
8179 || strcmp (name
, "REAL*16") == 0)
8180 return floatformats_ia64_quad
;
8182 return default_floatformat_for_type (gdbarch
, name
, len
);
8186 i386_validate_tdesc_p (struct gdbarch_tdep
*tdep
,
8187 struct tdesc_arch_data
*tdesc_data
)
8189 const struct target_desc
*tdesc
= tdep
->tdesc
;
8190 const struct tdesc_feature
*feature_core
;
8192 const struct tdesc_feature
*feature_sse
, *feature_avx
, *feature_mpx
,
8193 *feature_avx512
, *feature_pkeys
, *feature_segments
;
8194 int i
, num_regs
, valid_p
;
8196 if (! tdesc_has_registers (tdesc
))
8199 /* Get core registers. */
8200 feature_core
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.core");
8201 if (feature_core
== NULL
)
8204 /* Get SSE registers. */
8205 feature_sse
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.sse");
8207 /* Try AVX registers. */
8208 feature_avx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx");
8210 /* Try MPX registers. */
8211 feature_mpx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx");
8213 /* Try AVX512 registers. */
8214 feature_avx512
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx512");
8216 /* Try segment base registers. */
8217 feature_segments
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.segments");
8220 feature_pkeys
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.pkeys");
8224 /* The XCR0 bits. */
8227 /* AVX512 register description requires AVX register description. */
8231 tdep
->xcr0
= X86_XSTATE_AVX_AVX512_MASK
;
8233 /* It may have been set by OSABI initialization function. */
8234 if (tdep
->k0_regnum
< 0)
8236 tdep
->k_register_names
= i386_k_names
;
8237 tdep
->k0_regnum
= I386_K0_REGNUM
;
8240 for (i
= 0; i
< I387_NUM_K_REGS
; i
++)
8241 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8242 tdep
->k0_regnum
+ i
,
8245 if (tdep
->num_zmm_regs
== 0)
8247 tdep
->zmmh_register_names
= i386_zmmh_names
;
8248 tdep
->num_zmm_regs
= 8;
8249 tdep
->zmm0h_regnum
= I386_ZMM0H_REGNUM
;
8252 for (i
= 0; i
< tdep
->num_zmm_regs
; i
++)
8253 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8254 tdep
->zmm0h_regnum
+ i
,
8255 tdep
->zmmh_register_names
[i
]);
8257 for (i
= 0; i
< tdep
->num_xmm_avx512_regs
; i
++)
8258 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8259 tdep
->xmm16_regnum
+ i
,
8260 tdep
->xmm_avx512_register_names
[i
]);
8262 for (i
= 0; i
< tdep
->num_ymm_avx512_regs
; i
++)
8263 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8264 tdep
->ymm16h_regnum
+ i
,
8265 tdep
->ymm16h_register_names
[i
]);
8269 /* AVX register description requires SSE register description. */
8273 if (!feature_avx512
)
8274 tdep
->xcr0
= X86_XSTATE_AVX_MASK
;
8276 /* It may have been set by OSABI initialization function. */
8277 if (tdep
->num_ymm_regs
== 0)
8279 tdep
->ymmh_register_names
= i386_ymmh_names
;
8280 tdep
->num_ymm_regs
= 8;
8281 tdep
->ymm0h_regnum
= I386_YMM0H_REGNUM
;
8284 for (i
= 0; i
< tdep
->num_ymm_regs
; i
++)
8285 valid_p
&= tdesc_numbered_register (feature_avx
, tdesc_data
,
8286 tdep
->ymm0h_regnum
+ i
,
8287 tdep
->ymmh_register_names
[i
]);
8289 else if (feature_sse
)
8290 tdep
->xcr0
= X86_XSTATE_SSE_MASK
;
8293 tdep
->xcr0
= X86_XSTATE_X87_MASK
;
8294 tdep
->num_xmm_regs
= 0;
8297 num_regs
= tdep
->num_core_regs
;
8298 for (i
= 0; i
< num_regs
; i
++)
8299 valid_p
&= tdesc_numbered_register (feature_core
, tdesc_data
, i
,
8300 tdep
->register_names
[i
]);
8304 /* Need to include %mxcsr, so add one. */
8305 num_regs
+= tdep
->num_xmm_regs
+ 1;
8306 for (; i
< num_regs
; i
++)
8307 valid_p
&= tdesc_numbered_register (feature_sse
, tdesc_data
, i
,
8308 tdep
->register_names
[i
]);
8313 tdep
->xcr0
|= X86_XSTATE_MPX_MASK
;
8315 if (tdep
->bnd0r_regnum
< 0)
8317 tdep
->mpx_register_names
= i386_mpx_names
;
8318 tdep
->bnd0r_regnum
= I386_BND0R_REGNUM
;
8319 tdep
->bndcfgu_regnum
= I386_BNDCFGU_REGNUM
;
8322 for (i
= 0; i
< I387_NUM_MPX_REGS
; i
++)
8323 valid_p
&= tdesc_numbered_register (feature_mpx
, tdesc_data
,
8324 I387_BND0R_REGNUM (tdep
) + i
,
8325 tdep
->mpx_register_names
[i
]);
8328 if (feature_segments
)
8330 if (tdep
->fsbase_regnum
< 0)
8331 tdep
->fsbase_regnum
= I386_FSBASE_REGNUM
;
8332 valid_p
&= tdesc_numbered_register (feature_segments
, tdesc_data
,
8333 tdep
->fsbase_regnum
, "fs_base");
8334 valid_p
&= tdesc_numbered_register (feature_segments
, tdesc_data
,
8335 tdep
->fsbase_regnum
+ 1, "gs_base");
8340 tdep
->xcr0
|= X86_XSTATE_PKRU
;
8341 if (tdep
->pkru_regnum
< 0)
8343 tdep
->pkeys_register_names
= i386_pkeys_names
;
8344 tdep
->pkru_regnum
= I386_PKRU_REGNUM
;
8345 tdep
->num_pkeys_regs
= 1;
8348 for (i
= 0; i
< I387_NUM_PKEYS_REGS
; i
++)
8349 valid_p
&= tdesc_numbered_register (feature_pkeys
, tdesc_data
,
8350 I387_PKRU_REGNUM (tdep
) + i
,
8351 tdep
->pkeys_register_names
[i
]);
8359 /* Implement the type_align gdbarch function. */
8362 i386_type_align (struct gdbarch
*gdbarch
, struct type
*type
)
8364 type
= check_typedef (type
);
8366 if (gdbarch_ptr_bit (gdbarch
) == 32)
8368 if ((type
->code () == TYPE_CODE_INT
8369 || type
->code () == TYPE_CODE_FLT
)
8370 && TYPE_LENGTH (type
) > 4)
8373 /* Handle x86's funny long double. */
8374 if (type
->code () == TYPE_CODE_FLT
8375 && gdbarch_long_double_bit (gdbarch
) == TYPE_LENGTH (type
) * 8)
8383 /* Note: This is called for both i386 and amd64. */
8385 static struct gdbarch
*
8386 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
8388 struct gdbarch_tdep
*tdep
;
8389 struct gdbarch
*gdbarch
;
8390 const struct target_desc
*tdesc
;
8396 /* If there is already a candidate, use it. */
8397 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
8399 return arches
->gdbarch
;
8401 /* Allocate space for the new architecture. Assume i386 for now. */
8402 tdep
= XCNEW (struct gdbarch_tdep
);
8403 gdbarch
= gdbarch_alloc (&info
, tdep
);
8405 /* General-purpose registers. */
8406 tdep
->gregset_reg_offset
= NULL
;
8407 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
8408 tdep
->sizeof_gregset
= 0;
8410 /* Floating-point registers. */
8411 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
8412 tdep
->fpregset
= &i386_fpregset
;
8414 /* The default settings include the FPU registers, the MMX registers
8415 and the SSE registers. This can be overridden for a specific ABI
8416 by adjusting the members `st0_regnum', `mm0_regnum' and
8417 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
8418 will show up in the output of "info all-registers". */
8420 tdep
->st0_regnum
= I386_ST0_REGNUM
;
8422 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
8423 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
8425 tdep
->jb_pc_offset
= -1;
8426 tdep
->struct_return
= pcc_struct_return
;
8427 tdep
->sigtramp_start
= 0;
8428 tdep
->sigtramp_end
= 0;
8429 tdep
->sigtramp_p
= i386_sigtramp_p
;
8430 tdep
->sigcontext_addr
= NULL
;
8431 tdep
->sc_reg_offset
= NULL
;
8432 tdep
->sc_pc_offset
= -1;
8433 tdep
->sc_sp_offset
= -1;
8435 tdep
->xsave_xcr0_offset
= -1;
8437 tdep
->record_regmap
= i386_record_regmap
;
8439 set_gdbarch_type_align (gdbarch
, i386_type_align
);
8441 /* The format used for `long double' on almost all i386 targets is
8442 the i387 extended floating-point format. In fact, of all targets
8443 in the GCC 2.95 tree, only OSF/1 does it different, and insists
8444 on having a `long double' that's not `long' at all. */
8445 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
8447 /* Although the i387 extended floating-point has only 80 significant
8448 bits, a `long double' actually takes up 96, probably to enforce
8450 set_gdbarch_long_double_bit (gdbarch
, 96);
8452 /* Support of bfloat16 format. */
8453 set_gdbarch_bfloat16_format (gdbarch
, floatformats_bfloat16
);
8455 /* Support for floating-point data type variants. */
8456 set_gdbarch_floatformat_for_type (gdbarch
, i386_floatformat_for_type
);
8458 /* Register numbers of various important registers. */
8459 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
8460 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
8461 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
8462 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
8464 /* NOTE: kettenis/20040418: GCC does have two possible register
8465 numbering schemes on the i386: dbx and SVR4. These schemes
8466 differ in how they number %ebp, %esp, %eflags, and the
8467 floating-point registers, and are implemented by the arrays
8468 dbx_register_map[] and svr4_dbx_register_map in
8469 gcc/config/i386.c. GCC also defines a third numbering scheme in
8470 gcc/config/i386.c, which it designates as the "default" register
8471 map used in 64bit mode. This last register numbering scheme is
8472 implemented in dbx64_register_map, and is used for AMD64; see
8475 Currently, each GCC i386 target always uses the same register
8476 numbering scheme across all its supported debugging formats
8477 i.e. SDB (COFF), stabs and DWARF 2. This is because
8478 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
8479 DBX_REGISTER_NUMBER macro which is defined by each target's
8480 respective config header in a manner independent of the requested
8481 output debugging format.
8483 This does not match the arrangement below, which presumes that
8484 the SDB and stabs numbering schemes differ from the DWARF and
8485 DWARF 2 ones. The reason for this arrangement is that it is
8486 likely to get the numbering scheme for the target's
8487 default/native debug format right. For targets where GCC is the
8488 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
8489 targets where the native toolchain uses a different numbering
8490 scheme for a particular debug format (stabs-in-ELF on Solaris)
8491 the defaults below will have to be overridden, like
8492 i386_elf_init_abi() does. */
8494 /* Use the dbx register numbering scheme for stabs and COFF. */
8495 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
8496 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
8498 /* Use the SVR4 register numbering scheme for DWARF 2. */
8499 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_dwarf_reg_to_regnum
);
8501 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
8502 be in use on any of the supported i386 targets. */
8504 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
8506 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
8508 /* Call dummy code. */
8509 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
8510 set_gdbarch_push_dummy_code (gdbarch
, i386_push_dummy_code
);
8511 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
8512 set_gdbarch_frame_align (gdbarch
, i386_frame_align
);
8514 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
8515 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
8516 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
8518 set_gdbarch_return_value (gdbarch
, i386_return_value
);
8520 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
8522 /* Stack grows downward. */
8523 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
8525 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, i386_breakpoint::kind_from_pc
);
8526 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, i386_breakpoint::bp_from_kind
);
8528 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
8529 set_gdbarch_max_insn_length (gdbarch
, I386_MAX_INSN_LEN
);
8531 set_gdbarch_frame_args_skip (gdbarch
, 8);
8533 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
8535 set_gdbarch_dummy_id (gdbarch
, i386_dummy_id
);
8537 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
8539 /* Add the i386 register groups. */
8540 i386_add_reggroups (gdbarch
);
8541 tdep
->register_reggroup_p
= i386_register_reggroup_p
;
8543 /* Helper for function argument information. */
8544 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
8546 /* Hook the function epilogue frame unwinder. This unwinder is
8547 appended to the list first, so that it supercedes the DWARF
8548 unwinder in function epilogues (where the DWARF unwinder
8549 currently fails). */
8550 frame_unwind_append_unwinder (gdbarch
, &i386_epilogue_frame_unwind
);
8552 /* Hook in the DWARF CFI frame unwinder. This unwinder is appended
8553 to the list before the prologue-based unwinders, so that DWARF
8554 CFI info will be used if it is available. */
8555 dwarf2_append_unwinders (gdbarch
);
8557 frame_base_set_default (gdbarch
, &i386_frame_base
);
8559 /* Pseudo registers may be changed by amd64_init_abi. */
8560 set_gdbarch_pseudo_register_read_value (gdbarch
,
8561 i386_pseudo_register_read_value
);
8562 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
8563 set_gdbarch_ax_pseudo_register_collect (gdbarch
,
8564 i386_ax_pseudo_register_collect
);
8566 set_tdesc_pseudo_register_type (gdbarch
, i386_pseudo_register_type
);
8567 set_tdesc_pseudo_register_name (gdbarch
, i386_pseudo_register_name
);
8569 /* Override the normal target description method to make the AVX
8570 upper halves anonymous. */
8571 set_gdbarch_register_name (gdbarch
, i386_register_name
);
8573 /* Even though the default ABI only includes general-purpose registers,
8574 floating-point registers and the SSE registers, we have to leave a
8575 gap for the upper AVX, MPX and AVX512 registers. */
8576 set_gdbarch_num_regs (gdbarch
, I386_NUM_REGS
);
8578 set_gdbarch_gnu_triplet_regexp (gdbarch
, i386_gnu_triplet_regexp
);
8580 /* Get the x86 target description from INFO. */
8581 tdesc
= info
.target_desc
;
8582 if (! tdesc_has_registers (tdesc
))
8583 tdesc
= i386_target_description (X86_XSTATE_SSE_MASK
, false);
8584 tdep
->tdesc
= tdesc
;
8586 tdep
->num_core_regs
= I386_NUM_GREGS
+ I387_NUM_REGS
;
8587 tdep
->register_names
= i386_register_names
;
8589 /* No upper YMM registers. */
8590 tdep
->ymmh_register_names
= NULL
;
8591 tdep
->ymm0h_regnum
= -1;
8593 /* No upper ZMM registers. */
8594 tdep
->zmmh_register_names
= NULL
;
8595 tdep
->zmm0h_regnum
= -1;
8597 /* No high XMM registers. */
8598 tdep
->xmm_avx512_register_names
= NULL
;
8599 tdep
->xmm16_regnum
= -1;
8601 /* No upper YMM16-31 registers. */
8602 tdep
->ymm16h_register_names
= NULL
;
8603 tdep
->ymm16h_regnum
= -1;
8605 tdep
->num_byte_regs
= 8;
8606 tdep
->num_word_regs
= 8;
8607 tdep
->num_dword_regs
= 0;
8608 tdep
->num_mmx_regs
= 8;
8609 tdep
->num_ymm_regs
= 0;
8611 /* No MPX registers. */
8612 tdep
->bnd0r_regnum
= -1;
8613 tdep
->bndcfgu_regnum
= -1;
8615 /* No AVX512 registers. */
8616 tdep
->k0_regnum
= -1;
8617 tdep
->num_zmm_regs
= 0;
8618 tdep
->num_ymm_avx512_regs
= 0;
8619 tdep
->num_xmm_avx512_regs
= 0;
8621 /* No PKEYS registers */
8622 tdep
->pkru_regnum
= -1;
8623 tdep
->num_pkeys_regs
= 0;
8625 /* No segment base registers. */
8626 tdep
->fsbase_regnum
= -1;
8628 tdesc_arch_data_up tdesc_data
= tdesc_data_alloc ();
8630 set_gdbarch_relocate_instruction (gdbarch
, i386_relocate_instruction
);
8632 set_gdbarch_gen_return_address (gdbarch
, i386_gen_return_address
);
8634 set_gdbarch_insn_is_call (gdbarch
, i386_insn_is_call
);
8635 set_gdbarch_insn_is_ret (gdbarch
, i386_insn_is_ret
);
8636 set_gdbarch_insn_is_jump (gdbarch
, i386_insn_is_jump
);
8638 /* Hook in ABI-specific overrides, if they have been registered.
8639 Note: If INFO specifies a 64 bit arch, this is where we turn
8640 a 32-bit i386 into a 64-bit amd64. */
8641 info
.tdesc_data
= tdesc_data
.get ();
8642 gdbarch_init_osabi (info
, gdbarch
);
8644 if (!i386_validate_tdesc_p (tdep
, tdesc_data
.get ()))
8647 gdbarch_free (gdbarch
);
8651 num_bnd_cooked
= (tdep
->bnd0r_regnum
> 0 ? I387_NUM_BND_REGS
: 0);
8653 /* Wire in pseudo registers. Number of pseudo registers may be
8655 set_gdbarch_num_pseudo_regs (gdbarch
, (tdep
->num_byte_regs
8656 + tdep
->num_word_regs
8657 + tdep
->num_dword_regs
8658 + tdep
->num_mmx_regs
8659 + tdep
->num_ymm_regs
8661 + tdep
->num_ymm_avx512_regs
8662 + tdep
->num_zmm_regs
));
8664 /* Target description may be changed. */
8665 tdesc
= tdep
->tdesc
;
8667 tdesc_use_registers (gdbarch
, tdesc
, std::move (tdesc_data
));
8669 /* Override gdbarch_register_reggroup_p set in tdesc_use_registers. */
8670 set_gdbarch_register_reggroup_p (gdbarch
, tdep
->register_reggroup_p
);
8672 /* Make %al the first pseudo-register. */
8673 tdep
->al_regnum
= gdbarch_num_regs (gdbarch
);
8674 tdep
->ax_regnum
= tdep
->al_regnum
+ tdep
->num_byte_regs
;
8676 ymm0_regnum
= tdep
->ax_regnum
+ tdep
->num_word_regs
;
8677 if (tdep
->num_dword_regs
)
8679 /* Support dword pseudo-register if it hasn't been disabled. */
8680 tdep
->eax_regnum
= ymm0_regnum
;
8681 ymm0_regnum
+= tdep
->num_dword_regs
;
8684 tdep
->eax_regnum
= -1;
8686 mm0_regnum
= ymm0_regnum
;
8687 if (tdep
->num_ymm_regs
)
8689 /* Support YMM pseudo-register if it is available. */
8690 tdep
->ymm0_regnum
= ymm0_regnum
;
8691 mm0_regnum
+= tdep
->num_ymm_regs
;
8694 tdep
->ymm0_regnum
= -1;
8696 if (tdep
->num_ymm_avx512_regs
)
8698 /* Support YMM16-31 pseudo registers if available. */
8699 tdep
->ymm16_regnum
= mm0_regnum
;
8700 mm0_regnum
+= tdep
->num_ymm_avx512_regs
;
8703 tdep
->ymm16_regnum
= -1;
8705 if (tdep
->num_zmm_regs
)
8707 /* Support ZMM pseudo-register if it is available. */
8708 tdep
->zmm0_regnum
= mm0_regnum
;
8709 mm0_regnum
+= tdep
->num_zmm_regs
;
8712 tdep
->zmm0_regnum
= -1;
8714 bnd0_regnum
= mm0_regnum
;
8715 if (tdep
->num_mmx_regs
!= 0)
8717 /* Support MMX pseudo-register if MMX hasn't been disabled. */
8718 tdep
->mm0_regnum
= mm0_regnum
;
8719 bnd0_regnum
+= tdep
->num_mmx_regs
;
8722 tdep
->mm0_regnum
= -1;
8724 if (tdep
->bnd0r_regnum
> 0)
8725 tdep
->bnd0_regnum
= bnd0_regnum
;
8727 tdep
-> bnd0_regnum
= -1;
8729 /* Hook in the legacy prologue-based unwinders last (fallback). */
8730 frame_unwind_append_unwinder (gdbarch
, &i386_stack_tramp_frame_unwind
);
8731 frame_unwind_append_unwinder (gdbarch
, &i386_sigtramp_frame_unwind
);
8732 frame_unwind_append_unwinder (gdbarch
, &i386_frame_unwind
);
8734 /* If we have a register mapping, enable the generic core file
8735 support, unless it has already been enabled. */
8736 if (tdep
->gregset_reg_offset
8737 && !gdbarch_iterate_over_regset_sections_p (gdbarch
))
8738 set_gdbarch_iterate_over_regset_sections
8739 (gdbarch
, i386_iterate_over_regset_sections
);
8741 set_gdbarch_fast_tracepoint_valid_at (gdbarch
,
8742 i386_fast_tracepoint_valid_at
);
8749 /* Return the target description for a specified XSAVE feature mask. */
8751 const struct target_desc
*
8752 i386_target_description (uint64_t xcr0
, bool segments
)
8754 static target_desc
*i386_tdescs \
8755 [2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
8756 target_desc
**tdesc
;
8758 tdesc
= &i386_tdescs
[(xcr0
& X86_XSTATE_SSE
) ? 1 : 0]
8759 [(xcr0
& X86_XSTATE_AVX
) ? 1 : 0]
8760 [(xcr0
& X86_XSTATE_MPX
) ? 1 : 0]
8761 [(xcr0
& X86_XSTATE_AVX512
) ? 1 : 0]
8762 [(xcr0
& X86_XSTATE_PKRU
) ? 1 : 0]
8766 *tdesc
= i386_create_target_description (xcr0
, false, segments
);
8771 #define MPX_BASE_MASK (~(ULONGEST) 0xfff)
8773 /* Find the bound directory base address. */
8775 static unsigned long
8776 i386_mpx_bd_base (void)
8778 struct regcache
*rcache
;
8779 struct gdbarch_tdep
*tdep
;
8781 enum register_status regstatus
;
8783 rcache
= get_current_regcache ();
8784 tdep
= gdbarch_tdep (rcache
->arch ());
8786 regstatus
= regcache_raw_read_unsigned (rcache
, tdep
->bndcfgu_regnum
, &ret
);
8788 if (regstatus
!= REG_VALID
)
8789 error (_("BNDCFGU register invalid, read status %d."), regstatus
);
8791 return ret
& MPX_BASE_MASK
;
8795 i386_mpx_enabled (void)
8797 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_current_arch ());
8798 const struct target_desc
*tdesc
= tdep
->tdesc
;
8800 return (tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx") != NULL
);
8803 #define MPX_BD_MASK 0xfffffff00000ULL /* select bits [47:20] */
8804 #define MPX_BT_MASK 0x0000000ffff8 /* select bits [19:3] */
8805 #define MPX_BD_MASK_32 0xfffff000 /* select bits [31:12] */
8806 #define MPX_BT_MASK_32 0x00000ffc /* select bits [11:2] */
8808 /* Find the bound table entry given the pointer location and the base
8809 address of the table. */
8812 i386_mpx_get_bt_entry (CORE_ADDR ptr
, CORE_ADDR bd_base
)
8816 CORE_ADDR mpx_bd_mask
, bd_ptr_r_shift
, bd_ptr_l_shift
;
8817 CORE_ADDR bt_mask
, bt_select_r_shift
, bt_select_l_shift
;
8818 CORE_ADDR bd_entry_addr
;
8821 struct gdbarch
*gdbarch
= get_current_arch ();
8822 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8825 if (gdbarch_ptr_bit (gdbarch
) == 64)
8827 mpx_bd_mask
= (CORE_ADDR
) MPX_BD_MASK
;
8828 bd_ptr_r_shift
= 20;
8830 bt_select_r_shift
= 3;
8831 bt_select_l_shift
= 5;
8832 bt_mask
= (CORE_ADDR
) MPX_BT_MASK
;
8834 if ( sizeof (CORE_ADDR
) == 4)
8835 error (_("bound table examination not supported\
8836 for 64-bit process with 32-bit GDB"));
8840 mpx_bd_mask
= MPX_BD_MASK_32
;
8841 bd_ptr_r_shift
= 12;
8843 bt_select_r_shift
= 2;
8844 bt_select_l_shift
= 4;
8845 bt_mask
= MPX_BT_MASK_32
;
8848 offset1
= ((ptr
& mpx_bd_mask
) >> bd_ptr_r_shift
) << bd_ptr_l_shift
;
8849 bd_entry_addr
= bd_base
+ offset1
;
8850 bd_entry
= read_memory_typed_address (bd_entry_addr
, data_ptr_type
);
8852 if ((bd_entry
& 0x1) == 0)
8853 error (_("Invalid bounds directory entry at %s."),
8854 paddress (get_current_arch (), bd_entry_addr
));
8856 /* Clearing status bit. */
8858 bt_addr
= bd_entry
& ~bt_select_r_shift
;
8859 offset2
= ((ptr
& bt_mask
) >> bt_select_r_shift
) << bt_select_l_shift
;
8861 return bt_addr
+ offset2
;
8864 /* Print routine for the mpx bounds. */
8867 i386_mpx_print_bounds (const CORE_ADDR bt_entry
[4])
8869 struct ui_out
*uiout
= current_uiout
;
8871 struct gdbarch
*gdbarch
= get_current_arch ();
8872 CORE_ADDR onecompl
= ~((CORE_ADDR
) 0);
8873 int bounds_in_map
= ((~bt_entry
[1] == 0 && bt_entry
[0] == onecompl
) ? 1 : 0);
8875 if (bounds_in_map
== 1)
8877 uiout
->text ("Null bounds on map:");
8878 uiout
->text (" pointer value = ");
8879 uiout
->field_core_addr ("pointer-value", gdbarch
, bt_entry
[2]);
8885 uiout
->text ("{lbound = ");
8886 uiout
->field_core_addr ("lower-bound", gdbarch
, bt_entry
[0]);
8887 uiout
->text (", ubound = ");
8889 /* The upper bound is stored in 1's complement. */
8890 uiout
->field_core_addr ("upper-bound", gdbarch
, ~bt_entry
[1]);
8891 uiout
->text ("}: pointer value = ");
8892 uiout
->field_core_addr ("pointer-value", gdbarch
, bt_entry
[2]);
8894 if (gdbarch_ptr_bit (gdbarch
) == 64)
8895 size
= ( (~(int64_t) bt_entry
[1]) - (int64_t) bt_entry
[0]);
8897 size
= ( ~((int32_t) bt_entry
[1]) - (int32_t) bt_entry
[0]);
8899 /* In case the bounds are 0x0 and 0xffff... the difference will be -1.
8900 -1 represents in this sense full memory access, and there is no need
8903 size
= (size
> -1 ? size
+ 1 : size
);
8904 uiout
->text (", size = ");
8905 uiout
->field_string ("size", plongest (size
));
8907 uiout
->text (", metadata = ");
8908 uiout
->field_core_addr ("metadata", gdbarch
, bt_entry
[3]);
8913 /* Implement the command "show mpx bound". */
8916 i386_mpx_info_bounds (const char *args
, int from_tty
)
8918 CORE_ADDR bd_base
= 0;
8920 CORE_ADDR bt_entry_addr
= 0;
8921 CORE_ADDR bt_entry
[4];
8923 struct gdbarch
*gdbarch
= get_current_arch ();
8924 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8926 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_i386
8927 || !i386_mpx_enabled ())
8929 printf_unfiltered (_("Intel Memory Protection Extensions not "
8930 "supported on this target.\n"));
8936 printf_unfiltered (_("Address of pointer variable expected.\n"));
8940 addr
= parse_and_eval_address (args
);
8942 bd_base
= i386_mpx_bd_base ();
8943 bt_entry_addr
= i386_mpx_get_bt_entry (addr
, bd_base
);
8945 memset (bt_entry
, 0, sizeof (bt_entry
));
8947 for (i
= 0; i
< 4; i
++)
8948 bt_entry
[i
] = read_memory_typed_address (bt_entry_addr
8949 + i
* TYPE_LENGTH (data_ptr_type
),
8952 i386_mpx_print_bounds (bt_entry
);
8955 /* Implement the command "set mpx bound". */
8958 i386_mpx_set_bounds (const char *args
, int from_tty
)
8960 CORE_ADDR bd_base
= 0;
8961 CORE_ADDR addr
, lower
, upper
;
8962 CORE_ADDR bt_entry_addr
= 0;
8963 CORE_ADDR bt_entry
[2];
8964 const char *input
= args
;
8966 struct gdbarch
*gdbarch
= get_current_arch ();
8967 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
8968 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8970 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_i386
8971 || !i386_mpx_enabled ())
8972 error (_("Intel Memory Protection Extensions not supported\
8976 error (_("Pointer value expected."));
8978 addr
= value_as_address (parse_to_comma_and_eval (&input
));
8980 if (input
[0] == ',')
8982 if (input
[0] == '\0')
8983 error (_("wrong number of arguments: missing lower and upper bound."));
8984 lower
= value_as_address (parse_to_comma_and_eval (&input
));
8986 if (input
[0] == ',')
8988 if (input
[0] == '\0')
8989 error (_("Wrong number of arguments; Missing upper bound."));
8990 upper
= value_as_address (parse_to_comma_and_eval (&input
));
8992 bd_base
= i386_mpx_bd_base ();
8993 bt_entry_addr
= i386_mpx_get_bt_entry (addr
, bd_base
);
8994 for (i
= 0; i
< 2; i
++)
8995 bt_entry
[i
] = read_memory_typed_address (bt_entry_addr
8996 + i
* TYPE_LENGTH (data_ptr_type
),
8998 bt_entry
[0] = (uint64_t) lower
;
8999 bt_entry
[1] = ~(uint64_t) upper
;
9001 for (i
= 0; i
< 2; i
++)
9002 write_memory_unsigned_integer (bt_entry_addr
9003 + i
* TYPE_LENGTH (data_ptr_type
),
9004 TYPE_LENGTH (data_ptr_type
), byte_order
,
9008 static struct cmd_list_element
*mpx_set_cmdlist
, *mpx_show_cmdlist
;
9010 void _initialize_i386_tdep ();
9012 _initialize_i386_tdep ()
9014 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
9016 /* Add the variable that controls the disassembly flavor. */
9017 add_setshow_enum_cmd ("disassembly-flavor", no_class
, valid_flavors
,
9018 &disassembly_flavor
, _("\
9019 Set the disassembly flavor."), _("\
9020 Show the disassembly flavor."), _("\
9021 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
9023 NULL
, /* FIXME: i18n: */
9024 &setlist
, &showlist
);
9026 /* Add the variable that controls the convention for returning
9028 add_setshow_enum_cmd ("struct-convention", no_class
, valid_conventions
,
9029 &struct_convention
, _("\
9030 Set the convention for returning small structs."), _("\
9031 Show the convention for returning small structs."), _("\
9032 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
9035 NULL
, /* FIXME: i18n: */
9036 &setlist
, &showlist
);
9038 /* Add "mpx" prefix for the set commands. */
9040 add_basic_prefix_cmd ("mpx", class_support
, _("\
9041 Set Intel Memory Protection Extensions specific variables."),
9043 0 /* allow-unknown */, &setlist
);
9045 /* Add "mpx" prefix for the show commands. */
9047 add_show_prefix_cmd ("mpx", class_support
, _("\
9048 Show Intel Memory Protection Extensions specific variables."),
9050 0 /* allow-unknown */, &showlist
);
9052 /* Add "bound" command for the show mpx commands list. */
9054 add_cmd ("bound", no_class
, i386_mpx_info_bounds
,
9055 "Show the memory bounds for a given array/pointer storage\
9056 in the bound table.",
9059 /* Add "bound" command for the set mpx commands list. */
9061 add_cmd ("bound", no_class
, i386_mpx_set_bounds
,
9062 "Set the memory bounds for a given array/pointer storage\
9063 in the bound table.",
9066 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
9067 i386_svr4_init_abi
);
9069 /* Initialize the i386-specific register groups. */
9070 i386_init_reggroups ();
9072 /* Tell remote stub that we support XML target description. */
9073 register_remote_support_xml ("i386");