1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #include "arch-utils.h"
26 #include "dummy-frame.h"
27 #include "dwarf2-frame.h"
29 #include "floatformat.h"
31 #include "frame-base.h"
32 #include "frame-unwind.h"
39 #include "reggroups.h"
46 #include "gdb_assert.h"
47 #include "gdb_string.h"
49 #include "i386-tdep.h"
50 #include "i387-tdep.h"
52 /* Names of the registers. The first 10 registers match the register
53 numbering scheme used by GCC for stabs and DWARF. */
55 static char *i386_register_names
[] =
57 "eax", "ecx", "edx", "ebx",
58 "esp", "ebp", "esi", "edi",
59 "eip", "eflags", "cs", "ss",
60 "ds", "es", "fs", "gs",
61 "st0", "st1", "st2", "st3",
62 "st4", "st5", "st6", "st7",
63 "fctrl", "fstat", "ftag", "fiseg",
64 "fioff", "foseg", "fooff", "fop",
65 "xmm0", "xmm1", "xmm2", "xmm3",
66 "xmm4", "xmm5", "xmm6", "xmm7",
70 static const int i386_num_register_names
=
71 (sizeof (i386_register_names
) / sizeof (*i386_register_names
));
75 static char *i386_mmx_names
[] =
77 "mm0", "mm1", "mm2", "mm3",
78 "mm4", "mm5", "mm6", "mm7"
81 static const int i386_num_mmx_regs
=
82 (sizeof (i386_mmx_names
) / sizeof (i386_mmx_names
[0]));
84 #define MM0_REGNUM NUM_REGS
87 i386_mmx_regnum_p (int regnum
)
89 return (regnum
>= MM0_REGNUM
90 && regnum
< MM0_REGNUM
+ i386_num_mmx_regs
);
96 i386_fp_regnum_p (int regnum
)
98 return (regnum
< NUM_REGS
99 && (FP0_REGNUM
&& FP0_REGNUM
<= regnum
&& regnum
< FPC_REGNUM
));
103 i386_fpc_regnum_p (int regnum
)
105 return (regnum
< NUM_REGS
106 && (FPC_REGNUM
<= regnum
&& regnum
< XMM0_REGNUM
));
112 i386_sse_regnum_p (int regnum
)
114 return (regnum
< NUM_REGS
115 && (XMM0_REGNUM
<= regnum
&& regnum
< MXCSR_REGNUM
));
119 i386_mxcsr_regnum_p (int regnum
)
121 return (regnum
< NUM_REGS
122 && regnum
== MXCSR_REGNUM
);
125 /* Return the name of register REG. */
128 i386_register_name (int reg
)
130 if (i386_mmx_regnum_p (reg
))
131 return i386_mmx_names
[reg
- MM0_REGNUM
];
133 if (reg
>= 0 && reg
< i386_num_register_names
)
134 return i386_register_names
[reg
];
139 /* Convert stabs register number REG to the appropriate register
140 number used by GDB. */
143 i386_stab_reg_to_regnum (int reg
)
145 /* This implements what GCC calls the "default" register map. */
146 if (reg
>= 0 && reg
<= 7)
148 /* General-purpose registers. */
151 else if (reg
>= 12 && reg
<= 19)
153 /* Floating-point registers. */
154 return reg
- 12 + FP0_REGNUM
;
156 else if (reg
>= 21 && reg
<= 28)
159 return reg
- 21 + XMM0_REGNUM
;
161 else if (reg
>= 29 && reg
<= 36)
164 return reg
- 29 + MM0_REGNUM
;
167 /* This will hopefully provoke a warning. */
168 return NUM_REGS
+ NUM_PSEUDO_REGS
;
171 /* Convert DWARF register number REG to the appropriate register
172 number used by GDB. */
175 i386_dwarf_reg_to_regnum (int reg
)
177 /* The DWARF register numbering includes %eip and %eflags, and
178 numbers the floating point registers differently. */
179 if (reg
>= 0 && reg
<= 9)
181 /* General-purpose registers. */
184 else if (reg
>= 11 && reg
<= 18)
186 /* Floating-point registers. */
187 return reg
- 11 + FP0_REGNUM
;
191 /* The SSE and MMX registers have identical numbers as in stabs. */
192 return i386_stab_reg_to_regnum (reg
);
195 /* This will hopefully provoke a warning. */
196 return NUM_REGS
+ NUM_PSEUDO_REGS
;
200 /* This is the variable that is set with "set disassembly-flavor", and
201 its legitimate values. */
202 static const char att_flavor
[] = "att";
203 static const char intel_flavor
[] = "intel";
204 static const char *valid_flavors
[] =
210 static const char *disassembly_flavor
= att_flavor
;
213 /* Use the program counter to determine the contents and size of a
214 breakpoint instruction. Return a pointer to a string of bytes that
215 encode a breakpoint instruction, store the length of the string in
216 *LEN and optionally adjust *PC to point to the correct memory
217 location for inserting the breakpoint.
219 On the i386 we have a single breakpoint that fits in a single byte
220 and can be inserted anywhere.
222 This function is 64-bit safe. */
224 static const unsigned char *
225 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
227 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
229 *len
= sizeof (break_insn
);
233 #ifdef I386_REGNO_TO_SYMMETRY
234 #error "The Sequent Symmetry is no longer supported."
237 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
238 and %esp "belong" to the calling function. Therefore these
239 registers should be saved if they're going to be modified. */
241 /* The maximum number of saved registers. This should include all
242 registers mentioned above, and %eip. */
243 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
245 struct i386_frame_cache
252 /* Saved registers. */
253 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
257 /* Stack space reserved for local variables. */
261 /* Allocate and initialize a frame cache. */
263 static struct i386_frame_cache
*
264 i386_alloc_frame_cache (void)
266 struct i386_frame_cache
*cache
;
269 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
273 cache
->sp_offset
= -4;
276 /* Saved registers. We initialize these to -1 since zero is a valid
277 offset (that's where %ebp is supposed to be stored). */
278 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
279 cache
->saved_regs
[i
] = -1;
281 cache
->pc_in_eax
= 0;
283 /* Frameless until proven otherwise. */
289 /* If the instruction at PC is a jump, return the address of its
290 target. Otherwise, return PC. */
293 i386_follow_jump (CORE_ADDR pc
)
299 op
= read_memory_unsigned_integer (pc
, 1);
303 op
= read_memory_unsigned_integer (pc
+ 1, 1);
309 /* Relative jump: if data16 == 0, disp32, else disp16. */
312 delta
= read_memory_integer (pc
+ 2, 2);
314 /* Include the size of the jmp instruction (including the
320 delta
= read_memory_integer (pc
+ 1, 4);
322 /* Include the size of the jmp instruction. */
327 /* Relative jump, disp8 (ignore data16). */
328 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
337 /* Check whether PC points at a prologue for a function returning a
338 structure or union. If so, it updates CACHE and returns the
339 address of the first instruction after the code sequence that
340 removes the "hidden" argument from the stack or CURRENT_PC,
341 whichever is smaller. Otherwise, return PC. */
344 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
345 struct i386_frame_cache
*cache
)
347 /* Functions that return a structure or union start with:
350 xchgl %eax, (%esp) 0x87 0x04 0x24
351 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
353 (the System V compiler puts out the second `xchg' instruction,
354 and the assembler doesn't try to optimize it, so the 'sib' form
355 gets generated). This sequence is used to get the address of the
356 return buffer for a function that returns a structure. */
357 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
358 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
359 unsigned char buf
[4];
362 if (current_pc
<= pc
)
365 op
= read_memory_unsigned_integer (pc
, 1);
367 if (op
!= 0x58) /* popl %eax */
370 read_memory (pc
+ 1, buf
, 4);
371 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
374 if (current_pc
== pc
)
376 cache
->sp_offset
+= 4;
380 if (current_pc
== pc
+ 1)
382 cache
->pc_in_eax
= 1;
386 if (buf
[1] == proto1
[1])
393 i386_skip_probe (CORE_ADDR pc
)
395 /* A function may start with
406 unsigned char buf
[8];
409 op
= read_memory_unsigned_integer (pc
, 1);
411 if (op
== 0x68 || op
== 0x6a)
415 /* Skip past the `pushl' instruction; it has either a one-byte or a
416 four-byte operand, depending on the opcode. */
422 /* Read the following 8 bytes, which should be `call _probe' (6
423 bytes) followed by `addl $4,%esp' (2 bytes). */
424 read_memory (pc
+ delta
, buf
, sizeof (buf
));
425 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
426 pc
+= delta
+ sizeof (buf
);
432 /* Check whether PC points at a code that sets up a new stack frame.
433 If so, it updates CACHE and returns the address of the first
434 instruction after the sequence that sets removes the "hidden"
435 argument from the stack or CURRENT_PC, whichever is smaller.
436 Otherwise, return PC. */
439 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
440 struct i386_frame_cache
*cache
)
445 if (current_pc
<= pc
)
448 op
= read_memory_unsigned_integer (pc
, 1);
450 if (op
== 0x55) /* pushl %ebp */
452 /* Take into account that we've executed the `pushl %ebp' that
453 starts this instruction sequence. */
454 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
455 cache
->sp_offset
+= 4;
457 /* If that's all, return now. */
458 if (current_pc
<= pc
+ 1)
461 op
= read_memory_unsigned_integer (pc
+ 1, 1);
463 /* Check for some special instructions that might be migrated
464 by GCC into the prologue. We check for
476 Make sure we only skip these instructions if we later see the
477 `movl %esp, %ebp' that actually sets up the frame. */
478 while (op
== 0x29 || op
== 0x31)
480 op
= read_memory_unsigned_integer (pc
+ skip
+ 2, 1);
483 case 0xdb: /* %ebx */
484 case 0xc9: /* %ecx */
485 case 0xd2: /* %edx */
492 op
= read_memory_unsigned_integer (pc
+ skip
+ 1, 1);
495 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
499 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xec)
503 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xe5)
510 /* OK, we actually have a frame. We just don't know how large
511 it is yet. Set its size to zero. We'll adjust it if
512 necessary. We also now commit to skipping the special
513 instructions mentioned before. */
517 /* If that's all, return now. */
518 if (current_pc
<= pc
+ 3)
521 /* Check for stack adjustment
525 NOTE: You can't subtract a 16 bit immediate from a 32 bit
526 reg, so we don't have to worry about a data16 prefix. */
527 op
= read_memory_unsigned_integer (pc
+ 3, 1);
530 /* `subl' with 8 bit immediate. */
531 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
532 /* Some instruction starting with 0x83 other than `subl'. */
535 /* `subl' with signed byte immediate (though it wouldn't make
536 sense to be negative). */
537 cache
->locals
= read_memory_integer (pc
+ 5, 1);
542 /* Maybe it is `subl' with a 32 bit immedediate. */
543 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
544 /* Some instruction starting with 0x81 other than `subl'. */
547 /* It is `subl' with a 32 bit immediate. */
548 cache
->locals
= read_memory_integer (pc
+ 5, 4);
553 /* Some instruction other than `subl'. */
557 else if (op
== 0xc8) /* enter $XXX */
559 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
566 /* Check whether PC points at code that saves registers on the stack.
567 If so, it updates CACHE and returns the address of the first
568 instruction after the register saves or CURRENT_PC, whichever is
569 smaller. Otherwise, return PC. */
572 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
573 struct i386_frame_cache
*cache
)
575 CORE_ADDR offset
= 0;
579 if (cache
->locals
> 0)
580 offset
-= cache
->locals
;
581 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
583 op
= read_memory_unsigned_integer (pc
, 1);
584 if (op
< 0x50 || op
> 0x57)
588 cache
->saved_regs
[op
- 0x50] = offset
;
589 cache
->sp_offset
+= 4;
596 /* Do a full analysis of the prologue at PC and update CACHE
597 accordingly. Bail out early if CURRENT_PC is reached. Return the
598 address where the analysis stopped.
600 We handle these cases:
602 The startup sequence can be at the start of the function, or the
603 function can start with a branch to startup code at the end.
605 %ebp can be set up with either the 'enter' instruction, or "pushl
606 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
607 once used in the System V compiler).
609 Local space is allocated just below the saved %ebp by either the
610 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
611 bit unsigned argument for space to allocate, and the 'addl'
612 instruction could have either a signed byte, or 32 bit immediate.
614 Next, the registers used by this function are pushed. With the
615 System V compiler they will always be in the order: %edi, %esi,
616 %ebx (and sometimes a harmless bug causes it to also save but not
617 restore %eax); however, the code below is willing to see the pushes
618 in any order, and will handle up to 8 of them.
620 If the setup sequence is at the end of the function, then the next
621 instruction will be a branch back to the start. */
624 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
625 struct i386_frame_cache
*cache
)
627 pc
= i386_follow_jump (pc
);
628 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
629 pc
= i386_skip_probe (pc
);
630 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
631 return i386_analyze_register_saves (pc
, current_pc
, cache
);
634 /* Return PC of first real instruction. */
637 i386_skip_prologue (CORE_ADDR start_pc
)
639 static unsigned char pic_pat
[6] =
641 0xe8, 0, 0, 0, 0, /* call 0x0 */
642 0x5b, /* popl %ebx */
644 struct i386_frame_cache cache
;
650 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
651 if (cache
.locals
< 0)
654 /* Found valid frame setup. */
656 /* The native cc on SVR4 in -K PIC mode inserts the following code
657 to get the address of the global offset table (GOT) into register
662 movl %ebx,x(%ebp) (optional)
665 This code is with the rest of the prologue (at the end of the
666 function), so we have to skip it to get to the first real
667 instruction at the start of the function. */
669 for (i
= 0; i
< 6; i
++)
671 op
= read_memory_unsigned_integer (pc
+ i
, 1);
672 if (pic_pat
[i
] != op
)
679 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
681 if (op
== 0x89) /* movl %ebx, x(%ebp) */
683 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
685 if (op
== 0x5d) /* One byte offset from %ebp. */
687 else if (op
== 0x9d) /* Four byte offset from %ebp. */
689 else /* Unexpected instruction. */
692 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
696 if (delta
> 0 && op
== 0x81
697 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
703 return i386_follow_jump (pc
);
706 /* This function is 64-bit safe. */
709 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
713 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
714 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
720 static struct i386_frame_cache
*
721 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
723 struct i386_frame_cache
*cache
;
730 cache
= i386_alloc_frame_cache ();
733 /* In principle, for normal frames, %ebp holds the frame pointer,
734 which holds the base address for the current stack frame.
735 However, for functions that don't need it, the frame pointer is
736 optional. For these "frameless" functions the frame pointer is
737 actually the frame pointer of the calling frame. Signal
738 trampolines are just a special case of a "frameless" function.
739 They (usually) share their frame pointer with the frame that was
740 in progress when the signal occurred. */
742 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
743 cache
->base
= extract_unsigned_integer (buf
, 4);
744 if (cache
->base
== 0)
747 /* For normal frames, %eip is stored at 4(%ebp). */
748 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
750 cache
->pc
= frame_func_unwind (next_frame
);
752 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
754 if (cache
->locals
< 0)
756 /* We didn't find a valid frame, which means that CACHE->base
757 currently holds the frame pointer for our calling frame. If
758 we're at the start of a function, or somewhere half-way its
759 prologue, the function's frame probably hasn't been fully
760 setup yet. Try to reconstruct the base address for the stack
761 frame by looking at the stack pointer. For truly "frameless"
762 functions this might work too. */
764 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
765 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
768 /* Now that we have the base address for the stack frame we can
769 calculate the value of %esp in the calling frame. */
770 cache
->saved_sp
= cache
->base
+ 8;
772 /* Adjust all the saved registers such that they contain addresses
773 instead of offsets. */
774 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
775 if (cache
->saved_regs
[i
] != -1)
776 cache
->saved_regs
[i
] += cache
->base
;
782 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
783 struct frame_id
*this_id
)
785 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
787 /* This marks the outermost frame. */
788 if (cache
->base
== 0)
791 /* See the end of i386_push_dummy_call. */
792 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
796 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
797 int regnum
, int *optimizedp
,
798 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
799 int *realnump
, void *valuep
)
801 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
803 gdb_assert (regnum
>= 0);
805 /* The System V ABI says that:
807 "The flags register contains the system flags, such as the
808 direction flag and the carry flag. The direction flag must be
809 set to the forward (that is, zero) direction before entry and
810 upon exit from a function. Other user flags have no specified
811 role in the standard calling sequence and are not preserved."
813 To guarantee the "upon exit" part of that statement we fake a
814 saved flags register that has its direction flag cleared.
816 Note that GCC doesn't seem to rely on the fact that the direction
817 flag is cleared after a function return; it always explicitly
818 clears the flag before operations where it matters.
820 FIXME: kettenis/20030316: I'm not quite sure whether this is the
821 right thing to do. The way we fake the flags register here makes
822 it impossible to change it. */
824 if (regnum
== I386_EFLAGS_REGNUM
)
834 /* Clear the direction flag. */
835 val
= frame_unwind_register_unsigned (next_frame
,
838 store_unsigned_integer (valuep
, 4, val
);
844 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
846 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
847 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
851 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
859 /* Store the value. */
860 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
865 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
868 *lvalp
= lval_memory
;
869 *addrp
= cache
->saved_regs
[regnum
];
873 /* Read the value in from memory. */
874 read_memory (*addrp
, valuep
,
875 register_size (current_gdbarch
, regnum
));
880 frame_register_unwind (next_frame
, regnum
,
881 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
884 static const struct frame_unwind i386_frame_unwind
=
888 i386_frame_prev_register
891 static const struct frame_unwind
*
892 i386_frame_sniffer (struct frame_info
*next_frame
)
894 return &i386_frame_unwind
;
898 /* Signal trampolines. */
900 static struct i386_frame_cache
*
901 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
903 struct i386_frame_cache
*cache
;
904 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
911 cache
= i386_alloc_frame_cache ();
913 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
914 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
916 addr
= tdep
->sigcontext_addr (next_frame
);
917 if (tdep
->sc_reg_offset
)
921 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
923 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
924 if (tdep
->sc_reg_offset
[i
] != -1)
925 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
929 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
930 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
938 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
939 struct frame_id
*this_id
)
941 struct i386_frame_cache
*cache
=
942 i386_sigtramp_frame_cache (next_frame
, this_cache
);
944 /* See the end of i386_push_dummy_call. */
945 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
949 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
951 int regnum
, int *optimizedp
,
952 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
953 int *realnump
, void *valuep
)
955 /* Make sure we've initialized the cache. */
956 i386_sigtramp_frame_cache (next_frame
, this_cache
);
958 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
959 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
962 static const struct frame_unwind i386_sigtramp_frame_unwind
=
965 i386_sigtramp_frame_this_id
,
966 i386_sigtramp_frame_prev_register
969 static const struct frame_unwind
*
970 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
972 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
975 /* We shouldn't even bother to try if the OSABI didn't register
976 a sigcontext_addr handler. */
977 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_addr
)
980 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
981 if (PC_IN_SIGTRAMP (pc
, name
))
982 return &i386_sigtramp_frame_unwind
;
989 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
991 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
996 static const struct frame_base i386_frame_base
=
999 i386_frame_base_address
,
1000 i386_frame_base_address
,
1001 i386_frame_base_address
1004 static struct frame_id
1005 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1010 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1011 fp
= extract_unsigned_integer (buf
, 4);
1013 /* See the end of i386_push_dummy_call. */
1014 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1018 /* Figure out where the longjmp will land. Slurp the args out of the
1019 stack. We expect the first arg to be a pointer to the jmp_buf
1020 structure from which we extract the address that we will land at.
1021 This address is copied into PC. This routine returns non-zero on
1024 This function is 64-bit safe. */
1027 i386_get_longjmp_target (CORE_ADDR
*pc
)
1030 CORE_ADDR sp
, jb_addr
;
1031 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1032 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1034 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1035 longjmp will land. */
1036 if (jb_pc_offset
== -1)
1039 /* Don't use I386_ESP_REGNUM here, since this function is also used
1041 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1042 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1043 if (target_read_memory (sp
+ len
, buf
, len
))
1046 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1047 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1050 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1056 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1057 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1058 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1059 CORE_ADDR struct_addr
)
1064 /* Push arguments in reverse order. */
1065 for (i
= nargs
- 1; i
>= 0; i
--)
1067 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1069 /* The System V ABI says that:
1071 "An argument's size is increased, if necessary, to make it a
1072 multiple of [32-bit] words. This may require tail padding,
1073 depending on the size of the argument."
1075 This makes sure the stack says word-aligned. */
1076 sp
-= (len
+ 3) & ~3;
1077 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1080 /* Push value address. */
1084 store_unsigned_integer (buf
, 4, struct_addr
);
1085 write_memory (sp
, buf
, 4);
1088 /* Store return address. */
1090 store_unsigned_integer (buf
, 4, bp_addr
);
1091 write_memory (sp
, buf
, 4);
1093 /* Finally, update the stack pointer... */
1094 store_unsigned_integer (buf
, 4, sp
);
1095 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1097 /* ...and fake a frame pointer. */
1098 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1100 /* MarkK wrote: This "+ 8" is all over the place:
1101 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1102 i386_unwind_dummy_id). It's there, since all frame unwinders for
1103 a given target have to agree (within a certain margin) on the
1104 defenition of the stack address of a frame. Otherwise
1105 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1106 stack address *before* the function call as a frame's CFA. On
1107 the i386, when %ebp is used as a frame pointer, the offset
1108 between the contents %ebp and the CFA as defined by GCC. */
1112 /* These registers are used for returning integers (and on some
1113 targets also for returning `struct' and `union' values when their
1114 size and alignment match an integer type). */
1115 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1116 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1118 /* Extract from an array REGBUF containing the (raw) register state, a
1119 function return value of TYPE, and copy that, in virtual format,
1123 i386_extract_return_value (struct type
*type
, struct regcache
*regcache
,
1126 bfd_byte
*valbuf
= dst
;
1127 int len
= TYPE_LENGTH (type
);
1128 char buf
[I386_MAX_REGISTER_SIZE
];
1130 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1131 && TYPE_NFIELDS (type
) == 1)
1133 i386_extract_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1137 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1141 warning ("Cannot find floating-point return value.");
1142 memset (valbuf
, 0, len
);
1146 /* Floating-point return values can be found in %st(0). Convert
1147 its contents to the desired type. This is probably not
1148 exactly how it would happen on the target itself, but it is
1149 the best we can do. */
1150 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1151 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1155 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1156 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1158 if (len
<= low_size
)
1160 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1161 memcpy (valbuf
, buf
, len
);
1163 else if (len
<= (low_size
+ high_size
))
1165 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1166 memcpy (valbuf
, buf
, low_size
);
1167 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1168 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
1171 internal_error (__FILE__
, __LINE__
,
1172 "Cannot extract return value of %d bytes long.", len
);
1176 /* Write into the appropriate registers a function return value stored
1177 in VALBUF of type TYPE, given in virtual format. */
1180 i386_store_return_value (struct type
*type
, struct regcache
*regcache
,
1183 int len
= TYPE_LENGTH (type
);
1185 if (TYPE_CODE (type
) == TYPE_CODE_STRUCT
1186 && TYPE_NFIELDS (type
) == 1)
1188 i386_store_return_value (TYPE_FIELD_TYPE (type
, 0), regcache
, valbuf
);
1192 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1195 char buf
[FPU_REG_RAW_SIZE
];
1199 warning ("Cannot set floating-point return value.");
1203 /* Returning floating-point values is a bit tricky. Apart from
1204 storing the return value in %st(0), we have to simulate the
1205 state of the FPU at function return point. */
1207 /* Convert the value found in VALBUF to the extended
1208 floating-point format used by the FPU. This is probably
1209 not exactly how it would happen on the target itself, but
1210 it is the best we can do. */
1211 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1212 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1214 /* Set the top of the floating-point register stack to 7. The
1215 actual value doesn't really matter, but 7 is what a normal
1216 function return would end up with if the program started out
1217 with a freshly initialized FPU. */
1218 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1220 regcache_raw_write_unsigned (regcache
, FSTAT_REGNUM
, fstat
);
1222 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1223 the floating-point register stack to 7, the appropriate value
1224 for the tag word is 0x3fff. */
1225 regcache_raw_write_unsigned (regcache
, FTAG_REGNUM
, 0x3fff);
1229 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1230 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1232 if (len
<= low_size
)
1233 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1234 else if (len
<= (low_size
+ high_size
))
1236 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1237 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1238 len
- low_size
, (char *) valbuf
+ low_size
);
1241 internal_error (__FILE__
, __LINE__
,
1242 "Cannot store return value of %d bytes long.", len
);
1246 /* Extract from REGCACHE, which contains the (raw) register state, the
1247 address in which a function should return its structure value, as a
1251 i386_extract_struct_value_address (struct regcache
*regcache
)
1255 regcache_cooked_read (regcache
, I386_EAX_REGNUM
, buf
);
1256 return extract_unsigned_integer (buf
, 4);
1260 /* This is the variable that is set with "set struct-convention", and
1261 its legitimate values. */
1262 static const char default_struct_convention
[] = "default";
1263 static const char pcc_struct_convention
[] = "pcc";
1264 static const char reg_struct_convention
[] = "reg";
1265 static const char *valid_conventions
[] =
1267 default_struct_convention
,
1268 pcc_struct_convention
,
1269 reg_struct_convention
,
1272 static const char *struct_convention
= default_struct_convention
;
1275 i386_use_struct_convention (int gcc_p
, struct type
*type
)
1277 enum struct_return struct_return
;
1279 if (struct_convention
== default_struct_convention
)
1280 struct_return
= gdbarch_tdep (current_gdbarch
)->struct_return
;
1281 else if (struct_convention
== pcc_struct_convention
)
1282 struct_return
= pcc_struct_return
;
1284 struct_return
= reg_struct_return
;
1286 return generic_use_struct_convention (struct_return
== reg_struct_return
,
1291 /* Return the GDB type object for the "standard" data type of data in
1292 register REGNUM. Perhaps %esi and %edi should go here, but
1293 potentially they could be used for things other than address. */
1295 static struct type
*
1296 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1298 if (regnum
== I386_EIP_REGNUM
1299 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1300 return lookup_pointer_type (builtin_type_void
);
1302 if (i386_fp_regnum_p (regnum
))
1303 return builtin_type_i387_ext
;
1305 if (i386_sse_regnum_p (regnum
))
1306 return builtin_type_vec128i
;
1308 if (i386_mmx_regnum_p (regnum
))
1309 return builtin_type_vec64i
;
1311 return builtin_type_int
;
1314 /* Map a cooked register onto a raw register or memory. For the i386,
1315 the MMX registers need to be mapped onto floating point registers. */
1318 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1325 mmxi
= regnum
- MM0_REGNUM
;
1326 regcache_raw_read_unsigned (regcache
, FSTAT_REGNUM
, &fstat
);
1327 tos
= (fstat
>> 11) & 0x7;
1328 fpi
= (mmxi
+ tos
) % 8;
1330 return (FP0_REGNUM
+ fpi
);
1334 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1335 int regnum
, void *buf
)
1337 if (i386_mmx_regnum_p (regnum
))
1339 char mmx_buf
[MAX_REGISTER_SIZE
];
1340 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1342 /* Extract (always little endian). */
1343 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1344 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1347 regcache_raw_read (regcache
, regnum
, buf
);
1351 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1352 int regnum
, const void *buf
)
1354 if (i386_mmx_regnum_p (regnum
))
1356 char mmx_buf
[MAX_REGISTER_SIZE
];
1357 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1360 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1361 /* ... Modify ... (always little endian). */
1362 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1364 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1367 regcache_raw_write (regcache
, regnum
, buf
);
1371 /* These registers don't have pervasive standard uses. Move them to
1372 i386-tdep.h if necessary. */
1374 #define I386_EBX_REGNUM 3 /* %ebx */
1375 #define I386_ECX_REGNUM 1 /* %ecx */
1376 #define I386_ESI_REGNUM 6 /* %esi */
1377 #define I386_EDI_REGNUM 7 /* %edi */
1379 /* Return the register number of the register allocated by GCC after
1380 REGNUM, or -1 if there is no such register. */
1383 i386_next_regnum (int regnum
)
1385 /* GCC allocates the registers in the order:
1387 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1389 Since storing a variable in %esp doesn't make any sense we return
1390 -1 for %ebp and for %esp itself. */
1391 static int next_regnum
[] =
1393 I386_EDX_REGNUM
, /* Slot for %eax. */
1394 I386_EBX_REGNUM
, /* Slot for %ecx. */
1395 I386_ECX_REGNUM
, /* Slot for %edx. */
1396 I386_ESI_REGNUM
, /* Slot for %ebx. */
1397 -1, -1, /* Slots for %esp and %ebp. */
1398 I386_EDI_REGNUM
, /* Slot for %esi. */
1399 I386_EBP_REGNUM
/* Slot for %edi. */
1402 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1403 return next_regnum
[regnum
];
1408 /* Return nonzero if a value of type TYPE stored in register REGNUM
1409 needs any special handling. */
1412 i386_convert_register_p (int regnum
, struct type
*type
)
1414 int len
= TYPE_LENGTH (type
);
1416 /* Values may be spread across multiple registers. Most debugging
1417 formats aren't expressive enough to specify the locations, so
1418 some heuristics is involved. Right now we only handle types that
1419 have a length that is a multiple of the word size, since GCC
1420 doesn't seem to put any other types into registers. */
1421 if (len
> 4 && len
% 4 == 0)
1423 int last_regnum
= regnum
;
1427 last_regnum
= i386_next_regnum (last_regnum
);
1431 if (last_regnum
!= -1)
1435 return i386_fp_regnum_p (regnum
);
1438 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1439 return its contents in TO. */
1442 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1443 struct type
*type
, void *to
)
1445 int len
= TYPE_LENGTH (type
);
1448 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1449 available in FRAME (i.e. if it wasn't saved)? */
1451 if (i386_fp_regnum_p (regnum
))
1453 i387_register_to_value (frame
, regnum
, type
, to
);
1457 /* Read a value spread accross multiple registers. */
1459 gdb_assert (len
> 4 && len
% 4 == 0);
1463 gdb_assert (regnum
!= -1);
1464 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1466 get_frame_register (frame
, regnum
, buf
);
1467 regnum
= i386_next_regnum (regnum
);
1473 /* Write the contents FROM of a value of type TYPE into register
1474 REGNUM in frame FRAME. */
1477 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1478 struct type
*type
, const void *from
)
1480 int len
= TYPE_LENGTH (type
);
1481 const char *buf
= from
;
1483 if (i386_fp_regnum_p (regnum
))
1485 i387_value_to_register (frame
, regnum
, type
, from
);
1489 /* Write a value spread accross multiple registers. */
1491 gdb_assert (len
> 4 && len
% 4 == 0);
1495 gdb_assert (regnum
!= -1);
1496 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1498 put_frame_register (frame
, regnum
, buf
);
1499 regnum
= i386_next_regnum (regnum
);
1507 #ifdef STATIC_TRANSFORM_NAME
1508 /* SunPRO encodes the static variables. This is not related to C++
1509 mangling, it is done for C too. */
1512 sunpro_static_transform_name (char *name
)
1515 if (IS_STATIC_TRANSFORM_NAME (name
))
1517 /* For file-local statics there will be a period, a bunch of
1518 junk (the contents of which match a string given in the
1519 N_OPT), a period and the name. For function-local statics
1520 there will be a bunch of junk (which seems to change the
1521 second character from 'A' to 'B'), a period, the name of the
1522 function, and the name. So just skip everything before the
1524 p
= strrchr (name
, '.');
1530 #endif /* STATIC_TRANSFORM_NAME */
1533 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1536 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1538 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1540 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1541 struct minimal_symbol
*indsym
=
1542 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1543 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1547 if (strncmp (symname
, "__imp_", 6) == 0
1548 || strncmp (symname
, "_imp_", 5) == 0)
1549 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1552 return 0; /* Not a trampoline. */
1556 /* Return non-zero if PC and NAME show that we are in a signal
1560 i386_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1562 return (name
&& strcmp ("_sigtramp", name
) == 0);
1566 /* We have two flavours of disassembly. The machinery on this page
1567 deals with switching between those. */
1570 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
1572 gdb_assert (disassembly_flavor
== att_flavor
1573 || disassembly_flavor
== intel_flavor
);
1575 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1576 constified, cast to prevent a compiler warning. */
1577 info
->disassembler_options
= (char *) disassembly_flavor
;
1578 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1580 return print_insn_i386 (pc
, info
);
1584 /* There are a few i386 architecture variants that differ only
1585 slightly from the generic i386 target. For now, we don't give them
1586 their own source file, but include them here. As a consequence,
1587 they'll always be included. */
1589 /* System V Release 4 (SVR4). */
1592 i386_svr4_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1594 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1595 currently unknown. */
1596 return (name
&& (strcmp ("_sigreturn", name
) == 0
1597 || strcmp ("_sigacthandler", name
) == 0
1598 || strcmp ("sigvechandler", name
) == 0));
1601 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1602 routine, return the address of the associated sigcontext (ucontext)
1606 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1611 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1612 sp
= extract_unsigned_integer (buf
, 4);
1614 return read_memory_unsigned_integer (sp
+ 8, 4);
1621 i386_go32_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1623 /* DJGPP doesn't have any special frames for signal handlers. */
1631 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1633 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1634 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1637 /* System V Release 4 (SVR4). */
1640 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1642 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1644 /* System V Release 4 uses ELF. */
1645 i386_elf_init_abi (info
, gdbarch
);
1647 /* System V Release 4 has shared libraries. */
1648 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1649 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1651 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_svr4_pc_in_sigtramp
);
1652 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1653 tdep
->sc_pc_offset
= 36 + 14 * 4;
1654 tdep
->sc_sp_offset
= 36 + 17 * 4;
1656 tdep
->jb_pc_offset
= 20;
1662 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1664 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1666 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_go32_pc_in_sigtramp
);
1668 tdep
->jb_pc_offset
= 36;
1674 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1676 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1678 tdep
->jb_pc_offset
= 24;
1682 /* i386 register groups. In addition to the normal groups, add "mmx"
1685 static struct reggroup
*i386_sse_reggroup
;
1686 static struct reggroup
*i386_mmx_reggroup
;
1689 i386_init_reggroups (void)
1691 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1692 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1696 i386_add_reggroups (struct gdbarch
*gdbarch
)
1698 reggroup_add (gdbarch
, i386_sse_reggroup
);
1699 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1700 reggroup_add (gdbarch
, general_reggroup
);
1701 reggroup_add (gdbarch
, float_reggroup
);
1702 reggroup_add (gdbarch
, all_reggroup
);
1703 reggroup_add (gdbarch
, save_reggroup
);
1704 reggroup_add (gdbarch
, restore_reggroup
);
1705 reggroup_add (gdbarch
, vector_reggroup
);
1706 reggroup_add (gdbarch
, system_reggroup
);
1710 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1711 struct reggroup
*group
)
1713 int sse_regnum_p
= (i386_sse_regnum_p (regnum
)
1714 || i386_mxcsr_regnum_p (regnum
));
1715 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1716 || i386_fpc_regnum_p (regnum
));
1717 int mmx_regnum_p
= (i386_mmx_regnum_p (regnum
));
1719 if (group
== i386_mmx_reggroup
)
1720 return mmx_regnum_p
;
1721 if (group
== i386_sse_reggroup
)
1722 return sse_regnum_p
;
1723 if (group
== vector_reggroup
)
1724 return (mmx_regnum_p
|| sse_regnum_p
);
1725 if (group
== float_reggroup
)
1727 if (group
== general_reggroup
)
1728 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1730 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1734 /* Get the ARGIth function argument for the current function. */
1737 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1740 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
1741 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
1745 static struct gdbarch
*
1746 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1748 struct gdbarch_tdep
*tdep
;
1749 struct gdbarch
*gdbarch
;
1751 /* If there is already a candidate, use it. */
1752 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1754 return arches
->gdbarch
;
1756 /* Allocate space for the new architecture. */
1757 tdep
= XMALLOC (struct gdbarch_tdep
);
1758 gdbarch
= gdbarch_alloc (&info
, tdep
);
1760 /* The i386 default settings now include the SSE registers.
1761 I386_NUM_XREGS includes mxcsr, and we don't want to count
1762 this as one of the xmm regs -- which is why we subtract one.
1764 Note: kevinb/2003-07-14: Whatever Mark's concerns are about the
1765 FPU registers in the FIXME below apply to the SSE registers as well.
1766 The only problem that I see is that these registers will show up
1767 in "info all-registers" even on CPUs where they don't exist. IMO,
1768 however, if it's a choice between printing them always (even when
1769 they don't exist) or never showing them to the user (even when they
1770 do exist), I prefer the former over the latter. Ideally, of course,
1771 we'd somehow autodetect that we have them (or not) and display them
1772 when we have them and suppress them when we don't.
1774 FIXME: kettenis/20020614: They do include the FPU registers for
1775 now, which probably is not quite right. */
1776 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
1778 tdep
->jb_pc_offset
= -1;
1779 tdep
->struct_return
= pcc_struct_return
;
1780 tdep
->sigtramp_start
= 0;
1781 tdep
->sigtramp_end
= 0;
1782 tdep
->sigcontext_addr
= NULL
;
1783 tdep
->sc_reg_offset
= NULL
;
1784 tdep
->sc_pc_offset
= -1;
1785 tdep
->sc_sp_offset
= -1;
1787 /* The format used for `long double' on almost all i386 targets is
1788 the i387 extended floating-point format. In fact, of all targets
1789 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1790 on having a `long double' that's not `long' at all. */
1791 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1793 /* Although the i387 extended floating-point has only 80 significant
1794 bits, a `long double' actually takes up 96, probably to enforce
1796 set_gdbarch_long_double_bit (gdbarch
, 96);
1798 /* The default ABI includes general-purpose registers,
1799 floating-point registers, and the SSE registers. */
1800 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
1801 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1802 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1804 /* Register numbers of various important registers. */
1805 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1806 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1807 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1808 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1810 /* Use the "default" register numbering scheme for stabs and COFF. */
1811 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1812 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
1814 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
1815 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1816 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1818 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
1819 be in use on any of the supported i386 targets. */
1821 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
1823 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
1825 /* Call dummy code. */
1826 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
1828 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
1829 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
1830 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
1832 set_gdbarch_extract_return_value (gdbarch
, i386_extract_return_value
);
1833 set_gdbarch_store_return_value (gdbarch
, i386_store_return_value
);
1834 set_gdbarch_extract_struct_value_address (gdbarch
,
1835 i386_extract_struct_value_address
);
1836 set_gdbarch_use_struct_convention (gdbarch
, i386_use_struct_convention
);
1838 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
1840 /* Stack grows downward. */
1841 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1843 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
1844 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
1845 set_gdbarch_function_start_offset (gdbarch
, 0);
1847 set_gdbarch_frame_args_skip (gdbarch
, 8);
1848 set_gdbarch_pc_in_sigtramp (gdbarch
, i386_pc_in_sigtramp
);
1850 /* Wire in the MMX registers. */
1851 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
1852 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
1853 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
1855 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
1857 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
1859 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
1861 /* Add the i386 register groups. */
1862 i386_add_reggroups (gdbarch
);
1863 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
1865 /* Helper for function argument information. */
1866 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
1868 /* Hook in the DWARF CFI frame unwinder. */
1869 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
1871 frame_base_set_default (gdbarch
, &i386_frame_base
);
1873 /* Hook in ABI-specific overrides, if they have been registered. */
1874 gdbarch_init_osabi (info
, gdbarch
);
1876 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
1877 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
1882 static enum gdb_osabi
1883 i386_coff_osabi_sniffer (bfd
*abfd
)
1885 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
1886 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
1887 return GDB_OSABI_GO32
;
1889 return GDB_OSABI_UNKNOWN
;
1892 static enum gdb_osabi
1893 i386_nlm_osabi_sniffer (bfd
*abfd
)
1895 return GDB_OSABI_NETWARE
;
1899 /* Provide a prototype to silence -Wmissing-prototypes. */
1900 void _initialize_i386_tdep (void);
1903 _initialize_i386_tdep (void)
1905 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
1907 /* Add the variable that controls the disassembly flavor. */
1909 struct cmd_list_element
*new_cmd
;
1911 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
1913 &disassembly_flavor
,
1915 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
1916 and the default value is \"att\".",
1918 add_show_from_set (new_cmd
, &showlist
);
1921 /* Add the variable that controls the convention for returning
1924 struct cmd_list_element
*new_cmd
;
1926 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
1928 &struct_convention
, "\
1929 Set the convention for returning small structs, valid values \
1930 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
1932 add_show_from_set (new_cmd
, &showlist
);
1935 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
1936 i386_coff_osabi_sniffer
);
1937 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
1938 i386_nlm_osabi_sniffer
);
1940 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
1941 i386_svr4_init_abi
);
1942 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
1943 i386_go32_init_abi
);
1944 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
1947 /* Initialize the i386 specific register groups. */
1948 i386_init_reggroups ();