1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988-2021 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "opcode/i386.h"
22 #include "arch-utils.h"
24 #include "dummy-frame.h"
25 #include "dwarf2/frame.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
37 #include "reggroups.h"
42 #include "target-float.h"
47 #include "i386-tdep.h"
48 #include "i387-tdep.h"
49 #include "gdbsupport/x86-xstate.h"
54 #include "record-full.h"
55 #include "target-descriptions.h"
56 #include "arch/i386.h"
61 #include "stap-probe.h"
62 #include "user-regs.h"
63 #include "cli/cli-utils.h"
64 #include "expression.h"
65 #include "parser-defs.h"
68 #include <unordered_set>
73 static const char * const i386_register_names
[] =
75 "eax", "ecx", "edx", "ebx",
76 "esp", "ebp", "esi", "edi",
77 "eip", "eflags", "cs", "ss",
78 "ds", "es", "fs", "gs",
79 "st0", "st1", "st2", "st3",
80 "st4", "st5", "st6", "st7",
81 "fctrl", "fstat", "ftag", "fiseg",
82 "fioff", "foseg", "fooff", "fop",
83 "xmm0", "xmm1", "xmm2", "xmm3",
84 "xmm4", "xmm5", "xmm6", "xmm7",
88 static const char * const i386_zmm_names
[] =
90 "zmm0", "zmm1", "zmm2", "zmm3",
91 "zmm4", "zmm5", "zmm6", "zmm7"
94 static const char * const i386_zmmh_names
[] =
96 "zmm0h", "zmm1h", "zmm2h", "zmm3h",
97 "zmm4h", "zmm5h", "zmm6h", "zmm7h"
100 static const char * const i386_k_names
[] =
102 "k0", "k1", "k2", "k3",
103 "k4", "k5", "k6", "k7"
106 static const char * const i386_ymm_names
[] =
108 "ymm0", "ymm1", "ymm2", "ymm3",
109 "ymm4", "ymm5", "ymm6", "ymm7",
112 static const char * const i386_ymmh_names
[] =
114 "ymm0h", "ymm1h", "ymm2h", "ymm3h",
115 "ymm4h", "ymm5h", "ymm6h", "ymm7h",
118 static const char * const i386_mpx_names
[] =
120 "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
123 static const char * const i386_pkeys_names
[] =
128 /* Register names for MPX pseudo-registers. */
130 static const char * const i386_bnd_names
[] =
132 "bnd0", "bnd1", "bnd2", "bnd3"
135 /* Register names for MMX pseudo-registers. */
137 static const char * const i386_mmx_names
[] =
139 "mm0", "mm1", "mm2", "mm3",
140 "mm4", "mm5", "mm6", "mm7"
143 /* Register names for byte pseudo-registers. */
145 static const char * const i386_byte_names
[] =
147 "al", "cl", "dl", "bl",
148 "ah", "ch", "dh", "bh"
151 /* Register names for word pseudo-registers. */
153 static const char * const i386_word_names
[] =
155 "ax", "cx", "dx", "bx",
159 /* Constant used for reading/writing pseudo registers. In 64-bit mode, we have
160 16 lower ZMM regs that extend corresponding xmm/ymm registers. In addition,
161 we have 16 upper ZMM regs that have to be handled differently. */
163 const int num_lower_zmm_regs
= 16;
168 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
170 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
171 int mm0_regnum
= tdep
->mm0_regnum
;
176 regnum
-= mm0_regnum
;
177 return regnum
>= 0 && regnum
< tdep
->num_mmx_regs
;
183 i386_byte_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
185 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
187 regnum
-= tdep
->al_regnum
;
188 return regnum
>= 0 && regnum
< tdep
->num_byte_regs
;
194 i386_word_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
196 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
198 regnum
-= tdep
->ax_regnum
;
199 return regnum
>= 0 && regnum
< tdep
->num_word_regs
;
202 /* Dword register? */
205 i386_dword_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
207 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
208 int eax_regnum
= tdep
->eax_regnum
;
213 regnum
-= eax_regnum
;
214 return regnum
>= 0 && regnum
< tdep
->num_dword_regs
;
217 /* AVX512 register? */
220 i386_zmmh_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
222 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
223 int zmm0h_regnum
= tdep
->zmm0h_regnum
;
225 if (zmm0h_regnum
< 0)
228 regnum
-= zmm0h_regnum
;
229 return regnum
>= 0 && regnum
< tdep
->num_zmm_regs
;
233 i386_zmm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
235 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
236 int zmm0_regnum
= tdep
->zmm0_regnum
;
241 regnum
-= zmm0_regnum
;
242 return regnum
>= 0 && regnum
< tdep
->num_zmm_regs
;
246 i386_k_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
248 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
249 int k0_regnum
= tdep
->k0_regnum
;
255 return regnum
>= 0 && regnum
< I387_NUM_K_REGS
;
259 i386_ymmh_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
261 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
262 int ymm0h_regnum
= tdep
->ymm0h_regnum
;
264 if (ymm0h_regnum
< 0)
267 regnum
-= ymm0h_regnum
;
268 return regnum
>= 0 && regnum
< tdep
->num_ymm_regs
;
274 i386_ymm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
276 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
277 int ymm0_regnum
= tdep
->ymm0_regnum
;
282 regnum
-= ymm0_regnum
;
283 return regnum
>= 0 && regnum
< tdep
->num_ymm_regs
;
287 i386_ymmh_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
289 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
290 int ymm16h_regnum
= tdep
->ymm16h_regnum
;
292 if (ymm16h_regnum
< 0)
295 regnum
-= ymm16h_regnum
;
296 return regnum
>= 0 && regnum
< tdep
->num_ymm_avx512_regs
;
300 i386_ymm_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
302 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
303 int ymm16_regnum
= tdep
->ymm16_regnum
;
305 if (ymm16_regnum
< 0)
308 regnum
-= ymm16_regnum
;
309 return regnum
>= 0 && regnum
< tdep
->num_ymm_avx512_regs
;
315 i386_bnd_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
317 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
318 int bnd0_regnum
= tdep
->bnd0_regnum
;
323 regnum
-= bnd0_regnum
;
324 return regnum
>= 0 && regnum
< I387_NUM_BND_REGS
;
330 i386_xmm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
332 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
333 int num_xmm_regs
= I387_NUM_XMM_REGS (tdep
);
335 if (num_xmm_regs
== 0)
338 regnum
-= I387_XMM0_REGNUM (tdep
);
339 return regnum
>= 0 && regnum
< num_xmm_regs
;
342 /* XMM_512 register? */
345 i386_xmm_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
347 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
348 int num_xmm_avx512_regs
= I387_NUM_XMM_AVX512_REGS (tdep
);
350 if (num_xmm_avx512_regs
== 0)
353 regnum
-= I387_XMM16_REGNUM (tdep
);
354 return regnum
>= 0 && regnum
< num_xmm_avx512_regs
;
358 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
360 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
362 if (I387_NUM_XMM_REGS (tdep
) == 0)
365 return (regnum
== I387_MXCSR_REGNUM (tdep
));
371 i386_fp_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
373 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
375 if (I387_ST0_REGNUM (tdep
) < 0)
378 return (I387_ST0_REGNUM (tdep
) <= regnum
379 && regnum
< I387_FCTRL_REGNUM (tdep
));
383 i386_fpc_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
385 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
387 if (I387_ST0_REGNUM (tdep
) < 0)
390 return (I387_FCTRL_REGNUM (tdep
) <= regnum
391 && regnum
< I387_XMM0_REGNUM (tdep
));
394 /* BNDr (raw) register? */
397 i386_bndr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
399 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
401 if (I387_BND0R_REGNUM (tdep
) < 0)
404 regnum
-= tdep
->bnd0r_regnum
;
405 return regnum
>= 0 && regnum
< I387_NUM_BND_REGS
;
408 /* BND control register? */
411 i386_mpx_ctrl_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
413 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
415 if (I387_BNDCFGU_REGNUM (tdep
) < 0)
418 regnum
-= I387_BNDCFGU_REGNUM (tdep
);
419 return regnum
>= 0 && regnum
< I387_NUM_MPX_CTRL_REGS
;
425 i386_pkru_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
427 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
428 int pkru_regnum
= tdep
->pkru_regnum
;
433 regnum
-= pkru_regnum
;
434 return regnum
>= 0 && regnum
< I387_NUM_PKEYS_REGS
;
437 /* Return the name of register REGNUM, or the empty string if it is
438 an anonymous register. */
441 i386_register_name (struct gdbarch
*gdbarch
, int regnum
)
443 /* Hide the upper YMM registers. */
444 if (i386_ymmh_regnum_p (gdbarch
, regnum
))
447 /* Hide the upper YMM16-31 registers. */
448 if (i386_ymmh_avx512_regnum_p (gdbarch
, regnum
))
451 /* Hide the upper ZMM registers. */
452 if (i386_zmmh_regnum_p (gdbarch
, regnum
))
455 return tdesc_register_name (gdbarch
, regnum
);
458 /* Return the name of register REGNUM. */
461 i386_pseudo_register_name (struct gdbarch
*gdbarch
, int regnum
)
463 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
464 if (i386_bnd_regnum_p (gdbarch
, regnum
))
465 return i386_bnd_names
[regnum
- tdep
->bnd0_regnum
];
466 if (i386_mmx_regnum_p (gdbarch
, regnum
))
467 return i386_mmx_names
[regnum
- I387_MM0_REGNUM (tdep
)];
468 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
469 return i386_ymm_names
[regnum
- tdep
->ymm0_regnum
];
470 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
471 return i386_zmm_names
[regnum
- tdep
->zmm0_regnum
];
472 else if (i386_byte_regnum_p (gdbarch
, regnum
))
473 return i386_byte_names
[regnum
- tdep
->al_regnum
];
474 else if (i386_word_regnum_p (gdbarch
, regnum
))
475 return i386_word_names
[regnum
- tdep
->ax_regnum
];
477 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
480 /* Convert a dbx register number REG to the appropriate register
481 number used by GDB. */
484 i386_dbx_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
486 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
488 /* This implements what GCC calls the "default" register map
489 (dbx_register_map[]). */
491 if (reg
>= 0 && reg
<= 7)
493 /* General-purpose registers. The debug info calls %ebp
494 register 4, and %esp register 5. */
501 else if (reg
>= 12 && reg
<= 19)
503 /* Floating-point registers. */
504 return reg
- 12 + I387_ST0_REGNUM (tdep
);
506 else if (reg
>= 21 && reg
<= 28)
509 int ymm0_regnum
= tdep
->ymm0_regnum
;
512 && i386_xmm_regnum_p (gdbarch
, reg
))
513 return reg
- 21 + ymm0_regnum
;
515 return reg
- 21 + I387_XMM0_REGNUM (tdep
);
517 else if (reg
>= 29 && reg
<= 36)
520 return reg
- 29 + I387_MM0_REGNUM (tdep
);
523 /* This will hopefully provoke a warning. */
524 return gdbarch_num_cooked_regs (gdbarch
);
527 /* Convert SVR4 DWARF register number REG to the appropriate register number
531 i386_svr4_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
533 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
535 /* This implements the GCC register map that tries to be compatible
536 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
538 /* The SVR4 register numbering includes %eip and %eflags, and
539 numbers the floating point registers differently. */
540 if (reg
>= 0 && reg
<= 9)
542 /* General-purpose registers. */
545 else if (reg
>= 11 && reg
<= 18)
547 /* Floating-point registers. */
548 return reg
- 11 + I387_ST0_REGNUM (tdep
);
550 else if (reg
>= 21 && reg
<= 36)
552 /* The SSE and MMX registers have the same numbers as with dbx. */
553 return i386_dbx_reg_to_regnum (gdbarch
, reg
);
558 case 37: return I387_FCTRL_REGNUM (tdep
);
559 case 38: return I387_FSTAT_REGNUM (tdep
);
560 case 39: return I387_MXCSR_REGNUM (tdep
);
561 case 40: return I386_ES_REGNUM
;
562 case 41: return I386_CS_REGNUM
;
563 case 42: return I386_SS_REGNUM
;
564 case 43: return I386_DS_REGNUM
;
565 case 44: return I386_FS_REGNUM
;
566 case 45: return I386_GS_REGNUM
;
572 /* Wrapper on i386_svr4_dwarf_reg_to_regnum to return
573 num_regs + num_pseudo_regs for other debug formats. */
576 i386_svr4_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
578 int regnum
= i386_svr4_dwarf_reg_to_regnum (gdbarch
, reg
);
581 return gdbarch_num_cooked_regs (gdbarch
);
587 /* This is the variable that is set with "set disassembly-flavor", and
588 its legitimate values. */
589 static const char att_flavor
[] = "att";
590 static const char intel_flavor
[] = "intel";
591 static const char *const valid_flavors
[] =
597 static const char *disassembly_flavor
= att_flavor
;
600 /* Use the program counter to determine the contents and size of a
601 breakpoint instruction. Return a pointer to a string of bytes that
602 encode a breakpoint instruction, store the length of the string in
603 *LEN and optionally adjust *PC to point to the correct memory
604 location for inserting the breakpoint.
606 On the i386 we have a single breakpoint that fits in a single byte
607 and can be inserted anywhere.
609 This function is 64-bit safe. */
611 constexpr gdb_byte i386_break_insn
[] = { 0xcc }; /* int 3 */
613 typedef BP_MANIPULATION (i386_break_insn
) i386_breakpoint
;
616 /* Displaced instruction handling. */
618 /* Skip the legacy instruction prefixes in INSN.
619 Not all prefixes are valid for any particular insn
620 but we needn't care, the insn will fault if it's invalid.
621 The result is a pointer to the first opcode byte,
622 or NULL if we run off the end of the buffer. */
625 i386_skip_prefixes (gdb_byte
*insn
, size_t max_len
)
627 gdb_byte
*end
= insn
+ max_len
;
633 case DATA_PREFIX_OPCODE
:
634 case ADDR_PREFIX_OPCODE
:
635 case CS_PREFIX_OPCODE
:
636 case DS_PREFIX_OPCODE
:
637 case ES_PREFIX_OPCODE
:
638 case FS_PREFIX_OPCODE
:
639 case GS_PREFIX_OPCODE
:
640 case SS_PREFIX_OPCODE
:
641 case LOCK_PREFIX_OPCODE
:
642 case REPE_PREFIX_OPCODE
:
643 case REPNE_PREFIX_OPCODE
:
655 i386_absolute_jmp_p (const gdb_byte
*insn
)
657 /* jmp far (absolute address in operand). */
663 /* jump near, absolute indirect (/4). */
664 if ((insn
[1] & 0x38) == 0x20)
667 /* jump far, absolute indirect (/5). */
668 if ((insn
[1] & 0x38) == 0x28)
675 /* Return non-zero if INSN is a jump, zero otherwise. */
678 i386_jmp_p (const gdb_byte
*insn
)
680 /* jump short, relative. */
684 /* jump near, relative. */
688 return i386_absolute_jmp_p (insn
);
692 i386_absolute_call_p (const gdb_byte
*insn
)
694 /* call far, absolute. */
700 /* Call near, absolute indirect (/2). */
701 if ((insn
[1] & 0x38) == 0x10)
704 /* Call far, absolute indirect (/3). */
705 if ((insn
[1] & 0x38) == 0x18)
713 i386_ret_p (const gdb_byte
*insn
)
717 case 0xc2: /* ret near, pop N bytes. */
718 case 0xc3: /* ret near */
719 case 0xca: /* ret far, pop N bytes. */
720 case 0xcb: /* ret far */
721 case 0xcf: /* iret */
730 i386_call_p (const gdb_byte
*insn
)
732 if (i386_absolute_call_p (insn
))
735 /* call near, relative. */
742 /* Return non-zero if INSN is a system call, and set *LENGTHP to its
743 length in bytes. Otherwise, return zero. */
746 i386_syscall_p (const gdb_byte
*insn
, int *lengthp
)
748 /* Is it 'int $0x80'? */
749 if ((insn
[0] == 0xcd && insn
[1] == 0x80)
750 /* Or is it 'sysenter'? */
751 || (insn
[0] == 0x0f && insn
[1] == 0x34)
752 /* Or is it 'syscall'? */
753 || (insn
[0] == 0x0f && insn
[1] == 0x05))
762 /* The gdbarch insn_is_call method. */
765 i386_insn_is_call (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
767 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
769 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
770 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
772 return i386_call_p (insn
);
775 /* The gdbarch insn_is_ret method. */
778 i386_insn_is_ret (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
780 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
782 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
783 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
785 return i386_ret_p (insn
);
788 /* The gdbarch insn_is_jump method. */
791 i386_insn_is_jump (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
793 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
795 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
796 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
798 return i386_jmp_p (insn
);
801 /* Some kernels may run one past a syscall insn, so we have to cope. */
803 displaced_step_copy_insn_closure_up
804 i386_displaced_step_copy_insn (struct gdbarch
*gdbarch
,
805 CORE_ADDR from
, CORE_ADDR to
,
806 struct regcache
*regs
)
808 size_t len
= gdbarch_max_insn_length (gdbarch
);
809 std::unique_ptr
<i386_displaced_step_copy_insn_closure
> closure
810 (new i386_displaced_step_copy_insn_closure (len
));
811 gdb_byte
*buf
= closure
->buf
.data ();
813 read_memory (from
, buf
, len
);
815 /* GDB may get control back after the insn after the syscall.
816 Presumably this is a kernel bug.
817 If this is a syscall, make sure there's a nop afterwards. */
822 insn
= i386_skip_prefixes (buf
, len
);
823 if (insn
!= NULL
&& i386_syscall_p (insn
, &syscall_length
))
824 insn
[syscall_length
] = NOP_OPCODE
;
827 write_memory (to
, buf
, len
);
829 displaced_debug_printf ("%s->%s: %s",
830 paddress (gdbarch
, from
), paddress (gdbarch
, to
),
831 displaced_step_dump_bytes (buf
, len
).c_str ());
833 /* This is a work around for a problem with g++ 4.8. */
834 return displaced_step_copy_insn_closure_up (closure
.release ());
837 /* Fix up the state of registers and memory after having single-stepped
838 a displaced instruction. */
841 i386_displaced_step_fixup (struct gdbarch
*gdbarch
,
842 struct displaced_step_copy_insn_closure
*closure_
,
843 CORE_ADDR from
, CORE_ADDR to
,
844 struct regcache
*regs
)
846 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
848 /* The offset we applied to the instruction's address.
849 This could well be negative (when viewed as a signed 32-bit
850 value), but ULONGEST won't reflect that, so take care when
852 ULONGEST insn_offset
= to
- from
;
854 i386_displaced_step_copy_insn_closure
*closure
855 = (i386_displaced_step_copy_insn_closure
*) closure_
;
856 gdb_byte
*insn
= closure
->buf
.data ();
857 /* The start of the insn, needed in case we see some prefixes. */
858 gdb_byte
*insn_start
= insn
;
860 displaced_debug_printf ("fixup (%s, %s), insn = 0x%02x 0x%02x ...",
861 paddress (gdbarch
, from
), paddress (gdbarch
, to
),
864 /* The list of issues to contend with here is taken from
865 resume_execution in arch/i386/kernel/kprobes.c, Linux 2.6.20.
866 Yay for Free Software! */
868 /* Relocate the %eip, if necessary. */
870 /* The instruction recognizers we use assume any leading prefixes
871 have been skipped. */
873 /* This is the size of the buffer in closure. */
874 size_t max_insn_len
= gdbarch_max_insn_length (gdbarch
);
875 gdb_byte
*opcode
= i386_skip_prefixes (insn
, max_insn_len
);
876 /* If there are too many prefixes, just ignore the insn.
877 It will fault when run. */
882 /* Except in the case of absolute or indirect jump or call
883 instructions, or a return instruction, the new eip is relative to
884 the displaced instruction; make it relative. Well, signal
885 handler returns don't need relocation either, but we use the
886 value of %eip to recognize those; see below. */
887 if (! i386_absolute_jmp_p (insn
)
888 && ! i386_absolute_call_p (insn
)
889 && ! i386_ret_p (insn
))
894 regcache_cooked_read_unsigned (regs
, I386_EIP_REGNUM
, &orig_eip
);
896 /* A signal trampoline system call changes the %eip, resuming
897 execution of the main program after the signal handler has
898 returned. That makes them like 'return' instructions; we
899 shouldn't relocate %eip.
901 But most system calls don't, and we do need to relocate %eip.
903 Our heuristic for distinguishing these cases: if stepping
904 over the system call instruction left control directly after
905 the instruction, the we relocate --- control almost certainly
906 doesn't belong in the displaced copy. Otherwise, we assume
907 the instruction has put control where it belongs, and leave
908 it unrelocated. Goodness help us if there are PC-relative
910 if (i386_syscall_p (insn
, &insn_len
)
911 && orig_eip
!= to
+ (insn
- insn_start
) + insn_len
912 /* GDB can get control back after the insn after the syscall.
913 Presumably this is a kernel bug.
914 i386_displaced_step_copy_insn ensures its a nop,
915 we add one to the length for it. */
916 && orig_eip
!= to
+ (insn
- insn_start
) + insn_len
+ 1)
917 displaced_debug_printf ("syscall changed %%eip; not relocating");
920 ULONGEST eip
= (orig_eip
- insn_offset
) & 0xffffffffUL
;
922 /* If we just stepped over a breakpoint insn, we don't backup
923 the pc on purpose; this is to match behaviour without
926 regcache_cooked_write_unsigned (regs
, I386_EIP_REGNUM
, eip
);
928 displaced_debug_printf ("relocated %%eip from %s to %s",
929 paddress (gdbarch
, orig_eip
),
930 paddress (gdbarch
, eip
));
934 /* If the instruction was PUSHFL, then the TF bit will be set in the
935 pushed value, and should be cleared. We'll leave this for later,
936 since GDB already messes up the TF flag when stepping over a
939 /* If the instruction was a call, the return address now atop the
940 stack is the address following the copied instruction. We need
941 to make it the address following the original instruction. */
942 if (i386_call_p (insn
))
946 const ULONGEST retaddr_len
= 4;
948 regcache_cooked_read_unsigned (regs
, I386_ESP_REGNUM
, &esp
);
949 retaddr
= read_memory_unsigned_integer (esp
, retaddr_len
, byte_order
);
950 retaddr
= (retaddr
- insn_offset
) & 0xffffffffUL
;
951 write_memory_unsigned_integer (esp
, retaddr_len
, byte_order
, retaddr
);
953 displaced_debug_printf ("relocated return addr at %s to %s",
954 paddress (gdbarch
, esp
),
955 paddress (gdbarch
, retaddr
));
960 append_insns (CORE_ADDR
*to
, ULONGEST len
, const gdb_byte
*buf
)
962 target_write_memory (*to
, buf
, len
);
967 i386_relocate_instruction (struct gdbarch
*gdbarch
,
968 CORE_ADDR
*to
, CORE_ADDR oldloc
)
970 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
971 gdb_byte buf
[I386_MAX_INSN_LEN
];
972 int offset
= 0, rel32
, newrel
;
974 gdb_byte
*insn
= buf
;
976 read_memory (oldloc
, buf
, I386_MAX_INSN_LEN
);
978 insn_length
= gdb_buffered_insn_length (gdbarch
, insn
,
979 I386_MAX_INSN_LEN
, oldloc
);
981 /* Get past the prefixes. */
982 insn
= i386_skip_prefixes (insn
, I386_MAX_INSN_LEN
);
984 /* Adjust calls with 32-bit relative addresses as push/jump, with
985 the address pushed being the location where the original call in
986 the user program would return to. */
989 gdb_byte push_buf
[16];
990 unsigned int ret_addr
;
992 /* Where "ret" in the original code will return to. */
993 ret_addr
= oldloc
+ insn_length
;
994 push_buf
[0] = 0x68; /* pushq $... */
995 store_unsigned_integer (&push_buf
[1], 4, byte_order
, ret_addr
);
997 append_insns (to
, 5, push_buf
);
999 /* Convert the relative call to a relative jump. */
1002 /* Adjust the destination offset. */
1003 rel32
= extract_signed_integer (insn
+ 1, 4, byte_order
);
1004 newrel
= (oldloc
- *to
) + rel32
;
1005 store_signed_integer (insn
+ 1, 4, byte_order
, newrel
);
1007 displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
1008 hex_string (rel32
), paddress (gdbarch
, oldloc
),
1009 hex_string (newrel
), paddress (gdbarch
, *to
));
1011 /* Write the adjusted jump into its displaced location. */
1012 append_insns (to
, 5, insn
);
1016 /* Adjust jumps with 32-bit relative addresses. Calls are already
1018 if (insn
[0] == 0xe9)
1020 /* Adjust conditional jumps. */
1021 else if (insn
[0] == 0x0f && (insn
[1] & 0xf0) == 0x80)
1026 rel32
= extract_signed_integer (insn
+ offset
, 4, byte_order
);
1027 newrel
= (oldloc
- *to
) + rel32
;
1028 store_signed_integer (insn
+ offset
, 4, byte_order
, newrel
);
1029 displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
1030 hex_string (rel32
), paddress (gdbarch
, oldloc
),
1031 hex_string (newrel
), paddress (gdbarch
, *to
));
1034 /* Write the adjusted instructions into their displaced
1036 append_insns (to
, insn_length
, buf
);
1040 #ifdef I386_REGNO_TO_SYMMETRY
1041 #error "The Sequent Symmetry is no longer supported."
1044 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
1045 and %esp "belong" to the calling function. Therefore these
1046 registers should be saved if they're going to be modified. */
1048 /* The maximum number of saved registers. This should include all
1049 registers mentioned above, and %eip. */
1050 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
1052 struct i386_frame_cache
1060 /* Saved registers. */
1061 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
1066 /* Stack space reserved for local variables. */
1070 /* Allocate and initialize a frame cache. */
1072 static struct i386_frame_cache
*
1073 i386_alloc_frame_cache (void)
1075 struct i386_frame_cache
*cache
;
1078 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
1083 cache
->sp_offset
= -4;
1086 /* Saved registers. We initialize these to -1 since zero is a valid
1087 offset (that's where %ebp is supposed to be stored). */
1088 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
1089 cache
->saved_regs
[i
] = -1;
1090 cache
->saved_sp
= 0;
1091 cache
->saved_sp_reg
= -1;
1092 cache
->pc_in_eax
= 0;
1094 /* Frameless until proven otherwise. */
1100 /* If the instruction at PC is a jump, return the address of its
1101 target. Otherwise, return PC. */
1104 i386_follow_jump (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1106 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1111 if (target_read_code (pc
, &op
, 1))
1118 op
= read_code_unsigned_integer (pc
+ 1, 1, byte_order
);
1124 /* Relative jump: if data16 == 0, disp32, else disp16. */
1127 delta
= read_memory_integer (pc
+ 2, 2, byte_order
);
1129 /* Include the size of the jmp instruction (including the
1135 delta
= read_memory_integer (pc
+ 1, 4, byte_order
);
1137 /* Include the size of the jmp instruction. */
1142 /* Relative jump, disp8 (ignore data16). */
1143 delta
= read_memory_integer (pc
+ data16
+ 1, 1, byte_order
);
1145 delta
+= data16
+ 2;
1152 /* Check whether PC points at a prologue for a function returning a
1153 structure or union. If so, it updates CACHE and returns the
1154 address of the first instruction after the code sequence that
1155 removes the "hidden" argument from the stack or CURRENT_PC,
1156 whichever is smaller. Otherwise, return PC. */
1159 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
1160 struct i386_frame_cache
*cache
)
1162 /* Functions that return a structure or union start with:
1165 xchgl %eax, (%esp) 0x87 0x04 0x24
1166 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
1168 (the System V compiler puts out the second `xchg' instruction,
1169 and the assembler doesn't try to optimize it, so the 'sib' form
1170 gets generated). This sequence is used to get the address of the
1171 return buffer for a function that returns a structure. */
1172 static gdb_byte proto1
[3] = { 0x87, 0x04, 0x24 };
1173 static gdb_byte proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
1177 if (current_pc
<= pc
)
1180 if (target_read_code (pc
, &op
, 1))
1183 if (op
!= 0x58) /* popl %eax */
1186 if (target_read_code (pc
+ 1, buf
, 4))
1189 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
1192 if (current_pc
== pc
)
1194 cache
->sp_offset
+= 4;
1198 if (current_pc
== pc
+ 1)
1200 cache
->pc_in_eax
= 1;
1204 if (buf
[1] == proto1
[1])
1211 i386_skip_probe (CORE_ADDR pc
)
1213 /* A function may start with
1227 if (target_read_code (pc
, &op
, 1))
1230 if (op
== 0x68 || op
== 0x6a)
1234 /* Skip past the `pushl' instruction; it has either a one-byte or a
1235 four-byte operand, depending on the opcode. */
1241 /* Read the following 8 bytes, which should be `call _probe' (6
1242 bytes) followed by `addl $4,%esp' (2 bytes). */
1243 read_memory (pc
+ delta
, buf
, sizeof (buf
));
1244 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
1245 pc
+= delta
+ sizeof (buf
);
1251 /* GCC 4.1 and later, can put code in the prologue to realign the
1252 stack pointer. Check whether PC points to such code, and update
1253 CACHE accordingly. Return the first instruction after the code
1254 sequence or CURRENT_PC, whichever is smaller. If we don't
1255 recognize the code, return PC. */
1258 i386_analyze_stack_align (CORE_ADDR pc
, CORE_ADDR current_pc
,
1259 struct i386_frame_cache
*cache
)
1261 /* There are 2 code sequences to re-align stack before the frame
1264 1. Use a caller-saved saved register:
1270 2. Use a callee-saved saved register:
1277 "andl $-XXX, %esp" can be either 3 bytes or 6 bytes:
1279 0x83 0xe4 0xf0 andl $-16, %esp
1280 0x81 0xe4 0x00 0xff 0xff 0xff andl $-256, %esp
1285 int offset
, offset_and
;
1286 static int regnums
[8] = {
1287 I386_EAX_REGNUM
, /* %eax */
1288 I386_ECX_REGNUM
, /* %ecx */
1289 I386_EDX_REGNUM
, /* %edx */
1290 I386_EBX_REGNUM
, /* %ebx */
1291 I386_ESP_REGNUM
, /* %esp */
1292 I386_EBP_REGNUM
, /* %ebp */
1293 I386_ESI_REGNUM
, /* %esi */
1294 I386_EDI_REGNUM
/* %edi */
1297 if (target_read_code (pc
, buf
, sizeof buf
))
1300 /* Check caller-saved saved register. The first instruction has
1301 to be "leal 4(%esp), %reg". */
1302 if (buf
[0] == 0x8d && buf
[2] == 0x24 && buf
[3] == 0x4)
1304 /* MOD must be binary 10 and R/M must be binary 100. */
1305 if ((buf
[1] & 0xc7) != 0x44)
1308 /* REG has register number. */
1309 reg
= (buf
[1] >> 3) & 7;
1314 /* Check callee-saved saved register. The first instruction
1315 has to be "pushl %reg". */
1316 if ((buf
[0] & 0xf8) != 0x50)
1322 /* The next instruction has to be "leal 8(%esp), %reg". */
1323 if (buf
[1] != 0x8d || buf
[3] != 0x24 || buf
[4] != 0x8)
1326 /* MOD must be binary 10 and R/M must be binary 100. */
1327 if ((buf
[2] & 0xc7) != 0x44)
1330 /* REG has register number. Registers in pushl and leal have to
1332 if (reg
!= ((buf
[2] >> 3) & 7))
1338 /* Rigister can't be %esp nor %ebp. */
1339 if (reg
== 4 || reg
== 5)
1342 /* The next instruction has to be "andl $-XXX, %esp". */
1343 if (buf
[offset
+ 1] != 0xe4
1344 || (buf
[offset
] != 0x81 && buf
[offset
] != 0x83))
1347 offset_and
= offset
;
1348 offset
+= buf
[offset
] == 0x81 ? 6 : 3;
1350 /* The next instruction has to be "pushl -4(%reg)". 8bit -4 is
1351 0xfc. REG must be binary 110 and MOD must be binary 01. */
1352 if (buf
[offset
] != 0xff
1353 || buf
[offset
+ 2] != 0xfc
1354 || (buf
[offset
+ 1] & 0xf8) != 0x70)
1357 /* R/M has register. Registers in leal and pushl have to be the
1359 if (reg
!= (buf
[offset
+ 1] & 7))
1362 if (current_pc
> pc
+ offset_and
)
1363 cache
->saved_sp_reg
= regnums
[reg
];
1365 return std::min (pc
+ offset
+ 3, current_pc
);
1368 /* Maximum instruction length we need to handle. */
1369 #define I386_MAX_MATCHED_INSN_LEN 6
1371 /* Instruction description. */
1375 gdb_byte insn
[I386_MAX_MATCHED_INSN_LEN
];
1376 gdb_byte mask
[I386_MAX_MATCHED_INSN_LEN
];
1379 /* Return whether instruction at PC matches PATTERN. */
1382 i386_match_pattern (CORE_ADDR pc
, struct i386_insn pattern
)
1386 if (target_read_code (pc
, &op
, 1))
1389 if ((op
& pattern
.mask
[0]) == pattern
.insn
[0])
1391 gdb_byte buf
[I386_MAX_MATCHED_INSN_LEN
- 1];
1392 int insn_matched
= 1;
1395 gdb_assert (pattern
.len
> 1);
1396 gdb_assert (pattern
.len
<= I386_MAX_MATCHED_INSN_LEN
);
1398 if (target_read_code (pc
+ 1, buf
, pattern
.len
- 1))
1401 for (i
= 1; i
< pattern
.len
; i
++)
1403 if ((buf
[i
- 1] & pattern
.mask
[i
]) != pattern
.insn
[i
])
1406 return insn_matched
;
1411 /* Search for the instruction at PC in the list INSN_PATTERNS. Return
1412 the first instruction description that matches. Otherwise, return
1415 static struct i386_insn
*
1416 i386_match_insn (CORE_ADDR pc
, struct i386_insn
*insn_patterns
)
1418 struct i386_insn
*pattern
;
1420 for (pattern
= insn_patterns
; pattern
->len
> 0; pattern
++)
1422 if (i386_match_pattern (pc
, *pattern
))
1429 /* Return whether PC points inside a sequence of instructions that
1430 matches INSN_PATTERNS. */
1433 i386_match_insn_block (CORE_ADDR pc
, struct i386_insn
*insn_patterns
)
1435 CORE_ADDR current_pc
;
1437 struct i386_insn
*insn
;
1439 insn
= i386_match_insn (pc
, insn_patterns
);
1444 ix
= insn
- insn_patterns
;
1445 for (i
= ix
- 1; i
>= 0; i
--)
1447 current_pc
-= insn_patterns
[i
].len
;
1449 if (!i386_match_pattern (current_pc
, insn_patterns
[i
]))
1453 current_pc
= pc
+ insn
->len
;
1454 for (insn
= insn_patterns
+ ix
+ 1; insn
->len
> 0; insn
++)
1456 if (!i386_match_pattern (current_pc
, *insn
))
1459 current_pc
+= insn
->len
;
1465 /* Some special instructions that might be migrated by GCC into the
1466 part of the prologue that sets up the new stack frame. Because the
1467 stack frame hasn't been setup yet, no registers have been saved
1468 yet, and only the scratch registers %eax, %ecx and %edx can be
1471 static i386_insn i386_frame_setup_skip_insns
[] =
1473 /* Check for `movb imm8, r' and `movl imm32, r'.
1475 ??? Should we handle 16-bit operand-sizes here? */
1477 /* `movb imm8, %al' and `movb imm8, %ah' */
1478 /* `movb imm8, %cl' and `movb imm8, %ch' */
1479 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
1480 /* `movb imm8, %dl' and `movb imm8, %dh' */
1481 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
1482 /* `movl imm32, %eax' and `movl imm32, %ecx' */
1483 { 5, { 0xb8 }, { 0xfe } },
1484 /* `movl imm32, %edx' */
1485 { 5, { 0xba }, { 0xff } },
1487 /* Check for `mov imm32, r32'. Note that there is an alternative
1488 encoding for `mov m32, %eax'.
1490 ??? Should we handle SIB addressing here?
1491 ??? Should we handle 16-bit operand-sizes here? */
1493 /* `movl m32, %eax' */
1494 { 5, { 0xa1 }, { 0xff } },
1495 /* `movl m32, %eax' and `mov; m32, %ecx' */
1496 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
1497 /* `movl m32, %edx' */
1498 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
1500 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
1501 Because of the symmetry, there are actually two ways to encode
1502 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
1503 opcode bytes 0x31 and 0x33 for `xorl'. */
1505 /* `subl %eax, %eax' */
1506 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
1507 /* `subl %ecx, %ecx' */
1508 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
1509 /* `subl %edx, %edx' */
1510 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
1511 /* `xorl %eax, %eax' */
1512 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
1513 /* `xorl %ecx, %ecx' */
1514 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
1515 /* `xorl %edx, %edx' */
1516 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
1520 /* Check whether PC points to an endbr32 instruction. */
1522 i386_skip_endbr (CORE_ADDR pc
)
1524 static const gdb_byte endbr32
[] = { 0xf3, 0x0f, 0x1e, 0xfb };
1526 gdb_byte buf
[sizeof (endbr32
)];
1528 /* Stop there if we can't read the code */
1529 if (target_read_code (pc
, buf
, sizeof (endbr32
)))
1532 /* If the instruction isn't an endbr32, stop */
1533 if (memcmp (buf
, endbr32
, sizeof (endbr32
)) != 0)
1536 return pc
+ sizeof (endbr32
);
1539 /* Check whether PC points to a no-op instruction. */
1541 i386_skip_noop (CORE_ADDR pc
)
1546 if (target_read_code (pc
, &op
, 1))
1552 /* Ignore `nop' instruction. */
1556 if (target_read_code (pc
, &op
, 1))
1560 /* Ignore no-op instruction `mov %edi, %edi'.
1561 Microsoft system dlls often start with
1562 a `mov %edi,%edi' instruction.
1563 The 5 bytes before the function start are
1564 filled with `nop' instructions.
1565 This pattern can be used for hot-patching:
1566 The `mov %edi, %edi' instruction can be replaced by a
1567 near jump to the location of the 5 `nop' instructions
1568 which can be replaced by a 32-bit jump to anywhere
1569 in the 32-bit address space. */
1571 else if (op
== 0x8b)
1573 if (target_read_code (pc
+ 1, &op
, 1))
1579 if (target_read_code (pc
, &op
, 1))
1589 /* Check whether PC points at a code that sets up a new stack frame.
1590 If so, it updates CACHE and returns the address of the first
1591 instruction after the sequence that sets up the frame or LIMIT,
1592 whichever is smaller. If we don't recognize the code, return PC. */
1595 i386_analyze_frame_setup (struct gdbarch
*gdbarch
,
1596 CORE_ADDR pc
, CORE_ADDR limit
,
1597 struct i386_frame_cache
*cache
)
1599 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1600 struct i386_insn
*insn
;
1607 if (target_read_code (pc
, &op
, 1))
1610 if (op
== 0x55) /* pushl %ebp */
1612 /* Take into account that we've executed the `pushl %ebp' that
1613 starts this instruction sequence. */
1614 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
1615 cache
->sp_offset
+= 4;
1618 /* If that's all, return now. */
1622 /* Check for some special instructions that might be migrated by
1623 GCC into the prologue and skip them. At this point in the
1624 prologue, code should only touch the scratch registers %eax,
1625 %ecx and %edx, so while the number of possibilities is sheer,
1628 Make sure we only skip these instructions if we later see the
1629 `movl %esp, %ebp' that actually sets up the frame. */
1630 while (pc
+ skip
< limit
)
1632 insn
= i386_match_insn (pc
+ skip
, i386_frame_setup_skip_insns
);
1639 /* If that's all, return now. */
1640 if (limit
<= pc
+ skip
)
1643 if (target_read_code (pc
+ skip
, &op
, 1))
1646 /* The i386 prologue looks like
1652 and a different prologue can be generated for atom.
1656 lea -0x10(%esp),%esp
1658 We handle both of them here. */
1662 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
1664 if (read_code_unsigned_integer (pc
+ skip
+ 1, 1, byte_order
)
1670 if (read_code_unsigned_integer (pc
+ skip
+ 1, 1, byte_order
)
1675 case 0x8d: /* Check for 'lea (%ebp), %ebp'. */
1676 if (read_code_unsigned_integer (pc
+ skip
+ 1, 2, byte_order
)
1685 /* OK, we actually have a frame. We just don't know how large
1686 it is yet. Set its size to zero. We'll adjust it if
1687 necessary. We also now commit to skipping the special
1688 instructions mentioned before. */
1691 /* If that's all, return now. */
1695 /* Check for stack adjustment
1701 NOTE: You can't subtract a 16-bit immediate from a 32-bit
1702 reg, so we don't have to worry about a data16 prefix. */
1703 if (target_read_code (pc
, &op
, 1))
1707 /* `subl' with 8-bit immediate. */
1708 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0xec)
1709 /* Some instruction starting with 0x83 other than `subl'. */
1712 /* `subl' with signed 8-bit immediate (though it wouldn't
1713 make sense to be negative). */
1714 cache
->locals
= read_code_integer (pc
+ 2, 1, byte_order
);
1717 else if (op
== 0x81)
1719 /* Maybe it is `subl' with a 32-bit immediate. */
1720 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0xec)
1721 /* Some instruction starting with 0x81 other than `subl'. */
1724 /* It is `subl' with a 32-bit immediate. */
1725 cache
->locals
= read_code_integer (pc
+ 2, 4, byte_order
);
1728 else if (op
== 0x8d)
1730 /* The ModR/M byte is 0x64. */
1731 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0x64)
1733 /* 'lea' with 8-bit displacement. */
1734 cache
->locals
= -1 * read_code_integer (pc
+ 3, 1, byte_order
);
1739 /* Some instruction other than `subl' nor 'lea'. */
1743 else if (op
== 0xc8) /* enter */
1745 cache
->locals
= read_code_unsigned_integer (pc
+ 1, 2, byte_order
);
1752 /* Check whether PC points at code that saves registers on the stack.
1753 If so, it updates CACHE and returns the address of the first
1754 instruction after the register saves or CURRENT_PC, whichever is
1755 smaller. Otherwise, return PC. */
1758 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
1759 struct i386_frame_cache
*cache
)
1761 CORE_ADDR offset
= 0;
1765 if (cache
->locals
> 0)
1766 offset
-= cache
->locals
;
1767 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
1769 if (target_read_code (pc
, &op
, 1))
1771 if (op
< 0x50 || op
> 0x57)
1775 cache
->saved_regs
[op
- 0x50] = offset
;
1776 cache
->sp_offset
+= 4;
1783 /* Do a full analysis of the prologue at PC and update CACHE
1784 accordingly. Bail out early if CURRENT_PC is reached. Return the
1785 address where the analysis stopped.
1787 We handle these cases:
1789 The startup sequence can be at the start of the function, or the
1790 function can start with a branch to startup code at the end.
1792 %ebp can be set up with either the 'enter' instruction, or "pushl
1793 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
1794 once used in the System V compiler).
1796 Local space is allocated just below the saved %ebp by either the
1797 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
1798 16-bit unsigned argument for space to allocate, and the 'addl'
1799 instruction could have either a signed byte, or 32-bit immediate.
1801 Next, the registers used by this function are pushed. With the
1802 System V compiler they will always be in the order: %edi, %esi,
1803 %ebx (and sometimes a harmless bug causes it to also save but not
1804 restore %eax); however, the code below is willing to see the pushes
1805 in any order, and will handle up to 8 of them.
1807 If the setup sequence is at the end of the function, then the next
1808 instruction will be a branch back to the start. */
1811 i386_analyze_prologue (struct gdbarch
*gdbarch
,
1812 CORE_ADDR pc
, CORE_ADDR current_pc
,
1813 struct i386_frame_cache
*cache
)
1815 pc
= i386_skip_endbr (pc
);
1816 pc
= i386_skip_noop (pc
);
1817 pc
= i386_follow_jump (gdbarch
, pc
);
1818 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
1819 pc
= i386_skip_probe (pc
);
1820 pc
= i386_analyze_stack_align (pc
, current_pc
, cache
);
1821 pc
= i386_analyze_frame_setup (gdbarch
, pc
, current_pc
, cache
);
1822 return i386_analyze_register_saves (pc
, current_pc
, cache
);
1825 /* Return PC of first real instruction. */
1828 i386_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
)
1830 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1832 static gdb_byte pic_pat
[6] =
1834 0xe8, 0, 0, 0, 0, /* call 0x0 */
1835 0x5b, /* popl %ebx */
1837 struct i386_frame_cache cache
;
1841 CORE_ADDR func_addr
;
1843 if (find_pc_partial_function (start_pc
, NULL
, &func_addr
, NULL
))
1845 CORE_ADDR post_prologue_pc
1846 = skip_prologue_using_sal (gdbarch
, func_addr
);
1847 struct compunit_symtab
*cust
= find_pc_compunit_symtab (func_addr
);
1849 /* LLVM backend (Clang/Flang) always emits a line note before the
1850 prologue and another one after. We trust clang and newer Intel
1851 compilers to emit usable line notes. */
1852 if (post_prologue_pc
1854 && COMPUNIT_PRODUCER (cust
) != NULL
1855 && (producer_is_llvm (COMPUNIT_PRODUCER (cust
))
1856 || producer_is_icc_ge_19 (COMPUNIT_PRODUCER (cust
)))))
1857 return std::max (start_pc
, post_prologue_pc
);
1861 pc
= i386_analyze_prologue (gdbarch
, start_pc
, 0xffffffff, &cache
);
1862 if (cache
.locals
< 0)
1865 /* Found valid frame setup. */
1867 /* The native cc on SVR4 in -K PIC mode inserts the following code
1868 to get the address of the global offset table (GOT) into register
1873 movl %ebx,x(%ebp) (optional)
1876 This code is with the rest of the prologue (at the end of the
1877 function), so we have to skip it to get to the first real
1878 instruction at the start of the function. */
1880 for (i
= 0; i
< 6; i
++)
1882 if (target_read_code (pc
+ i
, &op
, 1))
1885 if (pic_pat
[i
] != op
)
1892 if (target_read_code (pc
+ delta
, &op
, 1))
1895 if (op
== 0x89) /* movl %ebx, x(%ebp) */
1897 op
= read_code_unsigned_integer (pc
+ delta
+ 1, 1, byte_order
);
1899 if (op
== 0x5d) /* One byte offset from %ebp. */
1901 else if (op
== 0x9d) /* Four byte offset from %ebp. */
1903 else /* Unexpected instruction. */
1906 if (target_read_code (pc
+ delta
, &op
, 1))
1911 if (delta
> 0 && op
== 0x81
1912 && read_code_unsigned_integer (pc
+ delta
+ 1, 1, byte_order
)
1919 /* If the function starts with a branch (to startup code at the end)
1920 the last instruction should bring us back to the first
1921 instruction of the real code. */
1922 if (i386_follow_jump (gdbarch
, start_pc
) != start_pc
)
1923 pc
= i386_follow_jump (gdbarch
, pc
);
1928 /* Check that the code pointed to by PC corresponds to a call to
1929 __main, skip it if so. Return PC otherwise. */
1932 i386_skip_main_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1934 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1937 if (target_read_code (pc
, &op
, 1))
1943 if (target_read_code (pc
+ 1, buf
, sizeof buf
) == 0)
1945 /* Make sure address is computed correctly as a 32bit
1946 integer even if CORE_ADDR is 64 bit wide. */
1947 struct bound_minimal_symbol s
;
1948 CORE_ADDR call_dest
;
1950 call_dest
= pc
+ 5 + extract_signed_integer (buf
, 4, byte_order
);
1951 call_dest
= call_dest
& 0xffffffffU
;
1952 s
= lookup_minimal_symbol_by_pc (call_dest
);
1953 if (s
.minsym
!= NULL
1954 && s
.minsym
->linkage_name () != NULL
1955 && strcmp (s
.minsym
->linkage_name (), "__main") == 0)
1963 /* This function is 64-bit safe. */
1966 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1970 frame_unwind_register (next_frame
, gdbarch_pc_regnum (gdbarch
), buf
);
1971 return extract_typed_address (buf
, builtin_type (gdbarch
)->builtin_func_ptr
);
1975 /* Normal frames. */
1978 i386_frame_cache_1 (struct frame_info
*this_frame
,
1979 struct i386_frame_cache
*cache
)
1981 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1982 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1986 cache
->pc
= get_frame_func (this_frame
);
1988 /* In principle, for normal frames, %ebp holds the frame pointer,
1989 which holds the base address for the current stack frame.
1990 However, for functions that don't need it, the frame pointer is
1991 optional. For these "frameless" functions the frame pointer is
1992 actually the frame pointer of the calling frame. Signal
1993 trampolines are just a special case of a "frameless" function.
1994 They (usually) share their frame pointer with the frame that was
1995 in progress when the signal occurred. */
1997 get_frame_register (this_frame
, I386_EBP_REGNUM
, buf
);
1998 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
);
1999 if (cache
->base
== 0)
2005 /* For normal frames, %eip is stored at 4(%ebp). */
2006 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
2009 i386_analyze_prologue (gdbarch
, cache
->pc
, get_frame_pc (this_frame
),
2012 if (cache
->locals
< 0)
2014 /* We didn't find a valid frame, which means that CACHE->base
2015 currently holds the frame pointer for our calling frame. If
2016 we're at the start of a function, or somewhere half-way its
2017 prologue, the function's frame probably hasn't been fully
2018 setup yet. Try to reconstruct the base address for the stack
2019 frame by looking at the stack pointer. For truly "frameless"
2020 functions this might work too. */
2022 if (cache
->saved_sp_reg
!= -1)
2024 /* Saved stack pointer has been saved. */
2025 get_frame_register (this_frame
, cache
->saved_sp_reg
, buf
);
2026 cache
->saved_sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2028 /* We're halfway aligning the stack. */
2029 cache
->base
= ((cache
->saved_sp
- 4) & 0xfffffff0) - 4;
2030 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->saved_sp
- 4;
2032 /* This will be added back below. */
2033 cache
->saved_regs
[I386_EIP_REGNUM
] -= cache
->base
;
2035 else if (cache
->pc
!= 0
2036 || target_read_code (get_frame_pc (this_frame
), buf
, 1))
2038 /* We're in a known function, but did not find a frame
2039 setup. Assume that the function does not use %ebp.
2040 Alternatively, we may have jumped to an invalid
2041 address; in that case there is definitely no new
2043 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2044 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
)
2048 /* We're in an unknown function. We could not find the start
2049 of the function to analyze the prologue; our best option is
2050 to assume a typical frame layout with the caller's %ebp
2052 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
2055 if (cache
->saved_sp_reg
!= -1)
2057 /* Saved stack pointer has been saved (but the SAVED_SP_REG
2058 register may be unavailable). */
2059 if (cache
->saved_sp
== 0
2060 && deprecated_frame_register_read (this_frame
,
2061 cache
->saved_sp_reg
, buf
))
2062 cache
->saved_sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2064 /* Now that we have the base address for the stack frame we can
2065 calculate the value of %esp in the calling frame. */
2066 else if (cache
->saved_sp
== 0)
2067 cache
->saved_sp
= cache
->base
+ 8;
2069 /* Adjust all the saved registers such that they contain addresses
2070 instead of offsets. */
2071 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
2072 if (cache
->saved_regs
[i
] != -1)
2073 cache
->saved_regs
[i
] += cache
->base
;
2078 static struct i386_frame_cache
*
2079 i386_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2081 struct i386_frame_cache
*cache
;
2084 return (struct i386_frame_cache
*) *this_cache
;
2086 cache
= i386_alloc_frame_cache ();
2087 *this_cache
= cache
;
2091 i386_frame_cache_1 (this_frame
, cache
);
2093 catch (const gdb_exception_error
&ex
)
2095 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2103 i386_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2104 struct frame_id
*this_id
)
2106 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2109 (*this_id
) = frame_id_build_unavailable_stack (cache
->pc
);
2110 else if (cache
->base
== 0)
2112 /* This marks the outermost frame. */
2116 /* See the end of i386_push_dummy_call. */
2117 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
2121 static enum unwind_stop_reason
2122 i386_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2125 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2128 return UNWIND_UNAVAILABLE
;
2130 /* This marks the outermost frame. */
2131 if (cache
->base
== 0)
2132 return UNWIND_OUTERMOST
;
2134 return UNWIND_NO_REASON
;
2137 static struct value
*
2138 i386_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
2141 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2143 gdb_assert (regnum
>= 0);
2145 /* The System V ABI says that:
2147 "The flags register contains the system flags, such as the
2148 direction flag and the carry flag. The direction flag must be
2149 set to the forward (that is, zero) direction before entry and
2150 upon exit from a function. Other user flags have no specified
2151 role in the standard calling sequence and are not preserved."
2153 To guarantee the "upon exit" part of that statement we fake a
2154 saved flags register that has its direction flag cleared.
2156 Note that GCC doesn't seem to rely on the fact that the direction
2157 flag is cleared after a function return; it always explicitly
2158 clears the flag before operations where it matters.
2160 FIXME: kettenis/20030316: I'm not quite sure whether this is the
2161 right thing to do. The way we fake the flags register here makes
2162 it impossible to change it. */
2164 if (regnum
== I386_EFLAGS_REGNUM
)
2168 val
= get_frame_register_unsigned (this_frame
, regnum
);
2170 return frame_unwind_got_constant (this_frame
, regnum
, val
);
2173 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
2174 return frame_unwind_got_register (this_frame
, regnum
, I386_EAX_REGNUM
);
2176 if (regnum
== I386_ESP_REGNUM
2177 && (cache
->saved_sp
!= 0 || cache
->saved_sp_reg
!= -1))
2179 /* If the SP has been saved, but we don't know where, then this
2180 means that SAVED_SP_REG register was found unavailable back
2181 when we built the cache. */
2182 if (cache
->saved_sp
== 0)
2183 return frame_unwind_got_register (this_frame
, regnum
,
2184 cache
->saved_sp_reg
);
2186 return frame_unwind_got_constant (this_frame
, regnum
,
2190 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
2191 return frame_unwind_got_memory (this_frame
, regnum
,
2192 cache
->saved_regs
[regnum
]);
2194 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
2197 static const struct frame_unwind i386_frame_unwind
=
2200 i386_frame_unwind_stop_reason
,
2202 i386_frame_prev_register
,
2204 default_frame_sniffer
2207 /* Normal frames, but in a function epilogue. */
2209 /* Implement the stack_frame_destroyed_p gdbarch method.
2211 The epilogue is defined here as the 'ret' instruction, which will
2212 follow any instruction such as 'leave' or 'pop %ebp' that destroys
2213 the function's stack frame. */
2216 i386_stack_frame_destroyed_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
2219 struct compunit_symtab
*cust
;
2221 cust
= find_pc_compunit_symtab (pc
);
2222 if (cust
!= NULL
&& COMPUNIT_EPILOGUE_UNWIND_VALID (cust
))
2225 if (target_read_memory (pc
, &insn
, 1))
2226 return 0; /* Can't read memory at pc. */
2228 if (insn
!= 0xc3) /* 'ret' instruction. */
2235 i386_epilogue_frame_sniffer (const struct frame_unwind
*self
,
2236 struct frame_info
*this_frame
,
2237 void **this_prologue_cache
)
2239 if (frame_relative_level (this_frame
) == 0)
2240 return i386_stack_frame_destroyed_p (get_frame_arch (this_frame
),
2241 get_frame_pc (this_frame
));
2246 static struct i386_frame_cache
*
2247 i386_epilogue_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2249 struct i386_frame_cache
*cache
;
2253 return (struct i386_frame_cache
*) *this_cache
;
2255 cache
= i386_alloc_frame_cache ();
2256 *this_cache
= cache
;
2260 cache
->pc
= get_frame_func (this_frame
);
2262 /* At this point the stack looks as if we just entered the
2263 function, with the return address at the top of the
2265 sp
= get_frame_register_unsigned (this_frame
, I386_ESP_REGNUM
);
2266 cache
->base
= sp
+ cache
->sp_offset
;
2267 cache
->saved_sp
= cache
->base
+ 8;
2268 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->base
+ 4;
2272 catch (const gdb_exception_error
&ex
)
2274 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2281 static enum unwind_stop_reason
2282 i386_epilogue_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2285 struct i386_frame_cache
*cache
=
2286 i386_epilogue_frame_cache (this_frame
, this_cache
);
2289 return UNWIND_UNAVAILABLE
;
2291 return UNWIND_NO_REASON
;
2295 i386_epilogue_frame_this_id (struct frame_info
*this_frame
,
2297 struct frame_id
*this_id
)
2299 struct i386_frame_cache
*cache
=
2300 i386_epilogue_frame_cache (this_frame
, this_cache
);
2303 (*this_id
) = frame_id_build_unavailable_stack (cache
->pc
);
2305 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
2308 static struct value
*
2309 i386_epilogue_frame_prev_register (struct frame_info
*this_frame
,
2310 void **this_cache
, int regnum
)
2312 /* Make sure we've initialized the cache. */
2313 i386_epilogue_frame_cache (this_frame
, this_cache
);
2315 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
2318 static const struct frame_unwind i386_epilogue_frame_unwind
=
2321 i386_epilogue_frame_unwind_stop_reason
,
2322 i386_epilogue_frame_this_id
,
2323 i386_epilogue_frame_prev_register
,
2325 i386_epilogue_frame_sniffer
2329 /* Stack-based trampolines. */
2331 /* These trampolines are used on cross x86 targets, when taking the
2332 address of a nested function. When executing these trampolines,
2333 no stack frame is set up, so we are in a similar situation as in
2334 epilogues and i386_epilogue_frame_this_id can be re-used. */
2336 /* Static chain passed in register. */
2338 static i386_insn i386_tramp_chain_in_reg_insns
[] =
2340 /* `movl imm32, %eax' and `movl imm32, %ecx' */
2341 { 5, { 0xb8 }, { 0xfe } },
2344 { 5, { 0xe9 }, { 0xff } },
2349 /* Static chain passed on stack (when regparm=3). */
2351 static i386_insn i386_tramp_chain_on_stack_insns
[] =
2354 { 5, { 0x68 }, { 0xff } },
2357 { 5, { 0xe9 }, { 0xff } },
2362 /* Return whether PC points inside a stack trampoline. */
2365 i386_in_stack_tramp_p (CORE_ADDR pc
)
2370 /* A stack trampoline is detected if no name is associated
2371 to the current pc and if it points inside a trampoline
2374 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2378 if (target_read_memory (pc
, &insn
, 1))
2381 if (!i386_match_insn_block (pc
, i386_tramp_chain_in_reg_insns
)
2382 && !i386_match_insn_block (pc
, i386_tramp_chain_on_stack_insns
))
2389 i386_stack_tramp_frame_sniffer (const struct frame_unwind
*self
,
2390 struct frame_info
*this_frame
,
2393 if (frame_relative_level (this_frame
) == 0)
2394 return i386_in_stack_tramp_p (get_frame_pc (this_frame
));
2399 static const struct frame_unwind i386_stack_tramp_frame_unwind
=
2402 i386_epilogue_frame_unwind_stop_reason
,
2403 i386_epilogue_frame_this_id
,
2404 i386_epilogue_frame_prev_register
,
2406 i386_stack_tramp_frame_sniffer
2409 /* Generate a bytecode expression to get the value of the saved PC. */
2412 i386_gen_return_address (struct gdbarch
*gdbarch
,
2413 struct agent_expr
*ax
, struct axs_value
*value
,
2416 /* The following sequence assumes the traditional use of the base
2418 ax_reg (ax
, I386_EBP_REGNUM
);
2420 ax_simple (ax
, aop_add
);
2421 value
->type
= register_type (gdbarch
, I386_EIP_REGNUM
);
2422 value
->kind
= axs_lvalue_memory
;
2426 /* Signal trampolines. */
2428 static struct i386_frame_cache
*
2429 i386_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2431 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2432 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2433 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2434 struct i386_frame_cache
*cache
;
2439 return (struct i386_frame_cache
*) *this_cache
;
2441 cache
= i386_alloc_frame_cache ();
2445 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2446 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
) - 4;
2448 addr
= tdep
->sigcontext_addr (this_frame
);
2449 if (tdep
->sc_reg_offset
)
2453 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
2455 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
2456 if (tdep
->sc_reg_offset
[i
] != -1)
2457 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
2461 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
2462 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
2467 catch (const gdb_exception_error
&ex
)
2469 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2473 *this_cache
= cache
;
2477 static enum unwind_stop_reason
2478 i386_sigtramp_frame_unwind_stop_reason (struct frame_info
*this_frame
,
2481 struct i386_frame_cache
*cache
=
2482 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2485 return UNWIND_UNAVAILABLE
;
2487 return UNWIND_NO_REASON
;
2491 i386_sigtramp_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2492 struct frame_id
*this_id
)
2494 struct i386_frame_cache
*cache
=
2495 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2498 (*this_id
) = frame_id_build_unavailable_stack (get_frame_pc (this_frame
));
2501 /* See the end of i386_push_dummy_call. */
2502 (*this_id
) = frame_id_build (cache
->base
+ 8, get_frame_pc (this_frame
));
2506 static struct value
*
2507 i386_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2508 void **this_cache
, int regnum
)
2510 /* Make sure we've initialized the cache. */
2511 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2513 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
2517 i386_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2518 struct frame_info
*this_frame
,
2519 void **this_prologue_cache
)
2521 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
2523 /* We shouldn't even bother if we don't have a sigcontext_addr
2525 if (tdep
->sigcontext_addr
== NULL
)
2528 if (tdep
->sigtramp_p
!= NULL
)
2530 if (tdep
->sigtramp_p (this_frame
))
2534 if (tdep
->sigtramp_start
!= 0)
2536 CORE_ADDR pc
= get_frame_pc (this_frame
);
2538 gdb_assert (tdep
->sigtramp_end
!= 0);
2539 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
2546 static const struct frame_unwind i386_sigtramp_frame_unwind
=
2549 i386_sigtramp_frame_unwind_stop_reason
,
2550 i386_sigtramp_frame_this_id
,
2551 i386_sigtramp_frame_prev_register
,
2553 i386_sigtramp_frame_sniffer
2558 i386_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
2560 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2565 static const struct frame_base i386_frame_base
=
2568 i386_frame_base_address
,
2569 i386_frame_base_address
,
2570 i386_frame_base_address
2573 static struct frame_id
2574 i386_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
2578 fp
= get_frame_register_unsigned (this_frame
, I386_EBP_REGNUM
);
2580 /* See the end of i386_push_dummy_call. */
2581 return frame_id_build (fp
+ 8, get_frame_pc (this_frame
));
2584 /* _Decimal128 function return values need 16-byte alignment on the
2588 i386_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
2590 return sp
& -(CORE_ADDR
)16;
2594 /* Figure out where the longjmp will land. Slurp the args out of the
2595 stack. We expect the first arg to be a pointer to the jmp_buf
2596 structure from which we extract the address that we will land at.
2597 This address is copied into PC. This routine returns non-zero on
2601 i386_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
2604 CORE_ADDR sp
, jb_addr
;
2605 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2606 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2607 int jb_pc_offset
= gdbarch_tdep (gdbarch
)->jb_pc_offset
;
2609 /* If JB_PC_OFFSET is -1, we have no way to find out where the
2610 longjmp will land. */
2611 if (jb_pc_offset
== -1)
2614 get_frame_register (frame
, I386_ESP_REGNUM
, buf
);
2615 sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2616 if (target_read_memory (sp
+ 4, buf
, 4))
2619 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
2620 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, 4))
2623 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
2628 /* Check whether TYPE must be 16-byte-aligned when passed as a
2629 function argument. 16-byte vectors, _Decimal128 and structures or
2630 unions containing such types must be 16-byte-aligned; other
2631 arguments are 4-byte-aligned. */
2634 i386_16_byte_align_p (struct type
*type
)
2636 type
= check_typedef (type
);
2637 if ((type
->code () == TYPE_CODE_DECFLOAT
2638 || (type
->code () == TYPE_CODE_ARRAY
&& type
->is_vector ()))
2639 && TYPE_LENGTH (type
) == 16)
2641 if (type
->code () == TYPE_CODE_ARRAY
)
2642 return i386_16_byte_align_p (TYPE_TARGET_TYPE (type
));
2643 if (type
->code () == TYPE_CODE_STRUCT
2644 || type
->code () == TYPE_CODE_UNION
)
2647 for (i
= 0; i
< type
->num_fields (); i
++)
2649 if (field_is_static (&type
->field (i
)))
2651 if (i386_16_byte_align_p (type
->field (i
).type ()))
2658 /* Implementation for set_gdbarch_push_dummy_code. */
2661 i386_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
2662 struct value
**args
, int nargs
, struct type
*value_type
,
2663 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
2664 struct regcache
*regcache
)
2666 /* Use 0xcc breakpoint - 1 byte. */
2670 /* Keep the stack aligned. */
2674 /* The "push_dummy_call" gdbarch method, optionally with the thiscall
2675 calling convention. */
2678 i386_thiscall_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2679 struct regcache
*regcache
, CORE_ADDR bp_addr
,
2680 int nargs
, struct value
**args
, CORE_ADDR sp
,
2681 function_call_return_method return_method
,
2682 CORE_ADDR struct_addr
, bool thiscall
)
2684 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2690 /* BND registers can be in arbitrary values at the moment of the
2691 inferior call. This can cause boundary violations that are not
2692 due to a real bug or even desired by the user. The best to be done
2693 is set the BND registers to allow access to the whole memory, INIT
2694 state, before pushing the inferior call. */
2695 i387_reset_bnd_regs (gdbarch
, regcache
);
2697 /* Determine the total space required for arguments and struct
2698 return address in a first pass (allowing for 16-byte-aligned
2699 arguments), then push arguments in a second pass. */
2701 for (write_pass
= 0; write_pass
< 2; write_pass
++)
2703 int args_space_used
= 0;
2705 if (return_method
== return_method_struct
)
2709 /* Push value address. */
2710 store_unsigned_integer (buf
, 4, byte_order
, struct_addr
);
2711 write_memory (sp
, buf
, 4);
2712 args_space_used
+= 4;
2718 for (i
= thiscall
? 1 : 0; i
< nargs
; i
++)
2720 int len
= TYPE_LENGTH (value_enclosing_type (args
[i
]));
2724 if (i386_16_byte_align_p (value_enclosing_type (args
[i
])))
2725 args_space_used
= align_up (args_space_used
, 16);
2727 write_memory (sp
+ args_space_used
,
2728 value_contents_all (args
[i
]), len
);
2729 /* The System V ABI says that:
2731 "An argument's size is increased, if necessary, to make it a
2732 multiple of [32-bit] words. This may require tail padding,
2733 depending on the size of the argument."
2735 This makes sure the stack stays word-aligned. */
2736 args_space_used
+= align_up (len
, 4);
2740 if (i386_16_byte_align_p (value_enclosing_type (args
[i
])))
2741 args_space
= align_up (args_space
, 16);
2742 args_space
+= align_up (len
, 4);
2750 /* The original System V ABI only requires word alignment,
2751 but modern incarnations need 16-byte alignment in order
2752 to support SSE. Since wasting a few bytes here isn't
2753 harmful we unconditionally enforce 16-byte alignment. */
2758 /* Store return address. */
2760 store_unsigned_integer (buf
, 4, byte_order
, bp_addr
);
2761 write_memory (sp
, buf
, 4);
2763 /* Finally, update the stack pointer... */
2764 store_unsigned_integer (buf
, 4, byte_order
, sp
);
2765 regcache
->cooked_write (I386_ESP_REGNUM
, buf
);
2767 /* ...and fake a frame pointer. */
2768 regcache
->cooked_write (I386_EBP_REGNUM
, buf
);
2770 /* The 'this' pointer needs to be in ECX. */
2772 regcache
->cooked_write (I386_ECX_REGNUM
, value_contents_all (args
[0]));
2774 /* MarkK wrote: This "+ 8" is all over the place:
2775 (i386_frame_this_id, i386_sigtramp_frame_this_id,
2776 i386_dummy_id). It's there, since all frame unwinders for
2777 a given target have to agree (within a certain margin) on the
2778 definition of the stack address of a frame. Otherwise frame id
2779 comparison might not work correctly. Since DWARF2/GCC uses the
2780 stack address *before* the function call as a frame's CFA. On
2781 the i386, when %ebp is used as a frame pointer, the offset
2782 between the contents %ebp and the CFA as defined by GCC. */
2786 /* Implement the "push_dummy_call" gdbarch method. */
2789 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2790 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
2791 struct value
**args
, CORE_ADDR sp
,
2792 function_call_return_method return_method
,
2793 CORE_ADDR struct_addr
)
2795 return i386_thiscall_push_dummy_call (gdbarch
, function
, regcache
, bp_addr
,
2796 nargs
, args
, sp
, return_method
,
2797 struct_addr
, false);
2800 /* These registers are used for returning integers (and on some
2801 targets also for returning `struct' and `union' values when their
2802 size and alignment match an integer type). */
2803 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
2804 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
2806 /* Read, for architecture GDBARCH, a function return value of TYPE
2807 from REGCACHE, and copy that into VALBUF. */
2810 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2811 struct regcache
*regcache
, gdb_byte
*valbuf
)
2813 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2814 int len
= TYPE_LENGTH (type
);
2815 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
2817 if (type
->code () == TYPE_CODE_FLT
)
2819 if (tdep
->st0_regnum
< 0)
2821 warning (_("Cannot find floating-point return value."));
2822 memset (valbuf
, 0, len
);
2826 /* Floating-point return values can be found in %st(0). Convert
2827 its contents to the desired type. This is probably not
2828 exactly how it would happen on the target itself, but it is
2829 the best we can do. */
2830 regcache
->raw_read (I386_ST0_REGNUM
, buf
);
2831 target_float_convert (buf
, i387_ext_type (gdbarch
), valbuf
, type
);
2835 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
2836 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
2838 if (len
<= low_size
)
2840 regcache
->raw_read (LOW_RETURN_REGNUM
, buf
);
2841 memcpy (valbuf
, buf
, len
);
2843 else if (len
<= (low_size
+ high_size
))
2845 regcache
->raw_read (LOW_RETURN_REGNUM
, buf
);
2846 memcpy (valbuf
, buf
, low_size
);
2847 regcache
->raw_read (HIGH_RETURN_REGNUM
, buf
);
2848 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
2851 internal_error (__FILE__
, __LINE__
,
2852 _("Cannot extract return value of %d bytes long."),
2857 /* Write, for architecture GDBARCH, a function return value of TYPE
2858 from VALBUF into REGCACHE. */
2861 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2862 struct regcache
*regcache
, const gdb_byte
*valbuf
)
2864 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2865 int len
= TYPE_LENGTH (type
);
2867 if (type
->code () == TYPE_CODE_FLT
)
2870 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
2872 if (tdep
->st0_regnum
< 0)
2874 warning (_("Cannot set floating-point return value."));
2878 /* Returning floating-point values is a bit tricky. Apart from
2879 storing the return value in %st(0), we have to simulate the
2880 state of the FPU at function return point. */
2882 /* Convert the value found in VALBUF to the extended
2883 floating-point format used by the FPU. This is probably
2884 not exactly how it would happen on the target itself, but
2885 it is the best we can do. */
2886 target_float_convert (valbuf
, type
, buf
, i387_ext_type (gdbarch
));
2887 regcache
->raw_write (I386_ST0_REGNUM
, buf
);
2889 /* Set the top of the floating-point register stack to 7. The
2890 actual value doesn't really matter, but 7 is what a normal
2891 function return would end up with if the program started out
2892 with a freshly initialized FPU. */
2893 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
2895 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
2897 /* Mark %st(1) through %st(7) as empty. Since we set the top of
2898 the floating-point register stack to 7, the appropriate value
2899 for the tag word is 0x3fff. */
2900 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);
2904 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
2905 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
2907 if (len
<= low_size
)
2908 regcache
->raw_write_part (LOW_RETURN_REGNUM
, 0, len
, valbuf
);
2909 else if (len
<= (low_size
+ high_size
))
2911 regcache
->raw_write (LOW_RETURN_REGNUM
, valbuf
);
2912 regcache
->raw_write_part (HIGH_RETURN_REGNUM
, 0, len
- low_size
,
2916 internal_error (__FILE__
, __LINE__
,
2917 _("Cannot store return value of %d bytes long."), len
);
2922 /* This is the variable that is set with "set struct-convention", and
2923 its legitimate values. */
2924 static const char default_struct_convention
[] = "default";
2925 static const char pcc_struct_convention
[] = "pcc";
2926 static const char reg_struct_convention
[] = "reg";
2927 static const char *const valid_conventions
[] =
2929 default_struct_convention
,
2930 pcc_struct_convention
,
2931 reg_struct_convention
,
2934 static const char *struct_convention
= default_struct_convention
;
2936 /* Return non-zero if TYPE, which is assumed to be a structure,
2937 a union type, or an array type, should be returned in registers
2938 for architecture GDBARCH. */
2941 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
2943 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2944 enum type_code code
= type
->code ();
2945 int len
= TYPE_LENGTH (type
);
2947 gdb_assert (code
== TYPE_CODE_STRUCT
2948 || code
== TYPE_CODE_UNION
2949 || code
== TYPE_CODE_ARRAY
);
2951 if (struct_convention
== pcc_struct_convention
2952 || (struct_convention
== default_struct_convention
2953 && tdep
->struct_return
== pcc_struct_return
))
2956 /* Structures consisting of a single `float', `double' or 'long
2957 double' member are returned in %st(0). */
2958 if (code
== TYPE_CODE_STRUCT
&& type
->num_fields () == 1)
2960 type
= check_typedef (type
->field (0).type ());
2961 if (type
->code () == TYPE_CODE_FLT
)
2962 return (len
== 4 || len
== 8 || len
== 12);
2965 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
2968 /* Determine, for architecture GDBARCH, how a return value of TYPE
2969 should be returned. If it is supposed to be returned in registers,
2970 and READBUF is non-zero, read the appropriate value from REGCACHE,
2971 and copy it into READBUF. If WRITEBUF is non-zero, write the value
2972 from WRITEBUF into REGCACHE. */
2974 static enum return_value_convention
2975 i386_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
2976 struct type
*type
, struct regcache
*regcache
,
2977 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
2979 enum type_code code
= type
->code ();
2981 if (((code
== TYPE_CODE_STRUCT
2982 || code
== TYPE_CODE_UNION
2983 || code
== TYPE_CODE_ARRAY
)
2984 && !i386_reg_struct_return_p (gdbarch
, type
))
2985 /* Complex double and long double uses the struct return convention. */
2986 || (code
== TYPE_CODE_COMPLEX
&& TYPE_LENGTH (type
) == 16)
2987 || (code
== TYPE_CODE_COMPLEX
&& TYPE_LENGTH (type
) == 24)
2988 /* 128-bit decimal float uses the struct return convention. */
2989 || (code
== TYPE_CODE_DECFLOAT
&& TYPE_LENGTH (type
) == 16))
2991 /* The System V ABI says that:
2993 "A function that returns a structure or union also sets %eax
2994 to the value of the original address of the caller's area
2995 before it returns. Thus when the caller receives control
2996 again, the address of the returned object resides in register
2997 %eax and can be used to access the object."
2999 So the ABI guarantees that we can always find the return
3000 value just after the function has returned. */
3002 /* Note that the ABI doesn't mention functions returning arrays,
3003 which is something possible in certain languages such as Ada.
3004 In this case, the value is returned as if it was wrapped in
3005 a record, so the convention applied to records also applies
3012 regcache_raw_read_unsigned (regcache
, I386_EAX_REGNUM
, &addr
);
3013 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
3016 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
3019 /* This special case is for structures consisting of a single
3020 `float', `double' or 'long double' member. These structures are
3021 returned in %st(0). For these structures, we call ourselves
3022 recursively, changing TYPE into the type of the first member of
3023 the structure. Since that should work for all structures that
3024 have only one member, we don't bother to check the member's type
3026 if (code
== TYPE_CODE_STRUCT
&& type
->num_fields () == 1)
3028 type
= check_typedef (type
->field (0).type ());
3029 return i386_return_value (gdbarch
, function
, type
, regcache
,
3034 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
3036 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
3038 return RETURN_VALUE_REGISTER_CONVENTION
;
3043 i387_ext_type (struct gdbarch
*gdbarch
)
3045 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3047 if (!tdep
->i387_ext_type
)
3049 tdep
->i387_ext_type
= tdesc_find_type (gdbarch
, "i387_ext");
3050 gdb_assert (tdep
->i387_ext_type
!= NULL
);
3053 return tdep
->i387_ext_type
;
3056 /* Construct type for pseudo BND registers. We can't use
3057 tdesc_find_type since a complement of one value has to be used
3058 to describe the upper bound. */
3060 static struct type
*
3061 i386_bnd_type (struct gdbarch
*gdbarch
)
3063 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3066 if (!tdep
->i386_bnd_type
)
3069 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3071 /* The type we're building is described bellow: */
3076 void *ubound
; /* One complement of raw ubound field. */
3080 t
= arch_composite_type (gdbarch
,
3081 "__gdb_builtin_type_bound128", TYPE_CODE_STRUCT
);
3083 append_composite_type_field (t
, "lbound", bt
->builtin_data_ptr
);
3084 append_composite_type_field (t
, "ubound", bt
->builtin_data_ptr
);
3086 t
->set_name ("builtin_type_bound128");
3087 tdep
->i386_bnd_type
= t
;
3090 return tdep
->i386_bnd_type
;
3093 /* Construct vector type for pseudo ZMM registers. We can't use
3094 tdesc_find_type since ZMM isn't described in target description. */
3096 static struct type
*
3097 i386_zmm_type (struct gdbarch
*gdbarch
)
3099 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3101 if (!tdep
->i386_zmm_type
)
3103 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3105 /* The type we're building is this: */
3107 union __gdb_builtin_type_vec512i
3109 int128_t v4_int128
[4];
3110 int64_t v8_int64
[8];
3111 int32_t v16_int32
[16];
3112 int16_t v32_int16
[32];
3113 int8_t v64_int8
[64];
3114 double v8_double
[8];
3115 float v16_float
[16];
3116 bfloat16_t v32_bfloat16
[32];
3122 t
= arch_composite_type (gdbarch
,
3123 "__gdb_builtin_type_vec512i", TYPE_CODE_UNION
);
3124 append_composite_type_field (t
, "v32_bfloat16",
3125 init_vector_type (bt
->builtin_bfloat16
, 32));
3126 append_composite_type_field (t
, "v16_float",
3127 init_vector_type (bt
->builtin_float
, 16));
3128 append_composite_type_field (t
, "v8_double",
3129 init_vector_type (bt
->builtin_double
, 8));
3130 append_composite_type_field (t
, "v64_int8",
3131 init_vector_type (bt
->builtin_int8
, 64));
3132 append_composite_type_field (t
, "v32_int16",
3133 init_vector_type (bt
->builtin_int16
, 32));
3134 append_composite_type_field (t
, "v16_int32",
3135 init_vector_type (bt
->builtin_int32
, 16));
3136 append_composite_type_field (t
, "v8_int64",
3137 init_vector_type (bt
->builtin_int64
, 8));
3138 append_composite_type_field (t
, "v4_int128",
3139 init_vector_type (bt
->builtin_int128
, 4));
3141 t
->set_is_vector (true);
3142 t
->set_name ("builtin_type_vec512i");
3143 tdep
->i386_zmm_type
= t
;
3146 return tdep
->i386_zmm_type
;
3149 /* Construct vector type for pseudo YMM registers. We can't use
3150 tdesc_find_type since YMM isn't described in target description. */
3152 static struct type
*
3153 i386_ymm_type (struct gdbarch
*gdbarch
)
3155 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3157 if (!tdep
->i386_ymm_type
)
3159 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3161 /* The type we're building is this: */
3163 union __gdb_builtin_type_vec256i
3165 int128_t v2_int128
[2];
3166 int64_t v4_int64
[4];
3167 int32_t v8_int32
[8];
3168 int16_t v16_int16
[16];
3169 int8_t v32_int8
[32];
3170 double v4_double
[4];
3172 bfloat16_t v16_bfloat16
[16];
3178 t
= arch_composite_type (gdbarch
,
3179 "__gdb_builtin_type_vec256i", TYPE_CODE_UNION
);
3180 append_composite_type_field (t
, "v16_bfloat16",
3181 init_vector_type (bt
->builtin_bfloat16
, 16));
3182 append_composite_type_field (t
, "v8_float",
3183 init_vector_type (bt
->builtin_float
, 8));
3184 append_composite_type_field (t
, "v4_double",
3185 init_vector_type (bt
->builtin_double
, 4));
3186 append_composite_type_field (t
, "v32_int8",
3187 init_vector_type (bt
->builtin_int8
, 32));
3188 append_composite_type_field (t
, "v16_int16",
3189 init_vector_type (bt
->builtin_int16
, 16));
3190 append_composite_type_field (t
, "v8_int32",
3191 init_vector_type (bt
->builtin_int32
, 8));
3192 append_composite_type_field (t
, "v4_int64",
3193 init_vector_type (bt
->builtin_int64
, 4));
3194 append_composite_type_field (t
, "v2_int128",
3195 init_vector_type (bt
->builtin_int128
, 2));
3197 t
->set_is_vector (true);
3198 t
->set_name ("builtin_type_vec256i");
3199 tdep
->i386_ymm_type
= t
;
3202 return tdep
->i386_ymm_type
;
3205 /* Construct vector type for MMX registers. */
3206 static struct type
*
3207 i386_mmx_type (struct gdbarch
*gdbarch
)
3209 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3211 if (!tdep
->i386_mmx_type
)
3213 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3215 /* The type we're building is this: */
3217 union __gdb_builtin_type_vec64i
3220 int32_t v2_int32
[2];
3221 int16_t v4_int16
[4];
3228 t
= arch_composite_type (gdbarch
,
3229 "__gdb_builtin_type_vec64i", TYPE_CODE_UNION
);
3231 append_composite_type_field (t
, "uint64", bt
->builtin_int64
);
3232 append_composite_type_field (t
, "v2_int32",
3233 init_vector_type (bt
->builtin_int32
, 2));
3234 append_composite_type_field (t
, "v4_int16",
3235 init_vector_type (bt
->builtin_int16
, 4));
3236 append_composite_type_field (t
, "v8_int8",
3237 init_vector_type (bt
->builtin_int8
, 8));
3239 t
->set_is_vector (true);
3240 t
->set_name ("builtin_type_vec64i");
3241 tdep
->i386_mmx_type
= t
;
3244 return tdep
->i386_mmx_type
;
3247 /* Return the GDB type object for the "standard" data type of data in
3251 i386_pseudo_register_type (struct gdbarch
*gdbarch
, int regnum
)
3253 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3254 return i386_bnd_type (gdbarch
);
3255 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3256 return i386_mmx_type (gdbarch
);
3257 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3258 return i386_ymm_type (gdbarch
);
3259 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3260 return i386_ymm_type (gdbarch
);
3261 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3262 return i386_zmm_type (gdbarch
);
3265 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3266 if (i386_byte_regnum_p (gdbarch
, regnum
))
3267 return bt
->builtin_int8
;
3268 else if (i386_word_regnum_p (gdbarch
, regnum
))
3269 return bt
->builtin_int16
;
3270 else if (i386_dword_regnum_p (gdbarch
, regnum
))
3271 return bt
->builtin_int32
;
3272 else if (i386_k_regnum_p (gdbarch
, regnum
))
3273 return bt
->builtin_int64
;
3276 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3279 /* Map a cooked register onto a raw register or memory. For the i386,
3280 the MMX registers need to be mapped onto floating point registers. */
3283 i386_mmx_regnum_to_fp_regnum (readable_regcache
*regcache
, int regnum
)
3285 struct gdbarch_tdep
*tdep
= gdbarch_tdep (regcache
->arch ());
3290 mmxreg
= regnum
- tdep
->mm0_regnum
;
3291 regcache
->raw_read (I387_FSTAT_REGNUM (tdep
), &fstat
);
3292 tos
= (fstat
>> 11) & 0x7;
3293 fpreg
= (mmxreg
+ tos
) % 8;
3295 return (I387_ST0_REGNUM (tdep
) + fpreg
);
3298 /* A helper function for us by i386_pseudo_register_read_value and
3299 amd64_pseudo_register_read_value. It does all the work but reads
3300 the data into an already-allocated value. */
3303 i386_pseudo_register_read_into_value (struct gdbarch
*gdbarch
,
3304 readable_regcache
*regcache
,
3306 struct value
*result_value
)
3308 gdb_byte raw_buf
[I386_MAX_REGISTER_SIZE
];
3309 enum register_status status
;
3310 gdb_byte
*buf
= value_contents_raw (result_value
);
3312 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3314 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
3316 /* Extract (always little endian). */
3317 status
= regcache
->raw_read (fpnum
, raw_buf
);
3318 if (status
!= REG_VALID
)
3319 mark_value_bytes_unavailable (result_value
, 0,
3320 TYPE_LENGTH (value_type (result_value
)));
3322 memcpy (buf
, raw_buf
, register_size (gdbarch
, regnum
));
3326 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3327 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3329 regnum
-= tdep
->bnd0_regnum
;
3331 /* Extract (always little endian). Read lower 128bits. */
3332 status
= regcache
->raw_read (I387_BND0R_REGNUM (tdep
) + regnum
,
3334 if (status
!= REG_VALID
)
3335 mark_value_bytes_unavailable (result_value
, 0, 16);
3338 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
3339 LONGEST upper
, lower
;
3340 int size
= TYPE_LENGTH (builtin_type (gdbarch
)->builtin_data_ptr
);
3342 lower
= extract_unsigned_integer (raw_buf
, 8, byte_order
);
3343 upper
= extract_unsigned_integer (raw_buf
+ 8, 8, byte_order
);
3346 memcpy (buf
, &lower
, size
);
3347 memcpy (buf
+ size
, &upper
, size
);
3350 else if (i386_k_regnum_p (gdbarch
, regnum
))
3352 regnum
-= tdep
->k0_regnum
;
3354 /* Extract (always little endian). */
3355 status
= regcache
->raw_read (tdep
->k0_regnum
+ regnum
, raw_buf
);
3356 if (status
!= REG_VALID
)
3357 mark_value_bytes_unavailable (result_value
, 0, 8);
3359 memcpy (buf
, raw_buf
, 8);
3361 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3363 regnum
-= tdep
->zmm0_regnum
;
3365 if (regnum
< num_lower_zmm_regs
)
3367 /* Extract (always little endian). Read lower 128bits. */
3368 status
= regcache
->raw_read (I387_XMM0_REGNUM (tdep
) + regnum
,
3370 if (status
!= REG_VALID
)
3371 mark_value_bytes_unavailable (result_value
, 0, 16);
3373 memcpy (buf
, raw_buf
, 16);
3375 /* Extract (always little endian). Read upper 128bits. */
3376 status
= regcache
->raw_read (tdep
->ymm0h_regnum
+ regnum
,
3378 if (status
!= REG_VALID
)
3379 mark_value_bytes_unavailable (result_value
, 16, 16);
3381 memcpy (buf
+ 16, raw_buf
, 16);
3385 /* Extract (always little endian). Read lower 128bits. */
3386 status
= regcache
->raw_read (I387_XMM16_REGNUM (tdep
) + regnum
3387 - num_lower_zmm_regs
,
3389 if (status
!= REG_VALID
)
3390 mark_value_bytes_unavailable (result_value
, 0, 16);
3392 memcpy (buf
, raw_buf
, 16);
3394 /* Extract (always little endian). Read upper 128bits. */
3395 status
= regcache
->raw_read (I387_YMM16H_REGNUM (tdep
) + regnum
3396 - num_lower_zmm_regs
,
3398 if (status
!= REG_VALID
)
3399 mark_value_bytes_unavailable (result_value
, 16, 16);
3401 memcpy (buf
+ 16, raw_buf
, 16);
3404 /* Read upper 256bits. */
3405 status
= regcache
->raw_read (tdep
->zmm0h_regnum
+ regnum
,
3407 if (status
!= REG_VALID
)
3408 mark_value_bytes_unavailable (result_value
, 32, 32);
3410 memcpy (buf
+ 32, raw_buf
, 32);
3412 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3414 regnum
-= tdep
->ymm0_regnum
;
3416 /* Extract (always little endian). Read lower 128bits. */
3417 status
= regcache
->raw_read (I387_XMM0_REGNUM (tdep
) + regnum
,
3419 if (status
!= REG_VALID
)
3420 mark_value_bytes_unavailable (result_value
, 0, 16);
3422 memcpy (buf
, raw_buf
, 16);
3423 /* Read upper 128bits. */
3424 status
= regcache
->raw_read (tdep
->ymm0h_regnum
+ regnum
,
3426 if (status
!= REG_VALID
)
3427 mark_value_bytes_unavailable (result_value
, 16, 32);
3429 memcpy (buf
+ 16, raw_buf
, 16);
3431 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3433 regnum
-= tdep
->ymm16_regnum
;
3434 /* Extract (always little endian). Read lower 128bits. */
3435 status
= regcache
->raw_read (I387_XMM16_REGNUM (tdep
) + regnum
,
3437 if (status
!= REG_VALID
)
3438 mark_value_bytes_unavailable (result_value
, 0, 16);
3440 memcpy (buf
, raw_buf
, 16);
3441 /* Read upper 128bits. */
3442 status
= regcache
->raw_read (tdep
->ymm16h_regnum
+ regnum
,
3444 if (status
!= REG_VALID
)
3445 mark_value_bytes_unavailable (result_value
, 16, 16);
3447 memcpy (buf
+ 16, raw_buf
, 16);
3449 else if (i386_word_regnum_p (gdbarch
, regnum
))
3451 int gpnum
= regnum
- tdep
->ax_regnum
;
3453 /* Extract (always little endian). */
3454 status
= regcache
->raw_read (gpnum
, raw_buf
);
3455 if (status
!= REG_VALID
)
3456 mark_value_bytes_unavailable (result_value
, 0,
3457 TYPE_LENGTH (value_type (result_value
)));
3459 memcpy (buf
, raw_buf
, 2);
3461 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3463 int gpnum
= regnum
- tdep
->al_regnum
;
3465 /* Extract (always little endian). We read both lower and
3467 status
= regcache
->raw_read (gpnum
% 4, raw_buf
);
3468 if (status
!= REG_VALID
)
3469 mark_value_bytes_unavailable (result_value
, 0,
3470 TYPE_LENGTH (value_type (result_value
)));
3471 else if (gpnum
>= 4)
3472 memcpy (buf
, raw_buf
+ 1, 1);
3474 memcpy (buf
, raw_buf
, 1);
3477 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3481 static struct value
*
3482 i386_pseudo_register_read_value (struct gdbarch
*gdbarch
,
3483 readable_regcache
*regcache
,
3486 struct value
*result
;
3488 result
= allocate_value (register_type (gdbarch
, regnum
));
3489 VALUE_LVAL (result
) = lval_register
;
3490 VALUE_REGNUM (result
) = regnum
;
3492 i386_pseudo_register_read_into_value (gdbarch
, regcache
, regnum
, result
);
3498 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3499 int regnum
, const gdb_byte
*buf
)
3501 gdb_byte raw_buf
[I386_MAX_REGISTER_SIZE
];
3503 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3505 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
3508 regcache
->raw_read (fpnum
, raw_buf
);
3509 /* ... Modify ... (always little endian). */
3510 memcpy (raw_buf
, buf
, register_size (gdbarch
, regnum
));
3512 regcache
->raw_write (fpnum
, raw_buf
);
3516 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3518 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3520 ULONGEST upper
, lower
;
3521 int size
= TYPE_LENGTH (builtin_type (gdbarch
)->builtin_data_ptr
);
3522 enum bfd_endian byte_order
= gdbarch_byte_order (target_gdbarch ());
3524 /* New values from input value. */
3525 regnum
-= tdep
->bnd0_regnum
;
3526 lower
= extract_unsigned_integer (buf
, size
, byte_order
);
3527 upper
= extract_unsigned_integer (buf
+ size
, size
, byte_order
);
3529 /* Fetching register buffer. */
3530 regcache
->raw_read (I387_BND0R_REGNUM (tdep
) + regnum
,
3535 /* Set register bits. */
3536 memcpy (raw_buf
, &lower
, 8);
3537 memcpy (raw_buf
+ 8, &upper
, 8);
3539 regcache
->raw_write (I387_BND0R_REGNUM (tdep
) + regnum
, raw_buf
);
3541 else if (i386_k_regnum_p (gdbarch
, regnum
))
3543 regnum
-= tdep
->k0_regnum
;
3545 regcache
->raw_write (tdep
->k0_regnum
+ regnum
, buf
);
3547 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3549 regnum
-= tdep
->zmm0_regnum
;
3551 if (regnum
< num_lower_zmm_regs
)
3553 /* Write lower 128bits. */
3554 regcache
->raw_write (I387_XMM0_REGNUM (tdep
) + regnum
, buf
);
3555 /* Write upper 128bits. */
3556 regcache
->raw_write (I387_YMM0_REGNUM (tdep
) + regnum
, buf
+ 16);
3560 /* Write lower 128bits. */
3561 regcache
->raw_write (I387_XMM16_REGNUM (tdep
) + regnum
3562 - num_lower_zmm_regs
, buf
);
3563 /* Write upper 128bits. */
3564 regcache
->raw_write (I387_YMM16H_REGNUM (tdep
) + regnum
3565 - num_lower_zmm_regs
, buf
+ 16);
3567 /* Write upper 256bits. */
3568 regcache
->raw_write (tdep
->zmm0h_regnum
+ regnum
, buf
+ 32);
3570 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3572 regnum
-= tdep
->ymm0_regnum
;
3574 /* ... Write lower 128bits. */
3575 regcache
->raw_write (I387_XMM0_REGNUM (tdep
) + regnum
, buf
);
3576 /* ... Write upper 128bits. */
3577 regcache
->raw_write (tdep
->ymm0h_regnum
+ regnum
, buf
+ 16);
3579 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3581 regnum
-= tdep
->ymm16_regnum
;
3583 /* ... Write lower 128bits. */
3584 regcache
->raw_write (I387_XMM16_REGNUM (tdep
) + regnum
, buf
);
3585 /* ... Write upper 128bits. */
3586 regcache
->raw_write (tdep
->ymm16h_regnum
+ regnum
, buf
+ 16);
3588 else if (i386_word_regnum_p (gdbarch
, regnum
))
3590 int gpnum
= regnum
- tdep
->ax_regnum
;
3593 regcache
->raw_read (gpnum
, raw_buf
);
3594 /* ... Modify ... (always little endian). */
3595 memcpy (raw_buf
, buf
, 2);
3597 regcache
->raw_write (gpnum
, raw_buf
);
3599 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3601 int gpnum
= regnum
- tdep
->al_regnum
;
3603 /* Read ... We read both lower and upper registers. */
3604 regcache
->raw_read (gpnum
% 4, raw_buf
);
3605 /* ... Modify ... (always little endian). */
3607 memcpy (raw_buf
+ 1, buf
, 1);
3609 memcpy (raw_buf
, buf
, 1);
3611 regcache
->raw_write (gpnum
% 4, raw_buf
);
3614 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3618 /* Implement the 'ax_pseudo_register_collect' gdbarch method. */
3621 i386_ax_pseudo_register_collect (struct gdbarch
*gdbarch
,
3622 struct agent_expr
*ax
, int regnum
)
3624 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3626 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3628 /* MMX to FPU register mapping depends on current TOS. Let's just
3629 not care and collect everything... */
3632 ax_reg_mask (ax
, I387_FSTAT_REGNUM (tdep
));
3633 for (i
= 0; i
< 8; i
++)
3634 ax_reg_mask (ax
, I387_ST0_REGNUM (tdep
) + i
);
3637 else if (i386_bnd_regnum_p (gdbarch
, regnum
))
3639 regnum
-= tdep
->bnd0_regnum
;
3640 ax_reg_mask (ax
, I387_BND0R_REGNUM (tdep
) + regnum
);
3643 else if (i386_k_regnum_p (gdbarch
, regnum
))
3645 regnum
-= tdep
->k0_regnum
;
3646 ax_reg_mask (ax
, tdep
->k0_regnum
+ regnum
);
3649 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3651 regnum
-= tdep
->zmm0_regnum
;
3652 if (regnum
< num_lower_zmm_regs
)
3654 ax_reg_mask (ax
, I387_XMM0_REGNUM (tdep
) + regnum
);
3655 ax_reg_mask (ax
, tdep
->ymm0h_regnum
+ regnum
);
3659 ax_reg_mask (ax
, I387_XMM16_REGNUM (tdep
) + regnum
3660 - num_lower_zmm_regs
);
3661 ax_reg_mask (ax
, I387_YMM16H_REGNUM (tdep
) + regnum
3662 - num_lower_zmm_regs
);
3664 ax_reg_mask (ax
, tdep
->zmm0h_regnum
+ regnum
);
3667 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3669 regnum
-= tdep
->ymm0_regnum
;
3670 ax_reg_mask (ax
, I387_XMM0_REGNUM (tdep
) + regnum
);
3671 ax_reg_mask (ax
, tdep
->ymm0h_regnum
+ regnum
);
3674 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3676 regnum
-= tdep
->ymm16_regnum
;
3677 ax_reg_mask (ax
, I387_XMM16_REGNUM (tdep
) + regnum
);
3678 ax_reg_mask (ax
, tdep
->ymm16h_regnum
+ regnum
);
3681 else if (i386_word_regnum_p (gdbarch
, regnum
))
3683 int gpnum
= regnum
- tdep
->ax_regnum
;
3685 ax_reg_mask (ax
, gpnum
);
3688 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3690 int gpnum
= regnum
- tdep
->al_regnum
;
3692 ax_reg_mask (ax
, gpnum
% 4);
3696 internal_error (__FILE__
, __LINE__
, _("invalid regnum"));
3701 /* Return the register number of the register allocated by GCC after
3702 REGNUM, or -1 if there is no such register. */
3705 i386_next_regnum (int regnum
)
3707 /* GCC allocates the registers in the order:
3709 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
3711 Since storing a variable in %esp doesn't make any sense we return
3712 -1 for %ebp and for %esp itself. */
3713 static int next_regnum
[] =
3715 I386_EDX_REGNUM
, /* Slot for %eax. */
3716 I386_EBX_REGNUM
, /* Slot for %ecx. */
3717 I386_ECX_REGNUM
, /* Slot for %edx. */
3718 I386_ESI_REGNUM
, /* Slot for %ebx. */
3719 -1, -1, /* Slots for %esp and %ebp. */
3720 I386_EDI_REGNUM
, /* Slot for %esi. */
3721 I386_EBP_REGNUM
/* Slot for %edi. */
3724 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
3725 return next_regnum
[regnum
];
3730 /* Return nonzero if a value of type TYPE stored in register REGNUM
3731 needs any special handling. */
3734 i386_convert_register_p (struct gdbarch
*gdbarch
,
3735 int regnum
, struct type
*type
)
3737 int len
= TYPE_LENGTH (type
);
3739 /* Values may be spread across multiple registers. Most debugging
3740 formats aren't expressive enough to specify the locations, so
3741 some heuristics is involved. Right now we only handle types that
3742 have a length that is a multiple of the word size, since GCC
3743 doesn't seem to put any other types into registers. */
3744 if (len
> 4 && len
% 4 == 0)
3746 int last_regnum
= regnum
;
3750 last_regnum
= i386_next_regnum (last_regnum
);
3754 if (last_regnum
!= -1)
3758 return i387_convert_register_p (gdbarch
, regnum
, type
);
3761 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
3762 return its contents in TO. */
3765 i386_register_to_value (struct frame_info
*frame
, int regnum
,
3766 struct type
*type
, gdb_byte
*to
,
3767 int *optimizedp
, int *unavailablep
)
3769 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
3770 int len
= TYPE_LENGTH (type
);
3772 if (i386_fp_regnum_p (gdbarch
, regnum
))
3773 return i387_register_to_value (frame
, regnum
, type
, to
,
3774 optimizedp
, unavailablep
);
3776 /* Read a value spread across multiple registers. */
3778 gdb_assert (len
> 4 && len
% 4 == 0);
3782 gdb_assert (regnum
!= -1);
3783 gdb_assert (register_size (gdbarch
, regnum
) == 4);
3785 if (!get_frame_register_bytes (frame
, regnum
, 0,
3786 gdb::make_array_view (to
,
3787 register_size (gdbarch
,
3789 optimizedp
, unavailablep
))
3792 regnum
= i386_next_regnum (regnum
);
3797 *optimizedp
= *unavailablep
= 0;
3801 /* Write the contents FROM of a value of type TYPE into register
3802 REGNUM in frame FRAME. */
3805 i386_value_to_register (struct frame_info
*frame
, int regnum
,
3806 struct type
*type
, const gdb_byte
*from
)
3808 int len
= TYPE_LENGTH (type
);
3810 if (i386_fp_regnum_p (get_frame_arch (frame
), regnum
))
3812 i387_value_to_register (frame
, regnum
, type
, from
);
3816 /* Write a value spread across multiple registers. */
3818 gdb_assert (len
> 4 && len
% 4 == 0);
3822 gdb_assert (regnum
!= -1);
3823 gdb_assert (register_size (get_frame_arch (frame
), regnum
) == 4);
3825 put_frame_register (frame
, regnum
, from
);
3826 regnum
= i386_next_regnum (regnum
);
3832 /* Supply register REGNUM from the buffer specified by GREGS and LEN
3833 in the general-purpose register set REGSET to register cache
3834 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3837 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
3838 int regnum
, const void *gregs
, size_t len
)
3840 struct gdbarch
*gdbarch
= regcache
->arch ();
3841 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3842 const gdb_byte
*regs
= (const gdb_byte
*) gregs
;
3845 gdb_assert (len
>= tdep
->sizeof_gregset
);
3847 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
3849 if ((regnum
== i
|| regnum
== -1)
3850 && tdep
->gregset_reg_offset
[i
] != -1)
3851 regcache
->raw_supply (i
, regs
+ tdep
->gregset_reg_offset
[i
]);
3855 /* Collect register REGNUM from the register cache REGCACHE and store
3856 it in the buffer specified by GREGS and LEN as described by the
3857 general-purpose register set REGSET. If REGNUM is -1, do this for
3858 all registers in REGSET. */
3861 i386_collect_gregset (const struct regset
*regset
,
3862 const struct regcache
*regcache
,
3863 int regnum
, void *gregs
, size_t len
)
3865 struct gdbarch
*gdbarch
= regcache
->arch ();
3866 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3867 gdb_byte
*regs
= (gdb_byte
*) gregs
;
3870 gdb_assert (len
>= tdep
->sizeof_gregset
);
3872 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
3874 if ((regnum
== i
|| regnum
== -1)
3875 && tdep
->gregset_reg_offset
[i
] != -1)
3876 regcache
->raw_collect (i
, regs
+ tdep
->gregset_reg_offset
[i
]);
3880 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
3881 in the floating-point register set REGSET to register cache
3882 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3885 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
3886 int regnum
, const void *fpregs
, size_t len
)
3888 struct gdbarch
*gdbarch
= regcache
->arch ();
3889 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3891 if (len
== I387_SIZEOF_FXSAVE
)
3893 i387_supply_fxsave (regcache
, regnum
, fpregs
);
3897 gdb_assert (len
>= tdep
->sizeof_fpregset
);
3898 i387_supply_fsave (regcache
, regnum
, fpregs
);
3901 /* Collect register REGNUM from the register cache REGCACHE and store
3902 it in the buffer specified by FPREGS and LEN as described by the
3903 floating-point register set REGSET. If REGNUM is -1, do this for
3904 all registers in REGSET. */
3907 i386_collect_fpregset (const struct regset
*regset
,
3908 const struct regcache
*regcache
,
3909 int regnum
, void *fpregs
, size_t len
)
3911 struct gdbarch
*gdbarch
= regcache
->arch ();
3912 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3914 if (len
== I387_SIZEOF_FXSAVE
)
3916 i387_collect_fxsave (regcache
, regnum
, fpregs
);
3920 gdb_assert (len
>= tdep
->sizeof_fpregset
);
3921 i387_collect_fsave (regcache
, regnum
, fpregs
);
3924 /* Register set definitions. */
3926 const struct regset i386_gregset
=
3928 NULL
, i386_supply_gregset
, i386_collect_gregset
3931 const struct regset i386_fpregset
=
3933 NULL
, i386_supply_fpregset
, i386_collect_fpregset
3936 /* Default iterator over core file register note sections. */
3939 i386_iterate_over_regset_sections (struct gdbarch
*gdbarch
,
3940 iterate_over_regset_sections_cb
*cb
,
3942 const struct regcache
*regcache
)
3944 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3946 cb (".reg", tdep
->sizeof_gregset
, tdep
->sizeof_gregset
, &i386_gregset
, NULL
,
3948 if (tdep
->sizeof_fpregset
)
3949 cb (".reg2", tdep
->sizeof_fpregset
, tdep
->sizeof_fpregset
, tdep
->fpregset
,
3954 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
3957 i386_pe_skip_trampoline_code (struct frame_info
*frame
,
3958 CORE_ADDR pc
, char *name
)
3960 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
3961 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3964 if (pc
&& read_memory_unsigned_integer (pc
, 2, byte_order
) == 0x25ff)
3966 unsigned long indirect
=
3967 read_memory_unsigned_integer (pc
+ 2, 4, byte_order
);
3968 struct minimal_symbol
*indsym
=
3969 indirect
? lookup_minimal_symbol_by_pc (indirect
).minsym
: 0;
3970 const char *symname
= indsym
? indsym
->linkage_name () : 0;
3974 if (startswith (symname
, "__imp_")
3975 || startswith (symname
, "_imp_"))
3977 read_memory_unsigned_integer (indirect
, 4, byte_order
);
3980 return 0; /* Not a trampoline. */
3984 /* Return whether the THIS_FRAME corresponds to a sigtramp
3988 i386_sigtramp_p (struct frame_info
*this_frame
)
3990 CORE_ADDR pc
= get_frame_pc (this_frame
);
3993 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
3994 return (name
&& strcmp ("_sigtramp", name
) == 0);
3998 /* We have two flavours of disassembly. The machinery on this page
3999 deals with switching between those. */
4002 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
4004 gdb_assert (disassembly_flavor
== att_flavor
4005 || disassembly_flavor
== intel_flavor
);
4007 info
->disassembler_options
= disassembly_flavor
;
4009 return default_print_insn (pc
, info
);
4013 /* There are a few i386 architecture variants that differ only
4014 slightly from the generic i386 target. For now, we don't give them
4015 their own source file, but include them here. As a consequence,
4016 they'll always be included. */
4018 /* System V Release 4 (SVR4). */
4020 /* Return whether THIS_FRAME corresponds to a SVR4 sigtramp
4024 i386_svr4_sigtramp_p (struct frame_info
*this_frame
)
4026 CORE_ADDR pc
= get_frame_pc (this_frame
);
4029 /* The origin of these symbols is currently unknown. */
4030 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
4031 return (name
&& (strcmp ("_sigreturn", name
) == 0
4032 || strcmp ("sigvechandler", name
) == 0));
4035 /* Assuming THIS_FRAME is for a SVR4 sigtramp routine, return the
4036 address of the associated sigcontext (ucontext) structure. */
4039 i386_svr4_sigcontext_addr (struct frame_info
*this_frame
)
4041 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
4042 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4046 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
4047 sp
= extract_unsigned_integer (buf
, 4, byte_order
);
4049 return read_memory_unsigned_integer (sp
+ 8, 4, byte_order
);
4054 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
4058 i386_stap_is_single_operand (struct gdbarch
*gdbarch
, const char *s
)
4060 return (*s
== '$' /* Literal number. */
4061 || (isdigit (*s
) && s
[1] == '(' && s
[2] == '%') /* Displacement. */
4062 || (*s
== '(' && s
[1] == '%') /* Register indirection. */
4063 || (*s
== '%' && isalpha (s
[1]))); /* Register access. */
4066 /* Helper function for i386_stap_parse_special_token.
4068 This function parses operands of the form `-8+3+1(%rbp)', which
4069 must be interpreted as `*(-8 + 3 - 1 + (void *) $eax)'.
4071 Return true if the operand was parsed successfully, false
4074 static expr::operation_up
4075 i386_stap_parse_special_token_triplet (struct gdbarch
*gdbarch
,
4076 struct stap_parse_info
*p
)
4078 const char *s
= p
->arg
;
4080 if (isdigit (*s
) || *s
== '-' || *s
== '+')
4084 long displacements
[3];
4089 got_minus
[0] = false;
4095 got_minus
[0] = true;
4098 if (!isdigit ((unsigned char) *s
))
4101 displacements
[0] = strtol (s
, &endp
, 10);
4104 if (*s
!= '+' && *s
!= '-')
4106 /* We are not dealing with a triplet. */
4110 got_minus
[1] = false;
4116 got_minus
[1] = true;
4119 if (!isdigit ((unsigned char) *s
))
4122 displacements
[1] = strtol (s
, &endp
, 10);
4125 if (*s
!= '+' && *s
!= '-')
4127 /* We are not dealing with a triplet. */
4131 got_minus
[2] = false;
4137 got_minus
[2] = true;
4140 if (!isdigit ((unsigned char) *s
))
4143 displacements
[2] = strtol (s
, &endp
, 10);
4146 if (*s
!= '(' || s
[1] != '%')
4152 while (isalnum (*s
))
4158 len
= s
- start
- 1;
4159 std::string
regname (start
, len
);
4161 if (user_reg_map_name_to_regnum (gdbarch
, regname
.c_str (), len
) == -1)
4162 error (_("Invalid register name `%s' on expression `%s'."),
4163 regname
.c_str (), p
->saved_arg
);
4166 for (i
= 0; i
< 3; i
++)
4168 LONGEST this_val
= displacements
[i
];
4170 this_val
= -this_val
;
4176 using namespace expr
;
4178 struct type
*long_type
= builtin_type (gdbarch
)->builtin_long
;
4180 = make_operation
<long_const_operation
> (long_type
, value
);
4183 = make_operation
<register_operation
> (std::move (regname
));
4184 struct type
*void_ptr
= builtin_type (gdbarch
)->builtin_data_ptr
;
4185 reg
= make_operation
<unop_cast_operation
> (std::move (reg
), void_ptr
);
4188 = make_operation
<add_operation
> (std::move (reg
), std::move (offset
));
4189 struct type
*arg_ptr_type
= lookup_pointer_type (p
->arg_type
);
4190 sum
= make_operation
<unop_cast_operation
> (std::move (sum
),
4192 return make_operation
<unop_ind_operation
> (std::move (sum
));
4198 /* Helper function for i386_stap_parse_special_token.
4200 This function parses operands of the form `register base +
4201 (register index * size) + offset', as represented in
4202 `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4204 Return true if the operand was parsed successfully, false
4207 static expr::operation_up
4208 i386_stap_parse_special_token_three_arg_disp (struct gdbarch
*gdbarch
,
4209 struct stap_parse_info
*p
)
4211 const char *s
= p
->arg
;
4213 if (isdigit (*s
) || *s
== '(' || *s
== '-' || *s
== '+')
4215 bool offset_minus
= false;
4217 bool size_minus
= false;
4228 offset_minus
= true;
4231 if (offset_minus
&& !isdigit (*s
))
4238 offset
= strtol (s
, &endp
, 10);
4242 if (*s
!= '(' || s
[1] != '%')
4248 while (isalnum (*s
))
4251 if (*s
!= ',' || s
[1] != '%')
4254 len_base
= s
- start
;
4255 std::string
base (start
, len_base
);
4257 if (user_reg_map_name_to_regnum (gdbarch
, base
.c_str (), len_base
) == -1)
4258 error (_("Invalid register name `%s' on expression `%s'."),
4259 base
.c_str (), p
->saved_arg
);
4264 while (isalnum (*s
))
4267 len_index
= s
- start
;
4268 std::string
index (start
, len_index
);
4270 if (user_reg_map_name_to_regnum (gdbarch
, index
.c_str (),
4272 error (_("Invalid register name `%s' on expression `%s'."),
4273 index
.c_str (), p
->saved_arg
);
4275 if (*s
!= ',' && *s
!= ')')
4291 size
= strtol (s
, &endp
, 10);
4301 using namespace expr
;
4303 struct type
*long_type
= builtin_type (gdbarch
)->builtin_long
;
4304 operation_up reg
= make_operation
<register_operation
> (std::move (base
));
4311 = make_operation
<long_const_operation
> (long_type
, offset
);
4312 reg
= make_operation
<add_operation
> (std::move (reg
),
4316 operation_up ind_reg
4317 = make_operation
<register_operation
> (std::move (index
));
4324 = make_operation
<long_const_operation
> (long_type
, size
);
4325 ind_reg
= make_operation
<mul_operation
> (std::move (ind_reg
),
4330 = make_operation
<add_operation
> (std::move (reg
),
4331 std::move (ind_reg
));
4333 struct type
*arg_ptr_type
= lookup_pointer_type (p
->arg_type
);
4334 sum
= make_operation
<unop_cast_operation
> (std::move (sum
),
4336 return make_operation
<unop_ind_operation
> (std::move (sum
));
4342 /* Implementation of `gdbarch_stap_parse_special_token', as defined in
4346 i386_stap_parse_special_token (struct gdbarch
*gdbarch
,
4347 struct stap_parse_info
*p
)
4349 /* The special tokens to be parsed here are:
4351 - `register base + (register index * size) + offset', as represented
4352 in `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4354 - Operands of the form `-8+3+1(%rbp)', which must be interpreted as
4355 `*(-8 + 3 - 1 + (void *) $eax)'. */
4357 expr::operation_up result
4358 = i386_stap_parse_special_token_triplet (gdbarch
, p
);
4360 if (result
== nullptr)
4361 result
= i386_stap_parse_special_token_three_arg_disp (gdbarch
, p
);
4366 /* Implementation of 'gdbarch_stap_adjust_register', as defined in
4370 i386_stap_adjust_register (struct gdbarch
*gdbarch
, struct stap_parse_info
*p
,
4371 const std::string
®name
, int regnum
)
4373 static const std::unordered_set
<std::string
> reg_assoc
4374 = { "ax", "bx", "cx", "dx",
4375 "si", "di", "bp", "sp" };
4377 /* If we are dealing with a register whose size is less than the size
4378 specified by the "[-]N@" prefix, and it is one of the registers that
4379 we know has an extended variant available, then use the extended
4380 version of the register instead. */
4381 if (register_size (gdbarch
, regnum
) < TYPE_LENGTH (p
->arg_type
)
4382 && reg_assoc
.find (regname
) != reg_assoc
.end ())
4383 return "e" + regname
;
4385 /* Otherwise, just use the requested register. */
4391 /* gdbarch gnu_triplet_regexp method. Both arches are acceptable as GDB always
4392 also supplies -m64 or -m32 by gdbarch_gcc_target_options. */
4395 i386_gnu_triplet_regexp (struct gdbarch
*gdbarch
)
4397 return "(x86_64|i.86)";
4402 /* Implement the "in_indirect_branch_thunk" gdbarch function. */
4405 i386_in_indirect_branch_thunk (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
4407 return x86_in_indirect_branch_thunk (pc
, i386_register_names
,
4408 I386_EAX_REGNUM
, I386_EIP_REGNUM
);
4414 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
4416 static const char *const stap_integer_prefixes
[] = { "$", NULL
};
4417 static const char *const stap_register_prefixes
[] = { "%", NULL
};
4418 static const char *const stap_register_indirection_prefixes
[] = { "(",
4420 static const char *const stap_register_indirection_suffixes
[] = { ")",
4423 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
4424 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
4426 /* Registering SystemTap handlers. */
4427 set_gdbarch_stap_integer_prefixes (gdbarch
, stap_integer_prefixes
);
4428 set_gdbarch_stap_register_prefixes (gdbarch
, stap_register_prefixes
);
4429 set_gdbarch_stap_register_indirection_prefixes (gdbarch
,
4430 stap_register_indirection_prefixes
);
4431 set_gdbarch_stap_register_indirection_suffixes (gdbarch
,
4432 stap_register_indirection_suffixes
);
4433 set_gdbarch_stap_is_single_operand (gdbarch
,
4434 i386_stap_is_single_operand
);
4435 set_gdbarch_stap_parse_special_token (gdbarch
,
4436 i386_stap_parse_special_token
);
4437 set_gdbarch_stap_adjust_register (gdbarch
,
4438 i386_stap_adjust_register
);
4440 set_gdbarch_in_indirect_branch_thunk (gdbarch
,
4441 i386_in_indirect_branch_thunk
);
4444 /* System V Release 4 (SVR4). */
4447 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
4449 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4451 /* System V Release 4 uses ELF. */
4452 i386_elf_init_abi (info
, gdbarch
);
4454 /* System V Release 4 has shared libraries. */
4455 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
4457 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
4458 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
4459 tdep
->sc_pc_offset
= 36 + 14 * 4;
4460 tdep
->sc_sp_offset
= 36 + 17 * 4;
4462 tdep
->jb_pc_offset
= 20;
4467 /* i386 register groups. In addition to the normal groups, add "mmx"
4470 static struct reggroup
*i386_sse_reggroup
;
4471 static struct reggroup
*i386_mmx_reggroup
;
4474 i386_init_reggroups (void)
4476 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
4477 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
4481 i386_add_reggroups (struct gdbarch
*gdbarch
)
4483 reggroup_add (gdbarch
, i386_sse_reggroup
);
4484 reggroup_add (gdbarch
, i386_mmx_reggroup
);
4485 reggroup_add (gdbarch
, general_reggroup
);
4486 reggroup_add (gdbarch
, float_reggroup
);
4487 reggroup_add (gdbarch
, all_reggroup
);
4488 reggroup_add (gdbarch
, save_reggroup
);
4489 reggroup_add (gdbarch
, restore_reggroup
);
4490 reggroup_add (gdbarch
, vector_reggroup
);
4491 reggroup_add (gdbarch
, system_reggroup
);
4495 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
4496 struct reggroup
*group
)
4498 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4499 int fp_regnum_p
, mmx_regnum_p
, xmm_regnum_p
, mxcsr_regnum_p
,
4500 ymm_regnum_p
, ymmh_regnum_p
, ymm_avx512_regnum_p
, ymmh_avx512_regnum_p
,
4501 bndr_regnum_p
, bnd_regnum_p
, zmm_regnum_p
, zmmh_regnum_p
,
4502 mpx_ctrl_regnum_p
, xmm_avx512_regnum_p
,
4503 avx512_p
, avx_p
, sse_p
, pkru_regnum_p
;
4505 /* Don't include pseudo registers, except for MMX, in any register
4507 if (i386_byte_regnum_p (gdbarch
, regnum
))
4510 if (i386_word_regnum_p (gdbarch
, regnum
))
4513 if (i386_dword_regnum_p (gdbarch
, regnum
))
4516 mmx_regnum_p
= i386_mmx_regnum_p (gdbarch
, regnum
);
4517 if (group
== i386_mmx_reggroup
)
4518 return mmx_regnum_p
;
4520 pkru_regnum_p
= i386_pkru_regnum_p(gdbarch
, regnum
);
4521 xmm_regnum_p
= i386_xmm_regnum_p (gdbarch
, regnum
);
4522 xmm_avx512_regnum_p
= i386_xmm_avx512_regnum_p (gdbarch
, regnum
);
4523 mxcsr_regnum_p
= i386_mxcsr_regnum_p (gdbarch
, regnum
);
4524 if (group
== i386_sse_reggroup
)
4525 return xmm_regnum_p
|| xmm_avx512_regnum_p
|| mxcsr_regnum_p
;
4527 ymm_regnum_p
= i386_ymm_regnum_p (gdbarch
, regnum
);
4528 ymm_avx512_regnum_p
= i386_ymm_avx512_regnum_p (gdbarch
, regnum
);
4529 zmm_regnum_p
= i386_zmm_regnum_p (gdbarch
, regnum
);
4531 avx512_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4532 == X86_XSTATE_AVX_AVX512_MASK
);
4533 avx_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4534 == X86_XSTATE_AVX_MASK
) && !avx512_p
;
4535 sse_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4536 == X86_XSTATE_SSE_MASK
) && !avx512_p
&& ! avx_p
;
4538 if (group
== vector_reggroup
)
4539 return (mmx_regnum_p
4540 || (zmm_regnum_p
&& avx512_p
)
4541 || ((ymm_regnum_p
|| ymm_avx512_regnum_p
) && avx_p
)
4542 || ((xmm_regnum_p
|| xmm_avx512_regnum_p
) && sse_p
)
4545 fp_regnum_p
= (i386_fp_regnum_p (gdbarch
, regnum
)
4546 || i386_fpc_regnum_p (gdbarch
, regnum
));
4547 if (group
== float_reggroup
)
4550 /* For "info reg all", don't include upper YMM registers nor XMM
4551 registers when AVX is supported. */
4552 ymmh_regnum_p
= i386_ymmh_regnum_p (gdbarch
, regnum
);
4553 ymmh_avx512_regnum_p
= i386_ymmh_avx512_regnum_p (gdbarch
, regnum
);
4554 zmmh_regnum_p
= i386_zmmh_regnum_p (gdbarch
, regnum
);
4555 if (group
== all_reggroup
4556 && (((xmm_regnum_p
|| xmm_avx512_regnum_p
) && !sse_p
)
4557 || ((ymm_regnum_p
|| ymm_avx512_regnum_p
) && !avx_p
)
4559 || ymmh_avx512_regnum_p
4563 bnd_regnum_p
= i386_bnd_regnum_p (gdbarch
, regnum
);
4564 if (group
== all_reggroup
4565 && ((bnd_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4566 return bnd_regnum_p
;
4568 bndr_regnum_p
= i386_bndr_regnum_p (gdbarch
, regnum
);
4569 if (group
== all_reggroup
4570 && ((bndr_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4573 mpx_ctrl_regnum_p
= i386_mpx_ctrl_regnum_p (gdbarch
, regnum
);
4574 if (group
== all_reggroup
4575 && ((mpx_ctrl_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4576 return mpx_ctrl_regnum_p
;
4578 if (group
== general_reggroup
)
4579 return (!fp_regnum_p
4583 && !xmm_avx512_regnum_p
4586 && !ymm_avx512_regnum_p
4587 && !ymmh_avx512_regnum_p
4590 && !mpx_ctrl_regnum_p
4595 return default_register_reggroup_p (gdbarch
, regnum
, group
);
4599 /* Get the ARGIth function argument for the current function. */
4602 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
4605 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
4606 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4607 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
4608 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4, byte_order
);
4611 #define PREFIX_REPZ 0x01
4612 #define PREFIX_REPNZ 0x02
4613 #define PREFIX_LOCK 0x04
4614 #define PREFIX_DATA 0x08
4615 #define PREFIX_ADDR 0x10
4627 /* i386 arith/logic operations */
4640 struct i386_record_s
4642 struct gdbarch
*gdbarch
;
4643 struct regcache
*regcache
;
4644 CORE_ADDR orig_addr
;
4650 uint8_t mod
, reg
, rm
;
4659 /* Parse the "modrm" part of the memory address irp->addr points at.
4660 Returns -1 if something goes wrong, 0 otherwise. */
4663 i386_record_modrm (struct i386_record_s
*irp
)
4665 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4667 if (record_read_memory (gdbarch
, irp
->addr
, &irp
->modrm
, 1))
4671 irp
->mod
= (irp
->modrm
>> 6) & 3;
4672 irp
->reg
= (irp
->modrm
>> 3) & 7;
4673 irp
->rm
= irp
->modrm
& 7;
4678 /* Extract the memory address that the current instruction writes to,
4679 and return it in *ADDR. Return -1 if something goes wrong. */
4682 i386_record_lea_modrm_addr (struct i386_record_s
*irp
, uint64_t *addr
)
4684 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4685 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4690 if (irp
->aflag
|| irp
->regmap
[X86_RECORD_R8_REGNUM
])
4697 uint8_t base
= irp
->rm
;
4702 if (record_read_memory (gdbarch
, irp
->addr
, &byte
, 1))
4705 scale
= (byte
>> 6) & 3;
4706 index
= ((byte
>> 3) & 7) | irp
->rex_x
;
4714 if ((base
& 7) == 5)
4717 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 4))
4720 *addr
= extract_signed_integer (buf
, 4, byte_order
);
4721 if (irp
->regmap
[X86_RECORD_R8_REGNUM
] && !havesib
)
4722 *addr
+= irp
->addr
+ irp
->rip_offset
;
4726 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 1))
4729 *addr
= (int8_t) buf
[0];
4732 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 4))
4734 *addr
= extract_signed_integer (buf
, 4, byte_order
);
4742 if (base
== 4 && irp
->popl_esp_hack
)
4743 *addr
+= irp
->popl_esp_hack
;
4744 regcache_raw_read_unsigned (irp
->regcache
, irp
->regmap
[base
],
4747 if (irp
->aflag
== 2)
4752 *addr
= (uint32_t) (offset64
+ *addr
);
4754 if (havesib
&& (index
!= 4 || scale
!= 0))
4756 regcache_raw_read_unsigned (irp
->regcache
, irp
->regmap
[index
],
4758 if (irp
->aflag
== 2)
4759 *addr
+= offset64
<< scale
;
4761 *addr
= (uint32_t) (*addr
+ (offset64
<< scale
));
4766 /* Since we are in 64-bit mode with ADDR32 prefix, zero-extend
4767 address from 32-bit to 64-bit. */
4768 *addr
= (uint32_t) *addr
;
4779 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 2))
4782 *addr
= extract_signed_integer (buf
, 2, byte_order
);
4788 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 1))
4791 *addr
= (int8_t) buf
[0];
4794 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 2))
4797 *addr
= extract_signed_integer (buf
, 2, byte_order
);
4804 regcache_raw_read_unsigned (irp
->regcache
,
4805 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4807 *addr
= (uint32_t) (*addr
+ offset64
);
4808 regcache_raw_read_unsigned (irp
->regcache
,
4809 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4811 *addr
= (uint32_t) (*addr
+ offset64
);
4814 regcache_raw_read_unsigned (irp
->regcache
,
4815 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4817 *addr
= (uint32_t) (*addr
+ offset64
);
4818 regcache_raw_read_unsigned (irp
->regcache
,
4819 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4821 *addr
= (uint32_t) (*addr
+ offset64
);
4824 regcache_raw_read_unsigned (irp
->regcache
,
4825 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4827 *addr
= (uint32_t) (*addr
+ offset64
);
4828 regcache_raw_read_unsigned (irp
->regcache
,
4829 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4831 *addr
= (uint32_t) (*addr
+ offset64
);
4834 regcache_raw_read_unsigned (irp
->regcache
,
4835 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4837 *addr
= (uint32_t) (*addr
+ offset64
);
4838 regcache_raw_read_unsigned (irp
->regcache
,
4839 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4841 *addr
= (uint32_t) (*addr
+ offset64
);
4844 regcache_raw_read_unsigned (irp
->regcache
,
4845 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4847 *addr
= (uint32_t) (*addr
+ offset64
);
4850 regcache_raw_read_unsigned (irp
->regcache
,
4851 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4853 *addr
= (uint32_t) (*addr
+ offset64
);
4856 regcache_raw_read_unsigned (irp
->regcache
,
4857 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4859 *addr
= (uint32_t) (*addr
+ offset64
);
4862 regcache_raw_read_unsigned (irp
->regcache
,
4863 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4865 *addr
= (uint32_t) (*addr
+ offset64
);
4875 /* Record the address and contents of the memory that will be changed
4876 by the current instruction. Return -1 if something goes wrong, 0
4880 i386_record_lea_modrm (struct i386_record_s
*irp
)
4882 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4885 if (irp
->override
>= 0)
4887 if (record_full_memory_query
)
4890 Process record ignores the memory change of instruction at address %s\n\
4891 because it can't get the value of the segment register.\n\
4892 Do you want to stop the program?"),
4893 paddress (gdbarch
, irp
->orig_addr
)))
4900 if (i386_record_lea_modrm_addr (irp
, &addr
))
4903 if (record_full_arch_list_add_mem (addr
, 1 << irp
->ot
))
4909 /* Record the effects of a push operation. Return -1 if something
4910 goes wrong, 0 otherwise. */
4913 i386_record_push (struct i386_record_s
*irp
, int size
)
4917 if (record_full_arch_list_add_reg (irp
->regcache
,
4918 irp
->regmap
[X86_RECORD_RESP_REGNUM
]))
4920 regcache_raw_read_unsigned (irp
->regcache
,
4921 irp
->regmap
[X86_RECORD_RESP_REGNUM
],
4923 if (record_full_arch_list_add_mem ((CORE_ADDR
) addr
- size
, size
))
4930 /* Defines contents to record. */
4931 #define I386_SAVE_FPU_REGS 0xfffd
4932 #define I386_SAVE_FPU_ENV 0xfffe
4933 #define I386_SAVE_FPU_ENV_REG_STACK 0xffff
4935 /* Record the values of the floating point registers which will be
4936 changed by the current instruction. Returns -1 if something is
4937 wrong, 0 otherwise. */
4939 static int i386_record_floats (struct gdbarch
*gdbarch
,
4940 struct i386_record_s
*ir
,
4943 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
4946 /* Oza: Because of floating point insn push/pop of fpu stack is going to
4947 happen. Currently we store st0-st7 registers, but we need not store all
4948 registers all the time, in future we use ftag register and record only
4949 those who are not marked as an empty. */
4951 if (I386_SAVE_FPU_REGS
== iregnum
)
4953 for (i
= I387_ST0_REGNUM (tdep
); i
<= I387_ST0_REGNUM (tdep
) + 7; i
++)
4955 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4959 else if (I386_SAVE_FPU_ENV
== iregnum
)
4961 for (i
= I387_FCTRL_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
4963 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4967 else if (I386_SAVE_FPU_ENV_REG_STACK
== iregnum
)
4969 for (i
= I387_ST0_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
4971 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4975 else if ((iregnum
>= I387_ST0_REGNUM (tdep
)) &&
4976 (iregnum
<= I387_FOP_REGNUM (tdep
)))
4978 if (record_full_arch_list_add_reg (ir
->regcache
,iregnum
))
4983 /* Parameter error. */
4986 if(I386_SAVE_FPU_ENV
!= iregnum
)
4988 for (i
= I387_FCTRL_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
4990 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4997 /* Parse the current instruction, and record the values of the
4998 registers and memory that will be changed by the current
4999 instruction. Returns -1 if something goes wrong, 0 otherwise. */
5001 #define I386_RECORD_FULL_ARCH_LIST_ADD_REG(regnum) \
5002 record_full_arch_list_add_reg (ir.regcache, ir.regmap[(regnum)])
5005 i386_process_record (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
5006 CORE_ADDR input_addr
)
5008 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
5014 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
5015 struct i386_record_s ir
;
5016 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
5020 memset (&ir
, 0, sizeof (struct i386_record_s
));
5021 ir
.regcache
= regcache
;
5022 ir
.addr
= input_addr
;
5023 ir
.orig_addr
= input_addr
;
5027 ir
.popl_esp_hack
= 0;
5028 ir
.regmap
= tdep
->record_regmap
;
5029 ir
.gdbarch
= gdbarch
;
5031 if (record_debug
> 1)
5032 fprintf_unfiltered (gdb_stdlog
, "Process record: i386_process_record "
5034 paddress (gdbarch
, ir
.addr
));
5039 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
5042 switch (opcode8
) /* Instruction prefixes */
5044 case REPE_PREFIX_OPCODE
:
5045 prefixes
|= PREFIX_REPZ
;
5047 case REPNE_PREFIX_OPCODE
:
5048 prefixes
|= PREFIX_REPNZ
;
5050 case LOCK_PREFIX_OPCODE
:
5051 prefixes
|= PREFIX_LOCK
;
5053 case CS_PREFIX_OPCODE
:
5054 ir
.override
= X86_RECORD_CS_REGNUM
;
5056 case SS_PREFIX_OPCODE
:
5057 ir
.override
= X86_RECORD_SS_REGNUM
;
5059 case DS_PREFIX_OPCODE
:
5060 ir
.override
= X86_RECORD_DS_REGNUM
;
5062 case ES_PREFIX_OPCODE
:
5063 ir
.override
= X86_RECORD_ES_REGNUM
;
5065 case FS_PREFIX_OPCODE
:
5066 ir
.override
= X86_RECORD_FS_REGNUM
;
5068 case GS_PREFIX_OPCODE
:
5069 ir
.override
= X86_RECORD_GS_REGNUM
;
5071 case DATA_PREFIX_OPCODE
:
5072 prefixes
|= PREFIX_DATA
;
5074 case ADDR_PREFIX_OPCODE
:
5075 prefixes
|= PREFIX_ADDR
;
5077 case 0x40: /* i386 inc %eax */
5078 case 0x41: /* i386 inc %ecx */
5079 case 0x42: /* i386 inc %edx */
5080 case 0x43: /* i386 inc %ebx */
5081 case 0x44: /* i386 inc %esp */
5082 case 0x45: /* i386 inc %ebp */
5083 case 0x46: /* i386 inc %esi */
5084 case 0x47: /* i386 inc %edi */
5085 case 0x48: /* i386 dec %eax */
5086 case 0x49: /* i386 dec %ecx */
5087 case 0x4a: /* i386 dec %edx */
5088 case 0x4b: /* i386 dec %ebx */
5089 case 0x4c: /* i386 dec %esp */
5090 case 0x4d: /* i386 dec %ebp */
5091 case 0x4e: /* i386 dec %esi */
5092 case 0x4f: /* i386 dec %edi */
5093 if (ir
.regmap
[X86_RECORD_R8_REGNUM
]) /* 64 bit target */
5096 rex_w
= (opcode8
>> 3) & 1;
5097 rex_r
= (opcode8
& 0x4) << 1;
5098 ir
.rex_x
= (opcode8
& 0x2) << 2;
5099 ir
.rex_b
= (opcode8
& 0x1) << 3;
5101 else /* 32 bit target */
5110 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && rex_w
== 1)
5116 if (prefixes
& PREFIX_DATA
)
5119 if (prefixes
& PREFIX_ADDR
)
5121 else if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5124 /* Now check op code. */
5125 opcode
= (uint32_t) opcode8
;
5130 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
5133 opcode
= (uint32_t) opcode8
| 0x0f00;
5137 case 0x00: /* arith & logic */
5185 if (((opcode
>> 3) & 7) != OP_CMPL
)
5187 if ((opcode
& 1) == 0)
5190 ir
.ot
= ir
.dflag
+ OT_WORD
;
5192 switch ((opcode
>> 1) & 3)
5194 case 0: /* OP Ev, Gv */
5195 if (i386_record_modrm (&ir
))
5199 if (i386_record_lea_modrm (&ir
))
5205 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5207 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5210 case 1: /* OP Gv, Ev */
5211 if (i386_record_modrm (&ir
))
5214 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5216 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5218 case 2: /* OP A, Iv */
5219 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5223 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5226 case 0x80: /* GRP1 */
5230 if (i386_record_modrm (&ir
))
5233 if (ir
.reg
!= OP_CMPL
)
5235 if ((opcode
& 1) == 0)
5238 ir
.ot
= ir
.dflag
+ OT_WORD
;
5245 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5246 if (i386_record_lea_modrm (&ir
))
5250 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
5252 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5255 case 0x40: /* inc */
5264 case 0x48: /* dec */
5273 I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode
& 7);
5274 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5277 case 0xf6: /* GRP3 */
5279 if ((opcode
& 1) == 0)
5282 ir
.ot
= ir
.dflag
+ OT_WORD
;
5283 if (i386_record_modrm (&ir
))
5286 if (ir
.mod
!= 3 && ir
.reg
== 0)
5287 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5292 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5298 if (i386_record_lea_modrm (&ir
))
5304 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5306 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5308 if (ir
.reg
== 3) /* neg */
5309 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5315 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5316 if (ir
.ot
!= OT_BYTE
)
5317 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5318 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5322 opcode
= opcode
<< 8 | ir
.modrm
;
5328 case 0xfe: /* GRP4 */
5329 case 0xff: /* GRP5 */
5330 if (i386_record_modrm (&ir
))
5332 if (ir
.reg
>= 2 && opcode
== 0xfe)
5335 opcode
= opcode
<< 8 | ir
.modrm
;
5342 if ((opcode
& 1) == 0)
5345 ir
.ot
= ir
.dflag
+ OT_WORD
;
5348 if (i386_record_lea_modrm (&ir
))
5354 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5356 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5358 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5361 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5363 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5365 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5368 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
5369 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5371 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5375 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5378 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5380 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5385 opcode
= opcode
<< 8 | ir
.modrm
;
5391 case 0x84: /* test */
5395 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5398 case 0x98: /* CWDE/CBW */
5399 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5402 case 0x99: /* CDQ/CWD */
5403 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5404 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5407 case 0x0faf: /* imul */
5410 ir
.ot
= ir
.dflag
+ OT_WORD
;
5411 if (i386_record_modrm (&ir
))
5414 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5415 else if (opcode
== 0x6b)
5418 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5420 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5421 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5424 case 0x0fc0: /* xadd */
5426 if ((opcode
& 1) == 0)
5429 ir
.ot
= ir
.dflag
+ OT_WORD
;
5430 if (i386_record_modrm (&ir
))
5435 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5437 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5438 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5440 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5444 if (i386_record_lea_modrm (&ir
))
5446 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5448 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5450 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5453 case 0x0fb0: /* cmpxchg */
5455 if ((opcode
& 1) == 0)
5458 ir
.ot
= ir
.dflag
+ OT_WORD
;
5459 if (i386_record_modrm (&ir
))
5464 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5465 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5467 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5471 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5472 if (i386_record_lea_modrm (&ir
))
5475 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5478 case 0x0fc7: /* cmpxchg8b / rdrand / rdseed */
5479 if (i386_record_modrm (&ir
))
5483 /* rdrand and rdseed use the 3 bits of the REG field of ModR/M as
5484 an extended opcode. rdrand has bits 110 (/6) and rdseed
5485 has bits 111 (/7). */
5486 if (ir
.reg
== 6 || ir
.reg
== 7)
5488 /* The storage register is described by the 3 R/M bits, but the
5489 REX.B prefix may be used to give access to registers
5490 R8~R15. In this case ir.rex_b + R/M will give us the register
5491 in the range R8~R15.
5493 REX.W may also be used to access 64-bit registers, but we
5494 already record entire registers and not just partial bits
5496 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rex_b
+ ir
.rm
);
5497 /* These instructions also set conditional bits. */
5498 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5503 /* We don't handle this particular instruction yet. */
5505 opcode
= opcode
<< 8 | ir
.modrm
;
5509 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5510 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5511 if (i386_record_lea_modrm (&ir
))
5513 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5516 case 0x50: /* push */
5526 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5528 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5532 case 0x06: /* push es */
5533 case 0x0e: /* push cs */
5534 case 0x16: /* push ss */
5535 case 0x1e: /* push ds */
5536 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5541 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5545 case 0x0fa0: /* push fs */
5546 case 0x0fa8: /* push gs */
5547 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5552 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5556 case 0x60: /* pusha */
5557 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5562 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 4)))
5566 case 0x58: /* pop */
5574 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5575 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 0x7) | ir
.rex_b
);
5578 case 0x61: /* popa */
5579 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5584 for (regnum
= X86_RECORD_REAX_REGNUM
;
5585 regnum
<= X86_RECORD_REDI_REGNUM
;
5587 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5590 case 0x8f: /* pop */
5591 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5592 ir
.ot
= ir
.dflag
? OT_QUAD
: OT_WORD
;
5594 ir
.ot
= ir
.dflag
+ OT_WORD
;
5595 if (i386_record_modrm (&ir
))
5598 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
5601 ir
.popl_esp_hack
= 1 << ir
.ot
;
5602 if (i386_record_lea_modrm (&ir
))
5605 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5608 case 0xc8: /* enter */
5609 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
5610 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5612 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5616 case 0xc9: /* leave */
5617 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5618 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
5621 case 0x07: /* pop es */
5622 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5627 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5628 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_ES_REGNUM
);
5629 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5632 case 0x17: /* pop ss */
5633 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5638 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5639 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_SS_REGNUM
);
5640 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5643 case 0x1f: /* pop ds */
5644 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5649 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5650 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_DS_REGNUM
);
5651 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5654 case 0x0fa1: /* pop fs */
5655 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5656 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_FS_REGNUM
);
5657 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5660 case 0x0fa9: /* pop gs */
5661 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5662 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM
);
5663 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5666 case 0x88: /* mov */
5670 if ((opcode
& 1) == 0)
5673 ir
.ot
= ir
.dflag
+ OT_WORD
;
5675 if (i386_record_modrm (&ir
))
5680 if (opcode
== 0xc6 || opcode
== 0xc7)
5681 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5682 if (i386_record_lea_modrm (&ir
))
5687 if (opcode
== 0xc6 || opcode
== 0xc7)
5689 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5691 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5695 case 0x8a: /* mov */
5697 if ((opcode
& 1) == 0)
5700 ir
.ot
= ir
.dflag
+ OT_WORD
;
5701 if (i386_record_modrm (&ir
))
5704 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5706 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5709 case 0x8c: /* mov seg */
5710 if (i386_record_modrm (&ir
))
5715 opcode
= opcode
<< 8 | ir
.modrm
;
5720 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5724 if (i386_record_lea_modrm (&ir
))
5729 case 0x8e: /* mov seg */
5730 if (i386_record_modrm (&ir
))
5735 regnum
= X86_RECORD_ES_REGNUM
;
5738 regnum
= X86_RECORD_SS_REGNUM
;
5741 regnum
= X86_RECORD_DS_REGNUM
;
5744 regnum
= X86_RECORD_FS_REGNUM
;
5747 regnum
= X86_RECORD_GS_REGNUM
;
5751 opcode
= opcode
<< 8 | ir
.modrm
;
5755 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5756 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5759 case 0x0fb6: /* movzbS */
5760 case 0x0fb7: /* movzwS */
5761 case 0x0fbe: /* movsbS */
5762 case 0x0fbf: /* movswS */
5763 if (i386_record_modrm (&ir
))
5765 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
5768 case 0x8d: /* lea */
5769 if (i386_record_modrm (&ir
))
5774 opcode
= opcode
<< 8 | ir
.modrm
;
5779 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5781 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5784 case 0xa0: /* mov EAX */
5787 case 0xd7: /* xlat */
5788 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5791 case 0xa2: /* mov EAX */
5793 if (ir
.override
>= 0)
5795 if (record_full_memory_query
)
5798 Process record ignores the memory change of instruction at address %s\n\
5799 because it can't get the value of the segment register.\n\
5800 Do you want to stop the program?"),
5801 paddress (gdbarch
, ir
.orig_addr
)))
5807 if ((opcode
& 1) == 0)
5810 ir
.ot
= ir
.dflag
+ OT_WORD
;
5813 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 8))
5816 addr
= extract_unsigned_integer (buf
, 8, byte_order
);
5820 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 4))
5823 addr
= extract_unsigned_integer (buf
, 4, byte_order
);
5827 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 2))
5830 addr
= extract_unsigned_integer (buf
, 2, byte_order
);
5832 if (record_full_arch_list_add_mem (addr
, 1 << ir
.ot
))
5837 case 0xb0: /* mov R, Ib */
5845 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((ir
.regmap
[X86_RECORD_R8_REGNUM
])
5846 ? ((opcode
& 0x7) | ir
.rex_b
)
5847 : ((opcode
& 0x7) & 0x3));
5850 case 0xb8: /* mov R, Iv */
5858 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 0x7) | ir
.rex_b
);
5861 case 0x91: /* xchg R, EAX */
5868 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5869 I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode
& 0x7);
5872 case 0x86: /* xchg Ev, Gv */
5874 if ((opcode
& 1) == 0)
5877 ir
.ot
= ir
.dflag
+ OT_WORD
;
5878 if (i386_record_modrm (&ir
))
5883 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5885 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5889 if (i386_record_lea_modrm (&ir
))
5893 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5895 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5898 case 0xc4: /* les Gv */
5899 case 0xc5: /* lds Gv */
5900 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5906 case 0x0fb2: /* lss Gv */
5907 case 0x0fb4: /* lfs Gv */
5908 case 0x0fb5: /* lgs Gv */
5909 if (i386_record_modrm (&ir
))
5917 opcode
= opcode
<< 8 | ir
.modrm
;
5922 case 0xc4: /* les Gv */
5923 regnum
= X86_RECORD_ES_REGNUM
;
5925 case 0xc5: /* lds Gv */
5926 regnum
= X86_RECORD_DS_REGNUM
;
5928 case 0x0fb2: /* lss Gv */
5929 regnum
= X86_RECORD_SS_REGNUM
;
5931 case 0x0fb4: /* lfs Gv */
5932 regnum
= X86_RECORD_FS_REGNUM
;
5934 case 0x0fb5: /* lgs Gv */
5935 regnum
= X86_RECORD_GS_REGNUM
;
5938 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5939 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
5940 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5943 case 0xc0: /* shifts */
5949 if ((opcode
& 1) == 0)
5952 ir
.ot
= ir
.dflag
+ OT_WORD
;
5953 if (i386_record_modrm (&ir
))
5955 if (ir
.mod
!= 3 && (opcode
== 0xd2 || opcode
== 0xd3))
5957 if (i386_record_lea_modrm (&ir
))
5963 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5965 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5967 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5974 if (i386_record_modrm (&ir
))
5978 if (record_full_arch_list_add_reg (ir
.regcache
, ir
.rm
))
5983 if (i386_record_lea_modrm (&ir
))
5988 case 0xd8: /* Floats. */
5996 if (i386_record_modrm (&ir
))
5998 ir
.reg
|= ((opcode
& 7) << 3);
6004 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
6012 /* For fcom, ficom nothing to do. */
6018 /* For fcomp, ficomp pop FPU stack, store all. */
6019 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6046 /* For fadd, fmul, fsub, fsubr, fdiv, fdivr, fiadd, fimul,
6047 fisub, fisubr, fidiv, fidivr, modR/M.reg is an extension
6048 of code, always affects st(0) register. */
6049 if (i386_record_floats (gdbarch
, &ir
, I387_ST0_REGNUM (tdep
)))
6073 /* Handling fld, fild. */
6074 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6078 switch (ir
.reg
>> 4)
6081 if (record_full_arch_list_add_mem (addr64
, 4))
6085 if (record_full_arch_list_add_mem (addr64
, 8))
6091 if (record_full_arch_list_add_mem (addr64
, 2))
6097 switch (ir
.reg
>> 4)
6100 if (record_full_arch_list_add_mem (addr64
, 4))
6102 if (3 == (ir
.reg
& 7))
6104 /* For fstp m32fp. */
6105 if (i386_record_floats (gdbarch
, &ir
,
6106 I386_SAVE_FPU_REGS
))
6111 if (record_full_arch_list_add_mem (addr64
, 4))
6113 if ((3 == (ir
.reg
& 7))
6114 || (5 == (ir
.reg
& 7))
6115 || (7 == (ir
.reg
& 7)))
6117 /* For fstp insn. */
6118 if (i386_record_floats (gdbarch
, &ir
,
6119 I386_SAVE_FPU_REGS
))
6124 if (record_full_arch_list_add_mem (addr64
, 8))
6126 if (3 == (ir
.reg
& 7))
6128 /* For fstp m64fp. */
6129 if (i386_record_floats (gdbarch
, &ir
,
6130 I386_SAVE_FPU_REGS
))
6135 if ((3 <= (ir
.reg
& 7)) && (6 <= (ir
.reg
& 7)))
6137 /* For fistp, fbld, fild, fbstp. */
6138 if (i386_record_floats (gdbarch
, &ir
,
6139 I386_SAVE_FPU_REGS
))
6144 if (record_full_arch_list_add_mem (addr64
, 2))
6153 if (i386_record_floats (gdbarch
, &ir
,
6154 I386_SAVE_FPU_ENV_REG_STACK
))
6159 if (i386_record_floats (gdbarch
, &ir
, I387_FCTRL_REGNUM (tdep
)))
6164 if (i386_record_floats (gdbarch
, &ir
,
6165 I386_SAVE_FPU_ENV_REG_STACK
))
6171 if (record_full_arch_list_add_mem (addr64
, 28))
6176 if (record_full_arch_list_add_mem (addr64
, 14))
6182 if (record_full_arch_list_add_mem (addr64
, 2))
6184 /* Insn fstp, fbstp. */
6185 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6190 if (record_full_arch_list_add_mem (addr64
, 10))
6196 if (record_full_arch_list_add_mem (addr64
, 28))
6202 if (record_full_arch_list_add_mem (addr64
, 14))
6206 if (record_full_arch_list_add_mem (addr64
, 80))
6209 if (i386_record_floats (gdbarch
, &ir
,
6210 I386_SAVE_FPU_ENV_REG_STACK
))
6214 if (record_full_arch_list_add_mem (addr64
, 8))
6217 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6222 opcode
= opcode
<< 8 | ir
.modrm
;
6227 /* Opcode is an extension of modR/M byte. */
6233 if (i386_record_floats (gdbarch
, &ir
, I387_ST0_REGNUM (tdep
)))
6237 if (0x0c == (ir
.modrm
>> 4))
6239 if ((ir
.modrm
& 0x0f) <= 7)
6241 if (i386_record_floats (gdbarch
, &ir
,
6242 I386_SAVE_FPU_REGS
))
6247 if (i386_record_floats (gdbarch
, &ir
,
6248 I387_ST0_REGNUM (tdep
)))
6250 /* If only st(0) is changing, then we have already
6252 if ((ir
.modrm
& 0x0f) - 0x08)
6254 if (i386_record_floats (gdbarch
, &ir
,
6255 I387_ST0_REGNUM (tdep
) +
6256 ((ir
.modrm
& 0x0f) - 0x08)))
6274 if (i386_record_floats (gdbarch
, &ir
,
6275 I387_ST0_REGNUM (tdep
)))
6293 if (i386_record_floats (gdbarch
, &ir
,
6294 I386_SAVE_FPU_REGS
))
6298 if (i386_record_floats (gdbarch
, &ir
,
6299 I387_ST0_REGNUM (tdep
)))
6301 if (i386_record_floats (gdbarch
, &ir
,
6302 I387_ST0_REGNUM (tdep
) + 1))
6309 if (0xe9 == ir
.modrm
)
6311 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6314 else if ((0x0c == ir
.modrm
>> 4) || (0x0d == ir
.modrm
>> 4))
6316 if (i386_record_floats (gdbarch
, &ir
,
6317 I387_ST0_REGNUM (tdep
)))
6319 if (((ir
.modrm
& 0x0f) > 0) && ((ir
.modrm
& 0x0f) <= 7))
6321 if (i386_record_floats (gdbarch
, &ir
,
6322 I387_ST0_REGNUM (tdep
) +
6326 else if ((ir
.modrm
& 0x0f) - 0x08)
6328 if (i386_record_floats (gdbarch
, &ir
,
6329 I387_ST0_REGNUM (tdep
) +
6330 ((ir
.modrm
& 0x0f) - 0x08)))
6336 if (0xe3 == ir
.modrm
)
6338 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_ENV
))
6341 else if ((0x0c == ir
.modrm
>> 4) || (0x0d == ir
.modrm
>> 4))
6343 if (i386_record_floats (gdbarch
, &ir
,
6344 I387_ST0_REGNUM (tdep
)))
6346 if (((ir
.modrm
& 0x0f) > 0) && ((ir
.modrm
& 0x0f) <= 7))
6348 if (i386_record_floats (gdbarch
, &ir
,
6349 I387_ST0_REGNUM (tdep
) +
6353 else if ((ir
.modrm
& 0x0f) - 0x08)
6355 if (i386_record_floats (gdbarch
, &ir
,
6356 I387_ST0_REGNUM (tdep
) +
6357 ((ir
.modrm
& 0x0f) - 0x08)))
6363 if ((0x0c == ir
.modrm
>> 4)
6364 || (0x0d == ir
.modrm
>> 4)
6365 || (0x0f == ir
.modrm
>> 4))
6367 if ((ir
.modrm
& 0x0f) <= 7)
6369 if (i386_record_floats (gdbarch
, &ir
,
6370 I387_ST0_REGNUM (tdep
) +
6376 if (i386_record_floats (gdbarch
, &ir
,
6377 I387_ST0_REGNUM (tdep
) +
6378 ((ir
.modrm
& 0x0f) - 0x08)))
6384 if (0x0c == ir
.modrm
>> 4)
6386 if (i386_record_floats (gdbarch
, &ir
,
6387 I387_FTAG_REGNUM (tdep
)))
6390 else if ((0x0d == ir
.modrm
>> 4) || (0x0e == ir
.modrm
>> 4))
6392 if ((ir
.modrm
& 0x0f) <= 7)
6394 if (i386_record_floats (gdbarch
, &ir
,
6395 I387_ST0_REGNUM (tdep
) +
6401 if (i386_record_floats (gdbarch
, &ir
,
6402 I386_SAVE_FPU_REGS
))
6408 if ((0x0c == ir
.modrm
>> 4)
6409 || (0x0e == ir
.modrm
>> 4)
6410 || (0x0f == ir
.modrm
>> 4)
6411 || (0xd9 == ir
.modrm
))
6413 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6418 if (0xe0 == ir
.modrm
)
6420 if (record_full_arch_list_add_reg (ir
.regcache
,
6424 else if ((0x0f == ir
.modrm
>> 4) || (0x0e == ir
.modrm
>> 4))
6426 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6434 case 0xa4: /* movsS */
6436 case 0xaa: /* stosS */
6438 case 0x6c: /* insS */
6440 regcache_raw_read_unsigned (ir
.regcache
,
6441 ir
.regmap
[X86_RECORD_RECX_REGNUM
],
6447 if ((opcode
& 1) == 0)
6450 ir
.ot
= ir
.dflag
+ OT_WORD
;
6451 regcache_raw_read_unsigned (ir
.regcache
,
6452 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
6455 regcache_raw_read_unsigned (ir
.regcache
,
6456 ir
.regmap
[X86_RECORD_ES_REGNUM
],
6458 regcache_raw_read_unsigned (ir
.regcache
,
6459 ir
.regmap
[X86_RECORD_DS_REGNUM
],
6461 if (ir
.aflag
&& (es
!= ds
))
6463 /* addr += ((uint32_t) read_register (I386_ES_REGNUM)) << 4; */
6464 if (record_full_memory_query
)
6467 Process record ignores the memory change of instruction at address %s\n\
6468 because it can't get the value of the segment register.\n\
6469 Do you want to stop the program?"),
6470 paddress (gdbarch
, ir
.orig_addr
)))
6476 if (record_full_arch_list_add_mem (addr
, 1 << ir
.ot
))
6480 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6481 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6482 if (opcode
== 0xa4 || opcode
== 0xa5)
6483 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6484 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6485 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6489 case 0xa6: /* cmpsS */
6491 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6492 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6493 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6494 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6495 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6498 case 0xac: /* lodsS */
6500 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6501 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6502 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6503 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6504 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6507 case 0xae: /* scasS */
6509 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6510 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6511 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6512 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6515 case 0x6e: /* outsS */
6517 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6518 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6519 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6520 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6523 case 0xe4: /* port I/O */
6527 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6528 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6538 case 0xc2: /* ret im */
6539 case 0xc3: /* ret */
6540 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6541 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6544 case 0xca: /* lret im */
6545 case 0xcb: /* lret */
6546 case 0xcf: /* iret */
6547 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
6548 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6549 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6552 case 0xe8: /* call im */
6553 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
6555 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6559 case 0x9a: /* lcall im */
6560 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6565 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
6566 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6570 case 0xe9: /* jmp im */
6571 case 0xea: /* ljmp im */
6572 case 0xeb: /* jmp Jb */
6573 case 0x70: /* jcc Jb */
6589 case 0x0f80: /* jcc Jv */
6607 case 0x0f90: /* setcc Gv */
6623 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6625 if (i386_record_modrm (&ir
))
6628 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rex_b
? (ir
.rm
| ir
.rex_b
)
6632 if (i386_record_lea_modrm (&ir
))
6637 case 0x0f40: /* cmov Gv, Ev */
6653 if (i386_record_modrm (&ir
))
6656 if (ir
.dflag
== OT_BYTE
)
6658 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
6662 case 0x9c: /* pushf */
6663 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6664 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
6666 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6670 case 0x9d: /* popf */
6671 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6672 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6675 case 0x9e: /* sahf */
6676 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6682 case 0xf5: /* cmc */
6683 case 0xf8: /* clc */
6684 case 0xf9: /* stc */
6685 case 0xfc: /* cld */
6686 case 0xfd: /* std */
6687 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6690 case 0x9f: /* lahf */
6691 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6696 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6697 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6700 /* bit operations */
6701 case 0x0fba: /* bt/bts/btr/btc Gv, im */
6702 ir
.ot
= ir
.dflag
+ OT_WORD
;
6703 if (i386_record_modrm (&ir
))
6708 opcode
= opcode
<< 8 | ir
.modrm
;
6714 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6717 if (i386_record_lea_modrm (&ir
))
6721 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6724 case 0x0fa3: /* bt Gv, Ev */
6725 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6728 case 0x0fab: /* bts */
6729 case 0x0fb3: /* btr */
6730 case 0x0fbb: /* btc */
6731 ir
.ot
= ir
.dflag
+ OT_WORD
;
6732 if (i386_record_modrm (&ir
))
6735 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6739 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
6741 regcache_raw_read_unsigned (ir
.regcache
,
6742 ir
.regmap
[ir
.reg
| rex_r
],
6747 addr64
+= ((int16_t) addr
>> 4) << 4;
6750 addr64
+= ((int32_t) addr
>> 5) << 5;
6753 addr64
+= ((int64_t) addr
>> 6) << 6;
6756 if (record_full_arch_list_add_mem (addr64
, 1 << ir
.ot
))
6758 if (i386_record_lea_modrm (&ir
))
6761 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6764 case 0x0fbc: /* bsf */
6765 case 0x0fbd: /* bsr */
6766 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
6767 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6771 case 0x27: /* daa */
6772 case 0x2f: /* das */
6773 case 0x37: /* aaa */
6774 case 0x3f: /* aas */
6775 case 0xd4: /* aam */
6776 case 0xd5: /* aad */
6777 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6782 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6783 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6787 case 0x90: /* nop */
6788 if (prefixes
& PREFIX_LOCK
)
6795 case 0x9b: /* fwait */
6796 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
6798 opcode
= (uint32_t) opcode8
;
6804 case 0xcc: /* int3 */
6805 printf_unfiltered (_("Process record does not support instruction "
6812 case 0xcd: /* int */
6816 if (record_read_memory (gdbarch
, ir
.addr
, &interrupt
, 1))
6819 if (interrupt
!= 0x80
6820 || tdep
->i386_intx80_record
== NULL
)
6822 printf_unfiltered (_("Process record does not support "
6823 "instruction int 0x%02x.\n"),
6828 ret
= tdep
->i386_intx80_record (ir
.regcache
);
6835 case 0xce: /* into */
6836 printf_unfiltered (_("Process record does not support "
6837 "instruction into.\n"));
6842 case 0xfa: /* cli */
6843 case 0xfb: /* sti */
6846 case 0x62: /* bound */
6847 printf_unfiltered (_("Process record does not support "
6848 "instruction bound.\n"));
6853 case 0x0fc8: /* bswap reg */
6861 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 7) | ir
.rex_b
);
6864 case 0xd6: /* salc */
6865 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6870 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6871 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6874 case 0xe0: /* loopnz */
6875 case 0xe1: /* loopz */
6876 case 0xe2: /* loop */
6877 case 0xe3: /* jecxz */
6878 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6879 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6882 case 0x0f30: /* wrmsr */
6883 printf_unfiltered (_("Process record does not support "
6884 "instruction wrmsr.\n"));
6889 case 0x0f32: /* rdmsr */
6890 printf_unfiltered (_("Process record does not support "
6891 "instruction rdmsr.\n"));
6896 case 0x0f31: /* rdtsc */
6897 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6898 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
6901 case 0x0f34: /* sysenter */
6904 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6909 if (tdep
->i386_sysenter_record
== NULL
)
6911 printf_unfiltered (_("Process record does not support "
6912 "instruction sysenter.\n"));
6916 ret
= tdep
->i386_sysenter_record (ir
.regcache
);
6922 case 0x0f35: /* sysexit */
6923 printf_unfiltered (_("Process record does not support "
6924 "instruction sysexit.\n"));
6929 case 0x0f05: /* syscall */
6932 if (tdep
->i386_syscall_record
== NULL
)
6934 printf_unfiltered (_("Process record does not support "
6935 "instruction syscall.\n"));
6939 ret
= tdep
->i386_syscall_record (ir
.regcache
);
6945 case 0x0f07: /* sysret */
6946 printf_unfiltered (_("Process record does not support "
6947 "instruction sysret.\n"));
6952 case 0x0fa2: /* cpuid */
6953 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6954 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6955 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
6956 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM
);
6959 case 0xf4: /* hlt */
6960 printf_unfiltered (_("Process record does not support "
6961 "instruction hlt.\n"));
6967 if (i386_record_modrm (&ir
))
6974 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6978 if (i386_record_lea_modrm (&ir
))
6987 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6991 opcode
= opcode
<< 8 | ir
.modrm
;
6998 if (i386_record_modrm (&ir
))
7009 opcode
= opcode
<< 8 | ir
.modrm
;
7012 if (ir
.override
>= 0)
7014 if (record_full_memory_query
)
7017 Process record ignores the memory change of instruction at address %s\n\
7018 because it can't get the value of the segment register.\n\
7019 Do you want to stop the program?"),
7020 paddress (gdbarch
, ir
.orig_addr
)))
7026 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
7028 if (record_full_arch_list_add_mem (addr64
, 2))
7031 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
7033 if (record_full_arch_list_add_mem (addr64
, 8))
7038 if (record_full_arch_list_add_mem (addr64
, 4))
7049 case 0: /* monitor */
7052 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7056 opcode
= opcode
<< 8 | ir
.modrm
;
7064 if (ir
.override
>= 0)
7066 if (record_full_memory_query
)
7069 Process record ignores the memory change of instruction at address %s\n\
7070 because it can't get the value of the segment register.\n\
7071 Do you want to stop the program?"),
7072 paddress (gdbarch
, ir
.orig_addr
)))
7080 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
7082 if (record_full_arch_list_add_mem (addr64
, 2))
7085 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
7087 if (record_full_arch_list_add_mem (addr64
, 8))
7092 if (record_full_arch_list_add_mem (addr64
, 4))
7104 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7105 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7109 else if (ir
.rm
== 1)
7117 opcode
= opcode
<< 8 | ir
.modrm
;
7124 if (record_full_arch_list_add_reg (ir
.regcache
, ir
.rm
| ir
.rex_b
))
7130 if (i386_record_lea_modrm (&ir
))
7133 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7136 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7138 case 7: /* invlpg */
7141 if (ir
.rm
== 0 && ir
.regmap
[X86_RECORD_R8_REGNUM
])
7142 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM
);
7146 opcode
= opcode
<< 8 | ir
.modrm
;
7151 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7155 opcode
= opcode
<< 8 | ir
.modrm
;
7161 case 0x0f08: /* invd */
7162 case 0x0f09: /* wbinvd */
7165 case 0x63: /* arpl */
7166 if (i386_record_modrm (&ir
))
7168 if (ir
.mod
== 3 || ir
.regmap
[X86_RECORD_R8_REGNUM
])
7170 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.regmap
[X86_RECORD_R8_REGNUM
]
7171 ? (ir
.reg
| rex_r
) : ir
.rm
);
7175 ir
.ot
= ir
.dflag
? OT_LONG
: OT_WORD
;
7176 if (i386_record_lea_modrm (&ir
))
7179 if (!ir
.regmap
[X86_RECORD_R8_REGNUM
])
7180 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7183 case 0x0f02: /* lar */
7184 case 0x0f03: /* lsl */
7185 if (i386_record_modrm (&ir
))
7187 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
7188 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7192 if (i386_record_modrm (&ir
))
7194 if (ir
.mod
== 3 && ir
.reg
== 3)
7197 opcode
= opcode
<< 8 | ir
.modrm
;
7209 /* nop (multi byte) */
7212 case 0x0f20: /* mov reg, crN */
7213 case 0x0f22: /* mov crN, reg */
7214 if (i386_record_modrm (&ir
))
7216 if ((ir
.modrm
& 0xc0) != 0xc0)
7219 opcode
= opcode
<< 8 | ir
.modrm
;
7230 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7232 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7236 opcode
= opcode
<< 8 | ir
.modrm
;
7242 case 0x0f21: /* mov reg, drN */
7243 case 0x0f23: /* mov drN, reg */
7244 if (i386_record_modrm (&ir
))
7246 if ((ir
.modrm
& 0xc0) != 0xc0 || ir
.reg
== 4
7247 || ir
.reg
== 5 || ir
.reg
>= 8)
7250 opcode
= opcode
<< 8 | ir
.modrm
;
7254 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7256 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7259 case 0x0f06: /* clts */
7260 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7263 /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
7265 case 0x0f0d: /* 3DNow! prefetch */
7268 case 0x0f0e: /* 3DNow! femms */
7269 case 0x0f77: /* emms */
7270 if (i386_fpc_regnum_p (gdbarch
, I387_FTAG_REGNUM(tdep
)))
7272 record_full_arch_list_add_reg (ir
.regcache
, I387_FTAG_REGNUM(tdep
));
7275 case 0x0f0f: /* 3DNow! data */
7276 if (i386_record_modrm (&ir
))
7278 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
7283 case 0x0c: /* 3DNow! pi2fw */
7284 case 0x0d: /* 3DNow! pi2fd */
7285 case 0x1c: /* 3DNow! pf2iw */
7286 case 0x1d: /* 3DNow! pf2id */
7287 case 0x8a: /* 3DNow! pfnacc */
7288 case 0x8e: /* 3DNow! pfpnacc */
7289 case 0x90: /* 3DNow! pfcmpge */
7290 case 0x94: /* 3DNow! pfmin */
7291 case 0x96: /* 3DNow! pfrcp */
7292 case 0x97: /* 3DNow! pfrsqrt */
7293 case 0x9a: /* 3DNow! pfsub */
7294 case 0x9e: /* 3DNow! pfadd */
7295 case 0xa0: /* 3DNow! pfcmpgt */
7296 case 0xa4: /* 3DNow! pfmax */
7297 case 0xa6: /* 3DNow! pfrcpit1 */
7298 case 0xa7: /* 3DNow! pfrsqit1 */
7299 case 0xaa: /* 3DNow! pfsubr */
7300 case 0xae: /* 3DNow! pfacc */
7301 case 0xb0: /* 3DNow! pfcmpeq */
7302 case 0xb4: /* 3DNow! pfmul */
7303 case 0xb6: /* 3DNow! pfrcpit2 */
7304 case 0xb7: /* 3DNow! pmulhrw */
7305 case 0xbb: /* 3DNow! pswapd */
7306 case 0xbf: /* 3DNow! pavgusb */
7307 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.reg
))
7308 goto no_support_3dnow_data
;
7309 record_full_arch_list_add_reg (ir
.regcache
, ir
.reg
);
7313 no_support_3dnow_data
:
7314 opcode
= (opcode
<< 8) | opcode8
;
7320 case 0x0faa: /* rsm */
7321 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7322 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7323 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
7324 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7325 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM
);
7326 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
7327 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
7328 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
7329 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
7333 if (i386_record_modrm (&ir
))
7337 case 0: /* fxsave */
7341 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7342 if (i386_record_lea_modrm_addr (&ir
, &tmpu64
))
7344 if (record_full_arch_list_add_mem (tmpu64
, 512))
7349 case 1: /* fxrstor */
7353 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7355 for (i
= I387_MM0_REGNUM (tdep
);
7356 i386_mmx_regnum_p (gdbarch
, i
); i
++)
7357 record_full_arch_list_add_reg (ir
.regcache
, i
);
7359 for (i
= I387_XMM0_REGNUM (tdep
);
7360 i386_xmm_regnum_p (gdbarch
, i
); i
++)
7361 record_full_arch_list_add_reg (ir
.regcache
, i
);
7363 if (i386_mxcsr_regnum_p (gdbarch
, I387_MXCSR_REGNUM(tdep
)))
7364 record_full_arch_list_add_reg (ir
.regcache
,
7365 I387_MXCSR_REGNUM(tdep
));
7367 for (i
= I387_ST0_REGNUM (tdep
);
7368 i386_fp_regnum_p (gdbarch
, i
); i
++)
7369 record_full_arch_list_add_reg (ir
.regcache
, i
);
7371 for (i
= I387_FCTRL_REGNUM (tdep
);
7372 i386_fpc_regnum_p (gdbarch
, i
); i
++)
7373 record_full_arch_list_add_reg (ir
.regcache
, i
);
7377 case 2: /* ldmxcsr */
7378 if (!i386_mxcsr_regnum_p (gdbarch
, I387_MXCSR_REGNUM(tdep
)))
7380 record_full_arch_list_add_reg (ir
.regcache
, I387_MXCSR_REGNUM(tdep
));
7383 case 3: /* stmxcsr */
7385 if (i386_record_lea_modrm (&ir
))
7389 case 5: /* lfence */
7390 case 6: /* mfence */
7391 case 7: /* sfence clflush */
7395 opcode
= (opcode
<< 8) | ir
.modrm
;
7401 case 0x0fc3: /* movnti */
7402 ir
.ot
= (ir
.dflag
== 2) ? OT_QUAD
: OT_LONG
;
7403 if (i386_record_modrm (&ir
))
7408 if (i386_record_lea_modrm (&ir
))
7412 /* Add prefix to opcode. */
7527 /* Mask out PREFIX_ADDR. */
7528 switch ((prefixes
& ~PREFIX_ADDR
))
7540 reswitch_prefix_add
:
7548 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
7551 opcode
= (uint32_t) opcode8
| opcode
<< 8;
7552 goto reswitch_prefix_add
;
7555 case 0x0f10: /* movups */
7556 case 0x660f10: /* movupd */
7557 case 0xf30f10: /* movss */
7558 case 0xf20f10: /* movsd */
7559 case 0x0f12: /* movlps */
7560 case 0x660f12: /* movlpd */
7561 case 0xf30f12: /* movsldup */
7562 case 0xf20f12: /* movddup */
7563 case 0x0f14: /* unpcklps */
7564 case 0x660f14: /* unpcklpd */
7565 case 0x0f15: /* unpckhps */
7566 case 0x660f15: /* unpckhpd */
7567 case 0x0f16: /* movhps */
7568 case 0x660f16: /* movhpd */
7569 case 0xf30f16: /* movshdup */
7570 case 0x0f28: /* movaps */
7571 case 0x660f28: /* movapd */
7572 case 0x0f2a: /* cvtpi2ps */
7573 case 0x660f2a: /* cvtpi2pd */
7574 case 0xf30f2a: /* cvtsi2ss */
7575 case 0xf20f2a: /* cvtsi2sd */
7576 case 0x0f2c: /* cvttps2pi */
7577 case 0x660f2c: /* cvttpd2pi */
7578 case 0x0f2d: /* cvtps2pi */
7579 case 0x660f2d: /* cvtpd2pi */
7580 case 0x660f3800: /* pshufb */
7581 case 0x660f3801: /* phaddw */
7582 case 0x660f3802: /* phaddd */
7583 case 0x660f3803: /* phaddsw */
7584 case 0x660f3804: /* pmaddubsw */
7585 case 0x660f3805: /* phsubw */
7586 case 0x660f3806: /* phsubd */
7587 case 0x660f3807: /* phsubsw */
7588 case 0x660f3808: /* psignb */
7589 case 0x660f3809: /* psignw */
7590 case 0x660f380a: /* psignd */
7591 case 0x660f380b: /* pmulhrsw */
7592 case 0x660f3810: /* pblendvb */
7593 case 0x660f3814: /* blendvps */
7594 case 0x660f3815: /* blendvpd */
7595 case 0x660f381c: /* pabsb */
7596 case 0x660f381d: /* pabsw */
7597 case 0x660f381e: /* pabsd */
7598 case 0x660f3820: /* pmovsxbw */
7599 case 0x660f3821: /* pmovsxbd */
7600 case 0x660f3822: /* pmovsxbq */
7601 case 0x660f3823: /* pmovsxwd */
7602 case 0x660f3824: /* pmovsxwq */
7603 case 0x660f3825: /* pmovsxdq */
7604 case 0x660f3828: /* pmuldq */
7605 case 0x660f3829: /* pcmpeqq */
7606 case 0x660f382a: /* movntdqa */
7607 case 0x660f3a08: /* roundps */
7608 case 0x660f3a09: /* roundpd */
7609 case 0x660f3a0a: /* roundss */
7610 case 0x660f3a0b: /* roundsd */
7611 case 0x660f3a0c: /* blendps */
7612 case 0x660f3a0d: /* blendpd */
7613 case 0x660f3a0e: /* pblendw */
7614 case 0x660f3a0f: /* palignr */
7615 case 0x660f3a20: /* pinsrb */
7616 case 0x660f3a21: /* insertps */
7617 case 0x660f3a22: /* pinsrd pinsrq */
7618 case 0x660f3a40: /* dpps */
7619 case 0x660f3a41: /* dppd */
7620 case 0x660f3a42: /* mpsadbw */
7621 case 0x660f3a60: /* pcmpestrm */
7622 case 0x660f3a61: /* pcmpestri */
7623 case 0x660f3a62: /* pcmpistrm */
7624 case 0x660f3a63: /* pcmpistri */
7625 case 0x0f51: /* sqrtps */
7626 case 0x660f51: /* sqrtpd */
7627 case 0xf20f51: /* sqrtsd */
7628 case 0xf30f51: /* sqrtss */
7629 case 0x0f52: /* rsqrtps */
7630 case 0xf30f52: /* rsqrtss */
7631 case 0x0f53: /* rcpps */
7632 case 0xf30f53: /* rcpss */
7633 case 0x0f54: /* andps */
7634 case 0x660f54: /* andpd */
7635 case 0x0f55: /* andnps */
7636 case 0x660f55: /* andnpd */
7637 case 0x0f56: /* orps */
7638 case 0x660f56: /* orpd */
7639 case 0x0f57: /* xorps */
7640 case 0x660f57: /* xorpd */
7641 case 0x0f58: /* addps */
7642 case 0x660f58: /* addpd */
7643 case 0xf20f58: /* addsd */
7644 case 0xf30f58: /* addss */
7645 case 0x0f59: /* mulps */
7646 case 0x660f59: /* mulpd */
7647 case 0xf20f59: /* mulsd */
7648 case 0xf30f59: /* mulss */
7649 case 0x0f5a: /* cvtps2pd */
7650 case 0x660f5a: /* cvtpd2ps */
7651 case 0xf20f5a: /* cvtsd2ss */
7652 case 0xf30f5a: /* cvtss2sd */
7653 case 0x0f5b: /* cvtdq2ps */
7654 case 0x660f5b: /* cvtps2dq */
7655 case 0xf30f5b: /* cvttps2dq */
7656 case 0x0f5c: /* subps */
7657 case 0x660f5c: /* subpd */
7658 case 0xf20f5c: /* subsd */
7659 case 0xf30f5c: /* subss */
7660 case 0x0f5d: /* minps */
7661 case 0x660f5d: /* minpd */
7662 case 0xf20f5d: /* minsd */
7663 case 0xf30f5d: /* minss */
7664 case 0x0f5e: /* divps */
7665 case 0x660f5e: /* divpd */
7666 case 0xf20f5e: /* divsd */
7667 case 0xf30f5e: /* divss */
7668 case 0x0f5f: /* maxps */
7669 case 0x660f5f: /* maxpd */
7670 case 0xf20f5f: /* maxsd */
7671 case 0xf30f5f: /* maxss */
7672 case 0x660f60: /* punpcklbw */
7673 case 0x660f61: /* punpcklwd */
7674 case 0x660f62: /* punpckldq */
7675 case 0x660f63: /* packsswb */
7676 case 0x660f64: /* pcmpgtb */
7677 case 0x660f65: /* pcmpgtw */
7678 case 0x660f66: /* pcmpgtd */
7679 case 0x660f67: /* packuswb */
7680 case 0x660f68: /* punpckhbw */
7681 case 0x660f69: /* punpckhwd */
7682 case 0x660f6a: /* punpckhdq */
7683 case 0x660f6b: /* packssdw */
7684 case 0x660f6c: /* punpcklqdq */
7685 case 0x660f6d: /* punpckhqdq */
7686 case 0x660f6e: /* movd */
7687 case 0x660f6f: /* movdqa */
7688 case 0xf30f6f: /* movdqu */
7689 case 0x660f70: /* pshufd */
7690 case 0xf20f70: /* pshuflw */
7691 case 0xf30f70: /* pshufhw */
7692 case 0x660f74: /* pcmpeqb */
7693 case 0x660f75: /* pcmpeqw */
7694 case 0x660f76: /* pcmpeqd */
7695 case 0x660f7c: /* haddpd */
7696 case 0xf20f7c: /* haddps */
7697 case 0x660f7d: /* hsubpd */
7698 case 0xf20f7d: /* hsubps */
7699 case 0xf30f7e: /* movq */
7700 case 0x0fc2: /* cmpps */
7701 case 0x660fc2: /* cmppd */
7702 case 0xf20fc2: /* cmpsd */
7703 case 0xf30fc2: /* cmpss */
7704 case 0x660fc4: /* pinsrw */
7705 case 0x0fc6: /* shufps */
7706 case 0x660fc6: /* shufpd */
7707 case 0x660fd0: /* addsubpd */
7708 case 0xf20fd0: /* addsubps */
7709 case 0x660fd1: /* psrlw */
7710 case 0x660fd2: /* psrld */
7711 case 0x660fd3: /* psrlq */
7712 case 0x660fd4: /* paddq */
7713 case 0x660fd5: /* pmullw */
7714 case 0xf30fd6: /* movq2dq */
7715 case 0x660fd8: /* psubusb */
7716 case 0x660fd9: /* psubusw */
7717 case 0x660fda: /* pminub */
7718 case 0x660fdb: /* pand */
7719 case 0x660fdc: /* paddusb */
7720 case 0x660fdd: /* paddusw */
7721 case 0x660fde: /* pmaxub */
7722 case 0x660fdf: /* pandn */
7723 case 0x660fe0: /* pavgb */
7724 case 0x660fe1: /* psraw */
7725 case 0x660fe2: /* psrad */
7726 case 0x660fe3: /* pavgw */
7727 case 0x660fe4: /* pmulhuw */
7728 case 0x660fe5: /* pmulhw */
7729 case 0x660fe6: /* cvttpd2dq */
7730 case 0xf20fe6: /* cvtpd2dq */
7731 case 0xf30fe6: /* cvtdq2pd */
7732 case 0x660fe8: /* psubsb */
7733 case 0x660fe9: /* psubsw */
7734 case 0x660fea: /* pminsw */
7735 case 0x660feb: /* por */
7736 case 0x660fec: /* paddsb */
7737 case 0x660fed: /* paddsw */
7738 case 0x660fee: /* pmaxsw */
7739 case 0x660fef: /* pxor */
7740 case 0xf20ff0: /* lddqu */
7741 case 0x660ff1: /* psllw */
7742 case 0x660ff2: /* pslld */
7743 case 0x660ff3: /* psllq */
7744 case 0x660ff4: /* pmuludq */
7745 case 0x660ff5: /* pmaddwd */
7746 case 0x660ff6: /* psadbw */
7747 case 0x660ff8: /* psubb */
7748 case 0x660ff9: /* psubw */
7749 case 0x660ffa: /* psubd */
7750 case 0x660ffb: /* psubq */
7751 case 0x660ffc: /* paddb */
7752 case 0x660ffd: /* paddw */
7753 case 0x660ffe: /* paddd */
7754 if (i386_record_modrm (&ir
))
7757 if (!i386_xmm_regnum_p (gdbarch
, I387_XMM0_REGNUM (tdep
) + ir
.reg
))
7759 record_full_arch_list_add_reg (ir
.regcache
,
7760 I387_XMM0_REGNUM (tdep
) + ir
.reg
);
7761 if ((opcode
& 0xfffffffc) == 0x660f3a60)
7762 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7765 case 0x0f11: /* movups */
7766 case 0x660f11: /* movupd */
7767 case 0xf30f11: /* movss */
7768 case 0xf20f11: /* movsd */
7769 case 0x0f13: /* movlps */
7770 case 0x660f13: /* movlpd */
7771 case 0x0f17: /* movhps */
7772 case 0x660f17: /* movhpd */
7773 case 0x0f29: /* movaps */
7774 case 0x660f29: /* movapd */
7775 case 0x660f3a14: /* pextrb */
7776 case 0x660f3a15: /* pextrw */
7777 case 0x660f3a16: /* pextrd pextrq */
7778 case 0x660f3a17: /* extractps */
7779 case 0x660f7f: /* movdqa */
7780 case 0xf30f7f: /* movdqu */
7781 if (i386_record_modrm (&ir
))
7785 if (opcode
== 0x0f13 || opcode
== 0x660f13
7786 || opcode
== 0x0f17 || opcode
== 0x660f17)
7789 if (!i386_xmm_regnum_p (gdbarch
,
7790 I387_XMM0_REGNUM (tdep
) + ir
.rm
))
7792 record_full_arch_list_add_reg (ir
.regcache
,
7793 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
7815 if (i386_record_lea_modrm (&ir
))
7820 case 0x0f2b: /* movntps */
7821 case 0x660f2b: /* movntpd */
7822 case 0x0fe7: /* movntq */
7823 case 0x660fe7: /* movntdq */
7826 if (opcode
== 0x0fe7)
7830 if (i386_record_lea_modrm (&ir
))
7834 case 0xf30f2c: /* cvttss2si */
7835 case 0xf20f2c: /* cvttsd2si */
7836 case 0xf30f2d: /* cvtss2si */
7837 case 0xf20f2d: /* cvtsd2si */
7838 case 0xf20f38f0: /* crc32 */
7839 case 0xf20f38f1: /* crc32 */
7840 case 0x0f50: /* movmskps */
7841 case 0x660f50: /* movmskpd */
7842 case 0x0fc5: /* pextrw */
7843 case 0x660fc5: /* pextrw */
7844 case 0x0fd7: /* pmovmskb */
7845 case 0x660fd7: /* pmovmskb */
7846 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
7849 case 0x0f3800: /* pshufb */
7850 case 0x0f3801: /* phaddw */
7851 case 0x0f3802: /* phaddd */
7852 case 0x0f3803: /* phaddsw */
7853 case 0x0f3804: /* pmaddubsw */
7854 case 0x0f3805: /* phsubw */
7855 case 0x0f3806: /* phsubd */
7856 case 0x0f3807: /* phsubsw */
7857 case 0x0f3808: /* psignb */
7858 case 0x0f3809: /* psignw */
7859 case 0x0f380a: /* psignd */
7860 case 0x0f380b: /* pmulhrsw */
7861 case 0x0f381c: /* pabsb */
7862 case 0x0f381d: /* pabsw */
7863 case 0x0f381e: /* pabsd */
7864 case 0x0f382b: /* packusdw */
7865 case 0x0f3830: /* pmovzxbw */
7866 case 0x0f3831: /* pmovzxbd */
7867 case 0x0f3832: /* pmovzxbq */
7868 case 0x0f3833: /* pmovzxwd */
7869 case 0x0f3834: /* pmovzxwq */
7870 case 0x0f3835: /* pmovzxdq */
7871 case 0x0f3837: /* pcmpgtq */
7872 case 0x0f3838: /* pminsb */
7873 case 0x0f3839: /* pminsd */
7874 case 0x0f383a: /* pminuw */
7875 case 0x0f383b: /* pminud */
7876 case 0x0f383c: /* pmaxsb */
7877 case 0x0f383d: /* pmaxsd */
7878 case 0x0f383e: /* pmaxuw */
7879 case 0x0f383f: /* pmaxud */
7880 case 0x0f3840: /* pmulld */
7881 case 0x0f3841: /* phminposuw */
7882 case 0x0f3a0f: /* palignr */
7883 case 0x0f60: /* punpcklbw */
7884 case 0x0f61: /* punpcklwd */
7885 case 0x0f62: /* punpckldq */
7886 case 0x0f63: /* packsswb */
7887 case 0x0f64: /* pcmpgtb */
7888 case 0x0f65: /* pcmpgtw */
7889 case 0x0f66: /* pcmpgtd */
7890 case 0x0f67: /* packuswb */
7891 case 0x0f68: /* punpckhbw */
7892 case 0x0f69: /* punpckhwd */
7893 case 0x0f6a: /* punpckhdq */
7894 case 0x0f6b: /* packssdw */
7895 case 0x0f6e: /* movd */
7896 case 0x0f6f: /* movq */
7897 case 0x0f70: /* pshufw */
7898 case 0x0f74: /* pcmpeqb */
7899 case 0x0f75: /* pcmpeqw */
7900 case 0x0f76: /* pcmpeqd */
7901 case 0x0fc4: /* pinsrw */
7902 case 0x0fd1: /* psrlw */
7903 case 0x0fd2: /* psrld */
7904 case 0x0fd3: /* psrlq */
7905 case 0x0fd4: /* paddq */
7906 case 0x0fd5: /* pmullw */
7907 case 0xf20fd6: /* movdq2q */
7908 case 0x0fd8: /* psubusb */
7909 case 0x0fd9: /* psubusw */
7910 case 0x0fda: /* pminub */
7911 case 0x0fdb: /* pand */
7912 case 0x0fdc: /* paddusb */
7913 case 0x0fdd: /* paddusw */
7914 case 0x0fde: /* pmaxub */
7915 case 0x0fdf: /* pandn */
7916 case 0x0fe0: /* pavgb */
7917 case 0x0fe1: /* psraw */
7918 case 0x0fe2: /* psrad */
7919 case 0x0fe3: /* pavgw */
7920 case 0x0fe4: /* pmulhuw */
7921 case 0x0fe5: /* pmulhw */
7922 case 0x0fe8: /* psubsb */
7923 case 0x0fe9: /* psubsw */
7924 case 0x0fea: /* pminsw */
7925 case 0x0feb: /* por */
7926 case 0x0fec: /* paddsb */
7927 case 0x0fed: /* paddsw */
7928 case 0x0fee: /* pmaxsw */
7929 case 0x0fef: /* pxor */
7930 case 0x0ff1: /* psllw */
7931 case 0x0ff2: /* pslld */
7932 case 0x0ff3: /* psllq */
7933 case 0x0ff4: /* pmuludq */
7934 case 0x0ff5: /* pmaddwd */
7935 case 0x0ff6: /* psadbw */
7936 case 0x0ff8: /* psubb */
7937 case 0x0ff9: /* psubw */
7938 case 0x0ffa: /* psubd */
7939 case 0x0ffb: /* psubq */
7940 case 0x0ffc: /* paddb */
7941 case 0x0ffd: /* paddw */
7942 case 0x0ffe: /* paddd */
7943 if (i386_record_modrm (&ir
))
7945 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.reg
))
7947 record_full_arch_list_add_reg (ir
.regcache
,
7948 I387_MM0_REGNUM (tdep
) + ir
.reg
);
7951 case 0x0f71: /* psllw */
7952 case 0x0f72: /* pslld */
7953 case 0x0f73: /* psllq */
7954 if (i386_record_modrm (&ir
))
7956 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.rm
))
7958 record_full_arch_list_add_reg (ir
.regcache
,
7959 I387_MM0_REGNUM (tdep
) + ir
.rm
);
7962 case 0x660f71: /* psllw */
7963 case 0x660f72: /* pslld */
7964 case 0x660f73: /* psllq */
7965 if (i386_record_modrm (&ir
))
7968 if (!i386_xmm_regnum_p (gdbarch
, I387_XMM0_REGNUM (tdep
) + ir
.rm
))
7970 record_full_arch_list_add_reg (ir
.regcache
,
7971 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
7974 case 0x0f7e: /* movd */
7975 case 0x660f7e: /* movd */
7976 if (i386_record_modrm (&ir
))
7979 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7986 if (i386_record_lea_modrm (&ir
))
7991 case 0x0f7f: /* movq */
7992 if (i386_record_modrm (&ir
))
7996 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.rm
))
7998 record_full_arch_list_add_reg (ir
.regcache
,
7999 I387_MM0_REGNUM (tdep
) + ir
.rm
);
8004 if (i386_record_lea_modrm (&ir
))
8009 case 0xf30fb8: /* popcnt */
8010 if (i386_record_modrm (&ir
))
8012 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
8013 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
8016 case 0x660fd6: /* movq */
8017 if (i386_record_modrm (&ir
))
8022 if (!i386_xmm_regnum_p (gdbarch
,
8023 I387_XMM0_REGNUM (tdep
) + ir
.rm
))
8025 record_full_arch_list_add_reg (ir
.regcache
,
8026 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
8031 if (i386_record_lea_modrm (&ir
))
8036 case 0x660f3817: /* ptest */
8037 case 0x0f2e: /* ucomiss */
8038 case 0x660f2e: /* ucomisd */
8039 case 0x0f2f: /* comiss */
8040 case 0x660f2f: /* comisd */
8041 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
8044 case 0x0ff7: /* maskmovq */
8045 regcache_raw_read_unsigned (ir
.regcache
,
8046 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
8048 if (record_full_arch_list_add_mem (addr
, 64))
8052 case 0x660ff7: /* maskmovdqu */
8053 regcache_raw_read_unsigned (ir
.regcache
,
8054 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
8056 if (record_full_arch_list_add_mem (addr
, 128))
8071 /* In the future, maybe still need to deal with need_dasm. */
8072 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REIP_REGNUM
);
8073 if (record_full_arch_list_add_end ())
8079 printf_unfiltered (_("Process record does not support instruction 0x%02x "
8080 "at address %s.\n"),
8081 (unsigned int) (opcode
),
8082 paddress (gdbarch
, ir
.orig_addr
));
8086 static const int i386_record_regmap
[] =
8088 I386_EAX_REGNUM
, I386_ECX_REGNUM
, I386_EDX_REGNUM
, I386_EBX_REGNUM
,
8089 I386_ESP_REGNUM
, I386_EBP_REGNUM
, I386_ESI_REGNUM
, I386_EDI_REGNUM
,
8090 0, 0, 0, 0, 0, 0, 0, 0,
8091 I386_EIP_REGNUM
, I386_EFLAGS_REGNUM
, I386_CS_REGNUM
, I386_SS_REGNUM
,
8092 I386_DS_REGNUM
, I386_ES_REGNUM
, I386_FS_REGNUM
, I386_GS_REGNUM
8095 /* Check that the given address appears suitable for a fast
8096 tracepoint, which on x86-64 means that we need an instruction of at
8097 least 5 bytes, so that we can overwrite it with a 4-byte-offset
8098 jump and not have to worry about program jumps to an address in the
8099 middle of the tracepoint jump. On x86, it may be possible to use
8100 4-byte jumps with a 2-byte offset to a trampoline located in the
8101 bottom 64 KiB of memory. Returns 1 if OK, and writes a size
8102 of instruction to replace, and 0 if not, plus an explanatory
8106 i386_fast_tracepoint_valid_at (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
8111 /* Ask the target for the minimum instruction length supported. */
8112 jumplen
= target_get_min_fast_tracepoint_insn_len ();
8116 /* If the target does not support the get_min_fast_tracepoint_insn_len
8117 operation, assume that fast tracepoints will always be implemented
8118 using 4-byte relative jumps on both x86 and x86-64. */
8121 else if (jumplen
== 0)
8123 /* If the target does support get_min_fast_tracepoint_insn_len but
8124 returns zero, then the IPA has not loaded yet. In this case,
8125 we optimistically assume that truncated 2-byte relative jumps
8126 will be available on x86, and compensate later if this assumption
8127 turns out to be incorrect. On x86-64 architectures, 4-byte relative
8128 jumps will always be used. */
8129 jumplen
= (register_size (gdbarch
, 0) == 8) ? 5 : 4;
8132 /* Check for fit. */
8133 len
= gdb_insn_length (gdbarch
, addr
);
8137 /* Return a bit of target-specific detail to add to the caller's
8138 generic failure message. */
8140 *msg
= string_printf (_("; instruction is only %d bytes long, "
8141 "need at least %d bytes for the jump"),
8153 /* Return a floating-point format for a floating-point variable of
8154 length LEN in bits. If non-NULL, NAME is the name of its type.
8155 If no suitable type is found, return NULL. */
8157 static const struct floatformat
**
8158 i386_floatformat_for_type (struct gdbarch
*gdbarch
,
8159 const char *name
, int len
)
8161 if (len
== 128 && name
)
8162 if (strcmp (name
, "__float128") == 0
8163 || strcmp (name
, "_Float128") == 0
8164 || strcmp (name
, "complex _Float128") == 0
8165 || strcmp (name
, "complex(kind=16)") == 0
8166 || strcmp (name
, "complex*32") == 0
8167 || strcmp (name
, "COMPLEX*32") == 0
8168 || strcmp (name
, "quad complex") == 0
8169 || strcmp (name
, "real(kind=16)") == 0
8170 || strcmp (name
, "real*16") == 0
8171 || strcmp (name
, "REAL*16") == 0)
8172 return floatformats_ia64_quad
;
8174 return default_floatformat_for_type (gdbarch
, name
, len
);
8178 i386_validate_tdesc_p (struct gdbarch_tdep
*tdep
,
8179 struct tdesc_arch_data
*tdesc_data
)
8181 const struct target_desc
*tdesc
= tdep
->tdesc
;
8182 const struct tdesc_feature
*feature_core
;
8184 const struct tdesc_feature
*feature_sse
, *feature_avx
, *feature_mpx
,
8185 *feature_avx512
, *feature_pkeys
, *feature_segments
;
8186 int i
, num_regs
, valid_p
;
8188 if (! tdesc_has_registers (tdesc
))
8191 /* Get core registers. */
8192 feature_core
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.core");
8193 if (feature_core
== NULL
)
8196 /* Get SSE registers. */
8197 feature_sse
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.sse");
8199 /* Try AVX registers. */
8200 feature_avx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx");
8202 /* Try MPX registers. */
8203 feature_mpx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx");
8205 /* Try AVX512 registers. */
8206 feature_avx512
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx512");
8208 /* Try segment base registers. */
8209 feature_segments
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.segments");
8212 feature_pkeys
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.pkeys");
8216 /* The XCR0 bits. */
8219 /* AVX512 register description requires AVX register description. */
8223 tdep
->xcr0
= X86_XSTATE_AVX_AVX512_MASK
;
8225 /* It may have been set by OSABI initialization function. */
8226 if (tdep
->k0_regnum
< 0)
8228 tdep
->k_register_names
= i386_k_names
;
8229 tdep
->k0_regnum
= I386_K0_REGNUM
;
8232 for (i
= 0; i
< I387_NUM_K_REGS
; i
++)
8233 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8234 tdep
->k0_regnum
+ i
,
8237 if (tdep
->num_zmm_regs
== 0)
8239 tdep
->zmmh_register_names
= i386_zmmh_names
;
8240 tdep
->num_zmm_regs
= 8;
8241 tdep
->zmm0h_regnum
= I386_ZMM0H_REGNUM
;
8244 for (i
= 0; i
< tdep
->num_zmm_regs
; i
++)
8245 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8246 tdep
->zmm0h_regnum
+ i
,
8247 tdep
->zmmh_register_names
[i
]);
8249 for (i
= 0; i
< tdep
->num_xmm_avx512_regs
; i
++)
8250 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8251 tdep
->xmm16_regnum
+ i
,
8252 tdep
->xmm_avx512_register_names
[i
]);
8254 for (i
= 0; i
< tdep
->num_ymm_avx512_regs
; i
++)
8255 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8256 tdep
->ymm16h_regnum
+ i
,
8257 tdep
->ymm16h_register_names
[i
]);
8261 /* AVX register description requires SSE register description. */
8265 if (!feature_avx512
)
8266 tdep
->xcr0
= X86_XSTATE_AVX_MASK
;
8268 /* It may have been set by OSABI initialization function. */
8269 if (tdep
->num_ymm_regs
== 0)
8271 tdep
->ymmh_register_names
= i386_ymmh_names
;
8272 tdep
->num_ymm_regs
= 8;
8273 tdep
->ymm0h_regnum
= I386_YMM0H_REGNUM
;
8276 for (i
= 0; i
< tdep
->num_ymm_regs
; i
++)
8277 valid_p
&= tdesc_numbered_register (feature_avx
, tdesc_data
,
8278 tdep
->ymm0h_regnum
+ i
,
8279 tdep
->ymmh_register_names
[i
]);
8281 else if (feature_sse
)
8282 tdep
->xcr0
= X86_XSTATE_SSE_MASK
;
8285 tdep
->xcr0
= X86_XSTATE_X87_MASK
;
8286 tdep
->num_xmm_regs
= 0;
8289 num_regs
= tdep
->num_core_regs
;
8290 for (i
= 0; i
< num_regs
; i
++)
8291 valid_p
&= tdesc_numbered_register (feature_core
, tdesc_data
, i
,
8292 tdep
->register_names
[i
]);
8296 /* Need to include %mxcsr, so add one. */
8297 num_regs
+= tdep
->num_xmm_regs
+ 1;
8298 for (; i
< num_regs
; i
++)
8299 valid_p
&= tdesc_numbered_register (feature_sse
, tdesc_data
, i
,
8300 tdep
->register_names
[i
]);
8305 tdep
->xcr0
|= X86_XSTATE_MPX_MASK
;
8307 if (tdep
->bnd0r_regnum
< 0)
8309 tdep
->mpx_register_names
= i386_mpx_names
;
8310 tdep
->bnd0r_regnum
= I386_BND0R_REGNUM
;
8311 tdep
->bndcfgu_regnum
= I386_BNDCFGU_REGNUM
;
8314 for (i
= 0; i
< I387_NUM_MPX_REGS
; i
++)
8315 valid_p
&= tdesc_numbered_register (feature_mpx
, tdesc_data
,
8316 I387_BND0R_REGNUM (tdep
) + i
,
8317 tdep
->mpx_register_names
[i
]);
8320 if (feature_segments
)
8322 if (tdep
->fsbase_regnum
< 0)
8323 tdep
->fsbase_regnum
= I386_FSBASE_REGNUM
;
8324 valid_p
&= tdesc_numbered_register (feature_segments
, tdesc_data
,
8325 tdep
->fsbase_regnum
, "fs_base");
8326 valid_p
&= tdesc_numbered_register (feature_segments
, tdesc_data
,
8327 tdep
->fsbase_regnum
+ 1, "gs_base");
8332 tdep
->xcr0
|= X86_XSTATE_PKRU
;
8333 if (tdep
->pkru_regnum
< 0)
8335 tdep
->pkeys_register_names
= i386_pkeys_names
;
8336 tdep
->pkru_regnum
= I386_PKRU_REGNUM
;
8337 tdep
->num_pkeys_regs
= 1;
8340 for (i
= 0; i
< I387_NUM_PKEYS_REGS
; i
++)
8341 valid_p
&= tdesc_numbered_register (feature_pkeys
, tdesc_data
,
8342 I387_PKRU_REGNUM (tdep
) + i
,
8343 tdep
->pkeys_register_names
[i
]);
8351 /* Implement the type_align gdbarch function. */
8354 i386_type_align (struct gdbarch
*gdbarch
, struct type
*type
)
8356 type
= check_typedef (type
);
8358 if (gdbarch_ptr_bit (gdbarch
) == 32)
8360 if ((type
->code () == TYPE_CODE_INT
8361 || type
->code () == TYPE_CODE_FLT
)
8362 && TYPE_LENGTH (type
) > 4)
8365 /* Handle x86's funny long double. */
8366 if (type
->code () == TYPE_CODE_FLT
8367 && gdbarch_long_double_bit (gdbarch
) == TYPE_LENGTH (type
) * 8)
8375 /* Note: This is called for both i386 and amd64. */
8377 static struct gdbarch
*
8378 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
8380 struct gdbarch_tdep
*tdep
;
8381 struct gdbarch
*gdbarch
;
8382 const struct target_desc
*tdesc
;
8388 /* If there is already a candidate, use it. */
8389 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
8391 return arches
->gdbarch
;
8393 /* Allocate space for the new architecture. Assume i386 for now. */
8394 tdep
= XCNEW (struct gdbarch_tdep
);
8395 gdbarch
= gdbarch_alloc (&info
, tdep
);
8397 /* General-purpose registers. */
8398 tdep
->gregset_reg_offset
= NULL
;
8399 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
8400 tdep
->sizeof_gregset
= 0;
8402 /* Floating-point registers. */
8403 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
8404 tdep
->fpregset
= &i386_fpregset
;
8406 /* The default settings include the FPU registers, the MMX registers
8407 and the SSE registers. This can be overridden for a specific ABI
8408 by adjusting the members `st0_regnum', `mm0_regnum' and
8409 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
8410 will show up in the output of "info all-registers". */
8412 tdep
->st0_regnum
= I386_ST0_REGNUM
;
8414 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
8415 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
8417 tdep
->jb_pc_offset
= -1;
8418 tdep
->struct_return
= pcc_struct_return
;
8419 tdep
->sigtramp_start
= 0;
8420 tdep
->sigtramp_end
= 0;
8421 tdep
->sigtramp_p
= i386_sigtramp_p
;
8422 tdep
->sigcontext_addr
= NULL
;
8423 tdep
->sc_reg_offset
= NULL
;
8424 tdep
->sc_pc_offset
= -1;
8425 tdep
->sc_sp_offset
= -1;
8427 tdep
->xsave_xcr0_offset
= -1;
8429 tdep
->record_regmap
= i386_record_regmap
;
8431 set_gdbarch_type_align (gdbarch
, i386_type_align
);
8433 /* The format used for `long double' on almost all i386 targets is
8434 the i387 extended floating-point format. In fact, of all targets
8435 in the GCC 2.95 tree, only OSF/1 does it different, and insists
8436 on having a `long double' that's not `long' at all. */
8437 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
8439 /* Although the i387 extended floating-point has only 80 significant
8440 bits, a `long double' actually takes up 96, probably to enforce
8442 set_gdbarch_long_double_bit (gdbarch
, 96);
8444 /* Support of bfloat16 format. */
8445 set_gdbarch_bfloat16_format (gdbarch
, floatformats_bfloat16
);
8447 /* Support for floating-point data type variants. */
8448 set_gdbarch_floatformat_for_type (gdbarch
, i386_floatformat_for_type
);
8450 /* Register numbers of various important registers. */
8451 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
8452 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
8453 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
8454 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
8456 /* NOTE: kettenis/20040418: GCC does have two possible register
8457 numbering schemes on the i386: dbx and SVR4. These schemes
8458 differ in how they number %ebp, %esp, %eflags, and the
8459 floating-point registers, and are implemented by the arrays
8460 dbx_register_map[] and svr4_dbx_register_map in
8461 gcc/config/i386.c. GCC also defines a third numbering scheme in
8462 gcc/config/i386.c, which it designates as the "default" register
8463 map used in 64bit mode. This last register numbering scheme is
8464 implemented in dbx64_register_map, and is used for AMD64; see
8467 Currently, each GCC i386 target always uses the same register
8468 numbering scheme across all its supported debugging formats
8469 i.e. SDB (COFF), stabs and DWARF 2. This is because
8470 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
8471 DBX_REGISTER_NUMBER macro which is defined by each target's
8472 respective config header in a manner independent of the requested
8473 output debugging format.
8475 This does not match the arrangement below, which presumes that
8476 the SDB and stabs numbering schemes differ from the DWARF and
8477 DWARF 2 ones. The reason for this arrangement is that it is
8478 likely to get the numbering scheme for the target's
8479 default/native debug format right. For targets where GCC is the
8480 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
8481 targets where the native toolchain uses a different numbering
8482 scheme for a particular debug format (stabs-in-ELF on Solaris)
8483 the defaults below will have to be overridden, like
8484 i386_elf_init_abi() does. */
8486 /* Use the dbx register numbering scheme for stabs and COFF. */
8487 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
8488 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
8490 /* Use the SVR4 register numbering scheme for DWARF 2. */
8491 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_dwarf_reg_to_regnum
);
8493 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
8494 be in use on any of the supported i386 targets. */
8496 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
8498 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
8500 /* Call dummy code. */
8501 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
8502 set_gdbarch_push_dummy_code (gdbarch
, i386_push_dummy_code
);
8503 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
8504 set_gdbarch_frame_align (gdbarch
, i386_frame_align
);
8506 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
8507 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
8508 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
8510 set_gdbarch_return_value (gdbarch
, i386_return_value
);
8512 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
8514 /* Stack grows downward. */
8515 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
8517 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, i386_breakpoint::kind_from_pc
);
8518 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, i386_breakpoint::bp_from_kind
);
8520 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
8521 set_gdbarch_max_insn_length (gdbarch
, I386_MAX_INSN_LEN
);
8523 set_gdbarch_frame_args_skip (gdbarch
, 8);
8525 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
8527 set_gdbarch_dummy_id (gdbarch
, i386_dummy_id
);
8529 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
8531 /* Add the i386 register groups. */
8532 i386_add_reggroups (gdbarch
);
8533 tdep
->register_reggroup_p
= i386_register_reggroup_p
;
8535 /* Helper for function argument information. */
8536 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
8538 /* Hook the function epilogue frame unwinder. This unwinder is
8539 appended to the list first, so that it supercedes the DWARF
8540 unwinder in function epilogues (where the DWARF unwinder
8541 currently fails). */
8542 frame_unwind_append_unwinder (gdbarch
, &i386_epilogue_frame_unwind
);
8544 /* Hook in the DWARF CFI frame unwinder. This unwinder is appended
8545 to the list before the prologue-based unwinders, so that DWARF
8546 CFI info will be used if it is available. */
8547 dwarf2_append_unwinders (gdbarch
);
8549 frame_base_set_default (gdbarch
, &i386_frame_base
);
8551 /* Pseudo registers may be changed by amd64_init_abi. */
8552 set_gdbarch_pseudo_register_read_value (gdbarch
,
8553 i386_pseudo_register_read_value
);
8554 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
8555 set_gdbarch_ax_pseudo_register_collect (gdbarch
,
8556 i386_ax_pseudo_register_collect
);
8558 set_tdesc_pseudo_register_type (gdbarch
, i386_pseudo_register_type
);
8559 set_tdesc_pseudo_register_name (gdbarch
, i386_pseudo_register_name
);
8561 /* Override the normal target description method to make the AVX
8562 upper halves anonymous. */
8563 set_gdbarch_register_name (gdbarch
, i386_register_name
);
8565 /* Even though the default ABI only includes general-purpose registers,
8566 floating-point registers and the SSE registers, we have to leave a
8567 gap for the upper AVX, MPX and AVX512 registers. */
8568 set_gdbarch_num_regs (gdbarch
, I386_NUM_REGS
);
8570 set_gdbarch_gnu_triplet_regexp (gdbarch
, i386_gnu_triplet_regexp
);
8572 /* Get the x86 target description from INFO. */
8573 tdesc
= info
.target_desc
;
8574 if (! tdesc_has_registers (tdesc
))
8575 tdesc
= i386_target_description (X86_XSTATE_SSE_MASK
, false);
8576 tdep
->tdesc
= tdesc
;
8578 tdep
->num_core_regs
= I386_NUM_GREGS
+ I387_NUM_REGS
;
8579 tdep
->register_names
= i386_register_names
;
8581 /* No upper YMM registers. */
8582 tdep
->ymmh_register_names
= NULL
;
8583 tdep
->ymm0h_regnum
= -1;
8585 /* No upper ZMM registers. */
8586 tdep
->zmmh_register_names
= NULL
;
8587 tdep
->zmm0h_regnum
= -1;
8589 /* No high XMM registers. */
8590 tdep
->xmm_avx512_register_names
= NULL
;
8591 tdep
->xmm16_regnum
= -1;
8593 /* No upper YMM16-31 registers. */
8594 tdep
->ymm16h_register_names
= NULL
;
8595 tdep
->ymm16h_regnum
= -1;
8597 tdep
->num_byte_regs
= 8;
8598 tdep
->num_word_regs
= 8;
8599 tdep
->num_dword_regs
= 0;
8600 tdep
->num_mmx_regs
= 8;
8601 tdep
->num_ymm_regs
= 0;
8603 /* No MPX registers. */
8604 tdep
->bnd0r_regnum
= -1;
8605 tdep
->bndcfgu_regnum
= -1;
8607 /* No AVX512 registers. */
8608 tdep
->k0_regnum
= -1;
8609 tdep
->num_zmm_regs
= 0;
8610 tdep
->num_ymm_avx512_regs
= 0;
8611 tdep
->num_xmm_avx512_regs
= 0;
8613 /* No PKEYS registers */
8614 tdep
->pkru_regnum
= -1;
8615 tdep
->num_pkeys_regs
= 0;
8617 /* No segment base registers. */
8618 tdep
->fsbase_regnum
= -1;
8620 tdesc_arch_data_up tdesc_data
= tdesc_data_alloc ();
8622 set_gdbarch_relocate_instruction (gdbarch
, i386_relocate_instruction
);
8624 set_gdbarch_gen_return_address (gdbarch
, i386_gen_return_address
);
8626 set_gdbarch_insn_is_call (gdbarch
, i386_insn_is_call
);
8627 set_gdbarch_insn_is_ret (gdbarch
, i386_insn_is_ret
);
8628 set_gdbarch_insn_is_jump (gdbarch
, i386_insn_is_jump
);
8630 /* Hook in ABI-specific overrides, if they have been registered.
8631 Note: If INFO specifies a 64 bit arch, this is where we turn
8632 a 32-bit i386 into a 64-bit amd64. */
8633 info
.tdesc_data
= tdesc_data
.get ();
8634 gdbarch_init_osabi (info
, gdbarch
);
8636 if (!i386_validate_tdesc_p (tdep
, tdesc_data
.get ()))
8639 gdbarch_free (gdbarch
);
8643 num_bnd_cooked
= (tdep
->bnd0r_regnum
> 0 ? I387_NUM_BND_REGS
: 0);
8645 /* Wire in pseudo registers. Number of pseudo registers may be
8647 set_gdbarch_num_pseudo_regs (gdbarch
, (tdep
->num_byte_regs
8648 + tdep
->num_word_regs
8649 + tdep
->num_dword_regs
8650 + tdep
->num_mmx_regs
8651 + tdep
->num_ymm_regs
8653 + tdep
->num_ymm_avx512_regs
8654 + tdep
->num_zmm_regs
));
8656 /* Target description may be changed. */
8657 tdesc
= tdep
->tdesc
;
8659 tdesc_use_registers (gdbarch
, tdesc
, std::move (tdesc_data
));
8661 /* Override gdbarch_register_reggroup_p set in tdesc_use_registers. */
8662 set_gdbarch_register_reggroup_p (gdbarch
, tdep
->register_reggroup_p
);
8664 /* Make %al the first pseudo-register. */
8665 tdep
->al_regnum
= gdbarch_num_regs (gdbarch
);
8666 tdep
->ax_regnum
= tdep
->al_regnum
+ tdep
->num_byte_regs
;
8668 ymm0_regnum
= tdep
->ax_regnum
+ tdep
->num_word_regs
;
8669 if (tdep
->num_dword_regs
)
8671 /* Support dword pseudo-register if it hasn't been disabled. */
8672 tdep
->eax_regnum
= ymm0_regnum
;
8673 ymm0_regnum
+= tdep
->num_dword_regs
;
8676 tdep
->eax_regnum
= -1;
8678 mm0_regnum
= ymm0_regnum
;
8679 if (tdep
->num_ymm_regs
)
8681 /* Support YMM pseudo-register if it is available. */
8682 tdep
->ymm0_regnum
= ymm0_regnum
;
8683 mm0_regnum
+= tdep
->num_ymm_regs
;
8686 tdep
->ymm0_regnum
= -1;
8688 if (tdep
->num_ymm_avx512_regs
)
8690 /* Support YMM16-31 pseudo registers if available. */
8691 tdep
->ymm16_regnum
= mm0_regnum
;
8692 mm0_regnum
+= tdep
->num_ymm_avx512_regs
;
8695 tdep
->ymm16_regnum
= -1;
8697 if (tdep
->num_zmm_regs
)
8699 /* Support ZMM pseudo-register if it is available. */
8700 tdep
->zmm0_regnum
= mm0_regnum
;
8701 mm0_regnum
+= tdep
->num_zmm_regs
;
8704 tdep
->zmm0_regnum
= -1;
8706 bnd0_regnum
= mm0_regnum
;
8707 if (tdep
->num_mmx_regs
!= 0)
8709 /* Support MMX pseudo-register if MMX hasn't been disabled. */
8710 tdep
->mm0_regnum
= mm0_regnum
;
8711 bnd0_regnum
+= tdep
->num_mmx_regs
;
8714 tdep
->mm0_regnum
= -1;
8716 if (tdep
->bnd0r_regnum
> 0)
8717 tdep
->bnd0_regnum
= bnd0_regnum
;
8719 tdep
-> bnd0_regnum
= -1;
8721 /* Hook in the legacy prologue-based unwinders last (fallback). */
8722 frame_unwind_append_unwinder (gdbarch
, &i386_stack_tramp_frame_unwind
);
8723 frame_unwind_append_unwinder (gdbarch
, &i386_sigtramp_frame_unwind
);
8724 frame_unwind_append_unwinder (gdbarch
, &i386_frame_unwind
);
8726 /* If we have a register mapping, enable the generic core file
8727 support, unless it has already been enabled. */
8728 if (tdep
->gregset_reg_offset
8729 && !gdbarch_iterate_over_regset_sections_p (gdbarch
))
8730 set_gdbarch_iterate_over_regset_sections
8731 (gdbarch
, i386_iterate_over_regset_sections
);
8733 set_gdbarch_fast_tracepoint_valid_at (gdbarch
,
8734 i386_fast_tracepoint_valid_at
);
8741 /* Return the target description for a specified XSAVE feature mask. */
8743 const struct target_desc
*
8744 i386_target_description (uint64_t xcr0
, bool segments
)
8746 static target_desc
*i386_tdescs \
8747 [2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
8748 target_desc
**tdesc
;
8750 tdesc
= &i386_tdescs
[(xcr0
& X86_XSTATE_SSE
) ? 1 : 0]
8751 [(xcr0
& X86_XSTATE_AVX
) ? 1 : 0]
8752 [(xcr0
& X86_XSTATE_MPX
) ? 1 : 0]
8753 [(xcr0
& X86_XSTATE_AVX512
) ? 1 : 0]
8754 [(xcr0
& X86_XSTATE_PKRU
) ? 1 : 0]
8758 *tdesc
= i386_create_target_description (xcr0
, false, segments
);
8763 #define MPX_BASE_MASK (~(ULONGEST) 0xfff)
8765 /* Find the bound directory base address. */
8767 static unsigned long
8768 i386_mpx_bd_base (void)
8770 struct regcache
*rcache
;
8771 struct gdbarch_tdep
*tdep
;
8773 enum register_status regstatus
;
8775 rcache
= get_current_regcache ();
8776 tdep
= gdbarch_tdep (rcache
->arch ());
8778 regstatus
= regcache_raw_read_unsigned (rcache
, tdep
->bndcfgu_regnum
, &ret
);
8780 if (regstatus
!= REG_VALID
)
8781 error (_("BNDCFGU register invalid, read status %d."), regstatus
);
8783 return ret
& MPX_BASE_MASK
;
8787 i386_mpx_enabled (void)
8789 const struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_current_arch ());
8790 const struct target_desc
*tdesc
= tdep
->tdesc
;
8792 return (tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx") != NULL
);
8795 #define MPX_BD_MASK 0xfffffff00000ULL /* select bits [47:20] */
8796 #define MPX_BT_MASK 0x0000000ffff8 /* select bits [19:3] */
8797 #define MPX_BD_MASK_32 0xfffff000 /* select bits [31:12] */
8798 #define MPX_BT_MASK_32 0x00000ffc /* select bits [11:2] */
8800 /* Find the bound table entry given the pointer location and the base
8801 address of the table. */
8804 i386_mpx_get_bt_entry (CORE_ADDR ptr
, CORE_ADDR bd_base
)
8808 CORE_ADDR mpx_bd_mask
, bd_ptr_r_shift
, bd_ptr_l_shift
;
8809 CORE_ADDR bt_mask
, bt_select_r_shift
, bt_select_l_shift
;
8810 CORE_ADDR bd_entry_addr
;
8813 struct gdbarch
*gdbarch
= get_current_arch ();
8814 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8817 if (gdbarch_ptr_bit (gdbarch
) == 64)
8819 mpx_bd_mask
= (CORE_ADDR
) MPX_BD_MASK
;
8820 bd_ptr_r_shift
= 20;
8822 bt_select_r_shift
= 3;
8823 bt_select_l_shift
= 5;
8824 bt_mask
= (CORE_ADDR
) MPX_BT_MASK
;
8826 if ( sizeof (CORE_ADDR
) == 4)
8827 error (_("bound table examination not supported\
8828 for 64-bit process with 32-bit GDB"));
8832 mpx_bd_mask
= MPX_BD_MASK_32
;
8833 bd_ptr_r_shift
= 12;
8835 bt_select_r_shift
= 2;
8836 bt_select_l_shift
= 4;
8837 bt_mask
= MPX_BT_MASK_32
;
8840 offset1
= ((ptr
& mpx_bd_mask
) >> bd_ptr_r_shift
) << bd_ptr_l_shift
;
8841 bd_entry_addr
= bd_base
+ offset1
;
8842 bd_entry
= read_memory_typed_address (bd_entry_addr
, data_ptr_type
);
8844 if ((bd_entry
& 0x1) == 0)
8845 error (_("Invalid bounds directory entry at %s."),
8846 paddress (get_current_arch (), bd_entry_addr
));
8848 /* Clearing status bit. */
8850 bt_addr
= bd_entry
& ~bt_select_r_shift
;
8851 offset2
= ((ptr
& bt_mask
) >> bt_select_r_shift
) << bt_select_l_shift
;
8853 return bt_addr
+ offset2
;
8856 /* Print routine for the mpx bounds. */
8859 i386_mpx_print_bounds (const CORE_ADDR bt_entry
[4])
8861 struct ui_out
*uiout
= current_uiout
;
8863 struct gdbarch
*gdbarch
= get_current_arch ();
8864 CORE_ADDR onecompl
= ~((CORE_ADDR
) 0);
8865 int bounds_in_map
= ((~bt_entry
[1] == 0 && bt_entry
[0] == onecompl
) ? 1 : 0);
8867 if (bounds_in_map
== 1)
8869 uiout
->text ("Null bounds on map:");
8870 uiout
->text (" pointer value = ");
8871 uiout
->field_core_addr ("pointer-value", gdbarch
, bt_entry
[2]);
8877 uiout
->text ("{lbound = ");
8878 uiout
->field_core_addr ("lower-bound", gdbarch
, bt_entry
[0]);
8879 uiout
->text (", ubound = ");
8881 /* The upper bound is stored in 1's complement. */
8882 uiout
->field_core_addr ("upper-bound", gdbarch
, ~bt_entry
[1]);
8883 uiout
->text ("}: pointer value = ");
8884 uiout
->field_core_addr ("pointer-value", gdbarch
, bt_entry
[2]);
8886 if (gdbarch_ptr_bit (gdbarch
) == 64)
8887 size
= ( (~(int64_t) bt_entry
[1]) - (int64_t) bt_entry
[0]);
8889 size
= ( ~((int32_t) bt_entry
[1]) - (int32_t) bt_entry
[0]);
8891 /* In case the bounds are 0x0 and 0xffff... the difference will be -1.
8892 -1 represents in this sense full memory access, and there is no need
8895 size
= (size
> -1 ? size
+ 1 : size
);
8896 uiout
->text (", size = ");
8897 uiout
->field_string ("size", plongest (size
));
8899 uiout
->text (", metadata = ");
8900 uiout
->field_core_addr ("metadata", gdbarch
, bt_entry
[3]);
8905 /* Implement the command "show mpx bound". */
8908 i386_mpx_info_bounds (const char *args
, int from_tty
)
8910 CORE_ADDR bd_base
= 0;
8912 CORE_ADDR bt_entry_addr
= 0;
8913 CORE_ADDR bt_entry
[4];
8915 struct gdbarch
*gdbarch
= get_current_arch ();
8916 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8918 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_i386
8919 || !i386_mpx_enabled ())
8921 printf_unfiltered (_("Intel Memory Protection Extensions not "
8922 "supported on this target.\n"));
8928 printf_unfiltered (_("Address of pointer variable expected.\n"));
8932 addr
= parse_and_eval_address (args
);
8934 bd_base
= i386_mpx_bd_base ();
8935 bt_entry_addr
= i386_mpx_get_bt_entry (addr
, bd_base
);
8937 memset (bt_entry
, 0, sizeof (bt_entry
));
8939 for (i
= 0; i
< 4; i
++)
8940 bt_entry
[i
] = read_memory_typed_address (bt_entry_addr
8941 + i
* TYPE_LENGTH (data_ptr_type
),
8944 i386_mpx_print_bounds (bt_entry
);
8947 /* Implement the command "set mpx bound". */
8950 i386_mpx_set_bounds (const char *args
, int from_tty
)
8952 CORE_ADDR bd_base
= 0;
8953 CORE_ADDR addr
, lower
, upper
;
8954 CORE_ADDR bt_entry_addr
= 0;
8955 CORE_ADDR bt_entry
[2];
8956 const char *input
= args
;
8958 struct gdbarch
*gdbarch
= get_current_arch ();
8959 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
8960 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8962 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_i386
8963 || !i386_mpx_enabled ())
8964 error (_("Intel Memory Protection Extensions not supported\
8968 error (_("Pointer value expected."));
8970 addr
= value_as_address (parse_to_comma_and_eval (&input
));
8972 if (input
[0] == ',')
8974 if (input
[0] == '\0')
8975 error (_("wrong number of arguments: missing lower and upper bound."));
8976 lower
= value_as_address (parse_to_comma_and_eval (&input
));
8978 if (input
[0] == ',')
8980 if (input
[0] == '\0')
8981 error (_("Wrong number of arguments; Missing upper bound."));
8982 upper
= value_as_address (parse_to_comma_and_eval (&input
));
8984 bd_base
= i386_mpx_bd_base ();
8985 bt_entry_addr
= i386_mpx_get_bt_entry (addr
, bd_base
);
8986 for (i
= 0; i
< 2; i
++)
8987 bt_entry
[i
] = read_memory_typed_address (bt_entry_addr
8988 + i
* TYPE_LENGTH (data_ptr_type
),
8990 bt_entry
[0] = (uint64_t) lower
;
8991 bt_entry
[1] = ~(uint64_t) upper
;
8993 for (i
= 0; i
< 2; i
++)
8994 write_memory_unsigned_integer (bt_entry_addr
8995 + i
* TYPE_LENGTH (data_ptr_type
),
8996 TYPE_LENGTH (data_ptr_type
), byte_order
,
9000 static struct cmd_list_element
*mpx_set_cmdlist
, *mpx_show_cmdlist
;
9002 void _initialize_i386_tdep ();
9004 _initialize_i386_tdep ()
9006 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
9008 /* Add the variable that controls the disassembly flavor. */
9009 add_setshow_enum_cmd ("disassembly-flavor", no_class
, valid_flavors
,
9010 &disassembly_flavor
, _("\
9011 Set the disassembly flavor."), _("\
9012 Show the disassembly flavor."), _("\
9013 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
9015 NULL
, /* FIXME: i18n: */
9016 &setlist
, &showlist
);
9018 /* Add the variable that controls the convention for returning
9020 add_setshow_enum_cmd ("struct-convention", no_class
, valid_conventions
,
9021 &struct_convention
, _("\
9022 Set the convention for returning small structs."), _("\
9023 Show the convention for returning small structs."), _("\
9024 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
9027 NULL
, /* FIXME: i18n: */
9028 &setlist
, &showlist
);
9030 /* Add "mpx" prefix for the set commands. */
9032 add_basic_prefix_cmd ("mpx", class_support
, _("\
9033 Set Intel Memory Protection Extensions specific variables."),
9034 &mpx_set_cmdlist
, "set mpx ",
9035 0 /* allow-unknown */, &setlist
);
9037 /* Add "mpx" prefix for the show commands. */
9039 add_show_prefix_cmd ("mpx", class_support
, _("\
9040 Show Intel Memory Protection Extensions specific variables."),
9041 &mpx_show_cmdlist
, "show mpx ",
9042 0 /* allow-unknown */, &showlist
);
9044 /* Add "bound" command for the show mpx commands list. */
9046 add_cmd ("bound", no_class
, i386_mpx_info_bounds
,
9047 "Show the memory bounds for a given array/pointer storage\
9048 in the bound table.",
9051 /* Add "bound" command for the set mpx commands list. */
9053 add_cmd ("bound", no_class
, i386_mpx_set_bounds
,
9054 "Set the memory bounds for a given array/pointer storage\
9055 in the bound table.",
9058 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
9059 i386_svr4_init_abi
);
9061 /* Initialize the i386-specific register groups. */
9062 i386_init_reggroups ();
9064 /* Tell remote stub that we support XML target description. */
9065 register_remote_support_xml ("i386");