1 /* Intel 386 target-dependent stuff.
3 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
25 #include "arch-utils.h"
27 #include "dummy-frame.h"
28 #include "dwarf2-frame.h"
30 #include "floatformat.h"
32 #include "frame-base.h"
33 #include "frame-unwind.h"
40 #include "reggroups.h"
48 #include "gdb_assert.h"
49 #include "gdb_string.h"
51 #include "i386-tdep.h"
52 #include "i387-tdep.h"
54 /* Names of the registers. The first 10 registers match the register
55 numbering scheme used by GCC for stabs and DWARF. */
57 static char *i386_register_names
[] =
59 "eax", "ecx", "edx", "ebx",
60 "esp", "ebp", "esi", "edi",
61 "eip", "eflags", "cs", "ss",
62 "ds", "es", "fs", "gs",
63 "st0", "st1", "st2", "st3",
64 "st4", "st5", "st6", "st7",
65 "fctrl", "fstat", "ftag", "fiseg",
66 "fioff", "foseg", "fooff", "fop",
67 "xmm0", "xmm1", "xmm2", "xmm3",
68 "xmm4", "xmm5", "xmm6", "xmm7",
72 static const int i386_num_register_names
= ARRAY_SIZE (i386_register_names
);
76 static char *i386_mmx_names
[] =
78 "mm0", "mm1", "mm2", "mm3",
79 "mm4", "mm5", "mm6", "mm7"
82 static const int i386_num_mmx_regs
= ARRAY_SIZE (i386_mmx_names
);
85 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
87 int mm0_regnum
= gdbarch_tdep (gdbarch
)->mm0_regnum
;
92 return (regnum
>= mm0_regnum
&& regnum
< mm0_regnum
+ i386_num_mmx_regs
);
98 i386_sse_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
100 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
102 #define I387_ST0_REGNUM tdep->st0_regnum
103 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
105 if (I387_NUM_XMM_REGS
== 0)
108 return (I387_XMM0_REGNUM
<= regnum
&& regnum
< I387_MXCSR_REGNUM
);
110 #undef I387_ST0_REGNUM
111 #undef I387_NUM_XMM_REGS
115 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
117 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
119 #define I387_ST0_REGNUM tdep->st0_regnum
120 #define I387_NUM_XMM_REGS tdep->num_xmm_regs
122 if (I387_NUM_XMM_REGS
== 0)
125 return (regnum
== I387_MXCSR_REGNUM
);
127 #undef I387_ST0_REGNUM
128 #undef I387_NUM_XMM_REGS
131 #define I387_ST0_REGNUM (gdbarch_tdep (current_gdbarch)->st0_regnum)
132 #define I387_MM0_REGNUM (gdbarch_tdep (current_gdbarch)->mm0_regnum)
133 #define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
138 i386_fp_regnum_p (int regnum
)
140 if (I387_ST0_REGNUM
< 0)
143 return (I387_ST0_REGNUM
<= regnum
&& regnum
< I387_FCTRL_REGNUM
);
147 i386_fpc_regnum_p (int regnum
)
149 if (I387_ST0_REGNUM
< 0)
152 return (I387_FCTRL_REGNUM
<= regnum
&& regnum
< I387_XMM0_REGNUM
);
155 /* Return the name of register REG. */
158 i386_register_name (int reg
)
160 if (i386_mmx_regnum_p (current_gdbarch
, reg
))
161 return i386_mmx_names
[reg
- I387_MM0_REGNUM
];
163 if (reg
>= 0 && reg
< i386_num_register_names
)
164 return i386_register_names
[reg
];
170 /* FIXME: jimb/2004-04-01: I don't think these functions are right.
171 For a given platform, GCC always uses the same register numbering
172 in both STABS and Dwarf2: gcc/dbxout.c and gcc/dwarf2out.c both use
173 the DBX_REGISTER_NUMBER macro, as defined by the config headers.
174 If you compile a program so that its variables are allocated to
175 floating-point registers, first with STABS and again with Dwarf 2,
176 you'll see that the variable's register numbers are the same in
179 GCC does use (at least) two different register numberings on the
180 i386; they differ in how they number %ebp, %esp, %eflags, and the
181 floating-point registers. And it has a third numbering for "64bit
182 mode", which I assume is x86_64. But it always uses a given
183 numbering in both STABS and Dwarf.
185 This does not match the arrangement we have below, which presumes
186 that STABS and Dwarf numberings are different, and does some
187 strange mixing and matching (e.g., registering the Dwarf 2 function
188 as the STABS function for "Generic i386 ELF") to get close enough
189 to the right effect on the platforms we care about.
191 If we wanted to match GCC, we should have two separate register
192 number translation functions (we handle x86_64 in a separate tdep
193 file altogether), one corresponding to each of GCC's i386 register
194 maps. And for a given platform, we would register one of them as
195 both the STABS and Dwarf 2 functions.
197 However, we don't aspire to match GCC; we aspire to match the
198 native system's tools. I don't have access to lots of different
199 native compilers and debuggers to verify that GCC is matching their
200 behavior in this regard. Is it sufficient to argue that we at
201 least want to match GNU's compiler, and say we'll fix bugs relative
202 to native tools as they're reported? */
205 /* Convert stabs register number REG to the appropriate register
206 number used by GDB. */
209 i386_stab_reg_to_regnum (int reg
)
211 /* This implements what GCC calls the "default" register map. */
212 if (reg
>= 0 && reg
<= 7)
214 /* General-purpose registers. */
217 else if (reg
>= 12 && reg
<= 19)
219 /* Floating-point registers. */
220 return reg
- 12 + I387_ST0_REGNUM
;
222 else if (reg
>= 21 && reg
<= 28)
225 return reg
- 21 + I387_XMM0_REGNUM
;
227 else if (reg
>= 29 && reg
<= 36)
230 return reg
- 29 + I387_MM0_REGNUM
;
233 /* This will hopefully provoke a warning. */
234 return NUM_REGS
+ NUM_PSEUDO_REGS
;
237 /* Convert DWARF register number REG to the appropriate register
238 number used by GDB. */
241 i386_dwarf_reg_to_regnum (int reg
)
243 /* The DWARF register numbering includes %eip and %eflags, and
244 numbers the floating point registers differently. */
245 if (reg
>= 0 && reg
<= 9)
247 /* General-purpose registers. */
250 else if (reg
>= 11 && reg
<= 18)
252 /* Floating-point registers. */
253 return reg
- 11 + I387_ST0_REGNUM
;
257 /* The SSE and MMX registers have identical numbers as in stabs. */
258 return i386_stab_reg_to_regnum (reg
);
261 /* This will hopefully provoke a warning. */
262 return NUM_REGS
+ NUM_PSEUDO_REGS
;
265 #undef I387_ST0_REGNUM
266 #undef I387_MM0_REGNUM
267 #undef I387_NUM_XMM_REGS
270 /* This is the variable that is set with "set disassembly-flavor", and
271 its legitimate values. */
272 static const char att_flavor
[] = "att";
273 static const char intel_flavor
[] = "intel";
274 static const char *valid_flavors
[] =
280 static const char *disassembly_flavor
= att_flavor
;
283 /* Use the program counter to determine the contents and size of a
284 breakpoint instruction. Return a pointer to a string of bytes that
285 encode a breakpoint instruction, store the length of the string in
286 *LEN and optionally adjust *PC to point to the correct memory
287 location for inserting the breakpoint.
289 On the i386 we have a single breakpoint that fits in a single byte
290 and can be inserted anywhere.
292 This function is 64-bit safe. */
294 static const unsigned char *
295 i386_breakpoint_from_pc (CORE_ADDR
*pc
, int *len
)
297 static unsigned char break_insn
[] = { 0xcc }; /* int 3 */
299 *len
= sizeof (break_insn
);
303 #ifdef I386_REGNO_TO_SYMMETRY
304 #error "The Sequent Symmetry is no longer supported."
307 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
308 and %esp "belong" to the calling function. Therefore these
309 registers should be saved if they're going to be modified. */
311 /* The maximum number of saved registers. This should include all
312 registers mentioned above, and %eip. */
313 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
315 struct i386_frame_cache
322 /* Saved registers. */
323 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
327 /* Stack space reserved for local variables. */
331 /* Allocate and initialize a frame cache. */
333 static struct i386_frame_cache
*
334 i386_alloc_frame_cache (void)
336 struct i386_frame_cache
*cache
;
339 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
343 cache
->sp_offset
= -4;
346 /* Saved registers. We initialize these to -1 since zero is a valid
347 offset (that's where %ebp is supposed to be stored). */
348 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
349 cache
->saved_regs
[i
] = -1;
351 cache
->pc_in_eax
= 0;
353 /* Frameless until proven otherwise. */
359 /* If the instruction at PC is a jump, return the address of its
360 target. Otherwise, return PC. */
363 i386_follow_jump (CORE_ADDR pc
)
369 op
= read_memory_unsigned_integer (pc
, 1);
373 op
= read_memory_unsigned_integer (pc
+ 1, 1);
379 /* Relative jump: if data16 == 0, disp32, else disp16. */
382 delta
= read_memory_integer (pc
+ 2, 2);
384 /* Include the size of the jmp instruction (including the
390 delta
= read_memory_integer (pc
+ 1, 4);
392 /* Include the size of the jmp instruction. */
397 /* Relative jump, disp8 (ignore data16). */
398 delta
= read_memory_integer (pc
+ data16
+ 1, 1);
407 /* Check whether PC points at a prologue for a function returning a
408 structure or union. If so, it updates CACHE and returns the
409 address of the first instruction after the code sequence that
410 removes the "hidden" argument from the stack or CURRENT_PC,
411 whichever is smaller. Otherwise, return PC. */
414 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
415 struct i386_frame_cache
*cache
)
417 /* Functions that return a structure or union start with:
420 xchgl %eax, (%esp) 0x87 0x04 0x24
421 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
423 (the System V compiler puts out the second `xchg' instruction,
424 and the assembler doesn't try to optimize it, so the 'sib' form
425 gets generated). This sequence is used to get the address of the
426 return buffer for a function that returns a structure. */
427 static unsigned char proto1
[3] = { 0x87, 0x04, 0x24 };
428 static unsigned char proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
429 unsigned char buf
[4];
432 if (current_pc
<= pc
)
435 op
= read_memory_unsigned_integer (pc
, 1);
437 if (op
!= 0x58) /* popl %eax */
440 read_memory (pc
+ 1, buf
, 4);
441 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
444 if (current_pc
== pc
)
446 cache
->sp_offset
+= 4;
450 if (current_pc
== pc
+ 1)
452 cache
->pc_in_eax
= 1;
456 if (buf
[1] == proto1
[1])
463 i386_skip_probe (CORE_ADDR pc
)
465 /* A function may start with
476 unsigned char buf
[8];
479 op
= read_memory_unsigned_integer (pc
, 1);
481 if (op
== 0x68 || op
== 0x6a)
485 /* Skip past the `pushl' instruction; it has either a one-byte or a
486 four-byte operand, depending on the opcode. */
492 /* Read the following 8 bytes, which should be `call _probe' (6
493 bytes) followed by `addl $4,%esp' (2 bytes). */
494 read_memory (pc
+ delta
, buf
, sizeof (buf
));
495 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
496 pc
+= delta
+ sizeof (buf
);
502 /* Check whether PC points at a code that sets up a new stack frame.
503 If so, it updates CACHE and returns the address of the first
504 instruction after the sequence that sets removes the "hidden"
505 argument from the stack or CURRENT_PC, whichever is smaller.
506 Otherwise, return PC. */
509 i386_analyze_frame_setup (CORE_ADDR pc
, CORE_ADDR current_pc
,
510 struct i386_frame_cache
*cache
)
515 if (current_pc
<= pc
)
518 op
= read_memory_unsigned_integer (pc
, 1);
520 if (op
== 0x55) /* pushl %ebp */
522 /* Take into account that we've executed the `pushl %ebp' that
523 starts this instruction sequence. */
524 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
525 cache
->sp_offset
+= 4;
527 /* If that's all, return now. */
528 if (current_pc
<= pc
+ 1)
531 op
= read_memory_unsigned_integer (pc
+ 1, 1);
533 /* Check for some special instructions that might be migrated
534 by GCC into the prologue. We check for
548 Because of the symmetry, there are actually two ways to
549 encode these instructions; with opcode bytes 0x29 and 0x2b
550 for `subl' and opcode bytes 0x31 and 0x33 for `xorl'.
552 Make sure we only skip these instructions if we later see the
553 `movl %esp, %ebp' that actually sets up the frame. */
554 while (op
== 0x29 || op
== 0x2b || op
== 0x31 || op
== 0x33)
556 op
= read_memory_unsigned_integer (pc
+ skip
+ 2, 1);
559 case 0xdb: /* %ebx */
560 case 0xc9: /* %ecx */
561 case 0xd2: /* %edx */
562 case 0xc0: /* %eax */
569 op
= read_memory_unsigned_integer (pc
+ skip
+ 1, 1);
572 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
576 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xec)
580 if (read_memory_unsigned_integer (pc
+ skip
+ 2, 1) != 0xe5)
587 /* OK, we actually have a frame. We just don't know how large
588 it is yet. Set its size to zero. We'll adjust it if
589 necessary. We also now commit to skipping the special
590 instructions mentioned before. */
594 /* If that's all, return now. */
595 if (current_pc
<= pc
+ 3)
598 /* Check for stack adjustment
602 NOTE: You can't subtract a 16 bit immediate from a 32 bit
603 reg, so we don't have to worry about a data16 prefix. */
604 op
= read_memory_unsigned_integer (pc
+ 3, 1);
607 /* `subl' with 8 bit immediate. */
608 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
609 /* Some instruction starting with 0x83 other than `subl'. */
612 /* `subl' with signed byte immediate (though it wouldn't make
613 sense to be negative). */
614 cache
->locals
= read_memory_integer (pc
+ 5, 1);
619 /* Maybe it is `subl' with a 32 bit immedediate. */
620 if (read_memory_unsigned_integer (pc
+ 4, 1) != 0xec)
621 /* Some instruction starting with 0x81 other than `subl'. */
624 /* It is `subl' with a 32 bit immediate. */
625 cache
->locals
= read_memory_integer (pc
+ 5, 4);
630 /* Some instruction other than `subl'. */
634 else if (op
== 0xc8) /* enter $XXX */
636 cache
->locals
= read_memory_unsigned_integer (pc
+ 1, 2);
643 /* Check whether PC points at code that saves registers on the stack.
644 If so, it updates CACHE and returns the address of the first
645 instruction after the register saves or CURRENT_PC, whichever is
646 smaller. Otherwise, return PC. */
649 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
650 struct i386_frame_cache
*cache
)
652 CORE_ADDR offset
= 0;
656 if (cache
->locals
> 0)
657 offset
-= cache
->locals
;
658 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
660 op
= read_memory_unsigned_integer (pc
, 1);
661 if (op
< 0x50 || op
> 0x57)
665 cache
->saved_regs
[op
- 0x50] = offset
;
666 cache
->sp_offset
+= 4;
673 /* Do a full analysis of the prologue at PC and update CACHE
674 accordingly. Bail out early if CURRENT_PC is reached. Return the
675 address where the analysis stopped.
677 We handle these cases:
679 The startup sequence can be at the start of the function, or the
680 function can start with a branch to startup code at the end.
682 %ebp can be set up with either the 'enter' instruction, or "pushl
683 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
684 once used in the System V compiler).
686 Local space is allocated just below the saved %ebp by either the
687 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
688 bit unsigned argument for space to allocate, and the 'addl'
689 instruction could have either a signed byte, or 32 bit immediate.
691 Next, the registers used by this function are pushed. With the
692 System V compiler they will always be in the order: %edi, %esi,
693 %ebx (and sometimes a harmless bug causes it to also save but not
694 restore %eax); however, the code below is willing to see the pushes
695 in any order, and will handle up to 8 of them.
697 If the setup sequence is at the end of the function, then the next
698 instruction will be a branch back to the start. */
701 i386_analyze_prologue (CORE_ADDR pc
, CORE_ADDR current_pc
,
702 struct i386_frame_cache
*cache
)
704 pc
= i386_follow_jump (pc
);
705 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
706 pc
= i386_skip_probe (pc
);
707 pc
= i386_analyze_frame_setup (pc
, current_pc
, cache
);
708 return i386_analyze_register_saves (pc
, current_pc
, cache
);
711 /* Return PC of first real instruction. */
714 i386_skip_prologue (CORE_ADDR start_pc
)
716 static unsigned char pic_pat
[6] =
718 0xe8, 0, 0, 0, 0, /* call 0x0 */
719 0x5b, /* popl %ebx */
721 struct i386_frame_cache cache
;
727 pc
= i386_analyze_prologue (start_pc
, 0xffffffff, &cache
);
728 if (cache
.locals
< 0)
731 /* Found valid frame setup. */
733 /* The native cc on SVR4 in -K PIC mode inserts the following code
734 to get the address of the global offset table (GOT) into register
739 movl %ebx,x(%ebp) (optional)
742 This code is with the rest of the prologue (at the end of the
743 function), so we have to skip it to get to the first real
744 instruction at the start of the function. */
746 for (i
= 0; i
< 6; i
++)
748 op
= read_memory_unsigned_integer (pc
+ i
, 1);
749 if (pic_pat
[i
] != op
)
756 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
758 if (op
== 0x89) /* movl %ebx, x(%ebp) */
760 op
= read_memory_unsigned_integer (pc
+ delta
+ 1, 1);
762 if (op
== 0x5d) /* One byte offset from %ebp. */
764 else if (op
== 0x9d) /* Four byte offset from %ebp. */
766 else /* Unexpected instruction. */
769 op
= read_memory_unsigned_integer (pc
+ delta
, 1);
773 if (delta
> 0 && op
== 0x81
774 && read_memory_unsigned_integer (pc
+ delta
+ 1, 1) == 0xc3);
780 return i386_follow_jump (pc
);
783 /* This function is 64-bit safe. */
786 i386_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
790 frame_unwind_register (next_frame
, PC_REGNUM
, buf
);
791 return extract_typed_address (buf
, builtin_type_void_func_ptr
);
797 static struct i386_frame_cache
*
798 i386_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
800 struct i386_frame_cache
*cache
;
807 cache
= i386_alloc_frame_cache ();
810 /* In principle, for normal frames, %ebp holds the frame pointer,
811 which holds the base address for the current stack frame.
812 However, for functions that don't need it, the frame pointer is
813 optional. For these "frameless" functions the frame pointer is
814 actually the frame pointer of the calling frame. Signal
815 trampolines are just a special case of a "frameless" function.
816 They (usually) share their frame pointer with the frame that was
817 in progress when the signal occurred. */
819 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
820 cache
->base
= extract_unsigned_integer (buf
, 4);
821 if (cache
->base
== 0)
824 /* For normal frames, %eip is stored at 4(%ebp). */
825 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
827 cache
->pc
= frame_func_unwind (next_frame
);
829 i386_analyze_prologue (cache
->pc
, frame_pc_unwind (next_frame
), cache
);
831 if (cache
->locals
< 0)
833 /* We didn't find a valid frame, which means that CACHE->base
834 currently holds the frame pointer for our calling frame. If
835 we're at the start of a function, or somewhere half-way its
836 prologue, the function's frame probably hasn't been fully
837 setup yet. Try to reconstruct the base address for the stack
838 frame by looking at the stack pointer. For truly "frameless"
839 functions this might work too. */
841 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
842 cache
->base
= extract_unsigned_integer (buf
, 4) + cache
->sp_offset
;
845 /* Now that we have the base address for the stack frame we can
846 calculate the value of %esp in the calling frame. */
847 cache
->saved_sp
= cache
->base
+ 8;
849 /* Adjust all the saved registers such that they contain addresses
850 instead of offsets. */
851 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
852 if (cache
->saved_regs
[i
] != -1)
853 cache
->saved_regs
[i
] += cache
->base
;
859 i386_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
860 struct frame_id
*this_id
)
862 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
864 /* This marks the outermost frame. */
865 if (cache
->base
== 0)
868 /* See the end of i386_push_dummy_call. */
869 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
873 i386_frame_prev_register (struct frame_info
*next_frame
, void **this_cache
,
874 int regnum
, int *optimizedp
,
875 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
876 int *realnump
, void *valuep
)
878 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
880 gdb_assert (regnum
>= 0);
882 /* The System V ABI says that:
884 "The flags register contains the system flags, such as the
885 direction flag and the carry flag. The direction flag must be
886 set to the forward (that is, zero) direction before entry and
887 upon exit from a function. Other user flags have no specified
888 role in the standard calling sequence and are not preserved."
890 To guarantee the "upon exit" part of that statement we fake a
891 saved flags register that has its direction flag cleared.
893 Note that GCC doesn't seem to rely on the fact that the direction
894 flag is cleared after a function return; it always explicitly
895 clears the flag before operations where it matters.
897 FIXME: kettenis/20030316: I'm not quite sure whether this is the
898 right thing to do. The way we fake the flags register here makes
899 it impossible to change it. */
901 if (regnum
== I386_EFLAGS_REGNUM
)
911 /* Clear the direction flag. */
912 val
= frame_unwind_register_unsigned (next_frame
,
915 store_unsigned_integer (valuep
, 4, val
);
921 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
923 frame_register_unwind (next_frame
, I386_EAX_REGNUM
,
924 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
928 if (regnum
== I386_ESP_REGNUM
&& cache
->saved_sp
)
936 /* Store the value. */
937 store_unsigned_integer (valuep
, 4, cache
->saved_sp
);
942 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
945 *lvalp
= lval_memory
;
946 *addrp
= cache
->saved_regs
[regnum
];
950 /* Read the value in from memory. */
951 read_memory (*addrp
, valuep
,
952 register_size (current_gdbarch
, regnum
));
957 frame_register_unwind (next_frame
, regnum
,
958 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
961 static const struct frame_unwind i386_frame_unwind
=
965 i386_frame_prev_register
968 static const struct frame_unwind
*
969 i386_frame_sniffer (struct frame_info
*next_frame
)
971 return &i386_frame_unwind
;
975 /* Signal trampolines. */
977 static struct i386_frame_cache
*
978 i386_sigtramp_frame_cache (struct frame_info
*next_frame
, void **this_cache
)
980 struct i386_frame_cache
*cache
;
981 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
988 cache
= i386_alloc_frame_cache ();
990 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
991 cache
->base
= extract_unsigned_integer (buf
, 4) - 4;
993 addr
= tdep
->sigcontext_addr (next_frame
);
994 if (tdep
->sc_reg_offset
)
998 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
1000 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
1001 if (tdep
->sc_reg_offset
[i
] != -1)
1002 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
1006 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
1007 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
1010 *this_cache
= cache
;
1015 i386_sigtramp_frame_this_id (struct frame_info
*next_frame
, void **this_cache
,
1016 struct frame_id
*this_id
)
1018 struct i386_frame_cache
*cache
=
1019 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1021 /* See the end of i386_push_dummy_call. */
1022 (*this_id
) = frame_id_build (cache
->base
+ 8, frame_pc_unwind (next_frame
));
1026 i386_sigtramp_frame_prev_register (struct frame_info
*next_frame
,
1028 int regnum
, int *optimizedp
,
1029 enum lval_type
*lvalp
, CORE_ADDR
*addrp
,
1030 int *realnump
, void *valuep
)
1032 /* Make sure we've initialized the cache. */
1033 i386_sigtramp_frame_cache (next_frame
, this_cache
);
1035 i386_frame_prev_register (next_frame
, this_cache
, regnum
,
1036 optimizedp
, lvalp
, addrp
, realnump
, valuep
);
1039 static const struct frame_unwind i386_sigtramp_frame_unwind
=
1042 i386_sigtramp_frame_this_id
,
1043 i386_sigtramp_frame_prev_register
1046 static const struct frame_unwind
*
1047 i386_sigtramp_frame_sniffer (struct frame_info
*next_frame
)
1049 CORE_ADDR pc
= frame_pc_unwind (next_frame
);
1052 /* We shouldn't even bother to try if the OSABI didn't register
1053 a sigcontext_addr handler. */
1054 if (!gdbarch_tdep (current_gdbarch
)->sigcontext_addr
)
1057 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1058 if (DEPRECATED_PC_IN_SIGTRAMP (pc
, name
))
1059 return &i386_sigtramp_frame_unwind
;
1066 i386_frame_base_address (struct frame_info
*next_frame
, void **this_cache
)
1068 struct i386_frame_cache
*cache
= i386_frame_cache (next_frame
, this_cache
);
1073 static const struct frame_base i386_frame_base
=
1076 i386_frame_base_address
,
1077 i386_frame_base_address
,
1078 i386_frame_base_address
1081 static struct frame_id
1082 i386_unwind_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1087 frame_unwind_register (next_frame
, I386_EBP_REGNUM
, buf
);
1088 fp
= extract_unsigned_integer (buf
, 4);
1090 /* See the end of i386_push_dummy_call. */
1091 return frame_id_build (fp
+ 8, frame_pc_unwind (next_frame
));
1095 /* Figure out where the longjmp will land. Slurp the args out of the
1096 stack. We expect the first arg to be a pointer to the jmp_buf
1097 structure from which we extract the address that we will land at.
1098 This address is copied into PC. This routine returns non-zero on
1101 This function is 64-bit safe. */
1104 i386_get_longjmp_target (CORE_ADDR
*pc
)
1107 CORE_ADDR sp
, jb_addr
;
1108 int jb_pc_offset
= gdbarch_tdep (current_gdbarch
)->jb_pc_offset
;
1109 int len
= TYPE_LENGTH (builtin_type_void_func_ptr
);
1111 /* If JB_PC_OFFSET is -1, we have no way to find out where the
1112 longjmp will land. */
1113 if (jb_pc_offset
== -1)
1116 /* Don't use I386_ESP_REGNUM here, since this function is also used
1118 regcache_cooked_read (current_regcache
, SP_REGNUM
, buf
);
1119 sp
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1120 if (target_read_memory (sp
+ len
, buf
, len
))
1123 jb_addr
= extract_typed_address (buf
, builtin_type_void_data_ptr
);
1124 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, len
))
1127 *pc
= extract_typed_address (buf
, builtin_type_void_func_ptr
);
1133 i386_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1134 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1135 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1136 CORE_ADDR struct_addr
)
1141 /* Push arguments in reverse order. */
1142 for (i
= nargs
- 1; i
>= 0; i
--)
1144 int len
= TYPE_LENGTH (VALUE_ENCLOSING_TYPE (args
[i
]));
1146 /* The System V ABI says that:
1148 "An argument's size is increased, if necessary, to make it a
1149 multiple of [32-bit] words. This may require tail padding,
1150 depending on the size of the argument."
1152 This makes sure the stack says word-aligned. */
1153 sp
-= (len
+ 3) & ~3;
1154 write_memory (sp
, VALUE_CONTENTS_ALL (args
[i
]), len
);
1157 /* Push value address. */
1161 store_unsigned_integer (buf
, 4, struct_addr
);
1162 write_memory (sp
, buf
, 4);
1165 /* Store return address. */
1167 store_unsigned_integer (buf
, 4, bp_addr
);
1168 write_memory (sp
, buf
, 4);
1170 /* Finally, update the stack pointer... */
1171 store_unsigned_integer (buf
, 4, sp
);
1172 regcache_cooked_write (regcache
, I386_ESP_REGNUM
, buf
);
1174 /* ...and fake a frame pointer. */
1175 regcache_cooked_write (regcache
, I386_EBP_REGNUM
, buf
);
1177 /* MarkK wrote: This "+ 8" is all over the place:
1178 (i386_frame_this_id, i386_sigtramp_frame_this_id,
1179 i386_unwind_dummy_id). It's there, since all frame unwinders for
1180 a given target have to agree (within a certain margin) on the
1181 defenition of the stack address of a frame. Otherwise
1182 frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
1183 stack address *before* the function call as a frame's CFA. On
1184 the i386, when %ebp is used as a frame pointer, the offset
1185 between the contents %ebp and the CFA as defined by GCC. */
1189 /* These registers are used for returning integers (and on some
1190 targets also for returning `struct' and `union' values when their
1191 size and alignment match an integer type). */
1192 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
1193 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
1195 /* Read, for architecture GDBARCH, a function return value of TYPE
1196 from REGCACHE, and copy that into VALBUF. */
1199 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1200 struct regcache
*regcache
, void *valbuf
)
1202 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1203 int len
= TYPE_LENGTH (type
);
1204 char buf
[I386_MAX_REGISTER_SIZE
];
1206 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1208 if (tdep
->st0_regnum
< 0)
1210 warning ("Cannot find floating-point return value.");
1211 memset (valbuf
, 0, len
);
1215 /* Floating-point return values can be found in %st(0). Convert
1216 its contents to the desired type. This is probably not
1217 exactly how it would happen on the target itself, but it is
1218 the best we can do. */
1219 regcache_raw_read (regcache
, I386_ST0_REGNUM
, buf
);
1220 convert_typed_floating (buf
, builtin_type_i387_ext
, valbuf
, type
);
1224 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1225 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1227 if (len
<= low_size
)
1229 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1230 memcpy (valbuf
, buf
, len
);
1232 else if (len
<= (low_size
+ high_size
))
1234 regcache_raw_read (regcache
, LOW_RETURN_REGNUM
, buf
);
1235 memcpy (valbuf
, buf
, low_size
);
1236 regcache_raw_read (regcache
, HIGH_RETURN_REGNUM
, buf
);
1237 memcpy ((char *) valbuf
+ low_size
, buf
, len
- low_size
);
1240 internal_error (__FILE__
, __LINE__
,
1241 "Cannot extract return value of %d bytes long.", len
);
1245 /* Write, for architecture GDBARCH, a function return value of TYPE
1246 from VALBUF into REGCACHE. */
1249 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1250 struct regcache
*regcache
, const void *valbuf
)
1252 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1253 int len
= TYPE_LENGTH (type
);
1255 /* Define I387_ST0_REGNUM such that we use the proper definitions
1256 for the architecture. */
1257 #define I387_ST0_REGNUM I386_ST0_REGNUM
1259 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1262 char buf
[I386_MAX_REGISTER_SIZE
];
1264 if (tdep
->st0_regnum
< 0)
1266 warning ("Cannot set floating-point return value.");
1270 /* Returning floating-point values is a bit tricky. Apart from
1271 storing the return value in %st(0), we have to simulate the
1272 state of the FPU at function return point. */
1274 /* Convert the value found in VALBUF to the extended
1275 floating-point format used by the FPU. This is probably
1276 not exactly how it would happen on the target itself, but
1277 it is the best we can do. */
1278 convert_typed_floating (valbuf
, type
, buf
, builtin_type_i387_ext
);
1279 regcache_raw_write (regcache
, I386_ST0_REGNUM
, buf
);
1281 /* Set the top of the floating-point register stack to 7. The
1282 actual value doesn't really matter, but 7 is what a normal
1283 function return would end up with if the program started out
1284 with a freshly initialized FPU. */
1285 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1287 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM
, fstat
);
1289 /* Mark %st(1) through %st(7) as empty. Since we set the top of
1290 the floating-point register stack to 7, the appropriate value
1291 for the tag word is 0x3fff. */
1292 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM
, 0x3fff);
1296 int low_size
= register_size (current_gdbarch
, LOW_RETURN_REGNUM
);
1297 int high_size
= register_size (current_gdbarch
, HIGH_RETURN_REGNUM
);
1299 if (len
<= low_size
)
1300 regcache_raw_write_part (regcache
, LOW_RETURN_REGNUM
, 0, len
, valbuf
);
1301 else if (len
<= (low_size
+ high_size
))
1303 regcache_raw_write (regcache
, LOW_RETURN_REGNUM
, valbuf
);
1304 regcache_raw_write_part (regcache
, HIGH_RETURN_REGNUM
, 0,
1305 len
- low_size
, (char *) valbuf
+ low_size
);
1308 internal_error (__FILE__
, __LINE__
,
1309 "Cannot store return value of %d bytes long.", len
);
1312 #undef I387_ST0_REGNUM
1316 /* This is the variable that is set with "set struct-convention", and
1317 its legitimate values. */
1318 static const char default_struct_convention
[] = "default";
1319 static const char pcc_struct_convention
[] = "pcc";
1320 static const char reg_struct_convention
[] = "reg";
1321 static const char *valid_conventions
[] =
1323 default_struct_convention
,
1324 pcc_struct_convention
,
1325 reg_struct_convention
,
1328 static const char *struct_convention
= default_struct_convention
;
1330 /* Return non-zero if TYPE, which is assumed to be a structure or
1331 union type, should be returned in registers for architecture
1335 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
1337 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1338 enum type_code code
= TYPE_CODE (type
);
1339 int len
= TYPE_LENGTH (type
);
1341 gdb_assert (code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
);
1343 if (struct_convention
== pcc_struct_convention
1344 || (struct_convention
== default_struct_convention
1345 && tdep
->struct_return
== pcc_struct_return
))
1348 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
1351 /* Determine, for architecture GDBARCH, how a return value of TYPE
1352 should be returned. If it is supposed to be returned in registers,
1353 and READBUF is non-zero, read the appropriate value from REGCACHE,
1354 and copy it into READBUF. If WRITEBUF is non-zero, write the value
1355 from WRITEBUF into REGCACHE. */
1357 static enum return_value_convention
1358 i386_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
1359 struct regcache
*regcache
, void *readbuf
,
1360 const void *writebuf
)
1362 enum type_code code
= TYPE_CODE (type
);
1364 if ((code
== TYPE_CODE_STRUCT
|| code
== TYPE_CODE_UNION
)
1365 && !i386_reg_struct_return_p (gdbarch
, type
))
1366 return RETURN_VALUE_STRUCT_CONVENTION
;
1368 /* This special case is for structures consisting of a single
1369 `float' or `double' member. These structures are returned in
1370 %st(0). For these structures, we call ourselves recursively,
1371 changing TYPE into the type of the first member of the structure.
1372 Since that should work for all structures that have only one
1373 member, we don't bother to check the member's type here. */
1374 if (code
== TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type
) == 1)
1376 type
= check_typedef (TYPE_FIELD_TYPE (type
, 0));
1377 return i386_return_value (gdbarch
, type
, regcache
, readbuf
, writebuf
);
1381 i386_extract_return_value (gdbarch
, type
, regcache
, readbuf
);
1383 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
1385 return RETURN_VALUE_REGISTER_CONVENTION
;
1389 /* Return the GDB type object for the "standard" data type of data in
1390 register REGNUM. Perhaps %esi and %edi should go here, but
1391 potentially they could be used for things other than address. */
1393 static struct type
*
1394 i386_register_type (struct gdbarch
*gdbarch
, int regnum
)
1396 if (regnum
== I386_EIP_REGNUM
1397 || regnum
== I386_EBP_REGNUM
|| regnum
== I386_ESP_REGNUM
)
1398 return lookup_pointer_type (builtin_type_void
);
1400 if (i386_fp_regnum_p (regnum
))
1401 return builtin_type_i387_ext
;
1403 if (i386_sse_regnum_p (gdbarch
, regnum
))
1404 return builtin_type_vec128i
;
1406 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1407 return builtin_type_vec64i
;
1409 return builtin_type_int
;
1412 /* Map a cooked register onto a raw register or memory. For the i386,
1413 the MMX registers need to be mapped onto floating point registers. */
1416 i386_mmx_regnum_to_fp_regnum (struct regcache
*regcache
, int regnum
)
1418 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
1423 /* Define I387_ST0_REGNUM such that we use the proper definitions
1424 for REGCACHE's architecture. */
1425 #define I387_ST0_REGNUM tdep->st0_regnum
1427 mmxreg
= regnum
- tdep
->mm0_regnum
;
1428 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM
, &fstat
);
1429 tos
= (fstat
>> 11) & 0x7;
1430 fpreg
= (mmxreg
+ tos
) % 8;
1432 return (I387_ST0_REGNUM
+ fpreg
);
1434 #undef I387_ST0_REGNUM
1438 i386_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1439 int regnum
, void *buf
)
1441 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1443 char mmx_buf
[MAX_REGISTER_SIZE
];
1444 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1446 /* Extract (always little endian). */
1447 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1448 memcpy (buf
, mmx_buf
, register_size (gdbarch
, regnum
));
1451 regcache_raw_read (regcache
, regnum
, buf
);
1455 i386_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1456 int regnum
, const void *buf
)
1458 if (i386_mmx_regnum_p (gdbarch
, regnum
))
1460 char mmx_buf
[MAX_REGISTER_SIZE
];
1461 int fpnum
= i386_mmx_regnum_to_fp_regnum (regcache
, regnum
);
1464 regcache_raw_read (regcache
, fpnum
, mmx_buf
);
1465 /* ... Modify ... (always little endian). */
1466 memcpy (mmx_buf
, buf
, register_size (gdbarch
, regnum
));
1468 regcache_raw_write (regcache
, fpnum
, mmx_buf
);
1471 regcache_raw_write (regcache
, regnum
, buf
);
1475 /* Return the register number of the register allocated by GCC after
1476 REGNUM, or -1 if there is no such register. */
1479 i386_next_regnum (int regnum
)
1481 /* GCC allocates the registers in the order:
1483 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
1485 Since storing a variable in %esp doesn't make any sense we return
1486 -1 for %ebp and for %esp itself. */
1487 static int next_regnum
[] =
1489 I386_EDX_REGNUM
, /* Slot for %eax. */
1490 I386_EBX_REGNUM
, /* Slot for %ecx. */
1491 I386_ECX_REGNUM
, /* Slot for %edx. */
1492 I386_ESI_REGNUM
, /* Slot for %ebx. */
1493 -1, -1, /* Slots for %esp and %ebp. */
1494 I386_EDI_REGNUM
, /* Slot for %esi. */
1495 I386_EBP_REGNUM
/* Slot for %edi. */
1498 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
1499 return next_regnum
[regnum
];
1504 /* Return nonzero if a value of type TYPE stored in register REGNUM
1505 needs any special handling. */
1508 i386_convert_register_p (int regnum
, struct type
*type
)
1510 int len
= TYPE_LENGTH (type
);
1512 /* Values may be spread across multiple registers. Most debugging
1513 formats aren't expressive enough to specify the locations, so
1514 some heuristics is involved. Right now we only handle types that
1515 have a length that is a multiple of the word size, since GCC
1516 doesn't seem to put any other types into registers. */
1517 if (len
> 4 && len
% 4 == 0)
1519 int last_regnum
= regnum
;
1523 last_regnum
= i386_next_regnum (last_regnum
);
1527 if (last_regnum
!= -1)
1531 return i386_fp_regnum_p (regnum
);
1534 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
1535 return its contents in TO. */
1538 i386_register_to_value (struct frame_info
*frame
, int regnum
,
1539 struct type
*type
, void *to
)
1541 int len
= TYPE_LENGTH (type
);
1544 /* FIXME: kettenis/20030609: What should we do if REGNUM isn't
1545 available in FRAME (i.e. if it wasn't saved)? */
1547 if (i386_fp_regnum_p (regnum
))
1549 i387_register_to_value (frame
, regnum
, type
, to
);
1553 /* Read a value spread accross multiple registers. */
1555 gdb_assert (len
> 4 && len
% 4 == 0);
1559 gdb_assert (regnum
!= -1);
1560 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1562 get_frame_register (frame
, regnum
, buf
);
1563 regnum
= i386_next_regnum (regnum
);
1569 /* Write the contents FROM of a value of type TYPE into register
1570 REGNUM in frame FRAME. */
1573 i386_value_to_register (struct frame_info
*frame
, int regnum
,
1574 struct type
*type
, const void *from
)
1576 int len
= TYPE_LENGTH (type
);
1577 const char *buf
= from
;
1579 if (i386_fp_regnum_p (regnum
))
1581 i387_value_to_register (frame
, regnum
, type
, from
);
1585 /* Write a value spread accross multiple registers. */
1587 gdb_assert (len
> 4 && len
% 4 == 0);
1591 gdb_assert (regnum
!= -1);
1592 gdb_assert (register_size (current_gdbarch
, regnum
) == 4);
1594 put_frame_register (frame
, regnum
, buf
);
1595 regnum
= i386_next_regnum (regnum
);
1601 /* Supply register REGNUM from the general-purpose register set REGSET
1602 to register cache REGCACHE. If REGNUM is -1, do this for all
1603 registers in REGSET. */
1606 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
1607 int regnum
, const void *gregs
, size_t len
)
1609 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1610 const char *regs
= gregs
;
1613 gdb_assert (len
== tdep
->sizeof_gregset
);
1615 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
1617 if ((regnum
== i
|| regnum
== -1)
1618 && tdep
->gregset_reg_offset
[i
] != -1)
1619 regcache_raw_supply (regcache
, i
, regs
+ tdep
->gregset_reg_offset
[i
]);
1623 /* Supply register REGNUM from the floating-point register set REGSET
1624 to register cache REGCACHE. If REGNUM is -1, do this for all
1625 registers in REGSET. */
1628 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
1629 int regnum
, const void *fpregs
, size_t len
)
1631 const struct gdbarch_tdep
*tdep
= regset
->descr
;
1633 if (len
== I387_SIZEOF_FXSAVE
)
1635 i387_supply_fxsave (regcache
, regnum
, fpregs
);
1639 gdb_assert (len
== tdep
->sizeof_fpregset
);
1640 i387_supply_fsave (regcache
, regnum
, fpregs
);
1643 /* Return the appropriate register set for the core section identified
1644 by SECT_NAME and SECT_SIZE. */
1646 const struct regset
*
1647 i386_regset_from_core_section (struct gdbarch
*gdbarch
,
1648 const char *sect_name
, size_t sect_size
)
1650 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1652 if (strcmp (sect_name
, ".reg") == 0 && sect_size
== tdep
->sizeof_gregset
)
1654 if (tdep
->gregset
== NULL
)
1656 tdep
->gregset
= XMALLOC (struct regset
);
1657 tdep
->gregset
->descr
= tdep
;
1658 tdep
->gregset
->supply_regset
= i386_supply_gregset
;
1660 return tdep
->gregset
;
1663 if ((strcmp (sect_name
, ".reg2") == 0 && sect_size
== tdep
->sizeof_fpregset
)
1664 || (strcmp (sect_name
, ".reg-xfp") == 0
1665 && sect_size
== I387_SIZEOF_FXSAVE
))
1667 if (tdep
->fpregset
== NULL
)
1669 tdep
->fpregset
= XMALLOC (struct regset
);
1670 tdep
->fpregset
->descr
= tdep
;
1671 tdep
->fpregset
->supply_regset
= i386_supply_fpregset
;
1673 return tdep
->fpregset
;
1680 #ifdef STATIC_TRANSFORM_NAME
1681 /* SunPRO encodes the static variables. This is not related to C++
1682 mangling, it is done for C too. */
1685 sunpro_static_transform_name (char *name
)
1688 if (IS_STATIC_TRANSFORM_NAME (name
))
1690 /* For file-local statics there will be a period, a bunch of
1691 junk (the contents of which match a string given in the
1692 N_OPT), a period and the name. For function-local statics
1693 there will be a bunch of junk (which seems to change the
1694 second character from 'A' to 'B'), a period, the name of the
1695 function, and the name. So just skip everything before the
1697 p
= strrchr (name
, '.');
1703 #endif /* STATIC_TRANSFORM_NAME */
1706 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1709 i386_pe_skip_trampoline_code (CORE_ADDR pc
, char *name
)
1711 if (pc
&& read_memory_unsigned_integer (pc
, 2) == 0x25ff) /* jmp *(dest) */
1713 unsigned long indirect
= read_memory_unsigned_integer (pc
+ 2, 4);
1714 struct minimal_symbol
*indsym
=
1715 indirect
? lookup_minimal_symbol_by_pc (indirect
) : 0;
1716 char *symname
= indsym
? SYMBOL_LINKAGE_NAME (indsym
) : 0;
1720 if (strncmp (symname
, "__imp_", 6) == 0
1721 || strncmp (symname
, "_imp_", 5) == 0)
1722 return name
? 1 : read_memory_unsigned_integer (indirect
, 4);
1725 return 0; /* Not a trampoline. */
1729 /* Return non-zero if PC and NAME show that we are in a signal
1733 i386_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1735 return (name
&& strcmp ("_sigtramp", name
) == 0);
1739 /* We have two flavours of disassembly. The machinery on this page
1740 deals with switching between those. */
1743 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
1745 gdb_assert (disassembly_flavor
== att_flavor
1746 || disassembly_flavor
== intel_flavor
);
1748 /* FIXME: kettenis/20020915: Until disassembler_options is properly
1749 constified, cast to prevent a compiler warning. */
1750 info
->disassembler_options
= (char *) disassembly_flavor
;
1751 info
->mach
= gdbarch_bfd_arch_info (current_gdbarch
)->mach
;
1753 return print_insn_i386 (pc
, info
);
1757 /* There are a few i386 architecture variants that differ only
1758 slightly from the generic i386 target. For now, we don't give them
1759 their own source file, but include them here. As a consequence,
1760 they'll always be included. */
1762 /* System V Release 4 (SVR4). */
1765 i386_svr4_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1767 /* UnixWare uses _sigacthandler. The origin of the other symbols is
1768 currently unknown. */
1769 return (name
&& (strcmp ("_sigreturn", name
) == 0
1770 || strcmp ("_sigacthandler", name
) == 0
1771 || strcmp ("sigvechandler", name
) == 0));
1774 /* Assuming NEXT_FRAME is for a frame following a SVR4 sigtramp
1775 routine, return the address of the associated sigcontext (ucontext)
1779 i386_svr4_sigcontext_addr (struct frame_info
*next_frame
)
1784 frame_unwind_register (next_frame
, I386_ESP_REGNUM
, buf
);
1785 sp
= extract_unsigned_integer (buf
, 4);
1787 return read_memory_unsigned_integer (sp
+ 8, 4);
1794 i386_go32_pc_in_sigtramp (CORE_ADDR pc
, char *name
)
1796 /* DJGPP doesn't have any special frames for signal handlers. */
1804 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1806 /* We typically use stabs-in-ELF with the DWARF register numbering. */
1807 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
1810 /* System V Release 4 (SVR4). */
1813 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1815 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1817 /* System V Release 4 uses ELF. */
1818 i386_elf_init_abi (info
, gdbarch
);
1820 /* System V Release 4 has shared libraries. */
1821 set_gdbarch_in_solib_call_trampoline (gdbarch
, in_plt_section
);
1822 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1824 set_gdbarch_deprecated_pc_in_sigtramp (gdbarch
, i386_svr4_pc_in_sigtramp
);
1825 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
1826 tdep
->sc_pc_offset
= 36 + 14 * 4;
1827 tdep
->sc_sp_offset
= 36 + 17 * 4;
1829 tdep
->jb_pc_offset
= 20;
1835 i386_go32_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1837 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1839 set_gdbarch_deprecated_pc_in_sigtramp (gdbarch
, i386_go32_pc_in_sigtramp
);
1841 tdep
->jb_pc_offset
= 36;
1847 i386_nw_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1849 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1851 tdep
->jb_pc_offset
= 24;
1855 /* i386 register groups. In addition to the normal groups, add "mmx"
1858 static struct reggroup
*i386_sse_reggroup
;
1859 static struct reggroup
*i386_mmx_reggroup
;
1862 i386_init_reggroups (void)
1864 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
1865 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
1869 i386_add_reggroups (struct gdbarch
*gdbarch
)
1871 reggroup_add (gdbarch
, i386_sse_reggroup
);
1872 reggroup_add (gdbarch
, i386_mmx_reggroup
);
1873 reggroup_add (gdbarch
, general_reggroup
);
1874 reggroup_add (gdbarch
, float_reggroup
);
1875 reggroup_add (gdbarch
, all_reggroup
);
1876 reggroup_add (gdbarch
, save_reggroup
);
1877 reggroup_add (gdbarch
, restore_reggroup
);
1878 reggroup_add (gdbarch
, vector_reggroup
);
1879 reggroup_add (gdbarch
, system_reggroup
);
1883 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1884 struct reggroup
*group
)
1886 int sse_regnum_p
= (i386_sse_regnum_p (gdbarch
, regnum
)
1887 || i386_mxcsr_regnum_p (gdbarch
, regnum
));
1888 int fp_regnum_p
= (i386_fp_regnum_p (regnum
)
1889 || i386_fpc_regnum_p (regnum
));
1890 int mmx_regnum_p
= (i386_mmx_regnum_p (gdbarch
, regnum
));
1892 if (group
== i386_mmx_reggroup
)
1893 return mmx_regnum_p
;
1894 if (group
== i386_sse_reggroup
)
1895 return sse_regnum_p
;
1896 if (group
== vector_reggroup
)
1897 return (mmx_regnum_p
|| sse_regnum_p
);
1898 if (group
== float_reggroup
)
1900 if (group
== general_reggroup
)
1901 return (!fp_regnum_p
&& !mmx_regnum_p
&& !sse_regnum_p
);
1903 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1907 /* Get the ARGIth function argument for the current function. */
1910 i386_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
1913 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
1914 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4);
1918 static struct gdbarch
*
1919 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1921 struct gdbarch_tdep
*tdep
;
1922 struct gdbarch
*gdbarch
;
1924 /* If there is already a candidate, use it. */
1925 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1927 return arches
->gdbarch
;
1929 /* Allocate space for the new architecture. */
1930 tdep
= XMALLOC (struct gdbarch_tdep
);
1931 gdbarch
= gdbarch_alloc (&info
, tdep
);
1933 /* General-purpose registers. */
1934 tdep
->gregset
= NULL
;
1935 tdep
->gregset_reg_offset
= NULL
;
1936 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
1937 tdep
->sizeof_gregset
= 0;
1939 /* Floating-point registers. */
1940 tdep
->fpregset
= NULL
;
1941 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
1943 /* The default settings include the FPU registers, the MMX registers
1944 and the SSE registers. This can be overidden for a specific ABI
1945 by adjusting the members `st0_regnum', `mm0_regnum' and
1946 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
1947 will show up in the output of "info all-registers". Ideally we
1948 should try to autodetect whether they are available, such that we
1949 can prevent "info all-registers" from displaying registers that
1952 NOTE: kevinb/2003-07-13: ... if it's a choice between printing
1953 [the SSE registers] always (even when they don't exist) or never
1954 showing them to the user (even when they do exist), I prefer the
1955 former over the latter. */
1957 tdep
->st0_regnum
= I386_ST0_REGNUM
;
1959 /* The MMX registers are implemented as pseudo-registers. Put off
1960 caclulating the register number for %mm0 until we know the number
1961 of raw registers. */
1962 tdep
->mm0_regnum
= 0;
1964 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
1965 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
1967 tdep
->jb_pc_offset
= -1;
1968 tdep
->struct_return
= pcc_struct_return
;
1969 tdep
->sigtramp_start
= 0;
1970 tdep
->sigtramp_end
= 0;
1971 tdep
->sigcontext_addr
= NULL
;
1972 tdep
->sc_reg_offset
= NULL
;
1973 tdep
->sc_pc_offset
= -1;
1974 tdep
->sc_sp_offset
= -1;
1976 /* The format used for `long double' on almost all i386 targets is
1977 the i387 extended floating-point format. In fact, of all targets
1978 in the GCC 2.95 tree, only OSF/1 does it different, and insists
1979 on having a `long double' that's not `long' at all. */
1980 set_gdbarch_long_double_format (gdbarch
, &floatformat_i387_ext
);
1982 /* Although the i387 extended floating-point has only 80 significant
1983 bits, a `long double' actually takes up 96, probably to enforce
1985 set_gdbarch_long_double_bit (gdbarch
, 96);
1987 /* The default ABI includes general-purpose registers,
1988 floating-point registers, and the SSE registers. */
1989 set_gdbarch_num_regs (gdbarch
, I386_SSE_NUM_REGS
);
1990 set_gdbarch_register_name (gdbarch
, i386_register_name
);
1991 set_gdbarch_register_type (gdbarch
, i386_register_type
);
1993 /* Register numbers of various important registers. */
1994 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
1995 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
1996 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
1997 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
1999 /* Use the "default" register numbering scheme for stabs and COFF. */
2000 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
2001 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_stab_reg_to_regnum
);
2003 /* Use the DWARF register numbering scheme for DWARF and DWARF 2. */
2004 set_gdbarch_dwarf_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
2005 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_dwarf_reg_to_regnum
);
2007 /* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to
2008 be in use on any of the supported i386 targets. */
2010 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
2012 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
2014 /* Call dummy code. */
2015 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
2017 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
2018 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
2019 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
2021 set_gdbarch_return_value (gdbarch
, i386_return_value
);
2023 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
2025 /* Stack grows downward. */
2026 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2028 set_gdbarch_breakpoint_from_pc (gdbarch
, i386_breakpoint_from_pc
);
2029 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
2031 set_gdbarch_frame_args_skip (gdbarch
, 8);
2032 set_gdbarch_deprecated_pc_in_sigtramp (gdbarch
, i386_pc_in_sigtramp
);
2034 /* Wire in the MMX registers. */
2035 set_gdbarch_num_pseudo_regs (gdbarch
, i386_num_mmx_regs
);
2036 set_gdbarch_pseudo_register_read (gdbarch
, i386_pseudo_register_read
);
2037 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
2039 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
2041 set_gdbarch_unwind_dummy_id (gdbarch
, i386_unwind_dummy_id
);
2043 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
2045 /* Add the i386 register groups. */
2046 i386_add_reggroups (gdbarch
);
2047 set_gdbarch_register_reggroup_p (gdbarch
, i386_register_reggroup_p
);
2049 /* Helper for function argument information. */
2050 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
2052 /* Hook in the DWARF CFI frame unwinder. */
2053 frame_unwind_append_sniffer (gdbarch
, dwarf2_frame_sniffer
);
2055 frame_base_set_default (gdbarch
, &i386_frame_base
);
2057 /* Hook in ABI-specific overrides, if they have been registered. */
2058 gdbarch_init_osabi (info
, gdbarch
);
2060 frame_unwind_append_sniffer (gdbarch
, i386_sigtramp_frame_sniffer
);
2061 frame_unwind_append_sniffer (gdbarch
, i386_frame_sniffer
);
2063 /* If we have a register mapping, enable the generic core file
2064 support, unless it has already been enabled. */
2065 if (tdep
->gregset_reg_offset
2066 && !gdbarch_regset_from_core_section_p (gdbarch
))
2067 set_gdbarch_regset_from_core_section (gdbarch
,
2068 i386_regset_from_core_section
);
2070 /* Unless support for MMX has been disabled, make %mm0 the first
2072 if (tdep
->mm0_regnum
== 0)
2073 tdep
->mm0_regnum
= gdbarch_num_regs (gdbarch
);
2078 static enum gdb_osabi
2079 i386_coff_osabi_sniffer (bfd
*abfd
)
2081 if (strcmp (bfd_get_target (abfd
), "coff-go32-exe") == 0
2082 || strcmp (bfd_get_target (abfd
), "coff-go32") == 0)
2083 return GDB_OSABI_GO32
;
2085 return GDB_OSABI_UNKNOWN
;
2088 static enum gdb_osabi
2089 i386_nlm_osabi_sniffer (bfd
*abfd
)
2091 return GDB_OSABI_NETWARE
;
2095 /* Provide a prototype to silence -Wmissing-prototypes. */
2096 void _initialize_i386_tdep (void);
2099 _initialize_i386_tdep (void)
2101 register_gdbarch_init (bfd_arch_i386
, i386_gdbarch_init
);
2103 /* Add the variable that controls the disassembly flavor. */
2105 struct cmd_list_element
*new_cmd
;
2107 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
2109 &disassembly_flavor
,
2111 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
2112 and the default value is \"att\".",
2114 add_show_from_set (new_cmd
, &showlist
);
2117 /* Add the variable that controls the convention for returning
2120 struct cmd_list_element
*new_cmd
;
2122 new_cmd
= add_set_enum_cmd ("struct-convention", no_class
,
2124 &struct_convention
, "\
2125 Set the convention for returning small structs, valid values \
2126 are \"default\", \"pcc\" and \"reg\", and the default value is \"default\".",
2128 add_show_from_set (new_cmd
, &showlist
);
2131 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_coff_flavour
,
2132 i386_coff_osabi_sniffer
);
2133 gdbarch_register_osabi_sniffer (bfd_arch_i386
, bfd_target_nlm_flavour
,
2134 i386_nlm_osabi_sniffer
);
2136 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
2137 i386_svr4_init_abi
);
2138 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_GO32
,
2139 i386_go32_init_abi
);
2140 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_NETWARE
,
2143 /* Initialize the i386 specific register groups. */
2144 i386_init_reggroups ();