* i386-tdep.c (i386_extract_return_value): Undo 2001-07-11 changes
[binutils-gdb.git] / gdb / i386-tdep.c
1 /* Intel 386 target-dependent stuff.
2 Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001
4 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #include "defs.h"
24 #include "gdb_string.h"
25 #include "frame.h"
26 #include "inferior.h"
27 #include "gdbcore.h"
28 #include "target.h"
29 #include "floatformat.h"
30 #include "symtab.h"
31 #include "gdbcmd.h"
32 #include "command.h"
33 #include "arch-utils.h"
34 #include "regcache.h"
35
36 /* i386_register_byte[i] is the offset into the register file of the
37 start of register number i. We initialize this from
38 i386_register_raw_size. */
39 int i386_register_byte[MAX_NUM_REGS];
40
41 /* i386_register_raw_size[i] is the number of bytes of storage in
42 GDB's register array occupied by register i. */
43 int i386_register_raw_size[MAX_NUM_REGS] = {
44 4, 4, 4, 4,
45 4, 4, 4, 4,
46 4, 4, 4, 4,
47 4, 4, 4, 4,
48 10, 10, 10, 10,
49 10, 10, 10, 10,
50 4, 4, 4, 4,
51 4, 4, 4, 4,
52 16, 16, 16, 16,
53 16, 16, 16, 16,
54 4
55 };
56
57 /* i386_register_virtual_size[i] is the size in bytes of the virtual
58 type of register i. */
59 int i386_register_virtual_size[MAX_NUM_REGS];
60 \f
61
62 /* This is the variable that is set with "set disassembly-flavor", and
63 its legitimate values. */
64 static const char att_flavor[] = "att";
65 static const char intel_flavor[] = "intel";
66 static const char *valid_flavors[] =
67 {
68 att_flavor,
69 intel_flavor,
70 NULL
71 };
72 static const char *disassembly_flavor = att_flavor;
73
74 /* This is used to keep the bfd arch_info in sync with the disassembly
75 flavor. */
76 static void set_disassembly_flavor_sfunc (char *, int,
77 struct cmd_list_element *);
78 static void set_disassembly_flavor (void);
79 \f
80
81 /* Stdio style buffering was used to minimize calls to ptrace, but
82 this buffering did not take into account that the code section
83 being accessed may not be an even number of buffers long (even if
84 the buffer is only sizeof(int) long). In cases where the code
85 section size happened to be a non-integral number of buffers long,
86 attempting to read the last buffer would fail. Simply using
87 target_read_memory and ignoring errors, rather than read_memory, is
88 not the correct solution, since legitimate access errors would then
89 be totally ignored. To properly handle this situation and continue
90 to use buffering would require that this code be able to determine
91 the minimum code section size granularity (not the alignment of the
92 section itself, since the actual failing case that pointed out this
93 problem had a section alignment of 4 but was not a multiple of 4
94 bytes long), on a target by target basis, and then adjust it's
95 buffer size accordingly. This is messy, but potentially feasible.
96 It probably needs the bfd library's help and support. For now, the
97 buffer size is set to 1. (FIXME -fnf) */
98
99 #define CODESTREAM_BUFSIZ 1 /* Was sizeof(int), see note above. */
100 static CORE_ADDR codestream_next_addr;
101 static CORE_ADDR codestream_addr;
102 static unsigned char codestream_buf[CODESTREAM_BUFSIZ];
103 static int codestream_off;
104 static int codestream_cnt;
105
106 #define codestream_tell() (codestream_addr + codestream_off)
107 #define codestream_peek() \
108 (codestream_cnt == 0 ? \
109 codestream_fill(1) : codestream_buf[codestream_off])
110 #define codestream_get() \
111 (codestream_cnt-- == 0 ? \
112 codestream_fill(0) : codestream_buf[codestream_off++])
113
114 static unsigned char
115 codestream_fill (int peek_flag)
116 {
117 codestream_addr = codestream_next_addr;
118 codestream_next_addr += CODESTREAM_BUFSIZ;
119 codestream_off = 0;
120 codestream_cnt = CODESTREAM_BUFSIZ;
121 read_memory (codestream_addr, (char *) codestream_buf, CODESTREAM_BUFSIZ);
122
123 if (peek_flag)
124 return (codestream_peek ());
125 else
126 return (codestream_get ());
127 }
128
129 static void
130 codestream_seek (CORE_ADDR place)
131 {
132 codestream_next_addr = place / CODESTREAM_BUFSIZ;
133 codestream_next_addr *= CODESTREAM_BUFSIZ;
134 codestream_cnt = 0;
135 codestream_fill (1);
136 while (codestream_tell () != place)
137 codestream_get ();
138 }
139
140 static void
141 codestream_read (unsigned char *buf, int count)
142 {
143 unsigned char *p;
144 int i;
145 p = buf;
146 for (i = 0; i < count; i++)
147 *p++ = codestream_get ();
148 }
149 \f
150
151 /* If the next instruction is a jump, move to its target. */
152
153 static void
154 i386_follow_jump (void)
155 {
156 unsigned char buf[4];
157 long delta;
158
159 int data16;
160 CORE_ADDR pos;
161
162 pos = codestream_tell ();
163
164 data16 = 0;
165 if (codestream_peek () == 0x66)
166 {
167 codestream_get ();
168 data16 = 1;
169 }
170
171 switch (codestream_get ())
172 {
173 case 0xe9:
174 /* Relative jump: if data16 == 0, disp32, else disp16. */
175 if (data16)
176 {
177 codestream_read (buf, 2);
178 delta = extract_signed_integer (buf, 2);
179
180 /* Include the size of the jmp instruction (including the
181 0x66 prefix). */
182 pos += delta + 4;
183 }
184 else
185 {
186 codestream_read (buf, 4);
187 delta = extract_signed_integer (buf, 4);
188
189 pos += delta + 5;
190 }
191 break;
192 case 0xeb:
193 /* Relative jump, disp8 (ignore data16). */
194 codestream_read (buf, 1);
195 /* Sign-extend it. */
196 delta = extract_signed_integer (buf, 1);
197
198 pos += delta + 2;
199 break;
200 }
201 codestream_seek (pos);
202 }
203
204 /* Find & return the amount a local space allocated, and advance the
205 codestream to the first register push (if any).
206
207 If the entry sequence doesn't make sense, return -1, and leave
208 codestream pointer at a random spot. */
209
210 static long
211 i386_get_frame_setup (CORE_ADDR pc)
212 {
213 unsigned char op;
214
215 codestream_seek (pc);
216
217 i386_follow_jump ();
218
219 op = codestream_get ();
220
221 if (op == 0x58) /* popl %eax */
222 {
223 /* This function must start with
224
225 popl %eax 0x58
226 xchgl %eax, (%esp) 0x87 0x04 0x24
227 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
228
229 (the System V compiler puts out the second `xchg'
230 instruction, and the assembler doesn't try to optimize it, so
231 the 'sib' form gets generated). This sequence is used to get
232 the address of the return buffer for a function that returns
233 a structure. */
234 int pos;
235 unsigned char buf[4];
236 static unsigned char proto1[3] = { 0x87, 0x04, 0x24 };
237 static unsigned char proto2[4] = { 0x87, 0x44, 0x24, 0x00 };
238
239 pos = codestream_tell ();
240 codestream_read (buf, 4);
241 if (memcmp (buf, proto1, 3) == 0)
242 pos += 3;
243 else if (memcmp (buf, proto2, 4) == 0)
244 pos += 4;
245
246 codestream_seek (pos);
247 op = codestream_get (); /* Update next opcode. */
248 }
249
250 if (op == 0x68 || op == 0x6a)
251 {
252 /* This function may start with
253
254 pushl constant
255 call _probe
256 addl $4, %esp
257
258 followed by
259
260 pushl %ebp
261
262 etc. */
263 int pos;
264 unsigned char buf[8];
265
266 /* Skip past the `pushl' instruction; it has either a one-byte
267 or a four-byte operand, depending on the opcode. */
268 pos = codestream_tell ();
269 if (op == 0x68)
270 pos += 4;
271 else
272 pos += 1;
273 codestream_seek (pos);
274
275 /* Read the following 8 bytes, which should be "call _probe" (6
276 bytes) followed by "addl $4,%esp" (2 bytes). */
277 codestream_read (buf, sizeof (buf));
278 if (buf[0] == 0xe8 && buf[6] == 0xc4 && buf[7] == 0x4)
279 pos += sizeof (buf);
280 codestream_seek (pos);
281 op = codestream_get (); /* Update next opcode. */
282 }
283
284 if (op == 0x55) /* pushl %ebp */
285 {
286 /* Check for "movl %esp, %ebp" -- can be written in two ways. */
287 switch (codestream_get ())
288 {
289 case 0x8b:
290 if (codestream_get () != 0xec)
291 return -1;
292 break;
293 case 0x89:
294 if (codestream_get () != 0xe5)
295 return -1;
296 break;
297 default:
298 return -1;
299 }
300 /* Check for stack adjustment
301
302 subl $XXX, %esp
303
304 NOTE: You can't subtract a 16 bit immediate from a 32 bit
305 reg, so we don't have to worry about a data16 prefix. */
306 op = codestream_peek ();
307 if (op == 0x83)
308 {
309 /* `subl' with 8 bit immediate. */
310 codestream_get ();
311 if (codestream_get () != 0xec)
312 /* Some instruction starting with 0x83 other than `subl'. */
313 {
314 codestream_seek (codestream_tell () - 2);
315 return 0;
316 }
317 /* `subl' with signed byte immediate (though it wouldn't
318 make sense to be negative). */
319 return (codestream_get ());
320 }
321 else if (op == 0x81)
322 {
323 char buf[4];
324 /* Maybe it is `subl' with a 32 bit immedediate. */
325 codestream_get ();
326 if (codestream_get () != 0xec)
327 /* Some instruction starting with 0x81 other than `subl'. */
328 {
329 codestream_seek (codestream_tell () - 2);
330 return 0;
331 }
332 /* It is `subl' with a 32 bit immediate. */
333 codestream_read ((unsigned char *) buf, 4);
334 return extract_signed_integer (buf, 4);
335 }
336 else
337 {
338 return 0;
339 }
340 }
341 else if (op == 0xc8)
342 {
343 char buf[2];
344 /* `enter' with 16 bit unsigned immediate. */
345 codestream_read ((unsigned char *) buf, 2);
346 codestream_get (); /* Flush final byte of enter instruction. */
347 return extract_unsigned_integer (buf, 2);
348 }
349 return (-1);
350 }
351
352 /* Return the chain-pointer for FRAME. In the case of the i386, the
353 frame's nominal address is the address of a 4-byte word containing
354 the calling frame's address. */
355
356 CORE_ADDR
357 i386_frame_chain (struct frame_info *frame)
358 {
359 if (frame->signal_handler_caller)
360 return frame->frame;
361
362 if (! inside_entry_file (frame->pc))
363 return read_memory_unsigned_integer (frame->frame, 4);
364
365 return 0;
366 }
367
368 /* Determine whether the function invocation represented by FRAME does
369 not have a from on the stack associated with it. If it does not,
370 return non-zero, otherwise return zero. */
371
372 int
373 i386_frameless_function_invocation (struct frame_info *frame)
374 {
375 if (frame->signal_handler_caller)
376 return 0;
377
378 return frameless_look_for_prologue (frame);
379 }
380
381 /* Return the saved program counter for FRAME. */
382
383 CORE_ADDR
384 i386_frame_saved_pc (struct frame_info *frame)
385 {
386 /* FIXME: kettenis/2001-05-09: Conditionalizing the next bit of code
387 on SIGCONTEXT_PC_OFFSET and I386V4_SIGTRAMP_SAVED_PC should be
388 considered a temporary hack. I plan to come up with something
389 better when we go multi-arch. */
390 #if defined (SIGCONTEXT_PC_OFFSET) || defined (I386V4_SIGTRAMP_SAVED_PC)
391 if (frame->signal_handler_caller)
392 return sigtramp_saved_pc (frame);
393 #endif
394
395 return read_memory_unsigned_integer (frame->frame + 4, 4);
396 }
397
398 /* Immediately after a function call, return the saved pc. */
399
400 CORE_ADDR
401 i386_saved_pc_after_call (struct frame_info *frame)
402 {
403 return read_memory_unsigned_integer (read_register (SP_REGNUM), 4);
404 }
405
406 /* Return number of args passed to a frame.
407 Can return -1, meaning no way to tell. */
408
409 int
410 i386_frame_num_args (struct frame_info *fi)
411 {
412 #if 1
413 return -1;
414 #else
415 /* This loses because not only might the compiler not be popping the
416 args right after the function call, it might be popping args from
417 both this call and a previous one, and we would say there are
418 more args than there really are. */
419
420 int retpc;
421 unsigned char op;
422 struct frame_info *pfi;
423
424 /* On the i386, the instruction following the call could be:
425 popl %ecx - one arg
426 addl $imm, %esp - imm/4 args; imm may be 8 or 32 bits
427 anything else - zero args. */
428
429 int frameless;
430
431 frameless = FRAMELESS_FUNCTION_INVOCATION (fi);
432 if (frameless)
433 /* In the absence of a frame pointer, GDB doesn't get correct
434 values for nameless arguments. Return -1, so it doesn't print
435 any nameless arguments. */
436 return -1;
437
438 pfi = get_prev_frame (fi);
439 if (pfi == 0)
440 {
441 /* NOTE: This can happen if we are looking at the frame for
442 main, because FRAME_CHAIN_VALID won't let us go into start.
443 If we have debugging symbols, that's not really a big deal;
444 it just means it will only show as many arguments to main as
445 are declared. */
446 return -1;
447 }
448 else
449 {
450 retpc = pfi->pc;
451 op = read_memory_integer (retpc, 1);
452 if (op == 0x59) /* pop %ecx */
453 return 1;
454 else if (op == 0x83)
455 {
456 op = read_memory_integer (retpc + 1, 1);
457 if (op == 0xc4)
458 /* addl $<signed imm 8 bits>, %esp */
459 return (read_memory_integer (retpc + 2, 1) & 0xff) / 4;
460 else
461 return 0;
462 }
463 else if (op == 0x81) /* `add' with 32 bit immediate. */
464 {
465 op = read_memory_integer (retpc + 1, 1);
466 if (op == 0xc4)
467 /* addl $<imm 32>, %esp */
468 return read_memory_integer (retpc + 2, 4) / 4;
469 else
470 return 0;
471 }
472 else
473 {
474 return 0;
475 }
476 }
477 #endif
478 }
479
480 /* Parse the first few instructions the function to see what registers
481 were stored.
482
483 We handle these cases:
484
485 The startup sequence can be at the start of the function, or the
486 function can start with a branch to startup code at the end.
487
488 %ebp can be set up with either the 'enter' instruction, or "pushl
489 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
490 once used in the System V compiler).
491
492 Local space is allocated just below the saved %ebp by either the
493 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
494 bit unsigned argument for space to allocate, and the 'addl'
495 instruction could have either a signed byte, or 32 bit immediate.
496
497 Next, the registers used by this function are pushed. With the
498 System V compiler they will always be in the order: %edi, %esi,
499 %ebx (and sometimes a harmless bug causes it to also save but not
500 restore %eax); however, the code below is willing to see the pushes
501 in any order, and will handle up to 8 of them.
502
503 If the setup sequence is at the end of the function, then the next
504 instruction will be a branch back to the start. */
505
506 void
507 i386_frame_init_saved_regs (struct frame_info *fip)
508 {
509 long locals = -1;
510 unsigned char op;
511 CORE_ADDR dummy_bottom;
512 CORE_ADDR addr;
513 CORE_ADDR pc;
514 int i;
515
516 if (fip->saved_regs)
517 return;
518
519 frame_saved_regs_zalloc (fip);
520
521 /* If the frame is the end of a dummy, compute where the beginning
522 would be. */
523 dummy_bottom = fip->frame - 4 - REGISTER_BYTES - CALL_DUMMY_LENGTH;
524
525 /* Check if the PC points in the stack, in a dummy frame. */
526 if (dummy_bottom <= fip->pc && fip->pc <= fip->frame)
527 {
528 /* All registers were saved by push_call_dummy. */
529 addr = fip->frame;
530 for (i = 0; i < NUM_REGS; i++)
531 {
532 addr -= REGISTER_RAW_SIZE (i);
533 fip->saved_regs[i] = addr;
534 }
535 return;
536 }
537
538 pc = get_pc_function_start (fip->pc);
539 if (pc != 0)
540 locals = i386_get_frame_setup (pc);
541
542 if (locals >= 0)
543 {
544 addr = fip->frame - 4 - locals;
545 for (i = 0; i < 8; i++)
546 {
547 op = codestream_get ();
548 if (op < 0x50 || op > 0x57)
549 break;
550 #ifdef I386_REGNO_TO_SYMMETRY
551 /* Dynix uses different internal numbering. Ick. */
552 fip->saved_regs[I386_REGNO_TO_SYMMETRY (op - 0x50)] = addr;
553 #else
554 fip->saved_regs[op - 0x50] = addr;
555 #endif
556 addr -= 4;
557 }
558 }
559
560 fip->saved_regs[PC_REGNUM] = fip->frame + 4;
561 fip->saved_regs[FP_REGNUM] = fip->frame;
562 }
563
564 /* Return PC of first real instruction. */
565
566 int
567 i386_skip_prologue (int pc)
568 {
569 unsigned char op;
570 int i;
571 static unsigned char pic_pat[6] =
572 { 0xe8, 0, 0, 0, 0, /* call 0x0 */
573 0x5b, /* popl %ebx */
574 };
575 CORE_ADDR pos;
576
577 if (i386_get_frame_setup (pc) < 0)
578 return (pc);
579
580 /* Found valid frame setup -- codestream now points to start of push
581 instructions for saving registers. */
582
583 /* Skip over register saves. */
584 for (i = 0; i < 8; i++)
585 {
586 op = codestream_peek ();
587 /* Break if not `pushl' instrunction. */
588 if (op < 0x50 || op > 0x57)
589 break;
590 codestream_get ();
591 }
592
593 /* The native cc on SVR4 in -K PIC mode inserts the following code
594 to get the address of the global offset table (GOT) into register
595 %ebx
596
597 call 0x0
598 popl %ebx
599 movl %ebx,x(%ebp) (optional)
600 addl y,%ebx
601
602 This code is with the rest of the prologue (at the end of the
603 function), so we have to skip it to get to the first real
604 instruction at the start of the function. */
605
606 pos = codestream_tell ();
607 for (i = 0; i < 6; i++)
608 {
609 op = codestream_get ();
610 if (pic_pat[i] != op)
611 break;
612 }
613 if (i == 6)
614 {
615 unsigned char buf[4];
616 long delta = 6;
617
618 op = codestream_get ();
619 if (op == 0x89) /* movl %ebx, x(%ebp) */
620 {
621 op = codestream_get ();
622 if (op == 0x5d) /* One byte offset from %ebp. */
623 {
624 delta += 3;
625 codestream_read (buf, 1);
626 }
627 else if (op == 0x9d) /* Four byte offset from %ebp. */
628 {
629 delta += 6;
630 codestream_read (buf, 4);
631 }
632 else /* Unexpected instruction. */
633 delta = -1;
634 op = codestream_get ();
635 }
636 /* addl y,%ebx */
637 if (delta > 0 && op == 0x81 && codestream_get () == 0xc3)
638 {
639 pos += delta + 6;
640 }
641 }
642 codestream_seek (pos);
643
644 i386_follow_jump ();
645
646 return (codestream_tell ());
647 }
648
649 void
650 i386_push_dummy_frame (void)
651 {
652 CORE_ADDR sp = read_register (SP_REGNUM);
653 int regnum;
654 char regbuf[MAX_REGISTER_RAW_SIZE];
655
656 sp = push_word (sp, read_register (PC_REGNUM));
657 sp = push_word (sp, read_register (FP_REGNUM));
658 write_register (FP_REGNUM, sp);
659 for (regnum = 0; regnum < NUM_REGS; regnum++)
660 {
661 read_register_gen (regnum, regbuf);
662 sp = push_bytes (sp, regbuf, REGISTER_RAW_SIZE (regnum));
663 }
664 write_register (SP_REGNUM, sp);
665 }
666
667 /* Insert the (relative) function address into the call sequence
668 stored at DYMMY. */
669
670 void
671 i386_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun, int nargs,
672 value_ptr *args, struct type *type, int gcc_p)
673 {
674 int from, to, delta, loc;
675
676 loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH);
677 from = loc + 5;
678 to = (int)(fun);
679 delta = to - from;
680
681 *((char *)(dummy) + 1) = (delta & 0xff);
682 *((char *)(dummy) + 2) = ((delta >> 8) & 0xff);
683 *((char *)(dummy) + 3) = ((delta >> 16) & 0xff);
684 *((char *)(dummy) + 4) = ((delta >> 24) & 0xff);
685 }
686
687 void
688 i386_pop_frame (void)
689 {
690 struct frame_info *frame = get_current_frame ();
691 CORE_ADDR fp;
692 int regnum;
693 char regbuf[MAX_REGISTER_RAW_SIZE];
694
695 fp = FRAME_FP (frame);
696 i386_frame_init_saved_regs (frame);
697
698 for (regnum = 0; regnum < NUM_REGS; regnum++)
699 {
700 CORE_ADDR addr;
701 addr = frame->saved_regs[regnum];
702 if (addr)
703 {
704 read_memory (addr, regbuf, REGISTER_RAW_SIZE (regnum));
705 write_register_bytes (REGISTER_BYTE (regnum), regbuf,
706 REGISTER_RAW_SIZE (regnum));
707 }
708 }
709 write_register (FP_REGNUM, read_memory_integer (fp, 4));
710 write_register (PC_REGNUM, read_memory_integer (fp + 4, 4));
711 write_register (SP_REGNUM, fp + 8);
712 flush_cached_frames ();
713 }
714 \f
715
716 #ifdef GET_LONGJMP_TARGET
717
718 /* Figure out where the longjmp will land. Slurp the args out of the
719 stack. We expect the first arg to be a pointer to the jmp_buf
720 structure from which we extract the pc (JB_PC) that we will land
721 at. The pc is copied into PC. This routine returns true on
722 success. */
723
724 int
725 get_longjmp_target (CORE_ADDR *pc)
726 {
727 char buf[TARGET_PTR_BIT / TARGET_CHAR_BIT];
728 CORE_ADDR sp, jb_addr;
729
730 sp = read_register (SP_REGNUM);
731
732 if (target_read_memory (sp + SP_ARG0, /* Offset of first arg on stack. */
733 buf,
734 TARGET_PTR_BIT / TARGET_CHAR_BIT))
735 return 0;
736
737 jb_addr = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
738
739 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
740 TARGET_PTR_BIT / TARGET_CHAR_BIT))
741 return 0;
742
743 *pc = extract_address (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT);
744
745 return 1;
746 }
747
748 #endif /* GET_LONGJMP_TARGET */
749 \f
750
751 CORE_ADDR
752 i386_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
753 int struct_return, CORE_ADDR struct_addr)
754 {
755 sp = default_push_arguments (nargs, args, sp, struct_return, struct_addr);
756
757 if (struct_return)
758 {
759 char buf[4];
760
761 sp -= 4;
762 store_address (buf, 4, struct_addr);
763 write_memory (sp, buf, 4);
764 }
765
766 return sp;
767 }
768
769 void
770 i386_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
771 {
772 /* Do nothing. Everything was already done by i386_push_arguments. */
773 }
774
775 /* These registers are used for returning integers (and on some
776 targets also for returning `struct' and `union' values when their
777 size and alignment match an integer type). */
778 #define LOW_RETURN_REGNUM 0 /* %eax */
779 #define HIGH_RETURN_REGNUM 2 /* %edx */
780
781 /* Extract from an array REGBUF containing the (raw) register state, a
782 function return value of TYPE, and copy that, in virtual format,
783 into VALBUF. */
784
785 void
786 i386_extract_return_value (struct type *type, char *regbuf, char *valbuf)
787 {
788 int len = TYPE_LENGTH (type);
789
790 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
791 && TYPE_NFIELDS (type) == 1)
792 {
793 i386_extract_return_value (TYPE_FIELD_TYPE (type, 0), regbuf, valbuf);
794 return;
795 }
796
797 if (TYPE_CODE (type) == TYPE_CODE_FLT)
798 {
799 if (NUM_FREGS == 0)
800 {
801 warning ("Cannot find floating-point return value.");
802 memset (valbuf, 0, len);
803 return;
804 }
805
806 /* Floating-point return values can be found in %st(0). */
807 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
808 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
809 {
810 /* Copy straight over, but take care of the padding. */
811 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM)],
812 FPU_REG_RAW_SIZE);
813 memset (valbuf + FPU_REG_RAW_SIZE, 0, len - FPU_REG_RAW_SIZE);
814 }
815 else
816 {
817 /* Convert the extended floating-point number found in
818 %st(0) to the desired type. This is probably not exactly
819 how it would happen on the target itself, but it is the
820 best we can do. */
821 DOUBLEST val;
822 floatformat_to_doublest (&floatformat_i387_ext,
823 &regbuf[REGISTER_BYTE (FP0_REGNUM)], &val);
824 store_floating (valbuf, TYPE_LENGTH (type), val);
825 }
826 }
827 else
828 {
829 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
830 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
831
832 if (len <= low_size)
833 memcpy (valbuf, &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], len);
834 else if (len <= (low_size + high_size))
835 {
836 memcpy (valbuf,
837 &regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)], low_size);
838 memcpy (valbuf + low_size,
839 &regbuf[REGISTER_BYTE (HIGH_RETURN_REGNUM)], len - low_size);
840 }
841 else
842 internal_error (__FILE__, __LINE__,
843 "Cannot extract return value of %d bytes long.", len);
844 }
845 }
846
847 /* Write into the appropriate registers a function return value stored
848 in VALBUF of type TYPE, given in virtual format. */
849
850 void
851 i386_store_return_value (struct type *type, char *valbuf)
852 {
853 int len = TYPE_LENGTH (type);
854
855 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
856 && TYPE_NFIELDS (type) == 1)
857 {
858 i386_store_return_value (TYPE_FIELD_TYPE (type, 0), valbuf);
859 return;
860 }
861
862 if (TYPE_CODE (type) == TYPE_CODE_FLT)
863 {
864 unsigned int fstat;
865
866 if (NUM_FREGS == 0)
867 {
868 warning ("Cannot set floating-point return value.");
869 return;
870 }
871
872 /* Returning floating-point values is a bit tricky. Apart from
873 storing the return value in %st(0), we have to simulate the
874 state of the FPU at function return point. */
875
876 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
877 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
878 {
879 /* Copy straight over. */
880 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
881 FPU_REG_RAW_SIZE);
882 }
883 else
884 {
885 char buf[FPU_REG_RAW_SIZE];
886 DOUBLEST val;
887
888 /* Convert the value found in VALBUF to the extended
889 floating-point format used by the FPU. This is probably
890 not exactly how it would happen on the target itself, but
891 it is the best we can do. */
892 val = extract_floating (valbuf, TYPE_LENGTH (type));
893 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
894 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
895 FPU_REG_RAW_SIZE);
896 }
897
898 /* Set the top of the floating-point register stack to 7. The
899 actual value doesn't really matter, but 7 is what a normal
900 function return would end up with if the program started out
901 with a freshly initialized FPU. */
902 fstat = read_register (FSTAT_REGNUM);
903 fstat |= (7 << 11);
904 write_register (FSTAT_REGNUM, fstat);
905
906 /* Mark %st(1) through %st(7) as empty. Since we set the top of
907 the floating-point register stack to 7, the appropriate value
908 for the tag word is 0x3fff. */
909 write_register (FTAG_REGNUM, 0x3fff);
910 }
911 else
912 {
913 int low_size = REGISTER_RAW_SIZE (LOW_RETURN_REGNUM);
914 int high_size = REGISTER_RAW_SIZE (HIGH_RETURN_REGNUM);
915
916 if (len <= low_size)
917 write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM), valbuf, len);
918 else if (len <= (low_size + high_size))
919 {
920 write_register_bytes (REGISTER_BYTE (LOW_RETURN_REGNUM),
921 valbuf, low_size);
922 write_register_bytes (REGISTER_BYTE (HIGH_RETURN_REGNUM),
923 valbuf + low_size, len - low_size);
924 }
925 else
926 internal_error (__FILE__, __LINE__,
927 "Cannot store return value of %d bytes long.", len);
928 }
929 }
930
931 /* Extract from an array REGBUF containing the (raw) register state
932 the address in which a function should return its structure value,
933 as a CORE_ADDR. */
934
935 CORE_ADDR
936 i386_extract_struct_value_address (char *regbuf)
937 {
938 return extract_address (&regbuf[REGISTER_BYTE (LOW_RETURN_REGNUM)],
939 REGISTER_RAW_SIZE (LOW_RETURN_REGNUM));
940 }
941 \f
942
943 /* Return the GDB type object for the "standard" data type of data in
944 register REGNUM. Perhaps %esi and %edi should go here, but
945 potentially they could be used for things other than address. */
946
947 struct type *
948 i386_register_virtual_type (int regnum)
949 {
950 if (regnum == PC_REGNUM || regnum == FP_REGNUM || regnum == SP_REGNUM)
951 return lookup_pointer_type (builtin_type_void);
952
953 if (IS_FP_REGNUM (regnum))
954 return builtin_type_long_double;
955
956 if (IS_SSE_REGNUM (regnum))
957 return builtin_type_v4sf;
958
959 return builtin_type_int;
960 }
961
962 /* Return true iff register REGNUM's virtual format is different from
963 its raw format. Note that this definition assumes that the host
964 supports IEEE 32-bit floats, since it doesn't say that SSE
965 registers need conversion. Even if we can't find a counterexample,
966 this is still sloppy. */
967
968 int
969 i386_register_convertible (int regnum)
970 {
971 return IS_FP_REGNUM (regnum);
972 }
973
974 /* Convert data from raw format for register REGNUM in buffer FROM to
975 virtual format with type TYPE in buffer TO. In principle both
976 formats are identical except that the virtual format has two extra
977 bytes appended that aren't used. We set these to zero. */
978
979 void
980 i386_register_convert_to_virtual (int regnum, struct type *type,
981 char *from, char *to)
982 {
983 /* Copy straight over, but take care of the padding. */
984 memcpy (to, from, FPU_REG_RAW_SIZE);
985 memset (to + FPU_REG_RAW_SIZE, 0, TYPE_LENGTH (type) - FPU_REG_RAW_SIZE);
986 }
987
988 /* Convert data from virtual format with type TYPE in buffer FROM to
989 raw format for register REGNUM in buffer TO. Simply omit the two
990 unused bytes. */
991
992 void
993 i386_register_convert_to_raw (struct type *type, int regnum,
994 char *from, char *to)
995 {
996 memcpy (to, from, FPU_REG_RAW_SIZE);
997 }
998 \f
999
1000 #ifdef I386V4_SIGTRAMP_SAVED_PC
1001 /* Get saved user PC for sigtramp from the pushed ucontext on the
1002 stack for all three variants of SVR4 sigtramps. */
1003
1004 CORE_ADDR
1005 i386v4_sigtramp_saved_pc (struct frame_info *frame)
1006 {
1007 CORE_ADDR saved_pc_offset = 4;
1008 char *name = NULL;
1009
1010 find_pc_partial_function (frame->pc, &name, NULL, NULL);
1011 if (name)
1012 {
1013 if (STREQ (name, "_sigreturn"))
1014 saved_pc_offset = 132 + 14 * 4;
1015 else if (STREQ (name, "_sigacthandler"))
1016 saved_pc_offset = 80 + 14 * 4;
1017 else if (STREQ (name, "sigvechandler"))
1018 saved_pc_offset = 120 + 14 * 4;
1019 }
1020
1021 if (frame->next)
1022 return read_memory_integer (frame->next->frame + saved_pc_offset, 4);
1023 return read_memory_integer (read_register (SP_REGNUM) + saved_pc_offset, 4);
1024 }
1025 #endif /* I386V4_SIGTRAMP_SAVED_PC */
1026 \f
1027
1028 #ifdef STATIC_TRANSFORM_NAME
1029 /* SunPRO encodes the static variables. This is not related to C++
1030 mangling, it is done for C too. */
1031
1032 char *
1033 sunpro_static_transform_name (char *name)
1034 {
1035 char *p;
1036 if (IS_STATIC_TRANSFORM_NAME (name))
1037 {
1038 /* For file-local statics there will be a period, a bunch of
1039 junk (the contents of which match a string given in the
1040 N_OPT), a period and the name. For function-local statics
1041 there will be a bunch of junk (which seems to change the
1042 second character from 'A' to 'B'), a period, the name of the
1043 function, and the name. So just skip everything before the
1044 last period. */
1045 p = strrchr (name, '.');
1046 if (p != NULL)
1047 name = p + 1;
1048 }
1049 return name;
1050 }
1051 #endif /* STATIC_TRANSFORM_NAME */
1052 \f
1053
1054 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
1055
1056 CORE_ADDR
1057 skip_trampoline_code (CORE_ADDR pc, char *name)
1058 {
1059 if (pc && read_memory_unsigned_integer (pc, 2) == 0x25ff) /* jmp *(dest) */
1060 {
1061 unsigned long indirect = read_memory_unsigned_integer (pc + 2, 4);
1062 struct minimal_symbol *indsym =
1063 indirect ? lookup_minimal_symbol_by_pc (indirect) : 0;
1064 char *symname = indsym ? SYMBOL_NAME (indsym) : 0;
1065
1066 if (symname)
1067 {
1068 if (strncmp (symname, "__imp_", 6) == 0
1069 || strncmp (symname, "_imp_", 5) == 0)
1070 return name ? 1 : read_memory_unsigned_integer (indirect, 4);
1071 }
1072 }
1073 return 0; /* Not a trampoline. */
1074 }
1075 \f
1076
1077 /* We have two flavours of disassembly. The machinery on this page
1078 deals with switching between those. */
1079
1080 static int
1081 gdb_print_insn_i386 (bfd_vma memaddr, disassemble_info *info)
1082 {
1083 if (disassembly_flavor == att_flavor)
1084 return print_insn_i386_att (memaddr, info);
1085 else if (disassembly_flavor == intel_flavor)
1086 return print_insn_i386_intel (memaddr, info);
1087 /* Never reached -- disassembly_flavour is always either att_flavor
1088 or intel_flavor. */
1089 internal_error (__FILE__, __LINE__, "failed internal consistency check");
1090 }
1091
1092 /* If the disassembly mode is intel, we have to also switch the bfd
1093 mach_type. This function is run in the set disassembly_flavor
1094 command, and does that. */
1095
1096 static void
1097 set_disassembly_flavor_sfunc (char *args, int from_tty,
1098 struct cmd_list_element *c)
1099 {
1100 set_disassembly_flavor ();
1101 }
1102
1103 static void
1104 set_disassembly_flavor (void)
1105 {
1106 if (disassembly_flavor == att_flavor)
1107 set_architecture_from_arch_mach (bfd_arch_i386, bfd_mach_i386_i386);
1108 else if (disassembly_flavor == intel_flavor)
1109 set_architecture_from_arch_mach (bfd_arch_i386,
1110 bfd_mach_i386_i386_intel_syntax);
1111 }
1112 \f
1113
1114 /* Provide a prototype to silence -Wmissing-prototypes. */
1115 void _initialize_i386_tdep (void);
1116
1117 void
1118 _initialize_i386_tdep (void)
1119 {
1120 /* Initialize the table saying where each register starts in the
1121 register file. */
1122 {
1123 int i, offset;
1124
1125 offset = 0;
1126 for (i = 0; i < MAX_NUM_REGS; i++)
1127 {
1128 i386_register_byte[i] = offset;
1129 offset += i386_register_raw_size[i];
1130 }
1131 }
1132
1133 /* Initialize the table of virtual register sizes. */
1134 {
1135 int i;
1136
1137 for (i = 0; i < MAX_NUM_REGS; i++)
1138 i386_register_virtual_size[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i));
1139 }
1140
1141 tm_print_insn = gdb_print_insn_i386;
1142 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 0)->mach;
1143
1144 /* Add the variable that controls the disassembly flavor. */
1145 {
1146 struct cmd_list_element *new_cmd;
1147
1148 new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
1149 valid_flavors,
1150 &disassembly_flavor,
1151 "\
1152 Set the disassembly flavor, the valid values are \"att\" and \"intel\", \
1153 and the default value is \"att\".",
1154 &setlist);
1155 new_cmd->function.sfunc = set_disassembly_flavor_sfunc;
1156 add_show_from_set (new_cmd, &showlist);
1157 }
1158
1159 /* Finally, initialize the disassembly flavor to the default given
1160 in the disassembly_flavor variable. */
1161 set_disassembly_flavor ();
1162 }