gdb/i386-tdep.h

   1 /* Target-dependent code for the i386.
   2
   3    Copyright (C) 2001, 2002, 2003, 2004, 2006, 2007, 2008, 2009, 2010
   4    Free Software Foundation, Inc.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef I386_TDEP_H
  22 #define I386_TDEP_H
  23
  24 struct frame_info;
  25 struct gdbarch;
  26 struct reggroup;
  27 struct regset;
  28 struct regcache;
  29
  30 /* GDB's i386 target supports both the 32-bit Intel Architecture
  31    (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
  32    a similar register layout for both.
  33
  34    - General purpose registers
  35    - FPU data registers
  36    - FPU control registers
  37    - SSE data registers
  38    - SSE control register
  39
  40    The general purpose registers for the x86-64 architecture are quite
  41    different from IA-32.  Therefore, gdbarch_fp0_regnum
  42    determines the register number at which the FPU data registers
  43    start.  The number of FPU data and control registers is the same
  44    for both architectures.  The number of SSE registers however,
  45    differs and is determined by the num_xmm_regs member of `struct
  46    gdbarch_tdep'.  */
  47
  48 /* Convention for returning structures.  */
  49
  50 enum struct_return
  51 {
  52   pcc_struct_return,            /* Return "short" structures in memory.  */
  53   reg_struct_return             /* Return "short" structures in registers.  */
  54 };
  55
  56 /* Register classes as defined in the AMD x86-64 psABI.  */
  57
  58 enum amd64_reg_class
  59 {
  60   AMD64_INTEGER,
  61   AMD64_SSE,
  62   AMD64_SSEUP,
  63   AMD64_X87,
  64   AMD64_X87UP,
  65   AMD64_COMPLEX_X87,
  66   AMD64_NO_CLASS,
  67   AMD64_MEMORY
  68 };
  69
  70 /* i386 architecture specific information.  */
  71 struct gdbarch_tdep
  72 {
  73   /* General-purpose registers.  */
  74   struct regset *gregset;
  75   int *gregset_reg_offset;
  76   int gregset_num_regs;
  77   size_t sizeof_gregset;
  78
  79   /* The general-purpose registers used to pass integers when making
  80      function calls.  This only applies to amd64, as all parameters
  81      are passed through the stack on x86.  */
  82   int call_dummy_num_integer_regs;
  83   int *call_dummy_integer_regs;
  84
  85   /* Classify TYPE according to calling conventions, and store
  86      the result in CLASS.  Used on amd64 only.  */
  87   void (*classify) (struct type *type, enum amd64_reg_class class[2]);
  88
  89   /* Floating-point registers.  */
  90   struct regset *fpregset;
  91   size_t sizeof_fpregset;
  92
  93   /* Register number for %st(0).  The register numbers for the other
  94      registers follow from this one.  Set this to -1 to indicate the
  95      absence of an FPU.  */
  96   int st0_regnum;
  97
  98   /* Register number for %mm0.  Set this to -1 to indicate the absence
  99      of MMX support.  */
 100   int mm0_regnum;
 101
 102   /* Number of SSE registers.  */
 103   int num_xmm_regs;
 104
 105   /* Offset of saved PC in jmp_buf.  */
 106   int jb_pc_offset;
 107
 108   /* Convention for returning structures.  */
 109   enum struct_return struct_return;
 110
 111   /* Address range where sigtramp lives.  */
 112   CORE_ADDR sigtramp_start;
 113   CORE_ADDR sigtramp_end;
 114
 115   /* Detect sigtramp.  */
 116   int (*sigtramp_p) (struct frame_info *);
 117
 118   /* Get address of sigcontext for sigtramp.  */
 119   CORE_ADDR (*sigcontext_addr) (struct frame_info *);
 120
 121   /* Offset of registers in `struct sigcontext'.  */
 122   int *sc_reg_offset;
 123   int sc_num_regs;
 124
 125   /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
 126      is deprecated, please use `sc_reg_offset' instead.  */
 127   int sc_pc_offset;
 128   int sc_sp_offset;
 129
 130   /* ISA-specific data types.  */
 131   struct type *i386_eflags_type;
 132   struct type *i386_mxcsr_type;
 133   struct type *i386_mmx_type;
 134   struct type *i386_sse_type;
 135   struct type *i387_ext_type;
 136
 137   /* Process record/replay target.  */
 138   /* The map for registers because the AMD64's registers order
 139      in GDB is not same as I386 instructions.  */
 140   const int *record_regmap;
 141   /* Parse intx80 args.  */
 142   int (*i386_intx80_record) (struct regcache *regcache);
 143   /* Parse sysenter args.  */
 144   int (*i386_sysenter_record) (struct regcache *regcache);
 145   /* Parse syscall args.  */
 146   int (*i386_syscall_record) (struct regcache *regcache);
 147 };
 148
 149 /* Floating-point registers.  */
 150
 151 /* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
 152    (at most) in the FPU, but are zero-extended to 32 bits in GDB's
 153    register cache.  */
 154
 155 /* Return non-zero if REGNUM matches the FP register and the FP
 156    register set is active.  */
 157 extern int i386_fp_regnum_p (struct gdbarch *, int);
 158 extern int i386_fpc_regnum_p (struct gdbarch *, int);
 159
 160 /* Register numbers of various important registers.  */
 161
 162 enum i386_regnum
 163 {
 164   I386_EAX_REGNUM,              /* %eax */
 165   I386_ECX_REGNUM,              /* %ecx */
 166   I386_EDX_REGNUM,              /* %edx */
 167   I386_EBX_REGNUM,              /* %ebx */
 168   I386_ESP_REGNUM,              /* %esp */
 169   I386_EBP_REGNUM,              /* %ebp */
 170   I386_ESI_REGNUM,              /* %esi */
 171   I386_EDI_REGNUM,              /* %edi */
 172   I386_EIP_REGNUM,              /* %eip */
 173   I386_EFLAGS_REGNUM,           /* %eflags */
 174   I386_CS_REGNUM,               /* %cs */
 175   I386_SS_REGNUM,               /* %ss */
 176   I386_DS_REGNUM,               /* %ds */
 177   I386_ES_REGNUM,               /* %es */
 178   I386_FS_REGNUM,               /* %fs */
 179   I386_GS_REGNUM,               /* %gs */
 180   I386_ST0_REGNUM               /* %st(0) */
 181 };
 182
 183 /* Register numbers of RECORD_REGMAP.  */
 184
 185 enum record_i386_regnum
 186 {
 187   X86_RECORD_REAX_REGNUM,
 188   X86_RECORD_RECX_REGNUM,
 189   X86_RECORD_REDX_REGNUM,
 190   X86_RECORD_REBX_REGNUM,
 191   X86_RECORD_RESP_REGNUM,
 192   X86_RECORD_REBP_REGNUM,
 193   X86_RECORD_RESI_REGNUM,
 194   X86_RECORD_REDI_REGNUM,
 195   X86_RECORD_R8_REGNUM,
 196   X86_RECORD_R9_REGNUM,
 197   X86_RECORD_R10_REGNUM,
 198   X86_RECORD_R11_REGNUM,
 199   X86_RECORD_R12_REGNUM,
 200   X86_RECORD_R13_REGNUM,
 201   X86_RECORD_R14_REGNUM,
 202   X86_RECORD_R15_REGNUM,
 203   X86_RECORD_REIP_REGNUM,
 204   X86_RECORD_EFLAGS_REGNUM,
 205   X86_RECORD_CS_REGNUM,
 206   X86_RECORD_SS_REGNUM,
 207   X86_RECORD_DS_REGNUM,
 208   X86_RECORD_ES_REGNUM,
 209   X86_RECORD_FS_REGNUM,
 210   X86_RECORD_GS_REGNUM,
 211 };
 212
 213 #define I386_NUM_GREGS  16
 214 #define I386_NUM_FREGS  16
 215 #define I386_NUM_XREGS  9
 216
 217 #define I386_SSE_NUM_REGS       (I386_NUM_GREGS + I386_NUM_FREGS \
 218                                  + I386_NUM_XREGS)
 219
 220 /* Size of the largest register.  */
 221 #define I386_MAX_REGISTER_SIZE  16
 222
 223 /* Types for i386-specific registers.  */
 224 extern struct type *i386_eflags_type (struct gdbarch *gdbarch);
 225 extern struct type *i386_mxcsr_type (struct gdbarch *gdbarch);
 226 extern struct type *i386_mmx_type (struct gdbarch *gdbarch);
 227 extern struct type *i386_sse_type (struct gdbarch *gdbarch);
 228 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
 229
 230 /* Segment selectors.  */
 231 #define I386_SEL_RPL    0x0003  /* Requester's Privilege Level mask.  */
 232 #define I386_SEL_UPL    0x0003  /* User Privilige Level. */
 233 #define I386_SEL_KPL    0x0000  /* Kernel Privilige Level. */
 234
 235 /* The length of the longest i386 instruction (according to
 236    include/asm-i386/kprobes.h in Linux 2.6.  */
 237 #define I386_MAX_INSN_LEN (16)
 238
 239 /* Functions exported from i386-tdep.c.  */
 240 extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
 241                                                CORE_ADDR pc, char *name);
 242 extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc);
 243
 244 /* Return whether the THIS_FRAME corresponds to a sigtramp routine.  */
 245 extern int i386_sigtramp_p (struct frame_info *this_frame);
 246
 247 /* Return the name of register REGNUM.  */
 248 extern char const *i386_register_name (struct gdbarch * gdbarch, int regnum);
 249
 250 /* Return non-zero if REGNUM is a member of the specified group.  */
 251 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
 252                                      struct reggroup *group);
 253
 254 /* Supply register REGNUM from the general-purpose register set REGSET
 255    to register cache REGCACHE.  If REGNUM is -1, do this for all
 256    registers in REGSET.  */
 257 extern void i386_supply_gregset (const struct regset *regset,
 258                                  struct regcache *regcache, int regnum,
 259                                  const void *gregs, size_t len);
 260
 261 /* Collect register REGNUM from the register cache REGCACHE and store
 262    it in the buffer specified by GREGS and LEN as described by the
 263    general-purpose register set REGSET.  If REGNUM is -1, do this for
 264    all registers in REGSET.  */
 265 extern void i386_collect_gregset (const struct regset *regset,
 266                                   const struct regcache *regcache,
 267                                   int regnum, void *gregs, size_t len);
 268
 269 /* Return the appropriate register set for the core section identified
 270    by SECT_NAME and SECT_SIZE.  */
 271 extern const struct regset *
 272   i386_regset_from_core_section (struct gdbarch *gdbarch,
 273                                  const char *sect_name, size_t sect_size);
 274
 275
 276 extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
 277                                        struct displaced_step_closure *closure,
 278                                        CORE_ADDR from, CORE_ADDR to,
 279                                        struct regcache *regs);
 280
 281 /* Initialize a basic ELF architecture variant.  */
 282 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
 283
 284 /* Initialize a SVR4 architecture variant.  */
 285 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
 286
 287 extern int i386_process_record (struct gdbarch *gdbarch,
 288                                 struct regcache *regcache, CORE_ADDR addr);
 289 \f
 290
 291 /* Functions and variables exported from i386bsd-tdep.c.  */
 292
 293 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
 294 extern CORE_ADDR i386fbsd_sigtramp_start_addr;
 295 extern CORE_ADDR i386fbsd_sigtramp_end_addr;
 296 extern CORE_ADDR i386obsd_sigtramp_start_addr;
 297 extern CORE_ADDR i386obsd_sigtramp_end_addr;
 298 extern int i386fbsd4_sc_reg_offset[];
 299 extern int i386fbsd_sc_reg_offset[];
 300 extern int i386nbsd_sc_reg_offset[];
 301 extern int i386obsd_sc_reg_offset[];
 302 extern int i386bsd_sc_reg_offset[];
 303
 304 #endif /* i386-tdep.h */