1 /* Intel 387 floating point stuff.
3 Copyright (C) 1988, 1989, 1991, 1992, 1993, 1994, 1998, 1999, 2000, 2001,
4 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "floatformat.h"
32 #include "gdb_assert.h"
33 #include "gdb_string.h"
35 #include "i386-tdep.h"
36 #include "i387-tdep.h"
37 #include "i386-xstate.h"
39 /* Print the floating point number specified by RAW. */
42 print_i387_value (struct gdbarch
*gdbarch
,
43 const gdb_byte
*raw
, struct ui_file
*file
)
47 /* Using extract_typed_floating here might affect the representation
48 of certain numbers such as NaNs, even if GDB is running natively.
49 This is fine since our caller already detects such special
50 numbers and we print the hexadecimal representation anyway. */
51 value
= extract_typed_floating (raw
, i387_ext_type (gdbarch
));
53 /* We try to print 19 digits. The last digit may or may not contain
54 garbage, but we'd better print one too many. We need enough room
55 to print the value, 1 position for the sign, 1 for the decimal
56 point, 19 for the digits and 6 for the exponent adds up to 27. */
57 #ifdef PRINTF_HAS_LONG_DOUBLE
58 fprintf_filtered (file
, " %-+27.19Lg", (long double) value
);
60 fprintf_filtered (file
, " %-+27.19g", (double) value
);
64 /* Print the classification for the register contents RAW. */
67 print_i387_ext (struct gdbarch
*gdbarch
,
68 const gdb_byte
*raw
, struct ui_file
*file
)
72 unsigned int exponent
;
73 unsigned long fraction
[2];
76 integer
= raw
[7] & 0x80;
77 exponent
= (((raw
[9] & 0x7f) << 8) | raw
[8]);
78 fraction
[0] = ((raw
[3] << 24) | (raw
[2] << 16) | (raw
[1] << 8) | raw
[0]);
79 fraction
[1] = (((raw
[7] & 0x7f) << 24) | (raw
[6] << 16)
80 | (raw
[5] << 8) | raw
[4]);
82 if (exponent
== 0x7fff && integer
)
84 if (fraction
[0] == 0x00000000 && fraction
[1] == 0x00000000)
86 fprintf_filtered (file
, " %cInf", (sign
? '-' : '+'));
87 else if (sign
&& fraction
[0] == 0x00000000 && fraction
[1] == 0x40000000)
88 /* Real Indefinite (QNaN). */
89 fputs_unfiltered (" Real Indefinite (QNaN)", file
);
90 else if (fraction
[1] & 0x40000000)
92 fputs_filtered (" QNaN", file
);
95 fputs_filtered (" SNaN", file
);
97 else if (exponent
< 0x7fff && exponent
> 0x0000 && integer
)
99 print_i387_value (gdbarch
, raw
, file
);
100 else if (exponent
== 0x0000)
102 /* Denormal or zero. */
103 print_i387_value (gdbarch
, raw
, file
);
106 /* Pseudo-denormal. */
107 fputs_filtered (" Pseudo-denormal", file
);
108 else if (fraction
[0] || fraction
[1])
110 fputs_filtered (" Denormal", file
);
114 fputs_filtered (" Unsupported", file
);
117 /* Print the status word STATUS. */
120 print_i387_status_word (unsigned int status
, struct ui_file
*file
)
122 fprintf_filtered (file
, "Status Word: %s",
123 hex_string_custom (status
, 4));
124 fputs_filtered (" ", file
);
125 fprintf_filtered (file
, " %s", (status
& 0x0001) ? "IE" : " ");
126 fprintf_filtered (file
, " %s", (status
& 0x0002) ? "DE" : " ");
127 fprintf_filtered (file
, " %s", (status
& 0x0004) ? "ZE" : " ");
128 fprintf_filtered (file
, " %s", (status
& 0x0008) ? "OE" : " ");
129 fprintf_filtered (file
, " %s", (status
& 0x0010) ? "UE" : " ");
130 fprintf_filtered (file
, " %s", (status
& 0x0020) ? "PE" : " ");
131 fputs_filtered (" ", file
);
132 fprintf_filtered (file
, " %s", (status
& 0x0080) ? "ES" : " ");
133 fputs_filtered (" ", file
);
134 fprintf_filtered (file
, " %s", (status
& 0x0040) ? "SF" : " ");
135 fputs_filtered (" ", file
);
136 fprintf_filtered (file
, " %s", (status
& 0x0100) ? "C0" : " ");
137 fprintf_filtered (file
, " %s", (status
& 0x0200) ? "C1" : " ");
138 fprintf_filtered (file
, " %s", (status
& 0x0400) ? "C2" : " ");
139 fprintf_filtered (file
, " %s", (status
& 0x4000) ? "C3" : " ");
141 fputs_filtered ("\n", file
);
143 fprintf_filtered (file
,
144 " TOP: %d\n", ((status
>> 11) & 7));
147 /* Print the control word CONTROL. */
150 print_i387_control_word (unsigned int control
, struct ui_file
*file
)
152 fprintf_filtered (file
, "Control Word: %s",
153 hex_string_custom (control
, 4));
154 fputs_filtered (" ", file
);
155 fprintf_filtered (file
, " %s", (control
& 0x0001) ? "IM" : " ");
156 fprintf_filtered (file
, " %s", (control
& 0x0002) ? "DM" : " ");
157 fprintf_filtered (file
, " %s", (control
& 0x0004) ? "ZM" : " ");
158 fprintf_filtered (file
, " %s", (control
& 0x0008) ? "OM" : " ");
159 fprintf_filtered (file
, " %s", (control
& 0x0010) ? "UM" : " ");
160 fprintf_filtered (file
, " %s", (control
& 0x0020) ? "PM" : " ");
162 fputs_filtered ("\n", file
);
164 fputs_filtered (" PC: ", file
);
165 switch ((control
>> 8) & 3)
168 fputs_filtered ("Single Precision (24-bits)\n", file
);
171 fputs_filtered ("Reserved\n", file
);
174 fputs_filtered ("Double Precision (53-bits)\n", file
);
177 fputs_filtered ("Extended Precision (64-bits)\n", file
);
181 fputs_filtered (" RC: ", file
);
182 switch ((control
>> 10) & 3)
185 fputs_filtered ("Round to nearest\n", file
);
188 fputs_filtered ("Round down\n", file
);
191 fputs_filtered ("Round up\n", file
);
194 fputs_filtered ("Round toward zero\n", file
);
199 /* Print out the i387 floating point state. Note that we ignore FRAME
200 in the code below. That's OK since floating-point registers are
201 never saved on the stack. */
204 i387_print_float_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
205 struct frame_info
*frame
, const char *args
)
207 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (frame
));
219 gdb_assert (gdbarch
== get_frame_arch (frame
));
221 fctrl
= get_frame_register_unsigned (frame
, I387_FCTRL_REGNUM (tdep
));
222 fstat
= get_frame_register_unsigned (frame
, I387_FSTAT_REGNUM (tdep
));
223 ftag
= get_frame_register_unsigned (frame
, I387_FTAG_REGNUM (tdep
));
224 fiseg
= get_frame_register_unsigned (frame
, I387_FISEG_REGNUM (tdep
));
225 fioff
= get_frame_register_unsigned (frame
, I387_FIOFF_REGNUM (tdep
));
226 foseg
= get_frame_register_unsigned (frame
, I387_FOSEG_REGNUM (tdep
));
227 fooff
= get_frame_register_unsigned (frame
, I387_FOOFF_REGNUM (tdep
));
228 fop
= get_frame_register_unsigned (frame
, I387_FOP_REGNUM (tdep
));
230 top
= ((fstat
>> 11) & 7);
232 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
234 gdb_byte raw
[I386_MAX_REGISTER_SIZE
];
235 int tag
= (ftag
>> (fpreg
* 2)) & 3;
238 fprintf_filtered (file
, "%sR%d: ", fpreg
== top
? "=>" : " ", fpreg
);
243 fputs_filtered ("Valid ", file
);
246 fputs_filtered ("Zero ", file
);
249 fputs_filtered ("Special ", file
);
252 fputs_filtered ("Empty ", file
);
256 get_frame_register (frame
,
257 (fpreg
+ 8 - top
) % 8 + I387_ST0_REGNUM (tdep
),
260 fputs_filtered ("0x", file
);
261 for (i
= 9; i
>= 0; i
--)
262 fprintf_filtered (file
, "%02x", raw
[i
]);
265 print_i387_ext (gdbarch
, raw
, file
);
267 fputs_filtered ("\n", file
);
270 fputs_filtered ("\n", file
);
272 print_i387_status_word (fstat
, file
);
273 print_i387_control_word (fctrl
, file
);
274 fprintf_filtered (file
, "Tag Word: %s\n",
275 hex_string_custom (ftag
, 4));
276 fprintf_filtered (file
, "Instruction Pointer: %s:",
277 hex_string_custom (fiseg
, 2));
278 fprintf_filtered (file
, "%s\n", hex_string_custom (fioff
, 8));
279 fprintf_filtered (file
, "Operand Pointer: %s:",
280 hex_string_custom (foseg
, 2));
281 fprintf_filtered (file
, "%s\n", hex_string_custom (fooff
, 8));
282 fprintf_filtered (file
, "Opcode: %s\n",
283 hex_string_custom (fop
? (fop
| 0xd800) : 0, 4));
287 /* Return nonzero if a value of type TYPE stored in register REGNUM
288 needs any special handling. */
291 i387_convert_register_p (struct gdbarch
*gdbarch
, int regnum
,
294 if (i386_fp_regnum_p (gdbarch
, regnum
))
296 /* Floating point registers must be converted unless we are
297 accessing them in their hardware type. */
298 if (type
== i387_ext_type (gdbarch
))
307 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
308 return its contents in TO. */
311 i387_register_to_value (struct frame_info
*frame
, int regnum
,
312 struct type
*type
, gdb_byte
*to
)
314 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
315 gdb_byte from
[I386_MAX_REGISTER_SIZE
];
317 gdb_assert (i386_fp_regnum_p (gdbarch
, regnum
));
319 /* We only support floating-point values. */
320 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
322 warning (_("Cannot convert floating-point register value "
323 "to non-floating-point type."));
327 /* Convert to TYPE. */
328 get_frame_register (frame
, regnum
, from
);
329 convert_typed_floating (from
, i387_ext_type (gdbarch
), to
, type
);
332 /* Write the contents FROM of a value of type TYPE into register
333 REGNUM in frame FRAME. */
336 i387_value_to_register (struct frame_info
*frame
, int regnum
,
337 struct type
*type
, const gdb_byte
*from
)
339 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
340 gdb_byte to
[I386_MAX_REGISTER_SIZE
];
342 gdb_assert (i386_fp_regnum_p (gdbarch
, regnum
));
344 /* We only support floating-point values. */
345 if (TYPE_CODE (type
) != TYPE_CODE_FLT
)
347 warning (_("Cannot convert non-floating-point type "
348 "to floating-point register value."));
352 /* Convert from TYPE. */
353 convert_typed_floating (from
, type
, to
, i387_ext_type (gdbarch
));
354 put_frame_register (frame
, regnum
, to
);
358 /* Handle FSAVE and FXSAVE formats. */
360 /* At fsave_offset[REGNUM] you'll find the offset to the location in
361 the data structure used by the "fsave" instruction where GDB
362 register REGNUM is stored. */
364 static int fsave_offset
[] =
366 28 + 0 * 10, /* %st(0) ... */
373 28 + 7 * 10, /* ... %st(7). */
374 0, /* `fctrl' (16 bits). */
375 4, /* `fstat' (16 bits). */
376 8, /* `ftag' (16 bits). */
377 16, /* `fiseg' (16 bits). */
379 24, /* `foseg' (16 bits). */
381 18 /* `fop' (bottom 11 bits). */
384 #define FSAVE_ADDR(tdep, fsave, regnum) \
385 (fsave + fsave_offset[regnum - I387_ST0_REGNUM (tdep)])
388 /* Fill register REGNUM in REGCACHE with the appropriate value from
389 *FSAVE. This function masks off any of the reserved bits in
393 i387_supply_fsave (struct regcache
*regcache
, int regnum
, const void *fsave
)
395 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
396 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
397 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
398 const gdb_byte
*regs
= fsave
;
401 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
403 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
404 if (regnum
== -1 || regnum
== i
)
408 regcache_raw_supply (regcache
, i
, NULL
);
412 /* Most of the FPU control registers occupy only 16 bits in the
413 fsave area. Give those a special treatment. */
414 if (i
>= I387_FCTRL_REGNUM (tdep
)
415 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
419 memcpy (val
, FSAVE_ADDR (tdep
, regs
, i
), 2);
421 if (i
== I387_FOP_REGNUM (tdep
))
422 val
[1] &= ((1 << 3) - 1);
423 regcache_raw_supply (regcache
, i
, val
);
426 regcache_raw_supply (regcache
, i
, FSAVE_ADDR (tdep
, regs
, i
));
429 /* Provide dummy values for the SSE registers. */
430 for (i
= I387_XMM0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
431 if (regnum
== -1 || regnum
== i
)
432 regcache_raw_supply (regcache
, i
, NULL
);
433 if (regnum
== -1 || regnum
== I387_MXCSR_REGNUM (tdep
))
437 store_unsigned_integer (buf
, 4, byte_order
, 0x1f80);
438 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
), buf
);
442 /* Fill register REGNUM (if it is a floating-point register) in *FSAVE
443 with the value from REGCACHE. If REGNUM is -1, do this for all
444 registers. This function doesn't touch any of the reserved bits in
448 i387_collect_fsave (const struct regcache
*regcache
, int regnum
, void *fsave
)
450 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
451 gdb_byte
*regs
= fsave
;
454 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
456 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
457 if (regnum
== -1 || regnum
== i
)
459 /* Most of the FPU control registers occupy only 16 bits in
460 the fsave area. Give those a special treatment. */
461 if (i
>= I387_FCTRL_REGNUM (tdep
)
462 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
466 regcache_raw_collect (regcache
, i
, buf
);
468 if (i
== I387_FOP_REGNUM (tdep
))
470 /* The opcode occupies only 11 bits. Make sure we
471 don't touch the other bits. */
472 buf
[1] &= ((1 << 3) - 1);
473 buf
[1] |= ((FSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
475 memcpy (FSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
478 regcache_raw_collect (regcache
, i
, FSAVE_ADDR (tdep
, regs
, i
));
483 /* At fxsave_offset[REGNUM] you'll find the offset to the location in
484 the data structure used by the "fxsave" instruction where GDB
485 register REGNUM is stored. */
487 static int fxsave_offset
[] =
489 32, /* %st(0) through ... */
496 144, /* ... %st(7) (80 bits each). */
497 0, /* `fctrl' (16 bits). */
498 2, /* `fstat' (16 bits). */
499 4, /* `ftag' (16 bits). */
500 12, /* `fiseg' (16 bits). */
502 20, /* `foseg' (16 bits). */
504 6, /* `fop' (bottom 11 bits). */
505 160 + 0 * 16, /* %xmm0 through ... */
520 160 + 15 * 16, /* ... %xmm15 (128 bits each). */
523 #define FXSAVE_ADDR(tdep, fxsave, regnum) \
524 (fxsave + fxsave_offset[regnum - I387_ST0_REGNUM (tdep)])
526 /* We made an unfortunate choice in putting %mxcsr after the SSE
527 registers %xmm0-%xmm7 instead of before, since it makes supporting
528 the registers %xmm8-%xmm15 on AMD64 a bit involved. Therefore we
529 don't include the offset for %mxcsr here above. */
531 #define FXSAVE_MXCSR_ADDR(fxsave) (fxsave + 24)
533 static int i387_tag (const gdb_byte
*raw
);
536 /* Fill register REGNUM in REGCACHE with the appropriate
537 floating-point or SSE register value from *FXSAVE. This function
538 masks off any of the reserved bits in *FXSAVE. */
541 i387_supply_fxsave (struct regcache
*regcache
, int regnum
, const void *fxsave
)
543 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
544 const gdb_byte
*regs
= fxsave
;
547 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
548 gdb_assert (tdep
->num_xmm_regs
> 0);
550 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
551 if (regnum
== -1 || regnum
== i
)
555 regcache_raw_supply (regcache
, i
, NULL
);
559 /* Most of the FPU control registers occupy only 16 bits in
560 the fxsave area. Give those a special treatment. */
561 if (i
>= I387_FCTRL_REGNUM (tdep
) && i
< I387_XMM0_REGNUM (tdep
)
562 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
566 memcpy (val
, FXSAVE_ADDR (tdep
, regs
, i
), 2);
568 if (i
== I387_FOP_REGNUM (tdep
))
569 val
[1] &= ((1 << 3) - 1);
570 else if (i
== I387_FTAG_REGNUM (tdep
))
572 /* The fxsave area contains a simplified version of
573 the tag word. We have to look at the actual 80-bit
574 FP data to recreate the traditional i387 tag word. */
576 unsigned long ftag
= 0;
580 top
= ((FXSAVE_ADDR (tdep
, regs
,
581 I387_FSTAT_REGNUM (tdep
)))[1] >> 3);
584 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
588 if (val
[0] & (1 << fpreg
))
590 int regnum
= (fpreg
+ 8 - top
) % 8
591 + I387_ST0_REGNUM (tdep
);
592 tag
= i387_tag (FXSAVE_ADDR (tdep
, regs
, regnum
));
597 ftag
|= tag
<< (2 * fpreg
);
599 val
[0] = ftag
& 0xff;
600 val
[1] = (ftag
>> 8) & 0xff;
602 regcache_raw_supply (regcache
, i
, val
);
605 regcache_raw_supply (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
608 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
611 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
), NULL
);
613 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
),
614 FXSAVE_MXCSR_ADDR (regs
));
618 /* Fill register REGNUM (if it is a floating-point or SSE register) in
619 *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
620 all registers. This function doesn't touch any of the reserved
624 i387_collect_fxsave (const struct regcache
*regcache
, int regnum
, void *fxsave
)
626 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
627 gdb_byte
*regs
= fxsave
;
630 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
631 gdb_assert (tdep
->num_xmm_regs
> 0);
633 for (i
= I387_ST0_REGNUM (tdep
); i
< I387_MXCSR_REGNUM (tdep
); i
++)
634 if (regnum
== -1 || regnum
== i
)
636 /* Most of the FPU control registers occupy only 16 bits in
637 the fxsave area. Give those a special treatment. */
638 if (i
>= I387_FCTRL_REGNUM (tdep
) && i
< I387_XMM0_REGNUM (tdep
)
639 && i
!= I387_FIOFF_REGNUM (tdep
) && i
!= I387_FOOFF_REGNUM (tdep
))
643 regcache_raw_collect (regcache
, i
, buf
);
645 if (i
== I387_FOP_REGNUM (tdep
))
647 /* The opcode occupies only 11 bits. Make sure we
648 don't touch the other bits. */
649 buf
[1] &= ((1 << 3) - 1);
650 buf
[1] |= ((FXSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
652 else if (i
== I387_FTAG_REGNUM (tdep
))
654 /* Converting back is much easier. */
659 ftag
= (buf
[1] << 8) | buf
[0];
663 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
665 int tag
= (ftag
>> (fpreg
* 2)) & 3;
668 buf
[0] |= (1 << fpreg
);
671 memcpy (FXSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
674 regcache_raw_collect (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
677 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
678 regcache_raw_collect (regcache
, I387_MXCSR_REGNUM (tdep
),
679 FXSAVE_MXCSR_ADDR (regs
));
682 /* `xstate_bv' is at byte offset 512. */
683 #define XSAVE_XSTATE_BV_ADDR(xsave) (xsave + 512)
685 /* At xsave_avxh_offset[REGNUM] you'll find the offset to the location in
686 the upper 128bit of AVX register data structure used by the "xsave"
687 instruction where GDB register REGNUM is stored. */
689 static int xsave_avxh_offset
[] =
691 576 + 0 * 16, /* Upper 128bit of %ymm0 through ... */
706 576 + 15 * 16 /* Upper 128bit of ... %ymm15 (128 bits each). */
709 #define XSAVE_AVXH_ADDR(tdep, xsave, regnum) \
710 (xsave + xsave_avxh_offset[regnum - I387_YMM0H_REGNUM (tdep)])
712 /* Similar to i387_supply_fxsave, but use XSAVE extended state. */
715 i387_supply_xsave (struct regcache
*regcache
, int regnum
,
718 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
719 const gdb_byte
*regs
= xsave
;
721 unsigned int clear_bv
;
729 all
= x87
| sse
| avxh
732 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
733 gdb_assert (tdep
->num_xmm_regs
> 0);
737 else if (regnum
>= I387_YMM0H_REGNUM (tdep
)
738 && regnum
< I387_YMMENDH_REGNUM (tdep
))
740 else if (regnum
>= I387_XMM0_REGNUM(tdep
)
741 && regnum
< I387_MXCSR_REGNUM (tdep
))
743 else if (regnum
>= I387_ST0_REGNUM (tdep
)
744 && regnum
< I387_FCTRL_REGNUM (tdep
))
749 if (regs
!= NULL
&& regclass
!= none
)
751 /* Get `xstat_bv'. */
752 const gdb_byte
*xstate_bv_p
= XSAVE_XSTATE_BV_ADDR (regs
);
754 /* The supported bits in `xstat_bv' are 1 byte. Clear part in
755 vector registers if its bit in xstat_bv is zero. */
756 clear_bv
= (~(*xstate_bv_p
)) & tdep
->xcr0
;
759 clear_bv
= I386_XSTATE_AVX_MASK
;
767 if ((clear_bv
& I386_XSTATE_AVX
))
770 p
= XSAVE_AVXH_ADDR (tdep
, regs
, regnum
);
771 regcache_raw_supply (regcache
, regnum
, p
);
775 if ((clear_bv
& I386_XSTATE_SSE
))
778 p
= FXSAVE_ADDR (tdep
, regs
, regnum
);
779 regcache_raw_supply (regcache
, regnum
, p
);
783 if ((clear_bv
& I386_XSTATE_X87
))
786 p
= FXSAVE_ADDR (tdep
, regs
, regnum
);
787 regcache_raw_supply (regcache
, regnum
, p
);
791 /* Hanle the upper YMM registers. */
792 if ((tdep
->xcr0
& I386_XSTATE_AVX
))
794 if ((clear_bv
& I386_XSTATE_AVX
))
799 for (i
= I387_YMM0H_REGNUM (tdep
);
800 i
< I387_YMMENDH_REGNUM (tdep
); i
++)
803 p
= XSAVE_AVXH_ADDR (tdep
, regs
, i
);
804 regcache_raw_supply (regcache
, i
, p
);
808 /* Handle the XMM registers. */
809 if ((tdep
->xcr0
& I386_XSTATE_SSE
))
811 if ((clear_bv
& I386_XSTATE_SSE
))
816 for (i
= I387_XMM0_REGNUM (tdep
);
817 i
< I387_MXCSR_REGNUM (tdep
); i
++)
820 p
= FXSAVE_ADDR (tdep
, regs
, i
);
821 regcache_raw_supply (regcache
, i
, p
);
825 /* Handle the x87 registers. */
826 if ((tdep
->xcr0
& I386_XSTATE_X87
))
828 if ((clear_bv
& I386_XSTATE_X87
))
833 for (i
= I387_ST0_REGNUM (tdep
);
834 i
< I387_FCTRL_REGNUM (tdep
); i
++)
837 p
= FXSAVE_ADDR (tdep
, regs
, i
);
838 regcache_raw_supply (regcache
, i
, p
);
844 /* Only handle x87 control registers. */
845 for (i
= I387_FCTRL_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
846 if (regnum
== -1 || regnum
== i
)
850 regcache_raw_supply (regcache
, i
, NULL
);
854 /* Most of the FPU control registers occupy only 16 bits in
855 the xsave extended state. Give those a special treatment. */
856 if (i
!= I387_FIOFF_REGNUM (tdep
)
857 && i
!= I387_FOOFF_REGNUM (tdep
))
861 memcpy (val
, FXSAVE_ADDR (tdep
, regs
, i
), 2);
863 if (i
== I387_FOP_REGNUM (tdep
))
864 val
[1] &= ((1 << 3) - 1);
865 else if (i
== I387_FTAG_REGNUM (tdep
))
867 /* The fxsave area contains a simplified version of
868 the tag word. We have to look at the actual 80-bit
869 FP data to recreate the traditional i387 tag word. */
871 unsigned long ftag
= 0;
875 top
= ((FXSAVE_ADDR (tdep
, regs
,
876 I387_FSTAT_REGNUM (tdep
)))[1] >> 3);
879 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
883 if (val
[0] & (1 << fpreg
))
885 int regnum
= (fpreg
+ 8 - top
) % 8
886 + I387_ST0_REGNUM (tdep
);
887 tag
= i387_tag (FXSAVE_ADDR (tdep
, regs
, regnum
));
892 ftag
|= tag
<< (2 * fpreg
);
894 val
[0] = ftag
& 0xff;
895 val
[1] = (ftag
>> 8) & 0xff;
897 regcache_raw_supply (regcache
, i
, val
);
900 regcache_raw_supply (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
903 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
905 p
= regs
== NULL
? NULL
: FXSAVE_MXCSR_ADDR (regs
);
906 regcache_raw_supply (regcache
, I387_MXCSR_REGNUM (tdep
), p
);
910 /* Similar to i387_collect_fxsave, but use XSAVE extended state. */
913 i387_collect_xsave (const struct regcache
*regcache
, int regnum
,
914 void *xsave
, int gcore
)
916 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_regcache_arch (regcache
));
917 gdb_byte
*regs
= xsave
;
926 all
= x87
| sse
| avxh
929 gdb_assert (tdep
->st0_regnum
>= I386_ST0_REGNUM
);
930 gdb_assert (tdep
->num_xmm_regs
> 0);
934 else if (regnum
>= I387_YMM0H_REGNUM (tdep
)
935 && regnum
< I387_YMMENDH_REGNUM (tdep
))
937 else if (regnum
>= I387_XMM0_REGNUM(tdep
)
938 && regnum
< I387_MXCSR_REGNUM (tdep
))
940 else if (regnum
>= I387_ST0_REGNUM (tdep
)
941 && regnum
< I387_FCTRL_REGNUM (tdep
))
948 /* Clear XSAVE extended state. */
949 memset (regs
, 0, I386_XSTATE_SIZE (tdep
->xcr0
));
951 /* Update XCR0 and `xstate_bv' with XCR0 for gcore. */
952 if (tdep
->xsave_xcr0_offset
!= -1)
953 memcpy (regs
+ tdep
->xsave_xcr0_offset
, &tdep
->xcr0
, 8);
954 memcpy (XSAVE_XSTATE_BV_ADDR (regs
), &tdep
->xcr0
, 8);
957 if ((regclass
& check
))
959 gdb_byte raw
[I386_MAX_REGISTER_SIZE
];
960 gdb_byte
*xstate_bv_p
= XSAVE_XSTATE_BV_ADDR (regs
);
961 unsigned int xstate_bv
= 0;
962 /* The supported bits in `xstat_bv' are 1 byte. */
963 unsigned int clear_bv
= (~(*xstate_bv_p
)) & tdep
->xcr0
;
966 /* Clear register set if its bit in xstat_bv is zero. */
969 if ((clear_bv
& I386_XSTATE_AVX
))
970 for (i
= I387_YMM0H_REGNUM (tdep
);
971 i
< I387_YMMENDH_REGNUM (tdep
); i
++)
972 memset (XSAVE_AVXH_ADDR (tdep
, regs
, i
), 0, 16);
974 if ((clear_bv
& I386_XSTATE_SSE
))
975 for (i
= I387_XMM0_REGNUM (tdep
);
976 i
< I387_MXCSR_REGNUM (tdep
); i
++)
977 memset (FXSAVE_ADDR (tdep
, regs
, i
), 0, 16);
979 if ((clear_bv
& I386_XSTATE_X87
))
980 for (i
= I387_ST0_REGNUM (tdep
);
981 i
< I387_FCTRL_REGNUM (tdep
); i
++)
982 memset (FXSAVE_ADDR (tdep
, regs
, i
), 0, 10);
987 /* Check if any upper YMM registers are changed. */
988 if ((tdep
->xcr0
& I386_XSTATE_AVX
))
989 for (i
= I387_YMM0H_REGNUM (tdep
);
990 i
< I387_YMMENDH_REGNUM (tdep
); i
++)
992 regcache_raw_collect (regcache
, i
, raw
);
993 p
= XSAVE_AVXH_ADDR (tdep
, regs
, i
);
994 if (memcmp (raw
, p
, 16))
996 xstate_bv
|= I386_XSTATE_AVX
;
1001 /* Check if any SSE registers are changed. */
1002 if ((tdep
->xcr0
& I386_XSTATE_SSE
))
1003 for (i
= I387_XMM0_REGNUM (tdep
);
1004 i
< I387_MXCSR_REGNUM (tdep
); i
++)
1006 regcache_raw_collect (regcache
, i
, raw
);
1007 p
= FXSAVE_ADDR (tdep
, regs
, i
);
1008 if (memcmp (raw
, p
, 16))
1010 xstate_bv
|= I386_XSTATE_SSE
;
1011 memcpy (p
, raw
, 16);
1015 /* Check if any X87 registers are changed. */
1016 if ((tdep
->xcr0
& I386_XSTATE_X87
))
1017 for (i
= I387_ST0_REGNUM (tdep
);
1018 i
< I387_FCTRL_REGNUM (tdep
); i
++)
1020 regcache_raw_collect (regcache
, i
, raw
);
1021 p
= FXSAVE_ADDR (tdep
, regs
, i
);
1022 if (memcmp (raw
, p
, 10))
1024 xstate_bv
|= I386_XSTATE_X87
;
1025 memcpy (p
, raw
, 10);
1031 /* Check if REGNUM is changed. */
1032 regcache_raw_collect (regcache
, regnum
, raw
);
1037 internal_error (__FILE__
, __LINE__
,
1038 _("invalid i387 regclass"));
1041 /* This is an upper YMM register. */
1042 p
= XSAVE_AVXH_ADDR (tdep
, regs
, regnum
);
1043 if (memcmp (raw
, p
, 16))
1045 xstate_bv
|= I386_XSTATE_AVX
;
1046 memcpy (p
, raw
, 16);
1051 /* This is an SSE register. */
1052 p
= FXSAVE_ADDR (tdep
, regs
, regnum
);
1053 if (memcmp (raw
, p
, 16))
1055 xstate_bv
|= I386_XSTATE_SSE
;
1056 memcpy (p
, raw
, 16);
1061 /* This is an x87 register. */
1062 p
= FXSAVE_ADDR (tdep
, regs
, regnum
);
1063 if (memcmp (raw
, p
, 10))
1065 xstate_bv
|= I386_XSTATE_X87
;
1066 memcpy (p
, raw
, 10);
1072 /* Update the corresponding bits in `xstate_bv' if any SSE/AVX
1073 registers are changed. */
1076 /* The supported bits in `xstat_bv' are 1 byte. */
1077 *xstate_bv_p
|= (gdb_byte
) xstate_bv
;
1082 internal_error (__FILE__
, __LINE__
,
1083 _("invalid i387 regclass"));
1091 /* Register REGNUM has been updated. Return. */
1097 /* Return if REGNUM isn't changed. */
1098 if (regclass
!= all
)
1103 /* Only handle x87 control registers. */
1104 for (i
= I387_FCTRL_REGNUM (tdep
); i
< I387_XMM0_REGNUM (tdep
); i
++)
1105 if (regnum
== -1 || regnum
== i
)
1107 /* Most of the FPU control registers occupy only 16 bits in
1108 the xsave extended state. Give those a special treatment. */
1109 if (i
!= I387_FIOFF_REGNUM (tdep
)
1110 && i
!= I387_FOOFF_REGNUM (tdep
))
1114 regcache_raw_collect (regcache
, i
, buf
);
1116 if (i
== I387_FOP_REGNUM (tdep
))
1118 /* The opcode occupies only 11 bits. Make sure we
1119 don't touch the other bits. */
1120 buf
[1] &= ((1 << 3) - 1);
1121 buf
[1] |= ((FXSAVE_ADDR (tdep
, regs
, i
))[1] & ~((1 << 3) - 1));
1123 else if (i
== I387_FTAG_REGNUM (tdep
))
1125 /* Converting back is much easier. */
1127 unsigned short ftag
;
1130 ftag
= (buf
[1] << 8) | buf
[0];
1134 for (fpreg
= 7; fpreg
>= 0; fpreg
--)
1136 int tag
= (ftag
>> (fpreg
* 2)) & 3;
1139 buf
[0] |= (1 << fpreg
);
1142 memcpy (FXSAVE_ADDR (tdep
, regs
, i
), buf
, 2);
1145 regcache_raw_collect (regcache
, i
, FXSAVE_ADDR (tdep
, regs
, i
));
1148 if (regnum
== I387_MXCSR_REGNUM (tdep
) || regnum
== -1)
1149 regcache_raw_collect (regcache
, I387_MXCSR_REGNUM (tdep
),
1150 FXSAVE_MXCSR_ADDR (regs
));
1153 /* Recreate the FTW (tag word) valid bits from the 80-bit FP data in
1157 i387_tag (const gdb_byte
*raw
)
1160 unsigned int exponent
;
1161 unsigned long fraction
[2];
1163 integer
= raw
[7] & 0x80;
1164 exponent
= (((raw
[9] & 0x7f) << 8) | raw
[8]);
1165 fraction
[0] = ((raw
[3] << 24) | (raw
[2] << 16) | (raw
[1] << 8) | raw
[0]);
1166 fraction
[1] = (((raw
[7] & 0x7f) << 24) | (raw
[6] << 16)
1167 | (raw
[5] << 8) | raw
[4]);
1169 if (exponent
== 0x7fff)
1174 else if (exponent
== 0x0000)
1176 if (fraction
[0] == 0x0000 && fraction
[1] == 0x0000 && !integer
)
1202 /* Prepare the FPU stack in REGCACHE for a function return. */
1205 i387_return_value (struct gdbarch
*gdbarch
, struct regcache
*regcache
)
1207 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1210 /* Set the top of the floating-point register stack to 7. The
1211 actual value doesn't really matter, but 7 is what a normal
1212 function return would end up with if the program started out with
1213 a freshly initialized FPU. */
1214 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
1216 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
1218 /* Mark %st(1) through %st(7) as empty. Since we set the top of the
1219 floating-point register stack to 7, the appropriate value for the
1220 tag word is 0x3fff. */
1221 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);