1 /* Target-dependent code for the IA-64 for GDB, the GNU debugger.
3 Copyright (C) 1999-2020 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "arch-utils.h"
24 #include "floatformat.h"
27 #include "reggroups.h"
29 #include "frame-base.h"
30 #include "frame-unwind.h"
31 #include "target-float.h"
34 #include "elf/common.h" /* for DT_PLTGOT value */
39 #include "ia64-tdep.h"
42 #ifdef HAVE_LIBUNWIND_IA64_H
43 #include "elf/ia64.h" /* for PT_IA_64_UNWIND value */
44 #include "ia64-libunwind-tdep.h"
46 /* Note: KERNEL_START is supposed to be an address which is not going
47 to ever contain any valid unwind info. For ia64 linux, the choice
48 of 0xc000000000000000 is fairly safe since that's uncached space.
50 We use KERNEL_START as follows: after obtaining the kernel's
51 unwind table via getunwind(), we project its unwind data into
52 address-range KERNEL_START-(KERNEL_START+ktab_size) and then
53 when ia64_access_mem() sees a memory access to this
54 address-range, we redirect it to ktab instead.
56 None of this hackery is needed with a modern kernel/libcs
57 which uses the kernel virtual DSO to provide access to the
58 kernel's unwind info. In that case, ktab_size remains 0 and
59 hence the value of KERNEL_START doesn't matter. */
61 #define KERNEL_START 0xc000000000000000ULL
63 static size_t ktab_size
= 0;
64 struct ia64_table_entry
66 uint64_t start_offset
;
71 static struct ia64_table_entry
*ktab
= NULL
;
72 static gdb::optional
<gdb::byte_vector
> ktab_buf
;
76 /* An enumeration of the different IA-64 instruction types. */
78 typedef enum instruction_type
80 A
, /* Integer ALU ; I-unit or M-unit */
81 I
, /* Non-ALU integer; I-unit */
82 M
, /* Memory ; M-unit */
83 F
, /* Floating-point ; F-unit */
84 B
, /* Branch ; B-unit */
85 L
, /* Extended (L+X) ; I-unit */
86 X
, /* Extended (L+X) ; I-unit */
87 undefined
/* undefined or reserved */
90 /* We represent IA-64 PC addresses as the value of the instruction
91 pointer or'd with some bit combination in the low nibble which
92 represents the slot number in the bundle addressed by the
93 instruction pointer. The problem is that the Linux kernel
94 multiplies its slot numbers (for exceptions) by one while the
95 disassembler multiplies its slot numbers by 6. In addition, I've
96 heard it said that the simulator uses 1 as the multiplier.
98 I've fixed the disassembler so that the bytes_per_line field will
99 be the slot multiplier. If bytes_per_line comes in as zero, it
100 is set to six (which is how it was set up initially). -- objdump
101 displays pretty disassembly dumps with this value. For our purposes,
102 we'll set bytes_per_line to SLOT_MULTIPLIER. This is okay since we
103 never want to also display the raw bytes the way objdump does. */
105 #define SLOT_MULTIPLIER 1
107 /* Length in bytes of an instruction bundle. */
109 #define BUNDLE_LEN 16
111 /* See the saved memory layout comment for ia64_memory_insert_breakpoint. */
113 #if BREAKPOINT_MAX < BUNDLE_LEN - 2
114 # error "BREAKPOINT_MAX < BUNDLE_LEN - 2"
117 static gdbarch_init_ftype ia64_gdbarch_init
;
119 static gdbarch_register_name_ftype ia64_register_name
;
120 static gdbarch_register_type_ftype ia64_register_type
;
121 static gdbarch_breakpoint_from_pc_ftype ia64_breakpoint_from_pc
;
122 static gdbarch_skip_prologue_ftype ia64_skip_prologue
;
123 static struct type
*is_float_or_hfa_type (struct type
*t
);
124 static CORE_ADDR
ia64_find_global_pointer (struct gdbarch
*gdbarch
,
127 #define NUM_IA64_RAW_REGS 462
129 /* Big enough to hold a FP register in bytes. */
130 #define IA64_FP_REGISTER_SIZE 16
132 static int sp_regnum
= IA64_GR12_REGNUM
;
134 /* NOTE: we treat the register stack registers r32-r127 as
135 pseudo-registers because they may not be accessible via the ptrace
136 register get/set interfaces. */
138 enum pseudo_regs
{ FIRST_PSEUDO_REGNUM
= NUM_IA64_RAW_REGS
,
139 VBOF_REGNUM
= IA64_NAT127_REGNUM
+ 1, V32_REGNUM
,
140 V127_REGNUM
= V32_REGNUM
+ 95,
141 VP0_REGNUM
, VP16_REGNUM
= VP0_REGNUM
+ 16,
142 VP63_REGNUM
= VP0_REGNUM
+ 63, LAST_PSEUDO_REGNUM
};
144 /* Array of register names; There should be ia64_num_regs strings in
147 static const char *ia64_register_names
[] =
148 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
149 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
150 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
151 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
152 "", "", "", "", "", "", "", "",
153 "", "", "", "", "", "", "", "",
154 "", "", "", "", "", "", "", "",
155 "", "", "", "", "", "", "", "",
156 "", "", "", "", "", "", "", "",
157 "", "", "", "", "", "", "", "",
158 "", "", "", "", "", "", "", "",
159 "", "", "", "", "", "", "", "",
160 "", "", "", "", "", "", "", "",
161 "", "", "", "", "", "", "", "",
162 "", "", "", "", "", "", "", "",
163 "", "", "", "", "", "", "", "",
165 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
166 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
167 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
168 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
169 "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
170 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
171 "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
172 "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
173 "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71",
174 "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79",
175 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87",
176 "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95",
177 "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103",
178 "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111",
179 "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119",
180 "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127",
182 "", "", "", "", "", "", "", "",
183 "", "", "", "", "", "", "", "",
184 "", "", "", "", "", "", "", "",
185 "", "", "", "", "", "", "", "",
186 "", "", "", "", "", "", "", "",
187 "", "", "", "", "", "", "", "",
188 "", "", "", "", "", "", "", "",
189 "", "", "", "", "", "", "", "",
191 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7",
195 "pr", "ip", "psr", "cfm",
197 "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7",
198 "", "", "", "", "", "", "", "",
199 "rsc", "bsp", "bspstore", "rnat",
201 "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "",
202 "ccv", "", "", "", "unat", "", "", "",
203 "fpsr", "", "", "", "itc",
204 "", "", "", "", "", "", "", "", "", "",
205 "", "", "", "", "", "", "", "", "",
207 "", "", "", "", "", "", "", "", "", "",
208 "", "", "", "", "", "", "", "", "", "",
209 "", "", "", "", "", "", "", "", "", "",
210 "", "", "", "", "", "", "", "", "", "",
211 "", "", "", "", "", "", "", "", "", "",
212 "", "", "", "", "", "", "", "", "", "",
214 "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7",
215 "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15",
216 "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23",
217 "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31",
218 "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39",
219 "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47",
220 "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55",
221 "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63",
222 "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71",
223 "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79",
224 "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87",
225 "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95",
226 "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103",
227 "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111",
228 "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119",
229 "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127",
233 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",
234 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",
235 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",
236 "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",
237 "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71",
238 "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79",
239 "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87",
240 "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95",
241 "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103",
242 "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111",
243 "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119",
244 "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127",
246 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7",
247 "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",
248 "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23",
249 "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31",
250 "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39",
251 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47",
252 "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55",
253 "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63",
256 struct ia64_frame_cache
258 CORE_ADDR base
; /* frame pointer base for frame */
259 CORE_ADDR pc
; /* function start pc for frame */
260 CORE_ADDR saved_sp
; /* stack pointer for frame */
261 CORE_ADDR bsp
; /* points at r32 for the current frame */
262 CORE_ADDR cfm
; /* cfm value for current frame */
263 CORE_ADDR prev_cfm
; /* cfm value for previous frame */
265 int sof
; /* Size of frame (decoded from cfm value). */
266 int sol
; /* Size of locals (decoded from cfm value). */
267 int sor
; /* Number of rotating registers (decoded from
269 CORE_ADDR after_prologue
;
270 /* Address of first instruction after the last
271 prologue instruction; Note that there may
272 be instructions from the function's body
273 intermingled with the prologue. */
274 int mem_stack_frame_size
;
275 /* Size of the memory stack frame (may be zero),
276 or -1 if it has not been determined yet. */
277 int fp_reg
; /* Register number (if any) used a frame pointer
278 for this frame. 0 if no register is being used
279 as the frame pointer. */
281 /* Saved registers. */
282 CORE_ADDR saved_regs
[NUM_IA64_RAW_REGS
];
287 floatformat_valid (const struct floatformat
*fmt
, const void *from
)
292 static const struct floatformat floatformat_ia64_ext_little
=
294 floatformat_little
, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64,
295 floatformat_intbit_yes
, "floatformat_ia64_ext_little", floatformat_valid
, NULL
298 static const struct floatformat floatformat_ia64_ext_big
=
300 floatformat_big
, 82, 46, 47, 17, 65535, 0x1ffff, 64, 64,
301 floatformat_intbit_yes
, "floatformat_ia64_ext_big", floatformat_valid
304 static const struct floatformat
*floatformats_ia64_ext
[2] =
306 &floatformat_ia64_ext_big
,
307 &floatformat_ia64_ext_little
311 ia64_ext_type (struct gdbarch
*gdbarch
)
313 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
315 if (!tdep
->ia64_ext_type
)
317 = arch_float_type (gdbarch
, 128, "builtin_type_ia64_ext",
318 floatformats_ia64_ext
);
320 return tdep
->ia64_ext_type
;
324 ia64_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
325 struct reggroup
*group
)
330 if (group
== all_reggroup
)
332 vector_p
= register_type (gdbarch
, regnum
)->is_vector ();
333 float_p
= register_type (gdbarch
, regnum
)->code () == TYPE_CODE_FLT
;
334 raw_p
= regnum
< NUM_IA64_RAW_REGS
;
335 if (group
== float_reggroup
)
337 if (group
== vector_reggroup
)
339 if (group
== general_reggroup
)
340 return (!vector_p
&& !float_p
);
341 if (group
== save_reggroup
|| group
== restore_reggroup
)
347 ia64_register_name (struct gdbarch
*gdbarch
, int reg
)
349 return ia64_register_names
[reg
];
353 ia64_register_type (struct gdbarch
*arch
, int reg
)
355 if (reg
>= IA64_FR0_REGNUM
&& reg
<= IA64_FR127_REGNUM
)
356 return ia64_ext_type (arch
);
358 return builtin_type (arch
)->builtin_long
;
362 ia64_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
364 if (reg
>= IA64_GR32_REGNUM
&& reg
<= IA64_GR127_REGNUM
)
365 return V32_REGNUM
+ (reg
- IA64_GR32_REGNUM
);
370 /* Extract ``len'' bits from an instruction bundle starting at
374 extract_bit_field (const gdb_byte
*bundle
, int from
, int len
)
376 long long result
= 0LL;
378 int from_byte
= from
/ 8;
379 int to_byte
= to
/ 8;
380 unsigned char *b
= (unsigned char *) bundle
;
386 if (from_byte
== to_byte
)
387 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
388 result
= c
>> (from
% 8);
389 lshift
= 8 - (from
% 8);
391 for (i
= from_byte
+1; i
< to_byte
; i
++)
393 result
|= ((long long) b
[i
]) << lshift
;
397 if (from_byte
< to_byte
&& (to
% 8 != 0))
400 c
= ((unsigned char) (c
<< (8 - to
% 8))) >> (8 - to
% 8);
401 result
|= ((long long) c
) << lshift
;
407 /* Replace the specified bits in an instruction bundle. */
410 replace_bit_field (gdb_byte
*bundle
, long long val
, int from
, int len
)
413 int from_byte
= from
/ 8;
414 int to_byte
= to
/ 8;
415 unsigned char *b
= (unsigned char *) bundle
;
418 if (from_byte
== to_byte
)
420 unsigned char left
, right
;
422 left
= (c
>> (to
% 8)) << (to
% 8);
423 right
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
424 c
= (unsigned char) (val
& 0xff);
425 c
= (unsigned char) (c
<< (from
% 8 + 8 - to
% 8)) >> (8 - to
% 8);
433 c
= ((unsigned char) (c
<< (8 - from
% 8))) >> (8 - from
% 8);
434 c
= c
| (val
<< (from
% 8));
436 val
>>= 8 - from
% 8;
438 for (i
= from_byte
+1; i
< to_byte
; i
++)
447 unsigned char cv
= (unsigned char) val
;
449 c
= c
>> (to
% 8) << (to
% 8);
450 c
|= ((unsigned char) (cv
<< (8 - to
% 8))) >> (8 - to
% 8);
456 /* Return the contents of slot N (for N = 0, 1, or 2) in
457 and instruction bundle. */
460 slotN_contents (gdb_byte
*bundle
, int slotnum
)
462 return extract_bit_field (bundle
, 5+41*slotnum
, 41);
465 /* Store an instruction in an instruction bundle. */
468 replace_slotN_contents (gdb_byte
*bundle
, long long instr
, int slotnum
)
470 replace_bit_field (bundle
, instr
, 5+41*slotnum
, 41);
473 static const enum instruction_type template_encoding_table
[32][3] =
475 { M
, I
, I
}, /* 00 */
476 { M
, I
, I
}, /* 01 */
477 { M
, I
, I
}, /* 02 */
478 { M
, I
, I
}, /* 03 */
479 { M
, L
, X
}, /* 04 */
480 { M
, L
, X
}, /* 05 */
481 { undefined
, undefined
, undefined
}, /* 06 */
482 { undefined
, undefined
, undefined
}, /* 07 */
483 { M
, M
, I
}, /* 08 */
484 { M
, M
, I
}, /* 09 */
485 { M
, M
, I
}, /* 0A */
486 { M
, M
, I
}, /* 0B */
487 { M
, F
, I
}, /* 0C */
488 { M
, F
, I
}, /* 0D */
489 { M
, M
, F
}, /* 0E */
490 { M
, M
, F
}, /* 0F */
491 { M
, I
, B
}, /* 10 */
492 { M
, I
, B
}, /* 11 */
493 { M
, B
, B
}, /* 12 */
494 { M
, B
, B
}, /* 13 */
495 { undefined
, undefined
, undefined
}, /* 14 */
496 { undefined
, undefined
, undefined
}, /* 15 */
497 { B
, B
, B
}, /* 16 */
498 { B
, B
, B
}, /* 17 */
499 { M
, M
, B
}, /* 18 */
500 { M
, M
, B
}, /* 19 */
501 { undefined
, undefined
, undefined
}, /* 1A */
502 { undefined
, undefined
, undefined
}, /* 1B */
503 { M
, F
, B
}, /* 1C */
504 { M
, F
, B
}, /* 1D */
505 { undefined
, undefined
, undefined
}, /* 1E */
506 { undefined
, undefined
, undefined
}, /* 1F */
509 /* Fetch and (partially) decode an instruction at ADDR and return the
510 address of the next instruction to fetch. */
513 fetch_instruction (CORE_ADDR addr
, instruction_type
*it
, long long *instr
)
515 gdb_byte bundle
[BUNDLE_LEN
];
516 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
;
520 /* Warn about slot numbers greater than 2. We used to generate
521 an error here on the assumption that the user entered an invalid
522 address. But, sometimes GDB itself requests an invalid address.
523 This can (easily) happen when execution stops in a function for
524 which there are no symbols. The prologue scanner will attempt to
525 find the beginning of the function - if the nearest symbol
526 happens to not be aligned on a bundle boundary (16 bytes), the
527 resulting starting address will cause GDB to think that the slot
530 So we warn about it and set the slot number to zero. It is
531 not necessarily a fatal condition, particularly if debugging
532 at the assembly language level. */
535 warning (_("Can't fetch instructions for slot numbers greater than 2.\n"
536 "Using slot 0 instead"));
542 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
547 *instr
= slotN_contents (bundle
, slotnum
);
548 templ
= extract_bit_field (bundle
, 0, 5);
549 *it
= template_encoding_table
[(int)templ
][slotnum
];
551 if (slotnum
== 2 || (slotnum
== 1 && *it
== L
))
554 addr
+= (slotnum
+ 1) * SLOT_MULTIPLIER
;
559 /* There are 5 different break instructions (break.i, break.b,
560 break.m, break.f, and break.x), but they all have the same
561 encoding. (The five bit template in the low five bits of the
562 instruction bundle distinguishes one from another.)
564 The runtime architecture manual specifies that break instructions
565 used for debugging purposes must have the upper two bits of the 21
566 bit immediate set to a 0 and a 1 respectively. A breakpoint
567 instruction encodes the most significant bit of its 21 bit
568 immediate at bit 36 of the 41 bit instruction. The penultimate msb
569 is at bit 25 which leads to the pattern below.
571 Originally, I had this set up to do, e.g, a "break.i 0x80000" But
572 it turns out that 0x80000 was used as the syscall break in the early
573 simulators. So I changed the pattern slightly to do "break.i 0x080001"
574 instead. But that didn't work either (I later found out that this
575 pattern was used by the simulator that I was using.) So I ended up
576 using the pattern seen below.
578 SHADOW_CONTENTS has byte-based addressing (PLACED_ADDRESS and SHADOW_LEN)
579 while we need bit-based addressing as the instructions length is 41 bits and
580 we must not modify/corrupt the adjacent slots in the same bundle.
581 Fortunately we may store larger memory incl. the adjacent bits with the
582 original memory content (not the possibly already stored breakpoints there).
583 We need to be careful in ia64_memory_remove_breakpoint to always restore
584 only the specific bits of this instruction ignoring any adjacent stored
587 We use the original addressing with the low nibble in the range <0..2> which
588 gets incorrectly interpreted by generic non-ia64 breakpoint_restore_shadows
589 as the direct byte offset of SHADOW_CONTENTS. We store whole BUNDLE_LEN
590 bytes just without these two possibly skipped bytes to not to exceed to the
593 If we would like to store the whole bundle to SHADOW_CONTENTS we would have
594 to store already the base address (`address & ~0x0f') into PLACED_ADDRESS.
595 In such case there is no other place where to store
596 SLOTNUM (`adress & 0x0f', value in the range <0..2>). We need to know
597 SLOTNUM in ia64_memory_remove_breakpoint.
599 There is one special case where we need to be extra careful:
600 L-X instructions, which are instructions that occupy 2 slots
601 (The L part is always in slot 1, and the X part is always in
602 slot 2). We must refuse to insert breakpoints for an address
603 that points at slot 2 of a bundle where an L-X instruction is
604 present, since there is logically no instruction at that address.
605 However, to make things more interesting, the opcode of L-X
606 instructions is located in slot 2. This means that, to insert
607 a breakpoint at an address that points to slot 1, we actually
608 need to write the breakpoint in slot 2! Slot 1 is actually
609 the extended operand, so writing the breakpoint there would not
610 have the desired effect. Another side-effect of this issue
611 is that we need to make sure that the shadow contents buffer
612 does save byte 15 of our instruction bundle (this is the tail
613 end of slot 2, which wouldn't be saved if we were to insert
614 the breakpoint in slot 1).
616 ia64 16-byte bundle layout:
617 | 5 bits | slot 0 with 41 bits | slot 1 with 41 bits | slot 2 with 41 bits |
619 The current addressing used by the code below:
620 original PC placed_address placed_size required covered
621 == bp_tgt->shadow_len reqd \subset covered
622 0xABCDE0 0xABCDE0 0x10 <0x0...0x5> <0x0..0xF>
623 0xABCDE1 0xABCDE1 0xF <0x5...0xA> <0x1..0xF>
624 0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF>
626 L-X instructions are treated a little specially, as explained above:
627 0xABCDE1 0xABCDE1 0xF <0xA...0xF> <0x1..0xF>
629 `objdump -d' and some other tools show a bit unjustified offsets:
630 original PC byte where starts the instruction objdump offset
631 0xABCDE0 0xABCDE0 0xABCDE0
632 0xABCDE1 0xABCDE5 0xABCDE6
633 0xABCDE2 0xABCDEA 0xABCDEC
636 #define IA64_BREAKPOINT 0x00003333300LL
639 ia64_memory_insert_breakpoint (struct gdbarch
*gdbarch
,
640 struct bp_target_info
*bp_tgt
)
642 CORE_ADDR addr
= bp_tgt
->placed_address
= bp_tgt
->reqstd_address
;
643 gdb_byte bundle
[BUNDLE_LEN
];
644 int slotnum
= (int) (addr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
645 long long instr_breakpoint
;
650 error (_("Can't insert breakpoint for slot numbers greater than 2."));
654 /* Enable the automatic memory restoration from breakpoints while
655 we read our instruction bundle for the purpose of SHADOW_CONTENTS.
656 Otherwise, we could possibly store into the shadow parts of the adjacent
657 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
658 breakpoint instruction bits region. */
659 scoped_restore restore_memory_0
660 = make_scoped_restore_show_memory_breakpoints (0);
661 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
665 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
666 for addressing the SHADOW_CONTENTS placement. */
667 shadow_slotnum
= slotnum
;
669 /* Always cover the last byte of the bundle in case we are inserting
670 a breakpoint on an L-X instruction. */
671 bp_tgt
->shadow_len
= BUNDLE_LEN
- shadow_slotnum
;
673 templ
= extract_bit_field (bundle
, 0, 5);
674 if (template_encoding_table
[templ
][slotnum
] == X
)
676 /* X unit types can only be used in slot 2, and are actually
677 part of a 2-slot L-X instruction. We cannot break at this
678 address, as this is the second half of an instruction that
679 lives in slot 1 of that bundle. */
680 gdb_assert (slotnum
== 2);
681 error (_("Can't insert breakpoint for non-existing slot X"));
683 if (template_encoding_table
[templ
][slotnum
] == L
)
685 /* L unit types can only be used in slot 1. But the associated
686 opcode for that instruction is in slot 2, so bump the slot number
688 gdb_assert (slotnum
== 1);
692 /* Store the whole bundle, except for the initial skipped bytes by the slot
693 number interpreted as bytes offset in PLACED_ADDRESS. */
694 memcpy (bp_tgt
->shadow_contents
, bundle
+ shadow_slotnum
,
697 /* Re-read the same bundle as above except that, this time, read it in order
698 to compute the new bundle inside which we will be inserting the
699 breakpoint. Therefore, disable the automatic memory restoration from
700 breakpoints while we read our instruction bundle. Otherwise, the general
701 restoration mechanism kicks in and we would possibly remove parts of the
702 adjacent placed breakpoints. It is due to our SHADOW_CONTENTS overlapping
703 the real breakpoint instruction bits region. */
704 scoped_restore restore_memory_1
705 = make_scoped_restore_show_memory_breakpoints (1);
706 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
710 /* Breakpoints already present in the code will get detected and not get
711 reinserted by bp_loc_is_permanent. Multiple breakpoints at the same
712 location cannot induce the internal error as they are optimized into
713 a single instance by update_global_location_list. */
714 instr_breakpoint
= slotN_contents (bundle
, slotnum
);
715 if (instr_breakpoint
== IA64_BREAKPOINT
)
716 internal_error (__FILE__
, __LINE__
,
717 _("Address %s already contains a breakpoint."),
718 paddress (gdbarch
, bp_tgt
->placed_address
));
719 replace_slotN_contents (bundle
, IA64_BREAKPOINT
, slotnum
);
721 val
= target_write_memory (addr
+ shadow_slotnum
, bundle
+ shadow_slotnum
,
728 ia64_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
729 struct bp_target_info
*bp_tgt
)
731 CORE_ADDR addr
= bp_tgt
->placed_address
;
732 gdb_byte bundle_mem
[BUNDLE_LEN
], bundle_saved
[BUNDLE_LEN
];
733 int slotnum
= (addr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
734 long long instr_breakpoint
, instr_saved
;
740 /* Disable the automatic memory restoration from breakpoints while
741 we read our instruction bundle. Otherwise, the general restoration
742 mechanism kicks in and we would possibly remove parts of the adjacent
743 placed breakpoints. It is due to our SHADOW_CONTENTS overlapping the real
744 breakpoint instruction bits region. */
745 scoped_restore restore_memory_1
746 = make_scoped_restore_show_memory_breakpoints (1);
747 val
= target_read_memory (addr
, bundle_mem
, BUNDLE_LEN
);
751 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
752 for addressing the SHADOW_CONTENTS placement. */
753 shadow_slotnum
= slotnum
;
755 templ
= extract_bit_field (bundle_mem
, 0, 5);
756 if (template_encoding_table
[templ
][slotnum
] == X
)
758 /* X unit types can only be used in slot 2, and are actually
759 part of a 2-slot L-X instruction. We refuse to insert
760 breakpoints at this address, so there should be no reason
761 for us attempting to remove one there, except if the program's
762 code somehow got modified in memory. */
763 gdb_assert (slotnum
== 2);
764 warning (_("Cannot remove breakpoint at address %s from non-existing "
765 "X-type slot, memory has changed underneath"),
766 paddress (gdbarch
, bp_tgt
->placed_address
));
769 if (template_encoding_table
[templ
][slotnum
] == L
)
771 /* L unit types can only be used in slot 1. But the breakpoint
772 was actually saved using slot 2, so update the slot number
774 gdb_assert (slotnum
== 1);
778 gdb_assert (bp_tgt
->shadow_len
== BUNDLE_LEN
- shadow_slotnum
);
780 instr_breakpoint
= slotN_contents (bundle_mem
, slotnum
);
781 if (instr_breakpoint
!= IA64_BREAKPOINT
)
783 warning (_("Cannot remove breakpoint at address %s, "
784 "no break instruction at such address."),
785 paddress (gdbarch
, bp_tgt
->placed_address
));
789 /* Extract the original saved instruction from SLOTNUM normalizing its
790 bit-shift for INSTR_SAVED. */
791 memcpy (bundle_saved
, bundle_mem
, BUNDLE_LEN
);
792 memcpy (bundle_saved
+ shadow_slotnum
, bp_tgt
->shadow_contents
,
794 instr_saved
= slotN_contents (bundle_saved
, slotnum
);
796 /* In BUNDLE_MEM, be careful to modify only the bits belonging to SLOTNUM
797 and not any of the other ones that are stored in SHADOW_CONTENTS. */
798 replace_slotN_contents (bundle_mem
, instr_saved
, slotnum
);
799 val
= target_write_raw_memory (addr
, bundle_mem
, BUNDLE_LEN
);
804 /* Implement the breakpoint_kind_from_pc gdbarch method. */
807 ia64_breakpoint_kind_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pcptr
)
809 /* A place holder of gdbarch method breakpoint_kind_from_pc. */
813 /* As gdbarch_breakpoint_from_pc ranges have byte granularity and ia64
814 instruction slots ranges are bit-granular (41 bits) we have to provide an
815 extended range as described for ia64_memory_insert_breakpoint. We also take
816 care of preserving the `break' instruction 21-bit (or 62-bit) parameter to
817 make a match for permanent breakpoints. */
819 static const gdb_byte
*
820 ia64_breakpoint_from_pc (struct gdbarch
*gdbarch
,
821 CORE_ADDR
*pcptr
, int *lenptr
)
823 CORE_ADDR addr
= *pcptr
;
824 static gdb_byte bundle
[BUNDLE_LEN
];
825 int slotnum
= (int) (*pcptr
& 0x0f) / SLOT_MULTIPLIER
, shadow_slotnum
;
826 long long instr_fetched
;
831 error (_("Can't insert breakpoint for slot numbers greater than 2."));
835 /* Enable the automatic memory restoration from breakpoints while
836 we read our instruction bundle to match bp_loc_is_permanent. */
838 scoped_restore restore_memory_0
839 = make_scoped_restore_show_memory_breakpoints (0);
840 val
= target_read_memory (addr
, bundle
, BUNDLE_LEN
);
843 /* The memory might be unreachable. This can happen, for instance,
844 when the user inserts a breakpoint at an invalid address. */
848 /* SHADOW_SLOTNUM saves the original slot number as expected by the caller
849 for addressing the SHADOW_CONTENTS placement. */
850 shadow_slotnum
= slotnum
;
852 /* Cover always the last byte of the bundle for the L-X slot case. */
853 *lenptr
= BUNDLE_LEN
- shadow_slotnum
;
855 /* Check for L type instruction in slot 1, if present then bump up the slot
856 number to the slot 2. */
857 templ
= extract_bit_field (bundle
, 0, 5);
858 if (template_encoding_table
[templ
][slotnum
] == X
)
860 gdb_assert (slotnum
== 2);
861 error (_("Can't insert breakpoint for non-existing slot X"));
863 if (template_encoding_table
[templ
][slotnum
] == L
)
865 gdb_assert (slotnum
== 1);
869 /* A break instruction has its all its opcode bits cleared except for
870 the parameter value. For L+X slot pair we are at the X slot (slot 2) so
871 we should not touch the L slot - the upper 41 bits of the parameter. */
872 instr_fetched
= slotN_contents (bundle
, slotnum
);
873 instr_fetched
&= 0x1003ffffc0LL
;
874 replace_slotN_contents (bundle
, instr_fetched
, slotnum
);
876 return bundle
+ shadow_slotnum
;
880 ia64_read_pc (readable_regcache
*regcache
)
882 ULONGEST psr_value
, pc_value
;
885 regcache
->cooked_read (IA64_PSR_REGNUM
, &psr_value
);
886 regcache
->cooked_read (IA64_IP_REGNUM
, &pc_value
);
887 slot_num
= (psr_value
>> 41) & 3;
889 return pc_value
| (slot_num
* SLOT_MULTIPLIER
);
893 ia64_write_pc (struct regcache
*regcache
, CORE_ADDR new_pc
)
895 int slot_num
= (int) (new_pc
& 0xf) / SLOT_MULTIPLIER
;
898 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr_value
);
899 psr_value
&= ~(3LL << 41);
900 psr_value
|= (ULONGEST
)(slot_num
& 0x3) << 41;
904 regcache_cooked_write_unsigned (regcache
, IA64_PSR_REGNUM
, psr_value
);
905 regcache_cooked_write_unsigned (regcache
, IA64_IP_REGNUM
, new_pc
);
908 #define IS_NaT_COLLECTION_ADDR(addr) ((((addr) >> 3) & 0x3f) == 0x3f)
910 /* Returns the address of the slot that's NSLOTS slots away from
911 the address ADDR. NSLOTS may be positive or negative. */
913 rse_address_add(CORE_ADDR addr
, int nslots
)
916 int mandatory_nat_slots
= nslots
/ 63;
917 int direction
= nslots
< 0 ? -1 : 1;
919 new_addr
= addr
+ 8 * (nslots
+ mandatory_nat_slots
);
921 if ((new_addr
>> 9) != ((addr
+ 8 * 64 * mandatory_nat_slots
) >> 9))
922 new_addr
+= 8 * direction
;
924 if (IS_NaT_COLLECTION_ADDR(new_addr
))
925 new_addr
+= 8 * direction
;
930 static enum register_status
931 ia64_pseudo_register_read (struct gdbarch
*gdbarch
, readable_regcache
*regcache
,
932 int regnum
, gdb_byte
*buf
)
934 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
935 enum register_status status
;
937 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
939 #ifdef HAVE_LIBUNWIND_IA64_H
940 /* First try and use the libunwind special reg accessor,
941 otherwise fallback to standard logic. */
942 if (!libunwind_is_initialized ()
943 || libunwind_get_reg_special (gdbarch
, regcache
, regnum
, buf
) != 0)
946 /* The fallback position is to assume that r32-r127 are
947 found sequentially in memory starting at $bof. This
948 isn't always true, but without libunwind, this is the
954 status
= regcache
->cooked_read (IA64_BSP_REGNUM
, &bsp
);
955 if (status
!= REG_VALID
)
958 status
= regcache
->cooked_read (IA64_CFM_REGNUM
, &cfm
);
959 if (status
!= REG_VALID
)
962 /* The bsp points at the end of the register frame so we
963 subtract the size of frame from it to get start of
965 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
967 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
969 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
970 reg
= read_memory_integer ((CORE_ADDR
)reg_addr
, 8, byte_order
);
971 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
975 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
979 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
984 status
= regcache
->cooked_read (IA64_UNAT_REGNUM
, &unat
);
985 if (status
!= REG_VALID
)
987 unatN_val
= (unat
& (1LL << (regnum
- IA64_NAT0_REGNUM
))) != 0;
988 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
989 byte_order
, unatN_val
);
991 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
993 ULONGEST natN_val
= 0;
996 CORE_ADDR gr_addr
= 0;
998 status
= regcache
->cooked_read (IA64_BSP_REGNUM
, &bsp
);
999 if (status
!= REG_VALID
)
1002 status
= regcache
->cooked_read (IA64_CFM_REGNUM
, &cfm
);
1003 if (status
!= REG_VALID
)
1006 /* The bsp points at the end of the register frame so we
1007 subtract the size of frame from it to get start of register frame. */
1008 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1010 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1011 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1015 /* Compute address of nat collection bits. */
1016 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1017 ULONGEST nat_collection
;
1019 /* If our nat collection address is bigger than bsp, we have to get
1020 the nat collection from rnat. Otherwise, we fetch the nat
1021 collection from the computed address. */
1022 if (nat_addr
>= bsp
)
1023 regcache
->cooked_read (IA64_RNAT_REGNUM
, &nat_collection
);
1025 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
1026 nat_bit
= (gr_addr
>> 3) & 0x3f;
1027 natN_val
= (nat_collection
>> nat_bit
) & 1;
1030 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1031 byte_order
, natN_val
);
1033 else if (regnum
== VBOF_REGNUM
)
1035 /* A virtual register frame start is provided for user convenience.
1036 It can be calculated as the bsp - sof (sizeof frame). */
1040 status
= regcache
->cooked_read (IA64_BSP_REGNUM
, &bsp
);
1041 if (status
!= REG_VALID
)
1043 status
= regcache
->cooked_read (IA64_CFM_REGNUM
, &cfm
);
1044 if (status
!= REG_VALID
)
1047 /* The bsp points at the end of the register frame so we
1048 subtract the size of frame from it to get beginning of frame. */
1049 vbsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1050 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1053 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1059 status
= regcache
->cooked_read (IA64_PR_REGNUM
, &pr
);
1060 if (status
!= REG_VALID
)
1062 status
= regcache
->cooked_read (IA64_CFM_REGNUM
, &cfm
);
1063 if (status
!= REG_VALID
)
1066 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1068 /* Fetch predicate register rename base from current frame
1069 marker for this frame. */
1070 int rrb_pr
= (cfm
>> 32) & 0x3f;
1072 /* Adjust the register number to account for register rotation. */
1073 regnum
= VP16_REGNUM
1074 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1076 prN_val
= (pr
& (1LL << (regnum
- VP0_REGNUM
))) != 0;
1077 store_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1078 byte_order
, prN_val
);
1081 memset (buf
, 0, register_size (gdbarch
, regnum
));
1087 ia64_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1088 int regnum
, const gdb_byte
*buf
)
1090 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1092 if (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
)
1096 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1097 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1099 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1101 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1103 ULONGEST reg_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1104 write_memory (reg_addr
, buf
, 8);
1107 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1109 ULONGEST unatN_val
, unat
, unatN_mask
;
1110 regcache_cooked_read_unsigned (regcache
, IA64_UNAT_REGNUM
, &unat
);
1111 unatN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
,
1114 unatN_mask
= (1LL << (regnum
- IA64_NAT0_REGNUM
));
1116 unat
&= ~unatN_mask
;
1117 else if (unatN_val
== 1)
1119 regcache_cooked_write_unsigned (regcache
, IA64_UNAT_REGNUM
, unat
);
1121 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
1126 CORE_ADDR gr_addr
= 0;
1127 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
1128 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1130 /* The bsp points at the end of the register frame so we
1131 subtract the size of frame from it to get start of register frame. */
1132 bsp
= rse_address_add (bsp
, -(cfm
& 0x7f));
1134 if ((cfm
& 0x7f) > regnum
- V32_REGNUM
)
1135 gr_addr
= rse_address_add (bsp
, (regnum
- V32_REGNUM
));
1137 natN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
,
1141 if (gr_addr
!= 0 && (natN_val
== 0 || natN_val
== 1))
1143 /* Compute address of nat collection bits. */
1144 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
1145 CORE_ADDR nat_collection
;
1146 int natN_bit
= (gr_addr
>> 3) & 0x3f;
1147 ULONGEST natN_mask
= (1LL << natN_bit
);
1148 /* If our nat collection address is bigger than bsp, we have to get
1149 the nat collection from rnat. Otherwise, we fetch the nat
1150 collection from the computed address. */
1151 if (nat_addr
>= bsp
)
1153 regcache_cooked_read_unsigned (regcache
,
1157 nat_collection
|= natN_mask
;
1159 nat_collection
&= ~natN_mask
;
1160 regcache_cooked_write_unsigned (regcache
, IA64_RNAT_REGNUM
,
1165 gdb_byte nat_buf
[8];
1166 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
1168 nat_collection
|= natN_mask
;
1170 nat_collection
&= ~natN_mask
;
1171 store_unsigned_integer (nat_buf
, register_size (gdbarch
, regnum
),
1172 byte_order
, nat_collection
);
1173 write_memory (nat_addr
, nat_buf
, 8);
1177 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1184 regcache_cooked_read_unsigned (regcache
, IA64_PR_REGNUM
, &pr
);
1185 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
1187 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1189 /* Fetch predicate register rename base from current frame
1190 marker for this frame. */
1191 int rrb_pr
= (cfm
>> 32) & 0x3f;
1193 /* Adjust the register number to account for register rotation. */
1194 regnum
= VP16_REGNUM
1195 + ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1197 prN_val
= extract_unsigned_integer (buf
, register_size (gdbarch
, regnum
),
1199 prN_mask
= (1LL << (regnum
- VP0_REGNUM
));
1202 else if (prN_val
== 1)
1204 regcache_cooked_write_unsigned (regcache
, IA64_PR_REGNUM
, pr
);
1208 /* The ia64 needs to convert between various ieee floating-point formats
1209 and the special ia64 floating point register format. */
1212 ia64_convert_register_p (struct gdbarch
*gdbarch
, int regno
, struct type
*type
)
1214 return (regno
>= IA64_FR0_REGNUM
&& regno
<= IA64_FR127_REGNUM
1215 && type
->code () == TYPE_CODE_FLT
1216 && type
!= ia64_ext_type (gdbarch
));
1220 ia64_register_to_value (struct frame_info
*frame
, int regnum
,
1221 struct type
*valtype
, gdb_byte
*out
,
1222 int *optimizedp
, int *unavailablep
)
1224 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1225 gdb_byte in
[IA64_FP_REGISTER_SIZE
];
1227 /* Convert to TYPE. */
1228 if (!get_frame_register_bytes (frame
, regnum
, 0,
1229 register_size (gdbarch
, regnum
),
1230 in
, optimizedp
, unavailablep
))
1233 target_float_convert (in
, ia64_ext_type (gdbarch
), out
, valtype
);
1234 *optimizedp
= *unavailablep
= 0;
1239 ia64_value_to_register (struct frame_info
*frame
, int regnum
,
1240 struct type
*valtype
, const gdb_byte
*in
)
1242 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1243 gdb_byte out
[IA64_FP_REGISTER_SIZE
];
1244 target_float_convert (in
, valtype
, out
, ia64_ext_type (gdbarch
));
1245 put_frame_register (frame
, regnum
, out
);
1249 /* Limit the number of skipped non-prologue instructions since examining
1250 of the prologue is expensive. */
1251 static int max_skip_non_prologue_insns
= 40;
1253 /* Given PC representing the starting address of a function, and
1254 LIM_PC which is the (sloppy) limit to which to scan when looking
1255 for a prologue, attempt to further refine this limit by using
1256 the line data in the symbol table. If successful, a better guess
1257 on where the prologue ends is returned, otherwise the previous
1258 value of lim_pc is returned. TRUST_LIMIT is a pointer to a flag
1259 which will be set to indicate whether the returned limit may be
1260 used with no further scanning in the event that the function is
1263 /* FIXME: cagney/2004-02-14: This function and logic have largely been
1264 superseded by skip_prologue_using_sal. */
1267 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
, int *trust_limit
)
1269 struct symtab_and_line prologue_sal
;
1270 CORE_ADDR start_pc
= pc
;
1273 /* The prologue can not possibly go past the function end itself,
1274 so we can already adjust LIM_PC accordingly. */
1275 if (find_pc_partial_function (pc
, NULL
, NULL
, &end_pc
) && end_pc
< lim_pc
)
1278 /* Start off not trusting the limit. */
1281 prologue_sal
= find_pc_line (pc
, 0);
1282 if (prologue_sal
.line
!= 0)
1285 CORE_ADDR addr
= prologue_sal
.end
;
1287 /* Handle the case in which compiler's optimizer/scheduler
1288 has moved instructions into the prologue. We scan ahead
1289 in the function looking for address ranges whose corresponding
1290 line number is less than or equal to the first one that we
1291 found for the function. (It can be less than when the
1292 scheduler puts a body instruction before the first prologue
1294 for (i
= 2 * max_skip_non_prologue_insns
;
1295 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
1298 struct symtab_and_line sal
;
1300 sal
= find_pc_line (addr
, 0);
1303 if (sal
.line
<= prologue_sal
.line
1304 && sal
.symtab
== prologue_sal
.symtab
)
1311 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
1313 lim_pc
= prologue_sal
.end
;
1314 if (start_pc
== get_pc_function_start (lim_pc
))
1321 #define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \
1322 || (8 <= (_regnum_) && (_regnum_) <= 11) \
1323 || (14 <= (_regnum_) && (_regnum_) <= 31))
1324 #define imm9(_instr_) \
1325 ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \
1326 | (((_instr_) & 0x00008000000LL) >> 20) \
1327 | (((_instr_) & 0x00000001fc0LL) >> 6))
1329 /* Allocate and initialize a frame cache. */
1331 static struct ia64_frame_cache
*
1332 ia64_alloc_frame_cache (void)
1334 struct ia64_frame_cache
*cache
;
1337 cache
= FRAME_OBSTACK_ZALLOC (struct ia64_frame_cache
);
1343 cache
->prev_cfm
= 0;
1349 cache
->frameless
= 1;
1351 for (i
= 0; i
< NUM_IA64_RAW_REGS
; i
++)
1352 cache
->saved_regs
[i
] = 0;
1358 examine_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
,
1359 struct frame_info
*this_frame
,
1360 struct ia64_frame_cache
*cache
)
1363 CORE_ADDR last_prologue_pc
= pc
;
1364 instruction_type it
;
1369 int unat_save_reg
= 0;
1370 int pr_save_reg
= 0;
1371 int mem_stack_frame_size
= 0;
1373 CORE_ADDR spill_addr
= 0;
1376 char reg_contents
[256];
1382 CORE_ADDR bof
, sor
, sol
, sof
, cfm
, rrb_gr
;
1384 memset (instores
, 0, sizeof instores
);
1385 memset (infpstores
, 0, sizeof infpstores
);
1386 memset (reg_contents
, 0, sizeof reg_contents
);
1388 if (cache
->after_prologue
!= 0
1389 && cache
->after_prologue
<= lim_pc
)
1390 return cache
->after_prologue
;
1392 lim_pc
= refine_prologue_limit (pc
, lim_pc
, &trust_limit
);
1393 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1395 /* We want to check if we have a recognizable function start before we
1396 look ahead for a prologue. */
1397 if (pc
< lim_pc
&& next_pc
1398 && it
== M
&& ((instr
& 0x1ee0000003fLL
) == 0x02c00000000LL
))
1400 /* alloc - start of a regular function. */
1401 int sol_bits
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1402 int sof_bits
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1403 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1405 /* Verify that the current cfm matches what we think is the
1406 function start. If we have somehow jumped within a function,
1407 we do not want to interpret the prologue and calculate the
1408 addresses of various registers such as the return address.
1409 We will instead treat the frame as frameless. */
1411 (sof_bits
== (cache
->cfm
& 0x7f) &&
1412 sol_bits
== ((cache
->cfm
>> 7) & 0x7f)))
1416 last_prologue_pc
= next_pc
;
1421 /* Look for a leaf routine. */
1422 if (pc
< lim_pc
&& next_pc
1423 && (it
== I
|| it
== M
)
1424 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1426 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1427 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1428 | ((instr
& 0x001f8000000LL
) >> 20)
1429 | ((instr
& 0x000000fe000LL
) >> 13));
1430 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1431 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1432 int qp
= (int) (instr
& 0x0000000003fLL
);
1433 if (qp
== 0 && rN
== 2 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1435 /* mov r2, r12 - beginning of leaf routine. */
1437 last_prologue_pc
= next_pc
;
1441 /* If we don't recognize a regular function or leaf routine, we are
1447 last_prologue_pc
= lim_pc
;
1451 /* Loop, looking for prologue instructions, keeping track of
1452 where preserved registers were spilled. */
1455 next_pc
= fetch_instruction (pc
, &it
, &instr
);
1459 if (it
== B
&& ((instr
& 0x1e1f800003fLL
) != 0x04000000000LL
))
1461 /* Exit loop upon hitting a non-nop branch instruction. */
1466 else if (((instr
& 0x3fLL
) != 0LL) &&
1467 (frameless
|| ret_reg
!= 0))
1469 /* Exit loop upon hitting a predicated instruction if
1470 we already have the return register or if we are frameless. */
1475 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00188000000LL
))
1478 int b2
= (int) ((instr
& 0x0000000e000LL
) >> 13);
1479 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1480 int qp
= (int) (instr
& 0x0000000003f);
1482 if (qp
== 0 && b2
== 0 && rN
>= 32 && ret_reg
== 0)
1485 last_prologue_pc
= next_pc
;
1488 else if ((it
== I
|| it
== M
)
1489 && ((instr
& 0x1ee00000000LL
) == 0x10800000000LL
))
1491 /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
1492 int imm
= (int) ((((instr
& 0x01000000000LL
) ? -1 : 0) << 13)
1493 | ((instr
& 0x001f8000000LL
) >> 20)
1494 | ((instr
& 0x000000fe000LL
) >> 13));
1495 int rM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1496 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1497 int qp
= (int) (instr
& 0x0000000003fLL
);
1499 if (qp
== 0 && rN
>= 32 && imm
== 0 && rM
== 12 && fp_reg
== 0)
1503 last_prologue_pc
= next_pc
;
1505 else if (qp
== 0 && rN
== 12 && rM
== 12)
1507 /* adds r12, -mem_stack_frame_size, r12 */
1508 mem_stack_frame_size
-= imm
;
1509 last_prologue_pc
= next_pc
;
1511 else if (qp
== 0 && rN
== 2
1512 && ((rM
== fp_reg
&& fp_reg
!= 0) || rM
== 12))
1514 CORE_ADDR saved_sp
= 0;
1515 /* adds r2, spilloffset, rFramePointer
1517 adds r2, spilloffset, r12
1519 Get ready for stf.spill or st8.spill instructions.
1520 The address to start spilling at is loaded into r2.
1521 FIXME: Why r2? That's what gcc currently uses; it
1522 could well be different for other compilers. */
1524 /* Hmm... whether or not this will work will depend on
1525 where the pc is. If it's still early in the prologue
1526 this'll be wrong. FIXME */
1528 saved_sp
= get_frame_register_unsigned (this_frame
,
1530 spill_addr
= saved_sp
1531 + (rM
== 12 ? 0 : mem_stack_frame_size
)
1534 last_prologue_pc
= next_pc
;
1536 else if (qp
== 0 && rM
>= 32 && rM
< 40 && !instores
[rM
-32] &&
1537 rN
< 256 && imm
== 0)
1539 /* mov rN, rM where rM is an input register. */
1540 reg_contents
[rN
] = rM
;
1541 last_prologue_pc
= next_pc
;
1543 else if (frameless
&& qp
== 0 && rN
== fp_reg
&& imm
== 0 &&
1547 last_prologue_pc
= next_pc
;
1552 && ( ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1553 || ((instr
& 0x1ffc8000000LL
) == 0x0cec0000000LL
) ))
1555 /* stf.spill [rN] = fM, imm9
1557 stf.spill [rN] = fM */
1559 int imm
= imm9(instr
);
1560 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1561 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1562 int qp
= (int) (instr
& 0x0000000003fLL
);
1563 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1564 && ((2 <= fM
&& fM
<= 5) || (16 <= fM
&& fM
<= 31)))
1566 cache
->saved_regs
[IA64_FR0_REGNUM
+ fM
] = spill_addr
;
1568 if ((instr
& 0x1efc0000000LL
) == 0x0eec0000000LL
)
1571 spill_addr
= 0; /* last one; must be done. */
1572 last_prologue_pc
= next_pc
;
1575 else if ((it
== M
&& ((instr
& 0x1eff8000000LL
) == 0x02110000000LL
))
1576 || (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00050000000LL
)) )
1582 int arM
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1583 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1584 int qp
= (int) (instr
& 0x0000000003fLL
);
1585 if (qp
== 0 && isScratch (rN
) && arM
== 36 /* ar.unat */)
1587 /* We have something like "mov.m r3 = ar.unat". Remember the
1588 r3 (or whatever) and watch for a store of this register... */
1590 last_prologue_pc
= next_pc
;
1593 else if (it
== I
&& ((instr
& 0x1eff8000000LL
) == 0x00198000000LL
))
1596 int rN
= (int) ((instr
& 0x00000001fc0LL
) >> 6);
1597 int qp
= (int) (instr
& 0x0000000003fLL
);
1598 if (qp
== 0 && isScratch (rN
))
1601 last_prologue_pc
= next_pc
;
1605 && ( ((instr
& 0x1ffc8000000LL
) == 0x08cc0000000LL
)
1606 || ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)))
1610 st8 [rN] = rM, imm9 */
1611 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1612 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1613 int qp
= (int) (instr
& 0x0000000003fLL
);
1614 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1615 if (qp
== 0 && rN
== spill_reg
&& spill_addr
!= 0
1616 && (rM
== unat_save_reg
|| rM
== pr_save_reg
))
1618 /* We've found a spill of either the UNAT register or the PR
1619 register. (Well, not exactly; what we've actually found is
1620 a spill of the register that UNAT or PR was moved to).
1621 Record that fact and move on... */
1622 if (rM
== unat_save_reg
)
1624 /* Track UNAT register. */
1625 cache
->saved_regs
[IA64_UNAT_REGNUM
] = spill_addr
;
1630 /* Track PR register. */
1631 cache
->saved_regs
[IA64_PR_REGNUM
] = spill_addr
;
1634 if ((instr
& 0x1efc0000000LL
) == 0x0acc0000000LL
)
1635 /* st8 [rN] = rM, imm9 */
1636 spill_addr
+= imm9(instr
);
1638 spill_addr
= 0; /* Must be done spilling. */
1639 last_prologue_pc
= next_pc
;
1641 else if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1643 /* Allow up to one store of each input register. */
1644 instores
[rM
-32] = 1;
1645 last_prologue_pc
= next_pc
;
1647 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1648 !instores
[indirect
-32])
1650 /* Allow an indirect store of an input register. */
1651 instores
[indirect
-32] = 1;
1652 last_prologue_pc
= next_pc
;
1655 else if (it
== M
&& ((instr
& 0x1ff08000000LL
) == 0x08c00000000LL
))
1662 Note that the st8 case is handled in the clause above.
1664 Advance over stores of input registers. One store per input
1665 register is permitted. */
1666 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1667 int qp
= (int) (instr
& 0x0000000003fLL
);
1668 int indirect
= rM
< 256 ? reg_contents
[rM
] : 0;
1669 if (qp
== 0 && 32 <= rM
&& rM
< 40 && !instores
[rM
-32])
1671 instores
[rM
-32] = 1;
1672 last_prologue_pc
= next_pc
;
1674 else if (qp
== 0 && 32 <= indirect
&& indirect
< 40 &&
1675 !instores
[indirect
-32])
1677 /* Allow an indirect store of an input register. */
1678 instores
[indirect
-32] = 1;
1679 last_prologue_pc
= next_pc
;
1682 else if (it
== M
&& ((instr
& 0x1ff88000000LL
) == 0x0cc80000000LL
))
1689 Advance over stores of floating point input registers. Again
1690 one store per register is permitted. */
1691 int fM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1692 int qp
= (int) (instr
& 0x0000000003fLL
);
1693 if (qp
== 0 && 8 <= fM
&& fM
< 16 && !infpstores
[fM
- 8])
1695 infpstores
[fM
-8] = 1;
1696 last_prologue_pc
= next_pc
;
1700 && ( ((instr
& 0x1ffc8000000LL
) == 0x08ec0000000LL
)
1701 || ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)))
1703 /* st8.spill [rN] = rM
1705 st8.spill [rN] = rM, imm9 */
1706 int rN
= (int) ((instr
& 0x00007f00000LL
) >> 20);
1707 int rM
= (int) ((instr
& 0x000000fe000LL
) >> 13);
1708 int qp
= (int) (instr
& 0x0000000003fLL
);
1709 if (qp
== 0 && rN
== spill_reg
&& 4 <= rM
&& rM
<= 7)
1711 /* We've found a spill of one of the preserved general purpose
1712 regs. Record the spill address and advance the spill
1713 register if appropriate. */
1714 cache
->saved_regs
[IA64_GR0_REGNUM
+ rM
] = spill_addr
;
1715 if ((instr
& 0x1efc0000000LL
) == 0x0aec0000000LL
)
1716 /* st8.spill [rN] = rM, imm9 */
1717 spill_addr
+= imm9(instr
);
1719 spill_addr
= 0; /* Done spilling. */
1720 last_prologue_pc
= next_pc
;
1727 /* If not frameless and we aren't called by skip_prologue, then we need
1728 to calculate registers for the previous frame which will be needed
1731 if (!frameless
&& this_frame
)
1733 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1734 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1736 /* Extract the size of the rotating portion of the stack
1737 frame and the register rename base from the current
1743 rrb_gr
= (cfm
>> 18) & 0x7f;
1745 /* Find the bof (beginning of frame). */
1746 bof
= rse_address_add (cache
->bsp
, -sof
);
1748 for (i
= 0, addr
= bof
;
1752 if (IS_NaT_COLLECTION_ADDR (addr
))
1756 if (i
+32 == cfm_reg
)
1757 cache
->saved_regs
[IA64_CFM_REGNUM
] = addr
;
1758 if (i
+32 == ret_reg
)
1759 cache
->saved_regs
[IA64_VRAP_REGNUM
] = addr
;
1761 cache
->saved_regs
[IA64_VFP_REGNUM
] = addr
;
1764 /* For the previous argument registers we require the previous bof.
1765 If we can't find the previous cfm, then we can do nothing. */
1767 if (cache
->saved_regs
[IA64_CFM_REGNUM
] != 0)
1769 cfm
= read_memory_integer (cache
->saved_regs
[IA64_CFM_REGNUM
],
1772 else if (cfm_reg
!= 0)
1774 get_frame_register (this_frame
, cfm_reg
, buf
);
1775 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
1777 cache
->prev_cfm
= cfm
;
1781 sor
= ((cfm
>> 14) & 0xf) * 8;
1783 sol
= (cfm
>> 7) & 0x7f;
1784 rrb_gr
= (cfm
>> 18) & 0x7f;
1786 /* The previous bof only requires subtraction of the sol (size of
1787 locals) due to the overlap between output and input of
1788 subsequent frames. */
1789 bof
= rse_address_add (bof
, -sol
);
1791 for (i
= 0, addr
= bof
;
1795 if (IS_NaT_COLLECTION_ADDR (addr
))
1800 cache
->saved_regs
[IA64_GR32_REGNUM
1801 + ((i
+ (sor
- rrb_gr
)) % sor
)]
1804 cache
->saved_regs
[IA64_GR32_REGNUM
+ i
] = addr
;
1810 /* Try and trust the lim_pc value whenever possible. */
1811 if (trust_limit
&& lim_pc
>= last_prologue_pc
)
1812 last_prologue_pc
= lim_pc
;
1814 cache
->frameless
= frameless
;
1815 cache
->after_prologue
= last_prologue_pc
;
1816 cache
->mem_stack_frame_size
= mem_stack_frame_size
;
1817 cache
->fp_reg
= fp_reg
;
1819 return last_prologue_pc
;
1823 ia64_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1825 struct ia64_frame_cache cache
;
1827 cache
.after_prologue
= 0;
1831 /* Call examine_prologue with - as third argument since we don't
1832 have a next frame pointer to send. */
1833 return examine_prologue (pc
, pc
+1024, 0, &cache
);
1837 /* Normal frames. */
1839 static struct ia64_frame_cache
*
1840 ia64_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
1842 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1843 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1844 struct ia64_frame_cache
*cache
;
1849 return (struct ia64_frame_cache
*) *this_cache
;
1851 cache
= ia64_alloc_frame_cache ();
1852 *this_cache
= cache
;
1854 get_frame_register (this_frame
, sp_regnum
, buf
);
1855 cache
->saved_sp
= extract_unsigned_integer (buf
, 8, byte_order
);
1857 /* We always want the bsp to point to the end of frame.
1858 This way, we can always get the beginning of frame (bof)
1859 by subtracting frame size. */
1860 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
1861 cache
->bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
1863 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
1865 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
1866 cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
1868 cache
->sof
= (cfm
& 0x7f);
1869 cache
->sol
= (cfm
>> 7) & 0x7f;
1870 cache
->sor
= ((cfm
>> 14) & 0xf) * 8;
1874 cache
->pc
= get_frame_func (this_frame
);
1877 examine_prologue (cache
->pc
, get_frame_pc (this_frame
), this_frame
, cache
);
1879 cache
->base
= cache
->saved_sp
+ cache
->mem_stack_frame_size
;
1885 ia64_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
1886 struct frame_id
*this_id
)
1888 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1889 struct ia64_frame_cache
*cache
=
1890 ia64_frame_cache (this_frame
, this_cache
);
1892 /* If outermost frame, mark with null frame id. */
1893 if (cache
->base
!= 0)
1894 (*this_id
) = frame_id_build_special (cache
->base
, cache
->pc
, cache
->bsp
);
1895 if (gdbarch_debug
>= 1)
1896 fprintf_unfiltered (gdb_stdlog
,
1897 "regular frame id: code %s, stack %s, "
1898 "special %s, this_frame %s\n",
1899 paddress (gdbarch
, this_id
->code_addr
),
1900 paddress (gdbarch
, this_id
->stack_addr
),
1901 paddress (gdbarch
, cache
->bsp
),
1902 host_address_to_string (this_frame
));
1905 static struct value
*
1906 ia64_frame_prev_register (struct frame_info
*this_frame
, void **this_cache
,
1909 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1910 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1911 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
1914 gdb_assert (regnum
>= 0);
1916 if (!target_has_registers
)
1917 error (_("No registers."));
1919 if (regnum
== gdbarch_sp_regnum (gdbarch
))
1920 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1922 else if (regnum
== IA64_BSP_REGNUM
)
1925 CORE_ADDR prev_cfm
, bsp
, prev_bsp
;
1927 /* We want to calculate the previous bsp as the end of the previous
1928 register stack frame. This corresponds to what the hardware bsp
1929 register will be if we pop the frame back which is why we might
1930 have been called. We know the beginning of the current frame is
1931 cache->bsp - cache->sof. This value in the previous frame points
1932 to the start of the output registers. We can calculate the end of
1933 that frame by adding the size of output:
1934 (sof (size of frame) - sol (size of locals)). */
1935 val
= ia64_frame_prev_register (this_frame
, this_cache
, IA64_CFM_REGNUM
);
1936 prev_cfm
= extract_unsigned_integer (value_contents_all (val
),
1938 bsp
= rse_address_add (cache
->bsp
, -(cache
->sof
));
1940 rse_address_add (bsp
, (prev_cfm
& 0x7f) - ((prev_cfm
>> 7) & 0x7f));
1942 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
1945 else if (regnum
== IA64_CFM_REGNUM
)
1947 CORE_ADDR addr
= cache
->saved_regs
[IA64_CFM_REGNUM
];
1950 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
1952 if (cache
->prev_cfm
)
1953 return frame_unwind_got_constant (this_frame
, regnum
, cache
->prev_cfm
);
1955 if (cache
->frameless
)
1956 return frame_unwind_got_register (this_frame
, IA64_PFS_REGNUM
,
1958 return frame_unwind_got_register (this_frame
, regnum
, 0);
1961 else if (regnum
== IA64_VFP_REGNUM
)
1963 /* If the function in question uses an automatic register (r32-r127)
1964 for the frame pointer, it'll be found by ia64_find_saved_register()
1965 above. If the function lacks one of these frame pointers, we can
1966 still provide a value since we know the size of the frame. */
1967 return frame_unwind_got_constant (this_frame
, regnum
, cache
->base
);
1970 else if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1972 struct value
*pr_val
;
1975 pr_val
= ia64_frame_prev_register (this_frame
, this_cache
,
1977 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
1979 /* Fetch predicate register rename base from current frame
1980 marker for this frame. */
1981 int rrb_pr
= (cache
->cfm
>> 32) & 0x3f;
1983 /* Adjust the register number to account for register rotation. */
1984 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
1986 prN
= extract_bit_field (value_contents_all (pr_val
),
1987 regnum
- VP0_REGNUM
, 1);
1988 return frame_unwind_got_constant (this_frame
, regnum
, prN
);
1991 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT31_REGNUM
)
1993 struct value
*unat_val
;
1995 unat_val
= ia64_frame_prev_register (this_frame
, this_cache
,
1997 unatN
= extract_bit_field (value_contents_all (unat_val
),
1998 regnum
- IA64_NAT0_REGNUM
, 1);
1999 return frame_unwind_got_constant (this_frame
, regnum
, unatN
);
2002 else if (IA64_NAT32_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2005 /* Find address of general register corresponding to nat bit we're
2009 gr_addr
= cache
->saved_regs
[regnum
- IA64_NAT0_REGNUM
+ IA64_GR0_REGNUM
];
2013 /* Compute address of nat collection bits. */
2014 CORE_ADDR nat_addr
= gr_addr
| 0x1f8;
2016 CORE_ADDR nat_collection
;
2019 /* If our nat collection address is bigger than bsp, we have to get
2020 the nat collection from rnat. Otherwise, we fetch the nat
2021 collection from the computed address. */
2022 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2023 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2024 if (nat_addr
>= bsp
)
2026 get_frame_register (this_frame
, IA64_RNAT_REGNUM
, buf
);
2027 nat_collection
= extract_unsigned_integer (buf
, 8, byte_order
);
2030 nat_collection
= read_memory_integer (nat_addr
, 8, byte_order
);
2031 nat_bit
= (gr_addr
>> 3) & 0x3f;
2032 natval
= (nat_collection
>> nat_bit
) & 1;
2035 return frame_unwind_got_constant (this_frame
, regnum
, natval
);
2038 else if (regnum
== IA64_IP_REGNUM
)
2041 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2045 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2046 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2048 else if (cache
->frameless
)
2050 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
2051 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2054 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
2057 else if (regnum
== IA64_PSR_REGNUM
)
2059 /* We don't know how to get the complete previous PSR, but we need it
2060 for the slot information when we unwind the pc (pc is formed of IP
2061 register plus slot information from PSR). To get the previous
2062 slot information, we mask it off the return address. */
2063 ULONGEST slot_num
= 0;
2066 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2068 get_frame_register (this_frame
, IA64_PSR_REGNUM
, buf
);
2069 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
2073 read_memory (addr
, buf
, register_size (gdbarch
, IA64_IP_REGNUM
));
2074 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2076 else if (cache
->frameless
)
2078 get_frame_register (this_frame
, IA64_BR0_REGNUM
, buf
);
2079 pc
= extract_unsigned_integer (buf
, 8, byte_order
);
2081 psr
&= ~(3LL << 41);
2082 slot_num
= pc
& 0x3LL
;
2083 psr
|= (CORE_ADDR
)slot_num
<< 41;
2084 return frame_unwind_got_constant (this_frame
, regnum
, psr
);
2087 else if (regnum
== IA64_BR0_REGNUM
)
2089 CORE_ADDR addr
= cache
->saved_regs
[IA64_BR0_REGNUM
];
2092 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2094 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2097 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
2098 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2102 if (regnum
>= V32_REGNUM
)
2103 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2104 addr
= cache
->saved_regs
[regnum
];
2106 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2108 if (cache
->frameless
)
2110 struct value
*reg_val
;
2111 CORE_ADDR prev_cfm
, prev_bsp
, prev_bof
;
2113 /* FIXME: brobecker/2008-05-01: Doesn't this seem redundant
2114 with the same code above? */
2115 if (regnum
>= V32_REGNUM
)
2116 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2117 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2119 prev_cfm
= extract_unsigned_integer (value_contents_all (reg_val
),
2121 reg_val
= ia64_frame_prev_register (this_frame
, this_cache
,
2123 prev_bsp
= extract_unsigned_integer (value_contents_all (reg_val
),
2125 prev_bof
= rse_address_add (prev_bsp
, -(prev_cfm
& 0x7f));
2127 addr
= rse_address_add (prev_bof
, (regnum
- IA64_GR32_REGNUM
));
2128 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2131 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2134 else /* All other registers. */
2138 if (IA64_FR32_REGNUM
<= regnum
&& regnum
<= IA64_FR127_REGNUM
)
2140 /* Fetch floating point register rename base from current
2141 frame marker for this frame. */
2142 int rrb_fr
= (cache
->cfm
>> 25) & 0x7f;
2144 /* Adjust the floating point register number to account for
2145 register rotation. */
2146 regnum
= IA64_FR32_REGNUM
2147 + ((regnum
- IA64_FR32_REGNUM
) + rrb_fr
) % 96;
2150 /* If we have stored a memory address, access the register. */
2151 addr
= cache
->saved_regs
[regnum
];
2153 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2154 /* Otherwise, punt and get the current value of the register. */
2156 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
2160 static const struct frame_unwind ia64_frame_unwind
=
2163 default_frame_unwind_stop_reason
,
2164 &ia64_frame_this_id
,
2165 &ia64_frame_prev_register
,
2167 default_frame_sniffer
2170 /* Signal trampolines. */
2173 ia64_sigtramp_frame_init_saved_regs (struct frame_info
*this_frame
,
2174 struct ia64_frame_cache
*cache
)
2176 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2177 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
2179 if (tdep
->sigcontext_register_address
)
2183 cache
->saved_regs
[IA64_VRAP_REGNUM
]
2184 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2186 cache
->saved_regs
[IA64_CFM_REGNUM
]
2187 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2189 cache
->saved_regs
[IA64_PSR_REGNUM
]
2190 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2192 cache
->saved_regs
[IA64_BSP_REGNUM
]
2193 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2195 cache
->saved_regs
[IA64_RNAT_REGNUM
]
2196 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2198 cache
->saved_regs
[IA64_CCV_REGNUM
]
2199 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2201 cache
->saved_regs
[IA64_UNAT_REGNUM
]
2202 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2204 cache
->saved_regs
[IA64_FPSR_REGNUM
]
2205 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2207 cache
->saved_regs
[IA64_PFS_REGNUM
]
2208 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2210 cache
->saved_regs
[IA64_LC_REGNUM
]
2211 = tdep
->sigcontext_register_address (gdbarch
, cache
->base
,
2214 for (regno
= IA64_GR1_REGNUM
; regno
<= IA64_GR31_REGNUM
; regno
++)
2215 cache
->saved_regs
[regno
] =
2216 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2217 for (regno
= IA64_BR0_REGNUM
; regno
<= IA64_BR7_REGNUM
; regno
++)
2218 cache
->saved_regs
[regno
] =
2219 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2220 for (regno
= IA64_FR2_REGNUM
; regno
<= IA64_FR31_REGNUM
; regno
++)
2221 cache
->saved_regs
[regno
] =
2222 tdep
->sigcontext_register_address (gdbarch
, cache
->base
, regno
);
2226 static struct ia64_frame_cache
*
2227 ia64_sigtramp_frame_cache (struct frame_info
*this_frame
, void **this_cache
)
2229 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2230 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2231 struct ia64_frame_cache
*cache
;
2235 return (struct ia64_frame_cache
*) *this_cache
;
2237 cache
= ia64_alloc_frame_cache ();
2239 get_frame_register (this_frame
, sp_regnum
, buf
);
2240 /* Note that frame size is hard-coded below. We cannot calculate it
2241 via prologue examination. */
2242 cache
->base
= extract_unsigned_integer (buf
, 8, byte_order
) + 16;
2244 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2245 cache
->bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2247 get_frame_register (this_frame
, IA64_CFM_REGNUM
, buf
);
2248 cache
->cfm
= extract_unsigned_integer (buf
, 8, byte_order
);
2249 cache
->sof
= cache
->cfm
& 0x7f;
2251 ia64_sigtramp_frame_init_saved_regs (this_frame
, cache
);
2253 *this_cache
= cache
;
2258 ia64_sigtramp_frame_this_id (struct frame_info
*this_frame
,
2259 void **this_cache
, struct frame_id
*this_id
)
2261 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2262 struct ia64_frame_cache
*cache
=
2263 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
2265 (*this_id
) = frame_id_build_special (cache
->base
,
2266 get_frame_pc (this_frame
),
2268 if (gdbarch_debug
>= 1)
2269 fprintf_unfiltered (gdb_stdlog
,
2270 "sigtramp frame id: code %s, stack %s, "
2271 "special %s, this_frame %s\n",
2272 paddress (gdbarch
, this_id
->code_addr
),
2273 paddress (gdbarch
, this_id
->stack_addr
),
2274 paddress (gdbarch
, cache
->bsp
),
2275 host_address_to_string (this_frame
));
2278 static struct value
*
2279 ia64_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
2280 void **this_cache
, int regnum
)
2282 struct ia64_frame_cache
*cache
=
2283 ia64_sigtramp_frame_cache (this_frame
, this_cache
);
2285 gdb_assert (regnum
>= 0);
2287 if (!target_has_registers
)
2288 error (_("No registers."));
2290 if (regnum
== IA64_IP_REGNUM
)
2293 CORE_ADDR addr
= cache
->saved_regs
[IA64_VRAP_REGNUM
];
2297 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2298 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2299 pc
= read_memory_unsigned_integer (addr
, 8, byte_order
);
2302 return frame_unwind_got_constant (this_frame
, regnum
, pc
);
2305 else if ((regnum
>= IA64_GR32_REGNUM
&& regnum
<= IA64_GR127_REGNUM
)
2306 || (regnum
>= V32_REGNUM
&& regnum
<= V127_REGNUM
))
2310 if (regnum
>= V32_REGNUM
)
2311 regnum
= IA64_GR32_REGNUM
+ (regnum
- V32_REGNUM
);
2312 addr
= cache
->saved_regs
[regnum
];
2314 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2316 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2319 else /* All other registers not listed above. */
2321 CORE_ADDR addr
= cache
->saved_regs
[regnum
];
2324 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
2326 return frame_unwind_got_constant (this_frame
, regnum
, 0);
2331 ia64_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2332 struct frame_info
*this_frame
,
2335 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
2336 if (tdep
->pc_in_sigtramp
)
2338 CORE_ADDR pc
= get_frame_pc (this_frame
);
2340 if (tdep
->pc_in_sigtramp (pc
))
2347 static const struct frame_unwind ia64_sigtramp_frame_unwind
=
2350 default_frame_unwind_stop_reason
,
2351 ia64_sigtramp_frame_this_id
,
2352 ia64_sigtramp_frame_prev_register
,
2354 ia64_sigtramp_frame_sniffer
2360 ia64_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
2362 struct ia64_frame_cache
*cache
= ia64_frame_cache (this_frame
, this_cache
);
2367 static const struct frame_base ia64_frame_base
=
2370 ia64_frame_base_address
,
2371 ia64_frame_base_address
,
2372 ia64_frame_base_address
2375 #ifdef HAVE_LIBUNWIND_IA64_H
2377 struct ia64_unwind_table_entry
2379 unw_word_t start_offset
;
2380 unw_word_t end_offset
;
2381 unw_word_t info_offset
;
2384 static __inline__
uint64_t
2385 ia64_rse_slot_num (uint64_t addr
)
2387 return (addr
>> 3) & 0x3f;
2390 /* Skip over a designated number of registers in the backing
2391 store, remembering every 64th position is for NAT. */
2392 static __inline__
uint64_t
2393 ia64_rse_skip_regs (uint64_t addr
, long num_regs
)
2395 long delta
= ia64_rse_slot_num(addr
) + num_regs
;
2399 return addr
+ ((num_regs
+ delta
/0x3f) << 3);
2402 /* Gdb ia64-libunwind-tdep callback function to convert from an ia64 gdb
2403 register number to a libunwind register number. */
2405 ia64_gdb2uw_regnum (int regnum
)
2407 if (regnum
== sp_regnum
)
2409 else if (regnum
== IA64_BSP_REGNUM
)
2410 return UNW_IA64_BSP
;
2411 else if ((unsigned) (regnum
- IA64_GR0_REGNUM
) < 128)
2412 return UNW_IA64_GR
+ (regnum
- IA64_GR0_REGNUM
);
2413 else if ((unsigned) (regnum
- V32_REGNUM
) < 95)
2414 return UNW_IA64_GR
+ 32 + (regnum
- V32_REGNUM
);
2415 else if ((unsigned) (regnum
- IA64_FR0_REGNUM
) < 128)
2416 return UNW_IA64_FR
+ (regnum
- IA64_FR0_REGNUM
);
2417 else if ((unsigned) (regnum
- IA64_PR0_REGNUM
) < 64)
2419 else if ((unsigned) (regnum
- IA64_BR0_REGNUM
) < 8)
2420 return UNW_IA64_BR
+ (regnum
- IA64_BR0_REGNUM
);
2421 else if (regnum
== IA64_PR_REGNUM
)
2423 else if (regnum
== IA64_IP_REGNUM
)
2425 else if (regnum
== IA64_CFM_REGNUM
)
2426 return UNW_IA64_CFM
;
2427 else if ((unsigned) (regnum
- IA64_AR0_REGNUM
) < 128)
2428 return UNW_IA64_AR
+ (regnum
- IA64_AR0_REGNUM
);
2429 else if ((unsigned) (regnum
- IA64_NAT0_REGNUM
) < 128)
2430 return UNW_IA64_NAT
+ (regnum
- IA64_NAT0_REGNUM
);
2435 /* Gdb ia64-libunwind-tdep callback function to convert from a libunwind
2436 register number to a ia64 gdb register number. */
2438 ia64_uw2gdb_regnum (int uw_regnum
)
2440 if (uw_regnum
== UNW_IA64_SP
)
2442 else if (uw_regnum
== UNW_IA64_BSP
)
2443 return IA64_BSP_REGNUM
;
2444 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 32)
2445 return IA64_GR0_REGNUM
+ (uw_regnum
- UNW_IA64_GR
);
2446 else if ((unsigned) (uw_regnum
- UNW_IA64_GR
) < 128)
2447 return V32_REGNUM
+ (uw_regnum
- (IA64_GR0_REGNUM
+ 32));
2448 else if ((unsigned) (uw_regnum
- UNW_IA64_FR
) < 128)
2449 return IA64_FR0_REGNUM
+ (uw_regnum
- UNW_IA64_FR
);
2450 else if ((unsigned) (uw_regnum
- UNW_IA64_BR
) < 8)
2451 return IA64_BR0_REGNUM
+ (uw_regnum
- UNW_IA64_BR
);
2452 else if (uw_regnum
== UNW_IA64_PR
)
2453 return IA64_PR_REGNUM
;
2454 else if (uw_regnum
== UNW_REG_IP
)
2455 return IA64_IP_REGNUM
;
2456 else if (uw_regnum
== UNW_IA64_CFM
)
2457 return IA64_CFM_REGNUM
;
2458 else if ((unsigned) (uw_regnum
- UNW_IA64_AR
) < 128)
2459 return IA64_AR0_REGNUM
+ (uw_regnum
- UNW_IA64_AR
);
2460 else if ((unsigned) (uw_regnum
- UNW_IA64_NAT
) < 128)
2461 return IA64_NAT0_REGNUM
+ (uw_regnum
- UNW_IA64_NAT
);
2466 /* Gdb ia64-libunwind-tdep callback function to reveal if register is
2467 a float register or not. */
2469 ia64_is_fpreg (int uw_regnum
)
2471 return unw_is_fpreg (uw_regnum
);
2474 /* Libunwind callback accessor function for general registers. */
2476 ia64_access_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
, unw_word_t
*val
,
2477 int write
, void *arg
)
2479 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2480 unw_word_t bsp
, sof
, cfm
, psr
, ip
;
2481 struct frame_info
*this_frame
= (struct frame_info
*) arg
;
2482 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2484 /* We never call any libunwind routines that need to write registers. */
2485 gdb_assert (!write
);
2490 /* Libunwind expects to see the pc value which means the slot number
2491 from the psr must be merged with the ip word address. */
2492 ip
= get_frame_register_unsigned (this_frame
, IA64_IP_REGNUM
);
2493 psr
= get_frame_register_unsigned (this_frame
, IA64_PSR_REGNUM
);
2494 *val
= ip
| ((psr
>> 41) & 0x3);
2497 case UNW_IA64_AR_BSP
:
2498 /* Libunwind expects to see the beginning of the current
2499 register frame so we must account for the fact that
2500 ptrace() will return a value for bsp that points *after*
2501 the current register frame. */
2502 bsp
= get_frame_register_unsigned (this_frame
, IA64_BSP_REGNUM
);
2503 cfm
= get_frame_register_unsigned (this_frame
, IA64_CFM_REGNUM
);
2504 sof
= gdbarch_tdep (gdbarch
)->size_of_register_frame (this_frame
, cfm
);
2505 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2508 case UNW_IA64_AR_BSPSTORE
:
2509 /* Libunwind wants bspstore to be after the current register frame.
2510 This is what ptrace() and gdb treats as the regular bsp value. */
2511 *val
= get_frame_register_unsigned (this_frame
, IA64_BSP_REGNUM
);
2515 /* For all other registers, just unwind the value directly. */
2516 *val
= get_frame_register_unsigned (this_frame
, regnum
);
2520 if (gdbarch_debug
>= 1)
2521 fprintf_unfiltered (gdb_stdlog
,
2522 " access_reg: from cache: %4s=%s\n",
2523 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2524 ? ia64_register_names
[regnum
] : "r??"),
2525 paddress (gdbarch
, *val
));
2529 /* Libunwind callback accessor function for floating-point registers. */
2531 ia64_access_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2532 unw_fpreg_t
*val
, int write
, void *arg
)
2534 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2535 struct frame_info
*this_frame
= (struct frame_info
*) arg
;
2537 /* We never call any libunwind routines that need to write registers. */
2538 gdb_assert (!write
);
2540 get_frame_register (this_frame
, regnum
, (gdb_byte
*) val
);
2545 /* Libunwind callback accessor function for top-level rse registers. */
2547 ia64_access_rse_reg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2548 unw_word_t
*val
, int write
, void *arg
)
2550 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2551 unw_word_t bsp
, sof
, cfm
, psr
, ip
;
2552 struct regcache
*regcache
= (struct regcache
*) arg
;
2553 struct gdbarch
*gdbarch
= regcache
->arch ();
2555 /* We never call any libunwind routines that need to write registers. */
2556 gdb_assert (!write
);
2561 /* Libunwind expects to see the pc value which means the slot number
2562 from the psr must be merged with the ip word address. */
2563 regcache_cooked_read_unsigned (regcache
, IA64_IP_REGNUM
, &ip
);
2564 regcache_cooked_read_unsigned (regcache
, IA64_PSR_REGNUM
, &psr
);
2565 *val
= ip
| ((psr
>> 41) & 0x3);
2568 case UNW_IA64_AR_BSP
:
2569 /* Libunwind expects to see the beginning of the current
2570 register frame so we must account for the fact that
2571 ptrace() will return a value for bsp that points *after*
2572 the current register frame. */
2573 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
2574 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
2576 *val
= ia64_rse_skip_regs (bsp
, -sof
);
2579 case UNW_IA64_AR_BSPSTORE
:
2580 /* Libunwind wants bspstore to be after the current register frame.
2581 This is what ptrace() and gdb treats as the regular bsp value. */
2582 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, val
);
2586 /* For all other registers, just unwind the value directly. */
2587 regcache_cooked_read_unsigned (regcache
, regnum
, val
);
2591 if (gdbarch_debug
>= 1)
2592 fprintf_unfiltered (gdb_stdlog
,
2593 " access_rse_reg: from cache: %4s=%s\n",
2594 (((unsigned) regnum
<= IA64_NAT127_REGNUM
)
2595 ? ia64_register_names
[regnum
] : "r??"),
2596 paddress (gdbarch
, *val
));
2601 /* Libunwind callback accessor function for top-level fp registers. */
2603 ia64_access_rse_fpreg (unw_addr_space_t as
, unw_regnum_t uw_regnum
,
2604 unw_fpreg_t
*val
, int write
, void *arg
)
2606 int regnum
= ia64_uw2gdb_regnum (uw_regnum
);
2607 struct regcache
*regcache
= (struct regcache
*) arg
;
2609 /* We never call any libunwind routines that need to write registers. */
2610 gdb_assert (!write
);
2612 regcache
->cooked_read (regnum
, (gdb_byte
*) val
);
2617 /* Libunwind callback accessor function for accessing memory. */
2619 ia64_access_mem (unw_addr_space_t as
,
2620 unw_word_t addr
, unw_word_t
*val
,
2621 int write
, void *arg
)
2623 if (addr
- KERNEL_START
< ktab_size
)
2625 unw_word_t
*laddr
= (unw_word_t
*) ((char *) ktab
2626 + (addr
- KERNEL_START
));
2635 /* XXX do we need to normalize byte-order here? */
2637 return target_write_memory (addr
, (gdb_byte
*) val
, sizeof (unw_word_t
));
2639 return target_read_memory (addr
, (gdb_byte
*) val
, sizeof (unw_word_t
));
2642 /* Call low-level function to access the kernel unwind table. */
2643 static gdb::optional
<gdb::byte_vector
>
2646 /* FIXME drow/2005-09-10: This code used to call
2647 ia64_linux_xfer_unwind_table directly to fetch the unwind table
2648 for the currently running ia64-linux kernel. That data should
2649 come from the core file and be accessed via the auxv vector; if
2650 we want to preserve fall back to the running kernel's table, then
2651 we should find a way to override the corefile layer's
2652 xfer_partial method. */
2654 return target_read_alloc (current_top_target (), TARGET_OBJECT_UNWIND_TABLE
,
2658 /* Get the kernel unwind table. */
2660 get_kernel_table (unw_word_t ip
, unw_dyn_info_t
*di
)
2662 static struct ia64_table_entry
*etab
;
2666 ktab_buf
= getunwind_table ();
2668 return -UNW_ENOINFO
;
2670 ktab
= (struct ia64_table_entry
*) ktab_buf
->data ();
2671 ktab_size
= ktab_buf
->size ();
2673 for (etab
= ktab
; etab
->start_offset
; ++etab
)
2674 etab
->info_offset
+= KERNEL_START
;
2677 if (ip
< ktab
[0].start_offset
|| ip
>= etab
[-1].end_offset
)
2678 return -UNW_ENOINFO
;
2680 di
->format
= UNW_INFO_FORMAT_TABLE
;
2682 di
->start_ip
= ktab
[0].start_offset
;
2683 di
->end_ip
= etab
[-1].end_offset
;
2684 di
->u
.ti
.name_ptr
= (unw_word_t
) "<kernel>";
2685 di
->u
.ti
.segbase
= 0;
2686 di
->u
.ti
.table_len
= ((char *) etab
- (char *) ktab
) / sizeof (unw_word_t
);
2687 di
->u
.ti
.table_data
= (unw_word_t
*) ktab
;
2689 if (gdbarch_debug
>= 1)
2690 fprintf_unfiltered (gdb_stdlog
, "get_kernel_table: found table `%s': "
2691 "segbase=%s, length=%s, gp=%s\n",
2692 (char *) di
->u
.ti
.name_ptr
,
2693 hex_string (di
->u
.ti
.segbase
),
2694 pulongest (di
->u
.ti
.table_len
),
2695 hex_string (di
->gp
));
2699 /* Find the unwind table entry for a specified address. */
2701 ia64_find_unwind_table (struct objfile
*objfile
, unw_word_t ip
,
2702 unw_dyn_info_t
*dip
, void **buf
)
2704 Elf_Internal_Phdr
*phdr
, *p_text
= NULL
, *p_unwind
= NULL
;
2705 Elf_Internal_Ehdr
*ehdr
;
2706 unw_word_t segbase
= 0;
2707 CORE_ADDR load_base
;
2711 bfd
= objfile
->obfd
;
2713 ehdr
= elf_tdata (bfd
)->elf_header
;
2714 phdr
= elf_tdata (bfd
)->phdr
;
2716 load_base
= objfile
->text_section_offset ();
2718 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2720 switch (phdr
[i
].p_type
)
2723 if ((unw_word_t
) (ip
- load_base
- phdr
[i
].p_vaddr
)
2728 case PT_IA_64_UNWIND
:
2729 p_unwind
= phdr
+ i
;
2737 if (!p_text
|| !p_unwind
)
2738 return -UNW_ENOINFO
;
2740 /* Verify that the segment that contains the IP also contains
2741 the static unwind table. If not, we may be in the Linux kernel's
2742 DSO gate page in which case the unwind table is another segment.
2743 Otherwise, we are dealing with runtime-generated code, for which we
2744 have no info here. */
2745 segbase
= p_text
->p_vaddr
+ load_base
;
2747 if ((p_unwind
->p_vaddr
- p_text
->p_vaddr
) >= p_text
->p_memsz
)
2750 for (i
= 0; i
< ehdr
->e_phnum
; ++i
)
2752 if (phdr
[i
].p_type
== PT_LOAD
2753 && (p_unwind
->p_vaddr
- phdr
[i
].p_vaddr
) < phdr
[i
].p_memsz
)
2756 /* Get the segbase from the section containing the
2758 segbase
= phdr
[i
].p_vaddr
+ load_base
;
2762 return -UNW_ENOINFO
;
2765 dip
->start_ip
= p_text
->p_vaddr
+ load_base
;
2766 dip
->end_ip
= dip
->start_ip
+ p_text
->p_memsz
;
2767 dip
->gp
= ia64_find_global_pointer (objfile
->arch (), ip
);
2768 dip
->format
= UNW_INFO_FORMAT_REMOTE_TABLE
;
2769 dip
->u
.rti
.name_ptr
= (unw_word_t
) bfd_get_filename (bfd
);
2770 dip
->u
.rti
.segbase
= segbase
;
2771 dip
->u
.rti
.table_len
= p_unwind
->p_memsz
/ sizeof (unw_word_t
);
2772 dip
->u
.rti
.table_data
= p_unwind
->p_vaddr
+ load_base
;
2777 /* Libunwind callback accessor function to acquire procedure unwind-info. */
2779 ia64_find_proc_info_x (unw_addr_space_t as
, unw_word_t ip
, unw_proc_info_t
*pi
,
2780 int need_unwind_info
, void *arg
)
2782 struct obj_section
*sec
= find_pc_section (ip
);
2789 /* XXX This only works if the host and the target architecture are
2790 both ia64 and if the have (more or less) the same kernel
2792 if (get_kernel_table (ip
, &di
) < 0)
2793 return -UNW_ENOINFO
;
2795 if (gdbarch_debug
>= 1)
2796 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %s -> "
2797 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2798 "length=%s,data=%s)\n",
2799 hex_string (ip
), (char *)di
.u
.ti
.name_ptr
,
2800 hex_string (di
.u
.ti
.segbase
),
2801 hex_string (di
.start_ip
), hex_string (di
.end_ip
),
2803 pulongest (di
.u
.ti
.table_len
),
2804 hex_string ((CORE_ADDR
)di
.u
.ti
.table_data
));
2808 ret
= ia64_find_unwind_table (sec
->objfile
, ip
, &di
, &buf
);
2812 if (gdbarch_debug
>= 1)
2813 fprintf_unfiltered (gdb_stdlog
, "ia64_find_proc_info_x: %s -> "
2814 "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s,"
2815 "length=%s,data=%s)\n",
2816 hex_string (ip
), (char *)di
.u
.rti
.name_ptr
,
2817 hex_string (di
.u
.rti
.segbase
),
2818 hex_string (di
.start_ip
), hex_string (di
.end_ip
),
2820 pulongest (di
.u
.rti
.table_len
),
2821 hex_string (di
.u
.rti
.table_data
));
2824 ret
= libunwind_search_unwind_table (&as
, ip
, &di
, pi
, need_unwind_info
,
2827 /* We no longer need the dyn info storage so free it. */
2833 /* Libunwind callback accessor function for cleanup. */
2835 ia64_put_unwind_info (unw_addr_space_t as
,
2836 unw_proc_info_t
*pip
, void *arg
)
2838 /* Nothing required for now. */
2841 /* Libunwind callback accessor function to get head of the dynamic
2842 unwind-info registration list. */
2844 ia64_get_dyn_info_list (unw_addr_space_t as
,
2845 unw_word_t
*dilap
, void *arg
)
2847 struct obj_section
*text_sec
;
2848 unw_word_t ip
, addr
;
2852 if (!libunwind_is_initialized ())
2853 return -UNW_ENOINFO
;
2855 for (objfile
*objfile
: current_program_space
->objfiles ())
2859 text_sec
= objfile
->sections
+ SECT_OFF_TEXT (objfile
);
2860 ip
= obj_section_addr (text_sec
);
2861 ret
= ia64_find_unwind_table (objfile
, ip
, &di
, &buf
);
2864 addr
= libunwind_find_dyn_list (as
, &di
, arg
);
2865 /* We no longer need the dyn info storage so free it. */
2870 if (gdbarch_debug
>= 1)
2871 fprintf_unfiltered (gdb_stdlog
,
2872 "dynamic unwind table in objfile %s "
2874 bfd_get_filename (objfile
->obfd
),
2875 hex_string (addr
), hex_string (di
.gp
));
2881 return -UNW_ENOINFO
;
2885 /* Frame interface functions for libunwind. */
2888 ia64_libunwind_frame_this_id (struct frame_info
*this_frame
, void **this_cache
,
2889 struct frame_id
*this_id
)
2891 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2892 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2893 struct frame_id id
= outer_frame_id
;
2897 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
2898 if (frame_id_eq (id
, outer_frame_id
))
2900 (*this_id
) = outer_frame_id
;
2904 /* We must add the bsp as the special address for frame comparison
2906 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
2907 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
2909 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
2911 if (gdbarch_debug
>= 1)
2912 fprintf_unfiltered (gdb_stdlog
,
2913 "libunwind frame id: code %s, stack %s, "
2914 "special %s, this_frame %s\n",
2915 paddress (gdbarch
, id
.code_addr
),
2916 paddress (gdbarch
, id
.stack_addr
),
2917 paddress (gdbarch
, bsp
),
2918 host_address_to_string (this_frame
));
2921 static struct value
*
2922 ia64_libunwind_frame_prev_register (struct frame_info
*this_frame
,
2923 void **this_cache
, int regnum
)
2926 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2927 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2930 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2931 reg
= IA64_PR_REGNUM
;
2932 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2933 reg
= IA64_UNAT_REGNUM
;
2935 /* Let libunwind do most of the work. */
2936 val
= libunwind_frame_prev_register (this_frame
, this_cache
, reg
);
2938 if (VP0_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2942 if (VP16_REGNUM
<= regnum
&& regnum
<= VP63_REGNUM
)
2947 /* Fetch predicate register rename base from current frame
2948 marker for this frame. */
2949 cfm
= get_frame_register_unsigned (this_frame
, IA64_CFM_REGNUM
);
2950 rrb_pr
= (cfm
>> 32) & 0x3f;
2952 /* Adjust the register number to account for register rotation. */
2953 regnum
= VP16_REGNUM
+ ((regnum
- VP16_REGNUM
) + rrb_pr
) % 48;
2955 prN_val
= extract_bit_field (value_contents_all (val
),
2956 regnum
- VP0_REGNUM
, 1);
2957 return frame_unwind_got_constant (this_frame
, regnum
, prN_val
);
2960 else if (IA64_NAT0_REGNUM
<= regnum
&& regnum
<= IA64_NAT127_REGNUM
)
2964 unatN_val
= extract_bit_field (value_contents_all (val
),
2965 regnum
- IA64_NAT0_REGNUM
, 1);
2966 return frame_unwind_got_constant (this_frame
, regnum
, unatN_val
);
2969 else if (regnum
== IA64_BSP_REGNUM
)
2971 struct value
*cfm_val
;
2972 CORE_ADDR prev_bsp
, prev_cfm
;
2974 /* We want to calculate the previous bsp as the end of the previous
2975 register stack frame. This corresponds to what the hardware bsp
2976 register will be if we pop the frame back which is why we might
2977 have been called. We know that libunwind will pass us back the
2978 beginning of the current frame so we should just add sof to it. */
2979 prev_bsp
= extract_unsigned_integer (value_contents_all (val
),
2981 cfm_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
2983 prev_cfm
= extract_unsigned_integer (value_contents_all (cfm_val
),
2985 prev_bsp
= rse_address_add (prev_bsp
, (prev_cfm
& 0x7f));
2987 return frame_unwind_got_constant (this_frame
, regnum
, prev_bsp
);
2994 ia64_libunwind_frame_sniffer (const struct frame_unwind
*self
,
2995 struct frame_info
*this_frame
,
2998 if (libunwind_is_initialized ()
2999 && libunwind_frame_sniffer (self
, this_frame
, this_cache
))
3005 static const struct frame_unwind ia64_libunwind_frame_unwind
=
3008 default_frame_unwind_stop_reason
,
3009 ia64_libunwind_frame_this_id
,
3010 ia64_libunwind_frame_prev_register
,
3012 ia64_libunwind_frame_sniffer
,
3013 libunwind_frame_dealloc_cache
3017 ia64_libunwind_sigtramp_frame_this_id (struct frame_info
*this_frame
,
3019 struct frame_id
*this_id
)
3021 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
3022 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3025 struct frame_id id
= outer_frame_id
;
3027 libunwind_frame_this_id (this_frame
, this_cache
, &id
);
3028 if (frame_id_eq (id
, outer_frame_id
))
3030 (*this_id
) = outer_frame_id
;
3034 /* We must add the bsp as the special address for frame comparison
3036 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
3037 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
3039 /* For a sigtramp frame, we don't make the check for previous ip being 0. */
3040 (*this_id
) = frame_id_build_special (id
.stack_addr
, id
.code_addr
, bsp
);
3042 if (gdbarch_debug
>= 1)
3043 fprintf_unfiltered (gdb_stdlog
,
3044 "libunwind sigtramp frame id: code %s, "
3045 "stack %s, special %s, this_frame %s\n",
3046 paddress (gdbarch
, id
.code_addr
),
3047 paddress (gdbarch
, id
.stack_addr
),
3048 paddress (gdbarch
, bsp
),
3049 host_address_to_string (this_frame
));
3052 static struct value
*
3053 ia64_libunwind_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
3054 void **this_cache
, int regnum
)
3056 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
3057 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3058 struct value
*prev_ip_val
;
3061 /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
3062 method of getting previous registers. */
3063 prev_ip_val
= libunwind_frame_prev_register (this_frame
, this_cache
,
3065 prev_ip
= extract_unsigned_integer (value_contents_all (prev_ip_val
),
3070 void *tmp_cache
= NULL
;
3071 return ia64_sigtramp_frame_prev_register (this_frame
, &tmp_cache
,
3075 return ia64_libunwind_frame_prev_register (this_frame
, this_cache
, regnum
);
3079 ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
3080 struct frame_info
*this_frame
,
3083 if (libunwind_is_initialized ())
3085 if (libunwind_sigtramp_frame_sniffer (self
, this_frame
, this_cache
))
3090 return ia64_sigtramp_frame_sniffer (self
, this_frame
, this_cache
);
3093 static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind
=
3096 default_frame_unwind_stop_reason
,
3097 ia64_libunwind_sigtramp_frame_this_id
,
3098 ia64_libunwind_sigtramp_frame_prev_register
,
3100 ia64_libunwind_sigtramp_frame_sniffer
3103 /* Set of libunwind callback acccessor functions. */
3104 unw_accessors_t ia64_unw_accessors
=
3106 ia64_find_proc_info_x
,
3107 ia64_put_unwind_info
,
3108 ia64_get_dyn_info_list
,
3116 /* Set of special libunwind callback acccessor functions specific for accessing
3117 the rse registers. At the top of the stack, we want libunwind to figure out
3118 how to read r32 - r127. Though usually they are found sequentially in
3119 memory starting from $bof, this is not always true. */
3120 unw_accessors_t ia64_unw_rse_accessors
=
3122 ia64_find_proc_info_x
,
3123 ia64_put_unwind_info
,
3124 ia64_get_dyn_info_list
,
3126 ia64_access_rse_reg
,
3127 ia64_access_rse_fpreg
,
3132 /* Set of ia64-libunwind-tdep gdb callbacks and data for generic
3133 ia64-libunwind-tdep code to use. */
3134 struct libunwind_descr ia64_libunwind_descr
=
3139 &ia64_unw_accessors
,
3140 &ia64_unw_rse_accessors
,
3143 #endif /* HAVE_LIBUNWIND_IA64_H */
3146 ia64_use_struct_convention (struct type
*type
)
3148 struct type
*float_elt_type
;
3150 /* Don't use the struct convention for anything but structure,
3151 union, or array types. */
3152 if (!(type
->code () == TYPE_CODE_STRUCT
3153 || type
->code () == TYPE_CODE_UNION
3154 || type
->code () == TYPE_CODE_ARRAY
))
3157 /* HFAs are structures (or arrays) consisting entirely of floating
3158 point values of the same length. Up to 8 of these are returned
3159 in registers. Don't use the struct convention when this is the
3161 float_elt_type
= is_float_or_hfa_type (type
);
3162 if (float_elt_type
!= NULL
3163 && TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
) <= 8)
3166 /* Other structs of length 32 or less are returned in r8-r11.
3167 Don't use the struct convention for those either. */
3168 return TYPE_LENGTH (type
) > 32;
3171 /* Return non-zero if TYPE is a structure or union type. */
3174 ia64_struct_type_p (const struct type
*type
)
3176 return (type
->code () == TYPE_CODE_STRUCT
3177 || type
->code () == TYPE_CODE_UNION
);
3181 ia64_extract_return_value (struct type
*type
, struct regcache
*regcache
,
3184 struct gdbarch
*gdbarch
= regcache
->arch ();
3185 struct type
*float_elt_type
;
3187 float_elt_type
= is_float_or_hfa_type (type
);
3188 if (float_elt_type
!= NULL
)
3190 gdb_byte from
[IA64_FP_REGISTER_SIZE
];
3192 int regnum
= IA64_FR8_REGNUM
;
3193 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3197 regcache
->cooked_read (regnum
, from
);
3198 target_float_convert (from
, ia64_ext_type (gdbarch
),
3199 valbuf
+ offset
, float_elt_type
);
3200 offset
+= TYPE_LENGTH (float_elt_type
);
3204 else if (!ia64_struct_type_p (type
) && TYPE_LENGTH (type
) < 8)
3206 /* This is an integral value, and its size is less than 8 bytes.
3207 These values are LSB-aligned, so extract the relevant bytes,
3208 and copy them into VALBUF. */
3209 /* brobecker/2005-12-30: Actually, all integral values are LSB aligned,
3210 so I suppose we should also add handling here for integral values
3211 whose size is greater than 8. But I wasn't able to create such
3212 a type, neither in C nor in Ada, so not worrying about these yet. */
3213 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3216 regcache_cooked_read_unsigned (regcache
, IA64_GR8_REGNUM
, &val
);
3217 store_unsigned_integer (valbuf
, TYPE_LENGTH (type
), byte_order
, val
);
3223 int regnum
= IA64_GR8_REGNUM
;
3224 int reglen
= TYPE_LENGTH (register_type (gdbarch
, IA64_GR8_REGNUM
));
3225 int n
= TYPE_LENGTH (type
) / reglen
;
3226 int m
= TYPE_LENGTH (type
) % reglen
;
3231 regcache_cooked_read_unsigned (regcache
, regnum
, ®val
);
3232 memcpy ((char *)valbuf
+ offset
, ®val
, reglen
);
3239 regcache_cooked_read_unsigned (regcache
, regnum
, &val
);
3240 memcpy ((char *)valbuf
+ offset
, &val
, m
);
3246 ia64_store_return_value (struct type
*type
, struct regcache
*regcache
,
3247 const gdb_byte
*valbuf
)
3249 struct gdbarch
*gdbarch
= regcache
->arch ();
3250 struct type
*float_elt_type
;
3252 float_elt_type
= is_float_or_hfa_type (type
);
3253 if (float_elt_type
!= NULL
)
3255 gdb_byte to
[IA64_FP_REGISTER_SIZE
];
3257 int regnum
= IA64_FR8_REGNUM
;
3258 int n
= TYPE_LENGTH (type
) / TYPE_LENGTH (float_elt_type
);
3262 target_float_convert (valbuf
+ offset
, float_elt_type
,
3263 to
, ia64_ext_type (gdbarch
));
3264 regcache
->cooked_write (regnum
, to
);
3265 offset
+= TYPE_LENGTH (float_elt_type
);
3272 int regnum
= IA64_GR8_REGNUM
;
3273 int reglen
= TYPE_LENGTH (register_type (gdbarch
, IA64_GR8_REGNUM
));
3274 int n
= TYPE_LENGTH (type
) / reglen
;
3275 int m
= TYPE_LENGTH (type
) % reglen
;
3280 memcpy (&val
, (char *)valbuf
+ offset
, reglen
);
3281 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3289 memcpy (&val
, (char *)valbuf
+ offset
, m
);
3290 regcache_cooked_write_unsigned (regcache
, regnum
, val
);
3295 static enum return_value_convention
3296 ia64_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
3297 struct type
*valtype
, struct regcache
*regcache
,
3298 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
3300 int struct_return
= ia64_use_struct_convention (valtype
);
3302 if (writebuf
!= NULL
)
3304 gdb_assert (!struct_return
);
3305 ia64_store_return_value (valtype
, regcache
, writebuf
);
3308 if (readbuf
!= NULL
)
3310 gdb_assert (!struct_return
);
3311 ia64_extract_return_value (valtype
, regcache
, readbuf
);
3315 return RETURN_VALUE_STRUCT_CONVENTION
;
3317 return RETURN_VALUE_REGISTER_CONVENTION
;
3321 is_float_or_hfa_type_recurse (struct type
*t
, struct type
**etp
)
3327 return TYPE_LENGTH (*etp
) == TYPE_LENGTH (t
);
3334 case TYPE_CODE_ARRAY
:
3336 is_float_or_hfa_type_recurse (check_typedef (TYPE_TARGET_TYPE (t
)),
3339 case TYPE_CODE_STRUCT
:
3343 for (i
= 0; i
< t
->num_fields (); i
++)
3344 if (!is_float_or_hfa_type_recurse
3345 (check_typedef (t
->field (i
).type ()), etp
))
3356 /* Determine if the given type is one of the floating point types or
3357 and HFA (which is a struct, array, or combination thereof whose
3358 bottom-most elements are all of the same floating point type). */
3360 static struct type
*
3361 is_float_or_hfa_type (struct type
*t
)
3363 struct type
*et
= 0;
3365 return is_float_or_hfa_type_recurse (t
, &et
) ? et
: 0;
3369 /* Return 1 if the alignment of T is such that the next even slot
3370 should be used. Return 0, if the next available slot should
3371 be used. (See section 8.5.1 of the IA-64 Software Conventions
3372 and Runtime manual). */
3375 slot_alignment_is_next_even (struct type
*t
)
3381 if (TYPE_LENGTH (t
) > 8)
3385 case TYPE_CODE_ARRAY
:
3387 slot_alignment_is_next_even (check_typedef (TYPE_TARGET_TYPE (t
)));
3388 case TYPE_CODE_STRUCT
:
3392 for (i
= 0; i
< t
->num_fields (); i
++)
3393 if (slot_alignment_is_next_even
3394 (check_typedef (t
->field (i
).type ())))
3403 /* Attempt to find (and return) the global pointer for the given
3406 This is a rather nasty bit of code searchs for the .dynamic section
3407 in the objfile corresponding to the pc of the function we're trying
3408 to call. Once it finds the addresses at which the .dynamic section
3409 lives in the child process, it scans the Elf64_Dyn entries for a
3410 DT_PLTGOT tag. If it finds one of these, the corresponding
3411 d_un.d_ptr value is the global pointer. */
3414 ia64_find_global_pointer_from_dynamic_section (struct gdbarch
*gdbarch
,
3417 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3418 struct obj_section
*faddr_sect
;
3420 faddr_sect
= find_pc_section (faddr
);
3421 if (faddr_sect
!= NULL
)
3423 struct obj_section
*osect
;
3425 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3427 if (strcmp (osect
->the_bfd_section
->name
, ".dynamic") == 0)
3431 if (osect
< faddr_sect
->objfile
->sections_end
)
3433 CORE_ADDR addr
, endaddr
;
3435 addr
= obj_section_addr (osect
);
3436 endaddr
= obj_section_endaddr (osect
);
3438 while (addr
< endaddr
)
3444 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3447 tag
= extract_signed_integer (buf
, sizeof (buf
), byte_order
);
3449 if (tag
== DT_PLTGOT
)
3451 CORE_ADDR global_pointer
;
3453 status
= target_read_memory (addr
+ 8, buf
, sizeof (buf
));
3456 global_pointer
= extract_unsigned_integer (buf
, sizeof (buf
),
3460 return global_pointer
;
3473 /* Attempt to find (and return) the global pointer for the given
3474 function. We first try the find_global_pointer_from_solib routine
3475 from the gdbarch tdep vector, if provided. And if that does not
3476 work, then we try ia64_find_global_pointer_from_dynamic_section. */
3479 ia64_find_global_pointer (struct gdbarch
*gdbarch
, CORE_ADDR faddr
)
3481 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3484 if (tdep
->find_global_pointer_from_solib
)
3485 addr
= tdep
->find_global_pointer_from_solib (gdbarch
, faddr
);
3487 addr
= ia64_find_global_pointer_from_dynamic_section (gdbarch
, faddr
);
3491 /* Given a function's address, attempt to find (and return) the
3492 corresponding (canonical) function descriptor. Return 0 if
3495 find_extant_func_descr (struct gdbarch
*gdbarch
, CORE_ADDR faddr
)
3497 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3498 struct obj_section
*faddr_sect
;
3500 /* Return early if faddr is already a function descriptor. */
3501 faddr_sect
= find_pc_section (faddr
);
3502 if (faddr_sect
&& strcmp (faddr_sect
->the_bfd_section
->name
, ".opd") == 0)
3505 if (faddr_sect
!= NULL
)
3507 struct obj_section
*osect
;
3508 ALL_OBJFILE_OSECTIONS (faddr_sect
->objfile
, osect
)
3510 if (strcmp (osect
->the_bfd_section
->name
, ".opd") == 0)
3514 if (osect
< faddr_sect
->objfile
->sections_end
)
3516 CORE_ADDR addr
, endaddr
;
3518 addr
= obj_section_addr (osect
);
3519 endaddr
= obj_section_endaddr (osect
);
3521 while (addr
< endaddr
)
3527 status
= target_read_memory (addr
, buf
, sizeof (buf
));
3530 faddr2
= extract_signed_integer (buf
, sizeof (buf
), byte_order
);
3532 if (faddr
== faddr2
)
3542 /* Attempt to find a function descriptor corresponding to the
3543 given address. If none is found, construct one on the
3544 stack using the address at fdaptr. */
3547 find_func_descr (struct regcache
*regcache
, CORE_ADDR faddr
, CORE_ADDR
*fdaptr
)
3549 struct gdbarch
*gdbarch
= regcache
->arch ();
3550 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3553 fdesc
= find_extant_func_descr (gdbarch
, faddr
);
3557 ULONGEST global_pointer
;
3563 global_pointer
= ia64_find_global_pointer (gdbarch
, faddr
);
3565 if (global_pointer
== 0)
3566 regcache_cooked_read_unsigned (regcache
,
3567 IA64_GR1_REGNUM
, &global_pointer
);
3569 store_unsigned_integer (buf
, 8, byte_order
, faddr
);
3570 store_unsigned_integer (buf
+ 8, 8, byte_order
, global_pointer
);
3572 write_memory (fdesc
, buf
, 16);
3578 /* Use the following routine when printing out function pointers
3579 so the user can see the function address rather than just the
3580 function descriptor. */
3582 ia64_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
3583 struct target_ops
*targ
)
3585 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3586 struct obj_section
*s
;
3589 s
= find_pc_section (addr
);
3591 /* check if ADDR points to a function descriptor. */
3592 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
3593 return read_memory_unsigned_integer (addr
, 8, byte_order
);
3595 /* Normally, functions live inside a section that is executable.
3596 So, if ADDR points to a non-executable section, then treat it
3597 as a function descriptor and return the target address iff
3598 the target address itself points to a section that is executable.
3599 Check first the memory of the whole length of 8 bytes is readable. */
3600 if (s
&& (s
->the_bfd_section
->flags
& SEC_CODE
) == 0
3601 && target_read_memory (addr
, buf
, 8) == 0)
3603 CORE_ADDR pc
= extract_unsigned_integer (buf
, 8, byte_order
);
3604 struct obj_section
*pc_section
= find_pc_section (pc
);
3606 if (pc_section
&& (pc_section
->the_bfd_section
->flags
& SEC_CODE
))
3610 /* There are also descriptors embedded in vtables. */
3613 struct bound_minimal_symbol minsym
;
3615 minsym
= lookup_minimal_symbol_by_pc (addr
);
3618 && is_vtable_name (minsym
.minsym
->linkage_name ()))
3619 return read_memory_unsigned_integer (addr
, 8, byte_order
);
3626 ia64_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
3631 /* The default "allocate_new_rse_frame" ia64_infcall_ops routine for ia64. */
3634 ia64_allocate_new_rse_frame (struct regcache
*regcache
, ULONGEST bsp
, int sof
)
3636 ULONGEST cfm
, pfs
, new_bsp
;
3638 regcache_cooked_read_unsigned (regcache
, IA64_CFM_REGNUM
, &cfm
);
3640 new_bsp
= rse_address_add (bsp
, sof
);
3641 regcache_cooked_write_unsigned (regcache
, IA64_BSP_REGNUM
, new_bsp
);
3643 regcache_cooked_read_unsigned (regcache
, IA64_PFS_REGNUM
, &pfs
);
3644 pfs
&= 0xc000000000000000LL
;
3645 pfs
|= (cfm
& 0xffffffffffffLL
);
3646 regcache_cooked_write_unsigned (regcache
, IA64_PFS_REGNUM
, pfs
);
3648 cfm
&= 0xc000000000000000LL
;
3650 regcache_cooked_write_unsigned (regcache
, IA64_CFM_REGNUM
, cfm
);
3653 /* The default "store_argument_in_slot" ia64_infcall_ops routine for
3657 ia64_store_argument_in_slot (struct regcache
*regcache
, CORE_ADDR bsp
,
3658 int slotnum
, gdb_byte
*buf
)
3660 write_memory (rse_address_add (bsp
, slotnum
), buf
, 8);
3663 /* The default "set_function_addr" ia64_infcall_ops routine for ia64. */
3666 ia64_set_function_addr (struct regcache
*regcache
, CORE_ADDR func_addr
)
3668 /* Nothing needed. */
3672 ia64_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
3673 struct regcache
*regcache
, CORE_ADDR bp_addr
,
3674 int nargs
, struct value
**args
, CORE_ADDR sp
,
3675 function_call_return_method return_method
,
3676 CORE_ADDR struct_addr
)
3678 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
3679 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3684 int nslots
, rseslots
, memslots
, slotnum
, nfuncargs
;
3687 CORE_ADDR funcdescaddr
, global_pointer
;
3688 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
3692 /* Count the number of slots needed for the arguments. */
3693 for (argno
= 0; argno
< nargs
; argno
++)
3696 type
= check_typedef (value_type (arg
));
3697 len
= TYPE_LENGTH (type
);
3699 if ((nslots
& 1) && slot_alignment_is_next_even (type
))
3702 if (type
->code () == TYPE_CODE_FUNC
)
3705 nslots
+= (len
+ 7) / 8;
3708 /* Divvy up the slots between the RSE and the memory stack. */
3709 rseslots
= (nslots
> 8) ? 8 : nslots
;
3710 memslots
= nslots
- rseslots
;
3712 /* Allocate a new RSE frame. */
3713 regcache_cooked_read_unsigned (regcache
, IA64_BSP_REGNUM
, &bsp
);
3714 tdep
->infcall_ops
.allocate_new_rse_frame (regcache
, bsp
, rseslots
);
3716 /* We will attempt to find function descriptors in the .opd segment,
3717 but if we can't we'll construct them ourselves. That being the
3718 case, we'll need to reserve space on the stack for them. */
3719 funcdescaddr
= sp
- nfuncargs
* 16;
3720 funcdescaddr
&= ~0xfLL
;
3722 /* Adjust the stack pointer to it's new value. The calling conventions
3723 require us to have 16 bytes of scratch, plus whatever space is
3724 necessary for the memory slots and our function descriptors. */
3725 sp
= sp
- 16 - (memslots
+ nfuncargs
) * 8;
3726 sp
&= ~0xfLL
; /* Maintain 16 byte alignment. */
3728 /* Place the arguments where they belong. The arguments will be
3729 either placed in the RSE backing store or on the memory stack.
3730 In addition, floating point arguments or HFAs are placed in
3731 floating point registers. */
3733 floatreg
= IA64_FR8_REGNUM
;
3734 for (argno
= 0; argno
< nargs
; argno
++)
3736 struct type
*float_elt_type
;
3739 type
= check_typedef (value_type (arg
));
3740 len
= TYPE_LENGTH (type
);
3742 /* Special handling for function parameters. */
3744 && type
->code () == TYPE_CODE_PTR
3745 && TYPE_TARGET_TYPE (type
)->code () == TYPE_CODE_FUNC
)
3747 gdb_byte val_buf
[8];
3748 ULONGEST faddr
= extract_unsigned_integer (value_contents (arg
),
3750 store_unsigned_integer (val_buf
, 8, byte_order
,
3751 find_func_descr (regcache
, faddr
,
3753 if (slotnum
< rseslots
)
3754 tdep
->infcall_ops
.store_argument_in_slot (regcache
, bsp
,
3757 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3764 /* Skip odd slot if necessary... */
3765 if ((slotnum
& 1) && slot_alignment_is_next_even (type
))
3771 gdb_byte val_buf
[8];
3773 memset (val_buf
, 0, 8);
3774 if (!ia64_struct_type_p (type
) && len
< 8)
3776 /* Integral types are LSB-aligned, so we have to be careful
3777 to insert the argument on the correct side of the buffer.
3778 This is why we use store_unsigned_integer. */
3779 store_unsigned_integer
3780 (val_buf
, 8, byte_order
,
3781 extract_unsigned_integer (value_contents (arg
), len
,
3786 /* This is either an 8bit integral type, or an aggregate.
3787 For 8bit integral type, there is no problem, we just
3788 copy the value over.
3790 For aggregates, the only potentially tricky portion
3791 is to write the last one if it is less than 8 bytes.
3792 In this case, the data is Byte0-aligned. Happy news,
3793 this means that we don't need to differentiate the
3794 handling of 8byte blocks and less-than-8bytes blocks. */
3795 memcpy (val_buf
, value_contents (arg
) + argoffset
,
3796 (len
> 8) ? 8 : len
);
3799 if (slotnum
< rseslots
)
3800 tdep
->infcall_ops
.store_argument_in_slot (regcache
, bsp
,
3803 write_memory (sp
+ 16 + 8 * (slotnum
- rseslots
), val_buf
, 8);
3810 /* Handle floating point types (including HFAs). */
3811 float_elt_type
= is_float_or_hfa_type (type
);
3812 if (float_elt_type
!= NULL
)
3815 len
= TYPE_LENGTH (type
);
3816 while (len
> 0 && floatreg
< IA64_FR16_REGNUM
)
3818 gdb_byte to
[IA64_FP_REGISTER_SIZE
];
3819 target_float_convert (value_contents (arg
) + argoffset
,
3821 ia64_ext_type (gdbarch
));
3822 regcache
->cooked_write (floatreg
, to
);
3824 argoffset
+= TYPE_LENGTH (float_elt_type
);
3825 len
-= TYPE_LENGTH (float_elt_type
);
3830 /* Store the struct return value in r8 if necessary. */
3831 if (return_method
== return_method_struct
)
3832 regcache_cooked_write_unsigned (regcache
, IA64_GR8_REGNUM
,
3833 (ULONGEST
) struct_addr
);
3835 global_pointer
= ia64_find_global_pointer (gdbarch
, func_addr
);
3837 if (global_pointer
!= 0)
3838 regcache_cooked_write_unsigned (regcache
, IA64_GR1_REGNUM
, global_pointer
);
3840 /* The following is not necessary on HP-UX, because we're using
3841 a dummy code sequence pushed on the stack to make the call, and
3842 this sequence doesn't need b0 to be set in order for our dummy
3843 breakpoint to be hit. Nonetheless, this doesn't interfere, and
3844 it's needed for other OSes, so we do this unconditionaly. */
3845 regcache_cooked_write_unsigned (regcache
, IA64_BR0_REGNUM
, bp_addr
);
3847 regcache_cooked_write_unsigned (regcache
, sp_regnum
, sp
);
3849 tdep
->infcall_ops
.set_function_addr (regcache
, func_addr
);
3854 static const struct ia64_infcall_ops ia64_infcall_ops
=
3856 ia64_allocate_new_rse_frame
,
3857 ia64_store_argument_in_slot
,
3858 ia64_set_function_addr
3861 static struct frame_id
3862 ia64_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
3864 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3868 get_frame_register (this_frame
, sp_regnum
, buf
);
3869 sp
= extract_unsigned_integer (buf
, 8, byte_order
);
3871 get_frame_register (this_frame
, IA64_BSP_REGNUM
, buf
);
3872 bsp
= extract_unsigned_integer (buf
, 8, byte_order
);
3874 if (gdbarch_debug
>= 1)
3875 fprintf_unfiltered (gdb_stdlog
,
3876 "dummy frame id: code %s, stack %s, special %s\n",
3877 paddress (gdbarch
, get_frame_pc (this_frame
)),
3878 paddress (gdbarch
, sp
), paddress (gdbarch
, bsp
));
3880 return frame_id_build_special (sp
, get_frame_pc (this_frame
), bsp
);
3884 ia64_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
3886 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3888 CORE_ADDR ip
, psr
, pc
;
3890 frame_unwind_register (next_frame
, IA64_IP_REGNUM
, buf
);
3891 ip
= extract_unsigned_integer (buf
, 8, byte_order
);
3892 frame_unwind_register (next_frame
, IA64_PSR_REGNUM
, buf
);
3893 psr
= extract_unsigned_integer (buf
, 8, byte_order
);
3895 pc
= (ip
& ~0xf) | ((psr
>> 41) & 3);
3900 ia64_print_insn (bfd_vma memaddr
, struct disassemble_info
*info
)
3902 info
->bytes_per_line
= SLOT_MULTIPLIER
;
3903 return default_print_insn (memaddr
, info
);
3906 /* The default "size_of_register_frame" gdbarch_tdep routine for ia64. */
3909 ia64_size_of_register_frame (struct frame_info
*this_frame
, ULONGEST cfm
)
3911 return (cfm
& 0x7f);
3914 static struct gdbarch
*
3915 ia64_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3917 struct gdbarch
*gdbarch
;
3918 struct gdbarch_tdep
*tdep
;
3920 /* If there is already a candidate, use it. */
3921 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3923 return arches
->gdbarch
;
3925 tdep
= XCNEW (struct gdbarch_tdep
);
3926 gdbarch
= gdbarch_alloc (&info
, tdep
);
3928 tdep
->size_of_register_frame
= ia64_size_of_register_frame
;
3930 /* According to the ia64 specs, instructions that store long double
3931 floats in memory use a long-double format different than that
3932 used in the floating registers. The memory format matches the
3933 x86 extended float format which is 80 bits. An OS may choose to
3934 use this format (e.g. GNU/Linux) or choose to use a different
3935 format for storing long doubles (e.g. HPUX). In the latter case,
3936 the setting of the format may be moved/overridden in an
3937 OS-specific tdep file. */
3938 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
3940 set_gdbarch_short_bit (gdbarch
, 16);
3941 set_gdbarch_int_bit (gdbarch
, 32);
3942 set_gdbarch_long_bit (gdbarch
, 64);
3943 set_gdbarch_long_long_bit (gdbarch
, 64);
3944 set_gdbarch_float_bit (gdbarch
, 32);
3945 set_gdbarch_double_bit (gdbarch
, 64);
3946 set_gdbarch_long_double_bit (gdbarch
, 128);
3947 set_gdbarch_ptr_bit (gdbarch
, 64);
3949 set_gdbarch_num_regs (gdbarch
, NUM_IA64_RAW_REGS
);
3950 set_gdbarch_num_pseudo_regs (gdbarch
,
3951 LAST_PSEUDO_REGNUM
- FIRST_PSEUDO_REGNUM
);
3952 set_gdbarch_sp_regnum (gdbarch
, sp_regnum
);
3953 set_gdbarch_fp0_regnum (gdbarch
, IA64_FR0_REGNUM
);
3955 set_gdbarch_register_name (gdbarch
, ia64_register_name
);
3956 set_gdbarch_register_type (gdbarch
, ia64_register_type
);
3958 set_gdbarch_pseudo_register_read (gdbarch
, ia64_pseudo_register_read
);
3959 set_gdbarch_pseudo_register_write (gdbarch
, ia64_pseudo_register_write
);
3960 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, ia64_dwarf_reg_to_regnum
);
3961 set_gdbarch_register_reggroup_p (gdbarch
, ia64_register_reggroup_p
);
3962 set_gdbarch_convert_register_p (gdbarch
, ia64_convert_register_p
);
3963 set_gdbarch_register_to_value (gdbarch
, ia64_register_to_value
);
3964 set_gdbarch_value_to_register (gdbarch
, ia64_value_to_register
);
3966 set_gdbarch_skip_prologue (gdbarch
, ia64_skip_prologue
);
3968 set_gdbarch_return_value (gdbarch
, ia64_return_value
);
3970 set_gdbarch_memory_insert_breakpoint (gdbarch
,
3971 ia64_memory_insert_breakpoint
);
3972 set_gdbarch_memory_remove_breakpoint (gdbarch
,
3973 ia64_memory_remove_breakpoint
);
3974 set_gdbarch_breakpoint_from_pc (gdbarch
, ia64_breakpoint_from_pc
);
3975 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, ia64_breakpoint_kind_from_pc
);
3976 set_gdbarch_read_pc (gdbarch
, ia64_read_pc
);
3977 set_gdbarch_write_pc (gdbarch
, ia64_write_pc
);
3979 /* Settings for calling functions in the inferior. */
3980 set_gdbarch_push_dummy_call (gdbarch
, ia64_push_dummy_call
);
3981 tdep
->infcall_ops
= ia64_infcall_ops
;
3982 set_gdbarch_frame_align (gdbarch
, ia64_frame_align
);
3983 set_gdbarch_dummy_id (gdbarch
, ia64_dummy_id
);
3985 set_gdbarch_unwind_pc (gdbarch
, ia64_unwind_pc
);
3986 #ifdef HAVE_LIBUNWIND_IA64_H
3987 frame_unwind_append_unwinder (gdbarch
,
3988 &ia64_libunwind_sigtramp_frame_unwind
);
3989 frame_unwind_append_unwinder (gdbarch
, &ia64_libunwind_frame_unwind
);
3990 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
3991 libunwind_frame_set_descr (gdbarch
, &ia64_libunwind_descr
);
3993 frame_unwind_append_unwinder (gdbarch
, &ia64_sigtramp_frame_unwind
);
3995 frame_unwind_append_unwinder (gdbarch
, &ia64_frame_unwind
);
3996 frame_base_set_default (gdbarch
, &ia64_frame_base
);
3998 /* Settings that should be unnecessary. */
3999 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
4001 set_gdbarch_print_insn (gdbarch
, ia64_print_insn
);
4002 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
4003 ia64_convert_from_func_ptr_addr
);
4005 /* The virtual table contains 16-byte descriptors, not pointers to
4007 set_gdbarch_vtable_function_descriptors (gdbarch
, 1);
4009 /* Hook in ABI-specific overrides, if they have been registered. */
4010 gdbarch_init_osabi (info
, gdbarch
);
4015 void _initialize_ia64_tdep ();
4017 _initialize_ia64_tdep ()
4019 gdbarch_register (bfd_arch_ia64
, ia64_gdbarch_init
, NULL
);