Thu Oct 31 16:37:17 1996 Michael Snyder <msnyder@cleaver.cygnus.com>
[binutils-gdb.git] / gdb / m32r-tdep.c
1 /* Target-dependent code for the Mitsubishi m32r for GDB, the GNU debugger.
2 Copyright 1996, Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 #include "defs.h"
21 #include "frame.h"
22 #include "inferior.h"
23 #include "obstack.h"
24 #include "target.h"
25 #include "value.h"
26 #include "bfd.h"
27 #include "gdb_string.h"
28 #include "gdbcore.h"
29 #include "symfile.h"
30
31 struct dummy_frame
32 {
33 struct dummy_frame *next;
34
35 CORE_ADDR fp;
36 CORE_ADDR sp;
37 CORE_ADDR rp;
38 CORE_ADDR pc;
39 };
40
41 void
42 m32r_frame_find_saved_regs PARAMS ((struct frame_info *fi,
43 struct frame_saved_regs *regaddr))
44 {
45 *regaddr = fi->fsr;
46 }
47
48 static struct dummy_frame *dummy_frame_stack = NULL;
49
50 /* Find end of function prologue */
51
52 CORE_ADDR
53 m32r_skip_prologue (pc)
54 CORE_ADDR pc;
55 {
56 CORE_ADDR func_addr, func_end;
57 struct symtab_and_line sal;
58
59 /* See what the symbol table says */
60
61 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
62 {
63 sal = find_pc_line (func_addr, 0);
64
65 if (sal.line != 0 && sal.end < func_end)
66 return sal.end;
67 else
68 /* Either there's no line info, or the line after the prologue is after
69 the end of the function. In this case, there probably isn't a
70 prologue. */
71 return pc;
72 }
73
74 /* We can't find the start of this function, so there's nothing we can do. */
75 return pc;
76 }
77
78 /* This function decodes the target function prologue to determine
79 1) the size of the stack frame, and 2) which registers are saved on it.
80 It saves the offsets of saved regs in the frame_saved_regs argument,
81 and returns the frame size.
82 */
83
84 static unsigned long
85 m32r_scan_prologue (fi, fsr)
86 struct frame_info *fi;
87 struct frame_saved_regs *fsr;
88 {
89 struct symtab_and_line sal;
90 CORE_ADDR prologue_start, prologue_end, current_pc;
91 unsigned long framesize;
92
93 /* this code essentially duplicates skip_prologue,
94 but we need the start address below. */
95
96 if (fsr)
97 memset (fsr->regs, '\000', sizeof fsr->regs);
98
99 if (find_pc_partial_function (fi->pc, NULL, &prologue_start, &prologue_end))
100 {
101 sal = find_pc_line (prologue_start, 0);
102
103 if (sal.line == 0) /* no line info, use current PC */
104 if (prologue_start != entry_point_address ())
105 prologue_end = fi->pc;
106 else
107 return 0; /* _start has no frame or prologue */
108 else if (sal.end < prologue_end) /* next line begins after fn end */
109 prologue_end = sal.end; /* (probably means no prologue) */
110 }
111 else
112 prologue_end = prologue_start + 48; /* We're in the boondocks: allow for */
113 /* 16 pushes, an add, and "mv fp,sp" */
114
115 prologue_end = min (prologue_end, fi->pc);
116
117 /* Now, search the prologue looking for instructions that setup fp, save
118 rp (and other regs), adjust sp and such. */
119
120 framesize = 0;
121 for (current_pc = prologue_start; current_pc < prologue_end; current_pc += 2)
122 {
123 int insn;
124 int regno;
125
126 insn = read_memory_unsigned_integer (current_pc, 2);
127 if (insn & 0x8000) /* Four byte instruction? */
128 current_pc += 2;
129
130 if ((insn & 0xf0ff) == 0x207f) { /* st reg, @-sp */
131 framesize += 4;
132 regno = ((insn >> 8) & 0xf);
133 if (fsr) /* save_regs offset */
134 fsr->regs[regno] = framesize;
135 }
136 else if ((insn >> 8) == 0x4f) /* addi sp, xx */
137 /* add 8 bit sign-extended offset */
138 framesize += -((char) (insn & 0xff));
139 else if (insn == 0x8faf) /* add3 sp, sp, xxxx */
140 /* add 16 bit sign-extended offset */
141 framesize += -((short) read_memory_unsigned_integer (current_pc, 2));
142 else if (((insn >> 8) == 0xe4) && /* ld24 r4, xxxxxx ; sub sp, r4 */
143 read_memory_unsigned_integer (current_pc + 2, 2) == 0x0f24)
144 { /* subtract 24 bit sign-extended negative-offset */
145 insn = read_memory_unsigned_integer (current_pc - 2, 4);
146 if (insn & 0x00800000) /* sign extend */
147 insn |= 0xff000000; /* negative */
148 else
149 insn &= 0x00ffffff; /* positive */
150 framesize += insn;
151 }
152 else if (insn == 0x1d8f) /* mv fp, sp */
153 break; /* end of stack adjustments */
154 }
155 return framesize;
156 }
157
158 /* This function actually figures out the frame address for a given pc and
159 sp. This is tricky on the v850 because we only use an explicit frame
160 pointer when using alloca(). The only reliable way to get this info is to
161 examine the prologue.
162 */
163
164 void
165 m32r_init_extra_frame_info (fi)
166 struct frame_info *fi;
167 {
168 int reg;
169 int framesize;
170
171 if (fi->next)
172 fi->pc = FRAME_SAVED_PC (fi->next);
173
174 framesize = m32r_scan_prologue (fi, &fi->fsr);
175 #if 0
176 if (PC_IN_CALL_DUMMY (fi->pc, NULL, NULL))
177 fi->frame = dummy_frame_stack->sp;
178 else
179 #endif
180 if (!fi->next)
181 fi->frame = read_register (SP_REGNUM);
182
183 for (reg = 0; reg < NUM_REGS; reg++)
184 if (fi->fsr.regs[reg] != 0)
185 fi->fsr.regs[reg] = fi->frame + framesize - fi->fsr.regs[reg];
186 }
187
188 /* Find the caller of this frame. We do this by seeing if RP_REGNUM is saved
189 in the stack anywhere, otherwise we get it from the registers. */
190
191 CORE_ADDR
192 m32r_find_callers_reg (fi, regnum)
193 struct frame_info *fi;
194 int regnum;
195 {
196 #if 0
197 /* XXX - Won't work if multiple dummy frames are active */
198 if (PC_IN_CALL_DUMMY (fi->pc, NULL, NULL))
199 switch (regnum)
200 {
201 case SP_REGNUM:
202 return dummy_frame_stack->sp;
203 break;
204 case FP_REGNUM:
205 return dummy_frame_stack->fp;
206 break;
207 case RP_REGNUM:
208 return dummy_frame_stack->pc;
209 break;
210 case PC_REGNUM:
211 return dummy_frame_stack->pc;
212 break;
213 }
214
215 #endif
216 for (; fi; fi = fi->next)
217 if (fi->fsr.regs[regnum] != 0)
218 return read_memory_integer (fi->fsr.regs[regnum], 4);
219 return read_register (regnum);
220 }
221
222 /* Given a GDB frame, determine the address of the calling function's frame.
223 This will be used to create a new GDB frame struct, and then
224 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
225 For m32r, simply get the saved FP off the stack.
226 */
227
228 CORE_ADDR
229 m32r_frame_chain (fi)
230 struct frame_info *fi;
231 {
232 CORE_ADDR saved_fp = fi->fsr.regs[FP_REGNUM];
233 CORE_ADDR fn_start, fn_end;
234
235 if (saved_fp != 0)
236 return read_memory_integer (saved_fp, 4);
237 else {
238 if (find_pc_partial_function (fi->pc, 0, &fn_start, &fn_end))
239 if (fn_start == entry_point_address ())
240 return 0; /* in _start fn, don't chain further */
241 else
242 return read_register (FP_REGNUM);
243 else /* in the woods, what to do? */
244 return 0; /* for now, play it safe and give up... */
245 }
246 }
247
248 /* All we do here is record SP and FP on the call dummy stack */
249
250 void
251 m32r_push_dummy_frame ()
252 {
253 struct dummy_frame *dummy_frame;
254
255 dummy_frame = xmalloc (sizeof (struct dummy_frame));
256
257 dummy_frame->fp = read_register (FP_REGNUM);
258 dummy_frame->sp = read_register (SP_REGNUM);
259 dummy_frame->rp = read_register (RP_REGNUM);
260 dummy_frame->pc = read_register (PC_REGNUM);
261 dummy_frame->next = dummy_frame_stack;
262 dummy_frame_stack = dummy_frame;
263 }
264
265 /*
266 * MISSING FUNCTION HEADER COMMENT
267 */
268
269 int
270 m32r_pc_in_call_dummy (pc)
271 CORE_ADDR pc;
272 {
273 #if 0
274 return dummy_frame_stack
275 && pc >= CALL_DUMMY_ADDRESS ()
276 && pc <= CALL_DUMMY_ADDRESS () + DECR_PC_AFTER_BREAK;
277 #else
278 return 0;
279 #endif
280 }
281
282 /* Discard from the stack the innermost frame,
283 restoring all saved registers. */
284
285 struct frame_info *
286 m32r_pop_frame (frame)
287 struct frame_info *frame;
288 {
289 int regnum;
290
291 #if 0
292 if (PC_IN_CALL_DUMMY (frame->pc, NULL, NULL))
293 {
294 struct dummy_frame *dummy_frame;
295
296 dummy_frame = dummy_frame_stack;
297 if (!dummy_frame)
298 error ("Can't pop dummy frame!");
299
300 dummy_frame_stack = dummy_frame->next;
301
302 write_register (FP_REGNUM, dummy_frame->fp);
303 write_register (SP_REGNUM, dummy_frame->sp);
304 write_register (RP_REGNUM, dummy_frame->rp);
305 write_register (PC_REGNUM, dummy_frame->pc);
306
307 free (dummy_frame);
308
309 flush_cached_frames ();
310
311 return NULL;
312 }
313
314 #endif
315 write_register (PC_REGNUM, FRAME_SAVED_PC (frame));
316
317 for (regnum = 0; regnum < NUM_REGS; regnum++)
318 if (frame->fsr.regs[regnum] != 0)
319 write_register (regnum,
320 read_memory_integer (frame->fsr.regs[regnum], 4));
321
322 write_register (SP_REGNUM, read_register (FP_REGNUM));
323 if (read_register (PSW_REGNUM) & 0x80)
324 write_register (SPU_REGNUM, read_register (SP_REGNUM));
325 else
326 write_register (SPI_REGNUM, read_register (SP_REGNUM));
327 /* registers_changed (); */
328 flush_cached_frames ();
329
330 return NULL;
331 }
332
333 /* Put arguments in the right places, and setup return address register (RP) to
334 point at a convenient place to put a breakpoint. First four args go in
335 R6->R9, subsequent args go into sp + 16 -> sp + ... Structs are passed by
336 reference. 64 bit quantities (doubles and long longs) may be split between
337 the regs and the stack. When calling a function that returns a struct, a
338 pointer to the struct is passed in as a secret first argument (always in R6).
339
340 By the time we get here, stack space has been allocated for the args, but
341 not for the struct return pointer. */
342
343 CORE_ADDR
344 m32r_push_arguments (nargs, args, sp, struct_return, struct_addr)
345 int nargs;
346 value_ptr *args;
347 CORE_ADDR sp;
348 unsigned char struct_return;
349 CORE_ADDR struct_addr;
350 {
351 int argreg;
352 int argnum;
353
354 argreg = ARG0_REGNUM;
355
356 #if 0
357 if (struct_return)
358 {
359 write_register (argreg++, struct_addr);
360 sp -= 4;
361 }
362
363 for (argnum = 0; argnum < nargs; argnum++)
364 {
365 int len;
366 char *val;
367 char valbuf[4];
368
369 if (TYPE_CODE (VALUE_TYPE (*args)) == TYPE_CODE_STRUCT
370 && TYPE_LENGTH (VALUE_TYPE (*args)) > 8)
371 {
372 store_address (valbuf, 4, VALUE_ADDRESS (*args));
373 len = 4;
374 val = valbuf;
375 }
376 else
377 {
378 len = TYPE_LENGTH (VALUE_TYPE (*args));
379 val = (char *)VALUE_CONTENTS (*args);
380 }
381
382 while (len > 0)
383 if (argreg <= ARGLAST_REGNUM)
384 {
385 CORE_ADDR regval;
386
387 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
388 write_register (argreg, regval);
389
390 len -= REGISTER_RAW_SIZE (argreg);
391 val += REGISTER_RAW_SIZE (argreg);
392 argreg++;
393 }
394 else
395 {
396 write_memory (sp + argnum * 4, val, 4);
397
398 len -= 4;
399 val += 4;
400 }
401 args++;
402 }
403
404 write_register (RP_REGNUM, entry_point_address ());
405
406 #endif
407 return sp;
408 }
409 \f
410 void
411 _initialize_m32r_tdep ()
412 {
413 tm_print_insn = print_insn_m32r;
414 }