1 /* Target-dependent code for Renesas M32R, for GDB.
3 Copyright (C) 1996-2014 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22 #include "frame-unwind.h"
23 #include "frame-base.h"
35 #include "arch-utils.h"
37 #include "trad-frame.h"
41 #include "m32r-tdep.h"
45 extern void _initialize_m32r_tdep (void);
48 m32r_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
50 /* Align to the size of an instruction (so that they can safely be
51 pushed onto the stack. */
58 The little endian mode of M32R is unique. In most of architectures,
59 two 16-bit instructions, A and B, are placed as the following:
67 In M32R, they are placed like this:
75 This is because M32R always fetches instructions in 32-bit.
77 The following functions take care of this behavior. */
80 m32r_memory_insert_breakpoint (struct gdbarch
*gdbarch
,
81 struct bp_target_info
*bp_tgt
)
83 CORE_ADDR addr
= bp_tgt
->placed_address
;
86 gdb_byte contents_cache
[4];
87 gdb_byte bp_entry
[] = { 0x10, 0xf1 }; /* dpt */
89 /* Save the memory contents. */
90 val
= target_read_memory (addr
& 0xfffffffc, contents_cache
, 4);
92 return val
; /* return error */
94 memcpy (bp_tgt
->shadow_contents
, contents_cache
, 4);
95 bp_tgt
->placed_size
= bp_tgt
->shadow_len
= 4;
97 /* Determine appropriate breakpoint contents and size for this address. */
98 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
102 buf
[0] = bp_entry
[0];
103 buf
[1] = bp_entry
[1];
104 buf
[2] = contents_cache
[2] & 0x7f;
105 buf
[3] = contents_cache
[3];
109 buf
[0] = contents_cache
[0];
110 buf
[1] = contents_cache
[1];
111 buf
[2] = bp_entry
[0];
112 buf
[3] = bp_entry
[1];
115 else /* little-endian */
119 buf
[0] = contents_cache
[0];
120 buf
[1] = contents_cache
[1] & 0x7f;
121 buf
[2] = bp_entry
[1];
122 buf
[3] = bp_entry
[0];
126 buf
[0] = bp_entry
[1];
127 buf
[1] = bp_entry
[0];
128 buf
[2] = contents_cache
[2];
129 buf
[3] = contents_cache
[3];
133 /* Write the breakpoint. */
134 val
= target_write_memory (addr
& 0xfffffffc, buf
, 4);
139 m32r_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
140 struct bp_target_info
*bp_tgt
)
142 CORE_ADDR addr
= bp_tgt
->placed_address
;
145 gdb_byte
*contents_cache
= bp_tgt
->shadow_contents
;
147 buf
[0] = contents_cache
[0];
148 buf
[1] = contents_cache
[1];
149 buf
[2] = contents_cache
[2];
150 buf
[3] = contents_cache
[3];
152 /* Remove parallel bit. */
153 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
155 if ((buf
[0] & 0x80) == 0 && (buf
[2] & 0x80) != 0)
158 else /* little-endian */
160 if ((buf
[3] & 0x80) == 0 && (buf
[1] & 0x80) != 0)
164 /* Write contents. */
165 val
= target_write_raw_memory (addr
& 0xfffffffc, buf
, 4);
169 static const gdb_byte
*
170 m32r_breakpoint_from_pc (struct gdbarch
*gdbarch
,
171 CORE_ADDR
*pcptr
, int *lenptr
)
173 static gdb_byte be_bp_entry
[] = {
174 0x10, 0xf1, 0x70, 0x00
176 static gdb_byte le_bp_entry
[] = {
177 0x00, 0x70, 0xf1, 0x10
181 /* Determine appropriate breakpoint. */
182 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
184 if ((*pcptr
& 3) == 0)
197 if ((*pcptr
& 3) == 0)
204 bp
= le_bp_entry
+ 2;
213 char *m32r_register_names
[] = {
214 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
215 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp",
216 "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch",
221 m32r_register_name (struct gdbarch
*gdbarch
, int reg_nr
)
225 if (reg_nr
>= M32R_NUM_REGS
)
227 return m32r_register_names
[reg_nr
];
231 /* Return the GDB type object for the "standard" data type
232 of data in register N. */
235 m32r_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
237 if (reg_nr
== M32R_PC_REGNUM
)
238 return builtin_type (gdbarch
)->builtin_func_ptr
;
239 else if (reg_nr
== M32R_SP_REGNUM
|| reg_nr
== M32R_FP_REGNUM
)
240 return builtin_type (gdbarch
)->builtin_data_ptr
;
242 return builtin_type (gdbarch
)->builtin_int32
;
246 /* Write into appropriate registers a function return value
247 of type TYPE, given in virtual format.
249 Things always get returned in RET1_REGNUM, RET2_REGNUM. */
252 m32r_store_return_value (struct type
*type
, struct regcache
*regcache
,
255 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
256 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
258 int len
= TYPE_LENGTH (type
);
260 regval
= extract_unsigned_integer (valbuf
, len
> 4 ? 4 : len
, byte_order
);
261 regcache_cooked_write_unsigned (regcache
, RET1_REGNUM
, regval
);
265 regval
= extract_unsigned_integer ((gdb_byte
*) valbuf
+ 4,
266 len
- 4, byte_order
);
267 regcache_cooked_write_unsigned (regcache
, RET1_REGNUM
+ 1, regval
);
271 /* This is required by skip_prologue. The results of decoding a prologue
272 should be cached because this thrashing is getting nuts. */
275 decode_prologue (struct gdbarch
*gdbarch
,
276 CORE_ADDR start_pc
, CORE_ADDR scan_limit
,
277 CORE_ADDR
*pl_endptr
, unsigned long *framelength
)
279 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
280 unsigned long framesize
;
283 CORE_ADDR after_prologue
= 0;
284 CORE_ADDR after_push
= 0;
285 CORE_ADDR after_stack_adjust
= 0;
286 CORE_ADDR current_pc
;
287 LONGEST return_value
;
292 for (current_pc
= start_pc
; current_pc
< scan_limit
; current_pc
+= 2)
294 /* Check if current pc's location is readable. */
295 if (!safe_read_memory_integer (current_pc
, 2, byte_order
, &return_value
))
298 insn
= read_memory_unsigned_integer (current_pc
, 2, byte_order
);
303 /* If this is a 32 bit instruction, we dont want to examine its
304 immediate data as though it were an instruction. */
305 if (current_pc
& 0x02)
307 /* Decode this instruction further. */
314 if (current_pc
== scan_limit
)
315 scan_limit
+= 2; /* extend the search */
317 current_pc
+= 2; /* skip the immediate data */
319 /* Check if current pc's location is readable. */
320 if (!safe_read_memory_integer (current_pc
, 2, byte_order
,
324 if (insn
== 0x8faf) /* add3 sp, sp, xxxx */
325 /* add 16 bit sign-extended offset */
328 -((short) read_memory_unsigned_integer (current_pc
,
333 if (((insn
>> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */
334 && safe_read_memory_integer (current_pc
+ 2,
337 && read_memory_unsigned_integer (current_pc
+ 2,
341 /* Subtract 24 bit sign-extended negative-offset. */
342 insn
= read_memory_unsigned_integer (current_pc
- 2,
344 if (insn
& 0x00800000) /* sign extend */
345 insn
|= 0xff000000; /* negative */
347 insn
&= 0x00ffffff; /* positive */
351 after_push
= current_pc
+ 2;
355 op1
= insn
& 0xf000; /* Isolate just the first nibble. */
357 if ((insn
& 0xf0ff) == 0x207f)
361 regno
= ((insn
>> 8) & 0xf);
365 if ((insn
>> 8) == 0x4f) /* addi sp, xx */
366 /* Add 8 bit sign-extended offset. */
368 int stack_adjust
= (signed char) (insn
& 0xff);
370 /* there are probably two of these stack adjustments:
371 1) A negative one in the prologue, and
372 2) A positive one in the epilogue.
373 We are only interested in the first one. */
375 if (stack_adjust
< 0)
377 framesize
-= stack_adjust
;
379 /* A frameless function may have no "mv fp, sp".
380 In that case, this is the end of the prologue. */
381 after_stack_adjust
= current_pc
+ 2;
387 after_prologue
= current_pc
+ 2;
388 break; /* end of stack adjustments */
391 /* Nop looks like a branch, continue explicitly. */
394 after_prologue
= current_pc
+ 2;
395 continue; /* nop occurs between pushes. */
397 /* End of prolog if any of these are trap instructions. */
398 if ((insn
& 0xfff0) == 0x10f0)
400 after_prologue
= current_pc
;
403 /* End of prolog if any of these are branch instructions. */
404 if ((op1
== 0x7000) || (op1
== 0xb000) || (op1
== 0xf000))
406 after_prologue
= current_pc
;
409 /* Some of the branch instructions are mixed with other types. */
412 int subop
= insn
& 0x0ff0;
413 if ((subop
== 0x0ec0) || (subop
== 0x0fc0))
415 after_prologue
= current_pc
;
416 continue; /* jmp , jl */
422 *framelength
= framesize
;
424 if (current_pc
>= scan_limit
)
428 if (after_stack_adjust
!= 0)
429 /* We did not find a "mv fp,sp", but we DID find
430 a stack_adjust. Is it safe to use that as the
431 end of the prologue? I just don't know. */
433 *pl_endptr
= after_stack_adjust
;
435 else if (after_push
!= 0)
436 /* We did not find a "mv fp,sp", but we DID find
437 a push. Is it safe to use that as the
438 end of the prologue? I just don't know. */
440 *pl_endptr
= after_push
;
443 /* We reached the end of the loop without finding the end
444 of the prologue. No way to win -- we should report
445 failure. The way we do that is to return the original
446 start_pc. GDB will set a breakpoint at the start of
447 the function (etc.) */
448 *pl_endptr
= start_pc
;
453 if (after_prologue
== 0)
454 after_prologue
= current_pc
;
457 *pl_endptr
= after_prologue
;
460 } /* decode_prologue */
462 /* Function: skip_prologue
463 Find end of function prologue. */
465 #define DEFAULT_SEARCH_LIMIT 128
468 m32r_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
470 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
471 CORE_ADDR func_addr
, func_end
;
472 struct symtab_and_line sal
;
473 LONGEST return_value
;
475 /* See what the symbol table says. */
477 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
479 sal
= find_pc_line (func_addr
, 0);
481 if (sal
.line
!= 0 && sal
.end
<= func_end
)
486 /* Either there's no line info, or the line after the prologue is after
487 the end of the function. In this case, there probably isn't a
490 func_end
= min (func_end
, func_addr
+ DEFAULT_SEARCH_LIMIT
);
494 func_end
= pc
+ DEFAULT_SEARCH_LIMIT
;
496 /* If pc's location is not readable, just quit. */
497 if (!safe_read_memory_integer (pc
, 4, byte_order
, &return_value
))
500 /* Find the end of prologue. */
501 if (decode_prologue (gdbarch
, pc
, func_end
, &sal
.end
, NULL
) < 0)
507 struct m32r_unwind_cache
509 /* The previous frame's inner most stack address. Used as this
510 frame ID's stack_addr. */
512 /* The frame's base, optionally used by the high-level debug info. */
515 /* How far the SP and r13 (FP) have been offset from the start of
516 the stack frame (as defined by the previous frame's stack
521 /* Table indicating the location of each and every register. */
522 struct trad_frame_saved_reg
*saved_regs
;
525 /* Put here the code to store, into fi->saved_regs, the addresses of
526 the saved registers of frame described by FRAME_INFO. This
527 includes special registers such as pc and fp saved in special ways
528 in the stack frame. sp is even more special: the address we return
529 for it IS the sp for the next frame. */
531 static struct m32r_unwind_cache
*
532 m32r_frame_unwind_cache (struct frame_info
*this_frame
,
533 void **this_prologue_cache
)
535 CORE_ADDR pc
, scan_limit
;
540 struct m32r_unwind_cache
*info
;
543 if ((*this_prologue_cache
))
544 return (*this_prologue_cache
);
546 info
= FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache
);
547 (*this_prologue_cache
) = info
;
548 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
552 info
->uses_frame
= 0;
554 scan_limit
= get_frame_pc (this_frame
);
555 for (pc
= get_frame_func (this_frame
);
556 pc
> 0 && pc
< scan_limit
; pc
+= 2)
560 op
= get_frame_memory_unsigned (this_frame
, pc
, 4);
561 if ((op
& 0x80000000) == 0x80000000)
563 /* 32-bit instruction */
564 if ((op
& 0xffff0000) == 0x8faf0000)
566 /* add3 sp,sp,xxxx */
567 short n
= op
& 0xffff;
568 info
->sp_offset
+= n
;
570 else if (((op
>> 8) == 0xe4)
571 && get_frame_memory_unsigned (this_frame
, pc
+ 2,
574 /* ld24 r4, xxxxxx; sub sp, r4 */
575 unsigned long n
= op
& 0xffffff;
576 info
->sp_offset
+= n
;
577 pc
+= 2; /* skip sub instruction */
580 if (pc
== scan_limit
)
581 scan_limit
+= 2; /* extend the search */
582 pc
+= 2; /* skip the immediate data */
587 /* 16-bit instructions */
588 op
= get_frame_memory_unsigned (this_frame
, pc
, 2) & 0x7fff;
589 if ((op
& 0xf0ff) == 0x207f)
592 int regno
= ((op
>> 8) & 0xf);
593 info
->sp_offset
-= 4;
594 info
->saved_regs
[regno
].addr
= info
->sp_offset
;
596 else if ((op
& 0xff00) == 0x4f00)
599 int n
= (signed char) (op
& 0xff);
600 info
->sp_offset
+= n
;
602 else if (op
== 0x1d8f)
605 info
->uses_frame
= 1;
606 info
->r13_offset
= info
->sp_offset
;
607 break; /* end of stack adjustments */
609 else if ((op
& 0xfff0) == 0x10f0)
611 /* End of prologue if this is a trap instruction. */
612 break; /* End of stack adjustments. */
616 info
->size
= -info
->sp_offset
;
618 /* Compute the previous frame's stack pointer (which is also the
619 frame's ID's stack address), and this frame's base pointer. */
620 if (info
->uses_frame
)
622 /* The SP was moved to the FP. This indicates that a new frame
623 was created. Get THIS frame's FP value by unwinding it from
625 this_base
= get_frame_register_unsigned (this_frame
, M32R_FP_REGNUM
);
626 /* The FP points at the last saved register. Adjust the FP back
627 to before the first saved register giving the SP. */
628 prev_sp
= this_base
+ info
->size
;
632 /* Assume that the FP is this frame's SP but with that pushed
633 stack space added back. */
634 this_base
= get_frame_register_unsigned (this_frame
, M32R_SP_REGNUM
);
635 prev_sp
= this_base
+ info
->size
;
638 /* Convert that SP/BASE into real addresses. */
639 info
->prev_sp
= prev_sp
;
640 info
->base
= this_base
;
642 /* Adjust all the saved registers so that they contain addresses and
644 for (i
= 0; i
< gdbarch_num_regs (get_frame_arch (this_frame
)) - 1; i
++)
645 if (trad_frame_addr_p (info
->saved_regs
, i
))
646 info
->saved_regs
[i
].addr
= (info
->prev_sp
+ info
->saved_regs
[i
].addr
);
648 /* The call instruction moves the caller's PC in the callee's LR.
649 Since this is an unwind, do the reverse. Copy the location of LR
650 into PC (the address / regnum) so that a request for PC will be
651 converted into a request for the LR. */
652 info
->saved_regs
[M32R_PC_REGNUM
] = info
->saved_regs
[LR_REGNUM
];
654 /* The previous frame's SP needed to be computed. Save the computed
656 trad_frame_set_value (info
->saved_regs
, M32R_SP_REGNUM
, prev_sp
);
662 m32r_read_pc (struct regcache
*regcache
)
665 regcache_cooked_read_unsigned (regcache
, M32R_PC_REGNUM
, &pc
);
670 m32r_unwind_sp (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
672 return frame_unwind_register_unsigned (next_frame
, M32R_SP_REGNUM
);
677 m32r_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
678 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
679 struct value
**args
, CORE_ADDR sp
, int struct_return
,
680 CORE_ADDR struct_addr
)
682 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
683 int stack_offset
, stack_alloc
;
684 int argreg
= ARG1_REGNUM
;
687 enum type_code typecode
;
690 gdb_byte valbuf
[MAX_REGISTER_SIZE
];
693 /* First force sp to a 4-byte alignment. */
696 /* Set the return address. For the m32r, the return breakpoint is
697 always at BP_ADDR. */
698 regcache_cooked_write_unsigned (regcache
, LR_REGNUM
, bp_addr
);
700 /* If STRUCT_RETURN is true, then the struct return address (in
701 STRUCT_ADDR) will consume the first argument-passing register.
702 Both adjust the register count and store that value. */
705 regcache_cooked_write_unsigned (regcache
, argreg
, struct_addr
);
709 /* Now make sure there's space on the stack. */
710 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
711 stack_alloc
+= ((TYPE_LENGTH (value_type (args
[argnum
])) + 3) & ~3);
712 sp
-= stack_alloc
; /* Make room on stack for args. */
714 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
716 type
= value_type (args
[argnum
]);
717 typecode
= TYPE_CODE (type
);
718 len
= TYPE_LENGTH (type
);
720 memset (valbuf
, 0, sizeof (valbuf
));
722 /* Passes structures that do not fit in 2 registers by reference. */
724 && (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
))
726 store_unsigned_integer (valbuf
, 4, byte_order
,
727 value_address (args
[argnum
]));
728 typecode
= TYPE_CODE_PTR
;
734 /* Value gets right-justified in the register or stack word. */
735 memcpy (valbuf
+ (register_size (gdbarch
, argreg
) - len
),
736 (gdb_byte
*) value_contents (args
[argnum
]), len
);
740 val
= (gdb_byte
*) value_contents (args
[argnum
]);
744 if (argreg
> ARGN_REGNUM
)
746 /* Must go on the stack. */
747 write_memory (sp
+ stack_offset
, val
, 4);
750 else if (argreg
<= ARGN_REGNUM
)
752 /* There's room in a register. */
754 extract_unsigned_integer (val
,
755 register_size (gdbarch
, argreg
),
757 regcache_cooked_write_unsigned (regcache
, argreg
++, regval
);
760 /* Store the value 4 bytes at a time. This means that things
761 larger than 4 bytes may go partly in registers and partly
763 len
-= register_size (gdbarch
, argreg
);
764 val
+= register_size (gdbarch
, argreg
);
768 /* Finally, update the SP register. */
769 regcache_cooked_write_unsigned (regcache
, M32R_SP_REGNUM
, sp
);
775 /* Given a return value in `regbuf' with a type `valtype',
776 extract and copy its value into `valbuf'. */
779 m32r_extract_return_value (struct type
*type
, struct regcache
*regcache
,
782 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
783 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
784 bfd_byte
*valbuf
= dst
;
785 int len
= TYPE_LENGTH (type
);
788 /* By using store_unsigned_integer we avoid having to do
789 anything special for small big-endian values. */
790 regcache_cooked_read_unsigned (regcache
, RET1_REGNUM
, &tmp
);
791 store_unsigned_integer (valbuf
, (len
> 4 ? len
- 4 : len
), byte_order
, tmp
);
793 /* Ignore return values more than 8 bytes in size because the m32r
794 returns anything more than 8 bytes in the stack. */
797 regcache_cooked_read_unsigned (regcache
, RET1_REGNUM
+ 1, &tmp
);
798 store_unsigned_integer (valbuf
+ len
- 4, 4, byte_order
, tmp
);
802 static enum return_value_convention
803 m32r_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
804 struct type
*valtype
, struct regcache
*regcache
,
805 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
807 if (TYPE_LENGTH (valtype
) > 8)
808 return RETURN_VALUE_STRUCT_CONVENTION
;
812 m32r_extract_return_value (valtype
, regcache
, readbuf
);
813 if (writebuf
!= NULL
)
814 m32r_store_return_value (valtype
, regcache
, writebuf
);
815 return RETURN_VALUE_REGISTER_CONVENTION
;
822 m32r_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
824 return frame_unwind_register_unsigned (next_frame
, M32R_PC_REGNUM
);
827 /* Given a GDB frame, determine the address of the calling function's
828 frame. This will be used to create a new GDB frame struct. */
831 m32r_frame_this_id (struct frame_info
*this_frame
,
832 void **this_prologue_cache
, struct frame_id
*this_id
)
834 struct m32r_unwind_cache
*info
835 = m32r_frame_unwind_cache (this_frame
, this_prologue_cache
);
838 struct bound_minimal_symbol msym_stack
;
841 /* The FUNC is easy. */
842 func
= get_frame_func (this_frame
);
844 /* Check if the stack is empty. */
845 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
846 if (msym_stack
.minsym
&& info
->base
== BMSYMBOL_VALUE_ADDRESS (msym_stack
))
849 /* Hopefully the prologue analysis either correctly determined the
850 frame's base (which is the SP from the previous frame), or set
851 that base to "NULL". */
852 base
= info
->prev_sp
;
856 id
= frame_id_build (base
, func
);
860 static struct value
*
861 m32r_frame_prev_register (struct frame_info
*this_frame
,
862 void **this_prologue_cache
, int regnum
)
864 struct m32r_unwind_cache
*info
865 = m32r_frame_unwind_cache (this_frame
, this_prologue_cache
);
866 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
869 static const struct frame_unwind m32r_frame_unwind
= {
871 default_frame_unwind_stop_reason
,
873 m32r_frame_prev_register
,
875 default_frame_sniffer
879 m32r_frame_base_address (struct frame_info
*this_frame
, void **this_cache
)
881 struct m32r_unwind_cache
*info
882 = m32r_frame_unwind_cache (this_frame
, this_cache
);
886 static const struct frame_base m32r_frame_base
= {
888 m32r_frame_base_address
,
889 m32r_frame_base_address
,
890 m32r_frame_base_address
893 /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy
894 frame. The frame ID's base needs to match the TOS value saved by
895 save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */
897 static struct frame_id
898 m32r_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
900 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, M32R_SP_REGNUM
);
901 return frame_id_build (sp
, get_frame_pc (this_frame
));
905 static gdbarch_init_ftype m32r_gdbarch_init
;
907 static struct gdbarch
*
908 m32r_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
910 struct gdbarch
*gdbarch
;
911 struct gdbarch_tdep
*tdep
;
913 /* If there is already a candidate, use it. */
914 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
916 return arches
->gdbarch
;
918 /* Allocate space for the new architecture. */
919 tdep
= XNEW (struct gdbarch_tdep
);
920 gdbarch
= gdbarch_alloc (&info
, tdep
);
922 set_gdbarch_read_pc (gdbarch
, m32r_read_pc
);
923 set_gdbarch_unwind_sp (gdbarch
, m32r_unwind_sp
);
925 set_gdbarch_num_regs (gdbarch
, M32R_NUM_REGS
);
926 set_gdbarch_pc_regnum (gdbarch
, M32R_PC_REGNUM
);
927 set_gdbarch_sp_regnum (gdbarch
, M32R_SP_REGNUM
);
928 set_gdbarch_register_name (gdbarch
, m32r_register_name
);
929 set_gdbarch_register_type (gdbarch
, m32r_register_type
);
931 set_gdbarch_push_dummy_call (gdbarch
, m32r_push_dummy_call
);
932 set_gdbarch_return_value (gdbarch
, m32r_return_value
);
934 set_gdbarch_skip_prologue (gdbarch
, m32r_skip_prologue
);
935 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
936 set_gdbarch_breakpoint_from_pc (gdbarch
, m32r_breakpoint_from_pc
);
937 set_gdbarch_memory_insert_breakpoint (gdbarch
,
938 m32r_memory_insert_breakpoint
);
939 set_gdbarch_memory_remove_breakpoint (gdbarch
,
940 m32r_memory_remove_breakpoint
);
942 set_gdbarch_frame_align (gdbarch
, m32r_frame_align
);
944 frame_base_set_default (gdbarch
, &m32r_frame_base
);
946 /* Methods for saving / extracting a dummy frame's ID. The ID's
947 stack address must match the SP value returned by
948 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */
949 set_gdbarch_dummy_id (gdbarch
, m32r_dummy_id
);
951 /* Return the unwound PC value. */
952 set_gdbarch_unwind_pc (gdbarch
, m32r_unwind_pc
);
954 set_gdbarch_print_insn (gdbarch
, print_insn_m32r
);
956 /* Hook in ABI-specific overrides, if they have been registered. */
957 gdbarch_init_osabi (info
, gdbarch
);
959 /* Hook in the default unwinders. */
960 frame_unwind_append_unwinder (gdbarch
, &m32r_frame_unwind
);
962 /* Support simple overlay manager. */
963 set_gdbarch_overlay_update (gdbarch
, simple_overlay_update
);
969 _initialize_m32r_tdep (void)
971 register_gdbarch_init (bfd_arch_m32r
, m32r_gdbarch_init
);