2003-01-07 Andrew Cagney <cagney@redhat.com>
[binutils-gdb.git] / gdb / m68hc11-tdep.c
1 /* Target-dependent code for Motorola 68HC11 & 68HC12
2 Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by Stephane Carrez, stcarrez@nerim.fr
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21
22 #include "defs.h"
23 #include "frame.h"
24 #include "symtab.h"
25 #include "gdbtypes.h"
26 #include "gdbcmd.h"
27 #include "gdbcore.h"
28 #include "gdb_string.h"
29 #include "value.h"
30 #include "inferior.h"
31 #include "dis-asm.h"
32 #include "symfile.h"
33 #include "objfiles.h"
34 #include "arch-utils.h"
35 #include "regcache.h"
36
37 #include "target.h"
38 #include "opcode/m68hc11.h"
39 #include "elf/m68hc11.h"
40 #include "elf-bfd.h"
41
42 /* Macros for setting and testing a bit in a minimal symbol.
43 For 68HC11/68HC12 we have two flags that tell which return
44 type the function is using. This is used for prologue and frame
45 analysis to compute correct stack frame layout.
46
47 The MSB of the minimal symbol's "info" field is used for this purpose.
48 This field is already being used to store the symbol size, so the
49 assumption is that the symbol size cannot exceed 2^30.
50
51 MSYMBOL_SET_RTC Actually sets the "RTC" bit.
52 MSYMBOL_SET_RTI Actually sets the "RTI" bit.
53 MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol.
54 MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol.
55 MSYMBOL_SIZE Returns the size of the minimal symbol,
56 i.e. the "info" field with the "special" bit
57 masked out. */
58
59 #define MSYMBOL_SET_RTC(msym) \
60 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
61 | 0x80000000)
62
63 #define MSYMBOL_SET_RTI(msym) \
64 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
65 | 0x40000000)
66
67 #define MSYMBOL_IS_RTC(msym) \
68 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
69
70 #define MSYMBOL_IS_RTI(msym) \
71 (((long) MSYMBOL_INFO (msym) & 0x40000000) != 0)
72
73 #define MSYMBOL_SIZE(msym) \
74 ((long) MSYMBOL_INFO (msym) & 0x3fffffff)
75
76 enum insn_return_kind {
77 RETURN_RTS,
78 RETURN_RTC,
79 RETURN_RTI
80 };
81
82
83 /* Register numbers of various important registers.
84 Note that some of these values are "real" register numbers,
85 and correspond to the general registers of the machine,
86 and some are "phony" register numbers which are too large
87 to be actual register numbers as far as the user is concerned
88 but do serve to get the desired values when passed to read_register. */
89
90 #define HARD_X_REGNUM 0
91 #define HARD_D_REGNUM 1
92 #define HARD_Y_REGNUM 2
93 #define HARD_SP_REGNUM 3
94 #define HARD_PC_REGNUM 4
95
96 #define HARD_A_REGNUM 5
97 #define HARD_B_REGNUM 6
98 #define HARD_CCR_REGNUM 7
99
100 /* 68HC12 page number register.
101 Note: to keep a compatibility with gcc register naming, we must
102 not have to rename FP and other soft registers. The page register
103 is a real hard register and must therefore be counted by NUM_REGS.
104 For this it has the same number as Z register (which is not used). */
105 #define HARD_PAGE_REGNUM 8
106 #define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM)
107
108 /* Z is replaced by X or Y by gcc during machine reorg.
109 ??? There is no way to get it and even know whether
110 it's in X or Y or in ZS. */
111 #define SOFT_Z_REGNUM 8
112
113 /* Soft registers. These registers are special. There are treated
114 like normal hard registers by gcc and gdb (ie, within dwarf2 info).
115 They are physically located in memory. */
116 #define SOFT_FP_REGNUM 9
117 #define SOFT_TMP_REGNUM 10
118 #define SOFT_ZS_REGNUM 11
119 #define SOFT_XY_REGNUM 12
120 #define SOFT_UNUSED_REGNUM 13
121 #define SOFT_D1_REGNUM 14
122 #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31)
123 #define M68HC11_MAX_SOFT_REGS 32
124
125 #define M68HC11_NUM_REGS (8)
126 #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5)
127 #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS)
128
129 #define M68HC11_REG_SIZE (2)
130
131 #define M68HC12_NUM_REGS (9)
132 #define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1)
133 #define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1)
134
135 struct insn_sequence;
136 struct gdbarch_tdep
137 {
138 /* Stack pointer correction value. For 68hc11, the stack pointer points
139 to the next push location. An offset of 1 must be applied to obtain
140 the address where the last value is saved. For 68hc12, the stack
141 pointer points to the last value pushed. No offset is necessary. */
142 int stack_correction;
143
144 /* Description of instructions in the prologue. */
145 struct insn_sequence *prologue;
146
147 /* True if the page memory bank register is available
148 and must be used. */
149 int use_page_register;
150
151 /* ELF flags for ABI. */
152 int elf_flags;
153 };
154
155 #define M6811_TDEP gdbarch_tdep (current_gdbarch)
156 #define STACK_CORRECTION (M6811_TDEP->stack_correction)
157 #define USE_PAGE_REGISTER (M6811_TDEP->use_page_register)
158
159 struct frame_extra_info
160 {
161 CORE_ADDR return_pc;
162 int frameless;
163 int size;
164 enum insn_return_kind return_kind;
165 };
166
167 /* Table of registers for 68HC11. This includes the hard registers
168 and the soft registers used by GCC. */
169 static char *
170 m68hc11_register_names[] =
171 {
172 "x", "d", "y", "sp", "pc", "a", "b",
173 "ccr", "page", "frame","tmp", "zs", "xy", 0,
174 "d1", "d2", "d3", "d4", "d5", "d6", "d7",
175 "d8", "d9", "d10", "d11", "d12", "d13", "d14",
176 "d15", "d16", "d17", "d18", "d19", "d20", "d21",
177 "d22", "d23", "d24", "d25", "d26", "d27", "d28",
178 "d29", "d30", "d31", "d32"
179 };
180
181 struct m68hc11_soft_reg
182 {
183 const char *name;
184 CORE_ADDR addr;
185 };
186
187 static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS];
188
189 #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr
190
191 static int soft_min_addr;
192 static int soft_max_addr;
193 static int soft_reg_initialized = 0;
194
195 /* Look in the symbol table for the address of a pseudo register
196 in memory. If we don't find it, pretend the register is not used
197 and not available. */
198 static void
199 m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name)
200 {
201 struct minimal_symbol *msymbol;
202
203 msymbol = lookup_minimal_symbol (name, NULL, NULL);
204 if (msymbol)
205 {
206 reg->addr = SYMBOL_VALUE_ADDRESS (msymbol);
207 reg->name = xstrdup (name);
208
209 /* Keep track of the address range for soft registers. */
210 if (reg->addr < (CORE_ADDR) soft_min_addr)
211 soft_min_addr = reg->addr;
212 if (reg->addr > (CORE_ADDR) soft_max_addr)
213 soft_max_addr = reg->addr;
214 }
215 else
216 {
217 reg->name = 0;
218 reg->addr = 0;
219 }
220 }
221
222 /* Initialize the table of soft register addresses according
223 to the symbol table. */
224 static void
225 m68hc11_initialize_register_info (void)
226 {
227 int i;
228
229 if (soft_reg_initialized)
230 return;
231
232 soft_min_addr = INT_MAX;
233 soft_max_addr = 0;
234 for (i = 0; i < M68HC11_ALL_REGS; i++)
235 {
236 soft_regs[i].name = 0;
237 }
238
239 m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame");
240 m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp");
241 m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z");
242 soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM];
243 m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy");
244
245 for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++)
246 {
247 char buf[10];
248
249 sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1);
250 m68hc11_get_register_info (&soft_regs[i], buf);
251 }
252
253 if (soft_regs[SOFT_FP_REGNUM].name == 0)
254 {
255 warning ("No frame soft register found in the symbol table.\n");
256 warning ("Stack backtrace will not work.\n");
257 }
258 soft_reg_initialized = 1;
259 }
260
261 /* Given an address in memory, return the soft register number if
262 that address corresponds to a soft register. Returns -1 if not. */
263 static int
264 m68hc11_which_soft_register (CORE_ADDR addr)
265 {
266 int i;
267
268 if (addr < soft_min_addr || addr > soft_max_addr)
269 return -1;
270
271 for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++)
272 {
273 if (soft_regs[i].name && soft_regs[i].addr == addr)
274 return i;
275 }
276 return -1;
277 }
278
279 /* Fetch a pseudo register. The 68hc11 soft registers are treated like
280 pseudo registers. They are located in memory. Translate the register
281 fetch into a memory read. */
282 static void
283 m68hc11_pseudo_register_read (struct gdbarch *gdbarch,
284 struct regcache *regcache,
285 int regno, void *buf)
286 {
287 /* The PC is a pseudo reg only for 68HC12 with the memory bank
288 addressing mode. */
289 if (regno == M68HC12_HARD_PC_REGNUM)
290 {
291 const int regsize = TYPE_LENGTH (builtin_type_uint32);
292 CORE_ADDR pc = read_register (HARD_PC_REGNUM);
293 int page = read_register (HARD_PAGE_REGNUM);
294
295 if (pc >= 0x8000 && pc < 0xc000)
296 {
297 pc -= 0x8000;
298 pc += (page << 14);
299 pc += 0x1000000;
300 }
301 store_unsigned_integer (buf, regsize, pc);
302 return;
303 }
304
305 m68hc11_initialize_register_info ();
306
307 /* Fetch a soft register: translate into a memory read. */
308 if (soft_regs[regno].name)
309 {
310 target_read_memory (soft_regs[regno].addr, buf, 2);
311 }
312 else
313 {
314 memset (buf, 0, 2);
315 }
316 }
317
318 /* Store a pseudo register. Translate the register store
319 into a memory write. */
320 static void
321 m68hc11_pseudo_register_write (struct gdbarch *gdbarch,
322 struct regcache *regcache,
323 int regno, const void *buf)
324 {
325 /* The PC is a pseudo reg only for 68HC12 with the memory bank
326 addressing mode. */
327 if (regno == M68HC12_HARD_PC_REGNUM)
328 {
329 const int regsize = TYPE_LENGTH (builtin_type_uint32);
330 char *tmp = alloca (regsize);
331 CORE_ADDR pc;
332
333 memcpy (tmp, buf, regsize);
334 pc = extract_unsigned_integer (tmp, regsize);
335 if (pc >= 0x1000000)
336 {
337 pc -= 0x1000000;
338 write_register (HARD_PAGE_REGNUM, (pc >> 14) & 0x0ff);
339 pc &= 0x03fff;
340 write_register (HARD_PC_REGNUM, pc + 0x8000);
341 }
342 else
343 write_register (HARD_PC_REGNUM, pc);
344 return;
345 }
346
347 m68hc11_initialize_register_info ();
348
349 /* Store a soft register: translate into a memory write. */
350 if (soft_regs[regno].name)
351 {
352 const int regsize = 2;
353 char *tmp = alloca (regsize);
354 memcpy (tmp, buf, regsize);
355 target_write_memory (soft_regs[regno].addr, tmp, regsize);
356 }
357 }
358
359 static const char *
360 m68hc11_register_name (int reg_nr)
361 {
362 if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER)
363 return "pc";
364 if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER)
365 return "ppc";
366
367 if (reg_nr < 0)
368 return NULL;
369 if (reg_nr >= M68HC11_ALL_REGS)
370 return NULL;
371
372 /* If we don't know the address of a soft register, pretend it
373 does not exist. */
374 if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0)
375 return NULL;
376 return m68hc11_register_names[reg_nr];
377 }
378
379 static const unsigned char *
380 m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
381 {
382 static unsigned char breakpoint[] = {0x0};
383
384 *lenptr = sizeof (breakpoint);
385 return breakpoint;
386 }
387
388 /* Immediately after a function call, return the saved pc before the frame
389 is setup. */
390
391 static CORE_ADDR
392 m68hc11_saved_pc_after_call (struct frame_info *frame)
393 {
394 CORE_ADDR addr;
395
396 addr = read_register (HARD_SP_REGNUM) + STACK_CORRECTION;
397 addr &= 0x0ffff;
398 return read_memory_integer (addr, 2) & 0x0FFFF;
399 }
400
401 static CORE_ADDR
402 m68hc11_frame_saved_pc (struct frame_info *frame)
403 {
404 return frame->extra_info->return_pc;
405 }
406
407 static CORE_ADDR
408 m68hc11_frame_args_address (struct frame_info *frame)
409 {
410 CORE_ADDR addr;
411
412 addr = frame->frame + frame->extra_info->size + STACK_CORRECTION + 2;
413 if (frame->extra_info->return_kind == RETURN_RTC)
414 addr += 1;
415 else if (frame->extra_info->return_kind == RETURN_RTI)
416 addr += 7;
417
418 return addr;
419 }
420
421 static CORE_ADDR
422 m68hc11_frame_locals_address (struct frame_info *frame)
423 {
424 return frame->frame;
425 }
426
427 /* Discard from the stack the innermost frame, restoring all saved
428 registers. */
429
430 static void
431 m68hc11_pop_frame (void)
432 {
433 register struct frame_info *frame = get_current_frame ();
434 register CORE_ADDR fp, sp;
435 register int regnum;
436
437 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), frame->frame, frame->frame))
438 generic_pop_dummy_frame ();
439 else
440 {
441 fp = get_frame_base (frame);
442 FRAME_INIT_SAVED_REGS (frame);
443
444 /* Copy regs from where they were saved in the frame. */
445 for (regnum = 0; regnum < M68HC11_ALL_REGS; regnum++)
446 if (get_frame_saved_regs (frame)[regnum])
447 write_register (regnum,
448 read_memory_integer (get_frame_saved_regs (frame)[regnum], 2));
449
450 write_register (HARD_PC_REGNUM, frame->extra_info->return_pc);
451 sp = (fp + frame->extra_info->size + 2) & 0x0ffff;
452 write_register (HARD_SP_REGNUM, sp);
453 }
454 flush_cached_frames ();
455 }
456
457 \f
458 /* 68HC11 & 68HC12 prologue analysis.
459
460 */
461 #define MAX_CODES 12
462
463 /* 68HC11 opcodes. */
464 #undef M6811_OP_PAGE2
465 #define M6811_OP_PAGE2 (0x18)
466 #define M6811_OP_LDX (0xde)
467 #define M6811_OP_PSHX (0x3c)
468 #define M6811_OP_STS (0x9f)
469 #define M6811_OP_TSX (0x30)
470 #define M6811_OP_XGDX (0x8f)
471 #define M6811_OP_ADDD (0xc3)
472 #define M6811_OP_TXS (0x35)
473 #define M6811_OP_DES (0x34)
474
475 /* 68HC12 opcodes. */
476 #define M6812_OP_PAGE2 (0x18)
477 #define M6812_OP_MOVW (0x01)
478 #define M6812_PB_PSHW (0xae)
479 #define M6812_OP_STS (0x7f)
480 #define M6812_OP_LEAS (0x1b)
481 #define M6812_OP_PSHX (0x34)
482 #define M6812_OP_PSHY (0x35)
483
484 /* Operand extraction. */
485 #define OP_DIRECT (0x100) /* 8-byte direct addressing. */
486 #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */
487 #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */
488 #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */
489
490 /* Identification of the sequence. */
491 enum m6811_seq_type
492 {
493 P_LAST = 0,
494 P_SAVE_REG, /* Save a register on the stack. */
495 P_SET_FRAME, /* Setup the frame pointer. */
496 P_LOCAL_1, /* Allocate 1 byte for locals. */
497 P_LOCAL_2, /* Allocate 2 bytes for locals. */
498 P_LOCAL_N /* Allocate N bytes for locals. */
499 };
500
501 struct insn_sequence {
502 enum m6811_seq_type type;
503 unsigned length;
504 unsigned short code[MAX_CODES];
505 };
506
507 /* Sequence of instructions in the 68HC11 function prologue. */
508 static struct insn_sequence m6811_prologue[] = {
509 /* Sequences to save a soft-register. */
510 { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT,
511 M6811_OP_PSHX } },
512 { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT,
513 M6811_OP_PAGE2, M6811_OP_PSHX } },
514
515 /* Sequences to allocate local variables. */
516 { P_LOCAL_N, 7, { M6811_OP_TSX,
517 M6811_OP_XGDX,
518 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
519 M6811_OP_XGDX,
520 M6811_OP_TXS } },
521 { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX,
522 M6811_OP_PAGE2, M6811_OP_XGDX,
523 M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW,
524 M6811_OP_PAGE2, M6811_OP_XGDX,
525 M6811_OP_PAGE2, M6811_OP_TXS } },
526 { P_LOCAL_1, 1, { M6811_OP_DES } },
527 { P_LOCAL_2, 1, { M6811_OP_PSHX } },
528 { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } },
529
530 /* Initialize the frame pointer. */
531 { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } },
532 { P_LAST, 0, { 0 } }
533 };
534
535
536 /* Sequence of instructions in the 68HC12 function prologue. */
537 static struct insn_sequence m6812_prologue[] = {
538 { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW,
539 OP_IMM_HIGH, OP_IMM_LOW } },
540 { P_SET_FRAME, 3, { M6812_OP_STS, OP_IMM_HIGH, OP_IMM_LOW } },
541 { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } },
542 { P_LOCAL_2, 1, { M6812_OP_PSHX } },
543 { P_LOCAL_2, 1, { M6812_OP_PSHY } },
544 { P_LAST, 0 }
545 };
546
547
548 /* Analyze the sequence of instructions starting at the given address.
549 Returns a pointer to the sequence when it is recognized and
550 the optional value (constant/address) associated with it.
551 Advance the pc for the next sequence. */
552 static struct insn_sequence *
553 m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR *pc,
554 CORE_ADDR *val)
555 {
556 unsigned char buffer[MAX_CODES];
557 unsigned bufsize;
558 unsigned j;
559 CORE_ADDR cur_val;
560 short v = 0;
561
562 bufsize = 0;
563 for (; seq->type != P_LAST; seq++)
564 {
565 cur_val = 0;
566 for (j = 0; j < seq->length; j++)
567 {
568 if (bufsize < j + 1)
569 {
570 buffer[bufsize] = read_memory_unsigned_integer (*pc + bufsize,
571 1);
572 bufsize++;
573 }
574 /* Continue while we match the opcode. */
575 if (seq->code[j] == buffer[j])
576 continue;
577
578 if ((seq->code[j] & 0xf00) == 0)
579 break;
580
581 /* Extract a sequence parameter (address or constant). */
582 switch (seq->code[j])
583 {
584 case OP_DIRECT:
585 cur_val = (CORE_ADDR) buffer[j];
586 break;
587
588 case OP_IMM_HIGH:
589 cur_val = cur_val & 0x0ff;
590 cur_val |= (buffer[j] << 8);
591 break;
592
593 case OP_IMM_LOW:
594 cur_val &= 0x0ff00;
595 cur_val |= buffer[j];
596 break;
597
598 case OP_PBYTE:
599 if ((buffer[j] & 0xE0) == 0x80)
600 {
601 v = buffer[j] & 0x1f;
602 if (v & 0x10)
603 v |= 0xfff0;
604 }
605 else if ((buffer[j] & 0xfe) == 0xf0)
606 {
607 v = read_memory_unsigned_integer (*pc + j + 1, 1);
608 if (buffer[j] & 1)
609 v |= 0xff00;
610 *pc = *pc + 1;
611 }
612 else if (buffer[j] == 0xf2)
613 {
614 v = read_memory_unsigned_integer (*pc + j + 1, 2);
615 *pc = *pc + 2;
616 }
617 cur_val = v;
618 break;
619 }
620 }
621
622 /* We have a full match. */
623 if (j == seq->length)
624 {
625 *val = cur_val;
626 *pc = *pc + j;
627 return seq;
628 }
629 }
630 return 0;
631 }
632
633 /* Return the instruction that the function at the PC is using. */
634 static enum insn_return_kind
635 m68hc11_get_return_insn (CORE_ADDR pc)
636 {
637 struct minimal_symbol *sym;
638
639 /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT
640 function is stored by elfread.c in the high bit of the info field.
641 Use this to decide which instruction the function uses to return. */
642 sym = lookup_minimal_symbol_by_pc (pc);
643 if (sym == 0)
644 return RETURN_RTS;
645
646 if (MSYMBOL_IS_RTC (sym))
647 return RETURN_RTC;
648 else if (MSYMBOL_IS_RTI (sym))
649 return RETURN_RTI;
650 else
651 return RETURN_RTS;
652 }
653
654
655 /* Analyze the function prologue to find some information
656 about the function:
657 - the PC of the first line (for m68hc11_skip_prologue)
658 - the offset of the previous frame saved address (from current frame)
659 - the soft registers which are pushed. */
660 static void
661 m68hc11_guess_from_prologue (CORE_ADDR pc, CORE_ADDR fp,
662 CORE_ADDR *first_line,
663 int *frame_offset, CORE_ADDR *pushed_regs)
664 {
665 CORE_ADDR save_addr;
666 CORE_ADDR func_end;
667 int size;
668 int found_frame_point;
669 int saved_reg;
670 CORE_ADDR first_pc;
671 int done = 0;
672 struct insn_sequence *seq_table;
673
674 first_pc = get_pc_function_start (pc);
675 size = 0;
676
677 m68hc11_initialize_register_info ();
678 if (first_pc == 0)
679 {
680 *frame_offset = 0;
681 *first_line = pc;
682 return;
683 }
684
685 seq_table = gdbarch_tdep (current_gdbarch)->prologue;
686
687 /* The 68hc11 stack is as follows:
688
689
690 | |
691 +-----------+
692 | |
693 | args |
694 | |
695 +-----------+
696 | PC-return |
697 +-----------+
698 | Old frame |
699 +-----------+
700 | |
701 | Locals |
702 | |
703 +-----------+ <--- current frame
704 | |
705
706 With most processors (like 68K) the previous frame can be computed
707 easily because it is always at a fixed offset (see link/unlink).
708 That is, locals are accessed with negative offsets, arguments are
709 accessed with positive ones. Since 68hc11 only supports offsets
710 in the range [0..255], the frame is defined at the bottom of
711 locals (see picture).
712
713 The purpose of the analysis made here is to find out the size
714 of locals in this function. An alternative to this is to use
715 DWARF2 info. This would be better but I don't know how to
716 access dwarf2 debug from this function.
717
718 Walk from the function entry point to the point where we save
719 the frame. While walking instructions, compute the size of bytes
720 which are pushed. This gives us the index to access the previous
721 frame.
722
723 We limit the search to 128 bytes so that the algorithm is bounded
724 in case of random and wrong code. We also stop and abort if
725 we find an instruction which is not supposed to appear in the
726 prologue (as generated by gcc 2.95, 2.96).
727 */
728 pc = first_pc;
729 func_end = pc + 128;
730 found_frame_point = 0;
731 *frame_offset = 0;
732 save_addr = fp + STACK_CORRECTION;
733 while (!done && pc + 2 < func_end)
734 {
735 struct insn_sequence *seq;
736 CORE_ADDR val;
737
738 seq = m68hc11_analyze_instruction (seq_table, &pc, &val);
739 if (seq == 0)
740 break;
741
742 if (seq->type == P_SAVE_REG)
743 {
744 if (found_frame_point)
745 {
746 saved_reg = m68hc11_which_soft_register (val);
747 if (saved_reg < 0)
748 break;
749
750 save_addr -= 2;
751 if (pushed_regs)
752 pushed_regs[saved_reg] = save_addr;
753 }
754 else
755 {
756 size += 2;
757 }
758 }
759 else if (seq->type == P_SET_FRAME)
760 {
761 found_frame_point = 1;
762 *frame_offset = size;
763 }
764 else if (seq->type == P_LOCAL_1)
765 {
766 size += 1;
767 }
768 else if (seq->type == P_LOCAL_2)
769 {
770 size += 2;
771 }
772 else if (seq->type == P_LOCAL_N)
773 {
774 /* Stack pointer is decremented for the allocation. */
775 if (val & 0x8000)
776 size -= (int) (val) | 0xffff0000;
777 else
778 size -= val;
779 }
780 }
781 *first_line = pc;
782 }
783
784 static CORE_ADDR
785 m68hc11_skip_prologue (CORE_ADDR pc)
786 {
787 CORE_ADDR func_addr, func_end;
788 struct symtab_and_line sal;
789 int frame_offset;
790
791 /* If we have line debugging information, then the end of the
792 prologue should be the first assembly instruction of the
793 first source line. */
794 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
795 {
796 sal = find_pc_line (func_addr, 0);
797 if (sal.end && sal.end < func_end)
798 return sal.end;
799 }
800
801 m68hc11_guess_from_prologue (pc, 0, &pc, &frame_offset, 0);
802 return pc;
803 }
804
805 /* Given a GDB frame, determine the address of the calling function's
806 frame. This will be used to create a new GDB frame struct, and
807 then INIT_EXTRA_FRAME_INFO and DEPRECATED_INIT_FRAME_PC will be
808 called for the new frame. */
809
810 static CORE_ADDR
811 m68hc11_frame_chain (struct frame_info *frame)
812 {
813 CORE_ADDR addr;
814
815 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame), frame->frame, frame->frame))
816 return frame->frame; /* dummy frame same as caller's frame */
817
818 if (frame->extra_info->return_pc == 0
819 || inside_entry_file (frame->extra_info->return_pc))
820 return (CORE_ADDR) 0;
821
822 if (frame->frame == 0)
823 {
824 return (CORE_ADDR) 0;
825 }
826
827 addr = frame->frame + frame->extra_info->size + STACK_CORRECTION - 2;
828 addr = read_memory_unsigned_integer (addr, 2) & 0x0FFFF;
829 return addr;
830 }
831
832 /* Put here the code to store, into a struct frame_saved_regs, the
833 addresses of the saved registers of frame described by FRAME_INFO.
834 This includes special registers such as pc and fp saved in special
835 ways in the stack frame. sp is even more special: the address we
836 return for it IS the sp for the next frame. */
837 static void
838 m68hc11_frame_init_saved_regs (struct frame_info *fi)
839 {
840 CORE_ADDR pc;
841 CORE_ADDR addr;
842
843 if (get_frame_saved_regs (fi) == NULL)
844 frame_saved_regs_zalloc (fi);
845 else
846 memset (get_frame_saved_regs (fi), 0, SIZEOF_FRAME_SAVED_REGS);
847
848 pc = get_frame_pc (fi);
849 fi->extra_info->return_kind = m68hc11_get_return_insn (pc);
850 m68hc11_guess_from_prologue (pc, fi->frame, &pc, &fi->extra_info->size,
851 get_frame_saved_regs (fi));
852
853 addr = fi->frame + fi->extra_info->size + STACK_CORRECTION;
854 if (soft_regs[SOFT_FP_REGNUM].name)
855 get_frame_saved_regs (fi)[SOFT_FP_REGNUM] = addr - 2;
856
857 /* Take into account how the function was called/returns. */
858 if (fi->extra_info->return_kind == RETURN_RTC)
859 {
860 get_frame_saved_regs (fi)[HARD_PAGE_REGNUM] = addr;
861 addr++;
862 }
863 else if (fi->extra_info->return_kind == RETURN_RTI)
864 {
865 get_frame_saved_regs (fi)[HARD_CCR_REGNUM] = addr;
866 get_frame_saved_regs (fi)[HARD_D_REGNUM] = addr + 1;
867 get_frame_saved_regs (fi)[HARD_X_REGNUM] = addr + 3;
868 get_frame_saved_regs (fi)[HARD_Y_REGNUM] = addr + 5;
869 addr += 7;
870 }
871 get_frame_saved_regs (fi)[HARD_SP_REGNUM] = addr;
872 get_frame_saved_regs (fi)[HARD_PC_REGNUM] = get_frame_saved_regs (fi)[HARD_SP_REGNUM];
873 }
874
875 static void
876 m68hc11_init_extra_frame_info (int fromleaf, struct frame_info *fi)
877 {
878 CORE_ADDR addr;
879
880 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
881
882 if (fi->next)
883 deprecated_update_frame_pc_hack (fi, FRAME_SAVED_PC (fi->next));
884
885 m68hc11_frame_init_saved_regs (fi);
886
887 if (fromleaf)
888 {
889 fi->extra_info->return_kind = m68hc11_get_return_insn (get_frame_pc (fi));
890 fi->extra_info->return_pc = m68hc11_saved_pc_after_call (fi);
891 }
892 else
893 {
894 addr = get_frame_saved_regs (fi)[HARD_PC_REGNUM];
895 addr = read_memory_unsigned_integer (addr, 2) & 0x0ffff;
896
897 /* Take into account the 68HC12 specific call (PC + page). */
898 if (fi->extra_info->return_kind == RETURN_RTC
899 && addr >= 0x08000 && addr < 0x0c000
900 && USE_PAGE_REGISTER)
901 {
902 CORE_ADDR page_addr = get_frame_saved_regs (fi)[HARD_PAGE_REGNUM];
903
904 unsigned page = read_memory_unsigned_integer (page_addr, 1);
905 addr -= 0x08000;
906 addr += ((page & 0x0ff) << 14);
907 addr += 0x1000000;
908 }
909 fi->extra_info->return_pc = addr;
910 }
911 }
912
913 /* Same as 'info reg' but prints the registers in a different way. */
914 static void
915 show_regs (char *args, int from_tty)
916 {
917 int ccr = read_register (HARD_CCR_REGNUM);
918 int i;
919 int nr;
920
921 printf_filtered ("PC=%04x SP=%04x FP=%04x CCR=%02x %c%c%c%c%c%c%c%c\n",
922 (int) read_register (HARD_PC_REGNUM),
923 (int) read_register (HARD_SP_REGNUM),
924 (int) read_register (SOFT_FP_REGNUM),
925 ccr,
926 ccr & M6811_S_BIT ? 'S' : '-',
927 ccr & M6811_X_BIT ? 'X' : '-',
928 ccr & M6811_H_BIT ? 'H' : '-',
929 ccr & M6811_I_BIT ? 'I' : '-',
930 ccr & M6811_N_BIT ? 'N' : '-',
931 ccr & M6811_Z_BIT ? 'Z' : '-',
932 ccr & M6811_V_BIT ? 'V' : '-',
933 ccr & M6811_C_BIT ? 'C' : '-');
934
935 printf_filtered ("D=%04x IX=%04x IY=%04x",
936 (int) read_register (HARD_D_REGNUM),
937 (int) read_register (HARD_X_REGNUM),
938 (int) read_register (HARD_Y_REGNUM));
939
940 if (USE_PAGE_REGISTER)
941 {
942 printf_filtered (" Page=%02x",
943 (int) read_register (HARD_PAGE_REGNUM));
944 }
945 printf_filtered ("\n");
946
947 nr = 0;
948 for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++)
949 {
950 /* Skip registers which are not defined in the symbol table. */
951 if (soft_regs[i].name == 0)
952 continue;
953
954 printf_filtered ("D%d=%04x",
955 i - SOFT_D1_REGNUM + 1,
956 (int) read_register (i));
957 nr++;
958 if ((nr % 8) == 7)
959 printf_filtered ("\n");
960 else
961 printf_filtered (" ");
962 }
963 if (nr && (nr % 8) != 7)
964 printf_filtered ("\n");
965 }
966
967 static CORE_ADDR
968 m68hc11_stack_align (CORE_ADDR addr)
969 {
970 return ((addr + 1) & -2);
971 }
972
973 static CORE_ADDR
974 m68hc11_push_arguments (int nargs,
975 struct value **args,
976 CORE_ADDR sp,
977 int struct_return,
978 CORE_ADDR struct_addr)
979 {
980 int stack_alloc;
981 int argnum;
982 int first_stack_argnum;
983 int stack_offset;
984 struct type *type;
985 char *val;
986 int len;
987
988 stack_alloc = 0;
989 first_stack_argnum = 0;
990 if (struct_return)
991 {
992 /* The struct is allocated on the stack and gdb used the stack
993 pointer for the address of that struct. We must apply the
994 stack offset on the address. */
995 write_register (HARD_D_REGNUM, struct_addr + STACK_CORRECTION);
996 }
997 else if (nargs > 0)
998 {
999 type = VALUE_TYPE (args[0]);
1000 len = TYPE_LENGTH (type);
1001
1002 /* First argument is passed in D and X registers. */
1003 if (len <= 4)
1004 {
1005 LONGEST v = extract_unsigned_integer (VALUE_CONTENTS (args[0]), len);
1006 first_stack_argnum = 1;
1007 write_register (HARD_D_REGNUM, v);
1008 if (len > 2)
1009 {
1010 v >>= 16;
1011 write_register (HARD_X_REGNUM, v);
1012 }
1013 }
1014 }
1015 for (argnum = first_stack_argnum; argnum < nargs; argnum++)
1016 {
1017 type = VALUE_TYPE (args[argnum]);
1018 stack_alloc += (TYPE_LENGTH (type) + 1) & -2;
1019 }
1020 sp -= stack_alloc;
1021
1022 stack_offset = STACK_CORRECTION;
1023 for (argnum = first_stack_argnum; argnum < nargs; argnum++)
1024 {
1025 type = VALUE_TYPE (args[argnum]);
1026 len = TYPE_LENGTH (type);
1027
1028 val = (char*) VALUE_CONTENTS (args[argnum]);
1029 write_memory (sp + stack_offset, val, len);
1030 stack_offset += len;
1031 if (len & 1)
1032 {
1033 static char zero = 0;
1034
1035 write_memory (sp + stack_offset, &zero, 1);
1036 stack_offset++;
1037 }
1038 }
1039 return sp;
1040 }
1041
1042
1043 /* Return a location where we can set a breakpoint that will be hit
1044 when an inferior function call returns. */
1045 CORE_ADDR
1046 m68hc11_call_dummy_address (void)
1047 {
1048 return entry_point_address ();
1049 }
1050
1051 static struct type *
1052 m68hc11_register_virtual_type (int reg_nr)
1053 {
1054 switch (reg_nr)
1055 {
1056 case HARD_PAGE_REGNUM:
1057 case HARD_A_REGNUM:
1058 case HARD_B_REGNUM:
1059 case HARD_CCR_REGNUM:
1060 return builtin_type_uint8;
1061
1062 case M68HC12_HARD_PC_REGNUM:
1063 return builtin_type_uint32;
1064
1065 default:
1066 return builtin_type_uint16;
1067 }
1068 }
1069
1070 static void
1071 m68hc11_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1072 {
1073 /* The struct address computed by gdb is on the stack.
1074 It uses the stack pointer so we must apply the stack
1075 correction offset. */
1076 write_register (HARD_D_REGNUM, addr + STACK_CORRECTION);
1077 }
1078
1079 static void
1080 m68hc11_store_return_value (struct type *type, char *valbuf)
1081 {
1082 int len;
1083
1084 len = TYPE_LENGTH (type);
1085
1086 /* First argument is passed in D and X registers. */
1087 if (len <= 4)
1088 {
1089 LONGEST v = extract_unsigned_integer (valbuf, len);
1090
1091 write_register (HARD_D_REGNUM, v);
1092 if (len > 2)
1093 {
1094 v >>= 16;
1095 write_register (HARD_X_REGNUM, v);
1096 }
1097 }
1098 else
1099 error ("return of value > 4 is not supported.");
1100 }
1101
1102
1103 /* Given a return value in `regbuf' with a type `type',
1104 extract and copy its value into `valbuf'. */
1105
1106 static void
1107 m68hc11_extract_return_value (struct type *type,
1108 char *regbuf,
1109 char *valbuf)
1110 {
1111 int len = TYPE_LENGTH (type);
1112
1113 switch (len)
1114 {
1115 case 1:
1116 memcpy (valbuf, &regbuf[HARD_D_REGNUM * 2 + 1], len);
1117 break;
1118
1119 case 2:
1120 memcpy (valbuf, &regbuf[HARD_D_REGNUM * 2], len);
1121 break;
1122
1123 case 3:
1124 memcpy (&valbuf[0], &regbuf[HARD_X_REGNUM * 2 + 1], 1);
1125 memcpy (&valbuf[1], &regbuf[HARD_D_REGNUM * 2], 2);
1126 break;
1127
1128 case 4:
1129 memcpy (&valbuf[0], &regbuf[HARD_X_REGNUM * 2], 2);
1130 memcpy (&valbuf[2], &regbuf[HARD_D_REGNUM * 2], 2);
1131 break;
1132
1133 default:
1134 error ("bad size for return value");
1135 }
1136 }
1137
1138 /* Should call_function allocate stack space for a struct return? */
1139 static int
1140 m68hc11_use_struct_convention (int gcc_p, struct type *type)
1141 {
1142 return (TYPE_CODE (type) == TYPE_CODE_STRUCT
1143 || TYPE_CODE (type) == TYPE_CODE_UNION
1144 || TYPE_LENGTH (type) > 4);
1145 }
1146
1147 static int
1148 m68hc11_return_value_on_stack (struct type *type)
1149 {
1150 return TYPE_LENGTH (type) > 4;
1151 }
1152
1153 /* Extract from an array REGBUF containing the (raw) register state
1154 the address in which a function should return its structure value,
1155 as a CORE_ADDR (or an expression that can be used as one). */
1156 static CORE_ADDR
1157 m68hc11_extract_struct_value_address (char *regbuf)
1158 {
1159 return extract_address (&regbuf[HARD_D_REGNUM * 2],
1160 REGISTER_RAW_SIZE (HARD_D_REGNUM));
1161 }
1162
1163 /* Function: push_return_address (pc)
1164 Set up the return address for the inferior function call.
1165 Needed for targets where we don't actually execute a JSR/BSR instruction */
1166
1167 static CORE_ADDR
1168 m68hc11_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
1169 {
1170 char valbuf[2];
1171
1172 pc = CALL_DUMMY_ADDRESS ();
1173 sp -= 2;
1174 store_unsigned_integer (valbuf, 2, pc);
1175 write_memory (sp + STACK_CORRECTION, valbuf, 2);
1176 return sp;
1177 }
1178
1179 /* Test whether the ELF symbol corresponds to a function using rtc or
1180 rti to return. */
1181
1182 static void
1183 m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
1184 {
1185 unsigned char flags;
1186
1187 flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other;
1188 if (flags & STO_M68HC12_FAR)
1189 MSYMBOL_SET_RTC (msym);
1190 if (flags & STO_M68HC12_INTERRUPT)
1191 MSYMBOL_SET_RTI (msym);
1192 }
1193
1194 static int
1195 gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info)
1196 {
1197 if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11)
1198 return print_insn_m68hc11 (memaddr, info);
1199 else
1200 return print_insn_m68hc12 (memaddr, info);
1201 }
1202
1203 static struct gdbarch *
1204 m68hc11_gdbarch_init (struct gdbarch_info info,
1205 struct gdbarch_list *arches)
1206 {
1207 static LONGEST m68hc11_call_dummy_words[] =
1208 {0};
1209 struct gdbarch *gdbarch;
1210 struct gdbarch_tdep *tdep;
1211 int elf_flags;
1212
1213 soft_reg_initialized = 0;
1214
1215 /* Extract the elf_flags if available. */
1216 if (info.abfd != NULL
1217 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
1218 elf_flags = elf_elfheader (info.abfd)->e_flags;
1219 else
1220 elf_flags = 0;
1221
1222 /* try to find a pre-existing architecture */
1223 for (arches = gdbarch_list_lookup_by_info (arches, &info);
1224 arches != NULL;
1225 arches = gdbarch_list_lookup_by_info (arches->next, &info))
1226 {
1227 if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
1228 continue;
1229
1230 return arches->gdbarch;
1231 }
1232
1233 /* Need a new architecture. Fill in a target specific vector. */
1234 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1235 gdbarch = gdbarch_alloc (&info, tdep);
1236 tdep->elf_flags = elf_flags;
1237
1238 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
1239 ready to unwind the PC first (see frame.c:get_prev_frame()). */
1240 set_gdbarch_deprecated_init_frame_pc (gdbarch, init_frame_pc_default);
1241
1242 switch (info.bfd_arch_info->arch)
1243 {
1244 case bfd_arch_m68hc11:
1245 tdep->stack_correction = 1;
1246 tdep->use_page_register = 0;
1247 tdep->prologue = m6811_prologue;
1248 set_gdbarch_addr_bit (gdbarch, 16);
1249 set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS);
1250 set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM);
1251 set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS);
1252 break;
1253
1254 case bfd_arch_m68hc12:
1255 tdep->stack_correction = 0;
1256 tdep->use_page_register = elf_flags & E_M68HC12_BANKS;
1257 tdep->prologue = m6812_prologue;
1258 set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16);
1259 set_gdbarch_num_pseudo_regs (gdbarch,
1260 elf_flags & E_M68HC12_BANKS
1261 ? M68HC12_NUM_PSEUDO_REGS
1262 : M68HC11_NUM_PSEUDO_REGS);
1263 set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS
1264 ? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM);
1265 set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS
1266 ? M68HC12_NUM_REGS : M68HC11_NUM_REGS);
1267 break;
1268
1269 default:
1270 break;
1271 }
1272
1273 /* Initially set everything according to the ABI.
1274 Use 16-bit integers since it will be the case for most
1275 programs. The size of these types should normally be set
1276 according to the dwarf2 debug information. */
1277 set_gdbarch_short_bit (gdbarch, 16);
1278 set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16);
1279 set_gdbarch_float_bit (gdbarch, 32);
1280 set_gdbarch_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32);
1281 set_gdbarch_long_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32);
1282 set_gdbarch_long_bit (gdbarch, 32);
1283 set_gdbarch_ptr_bit (gdbarch, 16);
1284 set_gdbarch_long_long_bit (gdbarch, 64);
1285
1286 /* Set register info. */
1287 set_gdbarch_fp0_regnum (gdbarch, -1);
1288 set_gdbarch_max_register_raw_size (gdbarch, 2);
1289 set_gdbarch_max_register_virtual_size (gdbarch, 2);
1290 set_gdbarch_frame_init_saved_regs (gdbarch, m68hc11_frame_init_saved_regs);
1291 set_gdbarch_frame_args_skip (gdbarch, 0);
1292
1293 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
1294 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
1295 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
1296 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
1297 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
1298
1299 set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM);
1300 set_gdbarch_fp_regnum (gdbarch, SOFT_FP_REGNUM);
1301 set_gdbarch_register_name (gdbarch, m68hc11_register_name);
1302 set_gdbarch_register_size (gdbarch, 2);
1303 set_gdbarch_register_bytes (gdbarch, M68HC11_ALL_REGS * 2);
1304 set_gdbarch_register_virtual_type (gdbarch, m68hc11_register_virtual_type);
1305 set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read);
1306 set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write);
1307
1308 set_gdbarch_call_dummy_length (gdbarch, 0);
1309 set_gdbarch_call_dummy_address (gdbarch, m68hc11_call_dummy_address);
1310 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); /*???*/
1311 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1312 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1313 set_gdbarch_call_dummy_words (gdbarch, m68hc11_call_dummy_words);
1314 set_gdbarch_sizeof_call_dummy_words (gdbarch,
1315 sizeof (m68hc11_call_dummy_words));
1316 set_gdbarch_call_dummy_p (gdbarch, 1);
1317 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1318 set_gdbarch_get_saved_register (gdbarch, deprecated_generic_get_saved_register);
1319 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1320 set_gdbarch_deprecated_extract_return_value (gdbarch, m68hc11_extract_return_value);
1321 set_gdbarch_push_arguments (gdbarch, m68hc11_push_arguments);
1322 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1323 set_gdbarch_push_return_address (gdbarch, m68hc11_push_return_address);
1324 set_gdbarch_return_value_on_stack (gdbarch, m68hc11_return_value_on_stack);
1325
1326 set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return);
1327 set_gdbarch_deprecated_store_return_value (gdbarch, m68hc11_store_return_value);
1328 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, m68hc11_extract_struct_value_address);
1329 set_gdbarch_register_convertible (gdbarch, generic_register_convertible_not);
1330
1331
1332 set_gdbarch_frame_chain (gdbarch, m68hc11_frame_chain);
1333 set_gdbarch_frame_saved_pc (gdbarch, m68hc11_frame_saved_pc);
1334 set_gdbarch_frame_args_address (gdbarch, m68hc11_frame_args_address);
1335 set_gdbarch_frame_locals_address (gdbarch, m68hc11_frame_locals_address);
1336 set_gdbarch_saved_pc_after_call (gdbarch, m68hc11_saved_pc_after_call);
1337 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1338
1339 set_gdbarch_get_saved_register (gdbarch, deprecated_generic_get_saved_register);
1340
1341 set_gdbarch_store_struct_return (gdbarch, m68hc11_store_struct_return);
1342 set_gdbarch_deprecated_store_return_value (gdbarch, m68hc11_store_return_value);
1343 set_gdbarch_deprecated_extract_struct_value_address
1344 (gdbarch, m68hc11_extract_struct_value_address);
1345 set_gdbarch_use_struct_convention (gdbarch, m68hc11_use_struct_convention);
1346 set_gdbarch_init_extra_frame_info (gdbarch, m68hc11_init_extra_frame_info);
1347 set_gdbarch_pop_frame (gdbarch, m68hc11_pop_frame);
1348 set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue);
1349 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1350 set_gdbarch_decr_pc_after_break (gdbarch, 0);
1351 set_gdbarch_function_start_offset (gdbarch, 0);
1352 set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc);
1353 set_gdbarch_stack_align (gdbarch, m68hc11_stack_align);
1354 set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11);
1355
1356 /* Minsymbol frobbing. */
1357 set_gdbarch_elf_make_msymbol_special (gdbarch,
1358 m68hc11_elf_make_msymbol_special);
1359
1360 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1361
1362 return gdbarch;
1363 }
1364
1365 void
1366 _initialize_m68hc11_tdep (void)
1367 {
1368 register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init);
1369 register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init);
1370
1371 add_com ("regs", class_vars, show_regs, "Print all registers");
1372 }
1373