* m88k-tdep.c (examine_prologue): Deal with OR instructions
[binutils-gdb.git] / gdb / m88k-tdep.c
1 /* Target-machine dependent code for Motorola 88000 series, for GDB.
2 Copyright (C) 1988, 1990, 1991 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20 #include <stdio.h>
21 #include "defs.h"
22 #include "param.h"
23 #include "frame.h"
24 #include "inferior.h"
25 #include "value.h"
26
27 #ifdef USG
28 #include <sys/types.h>
29 #endif
30
31 #include <sys/param.h>
32 #include <sys/dir.h>
33 #include <signal.h>
34 #include "gdbcore.h"
35 #include <sys/user.h>
36 #ifndef USER /* added to support BCS ptrace_user */
37
38 #define USER ptrace_user
39 #endif
40 #include <sys/ioctl.h>
41 #include <fcntl.h>
42
43 #include <sys/file.h>
44 #include <sys/stat.h>
45
46 #include "symtab.h"
47 #include "setjmp.h"
48 #include "value.h"
49
50 void frame_find_saved_regs ();
51
52
53 /* Given a GDB frame, determine the address of the calling function's frame.
54 This will be used to create a new GDB frame struct, and then
55 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
56
57 For us, the frame address is its stack pointer value, so we look up
58 the function prologue to determine the caller's sp value, and return it. */
59
60 FRAME_ADDR
61 frame_chain (thisframe)
62 FRAME thisframe;
63 {
64
65 frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0);
66 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
67 the ADDRESS, of SP_REGNUM. It also depends on the cache of
68 frame_find_saved_regs results. */
69 if (thisframe->fsr->regs[SP_REGNUM])
70 return thisframe->fsr->regs[SP_REGNUM];
71 else
72 return thisframe->frame; /* Leaf fn -- next frame up has same SP. */
73 }
74
75 int
76 frameless_function_invocation (frame)
77 FRAME frame;
78 {
79
80 frame_find_saved_regs (frame, (struct frame_saved_regs *) 0);
81 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
82 the ADDRESS, of SP_REGNUM. It also depends on the cache of
83 frame_find_saved_regs results. */
84 if (frame->fsr->regs[SP_REGNUM])
85 return 0; /* Frameful -- return addr saved somewhere */
86 else
87 return 1; /* Frameless -- no saved return address */
88 }
89
90 int
91 frame_chain_valid (chain, thisframe)
92 CORE_ADDR chain;
93 struct frame_info *thisframe;
94 {
95 return (chain != 0
96 && outside_startup_file (FRAME_SAVED_PC (thisframe)));
97 }
98
99 CORE_ADDR
100 frame_chain_combine (chain, thisframe)
101 CORE_ADDR chain;
102 {
103 return chain;
104 }
105
106 void
107 init_extra_frame_info (fromleaf, fi)
108 int fromleaf;
109 struct frame_info *fi;
110 {
111 fi->fsr = 0; /* Not yet allocated */
112 fi->args_pointer = 0; /* Unknown */
113 fi->locals_pointer = 0; /* Unknown */
114 }
115
116 void
117 init_frame_pc (fromleaf, prev)
118 int fromleaf;
119 struct frame_info *prev;
120 {
121 /* FIXME, for now it's the default from blockframe.c. If it stays that
122 way, remove it entirely from here. */
123 prev->pc = (fromleaf ? SAVED_PC_AFTER_CALL (prev->next) :
124 prev->next ? FRAME_SAVED_PC (prev->next) : read_pc ());
125
126 }
127 \f
128 /* Examine an m88k function prologue, recording the addresses at which
129 registers are saved explicitly by the prologue code, and returning
130 the address of the first instruction after the prologue (but not
131 after the instruction at address LIMIT, as explained below).
132
133 LIMIT places an upper bound on addresses of the instructions to be
134 examined. If the prologue code scan reaches LIMIT, the scan is
135 aborted and LIMIT is returned. This is used, when examining the
136 prologue for the current frame, to keep examine_prologue () from
137 claiming that a given register has been saved when in fact the
138 instruction that saves it has not yet been executed. LIMIT is used
139 at other times to stop the scan when we hit code after the true
140 function prologue (e.g. for the first source line) which might
141 otherwise be mistaken for function prologue.
142
143 The format of the function prologue matched by this routine is
144 derived from examination of the source to gcc 1.95, particularly
145 the routine output_prologue () in config/out-m88k.c.
146
147 subu r31,r31,n # stack pointer update
148
149 (st rn,r31,offset)? # save incoming regs
150 (st.d rn,r31,offset)?
151
152 (addu r30,r31,n)? # frame pointer update
153
154 (pic sequence)? # PIC code prologue
155
156 (or rn,rm,0)? # Move parameters to other regs
157 */
158
159 /* Macros for extracting fields from instructions. */
160
161 #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
162 #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
163
164 /* Prologue code that handles position-independent-code setup. */
165
166 struct pic_prologue_code {
167 unsigned long insn, mask;
168 };
169
170 static struct pic_prologue_code pic_prologue_code [] = {
171 /* FIXME -- until this is translated to hex, we won't match it... */
172 0xffffffff, 0,
173 /* or r10,r1,0 (if not saved) */
174 /* bsr.n LabN */
175 /* or.u r25,r0,const */
176 /*LabN: or r25,r25,const2 */
177 /* addu r25,r25,1 */
178 /* or r1,r10,0 (if not saved) */
179 };
180
181 /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
182 is not the address of a valid instruction, the address of the next
183 instruction beyond ADDR otherwise. *PWORD1 receives the first word
184 of the instruction. PWORD2 is ignored -- a remnant of the original
185 i960 version. */
186
187 #define NEXT_PROLOGUE_INSN(addr, lim, pword1, pword2) \
188 (((addr) < (lim)) ? next_insn (addr, pword1) : 0)
189
190 /* Read the m88k instruction at 'memaddr' and return the address of
191 the next instruction after that, or 0 if 'memaddr' is not the
192 address of a valid instruction. The instruction
193 is stored at 'pword1'. */
194
195 CORE_ADDR
196 next_insn (memaddr, pword1)
197 unsigned long *pword1;
198 CORE_ADDR memaddr;
199 {
200 unsigned long buf[1];
201
202 read_memory (memaddr, buf, sizeof (buf));
203 *pword1 = buf[0];
204 SWAP_TARGET_AND_HOST (pword1, sizeof (long));
205
206 return memaddr + 4;
207 }
208
209 /* Read a register from frames called by us (or from the hardware regs). */
210
211 int
212 read_next_frame_reg(fi, regno)
213 FRAME fi;
214 int regno;
215 {
216 for (; fi; fi = fi->next) {
217 if (regno == SP_REGNUM) return fi->frame;
218 else if (fi->fsr->regs[regno])
219 return read_memory_integer(fi->fsr->regs[regno], 4);
220 }
221 return read_register(regno);
222 }
223
224 /* Examine the prologue of a function. `ip' points to the first instruction.
225 `limit' is the limit of the prologue (e.g. the addr of the first
226 linenumber, or perhaps the program counter if we're stepping through).
227 `frame_sp' is the stack pointer value in use in this frame.
228 `fsr' is a pointer to a frame_saved_regs structure into which we put
229 info about the registers saved by this frame.
230 `fi' is a struct frame_info pointer; we fill in various fields in it
231 to reflect the offsets of the arg pointer and the locals pointer. */
232
233 static CORE_ADDR
234 examine_prologue (ip, limit, frame_sp, fsr, fi)
235 register CORE_ADDR ip;
236 register CORE_ADDR limit;
237 FRAME_ADDR frame_sp;
238 struct frame_saved_regs *fsr;
239 struct frame_info *fi;
240 {
241 register CORE_ADDR next_ip;
242 register int src;
243 register struct pic_prologue_code *pcode;
244 unsigned int insn1, insn2;
245 int size, offset;
246 char must_adjust[32]; /* If set, must adjust offsets in fsr */
247 int sp_offset = -1; /* -1 means not set (valid must be mult of 8) */
248 int fp_offset = -1; /* -1 means not set */
249 CORE_ADDR frame_fp;
250
251 bzero (must_adjust, sizeof (must_adjust));
252 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
253
254 /* Accept an optional "subu sp,sp,n" to set up the stack pointer. */
255
256 #define SUBU_SP_INSN 0x67ff0000
257 #define SUBU_SP_MASK 0xffff0007 /* Note offset must be mult. of 8 */
258 #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
259 if (next_ip &&
260 ((insn1 & SUBU_SP_MASK) == SUBU_SP_INSN)) /* subu r31, r31, N */
261 {
262 sp_offset = -SUBU_OFFSET (insn1);
263 ip = next_ip;
264 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
265 }
266
267 /* The function must start with a stack-pointer adjustment, or
268 we don't know WHAT'S going on... */
269 if (sp_offset == -1)
270 return ip;
271
272 /* Accept zero or more instances of "st rx,sp,n" or "st.d rx,sp,n".
273 This may cause us to mistake the copying of a register
274 parameter to the frame for the saving of a callee-saved
275 register, but that can't be helped, since with the
276 "-fcall-saved" flag, any register can be made callee-saved.
277 This probably doesn't matter, since the ``saved'' caller's values of
278 non-callee-saved registers are not relevant anyway. */
279
280 #define STD_STACK_INSN 0x201f0000
281 #define STD_STACK_MASK 0xfc1f0000
282 #define ST_STACK_INSN 0x241f0000
283 #define ST_STACK_MASK 0xfc1f0000
284 #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
285 #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
286
287 while (next_ip)
288 {
289 if ((insn1 & ST_STACK_MASK) == ST_STACK_INSN)
290 size = 1;
291 else if ((insn1 & STD_STACK_MASK) == STD_STACK_INSN)
292 size = 2;
293 else
294 break;
295
296 src = ST_SRC (insn1);
297 offset = ST_OFFSET (insn1);
298 while (size--)
299 {
300 must_adjust[src] = 1;
301 fsr->regs[src++] = offset; /* Will be adjusted later */
302 offset += 4;
303 }
304 ip = next_ip;
305 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
306 }
307
308 /* Accept an optional "addu r30,r31,n" to set up the frame pointer. */
309
310 #define ADDU_FP_INSN 0x63df0000
311 #define ADDU_FP_MASK 0xffff0000
312 #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
313 if (next_ip &&
314 ((insn1 & ADDU_FP_MASK) == ADDU_FP_INSN)) /* addu r30, r31, N */
315 {
316 fp_offset = ADDU_OFFSET (insn1);
317 ip = next_ip;
318 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
319 }
320
321 /* Accept the PIC prologue code if present. */
322
323 pcode = pic_prologue_code;
324 size = sizeof (pic_prologue_code) / sizeof (*pic_prologue_code);
325 /* If return addr is saved, we don't use first or last insn of PICstuff. */
326 if (fsr->regs[SRP_REGNUM]) {
327 pcode++;
328 size-=2;
329 }
330
331 while (size-- && next_ip && (pcode->insn == (pcode->mask & insn1)))
332 {
333 pcode++;
334 ip = next_ip;
335 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
336 }
337
338 /* Accept moves of parameter registers to other registers, using
339 "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
340 We don't have to worry about walking into the first lines of code,
341 since the first line number will stop us (assuming we have symbols).
342 What gcc actually seems to produce is "or rd,r0,rs". */
343
344 #define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
345 #define OR_MOVE_MASK 0xF800FFFF
346 #define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
347 #define OR_REG_MOVE1_MASK 0xFC1FFFE0
348 #define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
349 #define OR_REG_MOVE2_MASK 0xFC00FFFF
350 while (next_ip &&
351 ((insn1 & OR_MOVE_MASK) == OR_MOVE_INSN ||
352 (insn1 & OR_REG_MOVE1_MASK) == OR_REG_MOVE1_INSN ||
353 (insn1 & OR_REG_MOVE2_MASK) == OR_REG_MOVE2_INSN
354 )
355 )
356 {
357 /* We don't care what moves to where. The result of the moves
358 has already been reflected in what the compiler tells us is the
359 location of these parameters. */
360 ip = next_ip;
361 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn1, &insn2);
362 }
363
364 /* We're done with the prologue. If we don't care about the stack
365 frame itself, just return. (Note that fsr->regs has been trashed,
366 but the one caller who calls with fi==0 passes a dummy there.) */
367
368 if (fi == 0)
369 return ip;
370
371 /* OK, now we have:
372 sp_offset original negative displacement of SP
373 fp_offset positive displacement between new SP and new FP, or -1
374 fsr->regs[0..31] offset from original SP where reg is stored
375 must_adjust[0..31] set if corresp. offset was set
376
377 The current SP (frame_sp) might not be the original new SP as set
378 by the function prologue, if alloca has been called. This can
379 only occur if fp_offset is set, though (the compiler allocates an
380 FP when it sees alloca). In that case, we have the FP,
381 and can calculate the original new SP from the FP.
382
383 Then, we figure out where the arguments and locals are, and
384 relocate the offsets in fsr->regs to absolute addresses. */
385
386 if (fp_offset != -1) {
387 /* We have a frame pointer, so get it, and base our calc's on it. */
388 frame_fp = (CORE_ADDR) read_next_frame_reg (fi->next, FP_REGNUM);
389 frame_sp = frame_fp - fp_offset;
390 } else {
391 /* We have no frame pointer, therefore frame_sp is still the same value
392 as set by prologue. But where is the frame itself? */
393 if (must_adjust[SRP_REGNUM]) {
394 /* Function header saved SRP (r1), the return address. Frame starts
395 4 bytes down from where it was saved. */
396 frame_fp = frame_sp + fsr->regs[SRP_REGNUM] - 4;
397 fi->locals_pointer = frame_fp;
398 } else {
399 /* Function header didn't save SRP (r1), so we are in a leaf fn or
400 are otherwise confused. */
401 frame_fp = -1;
402 }
403 }
404
405 /* The locals are relative to the FP (whether it exists as an allocated
406 register, or just as an assumed offset from the SP) */
407 fi->locals_pointer = frame_fp;
408
409 /* The arguments are just above the SP as it was before we adjusted it
410 on entry. */
411 fi->args_pointer = frame_sp - sp_offset;
412
413 /* Now that we know the SP value used by the prologue, we know where
414 it saved all the registers. */
415 for (src = 0; src < 32; src++)
416 if (must_adjust[src])
417 fsr->regs[src] += frame_sp;
418
419 /* The saved value of the SP is always known. */
420 /* (we hope...) */
421 if (fsr->regs[SP_REGNUM] != 0
422 && fsr->regs[SP_REGNUM] != frame_sp - sp_offset)
423 fprintf(stderr, "Bad saved SP value %x != %x, offset %x!\n",
424 fsr->regs[SP_REGNUM],
425 frame_sp - sp_offset, sp_offset);
426
427 fsr->regs[SP_REGNUM] = frame_sp - sp_offset;
428
429 return (ip);
430 }
431
432 /* Given an ip value corresponding to the start of a function,
433 return the ip of the first instruction after the function
434 prologue. */
435
436 CORE_ADDR
437 skip_prologue (ip)
438 CORE_ADDR (ip);
439 {
440 struct frame_saved_regs saved_regs_dummy;
441 struct symtab_and_line sal;
442 CORE_ADDR limit;
443
444 sal = find_pc_line (ip, 0);
445 limit = (sal.end) ? sal.end : 0xffffffff;
446
447 return (examine_prologue (ip, limit, (FRAME_ADDR) 0, &saved_regs_dummy,
448 (struct frame_info *)0 ));
449 }
450
451 /* Put here the code to store, into a struct frame_saved_regs,
452 the addresses of the saved registers of frame described by FRAME_INFO.
453 This includes special registers such as pc and fp saved in special
454 ways in the stack frame. sp is even more special:
455 the address we return for it IS the sp for the next frame.
456
457 We cache the result of doing this in the frame_cache_obstack, since
458 it is fairly expensive. */
459
460 void
461 frame_find_saved_regs (fi, fsr)
462 struct frame_info *fi;
463 struct frame_saved_regs *fsr;
464 {
465 register CORE_ADDR next_addr;
466 register CORE_ADDR *saved_regs;
467 register int regnum;
468 register struct frame_saved_regs *cache_fsr;
469 extern struct obstack frame_cache_obstack;
470 CORE_ADDR ip;
471 struct symtab_and_line sal;
472 CORE_ADDR limit;
473
474 if (!fi->fsr)
475 {
476 cache_fsr = (struct frame_saved_regs *)
477 obstack_alloc (&frame_cache_obstack,
478 sizeof (struct frame_saved_regs));
479 bzero (cache_fsr, sizeof (struct frame_saved_regs));
480 fi->fsr = cache_fsr;
481
482 /* Find the start and end of the function prologue. If the PC
483 is in the function prologue, we only consider the part that
484 has executed already. */
485
486 ip = get_pc_function_start (fi->pc);
487 sal = find_pc_line (ip, 0);
488 limit = (sal.end && sal.end < fi->pc) ? sal.end: fi->pc;
489
490 /* This will fill in fields in *fi as well as in cache_fsr. */
491 examine_prologue (ip, limit, fi->frame, cache_fsr, fi);
492 }
493
494 if (fsr)
495 *fsr = *fi->fsr;
496 }
497
498 /* Return the address of the locals block for the frame
499 described by FI. Returns 0 if the address is unknown.
500 NOTE! Frame locals are referred to by negative offsets from the
501 argument pointer, so this is the same as frame_args_address(). */
502
503 CORE_ADDR
504 frame_locals_address (fi)
505 struct frame_info *fi;
506 {
507 register FRAME frame;
508 struct frame_saved_regs fsr;
509 CORE_ADDR ap;
510
511 if (fi->args_pointer) /* Cached value is likely there. */
512 return fi->args_pointer;
513
514 /* Nope, generate it. */
515
516 get_frame_saved_regs (fi, &fsr);
517
518 return fi->args_pointer;
519 }
520
521 /* Return the address of the argument block for the frame
522 described by FI. Returns 0 if the address is unknown. */
523
524 CORE_ADDR
525 frame_args_address (fi)
526 struct frame_info *fi;
527 {
528 register FRAME frame;
529 struct frame_saved_regs fsr;
530 CORE_ADDR ap;
531
532 if (fi->args_pointer) /* Cached value is likely there. */
533 return fi->args_pointer;
534
535 /* Nope, generate it. */
536
537 get_frame_saved_regs (fi, &fsr);
538
539 return fi->args_pointer;
540 }
541
542 /* Return the saved PC from this frame.
543
544 If the frame has a memory copy of SRP_REGNUM, use that. If not,
545 just use the register SRP_REGNUM itself. */
546
547 CORE_ADDR
548 frame_saved_pc (frame)
549 FRAME frame;
550 {
551 return read_next_frame_reg(frame, SRP_REGNUM);
552 }
553
554
555 #if TARGET_BYTE_ORDER != HOST_BYTE_ORDER
556 you lose
557 #else /* Host and target byte order the same. */
558 #define SINGLE_EXP_BITS 8
559 #define DOUBLE_EXP_BITS 11
560 int
561 IEEE_isNAN(fp, len)
562 int *fp, len;
563 /* fp points to a single precision OR double precision
564 * floating point value; len is the number of bytes, either 4 or 8.
565 * Returns 1 iff fp points to a valid IEEE floating point number.
566 * Returns 0 if fp points to a denormalized number or a NaN
567 */
568 {
569 int exponent;
570 if (len == 4)
571 {
572 exponent = *fp;
573 exponent = exponent << 1 >> (32 - SINGLE_EXP_BITS - 1);
574 return ((exponent == -1) || (! exponent && *fp));
575 }
576 else if (len == 8)
577 {
578 exponent = *(fp+1);
579 exponent = exponent << 1 >> (32 - DOUBLE_EXP_BITS - 1);
580 return ((exponent == -1) || (! exponent && *fp * *(fp+1)));
581 }
582 else return 1;
583 }
584 #endif /* Host and target byte order the same. */
585
586 static int
587 pushed_size (prev_words, v)
588 int prev_words;
589 struct value *v;
590 {
591 switch (TYPE_CODE (VALUE_TYPE (v)))
592 {
593 case TYPE_CODE_VOID: /* Void type (values zero length) */
594
595 return 0; /* That was easy! */
596
597 case TYPE_CODE_PTR: /* Pointer type */
598 case TYPE_CODE_ENUM: /* Enumeration type */
599 case TYPE_CODE_INT: /* Integer type */
600 case TYPE_CODE_REF: /* C++ Reference types */
601 case TYPE_CODE_ARRAY: /* Array type, lower bound zero */
602
603 return 1;
604
605 case TYPE_CODE_FLT: /* Floating type */
606
607 if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
608 return 1;
609 else
610 /* Assume that it must be a double. */
611 if (prev_words & 1) /* at an odd-word boundary */
612 return 3; /* round to 8-byte boundary */
613 else
614 return 2;
615
616 case TYPE_CODE_STRUCT: /* C struct or Pascal record */
617 case TYPE_CODE_UNION: /* C union or Pascal variant part */
618
619 return (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
620
621 case TYPE_CODE_FUNC: /* Function type */
622 case TYPE_CODE_SET: /* Pascal sets */
623 case TYPE_CODE_RANGE: /* Range (integers within bounds) */
624 case TYPE_CODE_PASCAL_ARRAY: /* Array with explicit type of index */
625 case TYPE_CODE_MEMBER: /* Member type */
626 case TYPE_CODE_METHOD: /* Method type */
627 /* Don't know how to pass these yet. */
628
629 case TYPE_CODE_UNDEF: /* Not used; catches errors */
630 default:
631 abort ();
632 }
633 }
634
635 static void
636 store_parm_word (address, val)
637 CORE_ADDR address;
638 int val;
639 {
640 write_memory (address, &val, 4);
641 }
642
643 static int
644 store_parm (prev_words, left_parm_addr, v)
645 unsigned int prev_words;
646 CORE_ADDR left_parm_addr;
647 struct value *v;
648 {
649 CORE_ADDR start = left_parm_addr + (prev_words * 4);
650 int *val_addr = (int *)VALUE_CONTENTS(v);
651
652 switch (TYPE_CODE (VALUE_TYPE (v)))
653 {
654 case TYPE_CODE_VOID: /* Void type (values zero length) */
655
656 return 0;
657
658 case TYPE_CODE_PTR: /* Pointer type */
659 case TYPE_CODE_ENUM: /* Enumeration type */
660 case TYPE_CODE_INT: /* Integer type */
661 case TYPE_CODE_ARRAY: /* Array type, lower bound zero */
662 case TYPE_CODE_REF: /* C++ Reference types */
663
664 store_parm_word (start, *val_addr);
665 return 1;
666
667 case TYPE_CODE_FLT: /* Floating type */
668
669 if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
670 {
671 store_parm_word (start, *val_addr);
672 return 1;
673 }
674 else
675 {
676 store_parm_word (start + ((prev_words & 1) * 4), val_addr[0]);
677 store_parm_word (start + ((prev_words & 1) * 4) + 4, val_addr[1]);
678 return 2 + (prev_words & 1);
679 }
680
681 case TYPE_CODE_STRUCT: /* C struct or Pascal record */
682 case TYPE_CODE_UNION: /* C union or Pascal variant part */
683
684 {
685 unsigned int words = (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
686 unsigned int word;
687
688 for (word = 0; word < words; word++)
689 store_parm_word (start + (word * 4), val_addr[word]);
690 return words;
691 }
692
693 default:
694 abort ();
695 }
696 }
697
698 /* This routine sets up all of the parameter values needed to make a pseudo
699 call. The name "push_parameters" is a misnomer on some archs,
700 because (on the m88k) most parameters generally end up being passed in
701 registers rather than on the stack. In this routine however, we do
702 end up storing *all* parameter values onto the stack (even if we will
703 realize later that some of these stores were unnecessary). */
704
705 #define FIRST_PARM_REGNUM 2
706
707 void
708 push_parameters (return_type, struct_conv, nargs, args)
709 struct type *return_type;
710 int struct_conv;
711 int nargs;
712 value *args;
713 {
714 int parm_num;
715 unsigned int p_words = 0;
716 CORE_ADDR left_parm_addr;
717
718 /* Start out by creating a space for the return value (if need be). We
719 only need to do this if the return value is a struct or union. If we
720 do make a space for a struct or union return value, then we must also
721 arrange for the base address of that space to go into r12, which is the
722 standard place to pass the address of the return value area to the
723 callee. Note that only structs and unions are returned in this fashion.
724 Ints, enums, pointers, and floats are returned into r2. Doubles are
725 returned into the register pair {r2,r3}. Note also that the space
726 reserved for a struct or union return value only has to be word aligned
727 (not double-word) but it is double-word aligned here anyway (just in
728 case that becomes important someday). */
729
730 switch (TYPE_CODE (return_type))
731 {
732 case TYPE_CODE_STRUCT:
733 case TYPE_CODE_UNION:
734 {
735 int return_bytes = ((TYPE_LENGTH (return_type) + 7) / 8) * 8;
736 CORE_ADDR rv_addr;
737
738 rv_addr = read_register (SP_REGNUM) - return_bytes;
739
740 write_register (SP_REGNUM, rv_addr); /* push space onto the stack */
741 write_register (SRA_REGNUM, rv_addr);/* set return value register */
742 }
743 }
744
745 /* Here we make a pre-pass on the whole parameter list to figure out exactly
746 how many words worth of stuff we are going to pass. */
747
748 for (p_words = 0, parm_num = 0; parm_num < nargs; parm_num++)
749 p_words += pushed_size (p_words, value_arg_coerce (args[parm_num]));
750
751 /* Now, check to see if we have to round up the number of parameter words
752 to get up to the next 8-bytes boundary. This may be necessary because
753 of the software convention to always keep the stack aligned on an 8-byte
754 boundary. */
755
756 if (p_words & 1)
757 p_words++; /* round to 8-byte boundary */
758
759 /* Now figure out the absolute address of the leftmost parameter, and update
760 the stack pointer to point at that address. */
761
762 left_parm_addr = read_register (SP_REGNUM) - (p_words * 4);
763 write_register (SP_REGNUM, left_parm_addr);
764
765 /* Now we can go through all of the parameters (in left-to-right order)
766 and write them to their parameter stack slots. Note that we are not
767 really "pushing" the parameter values. The stack space for these values
768 was already allocated above. Now we are just filling it up. */
769
770 for (p_words = 0, parm_num = 0; parm_num < nargs; parm_num++)
771 p_words +=
772 store_parm (p_words, left_parm_addr, value_arg_coerce (args[parm_num]));
773
774 /* Now that we are all done storing the parameter values into the stack, we
775 must go back and load up the parameter registers with the values from the
776 corresponding stack slots. Note that in the two cases of (a) gaps in the
777 parameter word sequence causes by (otherwise) misaligned doubles, and (b)
778 slots correcponding to structs or unions, the work we do here in loading
779 some parameter registers may be unnecessary, but who cares? */
780
781 for (p_words = 0; p_words < 8; p_words++)
782 {
783 write_register (FIRST_PARM_REGNUM + p_words,
784 read_memory_integer (left_parm_addr + (p_words * 4), 4));
785 }
786 }
787
788 void
789 pop_frame ()
790 {
791 error ("Feature not implemented for the m88k yet.");
792 return;
793 }
794
795 void
796 collect_returned_value (rval, value_type, struct_return, nargs, args)
797 value *rval;
798 struct type *value_type;
799 int struct_return;
800 int nargs;
801 value *args;
802 {
803 char retbuf[REGISTER_BYTES];
804
805 bcopy (registers, retbuf, REGISTER_BYTES);
806 *rval = value_being_returned (value_type, retbuf, struct_return);
807 return;
808 }
809
810 #if 0
811 /* Now handled in a machine independent way with CALL_DUMMY_LOCATION. */
812 /* Stuff a breakpoint instruction onto the stack (or elsewhere if the stack
813 is not a good place for it). Return the address at which the instruction
814 got stuffed, or zero if we were unable to stuff it anywhere. */
815
816 CORE_ADDR
817 push_breakpoint ()
818 {
819 static char breakpoint_insn[] = BREAKPOINT;
820 extern CORE_ADDR text_end; /* of inferior */
821 static char readback_buffer[] = BREAKPOINT;
822 int i;
823
824 /* With a little bit of luck, we can just stash the breakpoint instruction
825 in the word just beyond the end of normal text space. For systems on
826 which the hardware will not allow us to execute out of the stack segment,
827 we have to hope that we *are* at least allowed to effectively extend the
828 text segment by one word. If the actual end of user's the text segment
829 happens to fall right at a page boundary this trick may fail. Note that
830 we check for this by reading after writing, and comparing in order to
831 be sure that the write worked. */
832
833 write_memory (text_end, &breakpoint_insn, 4);
834
835 /* Fill the readback buffer with some garbage which is certain to be
836 unequal to the breakpoint insn. That way we can tell if the
837 following read doesn't actually succeed. */
838
839 for (i = 0; i < sizeof (readback_buffer); i++)
840 readback_buffer[i] = ~ readback_buffer[i]; /* Invert the bits */
841
842 /* Now check that the breakpoint insn was successfully installed. */
843
844 read_memory (text_end, readback_buffer, sizeof (readback_buffer));
845 for (i = 0; i < sizeof (readback_buffer); i++)
846 if (readback_buffer[i] != breakpoint_insn[i])
847 return 0; /* Failed to install! */
848
849 return text_end;
850 }
851 #endif