1 /* Target-machine dependent code for Motorola 88000 series, for GDB.
2 Copyright (C) 1988, 1990, 1991 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
28 #include <sys/types.h>
31 #include <sys/param.h>
36 #ifndef USER /* added to support BCS ptrace_user */
38 #define USER ptrace_user
40 #include <sys/ioctl.h>
50 void frame_find_saved_regs ();
53 /* Given a GDB frame, determine the address of the calling function's frame.
54 This will be used to create a new GDB frame struct, and then
55 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
57 For us, the frame address is its stack pointer value, so we look up
58 the function prologue to determine the caller's sp value, and return it. */
61 frame_chain (thisframe
)
65 frame_find_saved_regs (thisframe
, (struct frame_saved_regs
*) 0);
66 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
67 the ADDRESS, of SP_REGNUM. It also depends on the cache of
68 frame_find_saved_regs results. */
69 if (thisframe
->fsr
->regs
[SP_REGNUM
])
70 return thisframe
->fsr
->regs
[SP_REGNUM
];
72 return thisframe
->frame
; /* Leaf fn -- next frame up has same SP. */
76 frameless_function_invocation (frame
)
80 frame_find_saved_regs (frame
, (struct frame_saved_regs
*) 0);
81 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
82 the ADDRESS, of SP_REGNUM. It also depends on the cache of
83 frame_find_saved_regs results. */
84 if (frame
->fsr
->regs
[SP_REGNUM
])
85 return 0; /* Frameful -- return addr saved somewhere */
87 return 1; /* Frameless -- no saved return address */
91 frame_chain_valid (chain
, thisframe
)
93 struct frame_info
*thisframe
;
96 && outside_startup_file (FRAME_SAVED_PC (thisframe
)));
100 init_extra_frame_info (fromleaf
, fi
)
102 struct frame_info
*fi
;
104 fi
->fsr
= 0; /* Not yet allocated */
105 fi
->args_pointer
= 0; /* Unknown */
106 fi
->locals_pointer
= 0; /* Unknown */
109 /* Examine an m88k function prologue, recording the addresses at which
110 registers are saved explicitly by the prologue code, and returning
111 the address of the first instruction after the prologue (but not
112 after the instruction at address LIMIT, as explained below).
114 LIMIT places an upper bound on addresses of the instructions to be
115 examined. If the prologue code scan reaches LIMIT, the scan is
116 aborted and LIMIT is returned. This is used, when examining the
117 prologue for the current frame, to keep examine_prologue () from
118 claiming that a given register has been saved when in fact the
119 instruction that saves it has not yet been executed. LIMIT is used
120 at other times to stop the scan when we hit code after the true
121 function prologue (e.g. for the first source line) which might
122 otherwise be mistaken for function prologue.
124 The format of the function prologue matched by this routine is
125 derived from examination of the source to gcc 1.95, particularly
126 the routine output_prologue () in config/out-m88k.c.
128 subu r31,r31,n # stack pointer update
130 (st rn,r31,offset)? # save incoming regs
131 (st.d rn,r31,offset)?
133 (addu r30,r31,n)? # frame pointer update
135 (pic sequence)? # PIC code prologue
137 (or rn,rm,0)? # Move parameters to other regs
140 /* Macros for extracting fields from instructions. */
142 #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
143 #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
145 /* Prologue code that handles position-independent-code setup. */
147 struct pic_prologue_code
{
148 unsigned long insn
, mask
;
151 static struct pic_prologue_code pic_prologue_code
[] = {
152 /* FIXME -- until this is translated to hex, we won't match it... */
154 /* or r10,r1,0 (if not saved) */
156 /* or.u r25,r0,const */
157 /*LabN: or r25,r25,const2 */
159 /* or r1,r10,0 (if not saved) */
162 /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
163 is not the address of a valid instruction, the address of the next
164 instruction beyond ADDR otherwise. *PWORD1 receives the first word
165 of the instruction. PWORD2 is ignored -- a remnant of the original
168 #define NEXT_PROLOGUE_INSN(addr, lim, pword1, pword2) \
169 (((addr) < (lim)) ? next_insn (addr, pword1) : 0)
171 /* Read the m88k instruction at 'memaddr' and return the address of
172 the next instruction after that, or 0 if 'memaddr' is not the
173 address of a valid instruction. The instruction
174 is stored at 'pword1'. */
177 next_insn (memaddr
, pword1
)
178 unsigned long *pword1
;
181 unsigned long buf
[1];
183 read_memory (memaddr
, buf
, sizeof (buf
));
185 SWAP_TARGET_AND_HOST (pword1
, sizeof (long));
190 /* Read a register from frames called by us (or from the hardware regs). */
193 read_next_frame_reg(fi
, regno
)
197 for (; fi
; fi
= fi
->next
) {
198 if (regno
== SP_REGNUM
) return fi
->frame
;
199 else if (fi
->fsr
->regs
[regno
])
200 return read_memory_integer(fi
->fsr
->regs
[regno
], 4);
202 return read_register(regno
);
205 /* Examine the prologue of a function. `ip' points to the first instruction.
206 `limit' is the limit of the prologue (e.g. the addr of the first
207 linenumber, or perhaps the program counter if we're stepping through).
208 `frame_sp' is the stack pointer value in use in this frame.
209 `fsr' is a pointer to a frame_saved_regs structure into which we put
210 info about the registers saved by this frame.
211 `fi' is a struct frame_info pointer; we fill in various fields in it
212 to reflect the offsets of the arg pointer and the locals pointer. */
215 examine_prologue (ip
, limit
, frame_sp
, fsr
, fi
)
216 register CORE_ADDR ip
;
217 register CORE_ADDR limit
;
219 struct frame_saved_regs
*fsr
;
220 struct frame_info
*fi
;
222 register CORE_ADDR next_ip
;
224 register struct pic_prologue_code
*pcode
;
225 unsigned int insn1
, insn2
;
227 char must_adjust
[32]; /* If set, must adjust offsets in fsr */
228 int sp_offset
= -1; /* -1 means not set (valid must be mult of 8) */
229 int fp_offset
= -1; /* -1 means not set */
232 bzero (must_adjust
, sizeof (must_adjust
));
233 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
235 /* Accept move of incoming registers to other registers, using
236 "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
237 We don't have to worry about walking into the first lines of code,
238 since the first line number will stop us (assuming we have symbols).
239 What we have actually seen is "or r10,r0,r12". */
241 #define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
242 #define OR_MOVE_MASK 0xF800FFFF
243 #define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
244 #define OR_REG_MOVE1_MASK 0xFC1FFFE0
245 #define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
246 #define OR_REG_MOVE2_MASK 0xFC00FFFF
248 ((insn1
& OR_MOVE_MASK
) == OR_MOVE_INSN
||
249 (insn1
& OR_REG_MOVE1_MASK
) == OR_REG_MOVE1_INSN
||
250 (insn1
& OR_REG_MOVE2_MASK
) == OR_REG_MOVE2_INSN
254 /* We don't care what moves to where. The result of the moves
255 has already been reflected in what the compiler tells us is the
256 location of these parameters. */
258 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
261 /* Accept an optional "subu sp,sp,n" to set up the stack pointer. */
263 #define SUBU_SP_INSN 0x67ff0000
264 #define SUBU_SP_MASK 0xffff0007 /* Note offset must be mult. of 8 */
265 #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
267 ((insn1
& SUBU_SP_MASK
) == SUBU_SP_INSN
)) /* subu r31, r31, N */
269 sp_offset
= -SUBU_OFFSET (insn1
);
271 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
274 /* The function must start with a stack-pointer adjustment, or
275 we don't know WHAT'S going on... */
279 /* Accept zero or more instances of "st rx,sp,n" or "st.d rx,sp,n".
280 This may cause us to mistake the copying of a register
281 parameter to the frame for the saving of a callee-saved
282 register, but that can't be helped, since with the
283 "-fcall-saved" flag, any register can be made callee-saved.
284 This probably doesn't matter, since the ``saved'' caller's values of
285 non-callee-saved registers are not relevant anyway. */
287 #define STD_STACK_INSN 0x201f0000
288 #define STD_STACK_MASK 0xfc1f0000
289 #define ST_STACK_INSN 0x241f0000
290 #define ST_STACK_MASK 0xfc1f0000
291 #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
292 #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
296 if ((insn1
& ST_STACK_MASK
) == ST_STACK_INSN
)
298 else if ((insn1
& STD_STACK_MASK
) == STD_STACK_INSN
)
303 src
= ST_SRC (insn1
);
304 offset
= ST_OFFSET (insn1
);
307 must_adjust
[src
] = 1;
308 fsr
->regs
[src
++] = offset
; /* Will be adjusted later */
312 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
315 /* Accept an optional "addu r30,r31,n" to set up the frame pointer. */
317 #define ADDU_FP_INSN 0x63df0000
318 #define ADDU_FP_MASK 0xffff0000
319 #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
321 ((insn1
& ADDU_FP_MASK
) == ADDU_FP_INSN
)) /* addu r30, r31, N */
323 fp_offset
= ADDU_OFFSET (insn1
);
325 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
328 /* Accept the PIC prologue code if present. */
330 pcode
= pic_prologue_code
;
331 size
= sizeof (pic_prologue_code
) / sizeof (*pic_prologue_code
);
332 /* If return addr is saved, we don't use first or last insn of PICstuff. */
333 if (fsr
->regs
[SRP_REGNUM
]) {
338 while (size
-- && next_ip
&& (pcode
->insn
== (pcode
->mask
& insn1
)))
342 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
345 /* Accept moves of parameter registers to other registers, using
346 "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
347 We don't have to worry about walking into the first lines of code,
348 since the first line number will stop us (assuming we have symbols).
349 What gcc actually seems to produce is "or rd,r0,rs". */
351 #define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
352 #define OR_MOVE_MASK 0xF800FFFF
353 #define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
354 #define OR_REG_MOVE1_MASK 0xFC1FFFE0
355 #define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
356 #define OR_REG_MOVE2_MASK 0xFC00FFFF
358 ((insn1
& OR_MOVE_MASK
) == OR_MOVE_INSN
||
359 (insn1
& OR_REG_MOVE1_MASK
) == OR_REG_MOVE1_INSN
||
360 (insn1
& OR_REG_MOVE2_MASK
) == OR_REG_MOVE2_INSN
364 /* We don't care what moves to where. The result of the moves
365 has already been reflected in what the compiler tells us is the
366 location of these parameters. */
368 next_ip
= NEXT_PROLOGUE_INSN (ip
, limit
, &insn1
, &insn2
);
371 /* We're done with the prologue. If we don't care about the stack
372 frame itself, just return. (Note that fsr->regs has been trashed,
373 but the one caller who calls with fi==0 passes a dummy there.) */
379 sp_offset original negative displacement of SP
380 fp_offset positive displacement between new SP and new FP, or -1
381 fsr->regs[0..31] offset from original SP where reg is stored
382 must_adjust[0..31] set if corresp. offset was set
384 The current SP (frame_sp) might not be the original new SP as set
385 by the function prologue, if alloca has been called. This can
386 only occur if fp_offset is set, though (the compiler allocates an
387 FP when it sees alloca). In that case, we have the FP,
388 and can calculate the original new SP from the FP.
390 Then, we figure out where the arguments and locals are, and
391 relocate the offsets in fsr->regs to absolute addresses. */
393 if (fp_offset
!= -1) {
394 /* We have a frame pointer, so get it, and base our calc's on it. */
395 frame_fp
= (CORE_ADDR
) read_next_frame_reg (fi
->next
, FP_REGNUM
);
396 frame_sp
= frame_fp
- fp_offset
;
398 /* We have no frame pointer, therefore frame_sp is still the same value
399 as set by prologue. But where is the frame itself? */
400 if (must_adjust
[SRP_REGNUM
]) {
401 /* Function header saved SRP (r1), the return address. Frame starts
402 4 bytes down from where it was saved. */
403 frame_fp
= frame_sp
+ fsr
->regs
[SRP_REGNUM
] - 4;
404 fi
->locals_pointer
= frame_fp
;
406 /* Function header didn't save SRP (r1), so we are in a leaf fn or
407 are otherwise confused. */
412 /* The locals are relative to the FP (whether it exists as an allocated
413 register, or just as an assumed offset from the SP) */
414 fi
->locals_pointer
= frame_fp
;
416 /* The arguments are just above the SP as it was before we adjusted it
418 fi
->args_pointer
= frame_sp
- sp_offset
;
420 /* Now that we know the SP value used by the prologue, we know where
421 it saved all the registers. */
422 for (src
= 0; src
< 32; src
++)
423 if (must_adjust
[src
])
424 fsr
->regs
[src
] += frame_sp
;
426 /* The saved value of the SP is always known. */
428 if (fsr
->regs
[SP_REGNUM
] != 0
429 && fsr
->regs
[SP_REGNUM
] != frame_sp
- sp_offset
)
430 fprintf(stderr
, "Bad saved SP value %x != %x, offset %x!\n",
431 fsr
->regs
[SP_REGNUM
],
432 frame_sp
- sp_offset
, sp_offset
);
434 fsr
->regs
[SP_REGNUM
] = frame_sp
- sp_offset
;
439 /* Given an ip value corresponding to the start of a function,
440 return the ip of the first instruction after the function
447 struct frame_saved_regs saved_regs_dummy
;
448 struct symtab_and_line sal
;
451 sal
= find_pc_line (ip
, 0);
452 limit
= (sal
.end
) ? sal
.end
: 0xffffffff;
454 return (examine_prologue (ip
, limit
, (FRAME_ADDR
) 0, &saved_regs_dummy
,
455 (struct frame_info
*)0 ));
458 /* Put here the code to store, into a struct frame_saved_regs,
459 the addresses of the saved registers of frame described by FRAME_INFO.
460 This includes special registers such as pc and fp saved in special
461 ways in the stack frame. sp is even more special:
462 the address we return for it IS the sp for the next frame.
464 We cache the result of doing this in the frame_cache_obstack, since
465 it is fairly expensive. */
468 frame_find_saved_regs (fi
, fsr
)
469 struct frame_info
*fi
;
470 struct frame_saved_regs
*fsr
;
472 register CORE_ADDR next_addr
;
473 register CORE_ADDR
*saved_regs
;
475 register struct frame_saved_regs
*cache_fsr
;
476 extern struct obstack frame_cache_obstack
;
478 struct symtab_and_line sal
;
483 cache_fsr
= (struct frame_saved_regs
*)
484 obstack_alloc (&frame_cache_obstack
,
485 sizeof (struct frame_saved_regs
));
486 bzero (cache_fsr
, sizeof (struct frame_saved_regs
));
489 /* Find the start and end of the function prologue. If the PC
490 is in the function prologue, we only consider the part that
491 has executed already. */
493 ip
= get_pc_function_start (fi
->pc
);
494 sal
= find_pc_line (ip
, 0);
495 limit
= (sal
.end
&& sal
.end
< fi
->pc
) ? sal
.end
: fi
->pc
;
497 /* This will fill in fields in *fi as well as in cache_fsr. */
498 examine_prologue (ip
, limit
, fi
->frame
, cache_fsr
, fi
);
505 /* Return the address of the locals block for the frame
506 described by FI. Returns 0 if the address is unknown.
507 NOTE! Frame locals are referred to by negative offsets from the
508 argument pointer, so this is the same as frame_args_address(). */
511 frame_locals_address (fi
)
512 struct frame_info
*fi
;
514 register FRAME frame
;
515 struct frame_saved_regs fsr
;
518 if (fi
->args_pointer
) /* Cached value is likely there. */
519 return fi
->args_pointer
;
521 /* Nope, generate it. */
523 get_frame_saved_regs (fi
, &fsr
);
525 return fi
->args_pointer
;
528 /* Return the address of the argument block for the frame
529 described by FI. Returns 0 if the address is unknown. */
532 frame_args_address (fi
)
533 struct frame_info
*fi
;
535 register FRAME frame
;
536 struct frame_saved_regs fsr
;
539 if (fi
->args_pointer
) /* Cached value is likely there. */
540 return fi
->args_pointer
;
542 /* Nope, generate it. */
544 get_frame_saved_regs (fi
, &fsr
);
546 return fi
->args_pointer
;
549 /* Return the saved PC from this frame.
551 If the frame has a memory copy of SRP_REGNUM, use that. If not,
552 just use the register SRP_REGNUM itself. */
555 frame_saved_pc (frame
)
558 return read_next_frame_reg(frame
, SRP_REGNUM
);
562 #if TARGET_BYTE_ORDER != HOST_BYTE_ORDER
564 #else /* Host and target byte order the same. */
565 #define SINGLE_EXP_BITS 8
566 #define DOUBLE_EXP_BITS 11
570 /* fp points to a single precision OR double precision
571 * floating point value; len is the number of bytes, either 4 or 8.
572 * Returns 1 iff fp points to a valid IEEE floating point number.
573 * Returns 0 if fp points to a denormalized number or a NaN
580 exponent
= exponent
<< 1 >> (32 - SINGLE_EXP_BITS
- 1);
581 return ((exponent
== -1) || (! exponent
&& *fp
));
586 exponent
= exponent
<< 1 >> (32 - DOUBLE_EXP_BITS
- 1);
587 return ((exponent
== -1) || (! exponent
&& *fp
* *(fp
+1)));
591 #endif /* Host and target byte order the same. */
594 pushed_size (prev_words
, v
)
598 switch (TYPE_CODE (VALUE_TYPE (v
)))
600 case TYPE_CODE_VOID
: /* Void type (values zero length) */
602 return 0; /* That was easy! */
604 case TYPE_CODE_PTR
: /* Pointer type */
605 case TYPE_CODE_ENUM
: /* Enumeration type */
606 case TYPE_CODE_INT
: /* Integer type */
607 case TYPE_CODE_REF
: /* C++ Reference types */
608 case TYPE_CODE_ARRAY
: /* Array type, lower bound zero */
612 case TYPE_CODE_FLT
: /* Floating type */
614 if (TYPE_LENGTH (VALUE_TYPE (v
)) == 4)
617 /* Assume that it must be a double. */
618 if (prev_words
& 1) /* at an odd-word boundary */
619 return 3; /* round to 8-byte boundary */
623 case TYPE_CODE_STRUCT
: /* C struct or Pascal record */
624 case TYPE_CODE_UNION
: /* C union or Pascal variant part */
626 return (((TYPE_LENGTH (VALUE_TYPE (v
)) + 3) / 4) * 4);
628 case TYPE_CODE_FUNC
: /* Function type */
629 case TYPE_CODE_SET
: /* Pascal sets */
630 case TYPE_CODE_RANGE
: /* Range (integers within bounds) */
631 case TYPE_CODE_PASCAL_ARRAY
: /* Array with explicit type of index */
632 case TYPE_CODE_MEMBER
: /* Member type */
633 case TYPE_CODE_METHOD
: /* Method type */
634 /* Don't know how to pass these yet. */
636 case TYPE_CODE_UNDEF
: /* Not used; catches errors */
643 store_parm_word (address
, val
)
647 write_memory (address
, &val
, 4);
651 store_parm (prev_words
, left_parm_addr
, v
)
652 unsigned int prev_words
;
653 CORE_ADDR left_parm_addr
;
656 CORE_ADDR start
= left_parm_addr
+ (prev_words
* 4);
657 int *val_addr
= (int *)VALUE_CONTENTS(v
);
659 switch (TYPE_CODE (VALUE_TYPE (v
)))
661 case TYPE_CODE_VOID
: /* Void type (values zero length) */
665 case TYPE_CODE_PTR
: /* Pointer type */
666 case TYPE_CODE_ENUM
: /* Enumeration type */
667 case TYPE_CODE_INT
: /* Integer type */
668 case TYPE_CODE_ARRAY
: /* Array type, lower bound zero */
669 case TYPE_CODE_REF
: /* C++ Reference types */
671 store_parm_word (start
, *val_addr
);
674 case TYPE_CODE_FLT
: /* Floating type */
676 if (TYPE_LENGTH (VALUE_TYPE (v
)) == 4)
678 store_parm_word (start
, *val_addr
);
683 store_parm_word (start
+ ((prev_words
& 1) * 4), val_addr
[0]);
684 store_parm_word (start
+ ((prev_words
& 1) * 4) + 4, val_addr
[1]);
685 return 2 + (prev_words
& 1);
688 case TYPE_CODE_STRUCT
: /* C struct or Pascal record */
689 case TYPE_CODE_UNION
: /* C union or Pascal variant part */
692 unsigned int words
= (((TYPE_LENGTH (VALUE_TYPE (v
)) + 3) / 4) * 4);
695 for (word
= 0; word
< words
; word
++)
696 store_parm_word (start
+ (word
* 4), val_addr
[word
]);
705 /* This routine sets up all of the parameter values needed to make a pseudo
706 call. The name "push_parameters" is a misnomer on some archs,
707 because (on the m88k) most parameters generally end up being passed in
708 registers rather than on the stack. In this routine however, we do
709 end up storing *all* parameter values onto the stack (even if we will
710 realize later that some of these stores were unnecessary). */
712 #define FIRST_PARM_REGNUM 2
715 push_parameters (return_type
, struct_conv
, nargs
, args
)
716 struct type
*return_type
;
722 unsigned int p_words
= 0;
723 CORE_ADDR left_parm_addr
;
725 /* Start out by creating a space for the return value (if need be). We
726 only need to do this if the return value is a struct or union. If we
727 do make a space for a struct or union return value, then we must also
728 arrange for the base address of that space to go into r12, which is the
729 standard place to pass the address of the return value area to the
730 callee. Note that only structs and unions are returned in this fashion.
731 Ints, enums, pointers, and floats are returned into r2. Doubles are
732 returned into the register pair {r2,r3}. Note also that the space
733 reserved for a struct or union return value only has to be word aligned
734 (not double-word) but it is double-word aligned here anyway (just in
735 case that becomes important someday). */
737 switch (TYPE_CODE (return_type
))
739 case TYPE_CODE_STRUCT
:
740 case TYPE_CODE_UNION
:
742 int return_bytes
= ((TYPE_LENGTH (return_type
) + 7) / 8) * 8;
745 rv_addr
= read_register (SP_REGNUM
) - return_bytes
;
747 write_register (SP_REGNUM
, rv_addr
); /* push space onto the stack */
748 write_register (SRA_REGNUM
, rv_addr
);/* set return value register */
752 /* Here we make a pre-pass on the whole parameter list to figure out exactly
753 how many words worth of stuff we are going to pass. */
755 for (p_words
= 0, parm_num
= 0; parm_num
< nargs
; parm_num
++)
756 p_words
+= pushed_size (p_words
, value_arg_coerce (args
[parm_num
]));
758 /* Now, check to see if we have to round up the number of parameter words
759 to get up to the next 8-bytes boundary. This may be necessary because
760 of the software convention to always keep the stack aligned on an 8-byte
764 p_words
++; /* round to 8-byte boundary */
766 /* Now figure out the absolute address of the leftmost parameter, and update
767 the stack pointer to point at that address. */
769 left_parm_addr
= read_register (SP_REGNUM
) - (p_words
* 4);
770 write_register (SP_REGNUM
, left_parm_addr
);
772 /* Now we can go through all of the parameters (in left-to-right order)
773 and write them to their parameter stack slots. Note that we are not
774 really "pushing" the parameter values. The stack space for these values
775 was already allocated above. Now we are just filling it up. */
777 for (p_words
= 0, parm_num
= 0; parm_num
< nargs
; parm_num
++)
779 store_parm (p_words
, left_parm_addr
, value_arg_coerce (args
[parm_num
]));
781 /* Now that we are all done storing the parameter values into the stack, we
782 must go back and load up the parameter registers with the values from the
783 corresponding stack slots. Note that in the two cases of (a) gaps in the
784 parameter word sequence causes by (otherwise) misaligned doubles, and (b)
785 slots correcponding to structs or unions, the work we do here in loading
786 some parameter registers may be unnecessary, but who cares? */
788 for (p_words
= 0; p_words
< 8; p_words
++)
790 write_register (FIRST_PARM_REGNUM
+ p_words
,
791 read_memory_integer (left_parm_addr
+ (p_words
* 4), 4));
798 error ("Feature not implemented for the m88k yet.");
803 collect_returned_value (rval
, value_type
, struct_return
, nargs
, args
)
805 struct type
*value_type
;
810 char retbuf
[REGISTER_BYTES
];
812 bcopy (registers
, retbuf
, REGISTER_BYTES
);
813 *rval
= value_being_returned (value_type
, retbuf
, struct_return
);
818 /* Now handled in a machine independent way with CALL_DUMMY_LOCATION. */
819 /* Stuff a breakpoint instruction onto the stack (or elsewhere if the stack
820 is not a good place for it). Return the address at which the instruction
821 got stuffed, or zero if we were unable to stuff it anywhere. */
826 static char breakpoint_insn
[] = BREAKPOINT
;
827 extern CORE_ADDR text_end
; /* of inferior */
828 static char readback_buffer
[] = BREAKPOINT
;
831 /* With a little bit of luck, we can just stash the breakpoint instruction
832 in the word just beyond the end of normal text space. For systems on
833 which the hardware will not allow us to execute out of the stack segment,
834 we have to hope that we *are* at least allowed to effectively extend the
835 text segment by one word. If the actual end of user's the text segment
836 happens to fall right at a page boundary this trick may fail. Note that
837 we check for this by reading after writing, and comparing in order to
838 be sure that the write worked. */
840 write_memory (text_end
, &breakpoint_insn
, 4);
842 /* Fill the readback buffer with some garbage which is certain to be
843 unequal to the breakpoint insn. That way we can tell if the
844 following read doesn't actually succeed. */
846 for (i
= 0; i
< sizeof (readback_buffer
); i
++)
847 readback_buffer
[i
] = ~ readback_buffer
[i
]; /* Invert the bits */
849 /* Now check that the breakpoint insn was successfully installed. */
851 read_memory (text_end
, readback_buffer
, sizeof (readback_buffer
));
852 for (i
= 0; i
< sizeof (readback_buffer
); i
++)
853 if (readback_buffer
[i
] != breakpoint_insn
[i
])
854 return 0; /* Failed to install! */