* m88k-tdep.c: Include sys/dir.h before sys/user.h.
[binutils-gdb.git] / gdb / m88k-tdep.c
1 /* Target-machine dependent code for Motorola 88000 series, for GDB.
2 Copyright (C) 1988, 1990, 1991 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20 #include "defs.h"
21 #include "frame.h"
22 #include "inferior.h"
23 #include "value.h"
24
25 #include <sys/types.h>
26 #include <sys/param.h>
27 #include <signal.h>
28 #include "gdbcore.h"
29 #include <sys/dir.h> /* needed by sys/user.h on delta88 running SVR3. */
30 #include <sys/user.h>
31 #ifndef USER /* added to support BCS ptrace_user */
32
33 #define USER ptrace_user
34 #endif
35 #include <sys/ioctl.h>
36 #include <fcntl.h>
37
38 #include <sys/file.h>
39 #include <sys/stat.h>
40
41 #include "symtab.h"
42 #include "setjmp.h"
43 #include "value.h"
44
45 /* Size of an instruction */
46 #define BYTES_PER_88K_INSN 4
47
48 void frame_find_saved_regs ();
49
50
51 /* Given a GDB frame, determine the address of the calling function's frame.
52 This will be used to create a new GDB frame struct, and then
53 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
54
55 For us, the frame address is its stack pointer value, so we look up
56 the function prologue to determine the caller's sp value, and return it. */
57
58 FRAME_ADDR
59 frame_chain (thisframe)
60 FRAME thisframe;
61 {
62
63 frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0);
64 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
65 the ADDRESS, of SP_REGNUM. It also depends on the cache of
66 frame_find_saved_regs results. */
67 if (thisframe->fsr->regs[SP_REGNUM])
68 return thisframe->fsr->regs[SP_REGNUM];
69 else
70 return thisframe->frame; /* Leaf fn -- next frame up has same SP. */
71 }
72
73 int
74 frameless_function_invocation (frame)
75 FRAME frame;
76 {
77
78 frame_find_saved_regs (frame, (struct frame_saved_regs *) 0);
79 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
80 the ADDRESS, of SP_REGNUM. It also depends on the cache of
81 frame_find_saved_regs results. */
82 if (frame->fsr->regs[SP_REGNUM])
83 return 0; /* Frameful -- return addr saved somewhere */
84 else
85 return 1; /* Frameless -- no saved return address */
86 }
87
88 void
89 init_extra_frame_info (fromleaf, fi)
90 int fromleaf;
91 struct frame_info *fi;
92 {
93 fi->fsr = 0; /* Not yet allocated */
94 fi->args_pointer = 0; /* Unknown */
95 fi->locals_pointer = 0; /* Unknown */
96 }
97 \f
98 /* Examine an m88k function prologue, recording the addresses at which
99 registers are saved explicitly by the prologue code, and returning
100 the address of the first instruction after the prologue (but not
101 after the instruction at address LIMIT, as explained below).
102
103 LIMIT places an upper bound on addresses of the instructions to be
104 examined. If the prologue code scan reaches LIMIT, the scan is
105 aborted and LIMIT is returned. This is used, when examining the
106 prologue for the current frame, to keep examine_prologue () from
107 claiming that a given register has been saved when in fact the
108 instruction that saves it has not yet been executed. LIMIT is used
109 at other times to stop the scan when we hit code after the true
110 function prologue (e.g. for the first source line) which might
111 otherwise be mistaken for function prologue.
112
113 The format of the function prologue matched by this routine is
114 derived from examination of the source to gcc 1.95, particularly
115 the routine output_prologue () in config/out-m88k.c.
116
117 subu r31,r31,n # stack pointer update
118
119 (st rn,r31,offset)? # save incoming regs
120 (st.d rn,r31,offset)?
121
122 (addu r30,r31,n)? # frame pointer update
123
124 (pic sequence)? # PIC code prologue
125
126 (or rn,rm,0)? # Move parameters to other regs
127 */
128
129 /* Macros for extracting fields from instructions. */
130
131 #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
132 #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
133
134 /* Prologue code that handles position-independent-code setup. */
135
136 struct pic_prologue_code {
137 unsigned long insn, mask;
138 };
139
140 static struct pic_prologue_code pic_prologue_code [] = {
141 /* FIXME -- until this is translated to hex, we won't match it... */
142 0xffffffff, 0,
143 /* or r10,r1,0 (if not saved) */
144 /* bsr.n LabN */
145 /* or.u r25,r0,const */
146 /*LabN: or r25,r25,const2 */
147 /* addu r25,r25,1 */
148 /* or r1,r10,0 (if not saved) */
149 };
150
151 /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
152 is not the address of a valid instruction, the address of the next
153 instruction beyond ADDR otherwise. *PWORD1 receives the first word
154 of the instruction. PWORD2 is ignored -- a remnant of the original
155 i960 version. */
156
157 #define NEXT_PROLOGUE_INSN(addr, lim, pword1) \
158 (((addr) < (lim)) ? next_insn (addr, pword1) : 0)
159
160 /* Read the m88k instruction at 'memaddr' and return the address of
161 the next instruction after that, or 0 if 'memaddr' is not the
162 address of a valid instruction. The instruction
163 is stored at 'pword1'. */
164
165 CORE_ADDR
166 next_insn (memaddr, pword1)
167 unsigned long *pword1;
168 CORE_ADDR memaddr;
169 {
170 unsigned long buf[1];
171
172 *pword1 = read_memory_integer (memaddr, BYTES_PER_88K_INSN);
173 return memaddr + BYTES_PER_88K_INSN;
174 }
175
176 /* Read a register from frames called by us (or from the hardware regs). */
177
178 static int
179 read_next_frame_reg(fi, regno)
180 FRAME fi;
181 int regno;
182 {
183 for (; fi; fi = fi->next) {
184 if (regno == SP_REGNUM) return fi->frame;
185 else if (fi->fsr->regs[regno])
186 return read_memory_integer(fi->fsr->regs[regno], 4);
187 }
188 return read_register(regno);
189 }
190
191 /* Examine the prologue of a function. `ip' points to the first instruction.
192 `limit' is the limit of the prologue (e.g. the addr of the first
193 linenumber, or perhaps the program counter if we're stepping through).
194 `frame_sp' is the stack pointer value in use in this frame.
195 `fsr' is a pointer to a frame_saved_regs structure into which we put
196 info about the registers saved by this frame.
197 `fi' is a struct frame_info pointer; we fill in various fields in it
198 to reflect the offsets of the arg pointer and the locals pointer. */
199
200 static CORE_ADDR
201 examine_prologue (ip, limit, frame_sp, fsr, fi)
202 register CORE_ADDR ip;
203 register CORE_ADDR limit;
204 FRAME_ADDR frame_sp;
205 struct frame_saved_regs *fsr;
206 struct frame_info *fi;
207 {
208 register CORE_ADDR next_ip;
209 register int src;
210 register struct pic_prologue_code *pcode;
211 unsigned int insn;
212 int size, offset;
213 char must_adjust[32]; /* If set, must adjust offsets in fsr */
214 int sp_offset = -1; /* -1 means not set (valid must be mult of 8) */
215 int fp_offset = -1; /* -1 means not set */
216 CORE_ADDR frame_fp;
217
218 memset (must_adjust, '\0', sizeof (must_adjust));
219 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
220
221 /* Accept move of incoming registers to other registers, using
222 "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
223 We don't have to worry about walking into the first lines of code,
224 since the first line number will stop us (assuming we have symbols).
225 What we have actually seen is "or r10,r0,r12". */
226
227 #define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
228 #define OR_MOVE_MASK 0xF800FFFF
229 #define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
230 #define OR_REG_MOVE1_MASK 0xFC1FFFE0
231 #define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
232 #define OR_REG_MOVE2_MASK 0xFC00FFFF
233 while (next_ip &&
234 ((insn & OR_MOVE_MASK) == OR_MOVE_INSN ||
235 (insn & OR_REG_MOVE1_MASK) == OR_REG_MOVE1_INSN ||
236 (insn & OR_REG_MOVE2_MASK) == OR_REG_MOVE2_INSN
237 )
238 )
239 {
240 /* We don't care what moves to where. The result of the moves
241 has already been reflected in what the compiler tells us is the
242 location of these parameters. */
243 ip = next_ip;
244 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
245 }
246
247 /* Accept an optional "subu sp,sp,n" to set up the stack pointer. */
248
249 #define SUBU_SP_INSN 0x67ff0000
250 #define SUBU_SP_MASK 0xffff0007 /* Note offset must be mult. of 8 */
251 #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
252 if (next_ip &&
253 ((insn & SUBU_SP_MASK) == SUBU_SP_INSN)) /* subu r31, r31, N */
254 {
255 sp_offset = -SUBU_OFFSET (insn);
256 ip = next_ip;
257 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
258 }
259
260 /* The function must start with a stack-pointer adjustment, or
261 we don't know WHAT'S going on... */
262 if (sp_offset == -1)
263 return ip;
264
265 /* Accept zero or more instances of "st rx,sp,n" or "st.d rx,sp,n".
266 This may cause us to mistake the copying of a register
267 parameter to the frame for the saving of a callee-saved
268 register, but that can't be helped, since with the
269 "-fcall-saved" flag, any register can be made callee-saved.
270 This probably doesn't matter, since the ``saved'' caller's values of
271 non-callee-saved registers are not relevant anyway. */
272
273 #define STD_STACK_INSN 0x201f0000
274 #define STD_STACK_MASK 0xfc1f0000
275 #define ST_STACK_INSN 0x241f0000
276 #define ST_STACK_MASK 0xfc1f0000
277 #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
278 #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
279
280 while (next_ip)
281 {
282 if ((insn & ST_STACK_MASK) == ST_STACK_INSN)
283 size = 1;
284 else if ((insn & STD_STACK_MASK) == STD_STACK_INSN)
285 size = 2;
286 else
287 break;
288
289 src = ST_SRC (insn);
290 offset = ST_OFFSET (insn);
291 while (size--)
292 {
293 must_adjust[src] = 1;
294 fsr->regs[src++] = offset; /* Will be adjusted later */
295 offset += 4;
296 }
297 ip = next_ip;
298 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
299 }
300
301 /* Accept an optional "addu r30,r31,n" to set up the frame pointer. */
302
303 #define ADDU_FP_INSN 0x63df0000
304 #define ADDU_FP_MASK 0xffff0000
305 #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
306 if (next_ip &&
307 ((insn & ADDU_FP_MASK) == ADDU_FP_INSN)) /* addu r30, r31, N */
308 {
309 fp_offset = ADDU_OFFSET (insn);
310 ip = next_ip;
311 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
312 }
313
314 /* Accept the PIC prologue code if present. */
315
316 pcode = pic_prologue_code;
317 size = sizeof (pic_prologue_code) / sizeof (*pic_prologue_code);
318 /* If return addr is saved, we don't use first or last insn of PICstuff. */
319 if (fsr->regs[SRP_REGNUM]) {
320 pcode++;
321 size-=2;
322 }
323
324 while (size-- && next_ip && (pcode->insn == (pcode->mask & insn)))
325 {
326 pcode++;
327 ip = next_ip;
328 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
329 }
330
331 /* Accept moves of parameter registers to other registers, using
332 "or rd,rs,0" or "or.u rd,rs,0" or "or rd,r0,rs" or "or rd,rs,r0".
333 We don't have to worry about walking into the first lines of code,
334 since the first line number will stop us (assuming we have symbols).
335 What gcc actually seems to produce is "or rd,r0,rs". */
336
337 #define OR_MOVE_INSN 0x58000000 /* or/or.u with immed of 0 */
338 #define OR_MOVE_MASK 0xF800FFFF
339 #define OR_REG_MOVE1_INSN 0xF4005800 /* or rd,r0,rs */
340 #define OR_REG_MOVE1_MASK 0xFC1FFFE0
341 #define OR_REG_MOVE2_INSN 0xF4005800 /* or rd,rs,r0 */
342 #define OR_REG_MOVE2_MASK 0xFC00FFFF
343 while (next_ip &&
344 ((insn & OR_MOVE_MASK) == OR_MOVE_INSN ||
345 (insn & OR_REG_MOVE1_MASK) == OR_REG_MOVE1_INSN ||
346 (insn & OR_REG_MOVE2_MASK) == OR_REG_MOVE2_INSN
347 )
348 )
349 {
350 /* We don't care what moves to where. The result of the moves
351 has already been reflected in what the compiler tells us is the
352 location of these parameters. */
353 ip = next_ip;
354 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
355 }
356
357 /* We're done with the prologue. If we don't care about the stack
358 frame itself, just return. (Note that fsr->regs has been trashed,
359 but the one caller who calls with fi==0 passes a dummy there.) */
360
361 if (fi == 0)
362 return ip;
363
364 /*
365 OK, now we have:
366
367 sp_offset original (before any alloca calls) displacement of SP
368 (will be negative).
369
370 fp_offset displacement from original SP to the FP for this frame
371 or -1.
372
373 fsr->regs[0..31] displacement from original SP to the stack
374 location where reg[0..31] is stored.
375
376 must_adjust[0..31] set if corresponding offset was set.
377
378 If alloca has been called between the function prologue and the current
379 IP, then the current SP (frame_sp) will not be the original SP as set by
380 the function prologue. If the current SP is not the original SP, then the
381 compiler will have allocated an FP for this frame, fp_offset will be set,
382 and we can use it to calculate the original SP.
383
384 Then, we figure out where the arguments and locals are, and relocate the
385 offsets in fsr->regs to absolute addresses. */
386
387 if (fp_offset != -1) {
388 /* We have a frame pointer, so get it, and base our calc's on it. */
389 frame_fp = (CORE_ADDR) read_next_frame_reg (fi->next, ACTUAL_FP_REGNUM);
390 frame_sp = frame_fp - fp_offset;
391 } else {
392 /* We have no frame pointer, therefore frame_sp is still the same value
393 as set by prologue. But where is the frame itself? */
394 if (must_adjust[SRP_REGNUM]) {
395 /* Function header saved SRP (r1), the return address. Frame starts
396 4 bytes down from where it was saved. */
397 frame_fp = frame_sp + fsr->regs[SRP_REGNUM] - 4;
398 fi->locals_pointer = frame_fp;
399 } else {
400 /* Function header didn't save SRP (r1), so we are in a leaf fn or
401 are otherwise confused. */
402 frame_fp = -1;
403 }
404 }
405
406 /* The locals are relative to the FP (whether it exists as an allocated
407 register, or just as an assumed offset from the SP) */
408 fi->locals_pointer = frame_fp;
409
410 /* The arguments are just above the SP as it was before we adjusted it
411 on entry. */
412 fi->args_pointer = frame_sp - sp_offset;
413
414 /* Now that we know the SP value used by the prologue, we know where
415 it saved all the registers. */
416 for (src = 0; src < 32; src++)
417 if (must_adjust[src])
418 fsr->regs[src] += frame_sp;
419
420 /* The saved value of the SP is always known. */
421 /* (we hope...) */
422 if (fsr->regs[SP_REGNUM] != 0
423 && fsr->regs[SP_REGNUM] != frame_sp - sp_offset)
424 fprintf(stderr, "Bad saved SP value %x != %x, offset %x!\n",
425 fsr->regs[SP_REGNUM],
426 frame_sp - sp_offset, sp_offset);
427
428 fsr->regs[SP_REGNUM] = frame_sp - sp_offset;
429
430 return (ip);
431 }
432
433 /* Given an ip value corresponding to the start of a function,
434 return the ip of the first instruction after the function
435 prologue. */
436
437 CORE_ADDR
438 skip_prologue (ip)
439 CORE_ADDR (ip);
440 {
441 struct frame_saved_regs saved_regs_dummy;
442 struct symtab_and_line sal;
443 CORE_ADDR limit;
444
445 sal = find_pc_line (ip, 0);
446 limit = (sal.end) ? sal.end : 0xffffffff;
447
448 return (examine_prologue (ip, limit, (FRAME_ADDR) 0, &saved_regs_dummy,
449 (struct frame_info *)0 ));
450 }
451
452 /* Put here the code to store, into a struct frame_saved_regs,
453 the addresses of the saved registers of frame described by FRAME_INFO.
454 This includes special registers such as pc and fp saved in special
455 ways in the stack frame. sp is even more special:
456 the address we return for it IS the sp for the next frame.
457
458 We cache the result of doing this in the frame_cache_obstack, since
459 it is fairly expensive. */
460
461 void
462 frame_find_saved_regs (fi, fsr)
463 struct frame_info *fi;
464 struct frame_saved_regs *fsr;
465 {
466 register CORE_ADDR next_addr;
467 register CORE_ADDR *saved_regs;
468 register int regnum;
469 register struct frame_saved_regs *cache_fsr;
470 extern struct obstack frame_cache_obstack;
471 CORE_ADDR ip;
472 struct symtab_and_line sal;
473 CORE_ADDR limit;
474
475 if (!fi->fsr)
476 {
477 cache_fsr = (struct frame_saved_regs *)
478 obstack_alloc (&frame_cache_obstack,
479 sizeof (struct frame_saved_regs));
480 memset (cache_fsr, '\0', sizeof (struct frame_saved_regs));
481 fi->fsr = cache_fsr;
482
483 /* Find the start and end of the function prologue. If the PC
484 is in the function prologue, we only consider the part that
485 has executed already. */
486
487 ip = get_pc_function_start (fi->pc);
488 sal = find_pc_line (ip, 0);
489 limit = (sal.end && sal.end < fi->pc) ? sal.end: fi->pc;
490
491 /* This will fill in fields in *fi as well as in cache_fsr. */
492 examine_prologue (ip, limit, fi->frame, cache_fsr, fi);
493 }
494
495 if (fsr)
496 *fsr = *fi->fsr;
497 }
498
499 /* Return the address of the locals block for the frame
500 described by FI. Returns 0 if the address is unknown.
501 NOTE! Frame locals are referred to by negative offsets from the
502 argument pointer, so this is the same as frame_args_address(). */
503
504 CORE_ADDR
505 frame_locals_address (fi)
506 struct frame_info *fi;
507 {
508 register FRAME frame;
509 struct frame_saved_regs fsr;
510 CORE_ADDR ap;
511
512 if (fi->args_pointer) /* Cached value is likely there. */
513 return fi->args_pointer;
514
515 /* Nope, generate it. */
516
517 get_frame_saved_regs (fi, &fsr);
518
519 return fi->args_pointer;
520 }
521
522 /* Return the address of the argument block for the frame
523 described by FI. Returns 0 if the address is unknown. */
524
525 CORE_ADDR
526 frame_args_address (fi)
527 struct frame_info *fi;
528 {
529 register FRAME frame;
530 struct frame_saved_regs fsr;
531 CORE_ADDR ap;
532
533 if (fi->args_pointer) /* Cached value is likely there. */
534 return fi->args_pointer;
535
536 /* Nope, generate it. */
537
538 get_frame_saved_regs (fi, &fsr);
539
540 return fi->args_pointer;
541 }
542
543 /* Return the saved PC from this frame.
544
545 If the frame has a memory copy of SRP_REGNUM, use that. If not,
546 just use the register SRP_REGNUM itself. */
547
548 CORE_ADDR
549 frame_saved_pc (frame)
550 FRAME frame;
551 {
552 return read_next_frame_reg(frame, SRP_REGNUM);
553 }
554
555
556 static int
557 pushed_size (prev_words, v)
558 int prev_words;
559 struct value *v;
560 {
561 switch (TYPE_CODE (VALUE_TYPE (v)))
562 {
563 case TYPE_CODE_VOID: /* Void type (values zero length) */
564
565 return 0; /* That was easy! */
566
567 case TYPE_CODE_PTR: /* Pointer type */
568 case TYPE_CODE_ENUM: /* Enumeration type */
569 case TYPE_CODE_INT: /* Integer type */
570 case TYPE_CODE_REF: /* C++ Reference types */
571 case TYPE_CODE_ARRAY: /* Array type, lower & upper bounds */
572
573 return 1;
574
575 case TYPE_CODE_FLT: /* Floating type */
576
577 if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
578 return 1;
579 else
580 /* Assume that it must be a double. */
581 if (prev_words & 1) /* at an odd-word boundary */
582 return 3; /* round to 8-byte boundary */
583 else
584 return 2;
585
586 case TYPE_CODE_STRUCT: /* C struct or Pascal record */
587 case TYPE_CODE_UNION: /* C union or Pascal variant part */
588
589 return (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
590
591 case TYPE_CODE_FUNC: /* Function type */
592 case TYPE_CODE_SET: /* Pascal sets */
593 case TYPE_CODE_RANGE: /* Range (integers within bounds) */
594 case TYPE_CODE_STRING: /* String type */
595 case TYPE_CODE_MEMBER: /* Member type */
596 case TYPE_CODE_METHOD: /* Method type */
597 /* Don't know how to pass these yet. */
598
599 case TYPE_CODE_UNDEF: /* Not used; catches errors */
600 default:
601 abort ();
602 }
603 }
604
605 static void
606 store_parm_word (address, val)
607 CORE_ADDR address;
608 int val;
609 {
610 write_memory (address, (char *)&val, 4);
611 }
612
613 static int
614 store_parm (prev_words, left_parm_addr, v)
615 unsigned int prev_words;
616 CORE_ADDR left_parm_addr;
617 struct value *v;
618 {
619 CORE_ADDR start = left_parm_addr + (prev_words * 4);
620 int *val_addr = (int *)VALUE_CONTENTS(v);
621
622 switch (TYPE_CODE (VALUE_TYPE (v)))
623 {
624 case TYPE_CODE_VOID: /* Void type (values zero length) */
625
626 return 0;
627
628 case TYPE_CODE_PTR: /* Pointer type */
629 case TYPE_CODE_ENUM: /* Enumeration type */
630 case TYPE_CODE_INT: /* Integer type */
631 case TYPE_CODE_ARRAY: /* Array type, lower & upper bounds */
632 case TYPE_CODE_REF: /* C++ Reference types */
633
634 store_parm_word (start, *val_addr);
635 return 1;
636
637 case TYPE_CODE_FLT: /* Floating type */
638
639 if (TYPE_LENGTH (VALUE_TYPE (v)) == 4)
640 {
641 store_parm_word (start, *val_addr);
642 return 1;
643 }
644 else
645 {
646 store_parm_word (start + ((prev_words & 1) * 4), val_addr[0]);
647 store_parm_word (start + ((prev_words & 1) * 4) + 4, val_addr[1]);
648 return 2 + (prev_words & 1);
649 }
650
651 case TYPE_CODE_STRUCT: /* C struct or Pascal record */
652 case TYPE_CODE_UNION: /* C union or Pascal variant part */
653
654 {
655 unsigned int words = (((TYPE_LENGTH (VALUE_TYPE (v)) + 3) / 4) * 4);
656 unsigned int word;
657
658 for (word = 0; word < words; word++)
659 store_parm_word (start + (word * 4), val_addr[word]);
660 return words;
661 }
662
663 default:
664 abort ();
665 }
666 }
667
668 /* This routine sets up all of the parameter values needed to make a pseudo
669 call. The name "push_parameters" is a misnomer on some archs,
670 because (on the m88k) most parameters generally end up being passed in
671 registers rather than on the stack. In this routine however, we do
672 end up storing *all* parameter values onto the stack (even if we will
673 realize later that some of these stores were unnecessary). */
674
675 #define FIRST_PARM_REGNUM 2
676
677 void
678 push_parameters (return_type, struct_conv, nargs, args)
679 struct type *return_type;
680 int struct_conv;
681 int nargs;
682 value *args;
683 {
684 int parm_num;
685 unsigned int p_words = 0;
686 CORE_ADDR left_parm_addr;
687
688 /* Start out by creating a space for the return value (if need be). We
689 only need to do this if the return value is a struct or union. If we
690 do make a space for a struct or union return value, then we must also
691 arrange for the base address of that space to go into r12, which is the
692 standard place to pass the address of the return value area to the
693 callee. Note that only structs and unions are returned in this fashion.
694 Ints, enums, pointers, and floats are returned into r2. Doubles are
695 returned into the register pair {r2,r3}. Note also that the space
696 reserved for a struct or union return value only has to be word aligned
697 (not double-word) but it is double-word aligned here anyway (just in
698 case that becomes important someday). */
699
700 switch (TYPE_CODE (return_type))
701 {
702 case TYPE_CODE_STRUCT:
703 case TYPE_CODE_UNION:
704 {
705 int return_bytes = ((TYPE_LENGTH (return_type) + 7) / 8) * 8;
706 CORE_ADDR rv_addr;
707
708 rv_addr = read_register (SP_REGNUM) - return_bytes;
709
710 write_register (SP_REGNUM, rv_addr); /* push space onto the stack */
711 write_register (SRA_REGNUM, rv_addr);/* set return value register */
712 }
713 }
714
715 /* Here we make a pre-pass on the whole parameter list to figure out exactly
716 how many words worth of stuff we are going to pass. */
717
718 for (p_words = 0, parm_num = 0; parm_num < nargs; parm_num++)
719 p_words += pushed_size (p_words, value_arg_coerce (args[parm_num]));
720
721 /* Now, check to see if we have to round up the number of parameter words
722 to get up to the next 8-bytes boundary. This may be necessary because
723 of the software convention to always keep the stack aligned on an 8-byte
724 boundary. */
725
726 if (p_words & 1)
727 p_words++; /* round to 8-byte boundary */
728
729 /* Now figure out the absolute address of the leftmost parameter, and update
730 the stack pointer to point at that address. */
731
732 left_parm_addr = read_register (SP_REGNUM) - (p_words * 4);
733 write_register (SP_REGNUM, left_parm_addr);
734
735 /* Now we can go through all of the parameters (in left-to-right order)
736 and write them to their parameter stack slots. Note that we are not
737 really "pushing" the parameter values. The stack space for these values
738 was already allocated above. Now we are just filling it up. */
739
740 for (p_words = 0, parm_num = 0; parm_num < nargs; parm_num++)
741 p_words +=
742 store_parm (p_words, left_parm_addr, value_arg_coerce (args[parm_num]));
743
744 /* Now that we are all done storing the parameter values into the stack, we
745 must go back and load up the parameter registers with the values from the
746 corresponding stack slots. Note that in the two cases of (a) gaps in the
747 parameter word sequence causes by (otherwise) misaligned doubles, and (b)
748 slots correcponding to structs or unions, the work we do here in loading
749 some parameter registers may be unnecessary, but who cares? */
750
751 for (p_words = 0; p_words < 8; p_words++)
752 {
753 write_register (FIRST_PARM_REGNUM + p_words,
754 read_memory_integer (left_parm_addr + (p_words * 4), 4));
755 }
756 }
757
758 void
759 pop_frame ()
760 {
761 error ("Feature not implemented for the m88k yet.");
762 return;
763 }
764
765 void
766 collect_returned_value (rval, value_type, struct_return, nargs, args)
767 value *rval;
768 struct type *value_type;
769 int struct_return;
770 int nargs;
771 value *args;
772 {
773 char retbuf[REGISTER_BYTES];
774
775 memcpy (retbuf, registers, REGISTER_BYTES);
776 *rval = value_being_returned (value_type, retbuf, struct_return);
777 return;
778 }
779
780 #if 0
781 /* Now handled in a machine independent way with CALL_DUMMY_LOCATION. */
782 /* Stuff a breakpoint instruction onto the stack (or elsewhere if the stack
783 is not a good place for it). Return the address at which the instruction
784 got stuffed, or zero if we were unable to stuff it anywhere. */
785
786 CORE_ADDR
787 push_breakpoint ()
788 {
789 static char breakpoint_insn[] = BREAKPOINT;
790 extern CORE_ADDR text_end; /* of inferior */
791 static char readback_buffer[] = BREAKPOINT;
792 int i;
793
794 /* With a little bit of luck, we can just stash the breakpoint instruction
795 in the word just beyond the end of normal text space. For systems on
796 which the hardware will not allow us to execute out of the stack segment,
797 we have to hope that we *are* at least allowed to effectively extend the
798 text segment by one word. If the actual end of user's the text segment
799 happens to fall right at a page boundary this trick may fail. Note that
800 we check for this by reading after writing, and comparing in order to
801 be sure that the write worked. */
802
803 write_memory (text_end, &breakpoint_insn, 4);
804
805 /* Fill the readback buffer with some garbage which is certain to be
806 unequal to the breakpoint insn. That way we can tell if the
807 following read doesn't actually succeed. */
808
809 for (i = 0; i < sizeof (readback_buffer); i++)
810 readback_buffer[i] = ~ readback_buffer[i]; /* Invert the bits */
811
812 /* Now check that the breakpoint insn was successfully installed. */
813
814 read_memory (text_end, readback_buffer, sizeof (readback_buffer));
815 for (i = 0; i < sizeof (readback_buffer); i++)
816 if (readback_buffer[i] != breakpoint_insn[i])
817 return 0; /* Failed to install! */
818
819 return text_end;
820 }
821 #endif