1 /* Native-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001-2021 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "mips-tdep.h"
27 #include "linux-nat-trad.h"
28 #include "mips-linux-tdep.h"
29 #include "target-descriptions.h"
31 #include "gdb_proc_service.h"
35 #include "nat/gdb_ptrace.h"
36 #include <asm/ptrace.h>
37 #include "inf-ptrace.h"
39 #include "nat/mips-linux-watch.h"
41 #ifndef PTRACE_GET_THREAD_AREA
42 #define PTRACE_GET_THREAD_AREA 25
45 class mips_linux_nat_target final
: public linux_nat_trad_target
48 /* Add our register access methods. */
49 void fetch_registers (struct regcache
*, int) override
;
50 void store_registers (struct regcache
*, int) override
;
52 void close () override
;
54 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
56 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
57 struct expression
*) override
;
59 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
60 struct expression
*) override
;
62 bool stopped_by_watchpoint () override
;
64 bool stopped_data_address (CORE_ADDR
*) override
;
66 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
68 const struct target_desc
*read_description () override
;
71 /* Override linux_nat_trad_target methods. */
72 CORE_ADDR
register_u_offset (struct gdbarch
*gdbarch
,
73 int regno
, int store_p
) override
;
75 /* Override linux_nat_target low methods. */
76 void low_new_thread (struct lwp_info
*lp
) override
;
79 /* Helpers. See definitions. */
80 void mips64_regsets_store_registers (struct regcache
*regcache
,
82 void mips64_regsets_fetch_registers (struct regcache
*regcache
,
86 static mips_linux_nat_target the_mips_linux_nat_target
;
88 /* Assume that we have PTRACE_GETREGS et al. support. If we do not,
89 we'll clear this and use PTRACE_PEEKUSER instead. */
90 static int have_ptrace_regsets
= 1;
92 /* Map gdb internal register number to ptrace ``address''.
93 These ``addresses'' are normally defined in <asm/ptrace.h>.
95 ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
96 and there's no point in reading or setting MIPS_ZERO_REGNUM.
97 We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */
100 mips_linux_register_addr (struct gdbarch
*gdbarch
, int regno
, int store
)
104 if (regno
< 0 || regno
>= gdbarch_num_regs (gdbarch
))
105 error (_("Bogon register number %d."), regno
);
107 if (regno
> MIPS_ZERO_REGNUM
&& regno
< MIPS_ZERO_REGNUM
+ 32)
109 else if ((regno
>= mips_regnum (gdbarch
)->fp0
)
110 && (regno
< mips_regnum (gdbarch
)->fp0
+ 32))
111 regaddr
= FPR_BASE
+ (regno
- mips_regnum (gdbarch
)->fp0
);
112 else if (regno
== mips_regnum (gdbarch
)->pc
)
114 else if (regno
== mips_regnum (gdbarch
)->cause
)
115 regaddr
= store
? (CORE_ADDR
) -1 : CAUSE
;
116 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
117 regaddr
= store
? (CORE_ADDR
) -1 : BADVADDR
;
118 else if (regno
== mips_regnum (gdbarch
)->lo
)
120 else if (regno
== mips_regnum (gdbarch
)->hi
)
122 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
124 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
125 regaddr
= store
? (CORE_ADDR
) -1 : FPC_EIR
;
126 else if (mips_regnum (gdbarch
)->dspacc
!= -1
127 && regno
>= mips_regnum (gdbarch
)->dspacc
128 && regno
< mips_regnum (gdbarch
)->dspacc
+ 6)
129 regaddr
= DSP_BASE
+ (regno
- mips_regnum (gdbarch
)->dspacc
);
130 else if (regno
== mips_regnum (gdbarch
)->dspctl
)
131 regaddr
= DSP_CONTROL
;
132 else if (mips_linux_restart_reg_p (gdbarch
) && regno
== MIPS_RESTART_REGNUM
)
135 regaddr
= (CORE_ADDR
) -1;
141 mips64_linux_register_addr (struct gdbarch
*gdbarch
, int regno
, int store
)
145 if (regno
< 0 || regno
>= gdbarch_num_regs (gdbarch
))
146 error (_("Bogon register number %d."), regno
);
148 /* On n32 we can't access 64-bit registers via PTRACE_PEEKUSR
149 or PTRACE_POKEUSR. */
150 if (register_size (gdbarch
, regno
) > sizeof (PTRACE_TYPE_RET
))
151 return (CORE_ADDR
) -1;
153 if (regno
> MIPS_ZERO_REGNUM
&& regno
< MIPS_ZERO_REGNUM
+ 32)
155 else if ((regno
>= mips_regnum (gdbarch
)->fp0
)
156 && (regno
< mips_regnum (gdbarch
)->fp0
+ 32))
157 regaddr
= MIPS64_FPR_BASE
+ (regno
- gdbarch_fp0_regnum (gdbarch
));
158 else if (regno
== mips_regnum (gdbarch
)->pc
)
160 else if (regno
== mips_regnum (gdbarch
)->cause
)
161 regaddr
= store
? (CORE_ADDR
) -1 : MIPS64_CAUSE
;
162 else if (regno
== mips_regnum (gdbarch
)->badvaddr
)
163 regaddr
= store
? (CORE_ADDR
) -1 : MIPS64_BADVADDR
;
164 else if (regno
== mips_regnum (gdbarch
)->lo
)
165 regaddr
= MIPS64_MMLO
;
166 else if (regno
== mips_regnum (gdbarch
)->hi
)
167 regaddr
= MIPS64_MMHI
;
168 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
169 regaddr
= MIPS64_FPC_CSR
;
170 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
171 regaddr
= store
? (CORE_ADDR
) -1 : MIPS64_FPC_EIR
;
172 else if (mips_regnum (gdbarch
)->dspacc
!= -1
173 && regno
>= mips_regnum (gdbarch
)->dspacc
174 && regno
< mips_regnum (gdbarch
)->dspacc
+ 6)
175 regaddr
= DSP_BASE
+ (regno
- mips_regnum (gdbarch
)->dspacc
);
176 else if (regno
== mips_regnum (gdbarch
)->dspctl
)
177 regaddr
= DSP_CONTROL
;
178 else if (mips_linux_restart_reg_p (gdbarch
) && regno
== MIPS_RESTART_REGNUM
)
181 regaddr
= (CORE_ADDR
) -1;
186 /* Fetch the thread-local storage pointer for libthread_db. */
189 ps_get_thread_area (struct ps_prochandle
*ph
,
190 lwpid_t lwpid
, int idx
, void **base
)
192 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
, NULL
, base
) != 0)
195 /* IDX is the bias from the thread pointer to the beginning of the
196 thread descriptor. It has to be subtracted due to implementation
197 quirks in libthread_db. */
198 *base
= (void *) ((char *)*base
- idx
);
203 /* Wrapper functions. These are only used by libthread_db. */
206 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
208 if (mips_isa_regsize (regcache
->arch ()) == 4)
209 mips_supply_gregset (regcache
, (const mips_elf_gregset_t
*) gregsetp
);
211 mips64_supply_gregset (regcache
, (const mips64_elf_gregset_t
*) gregsetp
);
215 fill_gregset (const struct regcache
*regcache
,
216 gdb_gregset_t
*gregsetp
, int regno
)
218 if (mips_isa_regsize (regcache
->arch ()) == 4)
219 mips_fill_gregset (regcache
, (mips_elf_gregset_t
*) gregsetp
, regno
);
221 mips64_fill_gregset (regcache
, (mips64_elf_gregset_t
*) gregsetp
, regno
);
225 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
*fpregsetp
)
227 mips64_supply_fpregset (regcache
, (const mips64_elf_fpregset_t
*) fpregsetp
);
231 fill_fpregset (const struct regcache
*regcache
,
232 gdb_fpregset_t
*fpregsetp
, int regno
)
234 mips64_fill_fpregset (regcache
, (mips64_elf_fpregset_t
*) fpregsetp
, regno
);
238 /* Fetch REGNO (or all registers if REGNO == -1) from the target
239 using PTRACE_GETREGS et al. */
242 mips_linux_nat_target::mips64_regsets_fetch_registers
243 (struct regcache
*regcache
, int regno
)
245 struct gdbarch
*gdbarch
= regcache
->arch ();
251 if (regno
>= mips_regnum (gdbarch
)->fp0
252 && regno
<= mips_regnum (gdbarch
)->fp0
+ 32)
254 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
256 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
261 /* DSP registers are optional and not a part of any set. */
262 have_dsp
= mips_regnum (gdbarch
)->dspctl
!= -1;
265 else if (regno
>= mips_regnum (gdbarch
)->dspacc
266 && regno
< mips_regnum (gdbarch
)->dspacc
+ 6)
268 else if (regno
== mips_regnum (gdbarch
)->dspctl
)
273 tid
= get_ptrace_pid (regcache
->ptid ());
275 if (regno
== -1 || (!is_fp
&& !is_dsp
))
277 mips64_elf_gregset_t regs
;
279 if (ptrace (PTRACE_GETREGS
, tid
, 0L, (PTRACE_TYPE_ARG3
) ®s
) == -1)
283 have_ptrace_regsets
= 0;
286 perror_with_name (_("Couldn't get registers"));
289 mips64_supply_gregset (regcache
,
290 (const mips64_elf_gregset_t
*) ®s
);
293 if (regno
== -1 || is_fp
)
295 mips64_elf_fpregset_t fp_regs
;
297 if (ptrace (PTRACE_GETFPREGS
, tid
, 0L,
298 (PTRACE_TYPE_ARG3
) &fp_regs
) == -1)
302 have_ptrace_regsets
= 0;
305 perror_with_name (_("Couldn't get FP registers"));
308 mips64_supply_fpregset (regcache
,
309 (const mips64_elf_fpregset_t
*) &fp_regs
);
313 linux_nat_trad_target::fetch_registers (regcache
, regno
);
314 else if (regno
== -1 && have_dsp
)
316 for (regi
= mips_regnum (gdbarch
)->dspacc
;
317 regi
< mips_regnum (gdbarch
)->dspacc
+ 6;
319 linux_nat_trad_target::fetch_registers (regcache
, regi
);
320 linux_nat_trad_target::fetch_registers (regcache
,
321 mips_regnum (gdbarch
)->dspctl
);
325 /* Store REGNO (or all registers if REGNO == -1) to the target
326 using PTRACE_SETREGS et al. */
329 mips_linux_nat_target::mips64_regsets_store_registers
330 (struct regcache
*regcache
, int regno
)
332 struct gdbarch
*gdbarch
= regcache
->arch ();
338 if (regno
>= mips_regnum (gdbarch
)->fp0
339 && regno
<= mips_regnum (gdbarch
)->fp0
+ 32)
341 else if (regno
== mips_regnum (gdbarch
)->fp_control_status
)
343 else if (regno
== mips_regnum (gdbarch
)->fp_implementation_revision
)
348 /* DSP registers are optional and not a part of any set. */
349 have_dsp
= mips_regnum (gdbarch
)->dspctl
!= -1;
352 else if (regno
>= mips_regnum (gdbarch
)->dspacc
353 && regno
< mips_regnum (gdbarch
)->dspacc
+ 6)
355 else if (regno
== mips_regnum (gdbarch
)->dspctl
)
360 tid
= get_ptrace_pid (regcache
->ptid ());
362 if (regno
== -1 || (!is_fp
&& !is_dsp
))
364 mips64_elf_gregset_t regs
;
366 if (ptrace (PTRACE_GETREGS
, tid
, 0L, (PTRACE_TYPE_ARG3
) ®s
) == -1)
367 perror_with_name (_("Couldn't get registers"));
369 mips64_fill_gregset (regcache
, ®s
, regno
);
371 if (ptrace (PTRACE_SETREGS
, tid
, 0L, (PTRACE_TYPE_ARG3
) ®s
) == -1)
372 perror_with_name (_("Couldn't set registers"));
375 if (regno
== -1 || is_fp
)
377 mips64_elf_fpregset_t fp_regs
;
379 if (ptrace (PTRACE_GETFPREGS
, tid
, 0L,
380 (PTRACE_TYPE_ARG3
) &fp_regs
) == -1)
381 perror_with_name (_("Couldn't get FP registers"));
383 mips64_fill_fpregset (regcache
, &fp_regs
, regno
);
385 if (ptrace (PTRACE_SETFPREGS
, tid
, 0L,
386 (PTRACE_TYPE_ARG3
) &fp_regs
) == -1)
387 perror_with_name (_("Couldn't set FP registers"));
391 linux_nat_trad_target::store_registers (regcache
, regno
);
392 else if (regno
== -1 && have_dsp
)
394 for (regi
= mips_regnum (gdbarch
)->dspacc
;
395 regi
< mips_regnum (gdbarch
)->dspacc
+ 6;
397 linux_nat_trad_target::store_registers (regcache
, regi
);
398 linux_nat_trad_target::store_registers (regcache
,
399 mips_regnum (gdbarch
)->dspctl
);
403 /* Fetch REGNO (or all registers if REGNO == -1) from the target
404 using any working method. */
407 mips_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regnum
)
409 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
410 if (have_ptrace_regsets
)
411 mips64_regsets_fetch_registers (regcache
, regnum
);
413 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
414 back to PTRACE_PEEKUSER. */
415 if (!have_ptrace_regsets
)
417 linux_nat_trad_target::fetch_registers (regcache
, regnum
);
419 /* Fill the inaccessible zero register with zero. */
420 if (regnum
== MIPS_ZERO_REGNUM
|| regnum
== -1)
421 regcache
->raw_supply_zeroed (MIPS_ZERO_REGNUM
);
425 /* Store REGNO (or all registers if REGNO == -1) to the target
426 using any working method. */
429 mips_linux_nat_target::store_registers (struct regcache
*regcache
, int regnum
)
431 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
432 if (have_ptrace_regsets
)
433 mips64_regsets_store_registers (regcache
, regnum
);
435 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
436 back to PTRACE_PEEKUSER. */
437 if (!have_ptrace_regsets
)
438 linux_nat_trad_target::store_registers (regcache
, regnum
);
441 /* Return the address in the core dump or inferior of register
445 mips_linux_nat_target::register_u_offset (struct gdbarch
*gdbarch
,
446 int regno
, int store_p
)
448 if (mips_abi_regsize (gdbarch
) == 8)
449 return mips64_linux_register_addr (gdbarch
, regno
, store_p
);
451 return mips_linux_register_addr (gdbarch
, regno
, store_p
);
454 const struct target_desc
*
455 mips_linux_nat_target::read_description ()
457 static int have_dsp
= -1;
461 int tid
= get_ptrace_pid (inferior_ptid
);
464 ptrace (PTRACE_PEEKUSER
, tid
, DSP_CONTROL
, 0);
474 perror_with_name (_("Couldn't check DSP support"));
479 /* Report that target registers are a size we know for sure
480 that we can get from ptrace. */
481 if (_MIPS_SIM
== _ABIO32
)
482 return have_dsp
? tdesc_mips_dsp_linux
: tdesc_mips_linux
;
484 return have_dsp
? tdesc_mips64_dsp_linux
: tdesc_mips64_linux
;
487 /* -1 if the kernel and/or CPU do not support watch registers.
488 1 if watch_readback is valid and we can read style, num_valid
490 0 if we need to read the watch_readback. */
492 static int watch_readback_valid
;
494 /* Cached watch register read values. */
496 static struct pt_watch_regs watch_readback
;
498 static struct mips_watchpoint
*current_watches
;
500 /* The current set of watch register values for writing the
503 static struct pt_watch_regs watch_mirror
;
506 mips_show_dr (const char *func
, CORE_ADDR addr
,
507 int len
, enum target_hw_bp_type type
)
511 fputs_unfiltered (func
, gdb_stdlog
);
513 fprintf_unfiltered (gdb_stdlog
,
514 " (addr=%s, len=%d, type=%s)",
515 paddress (target_gdbarch (), addr
), len
,
516 type
== hw_write
? "data-write"
517 : (type
== hw_read
? "data-read"
518 : (type
== hw_access
? "data-read/write"
519 : (type
== hw_execute
? "instruction-execute"
521 fputs_unfiltered (":\n", gdb_stdlog
);
523 for (i
= 0; i
< MAX_DEBUG_REGISTER
; i
++)
524 fprintf_unfiltered (gdb_stdlog
, "\tDR%d: lo=%s, hi=%s\n", i
,
525 paddress (target_gdbarch (),
526 mips_linux_watch_get_watchlo (&watch_mirror
,
528 paddress (target_gdbarch (),
529 mips_linux_watch_get_watchhi (&watch_mirror
,
533 /* Target to_can_use_hw_breakpoint implementation. Return 1 if we can
534 handle the specified watch type. */
537 mips_linux_nat_target::can_use_hw_breakpoint (enum bptype type
,
541 uint32_t wanted_mask
, irw_mask
;
543 if (!mips_linux_read_watch_registers (inferior_ptid
.lwp (),
545 &watch_readback_valid
, 0))
550 case bp_hardware_watchpoint
:
551 wanted_mask
= W_MASK
;
553 case bp_read_watchpoint
:
554 wanted_mask
= R_MASK
;
556 case bp_access_watchpoint
:
557 wanted_mask
= R_MASK
| W_MASK
;
564 i
< mips_linux_watch_get_num_valid (&watch_readback
) && cnt
;
567 irw_mask
= mips_linux_watch_get_irw_mask (&watch_readback
, i
);
568 if ((irw_mask
& wanted_mask
) == wanted_mask
)
571 return (cnt
== 0) ? 1 : 0;
574 /* Target to_stopped_by_watchpoint implementation. Return 1 if
575 stopped by watchpoint. The watchhi R and W bits indicate the watch
576 register triggered. */
579 mips_linux_nat_target::stopped_by_watchpoint ()
584 if (!mips_linux_read_watch_registers (inferior_ptid
.lwp (),
586 &watch_readback_valid
, 1))
589 num_valid
= mips_linux_watch_get_num_valid (&watch_readback
);
591 for (n
= 0; n
< MAX_DEBUG_REGISTER
&& n
< num_valid
; n
++)
592 if (mips_linux_watch_get_watchhi (&watch_readback
, n
) & (R_MASK
| W_MASK
))
598 /* Target to_stopped_data_address implementation. Set the address
599 where the watch triggered (if known). Return 1 if the address was
603 mips_linux_nat_target::stopped_data_address (CORE_ADDR
*paddr
)
605 /* On mips we don't know the low order 3 bits of the data address,
606 so we must return false. */
610 /* Target to_region_ok_for_hw_watchpoint implementation. Return 1 if
611 the specified region can be covered by the watch registers. */
614 mips_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
616 struct pt_watch_regs dummy_regs
;
619 if (!mips_linux_read_watch_registers (inferior_ptid
.lwp (),
621 &watch_readback_valid
, 0))
624 dummy_regs
= watch_readback
;
625 /* Clear them out. */
626 for (i
= 0; i
< mips_linux_watch_get_num_valid (&dummy_regs
); i
++)
627 mips_linux_watch_set_watchlo (&dummy_regs
, i
, 0);
628 return mips_linux_watch_try_one_watch (&dummy_regs
, addr
, len
, 0);
631 /* Write the mirrored watch register values for each thread. */
634 write_watchpoint_regs (void)
636 for (const lwp_info
*lp
: all_lwps ())
638 int tid
= lp
->ptid
.lwp ();
639 if (ptrace (PTRACE_SET_WATCH_REGS
, tid
, &watch_mirror
, NULL
) == -1)
640 perror_with_name (_("Couldn't write debug register"));
645 /* linux_nat_target::low_new_thread implementation. Write the
646 mirrored watch register values for the new thread. */
649 mips_linux_nat_target::low_new_thread (struct lwp_info
*lp
)
651 long tid
= lp
->ptid
.lwp ();
653 if (!mips_linux_read_watch_registers (tid
,
655 &watch_readback_valid
, 0))
658 if (ptrace (PTRACE_SET_WATCH_REGS
, tid
, &watch_mirror
, NULL
) == -1)
659 perror_with_name (_("Couldn't write debug register"));
662 /* Target to_insert_watchpoint implementation. Try to insert a new
663 watch. Return zero on success. */
666 mips_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
667 enum target_hw_bp_type type
,
668 struct expression
*cond
)
670 struct pt_watch_regs regs
;
671 struct mips_watchpoint
*new_watch
;
672 struct mips_watchpoint
**pw
;
676 if (!mips_linux_read_watch_registers (inferior_ptid
.lwp (),
678 &watch_readback_valid
, 0))
684 regs
= watch_readback
;
685 /* Add the current watches. */
686 mips_linux_watch_populate_regs (current_watches
, ®s
);
688 /* Now try to add the new watch. */
689 if (!mips_linux_watch_try_one_watch (®s
, addr
, len
,
690 mips_linux_watch_type_to_irw (type
)))
693 /* It fit. Stick it on the end of the list. */
694 new_watch
= XNEW (struct mips_watchpoint
);
695 new_watch
->addr
= addr
;
696 new_watch
->len
= len
;
697 new_watch
->type
= type
;
698 new_watch
->next
= NULL
;
700 pw
= ¤t_watches
;
706 retval
= write_watchpoint_regs ();
709 mips_show_dr ("insert_watchpoint", addr
, len
, type
);
714 /* Target to_remove_watchpoint implementation. Try to remove a watch.
715 Return zero on success. */
718 mips_linux_nat_target::remove_watchpoint (CORE_ADDR addr
, int len
,
719 enum target_hw_bp_type type
,
720 struct expression
*cond
)
725 struct mips_watchpoint
**pw
;
726 struct mips_watchpoint
*w
;
728 /* Search for a known watch that matches. Then unlink and free
731 pw
= ¤t_watches
;
734 if (w
->addr
== addr
&& w
->len
== len
&& w
->type
== type
)
745 return -1; /* We don't know about it, fail doing nothing. */
747 /* At this point watch_readback is known to be valid because we
748 could not have added the watch without reading it. */
749 gdb_assert (watch_readback_valid
== 1);
751 watch_mirror
= watch_readback
;
752 mips_linux_watch_populate_regs (current_watches
, &watch_mirror
);
754 retval
= write_watchpoint_regs ();
757 mips_show_dr ("remove_watchpoint", addr
, len
, type
);
762 /* Target to_close implementation. Free any watches and call the
763 super implementation. */
766 mips_linux_nat_target::close ()
768 struct mips_watchpoint
*w
;
769 struct mips_watchpoint
*nw
;
771 /* Clean out the current_watches list. */
779 current_watches
= NULL
;
781 linux_nat_trad_target::close ();
784 void _initialize_mips_linux_nat ();
786 _initialize_mips_linux_nat ()
788 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance
,
789 &show_debug_regs
, _("\
790 Set whether to show variables that mirror the mips debug registers."), _("\
791 Show whether to show variables that mirror the mips debug registers."), _("\
792 Use \"on\" to enable, \"off\" to disable.\n\
793 If enabled, the debug registers values are shown when GDB inserts\n\
794 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
795 triggers a breakpoint or watchpoint."),
798 &maintenance_set_cmdlist
,
799 &maintenance_show_cmdlist
);
801 linux_target
= &the_mips_linux_nat_target
;
802 add_inf_child_target (&the_mips_linux_nat_target
);