1 /* Target-dependent code for GNU/Linux on MIPS processors.
3 Copyright (C) 2001, 2002, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
26 #include "solib-svr4.h"
28 #include "mips-tdep.h"
29 #include "gdb_string.h"
30 #include "gdb_assert.h"
33 #include "trad-frame.h"
34 #include "tramp-frame.h"
37 #include "solib-svr4.h"
40 #include "target-descriptions.h"
41 #include "mips-linux-tdep.h"
43 static struct target_so_ops mips_svr4_so_ops
;
45 /* Figure out where the longjmp will land.
46 We expect the first arg to be a pointer to the jmp_buf structure
47 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
48 at. The pc is copied into PC. This routine returns 1 on
51 #define MIPS_LINUX_JB_ELEMENT_SIZE 4
52 #define MIPS_LINUX_JB_PC 0
55 mips_linux_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
58 char buf
[gdbarch_ptr_bit (current_gdbarch
) / TARGET_CHAR_BIT
];
60 jb_addr
= get_frame_register_unsigned (frame
, MIPS_A0_REGNUM
);
62 if (target_read_memory (jb_addr
63 + MIPS_LINUX_JB_PC
* MIPS_LINUX_JB_ELEMENT_SIZE
,
65 gdbarch_ptr_bit (current_gdbarch
) / TARGET_CHAR_BIT
))
68 *pc
= extract_unsigned_integer (buf
,
69 gdbarch_ptr_bit (current_gdbarch
)
75 /* Transform the bits comprising a 32-bit register to the right size
76 for regcache_raw_supply(). This is needed when mips_isa_regsize()
80 supply_32bit_reg (struct regcache
*regcache
, int regnum
, const void *addr
)
82 gdb_byte buf
[MAX_REGISTER_SIZE
];
83 store_signed_integer (buf
, register_size (current_gdbarch
, regnum
),
84 extract_signed_integer (addr
, 4));
85 regcache_raw_supply (regcache
, regnum
, buf
);
88 /* Unpack an elf_gregset_t into GDB's register cache. */
91 mips_supply_gregset (struct regcache
*regcache
,
92 const mips_elf_gregset_t
*gregsetp
)
95 const mips_elf_greg_t
*regp
= *gregsetp
;
96 char zerobuf
[MAX_REGISTER_SIZE
];
98 memset (zerobuf
, 0, MAX_REGISTER_SIZE
);
100 for (regi
= EF_REG0
+ 1; regi
<= EF_REG31
; regi
++)
101 supply_32bit_reg (regcache
, regi
- EF_REG0
, regp
+ regi
);
103 if (mips_linux_restart_reg_p (current_gdbarch
))
104 supply_32bit_reg (regcache
, MIPS_RESTART_REGNUM
, regp
+ EF_REG0
);
106 supply_32bit_reg (regcache
, mips_regnum (current_gdbarch
)->lo
,
108 supply_32bit_reg (regcache
, mips_regnum (current_gdbarch
)->hi
,
111 supply_32bit_reg (regcache
, mips_regnum (current_gdbarch
)->pc
,
113 supply_32bit_reg (regcache
, mips_regnum (current_gdbarch
)->badvaddr
,
114 regp
+ EF_CP0_BADVADDR
);
115 supply_32bit_reg (regcache
, MIPS_PS_REGNUM
, regp
+ EF_CP0_STATUS
);
116 supply_32bit_reg (regcache
, mips_regnum (current_gdbarch
)->cause
,
117 regp
+ EF_CP0_CAUSE
);
119 /* Fill inaccessible registers with zero. */
120 regcache_raw_supply (regcache
, MIPS_ZERO_REGNUM
, zerobuf
);
121 regcache_raw_supply (regcache
, MIPS_UNUSED_REGNUM
, zerobuf
);
122 for (regi
= MIPS_FIRST_EMBED_REGNUM
;
123 regi
<= MIPS_LAST_EMBED_REGNUM
;
125 regcache_raw_supply (regcache
, regi
, zerobuf
);
128 /* Pack our registers (or one register) into an elf_gregset_t. */
131 mips_fill_gregset (const struct regcache
*regcache
,
132 mips_elf_gregset_t
*gregsetp
, int regno
)
135 mips_elf_greg_t
*regp
= *gregsetp
;
140 memset (regp
, 0, sizeof (mips_elf_gregset_t
));
141 for (regi
= 1; regi
< 32; regi
++)
142 mips_fill_gregset (regcache
, gregsetp
, regi
);
143 mips_fill_gregset (regcache
, gregsetp
,
144 mips_regnum (current_gdbarch
)->lo
);
145 mips_fill_gregset (regcache
, gregsetp
,
146 mips_regnum (current_gdbarch
)->hi
);
147 mips_fill_gregset (regcache
, gregsetp
,
148 mips_regnum (current_gdbarch
)->pc
);
149 mips_fill_gregset (regcache
, gregsetp
,
150 mips_regnum (current_gdbarch
)->badvaddr
);
151 mips_fill_gregset (regcache
, gregsetp
, MIPS_PS_REGNUM
);
152 mips_fill_gregset (regcache
, gregsetp
,
153 mips_regnum (current_gdbarch
)->cause
);
154 mips_fill_gregset (regcache
, gregsetp
, MIPS_RESTART_REGNUM
);
158 if (regno
> 0 && regno
< 32)
160 dst
= regp
+ regno
+ EF_REG0
;
161 regcache_raw_collect (regcache
, regno
, dst
);
165 if (regno
== mips_regnum (current_gdbarch
)->lo
)
167 else if (regno
== mips_regnum (current_gdbarch
)->hi
)
169 else if (regno
== mips_regnum (current_gdbarch
)->pc
)
170 regaddr
= EF_CP0_EPC
;
171 else if (regno
== mips_regnum (current_gdbarch
)->badvaddr
)
172 regaddr
= EF_CP0_BADVADDR
;
173 else if (regno
== MIPS_PS_REGNUM
)
174 regaddr
= EF_CP0_STATUS
;
175 else if (regno
== mips_regnum (current_gdbarch
)->cause
)
176 regaddr
= EF_CP0_CAUSE
;
177 else if (mips_linux_restart_reg_p (current_gdbarch
)
178 && regno
== MIPS_RESTART_REGNUM
)
185 dst
= regp
+ regaddr
;
186 regcache_raw_collect (regcache
, regno
, dst
);
190 /* Likewise, unpack an elf_fpregset_t. */
193 mips_supply_fpregset (struct regcache
*regcache
,
194 const mips_elf_fpregset_t
*fpregsetp
)
197 char zerobuf
[MAX_REGISTER_SIZE
];
199 memset (zerobuf
, 0, MAX_REGISTER_SIZE
);
201 for (regi
= 0; regi
< 32; regi
++)
202 regcache_raw_supply (regcache
,
203 gdbarch_fp0_regnum (current_gdbarch
) + regi
,
206 regcache_raw_supply (regcache
,
207 mips_regnum (current_gdbarch
)->fp_control_status
,
210 /* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
211 regcache_raw_supply (regcache
,
212 mips_regnum (current_gdbarch
)->fp_implementation_revision
,
216 /* Likewise, pack one or all floating point registers into an
220 mips_fill_fpregset (const struct regcache
*regcache
,
221 mips_elf_fpregset_t
*fpregsetp
, int regno
)
225 if ((regno
>= gdbarch_fp0_regnum (current_gdbarch
))
226 && (regno
< gdbarch_fp0_regnum (current_gdbarch
) + 32))
228 to
= (char *) (*fpregsetp
+ regno
- gdbarch_fp0_regnum (current_gdbarch
));
229 regcache_raw_collect (regcache
, regno
, to
);
231 else if (regno
== mips_regnum (current_gdbarch
)->fp_control_status
)
233 to
= (char *) (*fpregsetp
+ 32);
234 regcache_raw_collect (regcache
, regno
, to
);
236 else if (regno
== -1)
240 for (regi
= 0; regi
< 32; regi
++)
241 mips_fill_fpregset (regcache
, fpregsetp
,
242 gdbarch_fp0_regnum (current_gdbarch
) + regi
);
243 mips_fill_fpregset (regcache
, fpregsetp
,
244 mips_regnum (current_gdbarch
)->fp_control_status
);
248 /* Support for 64-bit ABIs. */
250 /* Figure out where the longjmp will land.
251 We expect the first arg to be a pointer to the jmp_buf structure
252 from which we extract the pc (MIPS_LINUX_JB_PC) that we will land
253 at. The pc is copied into PC. This routine returns 1 on
256 /* Details about jmp_buf. */
258 #define MIPS64_LINUX_JB_PC 0
261 mips64_linux_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
264 void *buf
= alloca (gdbarch_ptr_bit (current_gdbarch
) / TARGET_CHAR_BIT
);
265 int element_size
= gdbarch_ptr_bit (current_gdbarch
) == 32 ? 4 : 8;
267 jb_addr
= get_frame_register_unsigned (frame
, MIPS_A0_REGNUM
);
269 if (target_read_memory (jb_addr
+ MIPS64_LINUX_JB_PC
* element_size
,
271 gdbarch_ptr_bit (current_gdbarch
) / TARGET_CHAR_BIT
))
274 *pc
= extract_unsigned_integer (buf
,
275 gdbarch_ptr_bit (current_gdbarch
)
281 /* Register set support functions. These operate on standard 64-bit
282 regsets, but work whether the target is 32-bit or 64-bit. A 32-bit
283 target will still use the 64-bit format for PTRACE_GETREGS. */
285 /* Supply a 64-bit register. */
288 supply_64bit_reg (struct regcache
*regcache
, int regnum
,
291 if (gdbarch_byte_order (current_gdbarch
) == BFD_ENDIAN_BIG
292 && register_size (current_gdbarch
, regnum
) == 4)
293 regcache_raw_supply (regcache
, regnum
, buf
+ 4);
295 regcache_raw_supply (regcache
, regnum
, buf
);
298 /* Unpack a 64-bit elf_gregset_t into GDB's register cache. */
301 mips64_supply_gregset (struct regcache
*regcache
,
302 const mips64_elf_gregset_t
*gregsetp
)
305 const mips64_elf_greg_t
*regp
= *gregsetp
;
306 gdb_byte zerobuf
[MAX_REGISTER_SIZE
];
308 memset (zerobuf
, 0, MAX_REGISTER_SIZE
);
310 for (regi
= MIPS64_EF_REG0
+ 1; regi
<= MIPS64_EF_REG31
; regi
++)
311 supply_64bit_reg (regcache
, regi
- MIPS64_EF_REG0
,
312 (const gdb_byte
*)(regp
+ regi
));
314 if (mips_linux_restart_reg_p (current_gdbarch
))
315 supply_64bit_reg (regcache
, MIPS_RESTART_REGNUM
,
316 (const gdb_byte
*)(regp
+ MIPS64_EF_REG0
));
318 supply_64bit_reg (regcache
, mips_regnum (current_gdbarch
)->lo
,
319 (const gdb_byte
*) (regp
+ MIPS64_EF_LO
));
320 supply_64bit_reg (regcache
, mips_regnum (current_gdbarch
)->hi
,
321 (const gdb_byte
*) (regp
+ MIPS64_EF_HI
));
323 supply_64bit_reg (regcache
, mips_regnum (current_gdbarch
)->pc
,
324 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_EPC
));
325 supply_64bit_reg (regcache
, mips_regnum (current_gdbarch
)->badvaddr
,
326 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_BADVADDR
));
327 supply_64bit_reg (regcache
, MIPS_PS_REGNUM
,
328 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_STATUS
));
329 supply_64bit_reg (regcache
, mips_regnum (current_gdbarch
)->cause
,
330 (const gdb_byte
*) (regp
+ MIPS64_EF_CP0_CAUSE
));
332 /* Fill inaccessible registers with zero. */
333 regcache_raw_supply (regcache
, MIPS_ZERO_REGNUM
, zerobuf
);
334 regcache_raw_supply (regcache
, MIPS_UNUSED_REGNUM
, zerobuf
);
335 for (regi
= MIPS_FIRST_EMBED_REGNUM
;
336 regi
<= MIPS_LAST_EMBED_REGNUM
;
338 regcache_raw_supply (regcache
, regi
, zerobuf
);
341 /* Pack our registers (or one register) into a 64-bit elf_gregset_t. */
344 mips64_fill_gregset (const struct regcache
*regcache
,
345 mips64_elf_gregset_t
*gregsetp
, int regno
)
348 mips64_elf_greg_t
*regp
= *gregsetp
;
353 memset (regp
, 0, sizeof (mips64_elf_gregset_t
));
354 for (regi
= 1; regi
< 32; regi
++)
355 mips64_fill_gregset (regcache
, gregsetp
, regi
);
356 mips64_fill_gregset (regcache
, gregsetp
,
357 mips_regnum (current_gdbarch
)->lo
);
358 mips64_fill_gregset (regcache
, gregsetp
,
359 mips_regnum (current_gdbarch
)->hi
);
360 mips64_fill_gregset (regcache
, gregsetp
,
361 mips_regnum (current_gdbarch
)->pc
);
362 mips64_fill_gregset (regcache
, gregsetp
,
363 mips_regnum (current_gdbarch
)->badvaddr
);
364 mips64_fill_gregset (regcache
, gregsetp
, MIPS_PS_REGNUM
);
365 mips64_fill_gregset (regcache
, gregsetp
,
366 mips_regnum (current_gdbarch
)->cause
);
367 mips64_fill_gregset (regcache
, gregsetp
, MIPS_RESTART_REGNUM
);
371 if (regno
> 0 && regno
< 32)
372 regaddr
= regno
+ MIPS64_EF_REG0
;
373 else if (regno
== mips_regnum (current_gdbarch
)->lo
)
374 regaddr
= MIPS64_EF_LO
;
375 else if (regno
== mips_regnum (current_gdbarch
)->hi
)
376 regaddr
= MIPS64_EF_HI
;
377 else if (regno
== mips_regnum (current_gdbarch
)->pc
)
378 regaddr
= MIPS64_EF_CP0_EPC
;
379 else if (regno
== mips_regnum (current_gdbarch
)->badvaddr
)
380 regaddr
= MIPS64_EF_CP0_BADVADDR
;
381 else if (regno
== MIPS_PS_REGNUM
)
382 regaddr
= MIPS64_EF_CP0_STATUS
;
383 else if (regno
== mips_regnum (current_gdbarch
)->cause
)
384 regaddr
= MIPS64_EF_CP0_CAUSE
;
385 else if (mips_linux_restart_reg_p (current_gdbarch
)
386 && regno
== MIPS_RESTART_REGNUM
)
387 regaddr
= MIPS64_EF_REG0
;
393 gdb_byte buf
[MAX_REGISTER_SIZE
];
396 regcache_raw_collect (regcache
, regno
, buf
);
397 val
= extract_signed_integer (buf
,
398 register_size (current_gdbarch
, regno
));
399 dst
= regp
+ regaddr
;
400 store_signed_integer (dst
, 8, val
);
404 /* Likewise, unpack an elf_fpregset_t. */
407 mips64_supply_fpregset (struct regcache
*regcache
,
408 const mips64_elf_fpregset_t
*fpregsetp
)
412 /* See mips_linux_o32_sigframe_init for a description of the
413 peculiar FP register layout. */
414 if (register_size (current_gdbarch
,
415 gdbarch_fp0_regnum (current_gdbarch
)) == 4)
416 for (regi
= 0; regi
< 32; regi
++)
418 const gdb_byte
*reg_ptr
= (const gdb_byte
*)(*fpregsetp
+ (regi
& ~1));
419 if ((gdbarch_byte_order (current_gdbarch
)
420 == BFD_ENDIAN_BIG
) != (regi
& 1))
422 regcache_raw_supply (regcache
,
423 gdbarch_fp0_regnum (current_gdbarch
) + regi
,
427 for (regi
= 0; regi
< 32; regi
++)
428 regcache_raw_supply (regcache
,
429 gdbarch_fp0_regnum (current_gdbarch
) + regi
,
430 (const char *)(*fpregsetp
+ regi
));
432 supply_32bit_reg (regcache
, mips_regnum (current_gdbarch
)->fp_control_status
,
433 (const gdb_byte
*)(*fpregsetp
+ 32));
435 /* The ABI doesn't tell us how to supply FCRIR, and core dumps don't
436 include it - but the result of PTRACE_GETFPREGS does. The best we
437 can do is to assume that its value is present. */
438 supply_32bit_reg (regcache
,
439 mips_regnum (current_gdbarch
)->fp_implementation_revision
,
440 (const gdb_byte
*)(*fpregsetp
+ 32) + 4);
443 /* Likewise, pack one or all floating point registers into an
447 mips64_fill_fpregset (const struct regcache
*regcache
,
448 mips64_elf_fpregset_t
*fpregsetp
, int regno
)
452 if ((regno
>= gdbarch_fp0_regnum (current_gdbarch
))
453 && (regno
< gdbarch_fp0_regnum (current_gdbarch
) + 32))
455 /* See mips_linux_o32_sigframe_init for a description of the
456 peculiar FP register layout. */
457 if (register_size (current_gdbarch
, regno
) == 4)
459 int regi
= regno
- gdbarch_fp0_regnum (current_gdbarch
);
461 to
= (gdb_byte
*) (*fpregsetp
+ (regi
& ~1));
462 if ((gdbarch_byte_order (current_gdbarch
)
463 == BFD_ENDIAN_BIG
) != (regi
& 1))
465 regcache_raw_collect (regcache
, regno
, to
);
469 to
= (gdb_byte
*) (*fpregsetp
+ regno
470 - gdbarch_fp0_regnum (current_gdbarch
));
471 regcache_raw_collect (regcache
, regno
, to
);
474 else if (regno
== mips_regnum (current_gdbarch
)->fp_control_status
)
476 gdb_byte buf
[MAX_REGISTER_SIZE
];
479 regcache_raw_collect (regcache
, regno
, buf
);
480 val
= extract_signed_integer (buf
,
481 register_size (current_gdbarch
, regno
));
482 to
= (gdb_byte
*) (*fpregsetp
+ 32);
483 store_signed_integer (to
, 4, val
);
485 else if (regno
== mips_regnum (current_gdbarch
)->fp_implementation_revision
)
487 gdb_byte buf
[MAX_REGISTER_SIZE
];
490 regcache_raw_collect (regcache
, regno
, buf
);
491 val
= extract_signed_integer (buf
,
492 register_size (current_gdbarch
, regno
));
493 to
= (gdb_byte
*) (*fpregsetp
+ 32) + 4;
494 store_signed_integer (to
, 4, val
);
496 else if (regno
== -1)
500 for (regi
= 0; regi
< 32; regi
++)
501 mips64_fill_fpregset (regcache
, fpregsetp
,
502 gdbarch_fp0_regnum (current_gdbarch
) + regi
);
503 mips64_fill_fpregset (regcache
, fpregsetp
,
504 mips_regnum (current_gdbarch
)->fp_control_status
);
505 mips64_fill_fpregset (regcache
, fpregsetp
,
506 (mips_regnum (current_gdbarch
)
507 ->fp_implementation_revision
));
512 /* Use a local version of this function to get the correct types for
513 regsets, until multi-arch core support is ready. */
516 fetch_core_registers (struct regcache
*regcache
,
517 char *core_reg_sect
, unsigned core_reg_size
,
518 int which
, CORE_ADDR reg_addr
)
520 mips_elf_gregset_t gregset
;
521 mips_elf_fpregset_t fpregset
;
522 mips64_elf_gregset_t gregset64
;
523 mips64_elf_fpregset_t fpregset64
;
527 if (core_reg_size
== sizeof (gregset
))
529 memcpy ((char *) &gregset
, core_reg_sect
, sizeof (gregset
));
530 mips_supply_gregset (regcache
,
531 (const mips_elf_gregset_t
*) &gregset
);
533 else if (core_reg_size
== sizeof (gregset64
))
535 memcpy ((char *) &gregset64
, core_reg_sect
, sizeof (gregset64
));
536 mips64_supply_gregset (regcache
,
537 (const mips64_elf_gregset_t
*) &gregset64
);
541 warning (_("wrong size gregset struct in core file"));
546 if (core_reg_size
== sizeof (fpregset
))
548 memcpy ((char *) &fpregset
, core_reg_sect
, sizeof (fpregset
));
549 mips_supply_fpregset (regcache
,
550 (const mips_elf_fpregset_t
*) &fpregset
);
552 else if (core_reg_size
== sizeof (fpregset64
))
554 memcpy ((char *) &fpregset64
, core_reg_sect
,
555 sizeof (fpregset64
));
556 mips64_supply_fpregset (regcache
,
557 (const mips64_elf_fpregset_t
*) &fpregset64
);
561 warning (_("wrong size fpregset struct in core file"));
566 /* Register that we are able to handle ELF file formats using standard
567 procfs "regset" structures. */
569 static struct core_fns regset_core_fns
=
571 bfd_target_elf_flavour
, /* core_flavour */
572 default_check_format
, /* check_format */
573 default_core_sniffer
, /* core_sniffer */
574 fetch_core_registers
, /* core_read_registers */
579 /* Check the code at PC for a dynamic linker lazy resolution stub.
580 Because they aren't in the .plt section, we pattern-match on the
581 code generated by GNU ld. They look like this:
588 (with the appropriate doubleword instructions for N64). Also
589 return the dynamic symbol index used in the last instruction. */
592 mips_linux_in_dynsym_stub (CORE_ADDR pc
, char *name
)
594 unsigned char buf
[28], *p
;
595 ULONGEST insn
, insn1
;
596 int n64
= (mips_abi (current_gdbarch
) == MIPS_ABI_N64
);
598 read_memory (pc
- 12, buf
, 28);
602 /* ld t9,0x8010(gp) */
607 /* lw t9,0x8010(gp) */
614 insn
= extract_unsigned_integer (p
, 4);
622 insn
= extract_unsigned_integer (p
+ 4, 4);
626 if (insn
!= 0x03e0782d)
632 if (insn
!= 0x03e07821)
636 insn
= extract_unsigned_integer (p
+ 8, 4);
638 if (insn
!= 0x0320f809)
641 insn
= extract_unsigned_integer (p
+ 12, 4);
644 /* daddiu t8,zero,0 */
645 if ((insn
& 0xffff0000) != 0x64180000)
650 /* addiu t8,zero,0 */
651 if ((insn
& 0xffff0000) != 0x24180000)
655 return (insn
& 0xffff);
658 /* Return non-zero iff PC belongs to the dynamic linker resolution
659 code or to a stub. */
662 mips_linux_in_dynsym_resolve_code (CORE_ADDR pc
)
664 /* Check whether PC is in the dynamic linker. This also checks
665 whether it is in the .plt section, which MIPS does not use. */
666 if (svr4_in_dynsym_resolve_code (pc
))
669 /* Pattern match for the stub. It would be nice if there were a
670 more efficient way to avoid this check. */
671 if (mips_linux_in_dynsym_stub (pc
, NULL
))
677 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c,
678 and glibc_skip_solib_resolver in glibc-tdep.c. The normal glibc
679 implementation of this triggers at "fixup" from the same objfile as
680 "_dl_runtime_resolve"; MIPS GNU/Linux can trigger at
681 "__dl_runtime_resolve" directly. An unresolved PLT entry will
682 point to _dl_runtime_resolve, which will first call
683 __dl_runtime_resolve, and then pass control to the resolved
687 mips_linux_skip_resolver (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
689 struct minimal_symbol
*resolver
;
691 resolver
= lookup_minimal_symbol ("__dl_runtime_resolve", NULL
, NULL
);
693 if (resolver
&& SYMBOL_VALUE_ADDRESS (resolver
) == pc
)
694 return frame_pc_unwind (get_current_frame ());
699 /* Signal trampoline support. There are four supported layouts for a
700 signal frame: o32 sigframe, o32 rt_sigframe, n32 rt_sigframe, and
701 n64 rt_sigframe. We handle them all independently; not the most
702 efficient way, but simplest. First, declare all the unwinders. */
704 static void mips_linux_o32_sigframe_init (const struct tramp_frame
*self
,
705 struct frame_info
*next_frame
,
706 struct trad_frame_cache
*this_cache
,
709 static void mips_linux_n32n64_sigframe_init (const struct tramp_frame
*self
,
710 struct frame_info
*next_frame
,
711 struct trad_frame_cache
*this_cache
,
714 #define MIPS_NR_LINUX 4000
715 #define MIPS_NR_N64_LINUX 5000
716 #define MIPS_NR_N32_LINUX 6000
718 #define MIPS_NR_sigreturn MIPS_NR_LINUX + 119
719 #define MIPS_NR_rt_sigreturn MIPS_NR_LINUX + 193
720 #define MIPS_NR_N64_rt_sigreturn MIPS_NR_N64_LINUX + 211
721 #define MIPS_NR_N32_rt_sigreturn MIPS_NR_N32_LINUX + 211
723 #define MIPS_INST_LI_V0_SIGRETURN 0x24020000 + MIPS_NR_sigreturn
724 #define MIPS_INST_LI_V0_RT_SIGRETURN 0x24020000 + MIPS_NR_rt_sigreturn
725 #define MIPS_INST_LI_V0_N64_RT_SIGRETURN 0x24020000 + MIPS_NR_N64_rt_sigreturn
726 #define MIPS_INST_LI_V0_N32_RT_SIGRETURN 0x24020000 + MIPS_NR_N32_rt_sigreturn
727 #define MIPS_INST_SYSCALL 0x0000000c
729 static const struct tramp_frame mips_linux_o32_sigframe
= {
733 { MIPS_INST_LI_V0_SIGRETURN
, -1 },
734 { MIPS_INST_SYSCALL
, -1 },
735 { TRAMP_SENTINEL_INSN
, -1 }
737 mips_linux_o32_sigframe_init
740 static const struct tramp_frame mips_linux_o32_rt_sigframe
= {
744 { MIPS_INST_LI_V0_RT_SIGRETURN
, -1 },
745 { MIPS_INST_SYSCALL
, -1 },
746 { TRAMP_SENTINEL_INSN
, -1 } },
747 mips_linux_o32_sigframe_init
750 static const struct tramp_frame mips_linux_n32_rt_sigframe
= {
754 { MIPS_INST_LI_V0_N32_RT_SIGRETURN
, -1 },
755 { MIPS_INST_SYSCALL
, -1 },
756 { TRAMP_SENTINEL_INSN
, -1 }
758 mips_linux_n32n64_sigframe_init
761 static const struct tramp_frame mips_linux_n64_rt_sigframe
= {
765 { MIPS_INST_LI_V0_N64_RT_SIGRETURN
, -1 },
766 { MIPS_INST_SYSCALL
, -1 },
767 { TRAMP_SENTINEL_INSN
, -1 }
769 mips_linux_n32n64_sigframe_init
773 /* The unwinder for o32 signal frames. The legacy structures look
777 u32 sf_ass[4]; [argument save space for o32]
778 u32 sf_code[2]; [signal trampoline]
779 struct sigcontext sf_sc;
784 unsigned int sc_regmask; [Unused]
785 unsigned int sc_status;
786 unsigned long long sc_pc;
787 unsigned long long sc_regs[32];
788 unsigned long long sc_fpregs[32];
789 unsigned int sc_ownedfp;
790 unsigned int sc_fpc_csr;
791 unsigned int sc_fpc_eir; [Unused]
792 unsigned int sc_used_math;
793 unsigned int sc_ssflags; [Unused]
794 [Alignment hole of four bytes]
795 unsigned long long sc_mdhi;
796 unsigned long long sc_mdlo;
798 unsigned int sc_cause; [Unused]
799 unsigned int sc_badvaddr; [Unused]
801 unsigned long sc_sigset[4]; [kernel's sigset_t]
804 The RT signal frames look like this:
807 u32 rs_ass[4]; [argument save space for o32]
808 u32 rs_code[2] [signal trampoline]
809 struct siginfo rs_info;
810 struct ucontext rs_uc;
814 unsigned long uc_flags;
815 struct ucontext *uc_link;
817 [Alignment hole of four bytes]
818 struct sigcontext uc_mcontext;
823 #define SIGFRAME_CODE_OFFSET (4 * 4)
824 #define SIGFRAME_SIGCONTEXT_OFFSET (6 * 4)
826 #define RTSIGFRAME_SIGINFO_SIZE 128
827 #define STACK_T_SIZE (3 * 4)
828 #define UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + STACK_T_SIZE + 4)
829 #define RTSIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
830 + RTSIGFRAME_SIGINFO_SIZE \
831 + UCONTEXT_SIGCONTEXT_OFFSET)
833 #define SIGCONTEXT_PC (1 * 8)
834 #define SIGCONTEXT_REGS (2 * 8)
835 #define SIGCONTEXT_FPREGS (34 * 8)
836 #define SIGCONTEXT_FPCSR (66 * 8 + 4)
837 #define SIGCONTEXT_HI (69 * 8)
838 #define SIGCONTEXT_LO (70 * 8)
839 #define SIGCONTEXT_CAUSE (71 * 8 + 0)
840 #define SIGCONTEXT_BADVADDR (71 * 8 + 4)
842 #define SIGCONTEXT_REG_SIZE 8
845 mips_linux_o32_sigframe_init (const struct tramp_frame
*self
,
846 struct frame_info
*next_frame
,
847 struct trad_frame_cache
*this_cache
,
850 int ireg
, reg_position
;
851 CORE_ADDR sigcontext_base
= func
- SIGFRAME_CODE_OFFSET
;
852 const struct mips_regnum
*regs
= mips_regnum (current_gdbarch
);
855 if (self
== &mips_linux_o32_sigframe
)
856 sigcontext_base
+= SIGFRAME_SIGCONTEXT_OFFSET
;
858 sigcontext_base
+= RTSIGFRAME_SIGCONTEXT_OFFSET
;
860 /* I'm not proud of this hack. Eventually we will have the
861 infrastructure to indicate the size of saved registers on a
862 per-frame basis, but right now we don't; the kernel saves eight
863 bytes but we only want four. Use regs_base to access any
865 if (gdbarch_byte_order (current_gdbarch
) == BFD_ENDIAN_BIG
)
866 regs_base
= sigcontext_base
+ 4;
868 regs_base
= sigcontext_base
;
870 if (mips_linux_restart_reg_p (current_gdbarch
))
871 trad_frame_set_reg_addr (this_cache
,
873 + gdbarch_num_regs (current_gdbarch
)),
874 regs_base
+ SIGCONTEXT_REGS
);
876 for (ireg
= 1; ireg
< 32; ireg
++)
877 trad_frame_set_reg_addr (this_cache
,
878 ireg
+ MIPS_ZERO_REGNUM
879 + gdbarch_num_regs (current_gdbarch
),
880 regs_base
+ SIGCONTEXT_REGS
881 + ireg
* SIGCONTEXT_REG_SIZE
);
883 /* The way that floating point registers are saved, unfortunately,
884 depends on the architecture the kernel is built for. For the r3000 and
885 tx39, four bytes of each register are at the beginning of each of the
886 32 eight byte slots. For everything else, the registers are saved
887 using double precision; only the even-numbered slots are initialized,
888 and the high bits are the odd-numbered register. Assume the latter
889 layout, since we can't tell, and it's much more common. Which bits are
890 the "high" bits depends on endianness. */
891 for (ireg
= 0; ireg
< 32; ireg
++)
892 if ((gdbarch_byte_order (current_gdbarch
) == BFD_ENDIAN_BIG
) != (ireg
& 1))
893 trad_frame_set_reg_addr (this_cache
,
895 gdbarch_num_regs (current_gdbarch
),
896 sigcontext_base
+ SIGCONTEXT_FPREGS
+ 4
897 + (ireg
& ~1) * SIGCONTEXT_REG_SIZE
);
899 trad_frame_set_reg_addr (this_cache
,
901 + gdbarch_num_regs (current_gdbarch
),
902 sigcontext_base
+ SIGCONTEXT_FPREGS
903 + (ireg
& ~1) * SIGCONTEXT_REG_SIZE
);
905 trad_frame_set_reg_addr (this_cache
,
906 regs
->pc
+ gdbarch_num_regs (current_gdbarch
),
907 regs_base
+ SIGCONTEXT_PC
);
909 trad_frame_set_reg_addr (this_cache
,
910 regs
->fp_control_status
911 + gdbarch_num_regs (current_gdbarch
),
912 sigcontext_base
+ SIGCONTEXT_FPCSR
);
913 trad_frame_set_reg_addr (this_cache
,
914 regs
->hi
+ gdbarch_num_regs (current_gdbarch
),
915 regs_base
+ SIGCONTEXT_HI
);
916 trad_frame_set_reg_addr (this_cache
,
917 regs
->lo
+ gdbarch_num_regs (current_gdbarch
),
918 regs_base
+ SIGCONTEXT_LO
);
919 trad_frame_set_reg_addr (this_cache
,
920 regs
->cause
+ gdbarch_num_regs (current_gdbarch
),
921 sigcontext_base
+ SIGCONTEXT_CAUSE
);
922 trad_frame_set_reg_addr (this_cache
,
923 regs
->badvaddr
+ gdbarch_num_regs (current_gdbarch
),
924 sigcontext_base
+ SIGCONTEXT_BADVADDR
);
926 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
927 trad_frame_set_id (this_cache
,
928 frame_id_build (func
- SIGFRAME_CODE_OFFSET
,
933 /* For N32/N64 things look different. There is no non-rt signal frame.
935 struct rt_sigframe_n32 {
936 u32 rs_ass[4]; [ argument save space for o32 ]
937 u32 rs_code[2]; [ signal trampoline ]
938 struct siginfo rs_info;
939 struct ucontextn32 rs_uc;
946 struct sigcontext uc_mcontext;
947 sigset_t uc_sigmask; [ mask last for extensibility ]
950 struct rt_sigframe_n32 {
951 u32 rs_ass[4]; [ argument save space for o32 ]
952 u32 rs_code[2]; [ signal trampoline ]
953 struct siginfo rs_info;
954 struct ucontext rs_uc;
958 unsigned long uc_flags;
959 struct ucontext *uc_link;
961 struct sigcontext uc_mcontext;
962 sigset_t uc_sigmask; [ mask last for extensibility ]
965 And the sigcontext is different (this is for both n32 and n64):
968 unsigned long long sc_regs[32];
969 unsigned long long sc_fpregs[32];
970 unsigned long long sc_mdhi;
971 unsigned long long sc_mdlo;
972 unsigned long long sc_pc;
973 unsigned int sc_status;
974 unsigned int sc_fpc_csr;
975 unsigned int sc_fpc_eir;
976 unsigned int sc_used_math;
977 unsigned int sc_cause;
978 unsigned int sc_badvaddr;
982 #define N32_STACK_T_SIZE STACK_T_SIZE
983 #define N64_STACK_T_SIZE (2 * 8 + 4)
984 #define N32_UCONTEXT_SIGCONTEXT_OFFSET (2 * 4 + N32_STACK_T_SIZE + 4)
985 #define N64_UCONTEXT_SIGCONTEXT_OFFSET (2 * 8 + N64_STACK_T_SIZE + 4)
986 #define N32_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
987 + RTSIGFRAME_SIGINFO_SIZE \
988 + N32_UCONTEXT_SIGCONTEXT_OFFSET)
989 #define N64_SIGFRAME_SIGCONTEXT_OFFSET (SIGFRAME_SIGCONTEXT_OFFSET \
990 + RTSIGFRAME_SIGINFO_SIZE \
991 + N64_UCONTEXT_SIGCONTEXT_OFFSET)
993 #define N64_SIGCONTEXT_REGS (0 * 8)
994 #define N64_SIGCONTEXT_FPREGS (32 * 8)
995 #define N64_SIGCONTEXT_HI (64 * 8)
996 #define N64_SIGCONTEXT_LO (65 * 8)
997 #define N64_SIGCONTEXT_PC (66 * 8)
998 #define N64_SIGCONTEXT_FPCSR (67 * 8 + 1 * 4)
999 #define N64_SIGCONTEXT_FIR (67 * 8 + 2 * 4)
1000 #define N64_SIGCONTEXT_CAUSE (67 * 8 + 4 * 4)
1001 #define N64_SIGCONTEXT_BADVADDR (67 * 8 + 5 * 4)
1003 #define N64_SIGCONTEXT_REG_SIZE 8
1006 mips_linux_n32n64_sigframe_init (const struct tramp_frame
*self
,
1007 struct frame_info
*next_frame
,
1008 struct trad_frame_cache
*this_cache
,
1011 int ireg
, reg_position
;
1012 CORE_ADDR sigcontext_base
= func
- SIGFRAME_CODE_OFFSET
;
1013 const struct mips_regnum
*regs
= mips_regnum (current_gdbarch
);
1015 if (self
== &mips_linux_n32_rt_sigframe
)
1016 sigcontext_base
+= N32_SIGFRAME_SIGCONTEXT_OFFSET
;
1018 sigcontext_base
+= N64_SIGFRAME_SIGCONTEXT_OFFSET
;
1020 if (mips_linux_restart_reg_p (current_gdbarch
))
1021 trad_frame_set_reg_addr (this_cache
,
1022 (MIPS_RESTART_REGNUM
1023 + gdbarch_num_regs (current_gdbarch
)),
1024 sigcontext_base
+ N64_SIGCONTEXT_REGS
);
1026 for (ireg
= 1; ireg
< 32; ireg
++)
1027 trad_frame_set_reg_addr (this_cache
,
1028 ireg
+ MIPS_ZERO_REGNUM
1029 + gdbarch_num_regs (current_gdbarch
),
1030 sigcontext_base
+ N64_SIGCONTEXT_REGS
1031 + ireg
* N64_SIGCONTEXT_REG_SIZE
);
1033 for (ireg
= 0; ireg
< 32; ireg
++)
1034 trad_frame_set_reg_addr (this_cache
,
1036 + gdbarch_num_regs (current_gdbarch
),
1037 sigcontext_base
+ N64_SIGCONTEXT_FPREGS
1038 + ireg
* N64_SIGCONTEXT_REG_SIZE
);
1040 trad_frame_set_reg_addr (this_cache
,
1041 regs
->pc
+ gdbarch_num_regs (current_gdbarch
),
1042 sigcontext_base
+ N64_SIGCONTEXT_PC
);
1044 trad_frame_set_reg_addr (this_cache
,
1045 regs
->fp_control_status
1046 + gdbarch_num_regs (current_gdbarch
),
1047 sigcontext_base
+ N64_SIGCONTEXT_FPCSR
);
1048 trad_frame_set_reg_addr (this_cache
,
1049 regs
->hi
+ gdbarch_num_regs (current_gdbarch
),
1050 sigcontext_base
+ N64_SIGCONTEXT_HI
);
1051 trad_frame_set_reg_addr (this_cache
,
1052 regs
->lo
+ gdbarch_num_regs (current_gdbarch
),
1053 sigcontext_base
+ N64_SIGCONTEXT_LO
);
1054 trad_frame_set_reg_addr (this_cache
,
1055 regs
->cause
+ gdbarch_num_regs (current_gdbarch
),
1056 sigcontext_base
+ N64_SIGCONTEXT_CAUSE
);
1057 trad_frame_set_reg_addr (this_cache
,
1058 regs
->badvaddr
+ gdbarch_num_regs (current_gdbarch
),
1059 sigcontext_base
+ N64_SIGCONTEXT_BADVADDR
);
1061 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
1062 trad_frame_set_id (this_cache
,
1063 frame_id_build (func
- SIGFRAME_CODE_OFFSET
,
1068 mips_linux_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1070 regcache_cooked_write_unsigned (regcache
,
1071 gdbarch_pc_regnum (current_gdbarch
), pc
);
1073 /* Clear the syscall restart flag. */
1074 if (mips_linux_restart_reg_p (current_gdbarch
))
1075 regcache_cooked_write_unsigned (regcache
, MIPS_RESTART_REGNUM
, 0);
1078 /* Return 1 if MIPS_RESTART_REGNUM is usable. */
1081 mips_linux_restart_reg_p (struct gdbarch
*gdbarch
)
1083 /* If we do not have a target description with registers, then
1084 MIPS_RESTART_REGNUM will not be included in the register set. */
1085 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch
)))
1088 /* If we do, then MIPS_RESTART_REGNUM is safe to check; it will
1089 either be GPR-sized or missing. */
1090 return register_size (gdbarch
, MIPS_RESTART_REGNUM
) > 0;
1093 /* Initialize one of the GNU/Linux OS ABIs. */
1096 mips_linux_init_abi (struct gdbarch_info info
,
1097 struct gdbarch
*gdbarch
)
1099 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1100 enum mips_abi abi
= mips_abi (gdbarch
);
1101 struct tdesc_arch_data
*tdesc_data
= (void *) info
.tdep_info
;
1106 set_gdbarch_get_longjmp_target (gdbarch
,
1107 mips_linux_get_longjmp_target
);
1108 set_solib_svr4_fetch_link_map_offsets
1109 (gdbarch
, svr4_ilp32_fetch_link_map_offsets
);
1110 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_o32_sigframe
);
1111 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_o32_rt_sigframe
);
1114 set_gdbarch_get_longjmp_target (gdbarch
,
1115 mips_linux_get_longjmp_target
);
1116 set_solib_svr4_fetch_link_map_offsets
1117 (gdbarch
, svr4_ilp32_fetch_link_map_offsets
);
1118 set_gdbarch_long_double_bit (gdbarch
, 128);
1119 /* These floatformats should probably be renamed. MIPS uses
1120 the same 128-bit IEEE floating point format that IA-64 uses,
1121 except that the quiet/signalling NaN bit is reversed (GDB
1122 does not distinguish between quiet and signalling NaNs). */
1123 set_gdbarch_long_double_format (gdbarch
, floatformats_ia64_quad
);
1124 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_n32_rt_sigframe
);
1127 set_gdbarch_get_longjmp_target (gdbarch
,
1128 mips64_linux_get_longjmp_target
);
1129 set_solib_svr4_fetch_link_map_offsets
1130 (gdbarch
, svr4_lp64_fetch_link_map_offsets
);
1131 set_gdbarch_long_double_bit (gdbarch
, 128);
1132 /* These floatformats should probably be renamed. MIPS uses
1133 the same 128-bit IEEE floating point format that IA-64 uses,
1134 except that the quiet/signalling NaN bit is reversed (GDB
1135 does not distinguish between quiet and signalling NaNs). */
1136 set_gdbarch_long_double_format (gdbarch
, floatformats_ia64_quad
);
1137 tramp_frame_prepend_unwinder (gdbarch
, &mips_linux_n64_rt_sigframe
);
1140 internal_error (__FILE__
, __LINE__
, _("can't handle ABI"));
1144 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1145 set_gdbarch_skip_solib_resolver (gdbarch
, mips_linux_skip_resolver
);
1147 set_gdbarch_software_single_step (gdbarch
, mips_software_single_step
);
1149 /* Enable TLS support. */
1150 set_gdbarch_fetch_tls_load_module_address (gdbarch
,
1151 svr4_fetch_objfile_link_map
);
1153 /* Initialize this lazily, to avoid an initialization order
1154 dependency on solib-svr4.c's _initialize routine. */
1155 if (mips_svr4_so_ops
.in_dynsym_resolve_code
== NULL
)
1157 mips_svr4_so_ops
= svr4_so_ops
;
1158 mips_svr4_so_ops
.in_dynsym_resolve_code
1159 = mips_linux_in_dynsym_resolve_code
;
1161 set_solib_ops (gdbarch
, &mips_svr4_so_ops
);
1163 set_gdbarch_write_pc (gdbarch
, mips_linux_write_pc
);
1167 const struct tdesc_feature
*feature
;
1169 /* If we have target-described registers, then we can safely
1170 reserve a number for MIPS_RESTART_REGNUM (whether it is
1171 described or not). */
1172 gdb_assert (gdbarch_num_regs (gdbarch
) <= MIPS_RESTART_REGNUM
);
1173 set_gdbarch_num_regs (gdbarch
, MIPS_RESTART_REGNUM
+ 1);
1175 /* If it's present, then assign it to the reserved number. */
1176 feature
= tdesc_find_feature (info
.target_desc
,
1177 "org.gnu.gdb.mips.linux");
1178 if (feature
!= NULL
)
1179 tdesc_numbered_register (feature
, tdesc_data
, MIPS_RESTART_REGNUM
,
1185 _initialize_mips_linux_tdep (void)
1187 const struct bfd_arch_info
*arch_info
;
1189 for (arch_info
= bfd_lookup_arch (bfd_arch_mips
, 0);
1191 arch_info
= arch_info
->next
)
1193 gdbarch_register_osabi (bfd_arch_mips
, arch_info
->mach
,
1195 mips_linux_init_abi
);
1198 deprecated_add_core_fns (®set_core_fns
);