[gdb] Don't use gdb_stdlog for inferior-events
[binutils-gdb.git] / gdb / msp430-tdep.c
1 /* Target-dependent code for the Texas Instruments MSP430 for GDB, the
2 GNU debugger.
3
4 Copyright (C) 2012-2021 Free Software Foundation, Inc.
5
6 Contributed by Red Hat, Inc.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
22
23 #include "defs.h"
24 #include "arch-utils.h"
25 #include "prologue-value.h"
26 #include "target.h"
27 #include "regcache.h"
28 #include "dis-asm.h"
29 #include "gdbtypes.h"
30 #include "frame.h"
31 #include "frame-unwind.h"
32 #include "frame-base.h"
33 #include "value.h"
34 #include "gdbcore.h"
35 #include "dwarf2/frame.h"
36 #include "reggroups.h"
37
38 #include "elf/msp430.h"
39 #include "opcode/msp430-decode.h"
40 #include "elf-bfd.h"
41
42 /* Register Numbers. */
43
44 enum
45 {
46 MSP430_PC_RAW_REGNUM,
47 MSP430_SP_RAW_REGNUM,
48 MSP430_SR_RAW_REGNUM,
49 MSP430_CG_RAW_REGNUM,
50 MSP430_R4_RAW_REGNUM,
51 MSP430_R5_RAW_REGNUM,
52 MSP430_R6_RAW_REGNUM,
53 MSP430_R7_RAW_REGNUM,
54 MSP430_R8_RAW_REGNUM,
55 MSP430_R9_RAW_REGNUM,
56 MSP430_R10_RAW_REGNUM,
57 MSP430_R11_RAW_REGNUM,
58 MSP430_R12_RAW_REGNUM,
59 MSP430_R13_RAW_REGNUM,
60 MSP430_R14_RAW_REGNUM,
61 MSP430_R15_RAW_REGNUM,
62
63 MSP430_NUM_REGS,
64
65 MSP430_PC_REGNUM = MSP430_NUM_REGS,
66 MSP430_SP_REGNUM,
67 MSP430_SR_REGNUM,
68 MSP430_CG_REGNUM,
69 MSP430_R4_REGNUM,
70 MSP430_R5_REGNUM,
71 MSP430_R6_REGNUM,
72 MSP430_R7_REGNUM,
73 MSP430_R8_REGNUM,
74 MSP430_R9_REGNUM,
75 MSP430_R10_REGNUM,
76 MSP430_R11_REGNUM,
77 MSP430_R12_REGNUM,
78 MSP430_R13_REGNUM,
79 MSP430_R14_REGNUM,
80 MSP430_R15_REGNUM,
81
82 MSP430_NUM_TOTAL_REGS,
83 MSP430_NUM_PSEUDO_REGS = MSP430_NUM_TOTAL_REGS - MSP430_NUM_REGS
84 };
85
86 enum
87 {
88 /* TI MSP430 Architecture. */
89 MSP_ISA_MSP430,
90
91 /* TI MSP430X Architecture. */
92 MSP_ISA_MSP430X
93 };
94
95 enum
96 {
97 /* The small code model limits code addresses to 16 bits. */
98 MSP_SMALL_CODE_MODEL,
99
100 /* The large code model uses 20 bit addresses for function
101 pointers. These are stored in memory using four bytes (32 bits). */
102 MSP_LARGE_CODE_MODEL
103 };
104
105 /* Architecture specific data. */
106
107 struct msp430_gdbarch_tdep : gdbarch_tdep
108 {
109 /* The ELF header flags specify the multilib used. */
110 int elf_flags = 0;
111
112 /* One of MSP_ISA_MSP430 or MSP_ISA_MSP430X. */
113 int isa = 0;
114
115 /* One of MSP_SMALL_CODE_MODEL or MSP_LARGE_CODE_MODEL. If, at
116 some point, we support different data models too, we'll probably
117 structure things so that we can combine values using logical
118 "or". */
119 int code_model = 0;
120 };
121
122 /* This structure holds the results of a prologue analysis. */
123
124 struct msp430_prologue
125 {
126 /* The offset from the frame base to the stack pointer --- always
127 zero or negative.
128
129 Calling this a "size" is a bit misleading, but given that the
130 stack grows downwards, using offsets for everything keeps one
131 from going completely sign-crazy: you never change anything's
132 sign for an ADD instruction; always change the second operand's
133 sign for a SUB instruction; and everything takes care of
134 itself. */
135 int frame_size;
136
137 /* Non-zero if this function has initialized the frame pointer from
138 the stack pointer, zero otherwise. */
139 int has_frame_ptr;
140
141 /* If has_frame_ptr is non-zero, this is the offset from the frame
142 base to where the frame pointer points. This is always zero or
143 negative. */
144 int frame_ptr_offset;
145
146 /* The address of the first instruction at which the frame has been
147 set up and the arguments are where the debug info says they are
148 --- as best as we can tell. */
149 CORE_ADDR prologue_end;
150
151 /* reg_offset[R] is the offset from the CFA at which register R is
152 saved, or 1 if register R has not been saved. (Real values are
153 always zero or negative.) */
154 int reg_offset[MSP430_NUM_TOTAL_REGS];
155 };
156
157 /* Implement the "register_type" gdbarch method. */
158
159 static struct type *
160 msp430_register_type (struct gdbarch *gdbarch, int reg_nr)
161 {
162 if (reg_nr < MSP430_NUM_REGS)
163 return builtin_type (gdbarch)->builtin_uint32;
164 else if (reg_nr == MSP430_PC_REGNUM)
165 return builtin_type (gdbarch)->builtin_func_ptr;
166 else
167 return builtin_type (gdbarch)->builtin_uint16;
168 }
169
170 /* Implement another version of the "register_type" gdbarch method
171 for msp430x. */
172
173 static struct type *
174 msp430x_register_type (struct gdbarch *gdbarch, int reg_nr)
175 {
176 if (reg_nr < MSP430_NUM_REGS)
177 return builtin_type (gdbarch)->builtin_uint32;
178 else if (reg_nr == MSP430_PC_REGNUM)
179 return builtin_type (gdbarch)->builtin_func_ptr;
180 else
181 return builtin_type (gdbarch)->builtin_uint32;
182 }
183
184 /* Implement the "register_name" gdbarch method. */
185
186 static const char *
187 msp430_register_name (struct gdbarch *gdbarch, int regnr)
188 {
189 static const char *const reg_names[] = {
190 /* Raw registers. */
191 "", "", "", "", "", "", "", "",
192 "", "", "", "", "", "", "", "",
193 /* Pseudo registers. */
194 "pc", "sp", "sr", "cg", "r4", "r5", "r6", "r7",
195 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
196 };
197
198 return reg_names[regnr];
199 }
200
201 /* Implement the "register_reggroup_p" gdbarch method. */
202
203 static int
204 msp430_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
205 struct reggroup *group)
206 {
207 if (group == all_reggroup)
208 return 1;
209
210 /* All other registers are saved and restored. */
211 if (group == save_reggroup || group == restore_reggroup)
212 return (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS);
213
214 return group == general_reggroup;
215 }
216
217 /* Implement the "pseudo_register_read" gdbarch method. */
218
219 static enum register_status
220 msp430_pseudo_register_read (struct gdbarch *gdbarch,
221 readable_regcache *regcache,
222 int regnum, gdb_byte *buffer)
223 {
224 if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS)
225 {
226 enum register_status status;
227 ULONGEST val;
228 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
229 int regsize = register_size (gdbarch, regnum);
230 int raw_regnum = regnum - MSP430_NUM_REGS;
231
232 status = regcache->raw_read (raw_regnum, &val);
233 if (status == REG_VALID)
234 store_unsigned_integer (buffer, regsize, byte_order, val);
235
236 return status;
237 }
238 else
239 gdb_assert_not_reached ("invalid pseudo register number");
240 }
241
242 /* Implement the "pseudo_register_write" gdbarch method. */
243
244 static void
245 msp430_pseudo_register_write (struct gdbarch *gdbarch,
246 struct regcache *regcache,
247 int regnum, const gdb_byte *buffer)
248 {
249 if (MSP430_NUM_REGS <= regnum && regnum < MSP430_NUM_TOTAL_REGS)
250
251 {
252 ULONGEST val;
253 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
254 int regsize = register_size (gdbarch, regnum);
255 int raw_regnum = regnum - MSP430_NUM_REGS;
256
257 val = extract_unsigned_integer (buffer, regsize, byte_order);
258 regcache_raw_write_unsigned (regcache, raw_regnum, val);
259
260 }
261 else
262 gdb_assert_not_reached ("invalid pseudo register number");
263 }
264
265 /* Implement the `register_sim_regno' gdbarch method. */
266
267 static int
268 msp430_register_sim_regno (struct gdbarch *gdbarch, int regnum)
269 {
270 gdb_assert (regnum < MSP430_NUM_REGS);
271
272 /* So long as regnum is in [0, RL78_NUM_REGS), it's valid. We
273 just want to override the default here which disallows register
274 numbers which have no names. */
275 return regnum;
276 }
277
278 constexpr gdb_byte msp430_break_insn[] = { 0x43, 0x43 };
279
280 typedef BP_MANIPULATION (msp430_break_insn) msp430_breakpoint;
281
282 /* Define a "handle" struct for fetching the next opcode. */
283
284 struct msp430_get_opcode_byte_handle
285 {
286 CORE_ADDR pc;
287 };
288
289 /* Fetch a byte on behalf of the opcode decoder. HANDLE contains
290 the memory address of the next byte to fetch. If successful,
291 the address in the handle is updated and the byte fetched is
292 returned as the value of the function. If not successful, -1
293 is returned. */
294
295 static int
296 msp430_get_opcode_byte (void *handle)
297 {
298 struct msp430_get_opcode_byte_handle *opcdata
299 = (struct msp430_get_opcode_byte_handle *) handle;
300 int status;
301 gdb_byte byte;
302
303 status = target_read_memory (opcdata->pc, &byte, 1);
304 if (status == 0)
305 {
306 opcdata->pc += 1;
307 return byte;
308 }
309 else
310 return -1;
311 }
312
313 /* Function for finding saved registers in a 'struct pv_area'; this
314 function is passed to pv_area::scan.
315
316 If VALUE is a saved register, ADDR says it was saved at a constant
317 offset from the frame base, and SIZE indicates that the whole
318 register was saved, record its offset. */
319
320 static void
321 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
322 {
323 struct msp430_prologue *result = (struct msp430_prologue *) result_untyped;
324
325 if (value.kind == pvk_register
326 && value.k == 0
327 && pv_is_register (addr, MSP430_SP_REGNUM)
328 && size == register_size (target_gdbarch (), value.reg))
329 result->reg_offset[value.reg] = addr.k;
330 }
331
332 /* Analyze a prologue starting at START_PC, going no further than
333 LIMIT_PC. Fill in RESULT as appropriate. */
334
335 static void
336 msp430_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc,
337 CORE_ADDR limit_pc, struct msp430_prologue *result)
338 {
339 CORE_ADDR pc, next_pc;
340 int rn;
341 pv_t reg[MSP430_NUM_TOTAL_REGS];
342 CORE_ADDR after_last_frame_setup_insn = start_pc;
343 msp430_gdbarch_tdep *tdep = (msp430_gdbarch_tdep *) gdbarch_tdep (gdbarch);
344 int code_model = tdep->code_model;
345 int sz;
346
347 memset (result, 0, sizeof (*result));
348
349 for (rn = 0; rn < MSP430_NUM_TOTAL_REGS; rn++)
350 {
351 reg[rn] = pv_register (rn, 0);
352 result->reg_offset[rn] = 1;
353 }
354
355 pv_area stack (MSP430_SP_REGNUM, gdbarch_addr_bit (gdbarch));
356
357 /* The call instruction has saved the return address on the stack. */
358 sz = code_model == MSP_LARGE_CODE_MODEL ? 4 : 2;
359 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], -sz);
360 stack.store (reg[MSP430_SP_REGNUM], sz, reg[MSP430_PC_REGNUM]);
361
362 pc = start_pc;
363 while (pc < limit_pc)
364 {
365 int bytes_read;
366 struct msp430_get_opcode_byte_handle opcode_handle;
367 MSP430_Opcode_Decoded opc;
368
369 opcode_handle.pc = pc;
370 bytes_read = msp430_decode_opcode (pc, &opc, msp430_get_opcode_byte,
371 &opcode_handle);
372 next_pc = pc + bytes_read;
373
374 if (opc.id == MSO_push && opc.op[0].type == MSP430_Operand_Register)
375 {
376 int rsrc = opc.op[0].reg;
377
378 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM], -2);
379 stack.store (reg[MSP430_SP_REGNUM], 2, reg[rsrc]);
380 after_last_frame_setup_insn = next_pc;
381 }
382 else if (opc.id == MSO_push /* PUSHM */
383 && opc.op[0].type == MSP430_Operand_None
384 && opc.op[1].type == MSP430_Operand_Register)
385 {
386 int rsrc = opc.op[1].reg;
387 int count = opc.repeats + 1;
388 int size = opc.size == 16 ? 2 : 4;
389
390 while (count > 0)
391 {
392 reg[MSP430_SP_REGNUM]
393 = pv_add_constant (reg[MSP430_SP_REGNUM], -size);
394 stack.store (reg[MSP430_SP_REGNUM], size, reg[rsrc]);
395 rsrc--;
396 count--;
397 }
398 after_last_frame_setup_insn = next_pc;
399 }
400 else if (opc.id == MSO_sub
401 && opc.op[0].type == MSP430_Operand_Register
402 && opc.op[0].reg == MSR_SP
403 && opc.op[1].type == MSP430_Operand_Immediate)
404 {
405 int addend = opc.op[1].addend;
406
407 reg[MSP430_SP_REGNUM] = pv_add_constant (reg[MSP430_SP_REGNUM],
408 -addend);
409 after_last_frame_setup_insn = next_pc;
410 }
411 else if (opc.id == MSO_mov
412 && opc.op[0].type == MSP430_Operand_Immediate
413 && 12 <= opc.op[0].reg && opc.op[0].reg <= 15)
414 after_last_frame_setup_insn = next_pc;
415 else
416 {
417 /* Terminate the prologue scan. */
418 break;
419 }
420
421 pc = next_pc;
422 }
423
424 /* Is the frame size (offset, really) a known constant? */
425 if (pv_is_register (reg[MSP430_SP_REGNUM], MSP430_SP_REGNUM))
426 result->frame_size = reg[MSP430_SP_REGNUM].k;
427
428 /* Record where all the registers were saved. */
429 stack.scan (check_for_saved, result);
430
431 result->prologue_end = after_last_frame_setup_insn;
432 }
433
434 /* Implement the "skip_prologue" gdbarch method. */
435
436 static CORE_ADDR
437 msp430_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
438 {
439 const char *name;
440 CORE_ADDR func_addr, func_end;
441 struct msp430_prologue p;
442
443 /* Try to find the extent of the function that contains PC. */
444 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
445 return pc;
446
447 msp430_analyze_prologue (gdbarch, pc, func_end, &p);
448 return p.prologue_end;
449 }
450
451 /* Given a frame described by THIS_FRAME, decode the prologue of its
452 associated function if there is not cache entry as specified by
453 THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and
454 return that struct as the value of this function. */
455
456 static struct msp430_prologue *
457 msp430_analyze_frame_prologue (struct frame_info *this_frame,
458 void **this_prologue_cache)
459 {
460 if (!*this_prologue_cache)
461 {
462 CORE_ADDR func_start, stop_addr;
463
464 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct msp430_prologue);
465
466 func_start = get_frame_func (this_frame);
467 stop_addr = get_frame_pc (this_frame);
468
469 /* If we couldn't find any function containing the PC, then
470 just initialize the prologue cache, but don't do anything. */
471 if (!func_start)
472 stop_addr = func_start;
473
474 msp430_analyze_prologue (get_frame_arch (this_frame), func_start,
475 stop_addr,
476 (struct msp430_prologue *) *this_prologue_cache);
477 }
478
479 return (struct msp430_prologue *) *this_prologue_cache;
480 }
481
482 /* Given a frame and a prologue cache, return this frame's base. */
483
484 static CORE_ADDR
485 msp430_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
486 {
487 struct msp430_prologue *p
488 = msp430_analyze_frame_prologue (this_frame, this_prologue_cache);
489 CORE_ADDR sp = get_frame_register_unsigned (this_frame, MSP430_SP_REGNUM);
490
491 return sp - p->frame_size;
492 }
493
494 /* Implement the "frame_this_id" method for unwinding frames. */
495
496 static void
497 msp430_this_id (struct frame_info *this_frame,
498 void **this_prologue_cache, struct frame_id *this_id)
499 {
500 *this_id = frame_id_build (msp430_frame_base (this_frame,
501 this_prologue_cache),
502 get_frame_func (this_frame));
503 }
504
505 /* Implement the "frame_prev_register" method for unwinding frames. */
506
507 static struct value *
508 msp430_prev_register (struct frame_info *this_frame,
509 void **this_prologue_cache, int regnum)
510 {
511 struct msp430_prologue *p
512 = msp430_analyze_frame_prologue (this_frame, this_prologue_cache);
513 CORE_ADDR frame_base = msp430_frame_base (this_frame, this_prologue_cache);
514
515 if (regnum == MSP430_SP_REGNUM)
516 return frame_unwind_got_constant (this_frame, regnum, frame_base);
517
518 /* If prologue analysis says we saved this register somewhere,
519 return a description of the stack slot holding it. */
520 else if (p->reg_offset[regnum] != 1)
521 {
522 struct value *rv = frame_unwind_got_memory (this_frame, regnum,
523 frame_base +
524 p->reg_offset[regnum]);
525
526 if (regnum == MSP430_PC_REGNUM)
527 {
528 ULONGEST pc = value_as_long (rv);
529
530 return frame_unwind_got_constant (this_frame, regnum, pc);
531 }
532 return rv;
533 }
534
535 /* Otherwise, presume we haven't changed the value of this
536 register, and get it from the next frame. */
537 else
538 return frame_unwind_got_register (this_frame, regnum, regnum);
539 }
540
541 static const struct frame_unwind msp430_unwind = {
542 "msp430 prologue",
543 NORMAL_FRAME,
544 default_frame_unwind_stop_reason,
545 msp430_this_id,
546 msp430_prev_register,
547 NULL,
548 default_frame_sniffer
549 };
550
551 /* Implement the "dwarf2_reg_to_regnum" gdbarch method. */
552
553 static int
554 msp430_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
555 {
556 if (reg >= 0 && reg < MSP430_NUM_REGS)
557 return reg + MSP430_NUM_REGS;
558 return -1;
559 }
560
561 /* Implement the "return_value" gdbarch method. */
562
563 static enum return_value_convention
564 msp430_return_value (struct gdbarch *gdbarch,
565 struct value *function,
566 struct type *valtype,
567 struct regcache *regcache,
568 gdb_byte *readbuf, const gdb_byte *writebuf)
569 {
570 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
571 LONGEST valtype_len = TYPE_LENGTH (valtype);
572 msp430_gdbarch_tdep *tdep = (msp430_gdbarch_tdep *) gdbarch_tdep (gdbarch);
573 int code_model = tdep->code_model;
574
575 if (TYPE_LENGTH (valtype) > 8
576 || valtype->code () == TYPE_CODE_STRUCT
577 || valtype->code () == TYPE_CODE_UNION)
578 return RETURN_VALUE_STRUCT_CONVENTION;
579
580 if (readbuf)
581 {
582 ULONGEST u;
583 int argreg = MSP430_R12_REGNUM;
584 int offset = 0;
585
586 while (valtype_len > 0)
587 {
588 int size = 2;
589
590 if (code_model == MSP_LARGE_CODE_MODEL
591 && valtype->code () == TYPE_CODE_PTR)
592 {
593 size = 4;
594 }
595
596 regcache_cooked_read_unsigned (regcache, argreg, &u);
597 store_unsigned_integer (readbuf + offset, size, byte_order, u);
598 valtype_len -= size;
599 offset += size;
600 argreg++;
601 }
602 }
603
604 if (writebuf)
605 {
606 ULONGEST u;
607 int argreg = MSP430_R12_REGNUM;
608 int offset = 0;
609
610 while (valtype_len > 0)
611 {
612 int size = 2;
613
614 if (code_model == MSP_LARGE_CODE_MODEL
615 && valtype->code () == TYPE_CODE_PTR)
616 {
617 size = 4;
618 }
619
620 u = extract_unsigned_integer (writebuf + offset, size, byte_order);
621 regcache_cooked_write_unsigned (regcache, argreg, u);
622 valtype_len -= size;
623 offset += size;
624 argreg++;
625 }
626 }
627
628 return RETURN_VALUE_REGISTER_CONVENTION;
629 }
630
631
632 /* Implement the "frame_align" gdbarch method. */
633
634 static CORE_ADDR
635 msp430_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
636 {
637 return align_down (sp, 2);
638 }
639
640 /* Implement the "push_dummy_call" gdbarch method. */
641
642 static CORE_ADDR
643 msp430_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
644 struct regcache *regcache, CORE_ADDR bp_addr,
645 int nargs, struct value **args, CORE_ADDR sp,
646 function_call_return_method return_method,
647 CORE_ADDR struct_addr)
648 {
649 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
650 int write_pass;
651 int sp_off = 0;
652 CORE_ADDR cfa;
653 msp430_gdbarch_tdep *tdep = (msp430_gdbarch_tdep *) gdbarch_tdep (gdbarch);
654 int code_model = tdep->code_model;
655
656 struct type *func_type = value_type (function);
657
658 /* Dereference function pointer types. */
659 while (func_type->code () == TYPE_CODE_PTR)
660 func_type = TYPE_TARGET_TYPE (func_type);
661
662 /* The end result had better be a function or a method. */
663 gdb_assert (func_type->code () == TYPE_CODE_FUNC
664 || func_type->code () == TYPE_CODE_METHOD);
665
666 /* We make two passes; the first does the stack allocation,
667 the second actually stores the arguments. */
668 for (write_pass = 0; write_pass <= 1; write_pass++)
669 {
670 int i;
671 int arg_reg = MSP430_R12_REGNUM;
672 int args_on_stack = 0;
673
674 if (write_pass)
675 sp = align_down (sp - sp_off, 4);
676 sp_off = 0;
677
678 if (return_method == return_method_struct)
679 {
680 if (write_pass)
681 regcache_cooked_write_unsigned (regcache, arg_reg, struct_addr);
682 arg_reg++;
683 }
684
685 /* Push the arguments. */
686 for (i = 0; i < nargs; i++)
687 {
688 struct value *arg = args[i];
689 const gdb_byte *arg_bits = value_contents_all (arg).data ();
690 struct type *arg_type = check_typedef (value_type (arg));
691 ULONGEST arg_size = TYPE_LENGTH (arg_type);
692 int offset;
693 int current_arg_on_stack;
694 gdb_byte struct_addr_buf[4];
695
696 current_arg_on_stack = 0;
697
698 if (arg_type->code () == TYPE_CODE_STRUCT
699 || arg_type->code () == TYPE_CODE_UNION)
700 {
701 /* Aggregates of any size are passed by reference. */
702 store_unsigned_integer (struct_addr_buf, 4, byte_order,
703 value_address (arg));
704 arg_bits = struct_addr_buf;
705 arg_size = (code_model == MSP_LARGE_CODE_MODEL) ? 4 : 2;
706 }
707 else
708 {
709 /* Scalars bigger than 8 bytes such as complex doubles are passed
710 on the stack. */
711 if (arg_size > 8)
712 current_arg_on_stack = 1;
713 }
714
715
716 for (offset = 0; offset < arg_size; offset += 2)
717 {
718 /* The condition below prevents 8 byte scalars from being split
719 between registers and memory (stack). It also prevents other
720 splits once the stack has been written to. */
721 if (!current_arg_on_stack
722 && (arg_reg
723 + ((arg_size == 8 || args_on_stack)
724 ? ((arg_size - offset) / 2 - 1)
725 : 0) <= MSP430_R15_REGNUM))
726 {
727 int size = 2;
728
729 if (code_model == MSP_LARGE_CODE_MODEL
730 && (arg_type->code () == TYPE_CODE_PTR
731 || TYPE_IS_REFERENCE (arg_type)
732 || arg_type->code () == TYPE_CODE_STRUCT
733 || arg_type->code () == TYPE_CODE_UNION))
734 {
735 /* When using the large memory model, pointer,
736 reference, struct, and union arguments are
737 passed using the entire register. (As noted
738 earlier, aggregates are always passed by
739 reference.) */
740 if (offset != 0)
741 continue;
742 size = 4;
743 }
744
745 if (write_pass)
746 regcache_cooked_write_unsigned (regcache, arg_reg,
747 extract_unsigned_integer
748 (arg_bits + offset, size,
749 byte_order));
750
751 arg_reg++;
752 }
753 else
754 {
755 if (write_pass)
756 write_memory (sp + sp_off, arg_bits + offset, 2);
757
758 sp_off += 2;
759 args_on_stack = 1;
760 current_arg_on_stack = 1;
761 }
762 }
763 }
764 }
765
766 /* Keep track of the stack address prior to pushing the return address.
767 This is the value that we'll return. */
768 cfa = sp;
769
770 /* Push the return address. */
771 {
772 int sz = tdep->code_model == MSP_SMALL_CODE_MODEL ? 2 : 4;
773 sp = sp - sz;
774 write_memory_unsigned_integer (sp, sz, byte_order, bp_addr);
775 }
776
777 /* Update the stack pointer. */
778 regcache_cooked_write_unsigned (regcache, MSP430_SP_REGNUM, sp);
779
780 return cfa;
781 }
782
783 /* In order to keep code size small, the compiler may create epilogue
784 code through which more than one function epilogue is routed. I.e.
785 the epilogue and return may just be a branch to some common piece of
786 code which is responsible for tearing down the frame and performing
787 the return. These epilog (label) names will have the common prefix
788 defined here. */
789
790 static const char msp430_epilog_name_prefix[] = "__mspabi_func_epilog_";
791
792 /* Implement the "in_return_stub" gdbarch method. */
793
794 static int
795 msp430_in_return_stub (struct gdbarch *gdbarch, CORE_ADDR pc,
796 const char *name)
797 {
798 return (name != NULL
799 && startswith (name, msp430_epilog_name_prefix));
800 }
801
802 /* Implement the "skip_trampoline_code" gdbarch method. */
803 static CORE_ADDR
804 msp430_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
805 {
806 struct bound_minimal_symbol bms;
807 const char *stub_name;
808 struct gdbarch *gdbarch = get_frame_arch (frame);
809
810 bms = lookup_minimal_symbol_by_pc (pc);
811 if (!bms.minsym)
812 return pc;
813
814 stub_name = bms.minsym->linkage_name ();
815
816 msp430_gdbarch_tdep *tdep = (msp430_gdbarch_tdep *) gdbarch_tdep (gdbarch);
817 if (tdep->code_model == MSP_SMALL_CODE_MODEL
818 && msp430_in_return_stub (gdbarch, pc, stub_name))
819 {
820 CORE_ADDR sp = get_frame_register_unsigned (frame, MSP430_SP_REGNUM);
821
822 return read_memory_integer
823 (sp + 2 * (stub_name[strlen (msp430_epilog_name_prefix)] - '0'),
824 2, gdbarch_byte_order (gdbarch));
825 }
826
827 return pc;
828 }
829
830 /* Allocate and initialize a gdbarch object. */
831
832 static struct gdbarch *
833 msp430_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
834 {
835 struct gdbarch *gdbarch;
836 int elf_flags, isa, code_model;
837
838 /* Extract the elf_flags if available. */
839 if (info.abfd != NULL
840 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
841 elf_flags = elf_elfheader (info.abfd)->e_flags;
842 else
843 elf_flags = 0;
844
845 if (info.abfd != NULL)
846 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_PROC,
847 OFBA_MSPABI_Tag_ISA))
848 {
849 case 1:
850 isa = MSP_ISA_MSP430;
851 code_model = MSP_SMALL_CODE_MODEL;
852 break;
853 case 2:
854 isa = MSP_ISA_MSP430X;
855 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_PROC,
856 OFBA_MSPABI_Tag_Code_Model))
857 {
858 case 1:
859 code_model = MSP_SMALL_CODE_MODEL;
860 break;
861 case 2:
862 code_model = MSP_LARGE_CODE_MODEL;
863 break;
864 default:
865 internal_error (__FILE__, __LINE__,
866 _("Unknown msp430x code memory model"));
867 break;
868 }
869 break;
870 case 0:
871 /* This can happen when loading a previously dumped data structure.
872 Use the ISA and code model from the current architecture, provided
873 it's compatible. */
874 {
875 struct gdbarch *ca = get_current_arch ();
876 if (ca && gdbarch_bfd_arch_info (ca)->arch == bfd_arch_msp430)
877 {
878 msp430_gdbarch_tdep *ca_tdep
879 = (msp430_gdbarch_tdep *) gdbarch_tdep (ca);
880
881 elf_flags = ca_tdep->elf_flags;
882 isa = ca_tdep->isa;
883 code_model = ca_tdep->code_model;
884 break;
885 }
886 }
887 /* Fall through. */
888 default:
889 error (_("Unknown msp430 isa"));
890 break;
891 }
892 else
893 {
894 isa = MSP_ISA_MSP430;
895 code_model = MSP_SMALL_CODE_MODEL;
896 }
897
898
899 /* Try to find the architecture in the list of already defined
900 architectures. */
901 for (arches = gdbarch_list_lookup_by_info (arches, &info);
902 arches != NULL;
903 arches = gdbarch_list_lookup_by_info (arches->next, &info))
904 {
905 msp430_gdbarch_tdep *candidate_tdep
906 = (msp430_gdbarch_tdep *) gdbarch_tdep (arches->gdbarch);
907
908 if (candidate_tdep->elf_flags != elf_flags
909 || candidate_tdep->isa != isa
910 || candidate_tdep->code_model != code_model)
911 continue;
912
913 return arches->gdbarch;
914 }
915
916 /* None found, create a new architecture from the information
917 provided. */
918 msp430_gdbarch_tdep *tdep = new msp430_gdbarch_tdep;
919 gdbarch = gdbarch_alloc (&info, tdep);
920 tdep->elf_flags = elf_flags;
921 tdep->isa = isa;
922 tdep->code_model = code_model;
923
924 /* Registers. */
925 set_gdbarch_num_regs (gdbarch, MSP430_NUM_REGS);
926 set_gdbarch_num_pseudo_regs (gdbarch, MSP430_NUM_PSEUDO_REGS);
927 set_gdbarch_register_name (gdbarch, msp430_register_name);
928 if (isa == MSP_ISA_MSP430)
929 set_gdbarch_register_type (gdbarch, msp430_register_type);
930 else
931 set_gdbarch_register_type (gdbarch, msp430x_register_type);
932 set_gdbarch_pc_regnum (gdbarch, MSP430_PC_REGNUM);
933 set_gdbarch_sp_regnum (gdbarch, MSP430_SP_REGNUM);
934 set_gdbarch_register_reggroup_p (gdbarch, msp430_register_reggroup_p);
935 set_gdbarch_pseudo_register_read (gdbarch, msp430_pseudo_register_read);
936 set_gdbarch_pseudo_register_write (gdbarch, msp430_pseudo_register_write);
937 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, msp430_dwarf2_reg_to_regnum);
938 set_gdbarch_register_sim_regno (gdbarch, msp430_register_sim_regno);
939
940 /* Data types. */
941 set_gdbarch_char_signed (gdbarch, 0);
942 set_gdbarch_short_bit (gdbarch, 16);
943 set_gdbarch_int_bit (gdbarch, 16);
944 set_gdbarch_long_bit (gdbarch, 32);
945 set_gdbarch_long_long_bit (gdbarch, 64);
946 if (code_model == MSP_SMALL_CODE_MODEL)
947 {
948 set_gdbarch_ptr_bit (gdbarch, 16);
949 set_gdbarch_addr_bit (gdbarch, 16);
950 }
951 else /* MSP_LARGE_CODE_MODEL */
952 {
953 set_gdbarch_ptr_bit (gdbarch, 32);
954 set_gdbarch_addr_bit (gdbarch, 32);
955 }
956 set_gdbarch_dwarf2_addr_size (gdbarch, 4);
957 set_gdbarch_float_bit (gdbarch, 32);
958 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
959 set_gdbarch_double_bit (gdbarch, 64);
960 set_gdbarch_long_double_bit (gdbarch, 64);
961 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
962 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
963
964 /* Breakpoints. */
965 set_gdbarch_breakpoint_kind_from_pc (gdbarch,
966 msp430_breakpoint::kind_from_pc);
967 set_gdbarch_sw_breakpoint_from_kind (gdbarch,
968 msp430_breakpoint::bp_from_kind);
969 set_gdbarch_decr_pc_after_break (gdbarch, 1);
970
971 /* Frames, prologues, etc. */
972 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
973 set_gdbarch_skip_prologue (gdbarch, msp430_skip_prologue);
974 set_gdbarch_frame_align (gdbarch, msp430_frame_align);
975 dwarf2_append_unwinders (gdbarch);
976 frame_unwind_append_unwinder (gdbarch, &msp430_unwind);
977
978 /* Dummy frames, return values. */
979 set_gdbarch_push_dummy_call (gdbarch, msp430_push_dummy_call);
980 set_gdbarch_return_value (gdbarch, msp430_return_value);
981
982 /* Trampolines. */
983 set_gdbarch_in_solib_return_trampoline (gdbarch, msp430_in_return_stub);
984 set_gdbarch_skip_trampoline_code (gdbarch, msp430_skip_trampoline_code);
985
986 /* Virtual tables. */
987 set_gdbarch_vbit_in_delta (gdbarch, 0);
988
989 return gdbarch;
990 }
991
992 /* Register the initialization routine. */
993
994 void _initialize_msp430_tdep ();
995 void
996 _initialize_msp430_tdep ()
997 {
998 register_gdbarch_init (bfd_arch_msp430, msp430_gdbarch_init);
999 }