* ppc-linux-nat.c (ppc_register_u_addr, fill_gregset): If PT_MQ
[binutils-gdb.git] / gdb / ppc-linux-nat.c
1 /* PPC GNU/Linux native support.
2
3 Copyright 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002,
4 2003 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #include "defs.h"
24 #include "gdb_string.h"
25 #include "frame.h"
26 #include "inferior.h"
27 #include "gdbcore.h"
28 #include "regcache.h"
29
30 #include <sys/types.h>
31 #include <sys/param.h>
32 #include <signal.h>
33 #include <sys/user.h>
34 #include <sys/ioctl.h>
35 #include "gdb_wait.h"
36 #include <fcntl.h>
37 #include <sys/procfs.h>
38 #include <sys/ptrace.h>
39
40 /* Prototypes for supply_gregset etc. */
41 #include "gregset.h"
42 #include "ppc-tdep.h"
43
44 #ifndef PT_READ_U
45 #define PT_READ_U PTRACE_PEEKUSR
46 #endif
47 #ifndef PT_WRITE_U
48 #define PT_WRITE_U PTRACE_POKEUSR
49 #endif
50
51 /* Default the type of the ptrace transfer to int. */
52 #ifndef PTRACE_XFER_TYPE
53 #define PTRACE_XFER_TYPE int
54 #endif
55
56 /* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
57 configure time check. Some older glibc's (for instance 2.2.1)
58 don't have a specific powerpc version of ptrace.h, and fall back on
59 a generic one. In such cases, sys/ptrace.h defines
60 PTRACE_GETFPXREGS and PTRACE_SETFPXREGS to the same numbers that
61 ppc kernel's asm/ptrace.h defines PTRACE_GETVRREGS and
62 PTRACE_SETVRREGS to be. This also makes a configury check pretty
63 much useless. */
64
65 /* These definitions should really come from the glibc header files,
66 but Glibc doesn't know about the vrregs yet. */
67 #ifndef PTRACE_GETVRREGS
68 #define PTRACE_GETVRREGS 18
69 #define PTRACE_SETVRREGS 19
70 #endif
71
72 /* This oddity is because the Linux kernel defines elf_vrregset_t as
73 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
74 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
75 the vrsave as an extra 4 bytes at the end. I opted for creating a
76 flat array of chars, so that it is easier to manipulate for gdb.
77
78 There are 32 vector registers 16 bytes longs, plus a VSCR register
79 which is only 4 bytes long, but is fetched as a 16 bytes
80 quantity. Up to here we have the elf_vrregset_t structure.
81 Appended to this there is space for the VRSAVE register: 4 bytes.
82 Even though this vrsave register is not included in the regset
83 typedef, it is handled by the ptrace requests.
84
85 Note that GNU/Linux doesn't support little endian PPC hardware,
86 therefore the offset at which the real value of the VSCR register
87 is located will be always 12 bytes.
88
89 The layout is like this (where x is the actual value of the vscr reg): */
90
91 /* *INDENT-OFF* */
92 /*
93 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
94 <-------> <-------><-------><->
95 VR0 VR31 VSCR VRSAVE
96 */
97 /* *INDENT-ON* */
98
99 #define SIZEOF_VRREGS 33*16+4
100
101 typedef char gdb_vrregset_t[SIZEOF_VRREGS];
102
103 /* For runtime check of ptrace support for VRREGS. */
104 int have_ptrace_getvrregs = 1;
105
106 int
107 kernel_u_size (void)
108 {
109 return (sizeof (struct user));
110 }
111
112 /* *INDENT-OFF* */
113 /* registers layout, as presented by the ptrace interface:
114 PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
115 PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
116 PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
117 PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
118 PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
119 PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
120 PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
121 PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
122 PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
123 /* *INDENT_ON * */
124
125 static int
126 ppc_register_u_addr (int regno)
127 {
128 int u_addr = -1;
129 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
130
131 /* General purpose registers occupy 1 slot each in the buffer */
132 if (regno >= tdep->ppc_gp0_regnum && regno <= tdep->ppc_gplast_regnum )
133 u_addr = ((PT_R0 + regno) * 4);
134
135 /* Floating point regs: 2 slots each */
136 if (regno >= FP0_REGNUM && regno <= FPLAST_REGNUM)
137 u_addr = ((PT_FPR0 + (regno - FP0_REGNUM) * 2) * 4);
138
139 /* UISA special purpose registers: 1 slot each */
140 if (regno == PC_REGNUM)
141 u_addr = PT_NIP * 4;
142 if (regno == tdep->ppc_lr_regnum)
143 u_addr = PT_LNK * 4;
144 if (regno == tdep->ppc_cr_regnum)
145 u_addr = PT_CCR * 4;
146 if (regno == tdep->ppc_xer_regnum)
147 u_addr = PT_XER * 4;
148 if (regno == tdep->ppc_ctr_regnum)
149 u_addr = PT_CTR * 4;
150 #ifdef PT_MQ
151 if (regno == tdep->ppc_mq_regnum)
152 u_addr = PT_MQ * 4;
153 #endif
154 if (regno == tdep->ppc_ps_regnum)
155 u_addr = PT_MSR * 4;
156 if (regno == tdep->ppc_fpscr_regnum)
157 u_addr = PT_FPSCR * 4;
158
159 return u_addr;
160 }
161
162 static int
163 ppc_ptrace_cannot_fetch_store_register (int regno)
164 {
165 return (ppc_register_u_addr (regno) == -1);
166 }
167
168 /* The Linux kernel ptrace interface for AltiVec registers uses the
169 registers set mechanism, as opposed to the interface for all the
170 other registers, that stores/fetches each register individually. */
171 static void
172 fetch_altivec_register (int tid, int regno)
173 {
174 int ret;
175 int offset = 0;
176 gdb_vrregset_t regs;
177 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
178 int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
179
180 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
181 if (ret < 0)
182 {
183 if (errno == EIO)
184 {
185 have_ptrace_getvrregs = 0;
186 return;
187 }
188 perror_with_name ("Unable to fetch AltiVec register");
189 }
190
191 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
192 long on the hardware. We deal only with the lower 4 bytes of the
193 vector. VRSAVE is at the end of the array in a 4 bytes slot, so
194 there is no need to define an offset for it. */
195 if (regno == (tdep->ppc_vrsave_regnum - 1))
196 offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
197
198 supply_register (regno,
199 regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
200 }
201
202 static void
203 fetch_register (int tid, int regno)
204 {
205 /* This isn't really an address. But ptrace thinks of it as one. */
206 char mess[128]; /* For messages */
207 register int i;
208 unsigned int offset; /* Offset of registers within the u area. */
209 char buf[MAX_REGISTER_SIZE];
210 CORE_ADDR regaddr = ppc_register_u_addr (regno);
211
212 if (altivec_register_p (regno))
213 {
214 /* If this is the first time through, or if it is not the first
215 time through, and we have comfirmed that there is kernel
216 support for such a ptrace request, then go and fetch the
217 register. */
218 if (have_ptrace_getvrregs)
219 {
220 fetch_altivec_register (tid, regno);
221 return;
222 }
223 /* If we have discovered that there is no ptrace support for
224 AltiVec registers, fall through and return zeroes, because
225 regaddr will be -1 in this case. */
226 }
227
228 if (regaddr == -1)
229 {
230 memset (buf, '\0', REGISTER_RAW_SIZE (regno)); /* Supply zeroes */
231 supply_register (regno, buf);
232 return;
233 }
234
235 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
236 {
237 errno = 0;
238 *(PTRACE_XFER_TYPE *) & buf[i] = ptrace (PT_READ_U, tid,
239 (PTRACE_ARG3_TYPE) regaddr, 0);
240 regaddr += sizeof (PTRACE_XFER_TYPE);
241 if (errno != 0)
242 {
243 sprintf (mess, "reading register %s (#%d)",
244 REGISTER_NAME (regno), regno);
245 perror_with_name (mess);
246 }
247 }
248 supply_register (regno, buf);
249 }
250
251 static void
252 supply_vrregset (gdb_vrregset_t *vrregsetp)
253 {
254 int i;
255 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
256 int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
257 int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
258 int offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
259
260 for (i = 0; i < num_of_vrregs; i++)
261 {
262 /* The last 2 registers of this set are only 32 bit long, not
263 128. However an offset is necessary only for VSCR because it
264 occupies a whole vector, while VRSAVE occupies a full 4 bytes
265 slot. */
266 if (i == (num_of_vrregs - 2))
267 supply_register (tdep->ppc_vr0_regnum + i,
268 *vrregsetp + i * vrregsize + offset);
269 else
270 supply_register (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
271 }
272 }
273
274 static void
275 fetch_altivec_registers (int tid)
276 {
277 int ret;
278 gdb_vrregset_t regs;
279
280 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
281 if (ret < 0)
282 {
283 if (errno == EIO)
284 {
285 have_ptrace_getvrregs = 0;
286 return;
287 }
288 perror_with_name ("Unable to fetch AltiVec registers");
289 }
290 supply_vrregset (&regs);
291 }
292
293 static void
294 fetch_ppc_registers (int tid)
295 {
296 int i;
297 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
298
299 for (i = 0; i <= tdep->ppc_fpscr_regnum; i++)
300 fetch_register (tid, i);
301 if (tdep->ppc_mq_regnum != -1)
302 fetch_register (tid, tdep->ppc_mq_regnum);
303 if (have_ptrace_getvrregs)
304 if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
305 fetch_altivec_registers (tid);
306 }
307
308 /* Fetch registers from the child process. Fetch all registers if
309 regno == -1, otherwise fetch all general registers or all floating
310 point registers depending upon the value of regno. */
311 void
312 fetch_inferior_registers (int regno)
313 {
314 /* Overload thread id onto process id */
315 int tid = TIDGET (inferior_ptid);
316
317 /* No thread id, just use process id */
318 if (tid == 0)
319 tid = PIDGET (inferior_ptid);
320
321 if (regno == -1)
322 fetch_ppc_registers (tid);
323 else
324 fetch_register (tid, regno);
325 }
326
327 /* Store one register. */
328 static void
329 store_altivec_register (int tid, int regno)
330 {
331 int ret;
332 int offset = 0;
333 gdb_vrregset_t regs;
334 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
335 int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
336
337 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
338 if (ret < 0)
339 {
340 if (errno == EIO)
341 {
342 have_ptrace_getvrregs = 0;
343 return;
344 }
345 perror_with_name ("Unable to fetch AltiVec register");
346 }
347
348 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
349 long on the hardware. */
350 if (regno == (tdep->ppc_vrsave_regnum - 1))
351 offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
352
353 regcache_collect (regno,
354 regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
355
356 ret = ptrace (PTRACE_SETVRREGS, tid, 0, &regs);
357 if (ret < 0)
358 perror_with_name ("Unable to store AltiVec register");
359 }
360
361 static void
362 store_register (int tid, int regno)
363 {
364 /* This isn't really an address. But ptrace thinks of it as one. */
365 CORE_ADDR regaddr = ppc_register_u_addr (regno);
366 char mess[128]; /* For messages */
367 register int i;
368 unsigned int offset; /* Offset of registers within the u area. */
369 char buf[MAX_REGISTER_SIZE];
370
371 if (altivec_register_p (regno))
372 {
373 store_altivec_register (tid, regno);
374 return;
375 }
376
377 if (regaddr == -1)
378 return;
379
380 regcache_collect (regno, buf);
381 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
382 {
383 errno = 0;
384 ptrace (PT_WRITE_U, tid, (PTRACE_ARG3_TYPE) regaddr,
385 *(PTRACE_XFER_TYPE *) & buf[i]);
386 regaddr += sizeof (PTRACE_XFER_TYPE);
387
388 if (errno == EIO
389 && regno == gdbarch_tdep (current_gdbarch)->ppc_fpscr_regnum)
390 {
391 /* Some older kernel versions don't allow fpscr to be written. */
392 continue;
393 }
394
395 if (errno != 0)
396 {
397 sprintf (mess, "writing register %s (#%d)",
398 REGISTER_NAME (regno), regno);
399 perror_with_name (mess);
400 }
401 }
402 }
403
404 static void
405 fill_vrregset (gdb_vrregset_t *vrregsetp)
406 {
407 int i;
408 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
409 int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
410 int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
411 int offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
412
413 for (i = 0; i < num_of_vrregs; i++)
414 {
415 /* The last 2 registers of this set are only 32 bit long, not
416 128, but only VSCR is fetched as a 16 bytes quantity. */
417 if (i == (num_of_vrregs - 2))
418 regcache_collect (tdep->ppc_vr0_regnum + i,
419 *vrregsetp + i * vrregsize + offset);
420 else
421 regcache_collect (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
422 }
423 }
424
425 static void
426 store_altivec_registers (int tid)
427 {
428 int ret;
429 gdb_vrregset_t regs;
430
431 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
432 if (ret < 0)
433 {
434 if (errno == EIO)
435 {
436 have_ptrace_getvrregs = 0;
437 return;
438 }
439 perror_with_name ("Couldn't get AltiVec registers");
440 }
441
442 fill_vrregset (&regs);
443
444 if (ptrace (PTRACE_SETVRREGS, tid, 0, &regs) < 0)
445 perror_with_name ("Couldn't write AltiVec registers");
446 }
447
448 static void
449 store_ppc_registers (int tid)
450 {
451 int i;
452 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
453
454 for (i = 0; i <= tdep->ppc_fpscr_regnum; i++)
455 store_register (tid, i);
456 if (tdep->ppc_mq_regnum != -1)
457 store_register (tid, tdep->ppc_mq_regnum);
458 if (have_ptrace_getvrregs)
459 if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
460 store_altivec_registers (tid);
461 }
462
463 void
464 store_inferior_registers (int regno)
465 {
466 /* Overload thread id onto process id */
467 int tid = TIDGET (inferior_ptid);
468
469 /* No thread id, just use process id */
470 if (tid == 0)
471 tid = PIDGET (inferior_ptid);
472
473 if (regno >= 0)
474 store_register (tid, regno);
475 else
476 store_ppc_registers (tid);
477 }
478
479 void
480 supply_gregset (gdb_gregset_t *gregsetp)
481 {
482 ppc_linux_supply_gregset ((char *) gregsetp);
483 }
484
485 void
486 fill_gregset (gdb_gregset_t *gregsetp, int regno)
487 {
488 int regi;
489 elf_greg_t *regp = (elf_greg_t *) gregsetp;
490 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
491
492 for (regi = 0; regi < 32; regi++)
493 {
494 if ((regno == -1) || regno == regi)
495 regcache_collect (regi, regp + PT_R0 + regi);
496 }
497
498 if ((regno == -1) || regno == PC_REGNUM)
499 regcache_collect (PC_REGNUM, regp + PT_NIP);
500 if ((regno == -1) || regno == tdep->ppc_lr_regnum)
501 regcache_collect (tdep->ppc_lr_regnum, regp + PT_LNK);
502 if ((regno == -1) || regno == tdep->ppc_cr_regnum)
503 regcache_collect (tdep->ppc_cr_regnum, regp + PT_CCR);
504 if ((regno == -1) || regno == tdep->ppc_xer_regnum)
505 regcache_collect (tdep->ppc_xer_regnum, regp + PT_XER);
506 if ((regno == -1) || regno == tdep->ppc_ctr_regnum)
507 regcache_collect (tdep->ppc_ctr_regnum, regp + PT_CTR);
508 #ifdef PT_MQ
509 if (((regno == -1) || regno == tdep->ppc_mq_regnum)
510 && (tdep->ppc_mq_regnum != -1))
511 regcache_collect (tdep->ppc_mq_regnum, regp + PT_MQ);
512 #endif
513 if ((regno == -1) || regno == tdep->ppc_ps_regnum)
514 regcache_collect (tdep->ppc_ps_regnum, regp + PT_MSR);
515 }
516
517 void
518 supply_fpregset (gdb_fpregset_t * fpregsetp)
519 {
520 ppc_linux_supply_fpregset ((char *) fpregsetp);
521 }
522
523 /* Given a pointer to a floating point register set in /proc format
524 (fpregset_t *), update the register specified by REGNO from gdb's
525 idea of the current floating point register set. If REGNO is -1,
526 update them all. */
527 void
528 fill_fpregset (gdb_fpregset_t *fpregsetp, int regno)
529 {
530 int regi;
531 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
532
533 for (regi = 0; regi < 32; regi++)
534 {
535 if ((regno == -1) || (regno == FP0_REGNUM + regi))
536 regcache_collect (FP0_REGNUM + regi, (char *) (*fpregsetp + regi));
537 }
538 if ((regno == -1) || regno == tdep->ppc_fpscr_regnum)
539 regcache_collect (tdep->ppc_fpscr_regnum, (char *) (*fpregsetp + regi));
540 }