1 /* Target-dependent code for GDB, the GNU debugger.
3 Copyright (C) 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
4 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
35 #include "solib-svr4.h"
37 #include "ppc-linux-tdep.h"
38 #include "trad-frame.h"
39 #include "frame-unwind.h"
40 #include "tramp-frame.h"
42 #include "features/rs6000/powerpc-32l.c"
43 #include "features/rs6000/powerpc-altivec32l.c"
44 #include "features/rs6000/powerpc-vsx32l.c"
45 #include "features/rs6000/powerpc-64l.c"
46 #include "features/rs6000/powerpc-altivec64l.c"
47 #include "features/rs6000/powerpc-vsx64l.c"
48 #include "features/rs6000/powerpc-e500l.c"
51 /* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint
52 in much the same fashion as memory_remove_breakpoint in mem-break.c,
53 but is careful not to write back the previous contents if the code
54 in question has changed in between inserting the breakpoint and
57 Here is the problem that we're trying to solve...
59 Once upon a time, before introducing this function to remove
60 breakpoints from the inferior, setting a breakpoint on a shared
61 library function prior to running the program would not work
62 properly. In order to understand the problem, it is first
63 necessary to understand a little bit about dynamic linking on
66 A call to a shared library function is accomplished via a bl
67 (branch-and-link) instruction whose branch target is an entry
68 in the procedure linkage table (PLT). The PLT in the object
69 file is uninitialized. To gdb, prior to running the program, the
70 entries in the PLT are all zeros.
72 Once the program starts running, the shared libraries are loaded
73 and the procedure linkage table is initialized, but the entries in
74 the table are not (necessarily) resolved. Once a function is
75 actually called, the code in the PLT is hit and the function is
76 resolved. In order to better illustrate this, an example is in
77 order; the following example is from the gdb testsuite.
79 We start the program shmain.
81 [kev@arroyo testsuite]$ ../gdb gdb.base/shmain
84 We place two breakpoints, one on shr1 and the other on main.
87 Breakpoint 1 at 0x100409d4
89 Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44.
91 Examine the instruction (and the immediatly following instruction)
92 upon which the breakpoint was placed. Note that the PLT entry
93 for shr1 contains zeros.
96 0x100409d4 <shr1>: .long 0x0
97 0x100409d8 <shr1+4>: .long 0x0
102 Starting program: gdb.base/shmain
103 Breakpoint 1 at 0xffaf790: file gdb.base/shr1.c, line 19.
105 Breakpoint 2, main ()
106 at gdb.base/shmain.c:44
109 Examine the PLT again. Note that the loading of the shared
110 library has initialized the PLT to code which loads a constant
111 (which I think is an index into the GOT) into r11 and then
112 branchs a short distance to the code which actually does the
115 (gdb) x/2i 0x100409d4
116 0x100409d4 <shr1>: li r11,4
117 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
121 Breakpoint 1, shr1 (x=1)
122 at gdb.base/shr1.c:19
125 Now we've hit the breakpoint at shr1. (The breakpoint was
126 reset from the PLT entry to the actual shr1 function after the
127 shared library was loaded.) Note that the PLT entry has been
128 resolved to contain a branch that takes us directly to shr1.
129 (The real one, not the PLT entry.)
131 (gdb) x/2i 0x100409d4
132 0x100409d4 <shr1>: b 0xffaf76c <shr1>
133 0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
135 The thing to note here is that the PLT entry for shr1 has been
138 Now the problem should be obvious. GDB places a breakpoint (a
139 trap instruction) on the zero value of the PLT entry for shr1.
140 Later on, after the shared library had been loaded and the PLT
141 initialized, GDB gets a signal indicating this fact and attempts
142 (as it always does when it stops) to remove all the breakpoints.
144 The breakpoint removal was causing the former contents (a zero
145 word) to be written back to the now initialized PLT entry thus
146 destroying a portion of the initialization that had occurred only a
147 short time ago. When execution continued, the zero word would be
148 executed as an instruction an an illegal instruction trap was
149 generated instead. (0 is not a legal instruction.)
151 The fix for this problem was fairly straightforward. The function
152 memory_remove_breakpoint from mem-break.c was copied to this file,
153 modified slightly, and renamed to ppc_linux_memory_remove_breakpoint.
154 In tm-linux.h, MEMORY_REMOVE_BREAKPOINT is defined to call this new
157 The differences between ppc_linux_memory_remove_breakpoint () and
158 memory_remove_breakpoint () are minor. All that the former does
159 that the latter does not is check to make sure that the breakpoint
160 location actually contains a breakpoint (trap instruction) prior
161 to attempting to write back the old contents. If it does contain
162 a trap instruction, we allow the old contents to be written back.
163 Otherwise, we silently do nothing.
165 The big question is whether memory_remove_breakpoint () should be
166 changed to have the same functionality. The downside is that more
167 traffic is generated for remote targets since we'll have an extra
168 fetch of a memory word each time a breakpoint is removed.
170 For the time being, we'll leave this self-modifying-code-friendly
171 version in ppc-linux-tdep.c, but it ought to be migrated somewhere
172 else in the event that some other platform has similar needs with
173 regard to removing breakpoints in some potentially self modifying
176 ppc_linux_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
177 struct bp_target_info
*bp_tgt
)
179 CORE_ADDR addr
= bp_tgt
->placed_address
;
180 const unsigned char *bp
;
183 gdb_byte old_contents
[BREAKPOINT_MAX
];
184 struct cleanup
*cleanup
;
186 /* Determine appropriate breakpoint contents and size for this address. */
187 bp
= gdbarch_breakpoint_from_pc (gdbarch
, &addr
, &bplen
);
189 error (_("Software breakpoints not implemented for this target."));
191 /* Make sure we see the memory breakpoints. */
192 cleanup
= make_show_memory_breakpoints_cleanup (1);
193 val
= target_read_memory (addr
, old_contents
, bplen
);
195 /* If our breakpoint is no longer at the address, this means that the
196 program modified the code on us, so it is wrong to put back the
198 if (val
== 0 && memcmp (bp
, old_contents
, bplen
) == 0)
199 val
= target_write_memory (addr
, bp_tgt
->shadow_contents
, bplen
);
201 do_cleanups (cleanup
);
205 /* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather
206 than the 32 bit SYSV R4 ABI structure return convention - all
207 structures, no matter their size, are put in memory. Vectors,
208 which were added later, do get returned in a register though. */
210 static enum return_value_convention
211 ppc_linux_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
212 struct type
*valtype
, struct regcache
*regcache
,
213 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
215 if ((TYPE_CODE (valtype
) == TYPE_CODE_STRUCT
216 || TYPE_CODE (valtype
) == TYPE_CODE_UNION
)
217 && !((TYPE_LENGTH (valtype
) == 16 || TYPE_LENGTH (valtype
) == 8)
218 && TYPE_VECTOR (valtype
)))
219 return RETURN_VALUE_STRUCT_CONVENTION
;
221 return ppc_sysv_abi_return_value (gdbarch
, func_type
, valtype
, regcache
,
225 /* Macros for matching instructions. Note that, since all the
226 operands are masked off before they're or-ed into the instruction,
227 you can use -1 to make masks. */
229 #define insn_d(opcd, rts, ra, d) \
230 ((((opcd) & 0x3f) << 26) \
231 | (((rts) & 0x1f) << 21) \
232 | (((ra) & 0x1f) << 16) \
235 #define insn_ds(opcd, rts, ra, d, xo) \
236 ((((opcd) & 0x3f) << 26) \
237 | (((rts) & 0x1f) << 21) \
238 | (((ra) & 0x1f) << 16) \
242 #define insn_xfx(opcd, rts, spr, xo) \
243 ((((opcd) & 0x3f) << 26) \
244 | (((rts) & 0x1f) << 21) \
245 | (((spr) & 0x1f) << 16) \
246 | (((spr) & 0x3e0) << 6) \
247 | (((xo) & 0x3ff) << 1))
249 /* Read a PPC instruction from memory. PPC instructions are always
250 big-endian, no matter what endianness the program is running in, so
251 we can't use read_memory_integer or one of its friends here. */
253 read_insn (CORE_ADDR pc
)
255 unsigned char buf
[4];
257 read_memory (pc
, buf
, 4);
258 return (buf
[0] << 24) | (buf
[1] << 16) | (buf
[2] << 8) | buf
[3];
262 /* An instruction to match. */
265 unsigned int mask
; /* mask the insn with this... */
266 unsigned int data
; /* ...and see if it matches this. */
267 int optional
; /* If non-zero, this insn may be absent. */
270 /* Return non-zero if the instructions at PC match the series
271 described in PATTERN, or zero otherwise. PATTERN is an array of
272 'struct insn_pattern' objects, terminated by an entry whose mask is
275 When the match is successful, fill INSN[i] with what PATTERN[i]
276 matched. If PATTERN[i] is optional, and the instruction wasn't
277 present, set INSN[i] to 0 (which is not a valid PPC instruction).
278 INSN should have as many elements as PATTERN. Note that, if
279 PATTERN contains optional instructions which aren't present in
280 memory, then INSN will have holes, so INSN[i] isn't necessarily the
281 i'th instruction in memory. */
283 insns_match_pattern (CORE_ADDR pc
,
284 struct insn_pattern
*pattern
,
289 for (i
= 0; pattern
[i
].mask
; i
++)
291 insn
[i
] = read_insn (pc
);
292 if ((insn
[i
] & pattern
[i
].mask
) == pattern
[i
].data
)
294 else if (pattern
[i
].optional
)
304 /* Return the 'd' field of the d-form instruction INSN, properly
307 insn_d_field (unsigned int insn
)
309 return ((((CORE_ADDR
) insn
& 0xffff) ^ 0x8000) - 0x8000);
313 /* Return the 'ds' field of the ds-form instruction INSN, with the two
314 zero bits concatenated at the right, and properly
317 insn_ds_field (unsigned int insn
)
319 return ((((CORE_ADDR
) insn
& 0xfffc) ^ 0x8000) - 0x8000);
323 /* If DESC is the address of a 64-bit PowerPC GNU/Linux function
324 descriptor, return the descriptor's entry point. */
326 ppc64_desc_entry_point (CORE_ADDR desc
)
328 /* The first word of the descriptor is the entry point. */
329 return (CORE_ADDR
) read_memory_unsigned_integer (desc
, 8);
333 /* Pattern for the standard linkage function. These are built by
334 build_plt_stub in elf64-ppc.c, whose GLINK argument is always
336 static struct insn_pattern ppc64_standard_linkage1
[] =
338 /* addis r12, r2, <any> */
339 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
342 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
344 /* ld r11, <any>(r12) */
345 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
347 /* addis r12, r12, 1 <optional> */
348 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
350 /* ld r2, <any>(r12) */
351 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
353 /* addis r12, r12, 1 <optional> */
354 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
357 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
359 /* ld r11, <any>(r12) */
360 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
363 { -1, 0x4e800420, 0 },
367 #define PPC64_STANDARD_LINKAGE1_LEN \
368 (sizeof (ppc64_standard_linkage1) / sizeof (ppc64_standard_linkage1[0]))
370 static struct insn_pattern ppc64_standard_linkage2
[] =
372 /* addis r12, r2, <any> */
373 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
376 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
378 /* ld r11, <any>(r12) */
379 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
381 /* addi r12, r12, <any> <optional> */
382 { insn_d (-1, -1, -1, 0), insn_d (14, 12, 12, 0), 1 },
385 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
387 /* ld r2, <any>(r12) */
388 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
390 /* ld r11, <any>(r12) */
391 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
394 { -1, 0x4e800420, 0 },
398 #define PPC64_STANDARD_LINKAGE2_LEN \
399 (sizeof (ppc64_standard_linkage2) / sizeof (ppc64_standard_linkage2[0]))
401 static struct insn_pattern ppc64_standard_linkage3
[] =
404 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
406 /* ld r11, <any>(r2) */
407 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
409 /* addi r2, r2, <any> <optional> */
410 { insn_d (-1, -1, -1, 0), insn_d (14, 2, 2, 0), 1 },
413 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
415 /* ld r11, <any>(r2) */
416 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
418 /* ld r2, <any>(r2) */
419 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 2, 0, 0), 0 },
422 { -1, 0x4e800420, 0 },
426 #define PPC64_STANDARD_LINKAGE3_LEN \
427 (sizeof (ppc64_standard_linkage3) / sizeof (ppc64_standard_linkage3[0]))
430 /* When the dynamic linker is doing lazy symbol resolution, the first
431 call to a function in another object will go like this:
433 - The user's function calls the linkage function:
435 100007c4: 4b ff fc d5 bl 10000498
436 100007c8: e8 41 00 28 ld r2,40(r1)
438 - The linkage function loads the entry point (and other stuff) from
439 the function descriptor in the PLT, and jumps to it:
441 10000498: 3d 82 00 00 addis r12,r2,0
442 1000049c: f8 41 00 28 std r2,40(r1)
443 100004a0: e9 6c 80 98 ld r11,-32616(r12)
444 100004a4: e8 4c 80 a0 ld r2,-32608(r12)
445 100004a8: 7d 69 03 a6 mtctr r11
446 100004ac: e9 6c 80 a8 ld r11,-32600(r12)
447 100004b0: 4e 80 04 20 bctr
449 - But since this is the first time that PLT entry has been used, it
450 sends control to its glink entry. That loads the number of the
451 PLT entry and jumps to the common glink0 code:
453 10000c98: 38 00 00 00 li r0,0
454 10000c9c: 4b ff ff dc b 10000c78
456 - The common glink0 code then transfers control to the dynamic
459 10000c78: e8 41 00 28 ld r2,40(r1)
460 10000c7c: 3d 82 00 00 addis r12,r2,0
461 10000c80: e9 6c 80 80 ld r11,-32640(r12)
462 10000c84: e8 4c 80 88 ld r2,-32632(r12)
463 10000c88: 7d 69 03 a6 mtctr r11
464 10000c8c: e9 6c 80 90 ld r11,-32624(r12)
465 10000c90: 4e 80 04 20 bctr
467 Eventually, this code will figure out how to skip all of this,
468 including the dynamic linker. At the moment, we just get through
469 the linkage function. */
471 /* If the current thread is about to execute a series of instructions
472 at PC matching the ppc64_standard_linkage pattern, and INSN is the result
473 from that pattern match, return the code address to which the
474 standard linkage function will send them. (This doesn't deal with
475 dynamic linker lazy symbol resolution stubs.) */
477 ppc64_standard_linkage1_target (struct frame_info
*frame
,
478 CORE_ADDR pc
, unsigned int *insn
)
480 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (frame
));
482 /* The address of the function descriptor this linkage function
485 = ((CORE_ADDR
) get_frame_register_unsigned (frame
,
486 tdep
->ppc_gp0_regnum
+ 2)
487 + (insn_d_field (insn
[0]) << 16)
488 + insn_ds_field (insn
[2]));
490 /* The first word of the descriptor is the entry point. Return that. */
491 return ppc64_desc_entry_point (desc
);
494 static struct core_regset_section ppc_linux_regset_sections
[] =
498 { ".reg-ppc-vmx", 544 },
499 { ".reg-ppc-vsx", 256 },
504 ppc64_standard_linkage2_target (struct frame_info
*frame
,
505 CORE_ADDR pc
, unsigned int *insn
)
507 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (frame
));
509 /* The address of the function descriptor this linkage function
512 = ((CORE_ADDR
) get_frame_register_unsigned (frame
,
513 tdep
->ppc_gp0_regnum
+ 2)
514 + (insn_d_field (insn
[0]) << 16)
515 + insn_ds_field (insn
[2]));
517 /* The first word of the descriptor is the entry point. Return that. */
518 return ppc64_desc_entry_point (desc
);
522 ppc64_standard_linkage3_target (struct frame_info
*frame
,
523 CORE_ADDR pc
, unsigned int *insn
)
525 struct gdbarch_tdep
*tdep
= gdbarch_tdep (get_frame_arch (frame
));
527 /* The address of the function descriptor this linkage function
530 = ((CORE_ADDR
) get_frame_register_unsigned (frame
,
531 tdep
->ppc_gp0_regnum
+ 2)
532 + insn_ds_field (insn
[1]));
534 /* The first word of the descriptor is the entry point. Return that. */
535 return ppc64_desc_entry_point (desc
);
539 /* Given that we've begun executing a call trampoline at PC, return
540 the entry point of the function the trampoline will go to. */
542 ppc64_skip_trampoline_code (struct frame_info
*frame
, CORE_ADDR pc
)
544 unsigned int ppc64_standard_linkage1_insn
[PPC64_STANDARD_LINKAGE1_LEN
];
545 unsigned int ppc64_standard_linkage2_insn
[PPC64_STANDARD_LINKAGE2_LEN
];
546 unsigned int ppc64_standard_linkage3_insn
[PPC64_STANDARD_LINKAGE3_LEN
];
549 if (insns_match_pattern (pc
, ppc64_standard_linkage1
,
550 ppc64_standard_linkage1_insn
))
551 pc
= ppc64_standard_linkage1_target (frame
, pc
,
552 ppc64_standard_linkage1_insn
);
553 else if (insns_match_pattern (pc
, ppc64_standard_linkage2
,
554 ppc64_standard_linkage2_insn
))
555 pc
= ppc64_standard_linkage2_target (frame
, pc
,
556 ppc64_standard_linkage2_insn
);
557 else if (insns_match_pattern (pc
, ppc64_standard_linkage3
,
558 ppc64_standard_linkage3_insn
))
559 pc
= ppc64_standard_linkage3_target (frame
, pc
,
560 ppc64_standard_linkage3_insn
);
564 /* The PLT descriptor will either point to the already resolved target
565 address, or else to a glink stub. As the latter carry synthetic @plt
566 symbols, find_solib_trampoline_target should be able to resolve them. */
567 target
= find_solib_trampoline_target (frame
, pc
);
568 return target
? target
: pc
;
572 /* Support for convert_from_func_ptr_addr (ARCH, ADDR, TARG) on PPC64
575 Usually a function pointer's representation is simply the address
576 of the function. On GNU/Linux on the PowerPC however, a function
577 pointer may be a pointer to a function descriptor.
579 For PPC64, a function descriptor is a TOC entry, in a data section,
580 which contains three words: the first word is the address of the
581 function, the second word is the TOC pointer (r2), and the third word
582 is the static chain value.
584 Throughout GDB it is currently assumed that a function pointer contains
585 the address of the function, which is not easy to fix. In addition, the
586 conversion of a function address to a function pointer would
587 require allocation of a TOC entry in the inferior's memory space,
588 with all its drawbacks. To be able to call C++ virtual methods in
589 the inferior (which are called via function pointers),
590 find_function_addr uses this function to get the function address
591 from a function pointer.
593 If ADDR points at what is clearly a function descriptor, transform
594 it into the address of the corresponding function, if needed. Be
595 conservative, otherwise GDB will do the transformation on any
596 random addresses such as occur when there is no symbol table. */
599 ppc64_linux_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
,
601 struct target_ops
*targ
)
603 struct section_table
*s
= target_section_by_addr (targ
, addr
);
605 /* Check if ADDR points to a function descriptor. */
606 if (s
&& strcmp (s
->the_bfd_section
->name
, ".opd") == 0)
607 return get_target_memory_unsigned (targ
, addr
, 8);
612 /* Wrappers to handle Linux-only registers. */
615 ppc_linux_supply_gregset (const struct regset
*regset
,
616 struct regcache
*regcache
,
617 int regnum
, const void *gregs
, size_t len
)
619 const struct ppc_reg_offsets
*offsets
= regset
->descr
;
621 ppc_supply_gregset (regset
, regcache
, regnum
, gregs
, len
);
623 if (ppc_linux_trap_reg_p (get_regcache_arch (regcache
)))
625 /* "orig_r3" is stored 2 slots after "pc". */
626 if (regnum
== -1 || regnum
== PPC_ORIG_R3_REGNUM
)
627 ppc_supply_reg (regcache
, PPC_ORIG_R3_REGNUM
, gregs
,
628 offsets
->pc_offset
+ 2 * offsets
->gpr_size
,
631 /* "trap" is stored 8 slots after "pc". */
632 if (regnum
== -1 || regnum
== PPC_TRAP_REGNUM
)
633 ppc_supply_reg (regcache
, PPC_TRAP_REGNUM
, gregs
,
634 offsets
->pc_offset
+ 8 * offsets
->gpr_size
,
640 ppc_linux_collect_gregset (const struct regset
*regset
,
641 const struct regcache
*regcache
,
642 int regnum
, void *gregs
, size_t len
)
644 const struct ppc_reg_offsets
*offsets
= regset
->descr
;
646 /* Clear areas in the linux gregset not written elsewhere. */
648 memset (gregs
, 0, len
);
650 ppc_collect_gregset (regset
, regcache
, regnum
, gregs
, len
);
652 if (ppc_linux_trap_reg_p (get_regcache_arch (regcache
)))
654 /* "orig_r3" is stored 2 slots after "pc". */
655 if (regnum
== -1 || regnum
== PPC_ORIG_R3_REGNUM
)
656 ppc_collect_reg (regcache
, PPC_ORIG_R3_REGNUM
, gregs
,
657 offsets
->pc_offset
+ 2 * offsets
->gpr_size
,
660 /* "trap" is stored 8 slots after "pc". */
661 if (regnum
== -1 || regnum
== PPC_TRAP_REGNUM
)
662 ppc_collect_reg (regcache
, PPC_TRAP_REGNUM
, gregs
,
663 offsets
->pc_offset
+ 8 * offsets
->gpr_size
,
668 /* Regset descriptions. */
669 static const struct ppc_reg_offsets ppc32_linux_reg_offsets
=
671 /* General-purpose registers. */
672 /* .r0_offset = */ 0,
675 /* .pc_offset = */ 128,
676 /* .ps_offset = */ 132,
677 /* .cr_offset = */ 152,
678 /* .lr_offset = */ 144,
679 /* .ctr_offset = */ 140,
680 /* .xer_offset = */ 148,
681 /* .mq_offset = */ 156,
683 /* Floating-point registers. */
684 /* .f0_offset = */ 0,
685 /* .fpscr_offset = */ 256,
686 /* .fpscr_size = */ 8,
688 /* AltiVec registers. */
689 /* .vr0_offset = */ 0,
690 /* .vscr_offset = */ 512 + 12,
691 /* .vrsave_offset = */ 528
694 static const struct ppc_reg_offsets ppc64_linux_reg_offsets
=
696 /* General-purpose registers. */
697 /* .r0_offset = */ 0,
700 /* .pc_offset = */ 256,
701 /* .ps_offset = */ 264,
702 /* .cr_offset = */ 304,
703 /* .lr_offset = */ 288,
704 /* .ctr_offset = */ 280,
705 /* .xer_offset = */ 296,
706 /* .mq_offset = */ 312,
708 /* Floating-point registers. */
709 /* .f0_offset = */ 0,
710 /* .fpscr_offset = */ 256,
711 /* .fpscr_size = */ 8,
713 /* AltiVec registers. */
714 /* .vr0_offset = */ 0,
715 /* .vscr_offset = */ 512 + 12,
716 /* .vrsave_offset = */ 528
719 static const struct regset ppc32_linux_gregset
= {
720 &ppc32_linux_reg_offsets
,
721 ppc_linux_supply_gregset
,
722 ppc_linux_collect_gregset
,
726 static const struct regset ppc64_linux_gregset
= {
727 &ppc64_linux_reg_offsets
,
728 ppc_linux_supply_gregset
,
729 ppc_linux_collect_gregset
,
733 static const struct regset ppc32_linux_fpregset
= {
734 &ppc32_linux_reg_offsets
,
736 ppc_collect_fpregset
,
740 static const struct regset ppc32_linux_vrregset
= {
741 &ppc32_linux_reg_offsets
,
743 ppc_collect_vrregset
,
747 static const struct regset ppc32_linux_vsxregset
= {
748 &ppc32_linux_reg_offsets
,
749 ppc_supply_vsxregset
,
750 ppc_collect_vsxregset
,
754 const struct regset
*
755 ppc_linux_gregset (int wordsize
)
757 return wordsize
== 8 ? &ppc64_linux_gregset
: &ppc32_linux_gregset
;
760 const struct regset
*
761 ppc_linux_fpregset (void)
763 return &ppc32_linux_fpregset
;
766 static const struct regset
*
767 ppc_linux_regset_from_core_section (struct gdbarch
*core_arch
,
768 const char *sect_name
, size_t sect_size
)
770 struct gdbarch_tdep
*tdep
= gdbarch_tdep (core_arch
);
771 if (strcmp (sect_name
, ".reg") == 0)
773 if (tdep
->wordsize
== 4)
774 return &ppc32_linux_gregset
;
776 return &ppc64_linux_gregset
;
778 if (strcmp (sect_name
, ".reg2") == 0)
779 return &ppc32_linux_fpregset
;
780 if (strcmp (sect_name
, ".reg-ppc-vmx") == 0)
781 return &ppc32_linux_vrregset
;
782 if (strcmp (sect_name
, ".reg-ppc-vsx") == 0)
783 return &ppc32_linux_vsxregset
;
788 ppc_linux_sigtramp_cache (struct frame_info
*this_frame
,
789 struct trad_frame_cache
*this_cache
,
790 CORE_ADDR func
, LONGEST offset
,
798 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
799 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
801 base
= get_frame_register_unsigned (this_frame
,
802 gdbarch_sp_regnum (gdbarch
));
803 if (bias
> 0 && get_frame_pc (this_frame
) != func
)
804 /* See below, some signal trampolines increment the stack as their
805 first instruction, need to compensate for that. */
808 /* Find the address of the register buffer pointer. */
809 regs
= base
+ offset
;
810 /* Use that to find the address of the corresponding register
812 gpregs
= read_memory_unsigned_integer (regs
, tdep
->wordsize
);
813 fpregs
= gpregs
+ 48 * tdep
->wordsize
;
815 /* General purpose. */
816 for (i
= 0; i
< 32; i
++)
818 int regnum
= i
+ tdep
->ppc_gp0_regnum
;
819 trad_frame_set_reg_addr (this_cache
, regnum
, gpregs
+ i
* tdep
->wordsize
);
821 trad_frame_set_reg_addr (this_cache
,
822 gdbarch_pc_regnum (gdbarch
),
823 gpregs
+ 32 * tdep
->wordsize
);
824 trad_frame_set_reg_addr (this_cache
, tdep
->ppc_ctr_regnum
,
825 gpregs
+ 35 * tdep
->wordsize
);
826 trad_frame_set_reg_addr (this_cache
, tdep
->ppc_lr_regnum
,
827 gpregs
+ 36 * tdep
->wordsize
);
828 trad_frame_set_reg_addr (this_cache
, tdep
->ppc_xer_regnum
,
829 gpregs
+ 37 * tdep
->wordsize
);
830 trad_frame_set_reg_addr (this_cache
, tdep
->ppc_cr_regnum
,
831 gpregs
+ 38 * tdep
->wordsize
);
833 if (ppc_linux_trap_reg_p (gdbarch
))
835 trad_frame_set_reg_addr (this_cache
, PPC_ORIG_R3_REGNUM
,
836 gpregs
+ 34 * tdep
->wordsize
);
837 trad_frame_set_reg_addr (this_cache
, PPC_TRAP_REGNUM
,
838 gpregs
+ 40 * tdep
->wordsize
);
841 if (ppc_floating_point_unit_p (gdbarch
))
843 /* Floating point registers. */
844 for (i
= 0; i
< 32; i
++)
846 int regnum
= i
+ gdbarch_fp0_regnum (gdbarch
);
847 trad_frame_set_reg_addr (this_cache
, regnum
,
848 fpregs
+ i
* tdep
->wordsize
);
850 trad_frame_set_reg_addr (this_cache
, tdep
->ppc_fpscr_regnum
,
851 fpregs
+ 32 * tdep
->wordsize
);
853 trad_frame_set_id (this_cache
, frame_id_build (base
, func
));
857 ppc32_linux_sigaction_cache_init (const struct tramp_frame
*self
,
858 struct frame_info
*this_frame
,
859 struct trad_frame_cache
*this_cache
,
862 ppc_linux_sigtramp_cache (this_frame
, this_cache
, func
,
863 0xd0 /* Offset to ucontext_t. */
864 + 0x30 /* Offset to .reg. */,
869 ppc64_linux_sigaction_cache_init (const struct tramp_frame
*self
,
870 struct frame_info
*this_frame
,
871 struct trad_frame_cache
*this_cache
,
874 ppc_linux_sigtramp_cache (this_frame
, this_cache
, func
,
875 0x80 /* Offset to ucontext_t. */
876 + 0xe0 /* Offset to .reg. */,
881 ppc32_linux_sighandler_cache_init (const struct tramp_frame
*self
,
882 struct frame_info
*this_frame
,
883 struct trad_frame_cache
*this_cache
,
886 ppc_linux_sigtramp_cache (this_frame
, this_cache
, func
,
887 0x40 /* Offset to ucontext_t. */
888 + 0x1c /* Offset to .reg. */,
893 ppc64_linux_sighandler_cache_init (const struct tramp_frame
*self
,
894 struct frame_info
*this_frame
,
895 struct trad_frame_cache
*this_cache
,
898 ppc_linux_sigtramp_cache (this_frame
, this_cache
, func
,
899 0x80 /* Offset to struct sigcontext. */
900 + 0x38 /* Offset to .reg. */,
904 static struct tramp_frame ppc32_linux_sigaction_tramp_frame
= {
908 { 0x380000ac, -1 }, /* li r0, 172 */
909 { 0x44000002, -1 }, /* sc */
910 { TRAMP_SENTINEL_INSN
},
912 ppc32_linux_sigaction_cache_init
914 static struct tramp_frame ppc64_linux_sigaction_tramp_frame
= {
918 { 0x38210080, -1 }, /* addi r1,r1,128 */
919 { 0x380000ac, -1 }, /* li r0, 172 */
920 { 0x44000002, -1 }, /* sc */
921 { TRAMP_SENTINEL_INSN
},
923 ppc64_linux_sigaction_cache_init
925 static struct tramp_frame ppc32_linux_sighandler_tramp_frame
= {
929 { 0x38000077, -1 }, /* li r0,119 */
930 { 0x44000002, -1 }, /* sc */
931 { TRAMP_SENTINEL_INSN
},
933 ppc32_linux_sighandler_cache_init
935 static struct tramp_frame ppc64_linux_sighandler_tramp_frame
= {
939 { 0x38210080, -1 }, /* addi r1,r1,128 */
940 { 0x38000077, -1 }, /* li r0,119 */
941 { 0x44000002, -1 }, /* sc */
942 { TRAMP_SENTINEL_INSN
},
944 ppc64_linux_sighandler_cache_init
948 /* Return 1 if PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM are usable. */
950 ppc_linux_trap_reg_p (struct gdbarch
*gdbarch
)
952 /* If we do not have a target description with registers, then
953 the special registers will not be included in the register set. */
954 if (!tdesc_has_registers (gdbarch_target_desc (gdbarch
)))
957 /* If we do, then it is safe to check the size. */
958 return register_size (gdbarch
, PPC_ORIG_R3_REGNUM
) > 0
959 && register_size (gdbarch
, PPC_TRAP_REGNUM
) > 0;
963 ppc_linux_write_pc (struct regcache
*regcache
, CORE_ADDR pc
)
965 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
967 regcache_cooked_write_unsigned (regcache
, gdbarch_pc_regnum (gdbarch
), pc
);
969 /* Set special TRAP register to -1 to prevent the kernel from
970 messing with the PC we just installed, if we happen to be
971 within an interrupted system call that the kernel wants to
974 Note that after we return from the dummy call, the TRAP and
975 ORIG_R3 registers will be automatically restored, and the
976 kernel continues to restart the system call at this point. */
977 if (ppc_linux_trap_reg_p (gdbarch
))
978 regcache_cooked_write_unsigned (regcache
, PPC_TRAP_REGNUM
, -1);
981 static const struct target_desc
*
982 ppc_linux_core_read_description (struct gdbarch
*gdbarch
,
983 struct target_ops
*target
,
986 asection
*altivec
= bfd_get_section_by_name (abfd
, ".reg-ppc-vmx");
987 asection
*vsx
= bfd_get_section_by_name (abfd
, ".reg-ppc-vsx");
988 asection
*section
= bfd_get_section_by_name (abfd
, ".reg");
992 switch (bfd_section_size (abfd
, section
))
996 return tdesc_powerpc_vsx32l
;
998 return tdesc_powerpc_altivec32l
;
1000 return tdesc_powerpc_32l
;
1004 return tdesc_powerpc_vsx64l
;
1006 return tdesc_powerpc_altivec64l
;
1008 return tdesc_powerpc_64l
;
1016 ppc_linux_init_abi (struct gdbarch_info info
,
1017 struct gdbarch
*gdbarch
)
1019 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1020 struct tdesc_arch_data
*tdesc_data
= (void *) info
.tdep_info
;
1022 /* PPC GNU/Linux uses either 64-bit or 128-bit long doubles; where
1023 128-bit, they are IBM long double, not IEEE quad long double as
1024 in the System V ABI PowerPC Processor Supplement. We can safely
1025 let them default to 128-bit, since the debug info will give the
1026 size of type actually used in each case. */
1027 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
1028 set_gdbarch_long_double_format (gdbarch
, floatformats_ibm_long_double
);
1030 /* Handle inferior calls during interrupted system calls. */
1031 set_gdbarch_write_pc (gdbarch
, ppc_linux_write_pc
);
1033 if (tdep
->wordsize
== 4)
1035 /* Until November 2001, gcc did not comply with the 32 bit SysV
1036 R4 ABI requirement that structures less than or equal to 8
1037 bytes should be returned in registers. Instead GCC was using
1038 the the AIX/PowerOpen ABI - everything returned in memory
1039 (well ignoring vectors that is). When this was corrected, it
1040 wasn't fixed for GNU/Linux native platform. Use the
1041 PowerOpen struct convention. */
1042 set_gdbarch_return_value (gdbarch
, ppc_linux_return_value
);
1044 set_gdbarch_memory_remove_breakpoint (gdbarch
,
1045 ppc_linux_memory_remove_breakpoint
);
1047 /* Shared library handling. */
1048 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1049 set_solib_svr4_fetch_link_map_offsets
1050 (gdbarch
, svr4_ilp32_fetch_link_map_offsets
);
1053 tramp_frame_prepend_unwinder (gdbarch
, &ppc32_linux_sigaction_tramp_frame
);
1054 tramp_frame_prepend_unwinder (gdbarch
, &ppc32_linux_sighandler_tramp_frame
);
1057 if (tdep
->wordsize
== 8)
1059 /* Handle PPC GNU/Linux 64-bit function pointers (which are really
1060 function descriptors). */
1061 set_gdbarch_convert_from_func_ptr_addr
1062 (gdbarch
, ppc64_linux_convert_from_func_ptr_addr
);
1064 /* Shared library handling. */
1065 set_gdbarch_skip_trampoline_code (gdbarch
, ppc64_skip_trampoline_code
);
1066 set_solib_svr4_fetch_link_map_offsets
1067 (gdbarch
, svr4_lp64_fetch_link_map_offsets
);
1070 tramp_frame_prepend_unwinder (gdbarch
, &ppc64_linux_sigaction_tramp_frame
);
1071 tramp_frame_prepend_unwinder (gdbarch
, &ppc64_linux_sighandler_tramp_frame
);
1073 set_gdbarch_regset_from_core_section (gdbarch
, ppc_linux_regset_from_core_section
);
1074 set_gdbarch_core_read_description (gdbarch
, ppc_linux_core_read_description
);
1076 /* Supported register sections. */
1077 set_gdbarch_core_regset_sections (gdbarch
, ppc_linux_regset_sections
);
1079 /* Enable TLS support. */
1080 set_gdbarch_fetch_tls_load_module_address (gdbarch
,
1081 svr4_fetch_objfile_link_map
);
1085 const struct tdesc_feature
*feature
;
1087 /* If we have target-described registers, then we can safely
1088 reserve a number for PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM
1089 (whether they are described or not). */
1090 gdb_assert (gdbarch_num_regs (gdbarch
) <= PPC_ORIG_R3_REGNUM
);
1091 set_gdbarch_num_regs (gdbarch
, PPC_TRAP_REGNUM
+ 1);
1093 /* If they are present, then assign them to the reserved number. */
1094 feature
= tdesc_find_feature (info
.target_desc
,
1095 "org.gnu.gdb.power.linux");
1096 if (feature
!= NULL
)
1098 tdesc_numbered_register (feature
, tdesc_data
,
1099 PPC_ORIG_R3_REGNUM
, "orig_r3");
1100 tdesc_numbered_register (feature
, tdesc_data
,
1101 PPC_TRAP_REGNUM
, "trap");
1107 _initialize_ppc_linux_tdep (void)
1109 /* Register for all sub-familes of the POWER/PowerPC: 32-bit and
1110 64-bit PowerPC, and the older rs6k. */
1111 gdbarch_register_osabi (bfd_arch_powerpc
, bfd_mach_ppc
, GDB_OSABI_LINUX
,
1112 ppc_linux_init_abi
);
1113 gdbarch_register_osabi (bfd_arch_powerpc
, bfd_mach_ppc64
, GDB_OSABI_LINUX
,
1114 ppc_linux_init_abi
);
1115 gdbarch_register_osabi (bfd_arch_rs6000
, bfd_mach_rs6k
, GDB_OSABI_LINUX
,
1116 ppc_linux_init_abi
);
1118 /* Initialize the Linux target descriptions. */
1119 initialize_tdesc_powerpc_32l ();
1120 initialize_tdesc_powerpc_altivec32l ();
1121 initialize_tdesc_powerpc_vsx32l ();
1122 initialize_tdesc_powerpc_64l ();
1123 initialize_tdesc_powerpc_altivec64l ();
1124 initialize_tdesc_powerpc_vsx64l ();
1125 initialize_tdesc_powerpc_e500l ();