Stop the linker from complaining about RWX segments in sparc-solaris targets.
[binutils-gdb.git] / gdb / ppc-sysv-tdep.c
1 /* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
4 Copyright (C) 2000-2022 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #include "defs.h"
22 #include "gdbcore.h"
23 #include "inferior.h"
24 #include "regcache.h"
25 #include "value.h"
26 #include "ppc-tdep.h"
27 #include "target.h"
28 #include "objfiles.h"
29 #include "infcall.h"
30 #include "dwarf2.h"
31 #include "target-float.h"
32 #include <algorithm>
33
34
35 /* Check whether FTPYE is a (pointer to) function type that should use
36 the OpenCL vector ABI. */
37
38 static int
39 ppc_sysv_use_opencl_abi (struct type *ftype)
40 {
41 ftype = check_typedef (ftype);
42
43 if (ftype->code () == TYPE_CODE_PTR)
44 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
45
46 return (ftype->code () == TYPE_CODE_FUNC
47 && TYPE_CALLING_CONVENTION (ftype) == DW_CC_GDB_IBM_OpenCL);
48 }
49
50 /* Pass the arguments in either registers, or in the stack. Using the
51 ppc sysv ABI, the first eight words of the argument list (that might
52 be less than eight parameters if some parameters occupy more than one
53 word) are passed in r3..r10 registers. float and double parameters are
54 passed in fpr's, in addition to that. Rest of the parameters if any
55 are passed in user stack.
56
57 If the function is returning a structure, then the return address is passed
58 in r3, then the first 7 words of the parameters can be passed in registers,
59 starting from r4. */
60
61 CORE_ADDR
62 ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
63 struct regcache *regcache, CORE_ADDR bp_addr,
64 int nargs, struct value **args, CORE_ADDR sp,
65 function_call_return_method return_method,
66 CORE_ADDR struct_addr)
67 {
68 ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
69 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
70 int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
71 ULONGEST saved_sp;
72 int argspace = 0; /* 0 is an initial wrong guess. */
73 int write_pass;
74
75 gdb_assert (tdep->wordsize == 4);
76
77 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
78 &saved_sp);
79
80 /* Go through the argument list twice.
81
82 Pass 1: Figure out how much new stack space is required for
83 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
84 ABI doesn't reserve any extra space for parameters which are put
85 in registers, but does always push structures and then pass their
86 address.
87
88 Pass 2: Replay the same computation but this time also write the
89 values out to the target. */
90
91 for (write_pass = 0; write_pass < 2; write_pass++)
92 {
93 int argno;
94 /* Next available floating point register for float and double
95 arguments. */
96 int freg = 1;
97 /* Next available general register for non-float, non-vector
98 arguments. */
99 int greg = 3;
100 /* Next available vector register for vector arguments. */
101 int vreg = 2;
102 /* Arguments start above the "LR save word" and "Back chain". */
103 int argoffset = 2 * tdep->wordsize;
104 /* Structures start after the arguments. */
105 int structoffset = argoffset + argspace;
106
107 /* If the function is returning a `struct', then the first word
108 (which will be passed in r3) is used for struct return
109 address. In that case we should advance one word and start
110 from r4 register to copy parameters. */
111 if (return_method == return_method_struct)
112 {
113 if (write_pass)
114 regcache_cooked_write_signed (regcache,
115 tdep->ppc_gp0_regnum + greg,
116 struct_addr);
117 greg++;
118 }
119
120 for (argno = 0; argno < nargs; argno++)
121 {
122 struct value *arg = args[argno];
123 struct type *type = check_typedef (value_type (arg));
124 int len = TYPE_LENGTH (type);
125 const bfd_byte *val = value_contents (arg).data ();
126
127 if (type->code () == TYPE_CODE_FLT && len <= 8
128 && !tdep->soft_float)
129 {
130 /* Floating point value converted to "double" then
131 passed in an FP register, when the registers run out,
132 8 byte aligned stack is used. */
133 if (freg <= 8)
134 {
135 if (write_pass)
136 {
137 /* Always store the floating point value using
138 the register's floating-point format. */
139 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
140 struct type *regtype
141 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
142 target_float_convert (val, type, regval, regtype);
143 regcache->cooked_write (tdep->ppc_fp0_regnum + freg,
144 regval);
145 }
146 freg++;
147 }
148 else
149 {
150 /* The SysV ABI tells us to convert floats to
151 doubles before writing them to an 8 byte aligned
152 stack location. Unfortunately GCC does not do
153 that, and stores floats into 4 byte aligned
154 locations without converting them to doubles.
155 Since there is no know compiler that actually
156 follows the ABI here, we implement the GCC
157 convention. */
158
159 /* Align to 4 bytes or 8 bytes depending on the type of
160 the argument (float or double). */
161 argoffset = align_up (argoffset, len);
162 if (write_pass)
163 write_memory (sp + argoffset, val, len);
164 argoffset += len;
165 }
166 }
167 else if (type->code () == TYPE_CODE_FLT
168 && len == 16
169 && !tdep->soft_float
170 && (gdbarch_long_double_format (gdbarch)
171 == floatformats_ibm_long_double))
172 {
173 /* IBM long double passed in two FP registers if
174 available, otherwise 8-byte aligned stack. */
175 if (freg <= 7)
176 {
177 if (write_pass)
178 {
179 regcache->cooked_write (tdep->ppc_fp0_regnum + freg, val);
180 regcache->cooked_write (tdep->ppc_fp0_regnum + freg + 1,
181 val + 8);
182 }
183 freg += 2;
184 }
185 else
186 {
187 argoffset = align_up (argoffset, 8);
188 if (write_pass)
189 write_memory (sp + argoffset, val, len);
190 argoffset += 16;
191 }
192 }
193 else if (len == 8
194 && (type->code () == TYPE_CODE_INT /* long long */
195 || type->code () == TYPE_CODE_FLT /* double */
196 || (type->code () == TYPE_CODE_DECFLOAT
197 && tdep->soft_float)))
198 {
199 /* "long long" or soft-float "double" or "_Decimal64"
200 passed in an odd/even register pair with the low
201 addressed word in the odd register and the high
202 addressed word in the even register, or when the
203 registers run out an 8 byte aligned stack
204 location. */
205 if (greg > 9)
206 {
207 /* Just in case GREG was 10. */
208 greg = 11;
209 argoffset = align_up (argoffset, 8);
210 if (write_pass)
211 write_memory (sp + argoffset, val, len);
212 argoffset += 8;
213 }
214 else
215 {
216 /* Must start on an odd register - r3/r4 etc. */
217 if ((greg & 1) == 0)
218 greg++;
219 if (write_pass)
220 {
221 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 0,
222 val + 0);
223 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 1,
224 val + 4);
225 }
226 greg += 2;
227 }
228 }
229 else if (len == 16
230 && ((type->code () == TYPE_CODE_FLT
231 && (gdbarch_long_double_format (gdbarch)
232 == floatformats_ibm_long_double))
233 || (type->code () == TYPE_CODE_DECFLOAT
234 && tdep->soft_float)))
235 {
236 /* Soft-float IBM long double or _Decimal128 passed in
237 four consecutive registers, or on the stack. The
238 registers are not necessarily odd/even pairs. */
239 if (greg > 7)
240 {
241 greg = 11;
242 argoffset = align_up (argoffset, 8);
243 if (write_pass)
244 write_memory (sp + argoffset, val, len);
245 argoffset += 16;
246 }
247 else
248 {
249 if (write_pass)
250 {
251 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 0,
252 val + 0);
253 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 1,
254 val + 4);
255 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 2,
256 val + 8);
257 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 3,
258 val + 12);
259 }
260 greg += 4;
261 }
262 }
263 else if (type->code () == TYPE_CODE_DECFLOAT && len <= 8
264 && !tdep->soft_float)
265 {
266 /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
267 end up in memory. */
268
269 if (freg <= 8)
270 {
271 if (write_pass)
272 {
273 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
274 const gdb_byte *p;
275
276 /* 32-bit decimal floats are right aligned in the
277 doubleword. */
278 if (TYPE_LENGTH (type) == 4)
279 {
280 memcpy (regval + 4, val, 4);
281 p = regval;
282 }
283 else
284 p = val;
285
286 regcache->cooked_write (tdep->ppc_fp0_regnum + freg, p);
287 }
288
289 freg++;
290 }
291 else
292 {
293 argoffset = align_up (argoffset, len);
294
295 if (write_pass)
296 /* Write value in the stack's parameter save area. */
297 write_memory (sp + argoffset, val, len);
298
299 argoffset += len;
300 }
301 }
302 else if (type->code () == TYPE_CODE_DECFLOAT && len == 16
303 && !tdep->soft_float)
304 {
305 /* 128-bit decimal floats go in f2 .. f7, always in even/odd
306 pairs. They can end up in memory, using two doublewords. */
307
308 if (freg <= 6)
309 {
310 /* Make sure freg is even. */
311 freg += freg & 1;
312
313 if (write_pass)
314 {
315 regcache->cooked_write (tdep->ppc_fp0_regnum + freg, val);
316 regcache->cooked_write (tdep->ppc_fp0_regnum + freg + 1,
317 val + 8);
318 }
319 }
320 else
321 {
322 argoffset = align_up (argoffset, 8);
323
324 if (write_pass)
325 write_memory (sp + argoffset, val, 16);
326
327 argoffset += 16;
328 }
329
330 /* If a 128-bit decimal float goes to the stack because only f7
331 and f8 are free (thus there's no even/odd register pair
332 available), these registers should be marked as occupied.
333 Hence we increase freg even when writing to memory. */
334 freg += 2;
335 }
336 else if (len < 16
337 && type->code () == TYPE_CODE_ARRAY
338 && type->is_vector ()
339 && opencl_abi)
340 {
341 /* OpenCL vectors shorter than 16 bytes are passed as if
342 a series of independent scalars. */
343 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
344 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
345
346 for (i = 0; i < nelt; i++)
347 {
348 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
349
350 if (eltype->code () == TYPE_CODE_FLT && !tdep->soft_float)
351 {
352 if (freg <= 8)
353 {
354 if (write_pass)
355 {
356 int regnum = tdep->ppc_fp0_regnum + freg;
357 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
358 struct type *regtype
359 = register_type (gdbarch, regnum);
360 target_float_convert (elval, eltype,
361 regval, regtype);
362 regcache->cooked_write (regnum, regval);
363 }
364 freg++;
365 }
366 else
367 {
368 argoffset = align_up (argoffset, len);
369 if (write_pass)
370 write_memory (sp + argoffset, val, len);
371 argoffset += len;
372 }
373 }
374 else if (TYPE_LENGTH (eltype) == 8)
375 {
376 if (greg > 9)
377 {
378 /* Just in case GREG was 10. */
379 greg = 11;
380 argoffset = align_up (argoffset, 8);
381 if (write_pass)
382 write_memory (sp + argoffset, elval,
383 TYPE_LENGTH (eltype));
384 argoffset += 8;
385 }
386 else
387 {
388 /* Must start on an odd register - r3/r4 etc. */
389 if ((greg & 1) == 0)
390 greg++;
391 if (write_pass)
392 {
393 int regnum = tdep->ppc_gp0_regnum + greg;
394 regcache->cooked_write (regnum + 0, elval + 0);
395 regcache->cooked_write (regnum + 1, elval + 4);
396 }
397 greg += 2;
398 }
399 }
400 else
401 {
402 gdb_byte word[PPC_MAX_REGISTER_SIZE];
403 store_unsigned_integer (word, tdep->wordsize, byte_order,
404 unpack_long (eltype, elval));
405
406 if (greg <= 10)
407 {
408 if (write_pass)
409 regcache->cooked_write (tdep->ppc_gp0_regnum + greg,
410 word);
411 greg++;
412 }
413 else
414 {
415 argoffset = align_up (argoffset, tdep->wordsize);
416 if (write_pass)
417 write_memory (sp + argoffset, word, tdep->wordsize);
418 argoffset += tdep->wordsize;
419 }
420 }
421 }
422 }
423 else if (len >= 16
424 && type->code () == TYPE_CODE_ARRAY
425 && type->is_vector ()
426 && opencl_abi)
427 {
428 /* OpenCL vectors 16 bytes or longer are passed as if
429 a series of AltiVec vectors. */
430 int i;
431
432 for (i = 0; i < len / 16; i++)
433 {
434 const gdb_byte *elval = val + i * 16;
435
436 if (vreg <= 13)
437 {
438 if (write_pass)
439 regcache->cooked_write (tdep->ppc_vr0_regnum + vreg,
440 elval);
441 vreg++;
442 }
443 else
444 {
445 argoffset = align_up (argoffset, 16);
446 if (write_pass)
447 write_memory (sp + argoffset, elval, 16);
448 argoffset += 16;
449 }
450 }
451 }
452 else if (len == 16
453 && ((type->code () == TYPE_CODE_ARRAY
454 && type->is_vector ()
455 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
456 || (type->code () == TYPE_CODE_FLT
457 && (gdbarch_long_double_format (gdbarch)
458 == floatformats_ieee_quad))))
459 {
460 /* Vector parameter passed in an Altivec register, or
461 when that runs out, 16 byte aligned stack location.
462 IEEE FLOAT 128-bit also passes parameters in vector
463 registers. */
464 if (vreg <= 13)
465 {
466 if (write_pass)
467 regcache->cooked_write (tdep->ppc_vr0_regnum + vreg, val);
468 vreg++;
469 }
470 else
471 {
472 argoffset = align_up (argoffset, 16);
473 if (write_pass)
474 write_memory (sp + argoffset, val, 16);
475 argoffset += 16;
476 }
477 }
478 else if (len == 8
479 && type->code () == TYPE_CODE_ARRAY
480 && type->is_vector ()
481 && tdep->vector_abi == POWERPC_VEC_SPE)
482 {
483 /* Vector parameter passed in an e500 register, or when
484 that runs out, 8 byte aligned stack location. Note
485 that since e500 vector and general purpose registers
486 both map onto the same underlying register set, a
487 "greg" and not a "vreg" is consumed here. A cooked
488 write stores the value in the correct locations
489 within the raw register cache. */
490 if (greg <= 10)
491 {
492 if (write_pass)
493 regcache->cooked_write (tdep->ppc_ev0_regnum + greg, val);
494 greg++;
495 }
496 else
497 {
498 argoffset = align_up (argoffset, 8);
499 if (write_pass)
500 write_memory (sp + argoffset, val, 8);
501 argoffset += 8;
502 }
503 }
504 else
505 {
506 /* Reduce the parameter down to something that fits in a
507 "word". */
508 gdb_byte word[PPC_MAX_REGISTER_SIZE];
509 memset (word, 0, PPC_MAX_REGISTER_SIZE);
510 if (len > tdep->wordsize
511 || type->code () == TYPE_CODE_STRUCT
512 || type->code () == TYPE_CODE_UNION)
513 {
514 /* Structs and large values are put in an
515 aligned stack slot ... */
516 if (type->code () == TYPE_CODE_ARRAY
517 && type->is_vector ()
518 && len >= 16)
519 structoffset = align_up (structoffset, 16);
520 else
521 structoffset = align_up (structoffset, 8);
522
523 if (write_pass)
524 write_memory (sp + structoffset, val, len);
525 /* ... and then a "word" pointing to that address is
526 passed as the parameter. */
527 store_unsigned_integer (word, tdep->wordsize, byte_order,
528 sp + structoffset);
529 structoffset += len;
530 }
531 else if (type->code () == TYPE_CODE_INT)
532 /* Sign or zero extend the "int" into a "word". */
533 store_unsigned_integer (word, tdep->wordsize, byte_order,
534 unpack_long (type, val));
535 else
536 /* Always goes in the low address. */
537 memcpy (word, val, len);
538 /* Store that "word" in a register, or on the stack.
539 The words have "4" byte alignment. */
540 if (greg <= 10)
541 {
542 if (write_pass)
543 regcache->cooked_write (tdep->ppc_gp0_regnum + greg, word);
544 greg++;
545 }
546 else
547 {
548 argoffset = align_up (argoffset, tdep->wordsize);
549 if (write_pass)
550 write_memory (sp + argoffset, word, tdep->wordsize);
551 argoffset += tdep->wordsize;
552 }
553 }
554 }
555
556 /* Compute the actual stack space requirements. */
557 if (!write_pass)
558 {
559 /* Remember the amount of space needed by the arguments. */
560 argspace = argoffset;
561 /* Allocate space for both the arguments and the structures. */
562 sp -= (argoffset + structoffset);
563 /* Ensure that the stack is still 16 byte aligned. */
564 sp = align_down (sp, 16);
565 }
566
567 /* The psABI says that "A caller of a function that takes a
568 variable argument list shall set condition register bit 6 to
569 1 if it passes one or more arguments in the floating-point
570 registers. It is strongly recommended that the caller set the
571 bit to 0 otherwise..." Doing this for normal functions too
572 shouldn't hurt. */
573 if (write_pass)
574 {
575 ULONGEST cr;
576
577 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
578 if (freg > 1)
579 cr |= 0x02000000;
580 else
581 cr &= ~0x02000000;
582 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
583 }
584 }
585
586 /* Update %sp. */
587 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
588
589 /* Write the backchain (it occupies WORDSIZED bytes). */
590 write_memory_signed_integer (sp, tdep->wordsize, byte_order, saved_sp);
591
592 /* Point the inferior function call's return address at the dummy's
593 breakpoint. */
594 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
595
596 return sp;
597 }
598
599 /* Handle the return-value conventions for Decimal Floating Point values. */
600 static enum return_value_convention
601 get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype,
602 struct regcache *regcache, gdb_byte *readbuf,
603 const gdb_byte *writebuf)
604 {
605 ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
606
607 gdb_assert (valtype->code () == TYPE_CODE_DECFLOAT);
608
609 /* 32-bit and 64-bit decimal floats in f1. */
610 if (TYPE_LENGTH (valtype) <= 8)
611 {
612 if (writebuf != NULL)
613 {
614 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
615 const gdb_byte *p;
616
617 /* 32-bit decimal float is right aligned in the doubleword. */
618 if (TYPE_LENGTH (valtype) == 4)
619 {
620 memcpy (regval + 4, writebuf, 4);
621 p = regval;
622 }
623 else
624 p = writebuf;
625
626 regcache->cooked_write (tdep->ppc_fp0_regnum + 1, p);
627 }
628 if (readbuf != NULL)
629 {
630 regcache->cooked_read (tdep->ppc_fp0_regnum + 1, readbuf);
631
632 /* Left align 32-bit decimal float. */
633 if (TYPE_LENGTH (valtype) == 4)
634 memcpy (readbuf, readbuf + 4, 4);
635 }
636 }
637 /* 128-bit decimal floats in f2,f3. */
638 else if (TYPE_LENGTH (valtype) == 16)
639 {
640 if (writebuf != NULL || readbuf != NULL)
641 {
642 int i;
643
644 for (i = 0; i < 2; i++)
645 {
646 if (writebuf != NULL)
647 regcache->cooked_write (tdep->ppc_fp0_regnum + 2 + i,
648 writebuf + i * 8);
649 if (readbuf != NULL)
650 regcache->cooked_read (tdep->ppc_fp0_regnum + 2 + i,
651 readbuf + i * 8);
652 }
653 }
654 }
655 else
656 /* Can't happen. */
657 internal_error (__FILE__, __LINE__, _("Unknown decimal float size."));
658
659 return RETURN_VALUE_REGISTER_CONVENTION;
660 }
661
662 /* Handle the return-value conventions specified by the SysV 32-bit
663 PowerPC ABI (including all the supplements):
664
665 no floating-point: floating-point values returned using 32-bit
666 general-purpose registers.
667
668 Altivec: 128-bit vectors returned using vector registers.
669
670 e500: 64-bit vectors returned using the full full 64 bit EV
671 register, floating-point values returned using 32-bit
672 general-purpose registers.
673
674 GCC (broken): Small struct values right (instead of left) aligned
675 when returned in general-purpose registers. */
676
677 static enum return_value_convention
678 do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *func_type,
679 struct type *type, struct regcache *regcache,
680 gdb_byte *readbuf, const gdb_byte *writebuf,
681 int broken_gcc)
682 {
683 ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
684 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
685 int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
686
687 gdb_assert (tdep->wordsize == 4);
688
689 if (type->code () == TYPE_CODE_FLT
690 && TYPE_LENGTH (type) <= 8
691 && !tdep->soft_float)
692 {
693 if (readbuf)
694 {
695 /* Floats and doubles stored in "f1". Convert the value to
696 the required type. */
697 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
698 struct type *regtype = register_type (gdbarch,
699 tdep->ppc_fp0_regnum + 1);
700 regcache->cooked_read (tdep->ppc_fp0_regnum + 1, regval);
701 target_float_convert (regval, regtype, readbuf, type);
702 }
703 if (writebuf)
704 {
705 /* Floats and doubles stored in "f1". Convert the value to
706 the register's "double" type. */
707 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
708 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
709 target_float_convert (writebuf, type, regval, regtype);
710 regcache->cooked_write (tdep->ppc_fp0_regnum + 1, regval);
711 }
712 return RETURN_VALUE_REGISTER_CONVENTION;
713 }
714 if (type->code () == TYPE_CODE_FLT
715 && TYPE_LENGTH (type) == 16
716 && !tdep->soft_float
717 && (gdbarch_long_double_format (gdbarch)
718 == floatformats_ibm_long_double))
719 {
720 /* IBM long double stored in f1 and f2. */
721 if (readbuf)
722 {
723 regcache->cooked_read (tdep->ppc_fp0_regnum + 1, readbuf);
724 regcache->cooked_read (tdep->ppc_fp0_regnum + 2, readbuf + 8);
725 }
726 if (writebuf)
727 {
728 regcache->cooked_write (tdep->ppc_fp0_regnum + 1, writebuf);
729 regcache->cooked_write (tdep->ppc_fp0_regnum + 2, writebuf + 8);
730 }
731 return RETURN_VALUE_REGISTER_CONVENTION;
732 }
733 if (TYPE_LENGTH (type) == 16
734 && ((type->code () == TYPE_CODE_FLT
735 && (gdbarch_long_double_format (gdbarch)
736 == floatformats_ibm_long_double))
737 || (type->code () == TYPE_CODE_DECFLOAT && tdep->soft_float)))
738 {
739 /* Soft-float IBM long double or _Decimal128 stored in r3, r4,
740 r5, r6. */
741 if (readbuf)
742 {
743 regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf);
744 regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
745 regcache->cooked_read (tdep->ppc_gp0_regnum + 5, readbuf + 8);
746 regcache->cooked_read (tdep->ppc_gp0_regnum + 6, readbuf + 12);
747 }
748 if (writebuf)
749 {
750 regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf);
751 regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4);
752 regcache->cooked_write (tdep->ppc_gp0_regnum + 5, writebuf + 8);
753 regcache->cooked_write (tdep->ppc_gp0_regnum + 6, writebuf + 12);
754 }
755 return RETURN_VALUE_REGISTER_CONVENTION;
756 }
757 if ((type->code () == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
758 || (type->code () == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)
759 || (type->code () == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 8
760 && tdep->soft_float))
761 {
762 if (readbuf)
763 {
764 /* A long long, double or _Decimal64 stored in the 32 bit
765 r3/r4. */
766 regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf + 0);
767 regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
768 }
769 if (writebuf)
770 {
771 /* A long long, double or _Decimal64 stored in the 32 bit
772 r3/r4. */
773 regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf + 0);
774 regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4);
775 }
776 return RETURN_VALUE_REGISTER_CONVENTION;
777 }
778 if (type->code () == TYPE_CODE_DECFLOAT && !tdep->soft_float)
779 return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
780 writebuf);
781 else if ((type->code () == TYPE_CODE_INT
782 || type->code () == TYPE_CODE_CHAR
783 || type->code () == TYPE_CODE_BOOL
784 || type->code () == TYPE_CODE_PTR
785 || TYPE_IS_REFERENCE (type)
786 || type->code () == TYPE_CODE_ENUM)
787 && TYPE_LENGTH (type) <= tdep->wordsize)
788 {
789 if (readbuf)
790 {
791 /* Some sort of integer stored in r3. Since TYPE isn't
792 bigger than the register, sign extension isn't a problem
793 - just do everything unsigned. */
794 ULONGEST regval;
795 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
796 &regval);
797 store_unsigned_integer (readbuf, TYPE_LENGTH (type), byte_order,
798 regval);
799 }
800 if (writebuf)
801 {
802 /* Some sort of integer stored in r3. Use unpack_long since
803 that should handle any required sign extension. */
804 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
805 unpack_long (type, writebuf));
806 }
807 return RETURN_VALUE_REGISTER_CONVENTION;
808 }
809 /* OpenCL vectors < 16 bytes are returned as distinct
810 scalars in f1..f2 or r3..r10. */
811 if (type->code () == TYPE_CODE_ARRAY
812 && type->is_vector ()
813 && TYPE_LENGTH (type) < 16
814 && opencl_abi)
815 {
816 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
817 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
818
819 for (i = 0; i < nelt; i++)
820 {
821 int offset = i * TYPE_LENGTH (eltype);
822
823 if (eltype->code () == TYPE_CODE_FLT)
824 {
825 int regnum = tdep->ppc_fp0_regnum + 1 + i;
826 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
827 struct type *regtype = register_type (gdbarch, regnum);
828
829 if (writebuf != NULL)
830 {
831 target_float_convert (writebuf + offset, eltype,
832 regval, regtype);
833 regcache->cooked_write (regnum, regval);
834 }
835 if (readbuf != NULL)
836 {
837 regcache->cooked_read (regnum, regval);
838 target_float_convert (regval, regtype,
839 readbuf + offset, eltype);
840 }
841 }
842 else
843 {
844 int regnum = tdep->ppc_gp0_regnum + 3 + i;
845 ULONGEST regval;
846
847 if (writebuf != NULL)
848 {
849 regval = unpack_long (eltype, writebuf + offset);
850 regcache_cooked_write_unsigned (regcache, regnum, regval);
851 }
852 if (readbuf != NULL)
853 {
854 regcache_cooked_read_unsigned (regcache, regnum, &regval);
855 store_unsigned_integer (readbuf + offset,
856 TYPE_LENGTH (eltype), byte_order,
857 regval);
858 }
859 }
860 }
861
862 return RETURN_VALUE_REGISTER_CONVENTION;
863 }
864 /* OpenCL vectors >= 16 bytes are returned in v2..v9. */
865 if (type->code () == TYPE_CODE_ARRAY
866 && type->is_vector ()
867 && TYPE_LENGTH (type) >= 16
868 && opencl_abi)
869 {
870 int n_regs = TYPE_LENGTH (type) / 16;
871 int i;
872
873 for (i = 0; i < n_regs; i++)
874 {
875 int offset = i * 16;
876 int regnum = tdep->ppc_vr0_regnum + 2 + i;
877
878 if (writebuf != NULL)
879 regcache->cooked_write (regnum, writebuf + offset);
880 if (readbuf != NULL)
881 regcache->cooked_read (regnum, readbuf + offset);
882 }
883
884 return RETURN_VALUE_REGISTER_CONVENTION;
885 }
886 if (TYPE_LENGTH (type) == 16
887 && type->code () == TYPE_CODE_ARRAY
888 && type->is_vector ()
889 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
890 {
891 if (readbuf)
892 {
893 /* Altivec places the return value in "v2". */
894 regcache->cooked_read (tdep->ppc_vr0_regnum + 2, readbuf);
895 }
896 if (writebuf)
897 {
898 /* Altivec places the return value in "v2". */
899 regcache->cooked_write (tdep->ppc_vr0_regnum + 2, writebuf);
900 }
901 return RETURN_VALUE_REGISTER_CONVENTION;
902 }
903 if (TYPE_LENGTH (type) == 16
904 && type->code () == TYPE_CODE_ARRAY
905 && type->is_vector ()
906 && tdep->vector_abi == POWERPC_VEC_GENERIC)
907 {
908 /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
909 GCC without AltiVec returns them in memory, but it warns about
910 ABI risks in that case; we don't try to support it. */
911 if (readbuf)
912 {
913 regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf + 0);
914 regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
915 regcache->cooked_read (tdep->ppc_gp0_regnum + 5, readbuf + 8);
916 regcache->cooked_read (tdep->ppc_gp0_regnum + 6, readbuf + 12);
917 }
918 if (writebuf)
919 {
920 regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf + 0);
921 regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4);
922 regcache->cooked_write (tdep->ppc_gp0_regnum + 5, writebuf + 8);
923 regcache->cooked_write (tdep->ppc_gp0_regnum + 6, writebuf + 12);
924 }
925 return RETURN_VALUE_REGISTER_CONVENTION;
926 }
927 if (TYPE_LENGTH (type) == 8
928 && type->code () == TYPE_CODE_ARRAY
929 && type->is_vector ()
930 && tdep->vector_abi == POWERPC_VEC_SPE)
931 {
932 /* The e500 ABI places return values for the 64-bit DSP types
933 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
934 corresponds to the entire r3 value for e500, whereas GDB's r3
935 only corresponds to the least significant 32-bits. So place
936 the 64-bit DSP type's value in ev3. */
937 if (readbuf)
938 regcache->cooked_read (tdep->ppc_ev0_regnum + 3, readbuf);
939 if (writebuf)
940 regcache->cooked_write (tdep->ppc_ev0_regnum + 3, writebuf);
941 return RETURN_VALUE_REGISTER_CONVENTION;
942 }
943 if (broken_gcc && TYPE_LENGTH (type) <= 8)
944 {
945 /* GCC screwed up for structures or unions whose size is less
946 than or equal to 8 bytes.. Instead of left-aligning, it
947 right-aligns the data into the buffer formed by r3, r4. */
948 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
949 int len = TYPE_LENGTH (type);
950 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
951
952 if (readbuf)
953 {
954 regcache->cooked_read (tdep->ppc_gp0_regnum + 3,
955 regvals + 0 * tdep->wordsize);
956 if (len > tdep->wordsize)
957 regcache->cooked_read (tdep->ppc_gp0_regnum + 4,
958 regvals + 1 * tdep->wordsize);
959 memcpy (readbuf, regvals + offset, len);
960 }
961 if (writebuf)
962 {
963 memset (regvals, 0, sizeof regvals);
964 memcpy (regvals + offset, writebuf, len);
965 regcache->cooked_write (tdep->ppc_gp0_regnum + 3,
966 regvals + 0 * tdep->wordsize);
967 if (len > tdep->wordsize)
968 regcache->cooked_write (tdep->ppc_gp0_regnum + 4,
969 regvals + 1 * tdep->wordsize);
970 }
971
972 return RETURN_VALUE_REGISTER_CONVENTION;
973 }
974 if (TYPE_LENGTH (type) <= 8)
975 {
976 if (readbuf)
977 {
978 /* This matches SVr4 PPC, it does not match GCC. */
979 /* The value is right-padded to 8 bytes and then loaded, as
980 two "words", into r3/r4. */
981 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
982 regcache->cooked_read (tdep->ppc_gp0_regnum + 3,
983 regvals + 0 * tdep->wordsize);
984 if (TYPE_LENGTH (type) > tdep->wordsize)
985 regcache->cooked_read (tdep->ppc_gp0_regnum + 4,
986 regvals + 1 * tdep->wordsize);
987 memcpy (readbuf, regvals, TYPE_LENGTH (type));
988 }
989 if (writebuf)
990 {
991 /* This matches SVr4 PPC, it does not match GCC. */
992 /* The value is padded out to 8 bytes and then loaded, as
993 two "words" into r3/r4. */
994 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
995 memset (regvals, 0, sizeof regvals);
996 memcpy (regvals, writebuf, TYPE_LENGTH (type));
997 regcache->cooked_write (tdep->ppc_gp0_regnum + 3,
998 regvals + 0 * tdep->wordsize);
999 if (TYPE_LENGTH (type) > tdep->wordsize)
1000 regcache->cooked_write (tdep->ppc_gp0_regnum + 4,
1001 regvals + 1 * tdep->wordsize);
1002 }
1003 return RETURN_VALUE_REGISTER_CONVENTION;
1004 }
1005 return RETURN_VALUE_STRUCT_CONVENTION;
1006 }
1007
1008 enum return_value_convention
1009 ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
1010 struct type *valtype, struct regcache *regcache,
1011 gdb_byte *readbuf, const gdb_byte *writebuf)
1012 {
1013 return do_ppc_sysv_return_value (gdbarch,
1014 function ? value_type (function) : NULL,
1015 valtype, regcache, readbuf, writebuf, 0);
1016 }
1017
1018 enum return_value_convention
1019 ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
1020 struct value *function,
1021 struct type *valtype,
1022 struct regcache *regcache,
1023 gdb_byte *readbuf, const gdb_byte *writebuf)
1024 {
1025 return do_ppc_sysv_return_value (gdbarch,
1026 function ? value_type (function) : NULL,
1027 valtype, regcache, readbuf, writebuf, 1);
1028 }
1029
1030 /* The helper function for 64-bit SYSV push_dummy_call. Converts the
1031 function's code address back into the function's descriptor
1032 address.
1033
1034 Find a value for the TOC register. Every symbol should have both
1035 ".FN" and "FN" in the minimal symbol table. "FN" points at the
1036 FN's descriptor, while ".FN" points at the entry point (which
1037 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
1038 FN's descriptor address (while at the same time being careful to
1039 find "FN" in the same object file as ".FN"). */
1040
1041 static int
1042 convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
1043 {
1044 struct obj_section *dot_fn_section;
1045 struct bound_minimal_symbol dot_fn;
1046 struct bound_minimal_symbol fn;
1047
1048 /* Find the minimal symbol that corresponds to CODE_ADDR (should
1049 have a name of the form ".FN"). */
1050 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
1051 if (dot_fn.minsym == NULL || dot_fn.minsym->linkage_name ()[0] != '.')
1052 return 0;
1053 /* Get the section that contains CODE_ADDR. Need this for the
1054 "objfile" that it contains. */
1055 dot_fn_section = find_pc_section (code_addr);
1056 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
1057 return 0;
1058 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
1059 address. Only look for the minimal symbol in ".FN"'s object file
1060 - avoids problems when two object files (i.e., shared libraries)
1061 contain a minimal symbol with the same name. */
1062 fn = lookup_minimal_symbol (dot_fn.minsym->linkage_name () + 1, NULL,
1063 dot_fn_section->objfile);
1064 if (fn.minsym == NULL)
1065 return 0;
1066 /* Found a descriptor. */
1067 (*desc_addr) = fn.value_address ();
1068 return 1;
1069 }
1070
1071 /* Walk down the type tree of TYPE counting consecutive base elements.
1072 If *FIELD_TYPE is NULL, then set it to the first valid floating point
1073 or vector type. If a non-floating point or vector type is found, or
1074 if a floating point or vector type that doesn't match a non-NULL
1075 *FIELD_TYPE is found, then return -1, otherwise return the count in the
1076 sub-tree. */
1077
1078 static LONGEST
1079 ppc64_aggregate_candidate (struct type *type,
1080 struct type **field_type)
1081 {
1082 type = check_typedef (type);
1083
1084 switch (type->code ())
1085 {
1086 case TYPE_CODE_FLT:
1087 case TYPE_CODE_DECFLOAT:
1088 if (!*field_type)
1089 *field_type = type;
1090 if ((*field_type)->code () == type->code ()
1091 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1092 return 1;
1093 break;
1094
1095 case TYPE_CODE_COMPLEX:
1096 type = TYPE_TARGET_TYPE (type);
1097 if (type->code () == TYPE_CODE_FLT
1098 || type->code () == TYPE_CODE_DECFLOAT)
1099 {
1100 if (!*field_type)
1101 *field_type = type;
1102 if ((*field_type)->code () == type->code ()
1103 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1104 return 2;
1105 }
1106 break;
1107
1108 case TYPE_CODE_ARRAY:
1109 if (type->is_vector ())
1110 {
1111 if (!*field_type)
1112 *field_type = type;
1113 if ((*field_type)->code () == type->code ()
1114 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1115 return 1;
1116 }
1117 else
1118 {
1119 LONGEST count, low_bound, high_bound;
1120
1121 count = ppc64_aggregate_candidate
1122 (TYPE_TARGET_TYPE (type), field_type);
1123 if (count == -1)
1124 return -1;
1125
1126 if (!get_array_bounds (type, &low_bound, &high_bound))
1127 return -1;
1128 count *= high_bound - low_bound;
1129
1130 /* There must be no padding. */
1131 if (count == 0)
1132 return TYPE_LENGTH (type) == 0 ? 0 : -1;
1133 else if (TYPE_LENGTH (type) != count * TYPE_LENGTH (*field_type))
1134 return -1;
1135
1136 return count;
1137 }
1138 break;
1139
1140 case TYPE_CODE_STRUCT:
1141 case TYPE_CODE_UNION:
1142 {
1143 LONGEST count = 0;
1144 int i;
1145
1146 for (i = 0; i < type->num_fields (); i++)
1147 {
1148 LONGEST sub_count;
1149
1150 if (field_is_static (&type->field (i)))
1151 continue;
1152
1153 sub_count = ppc64_aggregate_candidate
1154 (type->field (i).type (), field_type);
1155 if (sub_count == -1)
1156 return -1;
1157
1158 if (type->code () == TYPE_CODE_STRUCT)
1159 count += sub_count;
1160 else
1161 count = std::max (count, sub_count);
1162 }
1163
1164 /* There must be no padding. */
1165 if (count == 0)
1166 return TYPE_LENGTH (type) == 0 ? 0 : -1;
1167 else if (TYPE_LENGTH (type) != count * TYPE_LENGTH (*field_type))
1168 return -1;
1169
1170 return count;
1171 }
1172 break;
1173
1174 default:
1175 break;
1176 }
1177
1178 return -1;
1179 }
1180
1181 /* If an argument of type TYPE is a homogeneous float or vector aggregate
1182 that shall be passed in FP/vector registers according to the ELFv2 ABI,
1183 return the homogeneous element type in *ELT_TYPE and the number of
1184 elements in *N_ELTS, and return non-zero. Otherwise, return zero. */
1185
1186 static int
1187 ppc64_elfv2_abi_homogeneous_aggregate (struct type *type,
1188 struct type **elt_type, int *n_elts,
1189 struct gdbarch *gdbarch)
1190 {
1191 /* Complex types at the top level are treated separately. However,
1192 complex types can be elements of homogeneous aggregates. */
1193 if (type->code () == TYPE_CODE_STRUCT
1194 || type->code () == TYPE_CODE_UNION
1195 || (type->code () == TYPE_CODE_ARRAY && !type->is_vector ()))
1196 {
1197 struct type *field_type = NULL;
1198 LONGEST field_count = ppc64_aggregate_candidate (type, &field_type);
1199
1200 if (field_count > 0)
1201 {
1202 int n_regs;
1203
1204 if (field_type->code () == TYPE_CODE_FLT
1205 && (gdbarch_long_double_format (gdbarch)
1206 == floatformats_ieee_quad))
1207 /* IEEE Float 128-bit uses one vector register. */
1208 n_regs = 1;
1209
1210 else if (field_type->code () == TYPE_CODE_FLT
1211 || field_type->code () == TYPE_CODE_DECFLOAT)
1212 n_regs = (TYPE_LENGTH (field_type) + 7) >> 3;
1213
1214 else
1215 n_regs = 1;
1216
1217 /* The ELFv2 ABI allows homogeneous aggregates to occupy
1218 up to 8 registers. */
1219 if (field_count * n_regs <= 8)
1220 {
1221 if (elt_type)
1222 *elt_type = field_type;
1223 if (n_elts)
1224 *n_elts = (int) field_count;
1225 /* Note that field_count is LONGEST since it may hold the size
1226 of an array, while *n_elts is int since its value is bounded
1227 by the number of registers used for argument passing. The
1228 cast cannot overflow due to the bounds checking above. */
1229 return 1;
1230 }
1231 }
1232 }
1233
1234 return 0;
1235 }
1236
1237 /* Structure holding the next argument position. */
1238 struct ppc64_sysv_argpos
1239 {
1240 /* Register cache holding argument registers. If this is NULL,
1241 we only simulate argument processing without actually updating
1242 any registers or memory. */
1243 struct regcache *regcache;
1244 /* Next available general-purpose argument register. */
1245 int greg;
1246 /* Next available floating-point argument register. */
1247 int freg;
1248 /* Next available vector argument register. */
1249 int vreg;
1250 /* The address, at which the next general purpose parameter
1251 (integer, struct, float, vector, ...) should be saved. */
1252 CORE_ADDR gparam;
1253 /* The address, at which the next by-reference parameter
1254 (non-Altivec vector, variably-sized type) should be saved. */
1255 CORE_ADDR refparam;
1256 };
1257
1258 /* VAL is a value of length LEN. Store it into the argument area on the
1259 stack and load it into the corresponding general-purpose registers
1260 required by the ABI, and update ARGPOS.
1261
1262 If ALIGN is nonzero, it specifies the minimum alignment required
1263 for the on-stack copy of the argument. */
1264
1265 static void
1266 ppc64_sysv_abi_push_val (struct gdbarch *gdbarch,
1267 const bfd_byte *val, int len, int align,
1268 struct ppc64_sysv_argpos *argpos)
1269 {
1270 ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
1271 int offset = 0;
1272
1273 /* Enforce alignment of stack location, if requested. */
1274 if (align > tdep->wordsize)
1275 {
1276 CORE_ADDR aligned_gparam = align_up (argpos->gparam, align);
1277
1278 argpos->greg += (aligned_gparam - argpos->gparam) / tdep->wordsize;
1279 argpos->gparam = aligned_gparam;
1280 }
1281
1282 /* The ABI (version 1.9) specifies that values smaller than one
1283 doubleword are right-aligned and those larger are left-aligned.
1284 GCC versions before 3.4 implemented this incorrectly; see
1285 <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */
1286 if (len < tdep->wordsize
1287 && gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1288 offset = tdep->wordsize - len;
1289
1290 if (argpos->regcache)
1291 write_memory (argpos->gparam + offset, val, len);
1292 argpos->gparam = align_up (argpos->gparam + len, tdep->wordsize);
1293
1294 while (len >= tdep->wordsize)
1295 {
1296 if (argpos->regcache && argpos->greg <= 10)
1297 argpos->regcache->cooked_write (tdep->ppc_gp0_regnum + argpos->greg,
1298 val);
1299 argpos->greg++;
1300 len -= tdep->wordsize;
1301 val += tdep->wordsize;
1302 }
1303
1304 if (len > 0)
1305 {
1306 if (argpos->regcache && argpos->greg <= 10)
1307 argpos->regcache->cooked_write_part
1308 (tdep->ppc_gp0_regnum + argpos->greg, offset, len, val);
1309 argpos->greg++;
1310 }
1311 }
1312
1313 /* The same as ppc64_sysv_abi_push_val, but using a single-word integer
1314 value VAL as argument. */
1315
1316 static void
1317 ppc64_sysv_abi_push_integer (struct gdbarch *gdbarch, ULONGEST val,
1318 struct ppc64_sysv_argpos *argpos)
1319 {
1320 ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
1321 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1322 gdb_byte buf[PPC_MAX_REGISTER_SIZE];
1323
1324 if (argpos->regcache)
1325 store_unsigned_integer (buf, tdep->wordsize, byte_order, val);
1326 ppc64_sysv_abi_push_val (gdbarch, buf, tdep->wordsize, 0, argpos);
1327 }
1328
1329 /* VAL is a value of TYPE, a (binary or decimal) floating-point type.
1330 Load it into a floating-point register if required by the ABI,
1331 and update ARGPOS. */
1332
1333 static void
1334 ppc64_sysv_abi_push_freg (struct gdbarch *gdbarch,
1335 struct type *type, const bfd_byte *val,
1336 struct ppc64_sysv_argpos *argpos)
1337 {
1338 ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
1339 if (tdep->soft_float)
1340 return;
1341
1342 if (TYPE_LENGTH (type) <= 8
1343 && type->code () == TYPE_CODE_FLT)
1344 {
1345 /* Floats and doubles go in f1 .. f13. 32-bit floats are converted
1346 to double first. */
1347 if (argpos->regcache && argpos->freg <= 13)
1348 {
1349 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1350 struct type *regtype = register_type (gdbarch, regnum);
1351 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
1352
1353 target_float_convert (val, type, regval, regtype);
1354 argpos->regcache->cooked_write (regnum, regval);
1355 }
1356
1357 argpos->freg++;
1358 }
1359 else if (TYPE_LENGTH (type) <= 8
1360 && type->code () == TYPE_CODE_DECFLOAT)
1361 {
1362 /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are
1363 placed in the least significant word. */
1364 if (argpos->regcache && argpos->freg <= 13)
1365 {
1366 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1367 int offset = 0;
1368
1369 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1370 offset = 8 - TYPE_LENGTH (type);
1371
1372 argpos->regcache->cooked_write_part (regnum, offset,
1373 TYPE_LENGTH (type), val);
1374 }
1375
1376 argpos->freg++;
1377 }
1378 else if (TYPE_LENGTH (type) == 16
1379 && type->code () == TYPE_CODE_FLT
1380 && (gdbarch_long_double_format (gdbarch)
1381 == floatformats_ibm_long_double))
1382 {
1383 /* IBM long double stored in two consecutive FPRs. */
1384 if (argpos->regcache && argpos->freg <= 13)
1385 {
1386 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1387
1388 argpos->regcache->cooked_write (regnum, val);
1389 if (argpos->freg <= 12)
1390 argpos->regcache->cooked_write (regnum + 1, val + 8);
1391 }
1392
1393 argpos->freg += 2;
1394 }
1395 else if (TYPE_LENGTH (type) == 16
1396 && type->code () == TYPE_CODE_DECFLOAT)
1397 {
1398 /* 128-bit decimal floating-point values are stored in and even/odd
1399 pair of FPRs, with the even FPR holding the most significant half. */
1400 argpos->freg += argpos->freg & 1;
1401
1402 if (argpos->regcache && argpos->freg <= 12)
1403 {
1404 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1405 int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0;
1406 int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8;
1407
1408 argpos->regcache->cooked_write (regnum, val + hipart);
1409 argpos->regcache->cooked_write (regnum + 1, val + lopart);
1410 }
1411
1412 argpos->freg += 2;
1413 }
1414 }
1415
1416 /* VAL is a value of AltiVec vector type. Load it into a vector register
1417 if required by the ABI, and update ARGPOS. */
1418
1419 static void
1420 ppc64_sysv_abi_push_vreg (struct gdbarch *gdbarch, const bfd_byte *val,
1421 struct ppc64_sysv_argpos *argpos)
1422 {
1423 ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
1424
1425 if (argpos->regcache && argpos->vreg <= 13)
1426 argpos->regcache->cooked_write (tdep->ppc_vr0_regnum + argpos->vreg, val);
1427
1428 argpos->vreg++;
1429 }
1430
1431 /* VAL is a value of TYPE. Load it into memory and/or registers
1432 as required by the ABI, and update ARGPOS. */
1433
1434 static void
1435 ppc64_sysv_abi_push_param (struct gdbarch *gdbarch,
1436 struct type *type, const bfd_byte *val,
1437 struct ppc64_sysv_argpos *argpos)
1438 {
1439 ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
1440
1441 if (type->code () == TYPE_CODE_FLT
1442 && TYPE_LENGTH (type) == 16
1443 && (gdbarch_long_double_format (gdbarch)
1444 == floatformats_ieee_quad))
1445 {
1446 /* IEEE FLOAT128, args in vector registers. */
1447 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
1448 ppc64_sysv_abi_push_vreg (gdbarch, val, argpos);
1449 }
1450 else if (type->code () == TYPE_CODE_FLT
1451 || type->code () == TYPE_CODE_DECFLOAT)
1452 {
1453 /* Floating-point scalars are passed in floating-point registers. */
1454 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
1455 ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos);
1456 }
1457 else if (type->code () == TYPE_CODE_ARRAY && type->is_vector ()
1458 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
1459 && TYPE_LENGTH (type) == 16)
1460 {
1461 /* AltiVec vectors are passed aligned, and in vector registers. */
1462 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 16, argpos);
1463 ppc64_sysv_abi_push_vreg (gdbarch, val, argpos);
1464 }
1465 else if (type->code () == TYPE_CODE_ARRAY && type->is_vector ()
1466 && TYPE_LENGTH (type) >= 16)
1467 {
1468 /* Non-Altivec vectors are passed by reference. */
1469
1470 /* Copy value onto the stack ... */
1471 CORE_ADDR addr = align_up (argpos->refparam, 16);
1472 if (argpos->regcache)
1473 write_memory (addr, val, TYPE_LENGTH (type));
1474 argpos->refparam = align_up (addr + TYPE_LENGTH (type), tdep->wordsize);
1475
1476 /* ... and pass a pointer to the copy as parameter. */
1477 ppc64_sysv_abi_push_integer (gdbarch, addr, argpos);
1478 }
1479 else if ((type->code () == TYPE_CODE_INT
1480 || type->code () == TYPE_CODE_ENUM
1481 || type->code () == TYPE_CODE_BOOL
1482 || type->code () == TYPE_CODE_CHAR
1483 || type->code () == TYPE_CODE_PTR
1484 || TYPE_IS_REFERENCE (type))
1485 && TYPE_LENGTH (type) <= tdep->wordsize)
1486 {
1487 ULONGEST word = 0;
1488
1489 if (argpos->regcache)
1490 {
1491 /* Sign extend the value, then store it unsigned. */
1492 word = unpack_long (type, val);
1493
1494 /* Convert any function code addresses into descriptors. */
1495 if (tdep->elf_abi == POWERPC_ELF_V1
1496 && (type->code () == TYPE_CODE_PTR
1497 || type->code () == TYPE_CODE_REF))
1498 {
1499 struct type *target_type
1500 = check_typedef (TYPE_TARGET_TYPE (type));
1501
1502 if (target_type->code () == TYPE_CODE_FUNC
1503 || target_type->code () == TYPE_CODE_METHOD)
1504 {
1505 CORE_ADDR desc = word;
1506
1507 convert_code_addr_to_desc_addr (word, &desc);
1508 word = desc;
1509 }
1510 }
1511 }
1512
1513 ppc64_sysv_abi_push_integer (gdbarch, word, argpos);
1514 }
1515 else
1516 {
1517 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
1518
1519 /* The ABI (version 1.9) specifies that structs containing a
1520 single floating-point value, at any level of nesting of
1521 single-member structs, are passed in floating-point registers. */
1522 if (type->code () == TYPE_CODE_STRUCT
1523 && type->num_fields () == 1 && tdep->elf_abi == POWERPC_ELF_V1)
1524 {
1525 while (type->code () == TYPE_CODE_STRUCT
1526 && type->num_fields () == 1)
1527 type = check_typedef (type->field (0).type ());
1528
1529 if (type->code () == TYPE_CODE_FLT) {
1530 /* Handle the case of 128-bit floats for both IEEE and IBM long double
1531 formats. */
1532 if (TYPE_LENGTH (type) == 16
1533 && (gdbarch_long_double_format (gdbarch)
1534 == floatformats_ieee_quad))
1535 ppc64_sysv_abi_push_vreg (gdbarch, val, argpos);
1536 else
1537 ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos);
1538 }
1539 }
1540
1541 /* In the ELFv2 ABI, homogeneous floating-point or vector
1542 aggregates are passed in a series of registers. */
1543 if (tdep->elf_abi == POWERPC_ELF_V2)
1544 {
1545 struct type *eltype;
1546 int i, nelt;
1547
1548 if (ppc64_elfv2_abi_homogeneous_aggregate (type, &eltype, &nelt,
1549 gdbarch))
1550 for (i = 0; i < nelt; i++)
1551 {
1552 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
1553
1554 if (eltype->code () == TYPE_CODE_FLT
1555 && TYPE_LENGTH (eltype) == 16
1556 && (gdbarch_long_double_format (gdbarch)
1557 == floatformats_ieee_quad))
1558 /* IEEE FLOAT128, args in vector registers. */
1559 ppc64_sysv_abi_push_vreg (gdbarch, elval, argpos);
1560
1561 else if (eltype->code () == TYPE_CODE_FLT
1562 || eltype->code () == TYPE_CODE_DECFLOAT)
1563 /* IBM long double and all other floats and decfloats, args
1564 are in a pair of floating point registers. */
1565 ppc64_sysv_abi_push_freg (gdbarch, eltype, elval, argpos);
1566 else if (eltype->code () == TYPE_CODE_ARRAY
1567 && eltype->is_vector ()
1568 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
1569 && TYPE_LENGTH (eltype) == 16)
1570 ppc64_sysv_abi_push_vreg (gdbarch, elval, argpos);
1571 }
1572 }
1573 }
1574 }
1575
1576 /* Pass the arguments in either registers, or in the stack. Using the
1577 ppc 64 bit SysV ABI.
1578
1579 This implements a dumbed down version of the ABI. It always writes
1580 values to memory, GPR and FPR, even when not necessary. Doing this
1581 greatly simplifies the logic. */
1582
1583 CORE_ADDR
1584 ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
1585 struct value *function,
1586 struct regcache *regcache, CORE_ADDR bp_addr,
1587 int nargs, struct value **args, CORE_ADDR sp,
1588 function_call_return_method return_method,
1589 CORE_ADDR struct_addr)
1590 {
1591 CORE_ADDR func_addr = find_function_addr (function, NULL);
1592 ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
1593 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1594 int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
1595 ULONGEST back_chain;
1596 /* See for-loop comment below. */
1597 int write_pass;
1598 /* Size of the by-reference parameter copy region, the final value is
1599 computed in the for-loop below. */
1600 LONGEST refparam_size = 0;
1601 /* Size of the general parameter region, the final value is computed
1602 in the for-loop below. */
1603 LONGEST gparam_size = 0;
1604 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
1605 calls to align_up(), align_down(), etc. because this makes it
1606 easier to reuse this code (in a copy/paste sense) in the future,
1607 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
1608 at some point makes it easier to verify that this function is
1609 correct without having to do a non-local analysis to figure out
1610 the possible values of tdep->wordsize. */
1611 gdb_assert (tdep->wordsize == 8);
1612
1613 /* This function exists to support a calling convention that
1614 requires floating-point registers. It shouldn't be used on
1615 processors that lack them. */
1616 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1617
1618 /* By this stage in the proceedings, SP has been decremented by "red
1619 zone size" + "struct return size". Fetch the stack-pointer from
1620 before this and use that as the BACK_CHAIN. */
1621 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
1622 &back_chain);
1623
1624 /* Go through the argument list twice.
1625
1626 Pass 1: Compute the function call's stack space and register
1627 requirements.
1628
1629 Pass 2: Replay the same computation but this time also write the
1630 values out to the target. */
1631
1632 for (write_pass = 0; write_pass < 2; write_pass++)
1633 {
1634 int argno;
1635
1636 struct ppc64_sysv_argpos argpos;
1637 argpos.greg = 3;
1638 argpos.freg = 1;
1639 argpos.vreg = 2;
1640
1641 if (!write_pass)
1642 {
1643 /* During the first pass, GPARAM and REFPARAM are more like
1644 offsets (start address zero) than addresses. That way
1645 they accumulate the total stack space each region
1646 requires. */
1647 argpos.regcache = NULL;
1648 argpos.gparam = 0;
1649 argpos.refparam = 0;
1650 }
1651 else
1652 {
1653 /* Decrement the stack pointer making space for the Altivec
1654 and general on-stack parameters. Set refparam and gparam
1655 to their corresponding regions. */
1656 argpos.regcache = regcache;
1657 argpos.refparam = align_down (sp - refparam_size, 16);
1658 argpos.gparam = align_down (argpos.refparam - gparam_size, 16);
1659 /* Add in space for the TOC, link editor double word (v1 only),
1660 compiler double word (v1 only), LR save area, CR save area,
1661 and backchain. */
1662 if (tdep->elf_abi == POWERPC_ELF_V1)
1663 sp = align_down (argpos.gparam - 48, 16);
1664 else
1665 sp = align_down (argpos.gparam - 32, 16);
1666 }
1667
1668 /* If the function is returning a `struct', then there is an
1669 extra hidden parameter (which will be passed in r3)
1670 containing the address of that struct.. In that case we
1671 should advance one word and start from r4 register to copy
1672 parameters. This also consumes one on-stack parameter slot. */
1673 if (return_method == return_method_struct)
1674 ppc64_sysv_abi_push_integer (gdbarch, struct_addr, &argpos);
1675
1676 for (argno = 0; argno < nargs; argno++)
1677 {
1678 struct value *arg = args[argno];
1679 struct type *type = check_typedef (value_type (arg));
1680 const bfd_byte *val = value_contents (arg).data ();
1681
1682 if (type->code () == TYPE_CODE_COMPLEX)
1683 {
1684 /* Complex types are passed as if two independent scalars. */
1685 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
1686
1687 ppc64_sysv_abi_push_param (gdbarch, eltype, val, &argpos);
1688 ppc64_sysv_abi_push_param (gdbarch, eltype,
1689 val + TYPE_LENGTH (eltype), &argpos);
1690 }
1691 else if (type->code () == TYPE_CODE_ARRAY && type->is_vector ()
1692 && opencl_abi)
1693 {
1694 /* OpenCL vectors shorter than 16 bytes are passed as if
1695 a series of independent scalars; OpenCL vectors 16 bytes
1696 or longer are passed as if a series of AltiVec vectors. */
1697 struct type *eltype;
1698 int i, nelt;
1699
1700 if (TYPE_LENGTH (type) < 16)
1701 eltype = check_typedef (TYPE_TARGET_TYPE (type));
1702 else
1703 eltype = register_type (gdbarch, tdep->ppc_vr0_regnum);
1704
1705 nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
1706 for (i = 0; i < nelt; i++)
1707 {
1708 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
1709
1710 ppc64_sysv_abi_push_param (gdbarch, eltype, elval, &argpos);
1711 }
1712 }
1713 else
1714 {
1715 /* All other types are passed as single arguments. */
1716 ppc64_sysv_abi_push_param (gdbarch, type, val, &argpos);
1717 }
1718 }
1719
1720 if (!write_pass)
1721 {
1722 /* Save the true region sizes ready for the second pass. */
1723 refparam_size = argpos.refparam;
1724 /* Make certain that the general parameter save area is at
1725 least the minimum 8 registers (or doublewords) in size. */
1726 if (argpos.greg < 8)
1727 gparam_size = 8 * tdep->wordsize;
1728 else
1729 gparam_size = argpos.gparam;
1730 }
1731 }
1732
1733 /* Update %sp. */
1734 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
1735
1736 /* Write the backchain (it occupies WORDSIZED bytes). */
1737 write_memory_signed_integer (sp, tdep->wordsize, byte_order, back_chain);
1738
1739 /* Point the inferior function call's return address at the dummy's
1740 breakpoint. */
1741 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
1742
1743 /* In the ELFv1 ABI, use the func_addr to find the descriptor, and use
1744 that to find the TOC. If we're calling via a function pointer,
1745 the pointer itself identifies the descriptor. */
1746 if (tdep->elf_abi == POWERPC_ELF_V1)
1747 {
1748 struct type *ftype = check_typedef (value_type (function));
1749 CORE_ADDR desc_addr = value_as_address (function);
1750
1751 if (ftype->code () == TYPE_CODE_PTR
1752 || convert_code_addr_to_desc_addr (func_addr, &desc_addr))
1753 {
1754 /* The TOC is the second double word in the descriptor. */
1755 CORE_ADDR toc =
1756 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
1757 tdep->wordsize, byte_order);
1758
1759 regcache_cooked_write_unsigned (regcache,
1760 tdep->ppc_gp0_regnum + 2, toc);
1761 }
1762 }
1763
1764 /* In the ELFv2 ABI, we need to pass the target address in r12 since
1765 we may be calling a global entry point. */
1766 if (tdep->elf_abi == POWERPC_ELF_V2)
1767 regcache_cooked_write_unsigned (regcache,
1768 tdep->ppc_gp0_regnum + 12, func_addr);
1769
1770 return sp;
1771 }
1772
1773 /* Subroutine of ppc64_sysv_abi_return_value that handles "base" types:
1774 integer, floating-point, and AltiVec vector types.
1775
1776 This routine also handles components of aggregate return types;
1777 INDEX describes which part of the aggregate is to be handled.
1778
1779 Returns true if VALTYPE is some such base type that could be handled,
1780 false otherwise. */
1781 static int
1782 ppc64_sysv_abi_return_value_base (struct gdbarch *gdbarch, struct type *valtype,
1783 struct regcache *regcache, gdb_byte *readbuf,
1784 const gdb_byte *writebuf, int index)
1785 {
1786 ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
1787
1788 /* Integers live in GPRs starting at r3. */
1789 if ((valtype->code () == TYPE_CODE_INT
1790 || valtype->code () == TYPE_CODE_ENUM
1791 || valtype->code () == TYPE_CODE_CHAR
1792 || valtype->code () == TYPE_CODE_BOOL
1793 || valtype->code () == TYPE_CODE_RANGE
1794 || is_fixed_point_type (valtype))
1795 && TYPE_LENGTH (valtype) <= 8)
1796 {
1797 int regnum = tdep->ppc_gp0_regnum + 3 + index;
1798
1799 if (writebuf != NULL)
1800 {
1801 LONGEST return_val;
1802
1803 if (is_fixed_point_type (valtype))
1804 {
1805 /* Fixed point type values need to be returned unscaled. */
1806 gdb_mpz unscaled;
1807
1808 unscaled.read (gdb::make_array_view (writebuf,
1809 TYPE_LENGTH (valtype)),
1810 type_byte_order (valtype),
1811 valtype->is_unsigned ());
1812 return_val = unscaled.as_integer<LONGEST> ();
1813 }
1814 else
1815 return_val = unpack_long (valtype, writebuf);
1816
1817 /* Be careful to sign extend the value. */
1818 regcache_cooked_write_unsigned (regcache, regnum, return_val);
1819 }
1820 if (readbuf != NULL)
1821 {
1822 /* Extract the integer from GPR. Since this is truncating the
1823 value, there isn't a sign extension problem. */
1824 ULONGEST regval;
1825
1826 regcache_cooked_read_unsigned (regcache, regnum, &regval);
1827 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype),
1828 gdbarch_byte_order (gdbarch), regval);
1829 }
1830 return 1;
1831 }
1832
1833 /* Floats and doubles go in f1 .. f13. 32-bit floats are converted
1834 to double first. */
1835 if (TYPE_LENGTH (valtype) <= 8
1836 && valtype->code () == TYPE_CODE_FLT)
1837 {
1838 int regnum = tdep->ppc_fp0_regnum + 1 + index;
1839 struct type *regtype = register_type (gdbarch, regnum);
1840 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
1841
1842 if (writebuf != NULL)
1843 {
1844 target_float_convert (writebuf, valtype, regval, regtype);
1845 regcache->cooked_write (regnum, regval);
1846 }
1847 if (readbuf != NULL)
1848 {
1849 regcache->cooked_read (regnum, regval);
1850 target_float_convert (regval, regtype, readbuf, valtype);
1851 }
1852 return 1;
1853 }
1854
1855 /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are
1856 placed in the least significant word. */
1857 if (TYPE_LENGTH (valtype) <= 8
1858 && valtype->code () == TYPE_CODE_DECFLOAT)
1859 {
1860 int regnum = tdep->ppc_fp0_regnum + 1 + index;
1861 int offset = 0;
1862
1863 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1864 offset = 8 - TYPE_LENGTH (valtype);
1865
1866 if (writebuf != NULL)
1867 regcache->cooked_write_part (regnum, offset, TYPE_LENGTH (valtype),
1868 writebuf);
1869 if (readbuf != NULL)
1870 regcache->cooked_read_part (regnum, offset, TYPE_LENGTH (valtype),
1871 readbuf);
1872 return 1;
1873 }
1874
1875 /* IBM long double stored in two consecutive FPRs. */
1876 if (TYPE_LENGTH (valtype) == 16
1877 && valtype->code () == TYPE_CODE_FLT
1878 && (gdbarch_long_double_format (gdbarch)
1879 == floatformats_ibm_long_double))
1880 {
1881 int regnum = tdep->ppc_fp0_regnum + 1 + 2 * index;
1882
1883 if (writebuf != NULL)
1884 {
1885 regcache->cooked_write (regnum, writebuf);
1886 regcache->cooked_write (regnum + 1, writebuf + 8);
1887 }
1888 if (readbuf != NULL)
1889 {
1890 regcache->cooked_read (regnum, readbuf);
1891 regcache->cooked_read (regnum + 1, readbuf + 8);
1892 }
1893 return 1;
1894 }
1895
1896 /* 128-bit decimal floating-point values are stored in an even/odd
1897 pair of FPRs, with the even FPR holding the most significant half. */
1898 if (TYPE_LENGTH (valtype) == 16
1899 && valtype->code () == TYPE_CODE_DECFLOAT)
1900 {
1901 int regnum = tdep->ppc_fp0_regnum + 2 + 2 * index;
1902 int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0;
1903 int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8;
1904
1905 if (writebuf != NULL)
1906 {
1907 regcache->cooked_write (regnum, writebuf + hipart);
1908 regcache->cooked_write (regnum + 1, writebuf + lopart);
1909 }
1910 if (readbuf != NULL)
1911 {
1912 regcache->cooked_read (regnum, readbuf + hipart);
1913 regcache->cooked_read (regnum + 1, readbuf + lopart);
1914 }
1915 return 1;
1916 }
1917
1918 /* AltiVec vectors are returned in VRs starting at v2.
1919 IEEE FLOAT 128-bit are stored in vector register. */
1920
1921 if (TYPE_LENGTH (valtype) == 16
1922 && ((valtype->code () == TYPE_CODE_ARRAY
1923 && valtype->is_vector ()
1924 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
1925 || (valtype->code () == TYPE_CODE_FLT
1926 && (gdbarch_long_double_format (gdbarch)
1927 == floatformats_ieee_quad))))
1928 {
1929 int regnum = tdep->ppc_vr0_regnum + 2 + index;
1930
1931 if (writebuf != NULL)
1932 regcache->cooked_write (regnum, writebuf);
1933 if (readbuf != NULL)
1934 regcache->cooked_read (regnum, readbuf);
1935 return 1;
1936 }
1937
1938 /* Short vectors are returned in GPRs starting at r3. */
1939 if (TYPE_LENGTH (valtype) <= 8
1940 && valtype->code () == TYPE_CODE_ARRAY && valtype->is_vector ())
1941 {
1942 int regnum = tdep->ppc_gp0_regnum + 3 + index;
1943 int offset = 0;
1944
1945 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1946 offset = 8 - TYPE_LENGTH (valtype);
1947
1948 if (writebuf != NULL)
1949 regcache->cooked_write_part (regnum, offset, TYPE_LENGTH (valtype),
1950 writebuf);
1951 if (readbuf != NULL)
1952 regcache->cooked_read_part (regnum, offset, TYPE_LENGTH (valtype),
1953 readbuf);
1954 return 1;
1955 }
1956
1957 return 0;
1958 }
1959
1960 /* The 64 bit ABI return value convention.
1961
1962 Return non-zero if the return-value is stored in a register, return
1963 0 if the return-value is instead stored on the stack (a.k.a.,
1964 struct return convention).
1965
1966 For a return-value stored in a register: when WRITEBUF is non-NULL,
1967 copy the buffer to the corresponding register return-value location
1968 location; when READBUF is non-NULL, fill the buffer from the
1969 corresponding register return-value location. */
1970 enum return_value_convention
1971 ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
1972 struct type *valtype, struct regcache *regcache,
1973 gdb_byte *readbuf, const gdb_byte *writebuf)
1974 {
1975 ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
1976 struct type *func_type = function ? value_type (function) : NULL;
1977 int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
1978 struct type *eltype;
1979 int nelt, ok;
1980
1981 /* This function exists to support a calling convention that
1982 requires floating-point registers. It shouldn't be used on
1983 processors that lack them. */
1984 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1985
1986 /* Complex types are returned as if two independent scalars. */
1987 if (valtype->code () == TYPE_CODE_COMPLEX)
1988 {
1989 eltype = check_typedef (TYPE_TARGET_TYPE (valtype));
1990
1991 for (int i = 0; i < 2; i++)
1992 {
1993 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
1994 readbuf, writebuf, i);
1995 gdb_assert (ok);
1996
1997 if (readbuf)
1998 readbuf += TYPE_LENGTH (eltype);
1999 if (writebuf)
2000 writebuf += TYPE_LENGTH (eltype);
2001 }
2002 return RETURN_VALUE_REGISTER_CONVENTION;
2003 }
2004
2005 /* OpenCL vectors shorter than 16 bytes are returned as if
2006 a series of independent scalars; OpenCL vectors 16 bytes
2007 or longer are returned as if a series of AltiVec vectors. */
2008 if (valtype->code () == TYPE_CODE_ARRAY && valtype->is_vector ()
2009 && opencl_abi)
2010 {
2011 if (TYPE_LENGTH (valtype) < 16)
2012 eltype = check_typedef (TYPE_TARGET_TYPE (valtype));
2013 else
2014 eltype = register_type (gdbarch, tdep->ppc_vr0_regnum);
2015
2016 nelt = TYPE_LENGTH (valtype) / TYPE_LENGTH (eltype);
2017 for (int i = 0; i < nelt; i++)
2018 {
2019 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
2020 readbuf, writebuf, i);
2021 gdb_assert (ok);
2022
2023 if (readbuf)
2024 readbuf += TYPE_LENGTH (eltype);
2025 if (writebuf)
2026 writebuf += TYPE_LENGTH (eltype);
2027 }
2028 return RETURN_VALUE_REGISTER_CONVENTION;
2029 }
2030
2031 /* All pointers live in r3. */
2032 if (valtype->code () == TYPE_CODE_PTR || TYPE_IS_REFERENCE (valtype))
2033 {
2034 int regnum = tdep->ppc_gp0_regnum + 3;
2035
2036 if (writebuf != NULL)
2037 regcache->cooked_write (regnum, writebuf);
2038 if (readbuf != NULL)
2039 regcache->cooked_read (regnum, readbuf);
2040 return RETURN_VALUE_REGISTER_CONVENTION;
2041 }
2042
2043 /* Small character arrays are returned, right justified, in r3. */
2044 if (valtype->code () == TYPE_CODE_ARRAY
2045 && !valtype->is_vector ()
2046 && TYPE_LENGTH (valtype) <= 8
2047 && TYPE_TARGET_TYPE (valtype)->code () == TYPE_CODE_INT
2048 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
2049 {
2050 int regnum = tdep->ppc_gp0_regnum + 3;
2051 int offset = (register_size (gdbarch, regnum) - TYPE_LENGTH (valtype));
2052
2053 if (writebuf != NULL)
2054 regcache->cooked_write_part (regnum, offset, TYPE_LENGTH (valtype),
2055 writebuf);
2056 if (readbuf != NULL)
2057 regcache->cooked_read_part (regnum, offset, TYPE_LENGTH (valtype),
2058 readbuf);
2059 return RETURN_VALUE_REGISTER_CONVENTION;
2060 }
2061
2062 /* In the ELFv2 ABI, homogeneous floating-point or vector
2063 aggregates are returned in registers. */
2064 if (tdep->elf_abi == POWERPC_ELF_V2
2065 && ppc64_elfv2_abi_homogeneous_aggregate (valtype, &eltype, &nelt,
2066 gdbarch)
2067 && (eltype->code () == TYPE_CODE_FLT
2068 || eltype->code () == TYPE_CODE_DECFLOAT
2069 || (eltype->code () == TYPE_CODE_ARRAY
2070 && eltype->is_vector ()
2071 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
2072 && TYPE_LENGTH (eltype) == 16)))
2073 {
2074 for (int i = 0; i < nelt; i++)
2075 {
2076 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
2077 readbuf, writebuf, i);
2078 gdb_assert (ok);
2079
2080 if (readbuf)
2081 readbuf += TYPE_LENGTH (eltype);
2082 if (writebuf)
2083 writebuf += TYPE_LENGTH (eltype);
2084 }
2085
2086 return RETURN_VALUE_REGISTER_CONVENTION;
2087 }
2088
2089 /* In the ELFv2 ABI, aggregate types of up to 16 bytes are
2090 returned in registers r3:r4. */
2091 if (tdep->elf_abi == POWERPC_ELF_V2
2092 && TYPE_LENGTH (valtype) <= 16
2093 && (valtype->code () == TYPE_CODE_STRUCT
2094 || valtype->code () == TYPE_CODE_UNION
2095 || (valtype->code () == TYPE_CODE_ARRAY
2096 && !valtype->is_vector ())))
2097 {
2098 int n_regs = ((TYPE_LENGTH (valtype) + tdep->wordsize - 1)
2099 / tdep->wordsize);
2100
2101 for (int i = 0; i < n_regs; i++)
2102 {
2103 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
2104 int regnum = tdep->ppc_gp0_regnum + 3 + i;
2105 int offset = i * tdep->wordsize;
2106 int len = TYPE_LENGTH (valtype) - offset;
2107
2108 if (len > tdep->wordsize)
2109 len = tdep->wordsize;
2110
2111 if (writebuf != NULL)
2112 {
2113 memset (regval, 0, sizeof regval);
2114 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
2115 && offset == 0)
2116 memcpy (regval + tdep->wordsize - len, writebuf, len);
2117 else
2118 memcpy (regval, writebuf + offset, len);
2119 regcache->cooked_write (regnum, regval);
2120 }
2121 if (readbuf != NULL)
2122 {
2123 regcache->cooked_read (regnum, regval);
2124 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
2125 && offset == 0)
2126 memcpy (readbuf, regval + tdep->wordsize - len, len);
2127 else
2128 memcpy (readbuf + offset, regval, len);
2129 }
2130 }
2131 return RETURN_VALUE_REGISTER_CONVENTION;
2132 }
2133
2134 /* Handle plain base types. */
2135 if (ppc64_sysv_abi_return_value_base (gdbarch, valtype, regcache,
2136 readbuf, writebuf, 0))
2137 return RETURN_VALUE_REGISTER_CONVENTION;
2138
2139 return RETURN_VALUE_STRUCT_CONVENTION;
2140 }
2141