300dcac6f1f685e665ce39e1c50c38109b0a2d9c
[binutils-gdb.git] / gdb / ppc-sysv-tdep.c
1 /* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
4 Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007, 2008, 2009, 2010, 2011
5 Free Software Foundation, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "gdbcore.h"
24 #include "inferior.h"
25 #include "regcache.h"
26 #include "value.h"
27 #include "gdb_string.h"
28 #include "gdb_assert.h"
29 #include "ppc-tdep.h"
30 #include "target.h"
31 #include "objfiles.h"
32 #include "infcall.h"
33
34 /* Pass the arguments in either registers, or in the stack. Using the
35 ppc sysv ABI, the first eight words of the argument list (that might
36 be less than eight parameters if some parameters occupy more than one
37 word) are passed in r3..r10 registers. float and double parameters are
38 passed in fpr's, in addition to that. Rest of the parameters if any
39 are passed in user stack.
40
41 If the function is returning a structure, then the return address is passed
42 in r3, then the first 7 words of the parametes can be passed in registers,
43 starting from r4. */
44
45 CORE_ADDR
46 ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
47 struct regcache *regcache, CORE_ADDR bp_addr,
48 int nargs, struct value **args, CORE_ADDR sp,
49 int struct_return, CORE_ADDR struct_addr)
50 {
51 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
52 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
53 ULONGEST saved_sp;
54 int argspace = 0; /* 0 is an initial wrong guess. */
55 int write_pass;
56
57 gdb_assert (tdep->wordsize == 4);
58
59 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
60 &saved_sp);
61
62 /* Go through the argument list twice.
63
64 Pass 1: Figure out how much new stack space is required for
65 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
66 ABI doesn't reserve any extra space for parameters which are put
67 in registers, but does always push structures and then pass their
68 address.
69
70 Pass 2: Replay the same computation but this time also write the
71 values out to the target. */
72
73 for (write_pass = 0; write_pass < 2; write_pass++)
74 {
75 int argno;
76 /* Next available floating point register for float and double
77 arguments. */
78 int freg = 1;
79 /* Next available general register for non-float, non-vector
80 arguments. */
81 int greg = 3;
82 /* Next available vector register for vector arguments. */
83 int vreg = 2;
84 /* Arguments start above the "LR save word" and "Back chain". */
85 int argoffset = 2 * tdep->wordsize;
86 /* Structures start after the arguments. */
87 int structoffset = argoffset + argspace;
88
89 /* If the function is returning a `struct', then the first word
90 (which will be passed in r3) is used for struct return
91 address. In that case we should advance one word and start
92 from r4 register to copy parameters. */
93 if (struct_return)
94 {
95 if (write_pass)
96 regcache_cooked_write_signed (regcache,
97 tdep->ppc_gp0_regnum + greg,
98 struct_addr);
99 greg++;
100 }
101
102 for (argno = 0; argno < nargs; argno++)
103 {
104 struct value *arg = args[argno];
105 struct type *type = check_typedef (value_type (arg));
106 int len = TYPE_LENGTH (type);
107 const bfd_byte *val = value_contents (arg);
108
109 if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8
110 && !tdep->soft_float)
111 {
112 /* Floating point value converted to "double" then
113 passed in an FP register, when the registers run out,
114 8 byte aligned stack is used. */
115 if (freg <= 8)
116 {
117 if (write_pass)
118 {
119 /* Always store the floating point value using
120 the register's floating-point format. */
121 gdb_byte regval[MAX_REGISTER_SIZE];
122 struct type *regtype
123 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
124 convert_typed_floating (val, type, regval, regtype);
125 regcache_cooked_write (regcache,
126 tdep->ppc_fp0_regnum + freg,
127 regval);
128 }
129 freg++;
130 }
131 else
132 {
133 /* The SysV ABI tells us to convert floats to
134 doubles before writing them to an 8 byte aligned
135 stack location. Unfortunately GCC does not do
136 that, and stores floats into 4 byte aligned
137 locations without converting them to doubles.
138 Since there is no know compiler that actually
139 follows the ABI here, we implement the GCC
140 convention. */
141
142 /* Align to 4 bytes or 8 bytes depending on the type of
143 the argument (float or double). */
144 argoffset = align_up (argoffset, len);
145 if (write_pass)
146 write_memory (sp + argoffset, val, len);
147 argoffset += len;
148 }
149 }
150 else if (TYPE_CODE (type) == TYPE_CODE_FLT
151 && len == 16
152 && !tdep->soft_float
153 && (gdbarch_long_double_format (gdbarch)
154 == floatformats_ibm_long_double))
155 {
156 /* IBM long double passed in two FP registers if
157 available, otherwise 8-byte aligned stack. */
158 if (freg <= 7)
159 {
160 if (write_pass)
161 {
162 regcache_cooked_write (regcache,
163 tdep->ppc_fp0_regnum + freg,
164 val);
165 regcache_cooked_write (regcache,
166 tdep->ppc_fp0_regnum + freg + 1,
167 val + 8);
168 }
169 freg += 2;
170 }
171 else
172 {
173 argoffset = align_up (argoffset, 8);
174 if (write_pass)
175 write_memory (sp + argoffset, val, len);
176 argoffset += 16;
177 }
178 }
179 else if (len == 8
180 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
181 || TYPE_CODE (type) == TYPE_CODE_FLT /* double */
182 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
183 && tdep->soft_float)))
184 {
185 /* "long long" or soft-float "double" or "_Decimal64"
186 passed in an odd/even register pair with the low
187 addressed word in the odd register and the high
188 addressed word in the even register, or when the
189 registers run out an 8 byte aligned stack
190 location. */
191 if (greg > 9)
192 {
193 /* Just in case GREG was 10. */
194 greg = 11;
195 argoffset = align_up (argoffset, 8);
196 if (write_pass)
197 write_memory (sp + argoffset, val, len);
198 argoffset += 8;
199 }
200 else
201 {
202 /* Must start on an odd register - r3/r4 etc. */
203 if ((greg & 1) == 0)
204 greg++;
205 if (write_pass)
206 {
207 regcache_cooked_write (regcache,
208 tdep->ppc_gp0_regnum + greg + 0,
209 val + 0);
210 regcache_cooked_write (regcache,
211 tdep->ppc_gp0_regnum + greg + 1,
212 val + 4);
213 }
214 greg += 2;
215 }
216 }
217 else if (len == 16
218 && ((TYPE_CODE (type) == TYPE_CODE_FLT
219 && (gdbarch_long_double_format (gdbarch)
220 == floatformats_ibm_long_double))
221 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
222 && tdep->soft_float)))
223 {
224 /* Soft-float IBM long double or _Decimal128 passed in
225 four consecutive registers, or on the stack. The
226 registers are not necessarily odd/even pairs. */
227 if (greg > 7)
228 {
229 greg = 11;
230 argoffset = align_up (argoffset, 8);
231 if (write_pass)
232 write_memory (sp + argoffset, val, len);
233 argoffset += 16;
234 }
235 else
236 {
237 if (write_pass)
238 {
239 regcache_cooked_write (regcache,
240 tdep->ppc_gp0_regnum + greg + 0,
241 val + 0);
242 regcache_cooked_write (regcache,
243 tdep->ppc_gp0_regnum + greg + 1,
244 val + 4);
245 regcache_cooked_write (regcache,
246 tdep->ppc_gp0_regnum + greg + 2,
247 val + 8);
248 regcache_cooked_write (regcache,
249 tdep->ppc_gp0_regnum + greg + 3,
250 val + 12);
251 }
252 greg += 4;
253 }
254 }
255 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8
256 && !tdep->soft_float)
257 {
258 /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
259 end up in memory. */
260
261 if (freg <= 8)
262 {
263 if (write_pass)
264 {
265 gdb_byte regval[MAX_REGISTER_SIZE];
266 const gdb_byte *p;
267
268 /* 32-bit decimal floats are right aligned in the
269 doubleword. */
270 if (TYPE_LENGTH (type) == 4)
271 {
272 memcpy (regval + 4, val, 4);
273 p = regval;
274 }
275 else
276 p = val;
277
278 regcache_cooked_write (regcache,
279 tdep->ppc_fp0_regnum + freg, p);
280 }
281
282 freg++;
283 }
284 else
285 {
286 argoffset = align_up (argoffset, len);
287
288 if (write_pass)
289 /* Write value in the stack's parameter save area. */
290 write_memory (sp + argoffset, val, len);
291
292 argoffset += len;
293 }
294 }
295 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16
296 && !tdep->soft_float)
297 {
298 /* 128-bit decimal floats go in f2 .. f7, always in even/odd
299 pairs. They can end up in memory, using two doublewords. */
300
301 if (freg <= 6)
302 {
303 /* Make sure freg is even. */
304 freg += freg & 1;
305
306 if (write_pass)
307 {
308 regcache_cooked_write (regcache,
309 tdep->ppc_fp0_regnum + freg, val);
310 regcache_cooked_write (regcache,
311 tdep->ppc_fp0_regnum + freg + 1, val + 8);
312 }
313 }
314 else
315 {
316 argoffset = align_up (argoffset, 8);
317
318 if (write_pass)
319 write_memory (sp + argoffset, val, 16);
320
321 argoffset += 16;
322 }
323
324 /* If a 128-bit decimal float goes to the stack because only f7
325 and f8 are free (thus there's no even/odd register pair
326 available), these registers should be marked as occupied.
327 Hence we increase freg even when writing to memory. */
328 freg += 2;
329 }
330 else if (len == 16
331 && TYPE_CODE (type) == TYPE_CODE_ARRAY
332 && TYPE_VECTOR (type)
333 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
334 {
335 /* Vector parameter passed in an Altivec register, or
336 when that runs out, 16 byte aligned stack location. */
337 if (vreg <= 13)
338 {
339 if (write_pass)
340 regcache_cooked_write (regcache,
341 tdep->ppc_vr0_regnum + vreg, val);
342 vreg++;
343 }
344 else
345 {
346 argoffset = align_up (argoffset, 16);
347 if (write_pass)
348 write_memory (sp + argoffset, val, 16);
349 argoffset += 16;
350 }
351 }
352 else if (len == 8
353 && TYPE_CODE (type) == TYPE_CODE_ARRAY
354 && TYPE_VECTOR (type)
355 && tdep->vector_abi == POWERPC_VEC_SPE)
356 {
357 /* Vector parameter passed in an e500 register, or when
358 that runs out, 8 byte aligned stack location. Note
359 that since e500 vector and general purpose registers
360 both map onto the same underlying register set, a
361 "greg" and not a "vreg" is consumed here. A cooked
362 write stores the value in the correct locations
363 within the raw register cache. */
364 if (greg <= 10)
365 {
366 if (write_pass)
367 regcache_cooked_write (regcache,
368 tdep->ppc_ev0_regnum + greg, val);
369 greg++;
370 }
371 else
372 {
373 argoffset = align_up (argoffset, 8);
374 if (write_pass)
375 write_memory (sp + argoffset, val, 8);
376 argoffset += 8;
377 }
378 }
379 else
380 {
381 /* Reduce the parameter down to something that fits in a
382 "word". */
383 gdb_byte word[MAX_REGISTER_SIZE];
384 memset (word, 0, MAX_REGISTER_SIZE);
385 if (len > tdep->wordsize
386 || TYPE_CODE (type) == TYPE_CODE_STRUCT
387 || TYPE_CODE (type) == TYPE_CODE_UNION)
388 {
389 /* Structs and large values are put in an
390 aligned stack slot ... */
391 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
392 && TYPE_VECTOR (type)
393 && len >= 16)
394 structoffset = align_up (structoffset, 16);
395 else
396 structoffset = align_up (structoffset, 8);
397
398 if (write_pass)
399 write_memory (sp + structoffset, val, len);
400 /* ... and then a "word" pointing to that address is
401 passed as the parameter. */
402 store_unsigned_integer (word, tdep->wordsize, byte_order,
403 sp + structoffset);
404 structoffset += len;
405 }
406 else if (TYPE_CODE (type) == TYPE_CODE_INT)
407 /* Sign or zero extend the "int" into a "word". */
408 store_unsigned_integer (word, tdep->wordsize, byte_order,
409 unpack_long (type, val));
410 else
411 /* Always goes in the low address. */
412 memcpy (word, val, len);
413 /* Store that "word" in a register, or on the stack.
414 The words have "4" byte alignment. */
415 if (greg <= 10)
416 {
417 if (write_pass)
418 regcache_cooked_write (regcache,
419 tdep->ppc_gp0_regnum + greg, word);
420 greg++;
421 }
422 else
423 {
424 argoffset = align_up (argoffset, tdep->wordsize);
425 if (write_pass)
426 write_memory (sp + argoffset, word, tdep->wordsize);
427 argoffset += tdep->wordsize;
428 }
429 }
430 }
431
432 /* Compute the actual stack space requirements. */
433 if (!write_pass)
434 {
435 /* Remember the amount of space needed by the arguments. */
436 argspace = argoffset;
437 /* Allocate space for both the arguments and the structures. */
438 sp -= (argoffset + structoffset);
439 /* Ensure that the stack is still 16 byte aligned. */
440 sp = align_down (sp, 16);
441 }
442
443 /* The psABI says that "A caller of a function that takes a
444 variable argument list shall set condition register bit 6 to
445 1 if it passes one or more arguments in the floating-point
446 registers. It is strongly recommended that the caller set the
447 bit to 0 otherwise..." Doing this for normal functions too
448 shouldn't hurt. */
449 if (write_pass)
450 {
451 ULONGEST cr;
452
453 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
454 if (freg > 1)
455 cr |= 0x02000000;
456 else
457 cr &= ~0x02000000;
458 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
459 }
460 }
461
462 /* Update %sp. */
463 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
464
465 /* Write the backchain (it occupies WORDSIZED bytes). */
466 write_memory_signed_integer (sp, tdep->wordsize, byte_order, saved_sp);
467
468 /* Point the inferior function call's return address at the dummy's
469 breakpoint. */
470 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
471
472 return sp;
473 }
474
475 /* Handle the return-value conventions for Decimal Floating Point values
476 in both ppc32 and ppc64, which are the same. */
477 static int
478 get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype,
479 struct regcache *regcache, gdb_byte *readbuf,
480 const gdb_byte *writebuf)
481 {
482 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
483
484 gdb_assert (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT);
485
486 /* 32-bit and 64-bit decimal floats in f1. */
487 if (TYPE_LENGTH (valtype) <= 8)
488 {
489 if (writebuf != NULL)
490 {
491 gdb_byte regval[MAX_REGISTER_SIZE];
492 const gdb_byte *p;
493
494 /* 32-bit decimal float is right aligned in the doubleword. */
495 if (TYPE_LENGTH (valtype) == 4)
496 {
497 memcpy (regval + 4, writebuf, 4);
498 p = regval;
499 }
500 else
501 p = writebuf;
502
503 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, p);
504 }
505 if (readbuf != NULL)
506 {
507 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
508
509 /* Left align 32-bit decimal float. */
510 if (TYPE_LENGTH (valtype) == 4)
511 memcpy (readbuf, readbuf + 4, 4);
512 }
513 }
514 /* 128-bit decimal floats in f2,f3. */
515 else if (TYPE_LENGTH (valtype) == 16)
516 {
517 if (writebuf != NULL || readbuf != NULL)
518 {
519 int i;
520
521 for (i = 0; i < 2; i++)
522 {
523 if (writebuf != NULL)
524 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2 + i,
525 writebuf + i * 8);
526 if (readbuf != NULL)
527 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2 + i,
528 readbuf + i * 8);
529 }
530 }
531 }
532 else
533 /* Can't happen. */
534 internal_error (__FILE__, __LINE__, _("Unknown decimal float size."));
535
536 return RETURN_VALUE_REGISTER_CONVENTION;
537 }
538
539 /* Handle the return-value conventions specified by the SysV 32-bit
540 PowerPC ABI (including all the supplements):
541
542 no floating-point: floating-point values returned using 32-bit
543 general-purpose registers.
544
545 Altivec: 128-bit vectors returned using vector registers.
546
547 e500: 64-bit vectors returned using the full full 64 bit EV
548 register, floating-point values returned using 32-bit
549 general-purpose registers.
550
551 GCC (broken): Small struct values right (instead of left) aligned
552 when returned in general-purpose registers. */
553
554 static enum return_value_convention
555 do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
556 struct regcache *regcache, gdb_byte *readbuf,
557 const gdb_byte *writebuf, int broken_gcc)
558 {
559 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
560 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
561 gdb_assert (tdep->wordsize == 4);
562 if (TYPE_CODE (type) == TYPE_CODE_FLT
563 && TYPE_LENGTH (type) <= 8
564 && !tdep->soft_float)
565 {
566 if (readbuf)
567 {
568 /* Floats and doubles stored in "f1". Convert the value to
569 the required type. */
570 gdb_byte regval[MAX_REGISTER_SIZE];
571 struct type *regtype = register_type (gdbarch,
572 tdep->ppc_fp0_regnum + 1);
573 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
574 convert_typed_floating (regval, regtype, readbuf, type);
575 }
576 if (writebuf)
577 {
578 /* Floats and doubles stored in "f1". Convert the value to
579 the register's "double" type. */
580 gdb_byte regval[MAX_REGISTER_SIZE];
581 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
582 convert_typed_floating (writebuf, type, regval, regtype);
583 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
584 }
585 return RETURN_VALUE_REGISTER_CONVENTION;
586 }
587 if (TYPE_CODE (type) == TYPE_CODE_FLT
588 && TYPE_LENGTH (type) == 16
589 && !tdep->soft_float
590 && (gdbarch_long_double_format (gdbarch)
591 == floatformats_ibm_long_double))
592 {
593 /* IBM long double stored in f1 and f2. */
594 if (readbuf)
595 {
596 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
597 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2,
598 readbuf + 8);
599 }
600 if (writebuf)
601 {
602 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, writebuf);
603 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2,
604 writebuf + 8);
605 }
606 return RETURN_VALUE_REGISTER_CONVENTION;
607 }
608 if (TYPE_LENGTH (type) == 16
609 && ((TYPE_CODE (type) == TYPE_CODE_FLT
610 && (gdbarch_long_double_format (gdbarch)
611 == floatformats_ibm_long_double))
612 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && tdep->soft_float)))
613 {
614 /* Soft-float IBM long double or _Decimal128 stored in r3, r4,
615 r5, r6. */
616 if (readbuf)
617 {
618 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
619 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
620 readbuf + 4);
621 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
622 readbuf + 8);
623 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
624 readbuf + 12);
625 }
626 if (writebuf)
627 {
628 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
629 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
630 writebuf + 4);
631 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
632 writebuf + 8);
633 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
634 writebuf + 12);
635 }
636 return RETURN_VALUE_REGISTER_CONVENTION;
637 }
638 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
639 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)
640 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 8
641 && tdep->soft_float))
642 {
643 if (readbuf)
644 {
645 /* A long long, double or _Decimal64 stored in the 32 bit
646 r3/r4. */
647 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
648 readbuf + 0);
649 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
650 readbuf + 4);
651 }
652 if (writebuf)
653 {
654 /* A long long, double or _Decimal64 stored in the 32 bit
655 r3/r4. */
656 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
657 writebuf + 0);
658 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
659 writebuf + 4);
660 }
661 return RETURN_VALUE_REGISTER_CONVENTION;
662 }
663 if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float)
664 return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
665 writebuf);
666 else if ((TYPE_CODE (type) == TYPE_CODE_INT
667 || TYPE_CODE (type) == TYPE_CODE_CHAR
668 || TYPE_CODE (type) == TYPE_CODE_BOOL
669 || TYPE_CODE (type) == TYPE_CODE_PTR
670 || TYPE_CODE (type) == TYPE_CODE_REF
671 || TYPE_CODE (type) == TYPE_CODE_ENUM)
672 && TYPE_LENGTH (type) <= tdep->wordsize)
673 {
674 if (readbuf)
675 {
676 /* Some sort of integer stored in r3. Since TYPE isn't
677 bigger than the register, sign extension isn't a problem
678 - just do everything unsigned. */
679 ULONGEST regval;
680 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
681 &regval);
682 store_unsigned_integer (readbuf, TYPE_LENGTH (type), byte_order,
683 regval);
684 }
685 if (writebuf)
686 {
687 /* Some sort of integer stored in r3. Use unpack_long since
688 that should handle any required sign extension. */
689 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
690 unpack_long (type, writebuf));
691 }
692 return RETURN_VALUE_REGISTER_CONVENTION;
693 }
694 if (TYPE_LENGTH (type) == 16
695 && TYPE_CODE (type) == TYPE_CODE_ARRAY
696 && TYPE_VECTOR (type)
697 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
698 {
699 if (readbuf)
700 {
701 /* Altivec places the return value in "v2". */
702 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
703 }
704 if (writebuf)
705 {
706 /* Altivec places the return value in "v2". */
707 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
708 }
709 return RETURN_VALUE_REGISTER_CONVENTION;
710 }
711 if (TYPE_LENGTH (type) == 16
712 && TYPE_CODE (type) == TYPE_CODE_ARRAY
713 && TYPE_VECTOR (type)
714 && tdep->vector_abi == POWERPC_VEC_GENERIC)
715 {
716 /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
717 GCC without AltiVec returns them in memory, but it warns about
718 ABI risks in that case; we don't try to support it. */
719 if (readbuf)
720 {
721 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
722 readbuf + 0);
723 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
724 readbuf + 4);
725 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
726 readbuf + 8);
727 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
728 readbuf + 12);
729 }
730 if (writebuf)
731 {
732 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
733 writebuf + 0);
734 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
735 writebuf + 4);
736 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
737 writebuf + 8);
738 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
739 writebuf + 12);
740 }
741 return RETURN_VALUE_REGISTER_CONVENTION;
742 }
743 if (TYPE_LENGTH (type) == 8
744 && TYPE_CODE (type) == TYPE_CODE_ARRAY
745 && TYPE_VECTOR (type)
746 && tdep->vector_abi == POWERPC_VEC_SPE)
747 {
748 /* The e500 ABI places return values for the 64-bit DSP types
749 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
750 corresponds to the entire r3 value for e500, whereas GDB's r3
751 only corresponds to the least significant 32-bits. So place
752 the 64-bit DSP type's value in ev3. */
753 if (readbuf)
754 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
755 if (writebuf)
756 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
757 return RETURN_VALUE_REGISTER_CONVENTION;
758 }
759 if (broken_gcc && TYPE_LENGTH (type) <= 8)
760 {
761 /* GCC screwed up for structures or unions whose size is less
762 than or equal to 8 bytes.. Instead of left-aligning, it
763 right-aligns the data into the buffer formed by r3, r4. */
764 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
765 int len = TYPE_LENGTH (type);
766 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
767
768 if (readbuf)
769 {
770 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
771 regvals + 0 * tdep->wordsize);
772 if (len > tdep->wordsize)
773 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
774 regvals + 1 * tdep->wordsize);
775 memcpy (readbuf, regvals + offset, len);
776 }
777 if (writebuf)
778 {
779 memset (regvals, 0, sizeof regvals);
780 memcpy (regvals + offset, writebuf, len);
781 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
782 regvals + 0 * tdep->wordsize);
783 if (len > tdep->wordsize)
784 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
785 regvals + 1 * tdep->wordsize);
786 }
787
788 return RETURN_VALUE_REGISTER_CONVENTION;
789 }
790 if (TYPE_LENGTH (type) <= 8)
791 {
792 if (readbuf)
793 {
794 /* This matches SVr4 PPC, it does not match GCC. */
795 /* The value is right-padded to 8 bytes and then loaded, as
796 two "words", into r3/r4. */
797 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
798 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
799 regvals + 0 * tdep->wordsize);
800 if (TYPE_LENGTH (type) > tdep->wordsize)
801 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
802 regvals + 1 * tdep->wordsize);
803 memcpy (readbuf, regvals, TYPE_LENGTH (type));
804 }
805 if (writebuf)
806 {
807 /* This matches SVr4 PPC, it does not match GCC. */
808 /* The value is padded out to 8 bytes and then loaded, as
809 two "words" into r3/r4. */
810 gdb_byte regvals[MAX_REGISTER_SIZE * 2];
811 memset (regvals, 0, sizeof regvals);
812 memcpy (regvals, writebuf, TYPE_LENGTH (type));
813 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
814 regvals + 0 * tdep->wordsize);
815 if (TYPE_LENGTH (type) > tdep->wordsize)
816 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
817 regvals + 1 * tdep->wordsize);
818 }
819 return RETURN_VALUE_REGISTER_CONVENTION;
820 }
821 return RETURN_VALUE_STRUCT_CONVENTION;
822 }
823
824 enum return_value_convention
825 ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *func_type,
826 struct type *valtype, struct regcache *regcache,
827 gdb_byte *readbuf, const gdb_byte *writebuf)
828 {
829 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
830 writebuf, 0);
831 }
832
833 enum return_value_convention
834 ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
835 struct type *func_type,
836 struct type *valtype,
837 struct regcache *regcache,
838 gdb_byte *readbuf, const gdb_byte *writebuf)
839 {
840 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf,
841 writebuf, 1);
842 }
843
844 /* The helper function for 64-bit SYSV push_dummy_call. Converts the
845 function's code address back into the function's descriptor
846 address.
847
848 Find a value for the TOC register. Every symbol should have both
849 ".FN" and "FN" in the minimal symbol table. "FN" points at the
850 FN's descriptor, while ".FN" points at the entry point (which
851 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
852 FN's descriptor address (while at the same time being careful to
853 find "FN" in the same object file as ".FN"). */
854
855 static int
856 convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
857 {
858 struct obj_section *dot_fn_section;
859 struct minimal_symbol *dot_fn;
860 struct minimal_symbol *fn;
861 CORE_ADDR toc;
862 /* Find the minimal symbol that corresponds to CODE_ADDR (should
863 have a name of the form ".FN"). */
864 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
865 if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.')
866 return 0;
867 /* Get the section that contains CODE_ADDR. Need this for the
868 "objfile" that it contains. */
869 dot_fn_section = find_pc_section (code_addr);
870 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
871 return 0;
872 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
873 address. Only look for the minimal symbol in ".FN"'s object file
874 - avoids problems when two object files (i.e., shared libraries)
875 contain a minimal symbol with the same name. */
876 fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL,
877 dot_fn_section->objfile);
878 if (fn == NULL)
879 return 0;
880 /* Found a descriptor. */
881 (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn);
882 return 1;
883 }
884
885 /* Pass the arguments in either registers, or in the stack. Using the
886 ppc 64 bit SysV ABI.
887
888 This implements a dumbed down version of the ABI. It always writes
889 values to memory, GPR and FPR, even when not necessary. Doing this
890 greatly simplifies the logic. */
891
892 CORE_ADDR
893 ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
894 struct value *function,
895 struct regcache *regcache, CORE_ADDR bp_addr,
896 int nargs, struct value **args, CORE_ADDR sp,
897 int struct_return, CORE_ADDR struct_addr)
898 {
899 CORE_ADDR func_addr = find_function_addr (function, NULL);
900 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
901 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
902 ULONGEST back_chain;
903 /* See for-loop comment below. */
904 int write_pass;
905 /* Size of the general parameter region, the final value is computed
906 in the for-loop below. */
907 LONGEST gparam_size = 0;
908 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
909 calls to align_up(), align_down(), etc. because this makes it
910 easier to reuse this code (in a copy/paste sense) in the future,
911 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
912 at some point makes it easier to verify that this function is
913 correct without having to do a non-local analysis to figure out
914 the possible values of tdep->wordsize. */
915 gdb_assert (tdep->wordsize == 8);
916
917 /* This function exists to support a calling convention that
918 requires floating-point registers. It shouldn't be used on
919 processors that lack them. */
920 gdb_assert (ppc_floating_point_unit_p (gdbarch));
921
922 /* By this stage in the proceedings, SP has been decremented by "red
923 zone size" + "struct return size". Fetch the stack-pointer from
924 before this and use that as the BACK_CHAIN. */
925 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
926 &back_chain);
927
928 /* Go through the argument list twice.
929
930 Pass 1: Compute the function call's stack space and register
931 requirements.
932
933 Pass 2: Replay the same computation but this time also write the
934 values out to the target. */
935
936 for (write_pass = 0; write_pass < 2; write_pass++)
937 {
938 int argno;
939 /* Next available floating point register for float and double
940 arguments. */
941 int freg = 1;
942 /* Next available general register for non-vector (but possibly
943 float) arguments. */
944 int greg = 3;
945 /* Next available vector register for vector arguments. */
946 int vreg = 2;
947 /* The address, at which the next general purpose parameter
948 (integer, struct, float, vector, ...) should be saved. */
949 CORE_ADDR gparam;
950
951 if (!write_pass)
952 {
953 /* During the first pass, GPARAM is more like an offset
954 (start address zero) than an address. That way it
955 accumulates the total stack space required. */
956 gparam = 0;
957 }
958 else
959 {
960 /* Decrement the stack pointer making space for the on-stack
961 stack parameters. Set gparam to that region. */
962 gparam = align_down (sp - gparam_size, 16);
963 /* Add in space for the TOC, link editor double word,
964 compiler double word, LR save area, CR save area. */
965 sp = align_down (gparam - 48, 16);
966 }
967
968 /* If the function is returning a `struct', then there is an
969 extra hidden parameter (which will be passed in r3)
970 containing the address of that struct.. In that case we
971 should advance one word and start from r4 register to copy
972 parameters. This also consumes one on-stack parameter slot. */
973 if (struct_return)
974 {
975 if (write_pass)
976 regcache_cooked_write_signed (regcache,
977 tdep->ppc_gp0_regnum + greg,
978 struct_addr);
979 greg++;
980 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
981 }
982
983 for (argno = 0; argno < nargs; argno++)
984 {
985 struct value *arg = args[argno];
986 struct type *type = check_typedef (value_type (arg));
987 const bfd_byte *val = value_contents (arg);
988
989 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
990 {
991 /* Floats and Doubles go in f1 .. f13. They also
992 consume a left aligned GREG,, and can end up in
993 memory. */
994 if (write_pass)
995 {
996 gdb_byte regval[MAX_REGISTER_SIZE];
997 const gdb_byte *p;
998
999 /* Version 1.7 of the 64-bit PowerPC ELF ABI says:
1000
1001 "Single precision floating point values are mapped to
1002 the first word in a single doubleword."
1003
1004 And version 1.9 says:
1005
1006 "Single precision floating point values are mapped to
1007 the second word in a single doubleword."
1008
1009 GDB then writes single precision floating point values
1010 at both words in a doubleword, to support both ABIs. */
1011 if (TYPE_LENGTH (type) == 4)
1012 {
1013 memcpy (regval, val, 4);
1014 memcpy (regval + 4, val, 4);
1015 p = regval;
1016 }
1017 else
1018 p = val;
1019
1020 /* Write value in the stack's parameter save area. */
1021 write_memory (gparam, p, 8);
1022
1023 if (freg <= 13)
1024 {
1025 struct type *regtype
1026 = register_type (gdbarch, tdep->ppc_fp0_regnum);
1027
1028 convert_typed_floating (val, type, regval, regtype);
1029 regcache_cooked_write (regcache,
1030 tdep->ppc_fp0_regnum + freg,
1031 regval);
1032 }
1033 if (greg <= 10)
1034 regcache_cooked_write (regcache,
1035 tdep->ppc_gp0_regnum + greg,
1036 regval);
1037 }
1038
1039 freg++;
1040 greg++;
1041 /* Always consume parameter stack space. */
1042 gparam = align_up (gparam + 8, tdep->wordsize);
1043 }
1044 else if (TYPE_CODE (type) == TYPE_CODE_FLT
1045 && TYPE_LENGTH (type) == 16
1046 && (gdbarch_long_double_format (gdbarch)
1047 == floatformats_ibm_long_double))
1048 {
1049 /* IBM long double stored in two doublewords of the
1050 parameter save area and corresponding registers. */
1051 if (write_pass)
1052 {
1053 if (!tdep->soft_float && freg <= 13)
1054 {
1055 regcache_cooked_write (regcache,
1056 tdep->ppc_fp0_regnum + freg,
1057 val);
1058 if (freg <= 12)
1059 regcache_cooked_write (regcache,
1060 tdep->ppc_fp0_regnum + freg + 1,
1061 val + 8);
1062 }
1063 if (greg <= 10)
1064 {
1065 regcache_cooked_write (regcache,
1066 tdep->ppc_gp0_regnum + greg,
1067 val);
1068 if (greg <= 9)
1069 regcache_cooked_write (regcache,
1070 tdep->ppc_gp0_regnum + greg + 1,
1071 val + 8);
1072 }
1073 write_memory (gparam, val, TYPE_LENGTH (type));
1074 }
1075 freg += 2;
1076 greg += 2;
1077 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1078 }
1079 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
1080 && TYPE_LENGTH (type) <= 8)
1081 {
1082 /* 32-bit and 64-bit decimal floats go in f1 .. f13. They can
1083 end up in memory. */
1084 if (write_pass)
1085 {
1086 gdb_byte regval[MAX_REGISTER_SIZE];
1087 const gdb_byte *p;
1088
1089 /* 32-bit decimal floats are right aligned in the
1090 doubleword. */
1091 if (TYPE_LENGTH (type) == 4)
1092 {
1093 memcpy (regval + 4, val, 4);
1094 p = regval;
1095 }
1096 else
1097 p = val;
1098
1099 /* Write value in the stack's parameter save area. */
1100 write_memory (gparam, p, 8);
1101
1102 if (freg <= 13)
1103 regcache_cooked_write (regcache,
1104 tdep->ppc_fp0_regnum + freg, p);
1105 }
1106
1107 freg++;
1108 greg++;
1109 /* Always consume parameter stack space. */
1110 gparam = align_up (gparam + 8, tdep->wordsize);
1111 }
1112 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT &&
1113 TYPE_LENGTH (type) == 16)
1114 {
1115 /* 128-bit decimal floats go in f2 .. f12, always in even/odd
1116 pairs. They can end up in memory, using two doublewords. */
1117 if (write_pass)
1118 {
1119 if (freg <= 12)
1120 {
1121 /* Make sure freg is even. */
1122 freg += freg & 1;
1123 regcache_cooked_write (regcache,
1124 tdep->ppc_fp0_regnum + freg, val);
1125 regcache_cooked_write (regcache,
1126 tdep->ppc_fp0_regnum + freg + 1, val + 8);
1127 }
1128
1129 write_memory (gparam, val, TYPE_LENGTH (type));
1130 }
1131
1132 freg += 2;
1133 greg += 2;
1134 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1135 }
1136 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
1137 && TYPE_CODE (type) == TYPE_CODE_ARRAY
1138 && tdep->ppc_vr0_regnum >= 0)
1139 {
1140 /* In the Altivec ABI, vectors go in the vector registers
1141 v2 .. v13, as well as the parameter area -- always at
1142 16-byte aligned addresses. */
1143
1144 gparam = align_up (gparam, 16);
1145 greg += greg & 1;
1146
1147 if (write_pass)
1148 {
1149 if (vreg <= 13)
1150 regcache_cooked_write (regcache,
1151 tdep->ppc_vr0_regnum + vreg, val);
1152
1153 write_memory (gparam, val, TYPE_LENGTH (type));
1154 }
1155
1156 greg += 2;
1157 vreg++;
1158 gparam += 16;
1159 }
1160 else if ((TYPE_CODE (type) == TYPE_CODE_INT
1161 || TYPE_CODE (type) == TYPE_CODE_ENUM
1162 || TYPE_CODE (type) == TYPE_CODE_BOOL
1163 || TYPE_CODE (type) == TYPE_CODE_CHAR
1164 || TYPE_CODE (type) == TYPE_CODE_PTR
1165 || TYPE_CODE (type) == TYPE_CODE_REF)
1166 && TYPE_LENGTH (type) <= 8)
1167 {
1168 /* Scalars and Pointers get sign[un]extended and go in
1169 gpr3 .. gpr10. They can also end up in memory. */
1170 if (write_pass)
1171 {
1172 /* Sign extend the value, then store it unsigned. */
1173 ULONGEST word = unpack_long (type, val);
1174 /* Convert any function code addresses into
1175 descriptors. */
1176 if (TYPE_CODE (type) == TYPE_CODE_PTR
1177 || TYPE_CODE (type) == TYPE_CODE_REF)
1178 {
1179 struct type *target_type;
1180 target_type = check_typedef (TYPE_TARGET_TYPE (type));
1181
1182 if (TYPE_CODE (target_type) == TYPE_CODE_FUNC
1183 || TYPE_CODE (target_type) == TYPE_CODE_METHOD)
1184 {
1185 CORE_ADDR desc = word;
1186 convert_code_addr_to_desc_addr (word, &desc);
1187 word = desc;
1188 }
1189 }
1190 if (greg <= 10)
1191 regcache_cooked_write_unsigned (regcache,
1192 tdep->ppc_gp0_regnum +
1193 greg, word);
1194 write_memory_unsigned_integer (gparam, tdep->wordsize,
1195 byte_order, word);
1196 }
1197 greg++;
1198 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1199 }
1200 else
1201 {
1202 int byte;
1203 for (byte = 0; byte < TYPE_LENGTH (type);
1204 byte += tdep->wordsize)
1205 {
1206 if (write_pass && greg <= 10)
1207 {
1208 gdb_byte regval[MAX_REGISTER_SIZE];
1209 int len = TYPE_LENGTH (type) - byte;
1210 if (len > tdep->wordsize)
1211 len = tdep->wordsize;
1212 memset (regval, 0, sizeof regval);
1213 /* The ABI (version 1.9) specifies that values
1214 smaller than one doubleword are right-aligned
1215 and those larger are left-aligned. GCC
1216 versions before 3.4 implemented this
1217 incorrectly; see
1218 <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */
1219 if (byte == 0)
1220 memcpy (regval + tdep->wordsize - len,
1221 val + byte, len);
1222 else
1223 memcpy (regval, val + byte, len);
1224 regcache_cooked_write (regcache, greg, regval);
1225 }
1226 greg++;
1227 }
1228 if (write_pass)
1229 {
1230 /* WARNING: cagney/2003-09-21: Strictly speaking, this
1231 isn't necessary, unfortunately, GCC appears to get
1232 "struct convention" parameter passing wrong putting
1233 odd sized structures in memory instead of in a
1234 register. Work around this by always writing the
1235 value to memory. Fortunately, doing this
1236 simplifies the code. */
1237 int len = TYPE_LENGTH (type);
1238 if (len < tdep->wordsize)
1239 write_memory (gparam + tdep->wordsize - len, val, len);
1240 else
1241 write_memory (gparam, val, len);
1242 }
1243 if (freg <= 13
1244 && TYPE_CODE (type) == TYPE_CODE_STRUCT
1245 && TYPE_NFIELDS (type) == 1
1246 && TYPE_LENGTH (type) <= 16)
1247 {
1248 /* The ABI (version 1.9) specifies that structs
1249 containing a single floating-point value, at any
1250 level of nesting of single-member structs, are
1251 passed in floating-point registers. */
1252 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1253 && TYPE_NFIELDS (type) == 1)
1254 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1255 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1256 {
1257 if (TYPE_LENGTH (type) <= 8)
1258 {
1259 if (write_pass)
1260 {
1261 gdb_byte regval[MAX_REGISTER_SIZE];
1262 struct type *regtype
1263 = register_type (gdbarch,
1264 tdep->ppc_fp0_regnum);
1265 convert_typed_floating (val, type, regval,
1266 regtype);
1267 regcache_cooked_write (regcache,
1268 (tdep->ppc_fp0_regnum
1269 + freg),
1270 regval);
1271 }
1272 freg++;
1273 }
1274 else if (TYPE_LENGTH (type) == 16
1275 && (gdbarch_long_double_format (gdbarch)
1276 == floatformats_ibm_long_double))
1277 {
1278 if (write_pass)
1279 {
1280 regcache_cooked_write (regcache,
1281 (tdep->ppc_fp0_regnum
1282 + freg),
1283 val);
1284 if (freg <= 12)
1285 regcache_cooked_write (regcache,
1286 (tdep->ppc_fp0_regnum
1287 + freg + 1),
1288 val + 8);
1289 }
1290 freg += 2;
1291 }
1292 }
1293 }
1294 /* Always consume parameter stack space. */
1295 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
1296 }
1297 }
1298
1299 if (!write_pass)
1300 {
1301 /* Save the true region sizes ready for the second pass.
1302 Make certain that the general parameter save area is at
1303 least the minimum 8 registers (or doublewords) in size. */
1304 if (greg < 8)
1305 gparam_size = 8 * tdep->wordsize;
1306 else
1307 gparam_size = gparam;
1308 }
1309 }
1310
1311 /* Update %sp. */
1312 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
1313
1314 /* Write the backchain (it occupies WORDSIZED bytes). */
1315 write_memory_signed_integer (sp, tdep->wordsize, byte_order, back_chain);
1316
1317 /* Point the inferior function call's return address at the dummy's
1318 breakpoint. */
1319 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
1320
1321 /* Use the func_addr to find the descriptor, and use that to find
1322 the TOC. If we're calling via a function pointer, the pointer
1323 itself identifies the descriptor. */
1324 {
1325 struct type *ftype = check_typedef (value_type (function));
1326 CORE_ADDR desc_addr = value_as_address (function);
1327
1328 if (TYPE_CODE (ftype) == TYPE_CODE_PTR
1329 || convert_code_addr_to_desc_addr (func_addr, &desc_addr))
1330 {
1331 /* The TOC is the second double word in the descriptor. */
1332 CORE_ADDR toc =
1333 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
1334 tdep->wordsize, byte_order);
1335 regcache_cooked_write_unsigned (regcache,
1336 tdep->ppc_gp0_regnum + 2, toc);
1337 }
1338 }
1339
1340 return sp;
1341 }
1342
1343
1344 /* The 64 bit ABI return value convention.
1345
1346 Return non-zero if the return-value is stored in a register, return
1347 0 if the return-value is instead stored on the stack (a.k.a.,
1348 struct return convention).
1349
1350 For a return-value stored in a register: when WRITEBUF is non-NULL,
1351 copy the buffer to the corresponding register return-value location
1352 location; when READBUF is non-NULL, fill the buffer from the
1353 corresponding register return-value location. */
1354 enum return_value_convention
1355 ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *func_type,
1356 struct type *valtype, struct regcache *regcache,
1357 gdb_byte *readbuf, const gdb_byte *writebuf)
1358 {
1359 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1360 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1361
1362 /* This function exists to support a calling convention that
1363 requires floating-point registers. It shouldn't be used on
1364 processors that lack them. */
1365 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1366
1367 /* Floats and doubles in F1. */
1368 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
1369 {
1370 gdb_byte regval[MAX_REGISTER_SIZE];
1371 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
1372 if (writebuf != NULL)
1373 {
1374 convert_typed_floating (writebuf, valtype, regval, regtype);
1375 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
1376 }
1377 if (readbuf != NULL)
1378 {
1379 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
1380 convert_typed_floating (regval, regtype, readbuf, valtype);
1381 }
1382 return RETURN_VALUE_REGISTER_CONVENTION;
1383 }
1384 if (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
1385 return get_decimal_float_return_value (gdbarch, valtype, regcache, readbuf,
1386 writebuf);
1387 /* Integers in r3. */
1388 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
1389 || TYPE_CODE (valtype) == TYPE_CODE_ENUM
1390 || TYPE_CODE (valtype) == TYPE_CODE_CHAR
1391 || TYPE_CODE (valtype) == TYPE_CODE_BOOL)
1392 && TYPE_LENGTH (valtype) <= 8)
1393 {
1394 if (writebuf != NULL)
1395 {
1396 /* Be careful to sign extend the value. */
1397 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
1398 unpack_long (valtype, writebuf));
1399 }
1400 if (readbuf != NULL)
1401 {
1402 /* Extract the integer from r3. Since this is truncating the
1403 value, there isn't a sign extension problem. */
1404 ULONGEST regval;
1405 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
1406 &regval);
1407 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), byte_order,
1408 regval);
1409 }
1410 return RETURN_VALUE_REGISTER_CONVENTION;
1411 }
1412 /* All pointers live in r3. */
1413 if (TYPE_CODE (valtype) == TYPE_CODE_PTR
1414 || TYPE_CODE (valtype) == TYPE_CODE_REF)
1415 {
1416 /* All pointers live in r3. */
1417 if (writebuf != NULL)
1418 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
1419 if (readbuf != NULL)
1420 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
1421 return RETURN_VALUE_REGISTER_CONVENTION;
1422 }
1423 /* Array type has more than one use. */
1424 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
1425 {
1426 /* Small character arrays are returned, right justified, in r3. */
1427 if (TYPE_LENGTH (valtype) <= 8
1428 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
1429 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
1430 {
1431 int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
1432 - TYPE_LENGTH (valtype));
1433 if (writebuf != NULL)
1434 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
1435 offset, TYPE_LENGTH (valtype), writebuf);
1436 if (readbuf != NULL)
1437 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
1438 offset, TYPE_LENGTH (valtype), readbuf);
1439 return RETURN_VALUE_REGISTER_CONVENTION;
1440 }
1441 /* A VMX vector is returned in v2. */
1442 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
1443 && TYPE_VECTOR (valtype) && tdep->ppc_vr0_regnum >= 0)
1444 {
1445 if (readbuf)
1446 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
1447 if (writebuf)
1448 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2,
1449 writebuf);
1450 return RETURN_VALUE_REGISTER_CONVENTION;
1451 }
1452 }
1453 /* Big floating point values get stored in adjacent floating
1454 point registers, starting with F1. */
1455 if (TYPE_CODE (valtype) == TYPE_CODE_FLT
1456 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
1457 {
1458 if (writebuf || readbuf != NULL)
1459 {
1460 int i;
1461 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
1462 {
1463 if (writebuf != NULL)
1464 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
1465 (const bfd_byte *) writebuf + i * 8);
1466 if (readbuf != NULL)
1467 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
1468 (bfd_byte *) readbuf + i * 8);
1469 }
1470 }
1471 return RETURN_VALUE_REGISTER_CONVENTION;
1472 }
1473 /* Complex values get returned in f1:f2, need to convert. */
1474 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
1475 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
1476 {
1477 if (regcache != NULL)
1478 {
1479 int i;
1480 for (i = 0; i < 2; i++)
1481 {
1482 gdb_byte regval[MAX_REGISTER_SIZE];
1483 struct type *regtype =
1484 register_type (gdbarch, tdep->ppc_fp0_regnum);
1485 if (writebuf != NULL)
1486 {
1487 convert_typed_floating ((const bfd_byte *) writebuf +
1488 i * (TYPE_LENGTH (valtype) / 2),
1489 valtype, regval, regtype);
1490 regcache_cooked_write (regcache,
1491 tdep->ppc_fp0_regnum + 1 + i,
1492 regval);
1493 }
1494 if (readbuf != NULL)
1495 {
1496 regcache_cooked_read (regcache,
1497 tdep->ppc_fp0_regnum + 1 + i,
1498 regval);
1499 convert_typed_floating (regval, regtype,
1500 (bfd_byte *) readbuf +
1501 i * (TYPE_LENGTH (valtype) / 2),
1502 valtype);
1503 }
1504 }
1505 }
1506 return RETURN_VALUE_REGISTER_CONVENTION;
1507 }
1508 /* Big complex values get stored in f1:f4. */
1509 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
1510 {
1511 if (regcache != NULL)
1512 {
1513 int i;
1514 for (i = 0; i < 4; i++)
1515 {
1516 if (writebuf != NULL)
1517 regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
1518 (const bfd_byte *) writebuf + i * 8);
1519 if (readbuf != NULL)
1520 regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
1521 (bfd_byte *) readbuf + i * 8);
1522 }
1523 }
1524 return RETURN_VALUE_REGISTER_CONVENTION;
1525 }
1526 return RETURN_VALUE_STRUCT_CONVENTION;
1527 }
1528