1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
38 #include "libbfd.h" /* for bfd_default_set_arch_mach */
39 #include "coff/internal.h" /* for libcoff.h */
40 #include "libcoff.h" /* for xcoff_data */
44 #include "solib-svr4.h"
47 /* If the kernel has to deliver a signal, it pushes a sigcontext
48 structure on the stack and then calls the signal handler, passing
49 the address of the sigcontext in an argument register. Usually
50 the signal handler doesn't save this register, so we have to
51 access the sigcontext structure via an offset from the signal handler
53 The following constants were determined by experimentation on AIX 3.2. */
54 #define SIG_FRAME_PC_OFFSET 96
55 #define SIG_FRAME_LR_OFFSET 108
56 #define SIG_FRAME_FP_OFFSET 284
58 /* To be used by skip_prologue. */
60 struct rs6000_framedata
62 int offset
; /* total size of frame --- the distance
63 by which we decrement sp to allocate
65 int saved_gpr
; /* smallest # of saved gpr */
66 int saved_fpr
; /* smallest # of saved fpr */
67 int saved_vr
; /* smallest # of saved vr */
68 int alloca_reg
; /* alloca register number (frame ptr) */
69 char frameless
; /* true if frameless functions. */
70 char nosavedpc
; /* true if pc not saved. */
71 int gpr_offset
; /* offset of saved gprs from prev sp */
72 int fpr_offset
; /* offset of saved fprs from prev sp */
73 int vr_offset
; /* offset of saved vrs from prev sp */
74 int lr_offset
; /* offset of saved lr */
75 int cr_offset
; /* offset of saved cr */
76 int vrsave_offset
; /* offset of saved vrsave register */
79 /* Description of a single register. */
83 char *name
; /* name of register */
84 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
85 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
86 unsigned char fpr
; /* whether register is floating-point */
89 /* Return the current architecture's gdbarch_tdep structure. */
91 #define TDEP gdbarch_tdep (current_gdbarch)
93 /* Breakpoint shadows for the single step instructions will be kept here. */
95 static struct sstep_breaks
97 /* Address, or 0 if this is not in use. */
99 /* Shadow contents. */
104 /* Hook for determining the TOC address when calling functions in the
105 inferior under AIX. The initialization code in rs6000-nat.c sets
106 this hook to point to find_toc_address. */
108 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
110 /* Hook to set the current architecture when starting a child process.
111 rs6000-nat.c sets this. */
113 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
115 /* Static function prototypes */
117 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
119 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
120 struct rs6000_framedata
*);
121 static void frame_get_saved_regs (struct frame_info
* fi
,
122 struct rs6000_framedata
* fdatap
);
123 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
125 /* Read a LEN-byte address from debugged memory address MEMADDR. */
128 read_memory_addr (CORE_ADDR memaddr
, int len
)
130 return read_memory_unsigned_integer (memaddr
, len
);
134 rs6000_skip_prologue (CORE_ADDR pc
)
136 struct rs6000_framedata frame
;
137 pc
= skip_prologue (pc
, 0, &frame
);
142 /* Fill in fi->saved_regs */
144 struct frame_extra_info
146 /* Functions calling alloca() change the value of the stack
147 pointer. We need to use initial stack pointer (which is saved in
148 r31 by gcc) in such cases. If a compiler emits traceback table,
149 then we should use the alloca register specified in traceback
151 CORE_ADDR initial_sp
; /* initial stack pointer. */
155 rs6000_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
157 fi
->extra_info
= (struct frame_extra_info
*)
158 frame_obstack_alloc (sizeof (struct frame_extra_info
));
159 fi
->extra_info
->initial_sp
= 0;
160 if (fi
->next
!= (CORE_ADDR
) 0
161 && fi
->pc
< TEXT_SEGMENT_BASE
)
162 /* We're in get_prev_frame */
163 /* and this is a special signal frame. */
164 /* (fi->pc will be some low address in the kernel, */
165 /* to which the signal handler returns). */
166 fi
->signal_handler_caller
= 1;
169 /* Put here the code to store, into a struct frame_saved_regs,
170 the addresses of the saved registers of frame described by FRAME_INFO.
171 This includes special registers such as pc and fp saved in special
172 ways in the stack frame. sp is even more special:
173 the address we return for it IS the sp for the next frame. */
175 /* In this implementation for RS/6000, we do *not* save sp. I am
176 not sure if it will be needed. The following function takes care of gpr's
180 rs6000_frame_init_saved_regs (struct frame_info
*fi
)
182 frame_get_saved_regs (fi
, NULL
);
186 rs6000_frame_args_address (struct frame_info
*fi
)
188 if (fi
->extra_info
->initial_sp
!= 0)
189 return fi
->extra_info
->initial_sp
;
191 return frame_initial_stack_address (fi
);
194 /* Immediately after a function call, return the saved pc.
195 Can't go through the frames for this because on some machines
196 the new frame is not set up until the new function executes
197 some instructions. */
200 rs6000_saved_pc_after_call (struct frame_info
*fi
)
202 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
205 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
208 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
215 absolute
= (int) ((instr
>> 1) & 1);
220 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
224 dest
= pc
+ immediate
;
228 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
232 dest
= pc
+ immediate
;
236 ext_op
= (instr
>> 1) & 0x3ff;
238 if (ext_op
== 16) /* br conditional register */
240 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
242 /* If we are about to return from a signal handler, dest is
243 something like 0x3c90. The current frame is a signal handler
244 caller frame, upon completion of the sigreturn system call
245 execution will return to the saved PC in the frame. */
246 if (dest
< TEXT_SEGMENT_BASE
)
248 struct frame_info
*fi
;
250 fi
= get_current_frame ();
252 dest
= read_memory_addr (fi
->frame
+ SIG_FRAME_PC_OFFSET
,
257 else if (ext_op
== 528) /* br cond to count reg */
259 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
261 /* If we are about to execute a system call, dest is something
262 like 0x22fc or 0x3b00. Upon completion the system call
263 will return to the address in the link register. */
264 if (dest
< TEXT_SEGMENT_BASE
)
265 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
274 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
278 /* Sequence of bytes for breakpoint instruction. */
280 #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
281 #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
283 static unsigned char *
284 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
286 static unsigned char big_breakpoint
[] = BIG_BREAKPOINT
;
287 static unsigned char little_breakpoint
[] = LITTLE_BREAKPOINT
;
289 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
290 return big_breakpoint
;
292 return little_breakpoint
;
296 /* AIX does not support PT_STEP. Simulate it. */
299 rs6000_software_single_step (enum target_signal signal
,
300 int insert_breakpoints_p
)
304 char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
310 if (insert_breakpoints_p
)
315 insn
= read_memory_integer (loc
, 4);
317 breaks
[0] = loc
+ breakp_sz
;
319 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
321 /* Don't put two breakpoints on the same address. */
322 if (breaks
[1] == breaks
[0])
325 stepBreaks
[1].address
= 0;
327 for (ii
= 0; ii
< 2; ++ii
)
330 /* ignore invalid breakpoint. */
331 if (breaks
[ii
] == -1)
333 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
334 stepBreaks
[ii
].address
= breaks
[ii
];
341 /* remove step breakpoints. */
342 for (ii
= 0; ii
< 2; ++ii
)
343 if (stepBreaks
[ii
].address
!= 0)
344 target_remove_breakpoint (stepBreaks
[ii
].address
,
345 stepBreaks
[ii
].data
);
347 errno
= 0; /* FIXME, don't ignore errors! */
348 /* What errors? {read,write}_memory call error(). */
352 /* return pc value after skipping a function prologue and also return
353 information about a function frame.
355 in struct rs6000_framedata fdata:
356 - frameless is TRUE, if function does not have a frame.
357 - nosavedpc is TRUE, if function does not save %pc value in its frame.
358 - offset is the initial size of this stack frame --- the amount by
359 which we decrement the sp to allocate the frame.
360 - saved_gpr is the number of the first saved gpr.
361 - saved_fpr is the number of the first saved fpr.
362 - saved_vr is the number of the first saved vr.
363 - alloca_reg is the number of the register used for alloca() handling.
365 - gpr_offset is the offset of the first saved gpr from the previous frame.
366 - fpr_offset is the offset of the first saved fpr from the previous frame.
367 - vr_offset is the offset of the first saved vr from the previous frame.
368 - lr_offset is the offset of the saved lr
369 - cr_offset is the offset of the saved cr
370 - vrsave_offset is the offset of the saved vrsave register
373 #define SIGNED_SHORT(x) \
374 ((sizeof (short) == 2) \
375 ? ((int)(short)(x)) \
376 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
378 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
380 /* Limit the number of skipped non-prologue instructions, as the examining
381 of the prologue is expensive. */
382 static int max_skip_non_prologue_insns
= 10;
384 /* Given PC representing the starting address of a function, and
385 LIM_PC which is the (sloppy) limit to which to scan when looking
386 for a prologue, attempt to further refine this limit by using
387 the line data in the symbol table. If successful, a better guess
388 on where the prologue ends is returned, otherwise the previous
389 value of lim_pc is returned. */
391 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
393 struct symtab_and_line prologue_sal
;
395 prologue_sal
= find_pc_line (pc
, 0);
396 if (prologue_sal
.line
!= 0)
399 CORE_ADDR addr
= prologue_sal
.end
;
401 /* Handle the case in which compiler's optimizer/scheduler
402 has moved instructions into the prologue. We scan ahead
403 in the function looking for address ranges whose corresponding
404 line number is less than or equal to the first one that we
405 found for the function. (It can be less than when the
406 scheduler puts a body instruction before the first prologue
408 for (i
= 2 * max_skip_non_prologue_insns
;
409 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
412 struct symtab_and_line sal
;
414 sal
= find_pc_line (addr
, 0);
417 if (sal
.line
<= prologue_sal
.line
418 && sal
.symtab
== prologue_sal
.symtab
)
425 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
426 lim_pc
= prologue_sal
.end
;
433 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
435 CORE_ADDR orig_pc
= pc
;
436 CORE_ADDR last_prologue_pc
= pc
;
437 CORE_ADDR li_found_pc
= 0;
441 long vr_saved_offset
= 0;
448 int minimal_toc_loaded
= 0;
449 int prev_insn_was_prologue_insn
= 1;
450 int num_skip_non_prologue_insns
= 0;
452 /* Attempt to find the end of the prologue when no limit is specified.
453 Note that refine_prologue_limit() has been written so that it may
454 be used to "refine" the limits of non-zero PC values too, but this
455 is only safe if we 1) trust the line information provided by the
456 compiler and 2) iterate enough to actually find the end of the
459 It may become a good idea at some point (for both performance and
460 accuracy) to unconditionally call refine_prologue_limit(). But,
461 until we can make a clear determination that this is beneficial,
462 we'll play it safe and only use it to obtain a limit when none
463 has been specified. */
465 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
467 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
468 fdata
->saved_gpr
= -1;
469 fdata
->saved_fpr
= -1;
470 fdata
->saved_vr
= -1;
471 fdata
->alloca_reg
= -1;
472 fdata
->frameless
= 1;
473 fdata
->nosavedpc
= 1;
477 /* Sometimes it isn't clear if an instruction is a prologue
478 instruction or not. When we encounter one of these ambiguous
479 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
480 Otherwise, we'll assume that it really is a prologue instruction. */
481 if (prev_insn_was_prologue_insn
)
482 last_prologue_pc
= pc
;
484 /* Stop scanning if we've hit the limit. */
485 if (lim_pc
!= 0 && pc
>= lim_pc
)
488 prev_insn_was_prologue_insn
= 1;
490 /* Fetch the instruction and convert it to an integer. */
491 if (target_read_memory (pc
, buf
, 4))
493 op
= extract_signed_integer (buf
, 4);
495 if ((op
& 0xfc1fffff) == 0x7c0802a6)
497 lr_reg
= (op
& 0x03e00000) | 0x90010000;
501 else if ((op
& 0xfc1fffff) == 0x7c000026)
503 cr_reg
= (op
& 0x03e00000) | 0x90010000;
507 else if ((op
& 0xfc1f0000) == 0xd8010000)
508 { /* stfd Rx,NUM(r1) */
509 reg
= GET_SRC_REG (op
);
510 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
512 fdata
->saved_fpr
= reg
;
513 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
518 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
519 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
520 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
521 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
524 reg
= GET_SRC_REG (op
);
525 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
527 fdata
->saved_gpr
= reg
;
528 if ((op
& 0xfc1f0003) == 0xf8010000)
530 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
535 else if ((op
& 0xffff0000) == 0x60000000)
538 /* Allow nops in the prologue, but do not consider them to
539 be part of the prologue unless followed by other prologue
541 prev_insn_was_prologue_insn
= 0;
545 else if ((op
& 0xffff0000) == 0x3c000000)
546 { /* addis 0,0,NUM, used
548 fdata
->offset
= (op
& 0x0000ffff) << 16;
549 fdata
->frameless
= 0;
553 else if ((op
& 0xffff0000) == 0x60000000)
554 { /* ori 0,0,NUM, 2nd ha
555 lf of >= 32k frames */
556 fdata
->offset
|= (op
& 0x0000ffff);
557 fdata
->frameless
= 0;
561 else if (lr_reg
!= -1 && (op
& 0xffff0000) == lr_reg
)
564 fdata
->lr_offset
= SIGNED_SHORT (op
) + offset
;
565 fdata
->nosavedpc
= 0;
570 else if (cr_reg
!= -1 && (op
& 0xffff0000) == cr_reg
)
573 fdata
->cr_offset
= SIGNED_SHORT (op
) + offset
;
578 else if (op
== 0x48000005)
584 else if (op
== 0x48000004)
589 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
590 in V.4 -mminimal-toc */
591 (op
& 0xffff0000) == 0x3bde0000)
592 { /* addi 30,30,foo@l */
596 else if ((op
& 0xfc000001) == 0x48000001)
600 fdata
->frameless
= 0;
601 /* Don't skip over the subroutine call if it is not within
602 the first three instructions of the prologue. */
603 if ((pc
- orig_pc
) > 8)
606 op
= read_memory_integer (pc
+ 4, 4);
608 /* At this point, make sure this is not a trampoline
609 function (a function that simply calls another functions,
610 and nothing else). If the next is not a nop, this branch
611 was part of the function prologue. */
613 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
614 break; /* don't skip over
618 /* update stack pointer */
620 else if ((op
& 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
621 (op
& 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
623 fdata
->frameless
= 0;
624 if ((op
& 0xffff0003) == 0xf8210001)
626 fdata
->offset
= SIGNED_SHORT (op
);
627 offset
= fdata
->offset
;
631 else if (op
== 0x7c21016e)
633 fdata
->frameless
= 0;
634 offset
= fdata
->offset
;
637 /* Load up minimal toc pointer */
639 else if ((op
>> 22) == 0x20f
640 && !minimal_toc_loaded
)
641 { /* l r31,... or l r30,... */
642 minimal_toc_loaded
= 1;
645 /* move parameters from argument registers to local variable
648 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
649 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
650 (((op
>> 21) & 31) <= 10) &&
651 (((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
655 /* store parameters in stack */
657 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
658 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
659 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
663 /* store parameters in stack via frame pointer */
666 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
667 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
668 (op
& 0xfc1f0000) == 0xfc1f0000))
669 { /* frsp, fp?,NUM(r1) */
672 /* Set up frame pointer */
674 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
677 fdata
->frameless
= 0;
679 fdata
->alloca_reg
= 31;
682 /* Another way to set up the frame pointer. */
684 else if ((op
& 0xfc1fffff) == 0x38010000)
685 { /* addi rX, r1, 0x0 */
686 fdata
->frameless
= 0;
688 fdata
->alloca_reg
= (op
& ~0x38010000) >> 21;
691 /* AltiVec related instructions. */
692 /* Store the vrsave register (spr 256) in another register for
693 later manipulation, or load a register into the vrsave
694 register. 2 instructions are used: mfvrsave and
695 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
696 and mtspr SPR256, Rn. */
697 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
698 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
699 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
701 vrsave_reg
= GET_SRC_REG (op
);
704 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
708 /* Store the register where vrsave was saved to onto the stack:
709 rS is the register where vrsave was stored in a previous
711 /* 100100 sssss 00001 dddddddd dddddddd */
712 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
714 if (vrsave_reg
== GET_SRC_REG (op
))
716 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
721 /* Compute the new value of vrsave, by modifying the register
722 where vrsave was saved to. */
723 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
724 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
728 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
729 in a pair of insns to save the vector registers on the
731 /* 001110 00000 00000 iiii iiii iiii iiii */
732 else if ((op
& 0xffff0000) == 0x38000000) /* li r0, SIMM */
735 vr_saved_offset
= SIGNED_SHORT (op
);
737 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
738 /* 011111 sssss 11111 00000 00111001110 */
739 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
741 if (pc
== (li_found_pc
+ 4))
743 vr_reg
= GET_SRC_REG (op
);
744 /* If this is the first vector reg to be saved, or if
745 it has a lower number than others previously seen,
746 reupdate the frame info. */
747 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
749 fdata
->saved_vr
= vr_reg
;
750 fdata
->vr_offset
= vr_saved_offset
+ offset
;
752 vr_saved_offset
= -1;
757 /* End AltiVec related instructions. */
760 /* Not a recognized prologue instruction.
761 Handle optimizer code motions into the prologue by continuing
762 the search if we have no valid frame yet or if the return
763 address is not yet saved in the frame. */
764 if (fdata
->frameless
== 0
765 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
768 if (op
== 0x4e800020 /* blr */
769 || op
== 0x4e800420) /* bctr */
770 /* Do not scan past epilogue in frameless functions or
773 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
774 /* Never skip branches. */
777 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
778 /* Do not scan too many insns, scanning insns is expensive with
782 /* Continue scanning. */
783 prev_insn_was_prologue_insn
= 0;
789 /* I have problems with skipping over __main() that I need to address
790 * sometime. Previously, I used to use misc_function_vector which
791 * didn't work as well as I wanted to be. -MGO */
793 /* If the first thing after skipping a prolog is a branch to a function,
794 this might be a call to an initializer in main(), introduced by gcc2.
795 We'd like to skip over it as well. Fortunately, xlc does some extra
796 work before calling a function right after a prologue, thus we can
797 single out such gcc2 behaviour. */
800 if ((op
& 0xfc000001) == 0x48000001)
801 { /* bl foo, an initializer function? */
802 op
= read_memory_integer (pc
+ 4, 4);
804 if (op
== 0x4def7b82)
805 { /* cror 0xf, 0xf, 0xf (nop) */
807 /* check and see if we are in main. If so, skip over this initializer
810 tmp
= find_pc_misc_function (pc
);
811 if (tmp
>= 0 && STREQ (misc_function_vector
[tmp
].name
, main_name ()))
817 fdata
->offset
= -fdata
->offset
;
818 return last_prologue_pc
;
822 /*************************************************************************
823 Support for creating pushing a dummy frame into the stack, and popping
825 *************************************************************************/
828 /* Pop the innermost frame, go back to the caller. */
831 rs6000_pop_frame (void)
833 CORE_ADDR pc
, lr
, sp
, prev_sp
, addr
; /* %pc, %lr, %sp */
834 struct rs6000_framedata fdata
;
835 struct frame_info
*frame
= get_current_frame ();
839 sp
= FRAME_FP (frame
);
841 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
843 generic_pop_dummy_frame ();
844 flush_cached_frames ();
848 /* Make sure that all registers are valid. */
849 read_register_bytes (0, NULL
, REGISTER_BYTES
);
851 /* figure out previous %pc value. If the function is frameless, it is
852 still in the link register, otherwise walk the frames and retrieve the
853 saved %pc value in the previous frame. */
855 addr
= get_pc_function_start (frame
->pc
);
856 (void) skip_prologue (addr
, frame
->pc
, &fdata
);
858 wordsize
= TDEP
->wordsize
;
862 prev_sp
= read_memory_addr (sp
, wordsize
);
863 if (fdata
.lr_offset
== 0)
864 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
866 lr
= read_memory_addr (prev_sp
+ fdata
.lr_offset
, wordsize
);
868 /* reset %pc value. */
869 write_register (PC_REGNUM
, lr
);
871 /* reset register values if any was saved earlier. */
873 if (fdata
.saved_gpr
!= -1)
875 addr
= prev_sp
+ fdata
.gpr_offset
;
876 for (ii
= fdata
.saved_gpr
; ii
<= 31; ++ii
)
878 read_memory (addr
, ®isters
[REGISTER_BYTE (ii
)], wordsize
);
883 if (fdata
.saved_fpr
!= -1)
885 addr
= prev_sp
+ fdata
.fpr_offset
;
886 for (ii
= fdata
.saved_fpr
; ii
<= 31; ++ii
)
888 read_memory (addr
, ®isters
[REGISTER_BYTE (ii
+ FP0_REGNUM
)], 8);
893 write_register (SP_REGNUM
, prev_sp
);
894 target_store_registers (-1);
895 flush_cached_frames ();
898 /* Fixup the call sequence of a dummy function, with the real function
899 address. Its arguments will be passed by gdb. */
902 rs6000_fix_call_dummy (char *dummyname
, CORE_ADDR pc
, CORE_ADDR fun
,
903 int nargs
, struct value
**args
, struct type
*type
,
907 CORE_ADDR target_addr
;
909 if (rs6000_find_toc_address_hook
!= NULL
)
911 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (fun
);
912 write_register (gdbarch_tdep (current_gdbarch
)->ppc_toc_regnum
,
917 /* Pass the arguments in either registers, or in the stack. In RS/6000,
918 the first eight words of the argument list (that might be less than
919 eight parameters if some parameters occupy more than one word) are
920 passed in r3..r10 registers. float and double parameters are
921 passed in fpr's, in addition to that. Rest of the parameters if any
922 are passed in user stack. There might be cases in which half of the
923 parameter is copied into registers, the other half is pushed into
926 Stack must be aligned on 64-bit boundaries when synthesizing
929 If the function is returning a structure, then the return address is passed
930 in r3, then the first 7 words of the parameters can be passed in registers,
934 rs6000_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
935 int struct_return
, CORE_ADDR struct_addr
)
939 int argno
; /* current argument number */
940 int argbytes
; /* current argument byte */
942 int f_argno
= 0; /* current floating point argno */
943 int wordsize
= TDEP
->wordsize
;
945 struct value
*arg
= 0;
950 /* The first eight words of ther arguments are passed in registers. Copy
953 If the function is returning a `struct', then the first word (which
954 will be passed in r3) is used for struct return address. In that
955 case we should advance one word and start from r4 register to copy
958 ii
= struct_return
? 1 : 0;
961 effectively indirect call... gcc does...
963 return_val example( float, int);
966 float in fp0, int in r3
967 offset of stack on overflow 8/16
968 for varargs, must go by type.
970 float in r3&r4, int in r5
971 offset of stack on overflow different
973 return in r3 or f0. If no float, must study how gcc emulates floats;
974 pay attention to arg promotion.
975 User may have to cast\args to handle promotion correctly
976 since gdb won't know if prototype supplied or not.
979 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
981 int reg_size
= REGISTER_RAW_SIZE (ii
+ 3);
984 type
= check_typedef (VALUE_TYPE (arg
));
985 len
= TYPE_LENGTH (type
);
987 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
990 /* floating point arguments are passed in fpr's, as well as gpr's.
991 There are 13 fpr's reserved for passing parameters. At this point
992 there is no way we would run out of them. */
996 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
998 memcpy (®isters
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
999 VALUE_CONTENTS (arg
),
1007 /* Argument takes more than one register. */
1008 while (argbytes
< len
)
1010 memset (®isters
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1011 memcpy (®isters
[REGISTER_BYTE (ii
+ 3)],
1012 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1013 (len
- argbytes
) > reg_size
1014 ? reg_size
: len
- argbytes
);
1015 ++ii
, argbytes
+= reg_size
;
1018 goto ran_out_of_registers_for_arguments
;
1024 { /* Argument can fit in one register. No problem. */
1025 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1026 memset (®isters
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1027 memcpy ((char *)®isters
[REGISTER_BYTE (ii
+ 3)] + adj
,
1028 VALUE_CONTENTS (arg
), len
);
1033 ran_out_of_registers_for_arguments
:
1035 saved_sp
= read_sp ();
1037 /* location for 8 parameters are always reserved. */
1040 /* another six words for back chain, TOC register, link register, etc. */
1043 /* stack pointer must be quadword aligned */
1046 /* if there are more arguments, allocate space for them in
1047 the stack, then push them starting from the ninth one. */
1049 if ((argno
< nargs
) || argbytes
)
1055 space
+= ((len
- argbytes
+ 3) & -4);
1061 for (; jj
< nargs
; ++jj
)
1063 struct value
*val
= args
[jj
];
1064 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1067 /* add location required for the rest of the parameters */
1068 space
= (space
+ 15) & -16;
1071 /* This is another instance we need to be concerned about securing our
1072 stack space. If we write anything underneath %sp (r1), we might conflict
1073 with the kernel who thinks he is free to use this area. So, update %sp
1074 first before doing anything else. */
1076 write_register (SP_REGNUM
, sp
);
1078 /* if the last argument copied into the registers didn't fit there
1079 completely, push the rest of it into stack. */
1083 write_memory (sp
+ 24 + (ii
* 4),
1084 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1087 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1090 /* push the rest of the arguments into stack. */
1091 for (; argno
< nargs
; ++argno
)
1095 type
= check_typedef (VALUE_TYPE (arg
));
1096 len
= TYPE_LENGTH (type
);
1099 /* float types should be passed in fpr's, as well as in the stack. */
1100 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1105 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1107 memcpy (®isters
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1108 VALUE_CONTENTS (arg
),
1113 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1114 ii
+= ((len
+ 3) & -4) / 4;
1118 /* Secure stack areas first, before doing anything else. */
1119 write_register (SP_REGNUM
, sp
);
1121 /* set back chain properly */
1122 store_address (tmp_buffer
, 4, saved_sp
);
1123 write_memory (sp
, tmp_buffer
, 4);
1125 target_store_registers (-1);
1129 /* Function: ppc_push_return_address (pc, sp)
1130 Set up the return address for the inferior function call. */
1133 ppc_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1135 write_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
,
1136 CALL_DUMMY_ADDRESS ());
1140 /* Extract a function return value of type TYPE from raw register array
1141 REGBUF, and copy that return value into VALBUF in virtual format. */
1144 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1148 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1153 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1154 We need to truncate the return value into float size (4 byte) if
1157 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1159 ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)],
1160 TYPE_LENGTH (valtype
));
1163 memcpy (&dd
, ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1165 memcpy (valbuf
, &ff
, sizeof (float));
1170 /* return value is copied starting from r3. */
1171 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1172 && TYPE_LENGTH (valtype
) < REGISTER_RAW_SIZE (3))
1173 offset
= REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1176 regbuf
+ REGISTER_BYTE (3) + offset
,
1177 TYPE_LENGTH (valtype
));
1181 /* Keep structure return address in this variable.
1182 FIXME: This is a horrid kludge which should not be allowed to continue
1183 living. This only allows a single nested call to a structure-returning
1184 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
1186 static CORE_ADDR rs6000_struct_return_address
;
1188 /* Return whether handle_inferior_event() should proceed through code
1189 starting at PC in function NAME when stepping.
1191 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1192 handle memory references that are too distant to fit in instructions
1193 generated by the compiler. For example, if 'foo' in the following
1198 is greater than 32767, the linker might replace the lwz with a branch to
1199 somewhere in @FIX1 that does the load in 2 instructions and then branches
1200 back to where execution should continue.
1202 GDB should silently step over @FIX code, just like AIX dbx does.
1203 Unfortunately, the linker uses the "b" instruction for the branches,
1204 meaning that the link register doesn't get set. Therefore, GDB's usual
1205 step_over_function() mechanism won't work.
1207 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1208 in handle_inferior_event() to skip past @FIX code. */
1211 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1213 return name
&& !strncmp (name
, "@FIX", 4);
1216 /* Skip code that the user doesn't want to see when stepping:
1218 1. Indirect function calls use a piece of trampoline code to do context
1219 switching, i.e. to set the new TOC table. Skip such code if we are on
1220 its first instruction (as when we have single-stepped to here).
1222 2. Skip shared library trampoline code (which is different from
1223 indirect function call trampolines).
1225 3. Skip bigtoc fixup code.
1227 Result is desired PC to step until, or NULL if we are not in
1228 code that should be skipped. */
1231 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1233 register unsigned int ii
, op
;
1235 CORE_ADDR solib_target_pc
;
1236 struct minimal_symbol
*msymbol
;
1238 static unsigned trampoline_code
[] =
1240 0x800b0000, /* l r0,0x0(r11) */
1241 0x90410014, /* st r2,0x14(r1) */
1242 0x7c0903a6, /* mtctr r0 */
1243 0x804b0004, /* l r2,0x4(r11) */
1244 0x816b0008, /* l r11,0x8(r11) */
1245 0x4e800420, /* bctr */
1246 0x4e800020, /* br */
1250 /* Check for bigtoc fixup code. */
1251 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1252 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, SYMBOL_NAME (msymbol
)))
1254 /* Double-check that the third instruction from PC is relative "b". */
1255 op
= read_memory_integer (pc
+ 8, 4);
1256 if ((op
& 0xfc000003) == 0x48000000)
1258 /* Extract bits 6-29 as a signed 24-bit relative word address and
1259 add it to the containing PC. */
1260 rel
= ((int)(op
<< 6) >> 6);
1261 return pc
+ 8 + rel
;
1265 /* If pc is in a shared library trampoline, return its target. */
1266 solib_target_pc
= find_solib_trampoline_target (pc
);
1267 if (solib_target_pc
)
1268 return solib_target_pc
;
1270 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1272 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1273 if (op
!= trampoline_code
[ii
])
1276 ii
= read_register (11); /* r11 holds destination addr */
1277 pc
= read_memory_addr (ii
, TDEP
->wordsize
); /* (r11) value */
1281 /* Determines whether the function FI has a frame on the stack or not. */
1284 rs6000_frameless_function_invocation (struct frame_info
*fi
)
1286 CORE_ADDR func_start
;
1287 struct rs6000_framedata fdata
;
1289 /* Don't even think about framelessness except on the innermost frame
1290 or if the function was interrupted by a signal. */
1291 if (fi
->next
!= NULL
&& !fi
->next
->signal_handler_caller
)
1294 func_start
= get_pc_function_start (fi
->pc
);
1296 /* If we failed to find the start of the function, it is a mistake
1297 to inspect the instructions. */
1301 /* A frame with a zero PC is usually created by dereferencing a NULL
1302 function pointer, normally causing an immediate core dump of the
1303 inferior. Mark function as frameless, as the inferior has no chance
1304 of setting up a stack frame. */
1311 (void) skip_prologue (func_start
, fi
->pc
, &fdata
);
1312 return fdata
.frameless
;
1315 /* Return the PC saved in a frame */
1318 rs6000_frame_saved_pc (struct frame_info
*fi
)
1320 CORE_ADDR func_start
;
1321 struct rs6000_framedata fdata
;
1322 struct gdbarch_tdep
*tdep
= TDEP
;
1323 int wordsize
= tdep
->wordsize
;
1325 if (fi
->signal_handler_caller
)
1326 return read_memory_addr (fi
->frame
+ SIG_FRAME_PC_OFFSET
, wordsize
);
1328 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1329 return generic_read_register_dummy (fi
->pc
, fi
->frame
, PC_REGNUM
);
1331 func_start
= get_pc_function_start (fi
->pc
);
1333 /* If we failed to find the start of the function, it is a mistake
1334 to inspect the instructions. */
1338 (void) skip_prologue (func_start
, fi
->pc
, &fdata
);
1340 if (fdata
.lr_offset
== 0 && fi
->next
!= NULL
)
1342 if (fi
->next
->signal_handler_caller
)
1343 return read_memory_addr (fi
->next
->frame
+ SIG_FRAME_LR_OFFSET
,
1346 return read_memory_addr (FRAME_CHAIN (fi
) + tdep
->lr_frame_offset
,
1350 if (fdata
.lr_offset
== 0)
1351 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1353 return read_memory_addr (FRAME_CHAIN (fi
) + fdata
.lr_offset
, wordsize
);
1356 /* If saved registers of frame FI are not known yet, read and cache them.
1357 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1358 in which case the framedata are read. */
1361 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1363 CORE_ADDR frame_addr
;
1364 struct rs6000_framedata work_fdata
;
1365 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1366 int wordsize
= tdep
->wordsize
;
1373 fdatap
= &work_fdata
;
1374 (void) skip_prologue (get_pc_function_start (fi
->pc
), fi
->pc
, fdatap
);
1377 frame_saved_regs_zalloc (fi
);
1379 /* If there were any saved registers, figure out parent's stack
1381 /* The following is true only if the frame doesn't have a call to
1384 if (fdatap
->saved_fpr
== 0
1385 && fdatap
->saved_gpr
== 0
1386 && fdatap
->saved_vr
== 0
1387 && fdatap
->lr_offset
== 0
1388 && fdatap
->cr_offset
== 0
1389 && fdatap
->vr_offset
== 0)
1391 else if (fi
->prev
&& fi
->prev
->frame
)
1392 frame_addr
= fi
->prev
->frame
;
1394 frame_addr
= read_memory_addr (fi
->frame
, wordsize
);
1396 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1397 All fpr's from saved_fpr to fp31 are saved. */
1399 if (fdatap
->saved_fpr
>= 0)
1402 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1403 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1405 fi
->saved_regs
[FP0_REGNUM
+ i
] = fpr_addr
;
1410 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1411 All gpr's from saved_gpr to gpr31 are saved. */
1413 if (fdatap
->saved_gpr
>= 0)
1416 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1417 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1419 fi
->saved_regs
[i
] = gpr_addr
;
1420 gpr_addr
+= wordsize
;
1424 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1425 All vr's from saved_vr to vr31 are saved. */
1426 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1428 if (fdatap
->saved_vr
>= 0)
1431 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1432 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1434 fi
->saved_regs
[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1435 vr_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1440 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1442 if (fdatap
->cr_offset
!= 0)
1443 fi
->saved_regs
[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1445 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1447 if (fdatap
->lr_offset
!= 0)
1448 fi
->saved_regs
[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1450 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1452 if (fdatap
->vrsave_offset
!= 0)
1453 fi
->saved_regs
[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1456 /* Return the address of a frame. This is the inital %sp value when the frame
1457 was first allocated. For functions calling alloca(), it might be saved in
1458 an alloca register. */
1461 frame_initial_stack_address (struct frame_info
*fi
)
1464 struct rs6000_framedata fdata
;
1465 struct frame_info
*callee_fi
;
1467 /* if the initial stack pointer (frame address) of this frame is known,
1470 if (fi
->extra_info
->initial_sp
)
1471 return fi
->extra_info
->initial_sp
;
1473 /* find out if this function is using an alloca register.. */
1475 (void) skip_prologue (get_pc_function_start (fi
->pc
), fi
->pc
, &fdata
);
1477 /* if saved registers of this frame are not known yet, read and cache them. */
1479 if (!fi
->saved_regs
)
1480 frame_get_saved_regs (fi
, &fdata
);
1482 /* If no alloca register used, then fi->frame is the value of the %sp for
1483 this frame, and it is good enough. */
1485 if (fdata
.alloca_reg
< 0)
1487 fi
->extra_info
->initial_sp
= fi
->frame
;
1488 return fi
->extra_info
->initial_sp
;
1491 /* This function has an alloca register. If this is the top-most frame
1492 (with the lowest address), the value in alloca register is good. */
1495 return fi
->extra_info
->initial_sp
= read_register (fdata
.alloca_reg
);
1497 /* Otherwise, this is a caller frame. Callee has usually already saved
1498 registers, but there are exceptions (such as when the callee
1499 has no parameters). Find the address in which caller's alloca
1500 register is saved. */
1502 for (callee_fi
= fi
->next
; callee_fi
; callee_fi
= callee_fi
->next
)
1505 if (!callee_fi
->saved_regs
)
1506 frame_get_saved_regs (callee_fi
, NULL
);
1508 /* this is the address in which alloca register is saved. */
1510 tmpaddr
= callee_fi
->saved_regs
[fdata
.alloca_reg
];
1513 fi
->extra_info
->initial_sp
=
1514 read_memory_addr (tmpaddr
, TDEP
->wordsize
);
1515 return fi
->extra_info
->initial_sp
;
1518 /* Go look into deeper levels of the frame chain to see if any one of
1519 the callees has saved alloca register. */
1522 /* If alloca register was not saved, by the callee (or any of its callees)
1523 then the value in the register is still good. */
1525 fi
->extra_info
->initial_sp
= read_register (fdata
.alloca_reg
);
1526 return fi
->extra_info
->initial_sp
;
1529 /* Describe the pointer in each stack frame to the previous stack frame
1532 /* FRAME_CHAIN takes a frame's nominal address
1533 and produces the frame's chain-pointer. */
1535 /* In the case of the RS/6000, the frame's nominal address
1536 is the address of a 4-byte word containing the calling frame's address. */
1539 rs6000_frame_chain (struct frame_info
*thisframe
)
1541 CORE_ADDR fp
, fpp
, lr
;
1542 int wordsize
= TDEP
->wordsize
;
1544 if (PC_IN_CALL_DUMMY (thisframe
->pc
, thisframe
->frame
, thisframe
->frame
))
1545 return thisframe
->frame
; /* dummy frame same as caller's frame */
1547 if (inside_entry_file (thisframe
->pc
) ||
1548 thisframe
->pc
== entry_point_address ())
1551 if (thisframe
->signal_handler_caller
)
1552 fp
= read_memory_addr (thisframe
->frame
+ SIG_FRAME_FP_OFFSET
,
1554 else if (thisframe
->next
!= NULL
1555 && thisframe
->next
->signal_handler_caller
1556 && FRAMELESS_FUNCTION_INVOCATION (thisframe
))
1557 /* A frameless function interrupted by a signal did not change the
1559 fp
= FRAME_FP (thisframe
);
1561 fp
= read_memory_addr ((thisframe
)->frame
, wordsize
);
1563 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1564 if (lr
== entry_point_address ())
1565 if (fp
!= 0 && (fpp
= read_memory_addr (fp
, wordsize
)) != 0)
1566 if (PC_IN_CALL_DUMMY (lr
, fpp
, fpp
))
1572 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1573 isn't available with that word size, return 0. */
1576 regsize (const struct reg
*reg
, int wordsize
)
1578 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1581 /* Return the name of register number N, or null if no such register exists
1582 in the current architecture. */
1585 rs6000_register_name (int n
)
1587 struct gdbarch_tdep
*tdep
= TDEP
;
1588 const struct reg
*reg
= tdep
->regs
+ n
;
1590 if (!regsize (reg
, tdep
->wordsize
))
1595 /* Index within `registers' of the first byte of the space for
1599 rs6000_register_byte (int n
)
1601 return TDEP
->regoff
[n
];
1604 /* Return the number of bytes of storage in the actual machine representation
1605 for register N if that register is available, else return 0. */
1608 rs6000_register_raw_size (int n
)
1610 struct gdbarch_tdep
*tdep
= TDEP
;
1611 const struct reg
*reg
= tdep
->regs
+ n
;
1612 return regsize (reg
, tdep
->wordsize
);
1615 /* Return the GDB type object for the "standard" data type
1616 of data in register N. */
1618 static struct type
*
1619 rs6000_register_virtual_type (int n
)
1621 struct gdbarch_tdep
*tdep
= TDEP
;
1622 const struct reg
*reg
= tdep
->regs
+ n
;
1625 return builtin_type_double
;
1628 int size
= regsize (reg
, tdep
->wordsize
);
1632 return builtin_type_int64
;
1635 return builtin_type_vec128
;
1638 return builtin_type_int32
;
1644 /* For the PowerPC, it appears that the debug info marks float parameters as
1645 floats regardless of whether the function is prototyped, but the actual
1646 values are always passed in as doubles. Tell gdb to always assume that
1647 floats are passed as doubles and then converted in the callee. */
1650 rs6000_coerce_float_to_double (struct type
*formal
, struct type
*actual
)
1655 /* Return whether register N requires conversion when moving from raw format
1658 The register format for RS/6000 floating point registers is always
1659 double, we need a conversion if the memory format is float. */
1662 rs6000_register_convertible (int n
)
1664 const struct reg
*reg
= TDEP
->regs
+ n
;
1668 /* Convert data from raw format for register N in buffer FROM
1669 to virtual format with type TYPE in buffer TO. */
1672 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1673 char *from
, char *to
)
1675 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1677 double val
= extract_floating (from
, REGISTER_RAW_SIZE (n
));
1678 store_floating (to
, TYPE_LENGTH (type
), val
);
1681 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1684 /* Convert data from virtual format with type TYPE in buffer FROM
1685 to raw format for register N in buffer TO. */
1688 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1689 char *from
, char *to
)
1691 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1693 double val
= extract_floating (from
, TYPE_LENGTH (type
));
1694 store_floating (to
, REGISTER_RAW_SIZE (n
), val
);
1697 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1701 altivec_register_p (int regno
)
1703 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1704 if (tdep
->ppc_vr0_regnum
< 0 || tdep
->ppc_vrsave_regnum
< 0)
1707 return (regno
>= tdep
->ppc_vr0_regnum
&& regno
<= tdep
->ppc_vrsave_regnum
);
1711 rs6000_do_altivec_registers (int regnum
)
1714 char *raw_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1715 char *virtual_buffer
= (char*) alloca (MAX_REGISTER_VIRTUAL_SIZE
);
1716 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1718 for (i
= tdep
->ppc_vr0_regnum
; i
<= tdep
->ppc_vrsave_regnum
; i
++)
1720 /* If we want just one reg, check that this is the one we want. */
1721 if (regnum
!= -1 && i
!= regnum
)
1724 /* If the register name is empty, it is undefined for this
1725 processor, so don't display anything. */
1726 if (REGISTER_NAME (i
) == NULL
|| *(REGISTER_NAME (i
)) == '\0')
1729 fputs_filtered (REGISTER_NAME (i
), gdb_stdout
);
1730 print_spaces_filtered (15 - strlen (REGISTER_NAME (i
)), gdb_stdout
);
1732 /* Get the data in raw format. */
1733 if (!frame_register_read (selected_frame
, i
, raw_buffer
))
1735 printf_filtered ("*value not available*\n");
1739 /* Convert raw data to virtual format if necessary. */
1740 if (REGISTER_CONVERTIBLE (i
))
1741 REGISTER_CONVERT_TO_VIRTUAL (i
, REGISTER_VIRTUAL_TYPE (i
),
1742 raw_buffer
, virtual_buffer
);
1744 memcpy (virtual_buffer
, raw_buffer
, REGISTER_VIRTUAL_SIZE (i
));
1746 /* Print as integer in hex only. */
1747 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
1748 gdb_stdout
, 'x', 1, 0, Val_pretty_default
);
1749 printf_filtered ("\n");
1754 rs6000_altivec_registers_info (char *addr_exp
, int from_tty
)
1756 int regnum
, numregs
;
1759 if (!target_has_registers
)
1760 error ("The program has no registers now.");
1761 if (selected_frame
== NULL
)
1762 error ("No selected frame.");
1766 rs6000_do_altivec_registers (-1);
1770 numregs
= NUM_REGS
+ NUM_PSEUDO_REGS
;
1773 if (addr_exp
[0] == '$')
1776 while (*end
!= '\0' && *end
!= ' ' && *end
!= '\t')
1779 regnum
= target_map_name_to_register (addr_exp
, end
- addr_exp
);
1783 if (*addr_exp
>= '0' && *addr_exp
<= '9')
1784 regnum
= atoi (addr_exp
); /* Take a number */
1785 if (regnum
>= numregs
) /* Bad name, or bad number */
1786 error ("%.*s: invalid register", end
- addr_exp
, addr_exp
);
1789 rs6000_do_altivec_registers (regnum
);
1792 while (*addr_exp
== ' ' || *addr_exp
== '\t')
1795 while (*addr_exp
!= '\0');
1799 rs6000_do_registers_info (int regnum
, int fpregs
)
1802 int numregs
= NUM_REGS
+ NUM_PSEUDO_REGS
;
1803 char *raw_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1804 char *virtual_buffer
= (char*) alloca (MAX_REGISTER_VIRTUAL_SIZE
);
1806 for (i
= 0; i
< numregs
; i
++)
1808 /* Decide between printing all regs, nonfloat regs, or specific reg. */
1811 if ((TYPE_CODE (REGISTER_VIRTUAL_TYPE (i
)) == TYPE_CODE_FLT
&& !fpregs
)
1812 || (altivec_register_p (i
) && !fpregs
))
1821 /* If the register name is empty, it is undefined for this
1822 processor, so don't display anything. */
1823 if (REGISTER_NAME (i
) == NULL
|| *(REGISTER_NAME (i
)) == '\0')
1826 fputs_filtered (REGISTER_NAME (i
), gdb_stdout
);
1827 print_spaces_filtered (15 - strlen (REGISTER_NAME (i
)), gdb_stdout
);
1829 /* Get the data in raw format. */
1830 if (!frame_register_read (selected_frame
, i
, raw_buffer
))
1832 printf_filtered ("*value not available*\n");
1836 /* Convert raw data to virtual format if necessary. */
1837 if (REGISTER_CONVERTIBLE (i
))
1838 REGISTER_CONVERT_TO_VIRTUAL (i
, REGISTER_VIRTUAL_TYPE (i
),
1839 raw_buffer
, virtual_buffer
);
1841 memcpy (virtual_buffer
, raw_buffer
, REGISTER_VIRTUAL_SIZE (i
));
1843 /* If virtual format is floating, print it that way, and in raw hex. */
1844 if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i
)) == TYPE_CODE_FLT
)
1848 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
1849 gdb_stdout
, 0, 1, 0, Val_pretty_default
);
1851 printf_filtered ("\t(raw 0x");
1852 for (j
= 0; j
< REGISTER_RAW_SIZE (i
); j
++)
1854 register int idx
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? j
1855 : REGISTER_RAW_SIZE (i
) - 1 - j
;
1856 printf_filtered ("%02x", (unsigned char) raw_buffer
[idx
]);
1858 printf_filtered (")");
1862 /* Print as integer in hex and in decimal. */
1863 if (!altivec_register_p (i
))
1865 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
1866 gdb_stdout
, 'x', 1, 0, Val_pretty_default
);
1867 printf_filtered ("\t");
1868 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
1869 gdb_stdout
, 0, 1, 0, Val_pretty_default
);
1872 /* Print as integer in hex only. */
1873 val_print (REGISTER_VIRTUAL_TYPE (i
), virtual_buffer
, 0, 0,
1874 gdb_stdout
, 'x', 1, 0, Val_pretty_default
);
1876 printf_filtered ("\n");
1880 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1883 rs6000_stab_reg_to_regnum (int num
)
1889 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
1892 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
1895 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
1898 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
1907 /* Store the address of the place in which to copy the structure the
1908 subroutine will return. This is called from call_function.
1910 In RS/6000, struct return addresses are passed as an extra parameter in r3.
1911 In function return, callee is not responsible of returning this address
1912 back. Since gdb needs to find it, we will store in a designated variable
1913 `rs6000_struct_return_address'. */
1916 rs6000_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1918 write_register (3, addr
);
1919 rs6000_struct_return_address
= addr
;
1922 /* Write into appropriate registers a function return value
1923 of type TYPE, given in virtual format. */
1926 rs6000_store_return_value (struct type
*type
, char *valbuf
)
1928 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1930 /* Floating point values are returned starting from FPR1 and up.
1931 Say a double_double_double type could be returned in
1932 FPR1/FPR2/FPR3 triple. */
1934 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
1935 TYPE_LENGTH (type
));
1937 /* Everything else is returned in GPR3 and up. */
1938 write_register_bytes (REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
1939 valbuf
, TYPE_LENGTH (type
));
1942 /* Extract from an array REGBUF containing the (raw) register state
1943 the address in which a function should return its structure value,
1944 as a CORE_ADDR (or an expression that can be used as one). */
1947 rs6000_extract_struct_value_address (char *regbuf
)
1949 return rs6000_struct_return_address
;
1952 /* Return whether PC is in a dummy function call.
1954 FIXME: This just checks for the end of the stack, which is broken
1955 for things like stepping through gcc nested function stubs. */
1958 rs6000_pc_in_call_dummy (CORE_ADDR pc
, CORE_ADDR sp
, CORE_ADDR fp
)
1960 return sp
< pc
&& pc
< fp
;
1963 /* Hook called when a new child process is started. */
1966 rs6000_create_inferior (int pid
)
1968 if (rs6000_set_host_arch_hook
)
1969 rs6000_set_host_arch_hook (pid
);
1972 /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
1974 Usually a function pointer's representation is simply the address
1975 of the function. On the RS/6000 however, a function pointer is
1976 represented by a pointer to a TOC entry. This TOC entry contains
1977 three words, the first word is the address of the function, the
1978 second word is the TOC pointer (r2), and the third word is the
1979 static chain value. Throughout GDB it is currently assumed that a
1980 function pointer contains the address of the function, which is not
1981 easy to fix. In addition, the conversion of a function address to
1982 a function pointer would require allocation of a TOC entry in the
1983 inferior's memory space, with all its drawbacks. To be able to
1984 call C++ virtual methods in the inferior (which are called via
1985 function pointers), find_function_addr uses this function to get the
1986 function address from a function pointer. */
1988 /* Return real function address if ADDR (a function pointer) is in the data
1989 space and is therefore a special function pointer. */
1992 rs6000_convert_from_func_ptr_addr (CORE_ADDR addr
)
1994 struct obj_section
*s
;
1996 s
= find_pc_section (addr
);
1997 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
2000 /* ADDR is in the data space, so it's a special function pointer. */
2001 return read_memory_addr (addr
, TDEP
->wordsize
);
2005 /* Handling the various POWER/PowerPC variants. */
2008 /* The arrays here called registers_MUMBLE hold information about available
2011 For each family of PPC variants, I've tried to isolate out the
2012 common registers and put them up front, so that as long as you get
2013 the general family right, GDB will correctly identify the registers
2014 common to that family. The common register sets are:
2016 For the 60x family: hid0 hid1 iabr dabr pir
2018 For the 505 and 860 family: eie eid nri
2020 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
2021 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
2024 Most of these register groups aren't anything formal. I arrived at
2025 them by looking at the registers that occurred in more than one
2028 /* Convenience macros for populating register arrays. */
2030 /* Within another macro, convert S to a string. */
2034 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
2035 and 64 bits on 64-bit systems. */
2036 #define R(name) { STR(name), 4, 8, 0 }
2038 /* Return a struct reg defining register NAME that's 32 bits on all
2040 #define R4(name) { STR(name), 4, 4, 0 }
2042 /* Return a struct reg defining register NAME that's 64 bits on all
2044 #define R8(name) { STR(name), 8, 8, 0 }
2046 /* Return a struct reg defining register NAME that's 128 bits on all
2048 #define R16(name) { STR(name), 16, 16, 0 }
2050 /* Return a struct reg defining floating-point register NAME. */
2051 #define F(name) { STR(name), 8, 8, 1 }
2053 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
2054 systems and that doesn't exist on 64-bit systems. */
2055 #define R32(name) { STR(name), 4, 0, 0 }
2057 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
2058 systems and that doesn't exist on 32-bit systems. */
2059 #define R64(name) { STR(name), 0, 8, 0 }
2061 /* Return a struct reg placeholder for a register that doesn't exist. */
2062 #define R0 { 0, 0, 0, 0 }
2064 /* UISA registers common across all architectures, including POWER. */
2066 #define COMMON_UISA_REGS \
2067 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2068 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2069 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2070 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2071 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
2072 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
2073 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
2074 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
2075 /* 64 */ R(pc), R(ps)
2077 /* UISA-level SPRs for PowerPC. */
2078 #define PPC_UISA_SPRS \
2079 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
2081 /* Segment registers, for PowerPC. */
2082 #define PPC_SEGMENT_REGS \
2083 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2084 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2085 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2086 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2088 /* OEA SPRs for PowerPC. */
2089 #define PPC_OEA_SPRS \
2091 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2092 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2093 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2094 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2095 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2096 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2097 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2098 /* 116 */ R4(dec), R(dabr), R4(ear)
2100 /* AltiVec registers */
2101 #define PPC_ALTIVEC_REGS \
2102 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2103 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2104 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2105 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2106 /*151*/R4(vscr), R4(vrsave)
2108 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2109 user-level SPR's. */
2110 static const struct reg registers_power
[] =
2113 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
2117 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2118 view of the PowerPC. */
2119 static const struct reg registers_powerpc
[] =
2126 /* IBM PowerPC 403. */
2127 static const struct reg registers_403
[] =
2133 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2134 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2135 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2136 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2137 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2138 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
2141 /* IBM PowerPC 403GC. */
2142 static const struct reg registers_403GC
[] =
2148 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2149 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2150 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2151 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2152 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2153 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2154 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2155 /* 147 */ R(tbhu
), R(tblu
)
2158 /* Motorola PowerPC 505. */
2159 static const struct reg registers_505
[] =
2165 /* 119 */ R(eie
), R(eid
), R(nri
)
2168 /* Motorola PowerPC 860 or 850. */
2169 static const struct reg registers_860
[] =
2175 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2176 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2177 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2178 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2179 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2180 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2181 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2182 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2183 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2184 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2185 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2186 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2189 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2190 for reading and writing RTCU and RTCL. However, how one reads and writes a
2191 register is the stub's problem. */
2192 static const struct reg registers_601
[] =
2198 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2199 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2202 /* Motorola PowerPC 602. */
2203 static const struct reg registers_602
[] =
2209 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2210 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2211 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2214 /* Motorola/IBM PowerPC 603 or 603e. */
2215 static const struct reg registers_603
[] =
2221 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2222 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2223 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2226 /* Motorola PowerPC 604 or 604e. */
2227 static const struct reg registers_604
[] =
2233 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2234 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2235 /* 127 */ R(sia
), R(sda
)
2238 /* Motorola/IBM PowerPC 750 or 740. */
2239 static const struct reg registers_750
[] =
2245 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2246 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2247 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2248 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2249 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2250 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2254 /* Motorola PowerPC 7400. */
2255 static const struct reg registers_7400
[] =
2257 /* gpr0-gpr31, fpr0-fpr31 */
2259 /* ctr, xre, lr, cr */
2264 /* vr0-vr31, vrsave, vscr */
2266 /* FIXME? Add more registers? */
2269 /* Information about a particular processor variant. */
2273 /* Name of this variant. */
2276 /* English description of the variant. */
2279 /* bfd_arch_info.arch corresponding to variant. */
2280 enum bfd_architecture arch
;
2282 /* bfd_arch_info.mach corresponding to variant. */
2285 /* Table of register names; registers[R] is the name of the register
2288 const struct reg
*regs
;
2291 #define num_registers(list) (sizeof (list) / sizeof((list)[0]))
2294 /* Information in this table comes from the following web sites:
2295 IBM: http://www.chips.ibm.com:80/products/embedded/
2296 Motorola: http://www.mot.com/SPS/PowerPC/
2298 I'm sure I've got some of the variant descriptions not quite right.
2299 Please report any inaccuracies you find to GDB's maintainer.
2301 If you add entries to this table, please be sure to allow the new
2302 value as an argument to the --with-cpu flag, in configure.in. */
2304 static const struct variant variants
[] =
2306 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2307 bfd_mach_ppc
, num_registers (registers_powerpc
), registers_powerpc
},
2308 {"power", "POWER user-level", bfd_arch_rs6000
,
2309 bfd_mach_rs6k
, num_registers (registers_power
), registers_power
},
2310 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2311 bfd_mach_ppc_403
, num_registers (registers_403
), registers_403
},
2312 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2313 bfd_mach_ppc_601
, num_registers (registers_601
), registers_601
},
2314 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2315 bfd_mach_ppc_602
, num_registers (registers_602
), registers_602
},
2316 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2317 bfd_mach_ppc_603
, num_registers (registers_603
), registers_603
},
2318 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2319 604, num_registers (registers_604
), registers_604
},
2320 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2321 bfd_mach_ppc_403gc
, num_registers (registers_403GC
), registers_403GC
},
2322 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2323 bfd_mach_ppc_505
, num_registers (registers_505
), registers_505
},
2324 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2325 bfd_mach_ppc_860
, num_registers (registers_860
), registers_860
},
2326 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2327 bfd_mach_ppc_750
, num_registers (registers_750
), registers_750
},
2328 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2329 bfd_mach_ppc_7400
, num_registers (registers_7400
), registers_7400
},
2332 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2333 bfd_mach_ppc64
, num_registers (registers_powerpc
), registers_powerpc
},
2334 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2335 bfd_mach_ppc_620
, num_registers (registers_powerpc
), registers_powerpc
},
2336 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2337 bfd_mach_ppc_630
, num_registers (registers_powerpc
), registers_powerpc
},
2338 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2339 bfd_mach_ppc_a35
, num_registers (registers_powerpc
), registers_powerpc
},
2340 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2341 bfd_mach_ppc_rs64ii
, num_registers (registers_powerpc
), registers_powerpc
},
2342 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2343 bfd_mach_ppc_rs64iii
, num_registers (registers_powerpc
), registers_powerpc
},
2345 /* FIXME: I haven't checked the register sets of the following. */
2346 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2347 bfd_mach_rs6k_rs1
, num_registers (registers_power
), registers_power
},
2348 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2349 bfd_mach_rs6k_rsc
, num_registers (registers_power
), registers_power
},
2350 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2351 bfd_mach_rs6k_rs2
, num_registers (registers_power
), registers_power
},
2356 #undef num_registers
2358 /* Return the variant corresponding to architecture ARCH and machine number
2359 MACH. If no such variant exists, return null. */
2361 static const struct variant
*
2362 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2364 const struct variant
*v
;
2366 for (v
= variants
; v
->name
; v
++)
2367 if (arch
== v
->arch
&& mach
== v
->mach
)
2377 process_note_abi_tag_sections (bfd
*abfd
, asection
*sect
, void *obj
)
2379 int *os_ident_ptr
= obj
;
2381 unsigned int sectsize
;
2383 name
= bfd_get_section_name (abfd
, sect
);
2384 sectsize
= bfd_section_size (abfd
, sect
);
2385 if (strcmp (name
, ".note.ABI-tag") == 0 && sectsize
> 0)
2387 unsigned int name_length
, data_length
, note_type
;
2388 char *note
= alloca (sectsize
);
2390 bfd_get_section_contents (abfd
, sect
, note
,
2391 (file_ptr
) 0, (bfd_size_type
) sectsize
);
2393 name_length
= bfd_h_get_32 (abfd
, note
);
2394 data_length
= bfd_h_get_32 (abfd
, note
+ 4);
2395 note_type
= bfd_h_get_32 (abfd
, note
+ 8);
2397 if (name_length
== 4 && data_length
== 16 && note_type
== 1
2398 && strcmp (note
+ 12, "GNU") == 0)
2400 int os_number
= bfd_h_get_32 (abfd
, note
+ 16);
2402 /* The case numbers are from abi-tags in glibc */
2406 *os_ident_ptr
= ELFOSABI_LINUX
;
2409 *os_ident_ptr
= ELFOSABI_HURD
;
2412 *os_ident_ptr
= ELFOSABI_SOLARIS
;
2415 internal_error (__FILE__
, __LINE__
,
2416 "process_note_abi_sections: unknown OS number %d",
2424 /* Return one of the ELFOSABI_ constants for BFDs representing ELF
2425 executables. If it's not an ELF executable or if the OS/ABI couldn't
2426 be determined, simply return -1. */
2429 get_elfosabi (bfd
*abfd
)
2433 if (abfd
!= NULL
&& bfd_get_flavour (abfd
) == bfd_target_elf_flavour
)
2435 elfosabi
= elf_elfheader (abfd
)->e_ident
[EI_OSABI
];
2437 /* When elfosabi is 0 (ELFOSABI_NONE), this is supposed to indicate
2438 that we're on a SYSV system. However, GNU/Linux uses a note section
2439 to record OS/ABI info, but leaves e_ident[EI_OSABI] zero. So we
2440 have to check the note sections too. */
2443 bfd_map_over_sections (abfd
,
2444 process_note_abi_tag_sections
,
2454 /* Initialize the current architecture based on INFO. If possible, re-use an
2455 architecture from ARCHES, which is a list of architectures already created
2456 during this debugging session.
2458 Called e.g. at program startup, when reading a core file, and when reading
2461 static struct gdbarch
*
2462 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2464 struct gdbarch
*gdbarch
;
2465 struct gdbarch_tdep
*tdep
;
2466 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2468 const struct variant
*v
;
2469 enum bfd_architecture arch
;
2472 int osabi
, sysv_abi
;
2473 gdbarch_print_insn_ftype
*print_insn
;
2475 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2476 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2478 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2479 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2481 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2483 osabi
= get_elfosabi (info
.abfd
);
2485 /* Check word size. If INFO is from a binary file, infer it from
2486 that, else choose a likely default. */
2487 if (from_xcoff_exec
)
2489 if (xcoff_data (info
.abfd
)->xcoff64
)
2494 else if (from_elf_exec
)
2496 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2503 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2504 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2505 info
.bfd_arch_info
->bits_per_byte
;
2510 /* Find a candidate among extant architectures. */
2511 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2513 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2515 /* Word size in the various PowerPC bfd_arch_info structs isn't
2516 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2517 separate word size check. */
2518 tdep
= gdbarch_tdep (arches
->gdbarch
);
2519 if (tdep
&& tdep
->wordsize
== wordsize
&& tdep
->osabi
== osabi
)
2520 return arches
->gdbarch
;
2523 /* None found, create a new architecture from INFO, whose bfd_arch_info
2524 validity depends on the source:
2525 - executable useless
2526 - rs6000_host_arch() good
2528 - "set arch" trust blindly
2529 - GDB startup useless but harmless */
2531 if (!from_xcoff_exec
)
2533 arch
= info
.bfd_arch_info
->arch
;
2534 mach
= info
.bfd_arch_info
->mach
;
2538 arch
= bfd_arch_powerpc
;
2540 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2541 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2543 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2544 tdep
->wordsize
= wordsize
;
2545 tdep
->osabi
= osabi
;
2546 gdbarch
= gdbarch_alloc (&info
, tdep
);
2547 power
= arch
== bfd_arch_rs6000
;
2549 /* Choose variant. */
2550 v
= find_variant_by_arch (arch
, mach
);
2554 tdep
->regs
= v
->regs
;
2556 tdep
->ppc_gp0_regnum
= 0;
2557 tdep
->ppc_gplast_regnum
= 31;
2558 tdep
->ppc_toc_regnum
= 2;
2559 tdep
->ppc_ps_regnum
= 65;
2560 tdep
->ppc_cr_regnum
= 66;
2561 tdep
->ppc_lr_regnum
= 67;
2562 tdep
->ppc_ctr_regnum
= 68;
2563 tdep
->ppc_xer_regnum
= 69;
2564 if (v
->mach
== bfd_mach_ppc_601
)
2565 tdep
->ppc_mq_regnum
= 124;
2567 tdep
->ppc_mq_regnum
= 70;
2569 tdep
->ppc_mq_regnum
= -1;
2570 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2572 if (v
->arch
== bfd_arch_powerpc
)
2576 tdep
->ppc_vr0_regnum
= 71;
2577 tdep
->ppc_vrsave_regnum
= 104;
2579 case bfd_mach_ppc_7400
:
2580 tdep
->ppc_vr0_regnum
= 119;
2581 tdep
->ppc_vrsave_regnum
= 153;
2584 tdep
->ppc_vr0_regnum
= -1;
2585 tdep
->ppc_vrsave_regnum
= -1;
2589 /* Set lr_frame_offset. */
2591 tdep
->lr_frame_offset
= 16;
2593 tdep
->lr_frame_offset
= 4;
2595 tdep
->lr_frame_offset
= 8;
2597 /* Calculate byte offsets in raw register array. */
2598 tdep
->regoff
= xmalloc (v
->nregs
* sizeof (int));
2599 for (i
= off
= 0; i
< v
->nregs
; i
++)
2601 tdep
->regoff
[i
] = off
;
2602 off
+= regsize (v
->regs
+ i
, wordsize
);
2605 /* Select instruction printer. */
2607 print_insn
= print_insn_rs6000
;
2608 else if (info
.byte_order
== BFD_ENDIAN_BIG
)
2609 print_insn
= print_insn_big_powerpc
;
2611 print_insn
= print_insn_little_powerpc
;
2612 set_gdbarch_print_insn (gdbarch
, print_insn
);
2614 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
2615 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2616 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
2617 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2618 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
2620 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2621 set_gdbarch_sp_regnum (gdbarch
, 1);
2622 set_gdbarch_fp_regnum (gdbarch
, 1);
2623 set_gdbarch_pc_regnum (gdbarch
, 64);
2624 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2625 set_gdbarch_register_size (gdbarch
, wordsize
);
2626 set_gdbarch_register_bytes (gdbarch
, off
);
2627 set_gdbarch_register_byte (gdbarch
, rs6000_register_byte
);
2628 set_gdbarch_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2629 set_gdbarch_max_register_raw_size (gdbarch
, 16);
2630 set_gdbarch_register_virtual_size (gdbarch
, generic_register_virtual_size
);
2631 set_gdbarch_max_register_virtual_size (gdbarch
, 16);
2632 set_gdbarch_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2633 set_gdbarch_do_registers_info (gdbarch
, rs6000_do_registers_info
);
2635 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2636 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2637 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2638 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2639 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2640 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2641 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2642 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2643 set_gdbarch_char_signed (gdbarch
, 0);
2645 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
2646 set_gdbarch_call_dummy_length (gdbarch
, 0);
2647 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
2648 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2649 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
2650 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2651 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2652 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
2653 set_gdbarch_call_dummy_p (gdbarch
, 1);
2654 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2655 set_gdbarch_get_saved_register (gdbarch
, generic_get_saved_register
);
2656 set_gdbarch_fix_call_dummy (gdbarch
, rs6000_fix_call_dummy
);
2657 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
2658 set_gdbarch_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2659 set_gdbarch_push_return_address (gdbarch
, ppc_push_return_address
);
2660 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2661 set_gdbarch_coerce_float_to_double (gdbarch
, rs6000_coerce_float_to_double
);
2663 set_gdbarch_register_convertible (gdbarch
, rs6000_register_convertible
);
2664 set_gdbarch_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2665 set_gdbarch_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2666 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2668 set_gdbarch_extract_return_value (gdbarch
, rs6000_extract_return_value
);
2670 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2671 is correct for the SysV ABI when the wordsize is 8, but I'm also
2672 fairly certain that ppc_sysv_abi_push_arguments() will give even
2673 worse results since it only works for 32-bit code. So, for the moment,
2674 we're better off calling rs6000_push_arguments() since it works for
2675 64-bit code. At some point in the future, this matter needs to be
2677 if (sysv_abi
&& wordsize
== 4)
2678 set_gdbarch_push_arguments (gdbarch
, ppc_sysv_abi_push_arguments
);
2680 set_gdbarch_push_arguments (gdbarch
, rs6000_push_arguments
);
2682 set_gdbarch_store_struct_return (gdbarch
, rs6000_store_struct_return
);
2683 set_gdbarch_store_return_value (gdbarch
, rs6000_store_return_value
);
2684 set_gdbarch_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2685 set_gdbarch_pop_frame (gdbarch
, rs6000_pop_frame
);
2687 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2688 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2689 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2690 set_gdbarch_function_start_offset (gdbarch
, 0);
2691 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2693 /* Not sure on this. FIXMEmgo */
2694 set_gdbarch_frame_args_skip (gdbarch
, 8);
2696 /* Until November 2001, gcc was not complying to the SYSV ABI for
2697 returning structures less than or equal to 8 bytes in size. It was
2698 returning everything in memory. When this was corrected, it wasn't
2699 fixed for native platforms. */
2702 if (osabi
== ELFOSABI_LINUX
2703 || osabi
== ELFOSABI_NETBSD
2704 || osabi
== ELFOSABI_FREEBSD
)
2705 set_gdbarch_use_struct_convention (gdbarch
,
2706 generic_use_struct_convention
);
2708 set_gdbarch_use_struct_convention (gdbarch
,
2709 ppc_sysv_abi_use_struct_convention
);
2713 set_gdbarch_use_struct_convention (gdbarch
,
2714 generic_use_struct_convention
);
2717 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
2718 /* Note: kevinb/2002-04-12: See note above regarding *_push_arguments().
2719 The same remarks hold for the methods below. */
2720 if (osabi
== ELFOSABI_LINUX
&& wordsize
== 4)
2722 set_gdbarch_frameless_function_invocation (gdbarch
,
2723 ppc_linux_frameless_function_invocation
);
2724 set_gdbarch_frame_chain (gdbarch
, ppc_linux_frame_chain
);
2725 set_gdbarch_frame_saved_pc (gdbarch
, ppc_linux_frame_saved_pc
);
2727 set_gdbarch_frame_init_saved_regs (gdbarch
,
2728 ppc_linux_frame_init_saved_regs
);
2729 set_gdbarch_init_extra_frame_info (gdbarch
,
2730 ppc_linux_init_extra_frame_info
);
2732 set_gdbarch_memory_remove_breakpoint (gdbarch
,
2733 ppc_linux_memory_remove_breakpoint
);
2734 set_solib_svr4_fetch_link_map_offsets
2735 (gdbarch
, ppc_linux_svr4_fetch_link_map_offsets
);
2739 set_gdbarch_frameless_function_invocation (gdbarch
,
2740 rs6000_frameless_function_invocation
);
2741 set_gdbarch_frame_chain (gdbarch
, rs6000_frame_chain
);
2742 set_gdbarch_frame_saved_pc (gdbarch
, rs6000_frame_saved_pc
);
2744 set_gdbarch_frame_init_saved_regs (gdbarch
, rs6000_frame_init_saved_regs
);
2745 set_gdbarch_init_extra_frame_info (gdbarch
, rs6000_init_extra_frame_info
);
2747 /* Handle RS/6000 function pointers. */
2748 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2749 rs6000_convert_from_func_ptr_addr
);
2751 set_gdbarch_frame_args_address (gdbarch
, rs6000_frame_args_address
);
2752 set_gdbarch_frame_locals_address (gdbarch
, rs6000_frame_args_address
);
2753 set_gdbarch_saved_pc_after_call (gdbarch
, rs6000_saved_pc_after_call
);
2755 /* We can't tell how many args there are
2756 now that the C compiler delays popping them. */
2757 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
2762 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
2765 rs6000_info_powerpc_command (char *args
, int from_tty
)
2767 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
2770 /* Initialization code. */
2773 _initialize_rs6000_tdep (void)
2775 register_gdbarch_init (bfd_arch_rs6000
, rs6000_gdbarch_init
);
2776 register_gdbarch_init (bfd_arch_powerpc
, rs6000_gdbarch_init
);
2778 /* Add root prefix command for "info powerpc" commands */
2779 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
2780 "Various POWERPC info specific commands.",
2781 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);
2783 add_cmd ("altivec", class_info
, rs6000_altivec_registers_info
,
2784 "Display the contents of the AltiVec registers.",
2785 &info_powerpc_cmdlist
);