1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
39 #include "libbfd.h" /* for bfd_default_set_arch_mach */
40 #include "coff/internal.h" /* for libcoff.h */
41 #include "libcoff.h" /* for xcoff_data */
42 #include "coff/xcoff.h"
47 #include "solib-svr4.h"
50 #include "gdb_assert.h"
52 /* If the kernel has to deliver a signal, it pushes a sigcontext
53 structure on the stack and then calls the signal handler, passing
54 the address of the sigcontext in an argument register. Usually
55 the signal handler doesn't save this register, so we have to
56 access the sigcontext structure via an offset from the signal handler
58 The following constants were determined by experimentation on AIX 3.2. */
59 #define SIG_FRAME_PC_OFFSET 96
60 #define SIG_FRAME_LR_OFFSET 108
61 #define SIG_FRAME_FP_OFFSET 284
63 /* To be used by skip_prologue. */
65 struct rs6000_framedata
67 int offset
; /* total size of frame --- the distance
68 by which we decrement sp to allocate
70 int saved_gpr
; /* smallest # of saved gpr */
71 int saved_fpr
; /* smallest # of saved fpr */
72 int saved_vr
; /* smallest # of saved vr */
73 int saved_ev
; /* smallest # of saved ev */
74 int alloca_reg
; /* alloca register number (frame ptr) */
75 char frameless
; /* true if frameless functions. */
76 char nosavedpc
; /* true if pc not saved. */
77 int gpr_offset
; /* offset of saved gprs from prev sp */
78 int fpr_offset
; /* offset of saved fprs from prev sp */
79 int vr_offset
; /* offset of saved vrs from prev sp */
80 int ev_offset
; /* offset of saved evs from prev sp */
81 int lr_offset
; /* offset of saved lr */
82 int cr_offset
; /* offset of saved cr */
83 int vrsave_offset
; /* offset of saved vrsave register */
86 /* Description of a single register. */
90 char *name
; /* name of register */
91 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
92 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
93 unsigned char fpr
; /* whether register is floating-point */
94 unsigned char pseudo
; /* whether register is pseudo */
97 /* Breakpoint shadows for the single step instructions will be kept here. */
99 static struct sstep_breaks
101 /* Address, or 0 if this is not in use. */
103 /* Shadow contents. */
108 /* Hook for determining the TOC address when calling functions in the
109 inferior under AIX. The initialization code in rs6000-nat.c sets
110 this hook to point to find_toc_address. */
112 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
114 /* Hook to set the current architecture when starting a child process.
115 rs6000-nat.c sets this. */
117 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
119 /* Static function prototypes */
121 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
123 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
124 struct rs6000_framedata
*);
125 static void frame_get_saved_regs (struct frame_info
* fi
,
126 struct rs6000_framedata
* fdatap
);
127 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
129 /* Is REGNO an AltiVec register? Return 1 if so, 0 otherwise. */
131 altivec_register_p (int regno
)
133 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
134 if (tdep
->ppc_vr0_regnum
< 0 || tdep
->ppc_vrsave_regnum
< 0)
137 return (regno
>= tdep
->ppc_vr0_regnum
&& regno
<= tdep
->ppc_vrsave_regnum
);
140 /* Use the architectures FP registers? */
142 ppc_floating_point_unit_p (struct gdbarch
*gdbarch
)
144 const struct bfd_arch_info
*info
= gdbarch_bfd_arch_info (gdbarch
);
145 if (info
->arch
== bfd_arch_powerpc
)
146 return (info
->mach
!= bfd_mach_ppc_e500
);
147 if (info
->arch
== bfd_arch_rs6000
)
152 /* Read a LEN-byte address from debugged memory address MEMADDR. */
155 read_memory_addr (CORE_ADDR memaddr
, int len
)
157 return read_memory_unsigned_integer (memaddr
, len
);
161 rs6000_skip_prologue (CORE_ADDR pc
)
163 struct rs6000_framedata frame
;
164 pc
= skip_prologue (pc
, 0, &frame
);
169 /* Fill in fi->saved_regs */
171 struct frame_extra_info
173 /* Functions calling alloca() change the value of the stack
174 pointer. We need to use initial stack pointer (which is saved in
175 r31 by gcc) in such cases. If a compiler emits traceback table,
176 then we should use the alloca register specified in traceback
178 CORE_ADDR initial_sp
; /* initial stack pointer. */
182 rs6000_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
184 struct frame_extra_info
*extra_info
=
185 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
186 extra_info
->initial_sp
= 0;
187 if (get_next_frame (fi
) != NULL
188 && get_frame_pc (fi
) < TEXT_SEGMENT_BASE
)
189 /* We're in get_prev_frame */
190 /* and this is a special signal frame. */
191 /* (fi->pc will be some low address in the kernel, */
192 /* to which the signal handler returns). */
193 deprecated_set_frame_type (fi
, SIGTRAMP_FRAME
);
196 /* Put here the code to store, into a struct frame_saved_regs,
197 the addresses of the saved registers of frame described by FRAME_INFO.
198 This includes special registers such as pc and fp saved in special
199 ways in the stack frame. sp is even more special:
200 the address we return for it IS the sp for the next frame. */
202 /* In this implementation for RS/6000, we do *not* save sp. I am
203 not sure if it will be needed. The following function takes care of gpr's
207 rs6000_frame_init_saved_regs (struct frame_info
*fi
)
209 frame_get_saved_regs (fi
, NULL
);
213 rs6000_frame_args_address (struct frame_info
*fi
)
215 struct frame_extra_info
*extra_info
= get_frame_extra_info (fi
);
216 if (extra_info
->initial_sp
!= 0)
217 return extra_info
->initial_sp
;
219 return frame_initial_stack_address (fi
);
222 /* Immediately after a function call, return the saved pc.
223 Can't go through the frames for this because on some machines
224 the new frame is not set up until the new function executes
225 some instructions. */
228 rs6000_saved_pc_after_call (struct frame_info
*fi
)
230 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
233 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
236 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
243 absolute
= (int) ((instr
>> 1) & 1);
248 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
252 dest
= pc
+ immediate
;
256 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
260 dest
= pc
+ immediate
;
264 ext_op
= (instr
>> 1) & 0x3ff;
266 if (ext_op
== 16) /* br conditional register */
268 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
270 /* If we are about to return from a signal handler, dest is
271 something like 0x3c90. The current frame is a signal handler
272 caller frame, upon completion of the sigreturn system call
273 execution will return to the saved PC in the frame. */
274 if (dest
< TEXT_SEGMENT_BASE
)
276 struct frame_info
*fi
;
278 fi
= get_current_frame ();
280 dest
= read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
281 gdbarch_tdep (current_gdbarch
)->wordsize
);
285 else if (ext_op
== 528) /* br cond to count reg */
287 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
289 /* If we are about to execute a system call, dest is something
290 like 0x22fc or 0x3b00. Upon completion the system call
291 will return to the address in the link register. */
292 if (dest
< TEXT_SEGMENT_BASE
)
293 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
302 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
306 /* Sequence of bytes for breakpoint instruction. */
308 #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
309 #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
311 const static unsigned char *
312 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
314 static unsigned char big_breakpoint
[] = BIG_BREAKPOINT
;
315 static unsigned char little_breakpoint
[] = LITTLE_BREAKPOINT
;
317 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
318 return big_breakpoint
;
320 return little_breakpoint
;
324 /* AIX does not support PT_STEP. Simulate it. */
327 rs6000_software_single_step (enum target_signal signal
,
328 int insert_breakpoints_p
)
332 const char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
338 if (insert_breakpoints_p
)
343 insn
= read_memory_integer (loc
, 4);
345 breaks
[0] = loc
+ breakp_sz
;
347 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
349 /* Don't put two breakpoints on the same address. */
350 if (breaks
[1] == breaks
[0])
353 stepBreaks
[1].address
= 0;
355 for (ii
= 0; ii
< 2; ++ii
)
358 /* ignore invalid breakpoint. */
359 if (breaks
[ii
] == -1)
361 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
362 stepBreaks
[ii
].address
= breaks
[ii
];
369 /* remove step breakpoints. */
370 for (ii
= 0; ii
< 2; ++ii
)
371 if (stepBreaks
[ii
].address
!= 0)
372 target_remove_breakpoint (stepBreaks
[ii
].address
,
373 stepBreaks
[ii
].data
);
375 errno
= 0; /* FIXME, don't ignore errors! */
376 /* What errors? {read,write}_memory call error(). */
380 /* return pc value after skipping a function prologue and also return
381 information about a function frame.
383 in struct rs6000_framedata fdata:
384 - frameless is TRUE, if function does not have a frame.
385 - nosavedpc is TRUE, if function does not save %pc value in its frame.
386 - offset is the initial size of this stack frame --- the amount by
387 which we decrement the sp to allocate the frame.
388 - saved_gpr is the number of the first saved gpr.
389 - saved_fpr is the number of the first saved fpr.
390 - saved_vr is the number of the first saved vr.
391 - saved_ev is the number of the first saved ev.
392 - alloca_reg is the number of the register used for alloca() handling.
394 - gpr_offset is the offset of the first saved gpr from the previous frame.
395 - fpr_offset is the offset of the first saved fpr from the previous frame.
396 - vr_offset is the offset of the first saved vr from the previous frame.
397 - ev_offset is the offset of the first saved ev from the previous frame.
398 - lr_offset is the offset of the saved lr
399 - cr_offset is the offset of the saved cr
400 - vrsave_offset is the offset of the saved vrsave register
403 #define SIGNED_SHORT(x) \
404 ((sizeof (short) == 2) \
405 ? ((int)(short)(x)) \
406 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
408 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
410 /* Limit the number of skipped non-prologue instructions, as the examining
411 of the prologue is expensive. */
412 static int max_skip_non_prologue_insns
= 10;
414 /* Given PC representing the starting address of a function, and
415 LIM_PC which is the (sloppy) limit to which to scan when looking
416 for a prologue, attempt to further refine this limit by using
417 the line data in the symbol table. If successful, a better guess
418 on where the prologue ends is returned, otherwise the previous
419 value of lim_pc is returned. */
421 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
423 struct symtab_and_line prologue_sal
;
425 prologue_sal
= find_pc_line (pc
, 0);
426 if (prologue_sal
.line
!= 0)
429 CORE_ADDR addr
= prologue_sal
.end
;
431 /* Handle the case in which compiler's optimizer/scheduler
432 has moved instructions into the prologue. We scan ahead
433 in the function looking for address ranges whose corresponding
434 line number is less than or equal to the first one that we
435 found for the function. (It can be less than when the
436 scheduler puts a body instruction before the first prologue
438 for (i
= 2 * max_skip_non_prologue_insns
;
439 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
442 struct symtab_and_line sal
;
444 sal
= find_pc_line (addr
, 0);
447 if (sal
.line
<= prologue_sal
.line
448 && sal
.symtab
== prologue_sal
.symtab
)
455 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
456 lim_pc
= prologue_sal
.end
;
463 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
465 CORE_ADDR orig_pc
= pc
;
466 CORE_ADDR last_prologue_pc
= pc
;
467 CORE_ADDR li_found_pc
= 0;
471 long vr_saved_offset
= 0;
480 int minimal_toc_loaded
= 0;
481 int prev_insn_was_prologue_insn
= 1;
482 int num_skip_non_prologue_insns
= 0;
483 const struct bfd_arch_info
*arch_info
= gdbarch_bfd_arch_info (current_gdbarch
);
484 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
486 /* Attempt to find the end of the prologue when no limit is specified.
487 Note that refine_prologue_limit() has been written so that it may
488 be used to "refine" the limits of non-zero PC values too, but this
489 is only safe if we 1) trust the line information provided by the
490 compiler and 2) iterate enough to actually find the end of the
493 It may become a good idea at some point (for both performance and
494 accuracy) to unconditionally call refine_prologue_limit(). But,
495 until we can make a clear determination that this is beneficial,
496 we'll play it safe and only use it to obtain a limit when none
497 has been specified. */
499 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
501 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
502 fdata
->saved_gpr
= -1;
503 fdata
->saved_fpr
= -1;
504 fdata
->saved_vr
= -1;
505 fdata
->saved_ev
= -1;
506 fdata
->alloca_reg
= -1;
507 fdata
->frameless
= 1;
508 fdata
->nosavedpc
= 1;
512 /* Sometimes it isn't clear if an instruction is a prologue
513 instruction or not. When we encounter one of these ambiguous
514 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
515 Otherwise, we'll assume that it really is a prologue instruction. */
516 if (prev_insn_was_prologue_insn
)
517 last_prologue_pc
= pc
;
519 /* Stop scanning if we've hit the limit. */
520 if (lim_pc
!= 0 && pc
>= lim_pc
)
523 prev_insn_was_prologue_insn
= 1;
525 /* Fetch the instruction and convert it to an integer. */
526 if (target_read_memory (pc
, buf
, 4))
528 op
= extract_signed_integer (buf
, 4);
530 if ((op
& 0xfc1fffff) == 0x7c0802a6)
532 lr_reg
= (op
& 0x03e00000) | 0x90010000;
536 else if ((op
& 0xfc1fffff) == 0x7c000026)
538 cr_reg
= (op
& 0x03e00000) | 0x90010000;
542 else if ((op
& 0xfc1f0000) == 0xd8010000)
543 { /* stfd Rx,NUM(r1) */
544 reg
= GET_SRC_REG (op
);
545 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
547 fdata
->saved_fpr
= reg
;
548 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
553 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
554 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
555 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
556 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
559 reg
= GET_SRC_REG (op
);
560 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
562 fdata
->saved_gpr
= reg
;
563 if ((op
& 0xfc1f0003) == 0xf8010000)
565 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
570 else if ((op
& 0xffff0000) == 0x60000000)
573 /* Allow nops in the prologue, but do not consider them to
574 be part of the prologue unless followed by other prologue
576 prev_insn_was_prologue_insn
= 0;
580 else if ((op
& 0xffff0000) == 0x3c000000)
581 { /* addis 0,0,NUM, used
583 fdata
->offset
= (op
& 0x0000ffff) << 16;
584 fdata
->frameless
= 0;
588 else if ((op
& 0xffff0000) == 0x60000000)
589 { /* ori 0,0,NUM, 2nd ha
590 lf of >= 32k frames */
591 fdata
->offset
|= (op
& 0x0000ffff);
592 fdata
->frameless
= 0;
596 else if (lr_reg
!= -1 && (op
& 0xffff0000) == lr_reg
)
599 fdata
->lr_offset
= SIGNED_SHORT (op
) + offset
;
600 fdata
->nosavedpc
= 0;
605 else if (cr_reg
!= -1 && (op
& 0xffff0000) == cr_reg
)
608 fdata
->cr_offset
= SIGNED_SHORT (op
) + offset
;
613 else if (op
== 0x48000005)
619 else if (op
== 0x48000004)
624 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
625 in V.4 -mminimal-toc */
626 (op
& 0xffff0000) == 0x3bde0000)
627 { /* addi 30,30,foo@l */
631 else if ((op
& 0xfc000001) == 0x48000001)
635 fdata
->frameless
= 0;
636 /* Don't skip over the subroutine call if it is not within
637 the first three instructions of the prologue. */
638 if ((pc
- orig_pc
) > 8)
641 op
= read_memory_integer (pc
+ 4, 4);
643 /* At this point, make sure this is not a trampoline
644 function (a function that simply calls another functions,
645 and nothing else). If the next is not a nop, this branch
646 was part of the function prologue. */
648 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
649 break; /* don't skip over
653 /* update stack pointer */
655 else if ((op
& 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
656 (op
& 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
658 fdata
->frameless
= 0;
659 if ((op
& 0xffff0003) == 0xf8210001)
661 fdata
->offset
= SIGNED_SHORT (op
);
662 offset
= fdata
->offset
;
666 else if (op
== 0x7c21016e)
668 fdata
->frameless
= 0;
669 offset
= fdata
->offset
;
672 /* Load up minimal toc pointer */
674 else if ((op
>> 22) == 0x20f
675 && !minimal_toc_loaded
)
676 { /* l r31,... or l r30,... */
677 minimal_toc_loaded
= 1;
680 /* move parameters from argument registers to local variable
683 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
684 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
685 (((op
>> 21) & 31) <= 10) &&
686 ((long) ((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
690 /* store parameters in stack */
692 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
693 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
694 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
698 /* store parameters in stack via frame pointer */
701 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
702 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
703 (op
& 0xfc1f0000) == 0xfc1f0000))
704 { /* frsp, fp?,NUM(r1) */
707 /* Set up frame pointer */
709 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
712 fdata
->frameless
= 0;
714 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
+ 31);
717 /* Another way to set up the frame pointer. */
719 else if ((op
& 0xfc1fffff) == 0x38010000)
720 { /* addi rX, r1, 0x0 */
721 fdata
->frameless
= 0;
723 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
724 + ((op
& ~0x38010000) >> 21));
727 /* AltiVec related instructions. */
728 /* Store the vrsave register (spr 256) in another register for
729 later manipulation, or load a register into the vrsave
730 register. 2 instructions are used: mfvrsave and
731 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
732 and mtspr SPR256, Rn. */
733 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
734 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
735 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
737 vrsave_reg
= GET_SRC_REG (op
);
740 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
744 /* Store the register where vrsave was saved to onto the stack:
745 rS is the register where vrsave was stored in a previous
747 /* 100100 sssss 00001 dddddddd dddddddd */
748 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
750 if (vrsave_reg
== GET_SRC_REG (op
))
752 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
757 /* Compute the new value of vrsave, by modifying the register
758 where vrsave was saved to. */
759 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
760 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
764 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
765 in a pair of insns to save the vector registers on the
767 /* 001110 00000 00000 iiii iiii iiii iiii */
768 /* 001110 01110 00000 iiii iiii iiii iiii */
769 else if ((op
& 0xffff0000) == 0x38000000 /* li r0, SIMM */
770 || (op
& 0xffff0000) == 0x39c00000) /* li r14, SIMM */
773 vr_saved_offset
= SIGNED_SHORT (op
);
775 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
776 /* 011111 sssss 11111 00000 00111001110 */
777 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
779 if (pc
== (li_found_pc
+ 4))
781 vr_reg
= GET_SRC_REG (op
);
782 /* If this is the first vector reg to be saved, or if
783 it has a lower number than others previously seen,
784 reupdate the frame info. */
785 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
787 fdata
->saved_vr
= vr_reg
;
788 fdata
->vr_offset
= vr_saved_offset
+ offset
;
790 vr_saved_offset
= -1;
795 /* End AltiVec related instructions. */
797 /* Start BookE related instructions. */
798 /* Store gen register S at (r31+uimm).
799 Any register less than r13 is volatile, so we don't care. */
800 /* 000100 sssss 11111 iiiii 01100100001 */
801 else if (arch_info
->mach
== bfd_mach_ppc_e500
802 && (op
& 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
804 if ((op
& 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
807 ev_reg
= GET_SRC_REG (op
);
808 imm
= (op
>> 11) & 0x1f;
810 /* If this is the first vector reg to be saved, or if
811 it has a lower number than others previously seen,
812 reupdate the frame info. */
813 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
815 fdata
->saved_ev
= ev_reg
;
816 fdata
->ev_offset
= ev_offset
+ offset
;
821 /* Store gen register rS at (r1+rB). */
822 /* 000100 sssss 00001 bbbbb 01100100000 */
823 else if (arch_info
->mach
== bfd_mach_ppc_e500
824 && (op
& 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
826 if (pc
== (li_found_pc
+ 4))
828 ev_reg
= GET_SRC_REG (op
);
829 /* If this is the first vector reg to be saved, or if
830 it has a lower number than others previously seen,
831 reupdate the frame info. */
832 /* We know the contents of rB from the previous instruction. */
833 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
835 fdata
->saved_ev
= ev_reg
;
836 fdata
->ev_offset
= vr_saved_offset
+ offset
;
838 vr_saved_offset
= -1;
844 /* Store gen register r31 at (rA+uimm). */
845 /* 000100 11111 aaaaa iiiii 01100100001 */
846 else if (arch_info
->mach
== bfd_mach_ppc_e500
847 && (op
& 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
849 /* Wwe know that the source register is 31 already, but
850 it can't hurt to compute it. */
851 ev_reg
= GET_SRC_REG (op
);
852 ev_offset
= ((op
>> 11) & 0x1f) * 8;
853 /* If this is the first vector reg to be saved, or if
854 it has a lower number than others previously seen,
855 reupdate the frame info. */
856 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
858 fdata
->saved_ev
= ev_reg
;
859 fdata
->ev_offset
= ev_offset
+ offset
;
864 /* Store gen register S at (r31+r0).
865 Store param on stack when offset from SP bigger than 4 bytes. */
866 /* 000100 sssss 11111 00000 01100100000 */
867 else if (arch_info
->mach
== bfd_mach_ppc_e500
868 && (op
& 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
870 if (pc
== (li_found_pc
+ 4))
872 if ((op
& 0x03e00000) >= 0x01a00000)
874 ev_reg
= GET_SRC_REG (op
);
875 /* If this is the first vector reg to be saved, or if
876 it has a lower number than others previously seen,
877 reupdate the frame info. */
878 /* We know the contents of r0 from the previous
880 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
882 fdata
->saved_ev
= ev_reg
;
883 fdata
->ev_offset
= vr_saved_offset
+ offset
;
887 vr_saved_offset
= -1;
892 /* End BookE related instructions. */
896 /* Not a recognized prologue instruction.
897 Handle optimizer code motions into the prologue by continuing
898 the search if we have no valid frame yet or if the return
899 address is not yet saved in the frame. */
900 if (fdata
->frameless
== 0
901 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
904 if (op
== 0x4e800020 /* blr */
905 || op
== 0x4e800420) /* bctr */
906 /* Do not scan past epilogue in frameless functions or
909 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
910 /* Never skip branches. */
913 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
914 /* Do not scan too many insns, scanning insns is expensive with
918 /* Continue scanning. */
919 prev_insn_was_prologue_insn
= 0;
925 /* I have problems with skipping over __main() that I need to address
926 * sometime. Previously, I used to use misc_function_vector which
927 * didn't work as well as I wanted to be. -MGO */
929 /* If the first thing after skipping a prolog is a branch to a function,
930 this might be a call to an initializer in main(), introduced by gcc2.
931 We'd like to skip over it as well. Fortunately, xlc does some extra
932 work before calling a function right after a prologue, thus we can
933 single out such gcc2 behaviour. */
936 if ((op
& 0xfc000001) == 0x48000001)
937 { /* bl foo, an initializer function? */
938 op
= read_memory_integer (pc
+ 4, 4);
940 if (op
== 0x4def7b82)
941 { /* cror 0xf, 0xf, 0xf (nop) */
943 /* Check and see if we are in main. If so, skip over this
944 initializer function as well. */
946 tmp
= find_pc_misc_function (pc
);
947 if (tmp
>= 0 && STREQ (misc_function_vector
[tmp
].name
, main_name ()))
953 fdata
->offset
= -fdata
->offset
;
954 return last_prologue_pc
;
958 /*************************************************************************
959 Support for creating pushing a dummy frame into the stack, and popping
961 *************************************************************************/
964 /* Pop the innermost frame, go back to the caller. */
967 rs6000_pop_frame (void)
969 CORE_ADDR pc
, lr
, sp
, prev_sp
, addr
; /* %pc, %lr, %sp */
970 struct rs6000_framedata fdata
;
971 struct frame_info
*frame
= get_current_frame ();
975 sp
= get_frame_base (frame
);
977 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
978 get_frame_base (frame
),
979 get_frame_base (frame
)))
981 generic_pop_dummy_frame ();
982 flush_cached_frames ();
986 /* Make sure that all registers are valid. */
987 deprecated_read_register_bytes (0, NULL
, REGISTER_BYTES
);
989 /* Figure out previous %pc value. If the function is frameless, it is
990 still in the link register, otherwise walk the frames and retrieve the
991 saved %pc value in the previous frame. */
993 addr
= get_pc_function_start (get_frame_pc (frame
));
994 (void) skip_prologue (addr
, get_frame_pc (frame
), &fdata
);
996 wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1000 prev_sp
= read_memory_addr (sp
, wordsize
);
1001 if (fdata
.lr_offset
== 0)
1002 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1004 lr
= read_memory_addr (prev_sp
+ fdata
.lr_offset
, wordsize
);
1006 /* reset %pc value. */
1007 write_register (PC_REGNUM
, lr
);
1009 /* reset register values if any was saved earlier. */
1011 if (fdata
.saved_gpr
!= -1)
1013 addr
= prev_sp
+ fdata
.gpr_offset
;
1014 for (ii
= fdata
.saved_gpr
; ii
<= 31; ++ii
)
1016 read_memory (addr
, &deprecated_registers
[REGISTER_BYTE (ii
)],
1022 if (fdata
.saved_fpr
!= -1)
1024 addr
= prev_sp
+ fdata
.fpr_offset
;
1025 for (ii
= fdata
.saved_fpr
; ii
<= 31; ++ii
)
1027 read_memory (addr
, &deprecated_registers
[REGISTER_BYTE (ii
+ FP0_REGNUM
)], 8);
1032 write_register (SP_REGNUM
, prev_sp
);
1033 target_store_registers (-1);
1034 flush_cached_frames ();
1037 /* Fixup the call sequence of a dummy function, with the real function
1038 address. Its arguments will be passed by gdb. */
1041 rs6000_fix_call_dummy (char *dummyname
, CORE_ADDR pc
, CORE_ADDR fun
,
1042 int nargs
, struct value
**args
, struct type
*type
,
1046 CORE_ADDR target_addr
;
1048 if (rs6000_find_toc_address_hook
!= NULL
)
1050 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (fun
);
1051 write_register (gdbarch_tdep (current_gdbarch
)->ppc_toc_regnum
,
1056 /* All the ABI's require 16 byte alignment. */
1058 rs6000_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1060 return (addr
& -16);
1063 /* Pass the arguments in either registers, or in the stack. In RS/6000,
1064 the first eight words of the argument list (that might be less than
1065 eight parameters if some parameters occupy more than one word) are
1066 passed in r3..r10 registers. float and double parameters are
1067 passed in fpr's, in addition to that. Rest of the parameters if any
1068 are passed in user stack. There might be cases in which half of the
1069 parameter is copied into registers, the other half is pushed into
1072 Stack must be aligned on 64-bit boundaries when synthesizing
1075 If the function is returning a structure, then the return address is passed
1076 in r3, then the first 7 words of the parameters can be passed in registers,
1077 starting from r4. */
1080 rs6000_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1081 int struct_return
, CORE_ADDR struct_addr
)
1085 int argno
; /* current argument number */
1086 int argbytes
; /* current argument byte */
1087 char tmp_buffer
[50];
1088 int f_argno
= 0; /* current floating point argno */
1089 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1091 struct value
*arg
= 0;
1096 /* The first eight words of ther arguments are passed in registers.
1097 Copy them appropriately.
1099 If the function is returning a `struct', then the first word (which
1100 will be passed in r3) is used for struct return address. In that
1101 case we should advance one word and start from r4 register to copy
1104 ii
= struct_return
? 1 : 0;
1107 effectively indirect call... gcc does...
1109 return_val example( float, int);
1112 float in fp0, int in r3
1113 offset of stack on overflow 8/16
1114 for varargs, must go by type.
1116 float in r3&r4, int in r5
1117 offset of stack on overflow different
1119 return in r3 or f0. If no float, must study how gcc emulates floats;
1120 pay attention to arg promotion.
1121 User may have to cast\args to handle promotion correctly
1122 since gdb won't know if prototype supplied or not.
1125 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
1127 int reg_size
= REGISTER_RAW_SIZE (ii
+ 3);
1130 type
= check_typedef (VALUE_TYPE (arg
));
1131 len
= TYPE_LENGTH (type
);
1133 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1136 /* Floating point arguments are passed in fpr's, as well as gpr's.
1137 There are 13 fpr's reserved for passing parameters. At this point
1138 there is no way we would run out of them. */
1142 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1144 memcpy (&deprecated_registers
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1145 VALUE_CONTENTS (arg
),
1153 /* Argument takes more than one register. */
1154 while (argbytes
< len
)
1156 memset (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)], 0,
1158 memcpy (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)],
1159 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1160 (len
- argbytes
) > reg_size
1161 ? reg_size
: len
- argbytes
);
1162 ++ii
, argbytes
+= reg_size
;
1165 goto ran_out_of_registers_for_arguments
;
1172 /* Argument can fit in one register. No problem. */
1173 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1174 memset (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1175 memcpy ((char *)&deprecated_registers
[REGISTER_BYTE (ii
+ 3)] + adj
,
1176 VALUE_CONTENTS (arg
), len
);
1181 ran_out_of_registers_for_arguments
:
1183 saved_sp
= read_sp ();
1185 /* Location for 8 parameters are always reserved. */
1188 /* Another six words for back chain, TOC register, link register, etc. */
1191 /* Stack pointer must be quadword aligned. */
1194 /* If there are more arguments, allocate space for them in
1195 the stack, then push them starting from the ninth one. */
1197 if ((argno
< nargs
) || argbytes
)
1203 space
+= ((len
- argbytes
+ 3) & -4);
1209 for (; jj
< nargs
; ++jj
)
1211 struct value
*val
= args
[jj
];
1212 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1215 /* Add location required for the rest of the parameters. */
1216 space
= (space
+ 15) & -16;
1219 /* This is another instance we need to be concerned about
1220 securing our stack space. If we write anything underneath %sp
1221 (r1), we might conflict with the kernel who thinks he is free
1222 to use this area. So, update %sp first before doing anything
1225 write_register (SP_REGNUM
, sp
);
1227 /* If the last argument copied into the registers didn't fit there
1228 completely, push the rest of it into stack. */
1232 write_memory (sp
+ 24 + (ii
* 4),
1233 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1236 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1239 /* Push the rest of the arguments into stack. */
1240 for (; argno
< nargs
; ++argno
)
1244 type
= check_typedef (VALUE_TYPE (arg
));
1245 len
= TYPE_LENGTH (type
);
1248 /* Float types should be passed in fpr's, as well as in the
1250 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1255 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1257 memcpy (&deprecated_registers
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1258 VALUE_CONTENTS (arg
),
1263 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1264 ii
+= ((len
+ 3) & -4) / 4;
1268 /* Secure stack areas first, before doing anything else. */
1269 write_register (SP_REGNUM
, sp
);
1271 /* set back chain properly */
1272 store_address (tmp_buffer
, 4, saved_sp
);
1273 write_memory (sp
, tmp_buffer
, 4);
1275 target_store_registers (-1);
1279 /* Function: ppc_push_return_address (pc, sp)
1280 Set up the return address for the inferior function call. */
1283 ppc_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1285 write_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
,
1286 CALL_DUMMY_ADDRESS ());
1290 /* Extract a function return value of type TYPE from raw register array
1291 REGBUF, and copy that return value into VALBUF in virtual format. */
1293 e500_extract_return_value (struct type
*valtype
, struct regcache
*regbuf
, void *valbuf
)
1296 int vallen
= TYPE_LENGTH (valtype
);
1297 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1299 if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1301 && TYPE_VECTOR (valtype
))
1303 regcache_raw_read (regbuf
, tdep
->ppc_ev0_regnum
+ 3, valbuf
);
1307 /* Return value is copied starting from r3. Note that r3 for us
1308 is a pseudo register. */
1310 int return_regnum
= tdep
->ppc_gp0_regnum
+ 3;
1311 int reg_size
= REGISTER_RAW_SIZE (return_regnum
);
1317 /* Compute where we will start storing the value from. */
1318 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1320 if (vallen
<= reg_size
)
1321 offset
= reg_size
- vallen
;
1323 offset
= reg_size
+ (reg_size
- vallen
);
1326 /* How big does the local buffer need to be? */
1327 if (vallen
<= reg_size
)
1328 val_buffer
= alloca (reg_size
);
1330 val_buffer
= alloca (vallen
);
1332 /* Read all we need into our private buffer. We copy it in
1333 chunks that are as long as one register, never shorter, even
1334 if the value is smaller than the register. */
1335 while (copied
< vallen
)
1337 reg_part_size
= REGISTER_RAW_SIZE (return_regnum
+ i
);
1338 /* It is a pseudo/cooked register. */
1339 regcache_cooked_read (regbuf
, return_regnum
+ i
,
1340 val_buffer
+ copied
);
1341 copied
+= reg_part_size
;
1344 /* Put the stuff in the return buffer. */
1345 memcpy (valbuf
, val_buffer
+ offset
, vallen
);
1350 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1353 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1355 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1360 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1361 We need to truncate the return value into float size (4 byte) if
1364 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1366 ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)],
1367 TYPE_LENGTH (valtype
));
1370 memcpy (&dd
, ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1372 memcpy (valbuf
, &ff
, sizeof (float));
1375 else if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1376 && TYPE_LENGTH (valtype
) == 16
1377 && TYPE_VECTOR (valtype
))
1379 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1380 TYPE_LENGTH (valtype
));
1384 /* return value is copied starting from r3. */
1385 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1386 && TYPE_LENGTH (valtype
) < REGISTER_RAW_SIZE (3))
1387 offset
= REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1390 regbuf
+ REGISTER_BYTE (3) + offset
,
1391 TYPE_LENGTH (valtype
));
1395 /* Return whether handle_inferior_event() should proceed through code
1396 starting at PC in function NAME when stepping.
1398 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1399 handle memory references that are too distant to fit in instructions
1400 generated by the compiler. For example, if 'foo' in the following
1405 is greater than 32767, the linker might replace the lwz with a branch to
1406 somewhere in @FIX1 that does the load in 2 instructions and then branches
1407 back to where execution should continue.
1409 GDB should silently step over @FIX code, just like AIX dbx does.
1410 Unfortunately, the linker uses the "b" instruction for the branches,
1411 meaning that the link register doesn't get set. Therefore, GDB's usual
1412 step_over_function() mechanism won't work.
1414 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1415 in handle_inferior_event() to skip past @FIX code. */
1418 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1420 return name
&& !strncmp (name
, "@FIX", 4);
1423 /* Skip code that the user doesn't want to see when stepping:
1425 1. Indirect function calls use a piece of trampoline code to do context
1426 switching, i.e. to set the new TOC table. Skip such code if we are on
1427 its first instruction (as when we have single-stepped to here).
1429 2. Skip shared library trampoline code (which is different from
1430 indirect function call trampolines).
1432 3. Skip bigtoc fixup code.
1434 Result is desired PC to step until, or NULL if we are not in
1435 code that should be skipped. */
1438 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1440 register unsigned int ii
, op
;
1442 CORE_ADDR solib_target_pc
;
1443 struct minimal_symbol
*msymbol
;
1445 static unsigned trampoline_code
[] =
1447 0x800b0000, /* l r0,0x0(r11) */
1448 0x90410014, /* st r2,0x14(r1) */
1449 0x7c0903a6, /* mtctr r0 */
1450 0x804b0004, /* l r2,0x4(r11) */
1451 0x816b0008, /* l r11,0x8(r11) */
1452 0x4e800420, /* bctr */
1453 0x4e800020, /* br */
1457 /* Check for bigtoc fixup code. */
1458 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1459 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, DEPRECATED_SYMBOL_NAME (msymbol
)))
1461 /* Double-check that the third instruction from PC is relative "b". */
1462 op
= read_memory_integer (pc
+ 8, 4);
1463 if ((op
& 0xfc000003) == 0x48000000)
1465 /* Extract bits 6-29 as a signed 24-bit relative word address and
1466 add it to the containing PC. */
1467 rel
= ((int)(op
<< 6) >> 6);
1468 return pc
+ 8 + rel
;
1472 /* If pc is in a shared library trampoline, return its target. */
1473 solib_target_pc
= find_solib_trampoline_target (pc
);
1474 if (solib_target_pc
)
1475 return solib_target_pc
;
1477 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1479 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1480 if (op
!= trampoline_code
[ii
])
1483 ii
= read_register (11); /* r11 holds destination addr */
1484 pc
= read_memory_addr (ii
, gdbarch_tdep (current_gdbarch
)->wordsize
); /* (r11) value */
1488 /* Determines whether the function FI has a frame on the stack or not. */
1491 rs6000_frameless_function_invocation (struct frame_info
*fi
)
1493 CORE_ADDR func_start
;
1494 struct rs6000_framedata fdata
;
1496 /* Don't even think about framelessness except on the innermost frame
1497 or if the function was interrupted by a signal. */
1498 if (get_next_frame (fi
) != NULL
1499 && !(get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1502 func_start
= get_pc_function_start (get_frame_pc (fi
));
1504 /* If we failed to find the start of the function, it is a mistake
1505 to inspect the instructions. */
1509 /* A frame with a zero PC is usually created by dereferencing a NULL
1510 function pointer, normally causing an immediate core dump of the
1511 inferior. Mark function as frameless, as the inferior has no chance
1512 of setting up a stack frame. */
1513 if (get_frame_pc (fi
) == 0)
1519 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1520 return fdata
.frameless
;
1523 /* Return the PC saved in a frame. */
1526 rs6000_frame_saved_pc (struct frame_info
*fi
)
1528 CORE_ADDR func_start
;
1529 struct rs6000_framedata fdata
;
1530 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1531 int wordsize
= tdep
->wordsize
;
1533 if ((get_frame_type (fi
) == SIGTRAMP_FRAME
))
1534 return read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
1537 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1538 get_frame_base (fi
),
1539 get_frame_base (fi
)))
1540 return deprecated_read_register_dummy (get_frame_pc (fi
),
1541 get_frame_base (fi
), PC_REGNUM
);
1543 func_start
= get_pc_function_start (get_frame_pc (fi
));
1545 /* If we failed to find the start of the function, it is a mistake
1546 to inspect the instructions. */
1550 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1552 if (fdata
.lr_offset
== 0 && get_next_frame (fi
) != NULL
)
1554 if ((get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1555 return read_memory_addr ((get_frame_base (get_next_frame (fi
))
1556 + SIG_FRAME_LR_OFFSET
),
1558 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1559 /* The link register wasn't saved by this frame and the next
1560 (inner, newer) frame is a dummy. Get the link register
1561 value by unwinding it from that [dummy] frame. */
1564 frame_unwind_unsigned_register (get_next_frame (fi
),
1565 tdep
->ppc_lr_regnum
, &lr
);
1569 return read_memory_addr (DEPRECATED_FRAME_CHAIN (fi
)
1570 + tdep
->lr_frame_offset
,
1574 if (fdata
.lr_offset
== 0)
1575 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1577 return read_memory_addr (DEPRECATED_FRAME_CHAIN (fi
) + fdata
.lr_offset
,
1581 /* If saved registers of frame FI are not known yet, read and cache them.
1582 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1583 in which case the framedata are read. */
1586 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1588 CORE_ADDR frame_addr
;
1589 struct rs6000_framedata work_fdata
;
1590 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1591 int wordsize
= tdep
->wordsize
;
1593 if (get_frame_saved_regs (fi
))
1598 fdatap
= &work_fdata
;
1599 (void) skip_prologue (get_pc_function_start (get_frame_pc (fi
)),
1600 get_frame_pc (fi
), fdatap
);
1603 frame_saved_regs_zalloc (fi
);
1605 /* If there were any saved registers, figure out parent's stack
1607 /* The following is true only if the frame doesn't have a call to
1610 if (fdatap
->saved_fpr
== 0
1611 && fdatap
->saved_gpr
== 0
1612 && fdatap
->saved_vr
== 0
1613 && fdatap
->saved_ev
== 0
1614 && fdatap
->lr_offset
== 0
1615 && fdatap
->cr_offset
== 0
1616 && fdatap
->vr_offset
== 0
1617 && fdatap
->ev_offset
== 0)
1620 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1621 address of the current frame. Things might be easier if the
1622 ->frame pointed to the outer-most address of the frame. In the
1623 mean time, the address of the prev frame is used as the base
1624 address of this frame. */
1625 frame_addr
= DEPRECATED_FRAME_CHAIN (fi
);
1627 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1628 All fpr's from saved_fpr to fp31 are saved. */
1630 if (fdatap
->saved_fpr
>= 0)
1633 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1634 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1636 get_frame_saved_regs (fi
)[FP0_REGNUM
+ i
] = fpr_addr
;
1641 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1642 All gpr's from saved_gpr to gpr31 are saved. */
1644 if (fdatap
->saved_gpr
>= 0)
1647 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1648 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1650 get_frame_saved_regs (fi
)[i
] = gpr_addr
;
1651 gpr_addr
+= wordsize
;
1655 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1656 All vr's from saved_vr to vr31 are saved. */
1657 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1659 if (fdatap
->saved_vr
>= 0)
1662 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1663 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1665 get_frame_saved_regs (fi
)[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1666 vr_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1671 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1672 All vr's from saved_ev to ev31 are saved. ????? */
1673 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
1675 if (fdatap
->saved_ev
>= 0)
1678 CORE_ADDR ev_addr
= frame_addr
+ fdatap
->ev_offset
;
1679 for (i
= fdatap
->saved_ev
; i
< 32; i
++)
1681 get_frame_saved_regs (fi
)[tdep
->ppc_ev0_regnum
+ i
] = ev_addr
;
1682 get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = ev_addr
+ 4;
1683 ev_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_ev0_regnum
);
1688 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1690 if (fdatap
->cr_offset
!= 0)
1691 get_frame_saved_regs (fi
)[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1693 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1695 if (fdatap
->lr_offset
!= 0)
1696 get_frame_saved_regs (fi
)[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1698 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1700 if (fdatap
->vrsave_offset
!= 0)
1701 get_frame_saved_regs (fi
)[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1704 /* Return the address of a frame. This is the inital %sp value when the frame
1705 was first allocated. For functions calling alloca(), it might be saved in
1706 an alloca register. */
1709 frame_initial_stack_address (struct frame_info
*fi
)
1712 struct rs6000_framedata fdata
;
1713 struct frame_info
*callee_fi
;
1715 /* If the initial stack pointer (frame address) of this frame is known,
1718 if (get_frame_extra_info (fi
)->initial_sp
)
1719 return get_frame_extra_info (fi
)->initial_sp
;
1721 /* Find out if this function is using an alloca register. */
1723 (void) skip_prologue (get_pc_function_start (get_frame_pc (fi
)),
1724 get_frame_pc (fi
), &fdata
);
1726 /* If saved registers of this frame are not known yet, read and
1729 if (!get_frame_saved_regs (fi
))
1730 frame_get_saved_regs (fi
, &fdata
);
1732 /* If no alloca register used, then fi->frame is the value of the %sp for
1733 this frame, and it is good enough. */
1735 if (fdata
.alloca_reg
< 0)
1737 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1738 return get_frame_extra_info (fi
)->initial_sp
;
1741 /* There is an alloca register, use its value, in the current frame,
1742 as the initial stack pointer. */
1744 char *tmpbuf
= alloca (MAX_REGISTER_RAW_SIZE
);
1745 if (frame_register_read (fi
, fdata
.alloca_reg
, tmpbuf
))
1747 get_frame_extra_info (fi
)->initial_sp
1748 = extract_unsigned_integer (tmpbuf
,
1749 REGISTER_RAW_SIZE (fdata
.alloca_reg
));
1752 /* NOTE: cagney/2002-04-17: At present the only time
1753 frame_register_read will fail is when the register isn't
1754 available. If that does happen, use the frame. */
1755 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1757 return get_frame_extra_info (fi
)->initial_sp
;
1760 /* Describe the pointer in each stack frame to the previous stack frame
1763 /* DEPRECATED_FRAME_CHAIN takes a frame's nominal address and produces
1764 the frame's chain-pointer. */
1766 /* In the case of the RS/6000, the frame's nominal address
1767 is the address of a 4-byte word containing the calling frame's address. */
1770 rs6000_frame_chain (struct frame_info
*thisframe
)
1772 CORE_ADDR fp
, fpp
, lr
;
1773 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1775 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (thisframe
),
1776 get_frame_base (thisframe
),
1777 get_frame_base (thisframe
)))
1778 /* A dummy frame always correctly chains back to the previous
1780 return read_memory_addr (get_frame_base (thisframe
), wordsize
);
1782 if (inside_entry_file (get_frame_pc (thisframe
))
1783 || get_frame_pc (thisframe
) == entry_point_address ())
1786 if ((get_frame_type (thisframe
) == SIGTRAMP_FRAME
))
1787 fp
= read_memory_addr (get_frame_base (thisframe
) + SIG_FRAME_FP_OFFSET
,
1789 else if (get_next_frame (thisframe
) != NULL
1790 && (get_frame_type (get_next_frame (thisframe
)) == SIGTRAMP_FRAME
)
1791 && FRAMELESS_FUNCTION_INVOCATION (thisframe
))
1792 /* A frameless function interrupted by a signal did not change the
1794 fp
= get_frame_base (thisframe
);
1796 fp
= read_memory_addr (get_frame_base (thisframe
), wordsize
);
1800 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1801 isn't available with that word size, return 0. */
1804 regsize (const struct reg
*reg
, int wordsize
)
1806 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1809 /* Return the name of register number N, or null if no such register exists
1810 in the current architecture. */
1813 rs6000_register_name (int n
)
1815 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1816 const struct reg
*reg
= tdep
->regs
+ n
;
1818 if (!regsize (reg
, tdep
->wordsize
))
1823 /* Index within `registers' of the first byte of the space for
1827 rs6000_register_byte (int n
)
1829 return gdbarch_tdep (current_gdbarch
)->regoff
[n
];
1832 /* Return the number of bytes of storage in the actual machine representation
1833 for register N if that register is available, else return 0. */
1836 rs6000_register_raw_size (int n
)
1838 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1839 const struct reg
*reg
= tdep
->regs
+ n
;
1840 return regsize (reg
, tdep
->wordsize
);
1843 /* Return the GDB type object for the "standard" data type
1844 of data in register N. */
1846 static struct type
*
1847 rs6000_register_virtual_type (int n
)
1849 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1850 const struct reg
*reg
= tdep
->regs
+ n
;
1853 return builtin_type_double
;
1856 int size
= regsize (reg
, tdep
->wordsize
);
1860 if (tdep
->ppc_ev0_regnum
<= n
&& n
<= tdep
->ppc_ev31_regnum
)
1861 return builtin_type_vec64
;
1863 return builtin_type_int64
;
1866 return builtin_type_vec128
;
1869 return builtin_type_int32
;
1875 /* Return whether register N requires conversion when moving from raw format
1878 The register format for RS/6000 floating point registers is always
1879 double, we need a conversion if the memory format is float. */
1882 rs6000_register_convertible (int n
)
1884 const struct reg
*reg
= gdbarch_tdep (current_gdbarch
)->regs
+ n
;
1888 /* Convert data from raw format for register N in buffer FROM
1889 to virtual format with type TYPE in buffer TO. */
1892 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1893 char *from
, char *to
)
1895 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1897 double val
= extract_floating (from
, REGISTER_RAW_SIZE (n
));
1898 store_floating (to
, TYPE_LENGTH (type
), val
);
1901 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1904 /* Convert data from virtual format with type TYPE in buffer FROM
1905 to raw format for register N in buffer TO. */
1908 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1909 char *from
, char *to
)
1911 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1913 double val
= extract_floating (from
, TYPE_LENGTH (type
));
1914 store_floating (to
, REGISTER_RAW_SIZE (n
), val
);
1917 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1921 e500_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1922 int reg_nr
, void *buffer
)
1926 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1927 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1929 if (reg_nr
>= tdep
->ppc_gp0_regnum
1930 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1932 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1934 /* Build the value in the provided buffer. */
1935 /* Read the raw register of which this one is the lower portion. */
1936 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1937 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1939 memcpy ((char *) buffer
, temp_buffer
+ offset
, 4);
1944 e500_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1945 int reg_nr
, const void *buffer
)
1949 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1950 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1952 if (reg_nr
>= tdep
->ppc_gp0_regnum
1953 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1955 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1956 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1957 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1960 /* Let's read the value of the base register into a temporary
1961 buffer, so that overwriting the last four bytes with the new
1962 value of the pseudo will leave the upper 4 bytes unchanged. */
1963 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1965 /* Write as an 8 byte quantity. */
1966 memcpy (temp_buffer
+ offset
, (char *) buffer
, 4);
1967 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
1971 /* Convert a dwarf2 register number to a gdb REGNUM. */
1973 e500_dwarf2_reg_to_regnum (int num
)
1976 if (0 <= num
&& num
<= 31)
1977 return num
+ gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
;
1982 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1985 rs6000_stab_reg_to_regnum (int num
)
1991 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
1994 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
1997 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
2000 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
2009 /* Store the address of the place in which to copy the structure the
2010 subroutine will return. */
2013 rs6000_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2015 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2016 write_register (tdep
->ppc_gp0_regnum
+ 3, addr
);
2019 /* Write into appropriate registers a function return value
2020 of type TYPE, given in virtual format. */
2022 e500_store_return_value (struct type
*type
, char *valbuf
)
2024 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2026 /* Everything is returned in GPR3 and up. */
2029 int len
= TYPE_LENGTH (type
);
2030 while (copied
< len
)
2032 int regnum
= gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3 + i
;
2033 int reg_size
= REGISTER_RAW_SIZE (regnum
);
2034 char *reg_val_buf
= alloca (reg_size
);
2036 memcpy (reg_val_buf
, valbuf
+ copied
, reg_size
);
2038 deprecated_write_register_gen (regnum
, reg_val_buf
);
2044 rs6000_store_return_value (struct type
*type
, char *valbuf
)
2046 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2048 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2050 /* Floating point values are returned starting from FPR1 and up.
2051 Say a double_double_double type could be returned in
2052 FPR1/FPR2/FPR3 triple. */
2054 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
2055 TYPE_LENGTH (type
));
2056 else if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
2058 if (TYPE_LENGTH (type
) == 16
2059 && TYPE_VECTOR (type
))
2060 deprecated_write_register_bytes (REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
2061 valbuf
, TYPE_LENGTH (type
));
2064 /* Everything else is returned in GPR3 and up. */
2065 deprecated_write_register_bytes (REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
2066 valbuf
, TYPE_LENGTH (type
));
2069 /* Extract from an array REGBUF containing the (raw) register state
2070 the address in which a function should return its structure value,
2071 as a CORE_ADDR (or an expression that can be used as one). */
2074 rs6000_extract_struct_value_address (struct regcache
*regcache
)
2076 /* FIXME: cagney/2002-09-26: PR gdb/724: When making an inferior
2077 function call GDB knows the address of the struct return value
2078 and hence, should not need to call this function. Unfortunately,
2079 the current hand_function_call() code only saves the most recent
2080 struct address leading to occasional calls. The code should
2081 instead maintain a stack of such addresses (in the dummy frame
2083 /* NOTE: cagney/2002-09-26: Return 0 which indicates that we've
2084 really got no idea where the return value is being stored. While
2085 r3, on function entry, contained the address it will have since
2086 been reused (scratch) and hence wouldn't be valid */
2090 /* Return whether PC is in a dummy function call.
2092 FIXME: This just checks for the end of the stack, which is broken
2093 for things like stepping through gcc nested function stubs. */
2096 rs6000_pc_in_call_dummy (CORE_ADDR pc
, CORE_ADDR sp
, CORE_ADDR fp
)
2098 return sp
< pc
&& pc
< fp
;
2101 /* Hook called when a new child process is started. */
2104 rs6000_create_inferior (int pid
)
2106 if (rs6000_set_host_arch_hook
)
2107 rs6000_set_host_arch_hook (pid
);
2110 /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
2112 Usually a function pointer's representation is simply the address
2113 of the function. On the RS/6000 however, a function pointer is
2114 represented by a pointer to a TOC entry. This TOC entry contains
2115 three words, the first word is the address of the function, the
2116 second word is the TOC pointer (r2), and the third word is the
2117 static chain value. Throughout GDB it is currently assumed that a
2118 function pointer contains the address of the function, which is not
2119 easy to fix. In addition, the conversion of a function address to
2120 a function pointer would require allocation of a TOC entry in the
2121 inferior's memory space, with all its drawbacks. To be able to
2122 call C++ virtual methods in the inferior (which are called via
2123 function pointers), find_function_addr uses this function to get the
2124 function address from a function pointer. */
2126 /* Return real function address if ADDR (a function pointer) is in the data
2127 space and is therefore a special function pointer. */
2130 rs6000_convert_from_func_ptr_addr (CORE_ADDR addr
)
2132 struct obj_section
*s
;
2134 s
= find_pc_section (addr
);
2135 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
2138 /* ADDR is in the data space, so it's a special function pointer. */
2139 return read_memory_addr (addr
, gdbarch_tdep (current_gdbarch
)->wordsize
);
2143 /* Handling the various POWER/PowerPC variants. */
2146 /* The arrays here called registers_MUMBLE hold information about available
2149 For each family of PPC variants, I've tried to isolate out the
2150 common registers and put them up front, so that as long as you get
2151 the general family right, GDB will correctly identify the registers
2152 common to that family. The common register sets are:
2154 For the 60x family: hid0 hid1 iabr dabr pir
2156 For the 505 and 860 family: eie eid nri
2158 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
2159 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
2162 Most of these register groups aren't anything formal. I arrived at
2163 them by looking at the registers that occurred in more than one
2166 Note: kevinb/2002-04-30: Support for the fpscr register was added
2167 during April, 2002. Slot 70 is being used for PowerPC and slot 71
2168 for Power. For PowerPC, slot 70 was unused and was already in the
2169 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
2170 slot 70 was being used for "mq", so the next available slot (71)
2171 was chosen. It would have been nice to be able to make the
2172 register numbers the same across processor cores, but this wasn't
2173 possible without either 1) renumbering some registers for some
2174 processors or 2) assigning fpscr to a really high slot that's
2175 larger than any current register number. Doing (1) is bad because
2176 existing stubs would break. Doing (2) is undesirable because it
2177 would introduce a really large gap between fpscr and the rest of
2178 the registers for most processors. */
2180 /* Convenience macros for populating register arrays. */
2182 /* Within another macro, convert S to a string. */
2186 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
2187 and 64 bits on 64-bit systems. */
2188 #define R(name) { STR(name), 4, 8, 0, 0 }
2190 /* Return a struct reg defining register NAME that's 32 bits on all
2192 #define R4(name) { STR(name), 4, 4, 0, 0 }
2194 /* Return a struct reg defining register NAME that's 64 bits on all
2196 #define R8(name) { STR(name), 8, 8, 0, 0 }
2198 /* Return a struct reg defining register NAME that's 128 bits on all
2200 #define R16(name) { STR(name), 16, 16, 0, 0 }
2202 /* Return a struct reg defining floating-point register NAME. */
2203 #define F(name) { STR(name), 8, 8, 1, 0 }
2205 /* Return a struct reg defining a pseudo register NAME. */
2206 #define P(name) { STR(name), 4, 8, 0, 1}
2208 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
2209 systems and that doesn't exist on 64-bit systems. */
2210 #define R32(name) { STR(name), 4, 0, 0, 0 }
2212 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
2213 systems and that doesn't exist on 32-bit systems. */
2214 #define R64(name) { STR(name), 0, 8, 0, 0 }
2216 /* Return a struct reg placeholder for a register that doesn't exist. */
2217 #define R0 { 0, 0, 0, 0, 0 }
2219 /* UISA registers common across all architectures, including POWER. */
2221 #define COMMON_UISA_REGS \
2222 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2223 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2224 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2225 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2226 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
2227 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
2228 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
2229 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
2230 /* 64 */ R(pc), R(ps)
2232 #define COMMON_UISA_NOFP_REGS \
2233 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2234 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2235 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2236 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2237 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2238 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2239 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2240 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2241 /* 64 */ R(pc), R(ps)
2243 /* UISA-level SPRs for PowerPC. */
2244 #define PPC_UISA_SPRS \
2245 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
2247 /* UISA-level SPRs for PowerPC without floating point support. */
2248 #define PPC_UISA_NOFP_SPRS \
2249 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
2251 /* Segment registers, for PowerPC. */
2252 #define PPC_SEGMENT_REGS \
2253 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2254 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2255 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2256 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2258 /* OEA SPRs for PowerPC. */
2259 #define PPC_OEA_SPRS \
2261 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2262 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2263 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2264 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2265 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2266 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2267 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2268 /* 116 */ R4(dec), R(dabr), R4(ear)
2270 /* AltiVec registers. */
2271 #define PPC_ALTIVEC_REGS \
2272 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2273 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2274 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2275 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2276 /*151*/R4(vscr), R4(vrsave)
2278 /* Vectors of hi-lo general purpose registers. */
2279 #define PPC_EV_REGS \
2280 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
2281 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
2282 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
2283 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2285 /* Lower half of the EV registers. */
2286 #define PPC_GPRS_PSEUDO_REGS \
2287 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2288 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2289 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2290 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31)
2292 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2293 user-level SPR's. */
2294 static const struct reg registers_power
[] =
2297 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
2301 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2302 view of the PowerPC. */
2303 static const struct reg registers_powerpc
[] =
2310 /* PowerPC UISA - a PPC processor as viewed by user-level
2311 code, but without floating point registers. */
2312 static const struct reg registers_powerpc_nofp
[] =
2314 COMMON_UISA_NOFP_REGS
,
2318 /* IBM PowerPC 403. */
2319 static const struct reg registers_403
[] =
2325 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2326 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2327 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2328 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2329 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2330 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
2333 /* IBM PowerPC 403GC. */
2334 static const struct reg registers_403GC
[] =
2340 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2341 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2342 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2343 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2344 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2345 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2346 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2347 /* 147 */ R(tbhu
), R(tblu
)
2350 /* Motorola PowerPC 505. */
2351 static const struct reg registers_505
[] =
2357 /* 119 */ R(eie
), R(eid
), R(nri
)
2360 /* Motorola PowerPC 860 or 850. */
2361 static const struct reg registers_860
[] =
2367 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2368 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2369 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2370 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2371 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2372 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2373 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2374 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2375 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2376 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2377 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2378 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2381 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2382 for reading and writing RTCU and RTCL. However, how one reads and writes a
2383 register is the stub's problem. */
2384 static const struct reg registers_601
[] =
2390 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2391 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2394 /* Motorola PowerPC 602. */
2395 static const struct reg registers_602
[] =
2401 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2402 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2403 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2406 /* Motorola/IBM PowerPC 603 or 603e. */
2407 static const struct reg registers_603
[] =
2413 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2414 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2415 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2418 /* Motorola PowerPC 604 or 604e. */
2419 static const struct reg registers_604
[] =
2425 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2426 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2427 /* 127 */ R(sia
), R(sda
)
2430 /* Motorola/IBM PowerPC 750 or 740. */
2431 static const struct reg registers_750
[] =
2437 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2438 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2439 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2440 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2441 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2442 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2446 /* Motorola PowerPC 7400. */
2447 static const struct reg registers_7400
[] =
2449 /* gpr0-gpr31, fpr0-fpr31 */
2451 /* ctr, xre, lr, cr */
2456 /* vr0-vr31, vrsave, vscr */
2458 /* FIXME? Add more registers? */
2461 /* Motorola e500. */
2462 static const struct reg registers_e500
[] =
2465 /* cr, lr, ctr, xer, "" */
2469 R8(acc
), R(spefscr
),
2470 /* NOTE: Add new registers here the end of the raw register
2471 list and just before the first pseudo register. */
2473 PPC_GPRS_PSEUDO_REGS
2476 /* Information about a particular processor variant. */
2480 /* Name of this variant. */
2483 /* English description of the variant. */
2486 /* bfd_arch_info.arch corresponding to variant. */
2487 enum bfd_architecture arch
;
2489 /* bfd_arch_info.mach corresponding to variant. */
2492 /* Number of real registers. */
2495 /* Number of pseudo registers. */
2498 /* Number of total registers (the sum of nregs and npregs). */
2501 /* Table of register names; registers[R] is the name of the register
2503 const struct reg
*regs
;
2506 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2509 num_registers (const struct reg
*reg_list
, int num_tot_regs
)
2514 for (i
= 0; i
< num_tot_regs
; i
++)
2515 if (!reg_list
[i
].pseudo
)
2522 num_pseudo_registers (const struct reg
*reg_list
, int num_tot_regs
)
2527 for (i
= 0; i
< num_tot_regs
; i
++)
2528 if (reg_list
[i
].pseudo
)
2534 /* Information in this table comes from the following web sites:
2535 IBM: http://www.chips.ibm.com:80/products/embedded/
2536 Motorola: http://www.mot.com/SPS/PowerPC/
2538 I'm sure I've got some of the variant descriptions not quite right.
2539 Please report any inaccuracies you find to GDB's maintainer.
2541 If you add entries to this table, please be sure to allow the new
2542 value as an argument to the --with-cpu flag, in configure.in. */
2544 static struct variant variants
[] =
2547 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2548 bfd_mach_ppc
, -1, -1, tot_num_registers (registers_powerpc
),
2550 {"power", "POWER user-level", bfd_arch_rs6000
,
2551 bfd_mach_rs6k
, -1, -1, tot_num_registers (registers_power
),
2553 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2554 bfd_mach_ppc_403
, -1, -1, tot_num_registers (registers_403
),
2556 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2557 bfd_mach_ppc_601
, -1, -1, tot_num_registers (registers_601
),
2559 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2560 bfd_mach_ppc_602
, -1, -1, tot_num_registers (registers_602
),
2562 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2563 bfd_mach_ppc_603
, -1, -1, tot_num_registers (registers_603
),
2565 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2566 604, -1, -1, tot_num_registers (registers_604
),
2568 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2569 bfd_mach_ppc_403gc
, -1, -1, tot_num_registers (registers_403GC
),
2571 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2572 bfd_mach_ppc_505
, -1, -1, tot_num_registers (registers_505
),
2574 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2575 bfd_mach_ppc_860
, -1, -1, tot_num_registers (registers_860
),
2577 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2578 bfd_mach_ppc_750
, -1, -1, tot_num_registers (registers_750
),
2580 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2581 bfd_mach_ppc_7400
, -1, -1, tot_num_registers (registers_7400
),
2583 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc
,
2584 bfd_mach_ppc_e500
, -1, -1, tot_num_registers (registers_e500
),
2588 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2589 bfd_mach_ppc64
, -1, -1, tot_num_registers (registers_powerpc
),
2591 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2592 bfd_mach_ppc_620
, -1, -1, tot_num_registers (registers_powerpc
),
2594 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2595 bfd_mach_ppc_630
, -1, -1, tot_num_registers (registers_powerpc
),
2597 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2598 bfd_mach_ppc_a35
, -1, -1, tot_num_registers (registers_powerpc
),
2600 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2601 bfd_mach_ppc_rs64ii
, -1, -1, tot_num_registers (registers_powerpc
),
2603 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2604 bfd_mach_ppc_rs64iii
, -1, -1, tot_num_registers (registers_powerpc
),
2607 /* FIXME: I haven't checked the register sets of the following. */
2608 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2609 bfd_mach_rs6k_rs1
, -1, -1, tot_num_registers (registers_power
),
2611 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2612 bfd_mach_rs6k_rsc
, -1, -1, tot_num_registers (registers_power
),
2614 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2615 bfd_mach_rs6k_rs2
, -1, -1, tot_num_registers (registers_power
),
2618 {0, 0, 0, 0, 0, 0, 0, 0}
2621 /* Initialize the number of registers and pseudo registers in each variant. */
2624 init_variants (void)
2628 for (v
= variants
; v
->name
; v
++)
2631 v
->nregs
= num_registers (v
->regs
, v
->num_tot_regs
);
2632 if (v
->npregs
== -1)
2633 v
->npregs
= num_pseudo_registers (v
->regs
, v
->num_tot_regs
);
2637 /* Return the variant corresponding to architecture ARCH and machine number
2638 MACH. If no such variant exists, return null. */
2640 static const struct variant
*
2641 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2643 const struct variant
*v
;
2645 for (v
= variants
; v
->name
; v
++)
2646 if (arch
== v
->arch
&& mach
== v
->mach
)
2653 gdb_print_insn_powerpc (bfd_vma memaddr
, disassemble_info
*info
)
2655 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2656 return print_insn_big_powerpc (memaddr
, info
);
2658 return print_insn_little_powerpc (memaddr
, info
);
2661 /* Initialize the current architecture based on INFO. If possible, re-use an
2662 architecture from ARCHES, which is a list of architectures already created
2663 during this debugging session.
2665 Called e.g. at program startup, when reading a core file, and when reading
2668 static struct gdbarch
*
2669 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2671 struct gdbarch
*gdbarch
;
2672 struct gdbarch_tdep
*tdep
;
2673 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2675 const struct variant
*v
;
2676 enum bfd_architecture arch
;
2682 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2683 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2685 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2686 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2688 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2690 /* Check word size. If INFO is from a binary file, infer it from
2691 that, else choose a likely default. */
2692 if (from_xcoff_exec
)
2694 if (bfd_xcoff_is_xcoff64 (info
.abfd
))
2699 else if (from_elf_exec
)
2701 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2708 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2709 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2710 info
.bfd_arch_info
->bits_per_byte
;
2715 /* Find a candidate among extant architectures. */
2716 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2718 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2720 /* Word size in the various PowerPC bfd_arch_info structs isn't
2721 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2722 separate word size check. */
2723 tdep
= gdbarch_tdep (arches
->gdbarch
);
2724 if (tdep
&& tdep
->wordsize
== wordsize
)
2725 return arches
->gdbarch
;
2728 /* None found, create a new architecture from INFO, whose bfd_arch_info
2729 validity depends on the source:
2730 - executable useless
2731 - rs6000_host_arch() good
2733 - "set arch" trust blindly
2734 - GDB startup useless but harmless */
2736 if (!from_xcoff_exec
)
2738 arch
= info
.bfd_arch_info
->arch
;
2739 mach
= info
.bfd_arch_info
->mach
;
2743 arch
= bfd_arch_powerpc
;
2745 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2746 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2748 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2749 tdep
->wordsize
= wordsize
;
2751 /* For e500 executables, the apuinfo section is of help here. Such
2752 section contains the identifier and revision number of each
2753 Application-specific Processing Unit that is present on the
2754 chip. The content of the section is determined by the assembler
2755 which looks at each instruction and determines which unit (and
2756 which version of it) can execute it. In our case we just look for
2757 the existance of the section. */
2761 sect
= bfd_get_section_by_name (info
.abfd
, ".PPC.EMB.apuinfo");
2764 arch
= info
.bfd_arch_info
->arch
;
2765 mach
= bfd_mach_ppc_e500
;
2766 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2767 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2771 gdbarch
= gdbarch_alloc (&info
, tdep
);
2772 power
= arch
== bfd_arch_rs6000
;
2774 /* Initialize the number of real and pseudo registers in each variant. */
2777 /* Choose variant. */
2778 v
= find_variant_by_arch (arch
, mach
);
2782 tdep
->regs
= v
->regs
;
2784 tdep
->ppc_gp0_regnum
= 0;
2785 tdep
->ppc_gplast_regnum
= 31;
2786 tdep
->ppc_toc_regnum
= 2;
2787 tdep
->ppc_ps_regnum
= 65;
2788 tdep
->ppc_cr_regnum
= 66;
2789 tdep
->ppc_lr_regnum
= 67;
2790 tdep
->ppc_ctr_regnum
= 68;
2791 tdep
->ppc_xer_regnum
= 69;
2792 if (v
->mach
== bfd_mach_ppc_601
)
2793 tdep
->ppc_mq_regnum
= 124;
2795 tdep
->ppc_mq_regnum
= 70;
2797 tdep
->ppc_mq_regnum
= -1;
2798 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2800 set_gdbarch_pc_regnum (gdbarch
, 64);
2801 set_gdbarch_sp_regnum (gdbarch
, 1);
2802 set_gdbarch_fp_regnum (gdbarch
, 1);
2803 set_gdbarch_deprecated_extract_return_value (gdbarch
,
2804 rs6000_extract_return_value
);
2805 set_gdbarch_deprecated_store_return_value (gdbarch
, rs6000_store_return_value
);
2807 if (v
->arch
== bfd_arch_powerpc
)
2811 tdep
->ppc_vr0_regnum
= 71;
2812 tdep
->ppc_vrsave_regnum
= 104;
2813 tdep
->ppc_ev0_regnum
= -1;
2814 tdep
->ppc_ev31_regnum
= -1;
2816 case bfd_mach_ppc_7400
:
2817 tdep
->ppc_vr0_regnum
= 119;
2818 tdep
->ppc_vrsave_regnum
= 152;
2819 tdep
->ppc_ev0_regnum
= -1;
2820 tdep
->ppc_ev31_regnum
= -1;
2822 case bfd_mach_ppc_e500
:
2823 tdep
->ppc_gp0_regnum
= 41;
2824 tdep
->ppc_gplast_regnum
= tdep
->ppc_gp0_regnum
+ 32 - 1;
2825 tdep
->ppc_toc_regnum
= -1;
2826 tdep
->ppc_ps_regnum
= 1;
2827 tdep
->ppc_cr_regnum
= 2;
2828 tdep
->ppc_lr_regnum
= 3;
2829 tdep
->ppc_ctr_regnum
= 4;
2830 tdep
->ppc_xer_regnum
= 5;
2831 tdep
->ppc_ev0_regnum
= 7;
2832 tdep
->ppc_ev31_regnum
= 38;
2833 set_gdbarch_pc_regnum (gdbarch
, 0);
2834 set_gdbarch_sp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2835 set_gdbarch_fp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2836 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, e500_dwarf2_reg_to_regnum
);
2837 set_gdbarch_pseudo_register_read (gdbarch
, e500_pseudo_register_read
);
2838 set_gdbarch_pseudo_register_write (gdbarch
, e500_pseudo_register_write
);
2839 set_gdbarch_extract_return_value (gdbarch
, e500_extract_return_value
);
2840 set_gdbarch_deprecated_store_return_value (gdbarch
, e500_store_return_value
);
2843 tdep
->ppc_vr0_regnum
= -1;
2844 tdep
->ppc_vrsave_regnum
= -1;
2845 tdep
->ppc_ev0_regnum
= -1;
2846 tdep
->ppc_ev31_regnum
= -1;
2850 /* Sanity check on registers. */
2851 gdb_assert (strcmp (tdep
->regs
[tdep
->ppc_gp0_regnum
].name
, "r0") == 0);
2853 /* Set lr_frame_offset. */
2855 tdep
->lr_frame_offset
= 16;
2857 tdep
->lr_frame_offset
= 4;
2859 tdep
->lr_frame_offset
= 8;
2861 /* Calculate byte offsets in raw register array. */
2862 tdep
->regoff
= xmalloc (v
->num_tot_regs
* sizeof (int));
2863 for (i
= off
= 0; i
< v
->num_tot_regs
; i
++)
2865 tdep
->regoff
[i
] = off
;
2866 off
+= regsize (v
->regs
+ i
, wordsize
);
2869 /* Select instruction printer. */
2871 set_gdbarch_print_insn (gdbarch
, print_insn_rs6000
);
2873 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_powerpc
);
2875 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
2876 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2877 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
2878 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2879 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
2881 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2882 set_gdbarch_num_pseudo_regs (gdbarch
, v
->npregs
);
2883 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2884 set_gdbarch_register_size (gdbarch
, wordsize
);
2885 set_gdbarch_register_bytes (gdbarch
, off
);
2886 set_gdbarch_register_byte (gdbarch
, rs6000_register_byte
);
2887 set_gdbarch_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2888 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, 16);
2889 set_gdbarch_register_virtual_size (gdbarch
, generic_register_size
);
2890 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, 16);
2891 set_gdbarch_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2893 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2894 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2895 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2896 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2897 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2898 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2899 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2900 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2901 set_gdbarch_char_signed (gdbarch
, 0);
2903 set_gdbarch_call_dummy_length (gdbarch
, 0);
2904 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2905 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
2906 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2907 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2908 set_gdbarch_call_dummy_p (gdbarch
, 1);
2909 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2910 set_gdbarch_fix_call_dummy (gdbarch
, rs6000_fix_call_dummy
);
2911 set_gdbarch_frame_align (gdbarch
, rs6000_frame_align
);
2912 set_gdbarch_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2913 set_gdbarch_push_return_address (gdbarch
, ppc_push_return_address
);
2914 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2916 set_gdbarch_register_convertible (gdbarch
, rs6000_register_convertible
);
2917 set_gdbarch_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2918 set_gdbarch_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2919 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2920 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2921 is correct for the SysV ABI when the wordsize is 8, but I'm also
2922 fairly certain that ppc_sysv_abi_push_arguments() will give even
2923 worse results since it only works for 32-bit code. So, for the moment,
2924 we're better off calling rs6000_push_arguments() since it works for
2925 64-bit code. At some point in the future, this matter needs to be
2927 if (sysv_abi
&& wordsize
== 4)
2928 set_gdbarch_push_arguments (gdbarch
, ppc_sysv_abi_push_arguments
);
2930 set_gdbarch_push_arguments (gdbarch
, rs6000_push_arguments
);
2932 set_gdbarch_store_struct_return (gdbarch
, rs6000_store_struct_return
);
2933 set_gdbarch_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2934 set_gdbarch_deprecated_pop_frame (gdbarch
, rs6000_pop_frame
);
2936 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2937 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2938 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2939 set_gdbarch_function_start_offset (gdbarch
, 0);
2940 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2942 /* Not sure on this. FIXMEmgo */
2943 set_gdbarch_frame_args_skip (gdbarch
, 8);
2946 set_gdbarch_use_struct_convention (gdbarch
,
2947 ppc_sysv_abi_use_struct_convention
);
2949 set_gdbarch_use_struct_convention (gdbarch
,
2950 generic_use_struct_convention
);
2952 set_gdbarch_frameless_function_invocation (gdbarch
,
2953 rs6000_frameless_function_invocation
);
2954 set_gdbarch_deprecated_frame_chain (gdbarch
, rs6000_frame_chain
);
2955 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, rs6000_frame_saved_pc
);
2957 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, rs6000_frame_init_saved_regs
);
2958 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, rs6000_init_extra_frame_info
);
2962 /* Handle RS/6000 function pointers (which are really function
2964 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2965 rs6000_convert_from_func_ptr_addr
);
2967 set_gdbarch_frame_args_address (gdbarch
, rs6000_frame_args_address
);
2968 set_gdbarch_frame_locals_address (gdbarch
, rs6000_frame_args_address
);
2969 set_gdbarch_saved_pc_after_call (gdbarch
, rs6000_saved_pc_after_call
);
2971 /* We can't tell how many args there are
2972 now that the C compiler delays popping them. */
2973 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
2975 /* Hook in ABI-specific overrides, if they have been registered. */
2976 gdbarch_init_osabi (info
, gdbarch
);
2982 rs6000_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2984 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2989 /* FIXME: Dump gdbarch_tdep. */
2992 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
2995 rs6000_info_powerpc_command (char *args
, int from_tty
)
2997 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
3000 /* Initialization code. */
3003 _initialize_rs6000_tdep (void)
3005 gdbarch_register (bfd_arch_rs6000
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
3006 gdbarch_register (bfd_arch_powerpc
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
3008 /* Add root prefix command for "info powerpc" commands */
3009 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
3010 "Various POWERPC info specific commands.",
3011 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);