1 /* Target-dependent code for GDB, the GNU debugger.
3 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
4 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
33 #include "arch-utils.h"
37 #include "parser-defs.h"
40 #include "libbfd.h" /* for bfd_default_set_arch_mach */
41 #include "coff/internal.h" /* for libcoff.h */
42 #include "libcoff.h" /* for xcoff_data */
43 #include "coff/xcoff.h"
48 #include "solib-svr4.h"
51 #include "gdb_assert.h"
54 /* If the kernel has to deliver a signal, it pushes a sigcontext
55 structure on the stack and then calls the signal handler, passing
56 the address of the sigcontext in an argument register. Usually
57 the signal handler doesn't save this register, so we have to
58 access the sigcontext structure via an offset from the signal handler
60 The following constants were determined by experimentation on AIX 3.2. */
61 #define SIG_FRAME_PC_OFFSET 96
62 #define SIG_FRAME_LR_OFFSET 108
63 #define SIG_FRAME_FP_OFFSET 284
65 /* To be used by skip_prologue. */
67 struct rs6000_framedata
69 int offset
; /* total size of frame --- the distance
70 by which we decrement sp to allocate
72 int saved_gpr
; /* smallest # of saved gpr */
73 int saved_fpr
; /* smallest # of saved fpr */
74 int saved_vr
; /* smallest # of saved vr */
75 int saved_ev
; /* smallest # of saved ev */
76 int alloca_reg
; /* alloca register number (frame ptr) */
77 char frameless
; /* true if frameless functions. */
78 char nosavedpc
; /* true if pc not saved. */
79 int gpr_offset
; /* offset of saved gprs from prev sp */
80 int fpr_offset
; /* offset of saved fprs from prev sp */
81 int vr_offset
; /* offset of saved vrs from prev sp */
82 int ev_offset
; /* offset of saved evs from prev sp */
83 int lr_offset
; /* offset of saved lr */
84 int cr_offset
; /* offset of saved cr */
85 int vrsave_offset
; /* offset of saved vrsave register */
88 /* Description of a single register. */
92 char *name
; /* name of register */
93 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
94 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
95 unsigned char fpr
; /* whether register is floating-point */
96 unsigned char pseudo
; /* whether register is pseudo */
99 /* Breakpoint shadows for the single step instructions will be kept here. */
101 static struct sstep_breaks
103 /* Address, or 0 if this is not in use. */
105 /* Shadow contents. */
110 /* Hook for determining the TOC address when calling functions in the
111 inferior under AIX. The initialization code in rs6000-nat.c sets
112 this hook to point to find_toc_address. */
114 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
116 /* Hook to set the current architecture when starting a child process.
117 rs6000-nat.c sets this. */
119 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
121 /* Static function prototypes */
123 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
125 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
126 struct rs6000_framedata
*);
127 static void frame_get_saved_regs (struct frame_info
* fi
,
128 struct rs6000_framedata
* fdatap
);
129 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
131 /* Is REGNO an AltiVec register? Return 1 if so, 0 otherwise. */
133 altivec_register_p (int regno
)
135 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
136 if (tdep
->ppc_vr0_regnum
< 0 || tdep
->ppc_vrsave_regnum
< 0)
139 return (regno
>= tdep
->ppc_vr0_regnum
&& regno
<= tdep
->ppc_vrsave_regnum
);
142 /* Use the architectures FP registers? */
144 ppc_floating_point_unit_p (struct gdbarch
*gdbarch
)
146 const struct bfd_arch_info
*info
= gdbarch_bfd_arch_info (gdbarch
);
147 if (info
->arch
== bfd_arch_powerpc
)
148 return (info
->mach
!= bfd_mach_ppc_e500
);
149 if (info
->arch
== bfd_arch_rs6000
)
154 /* Read a LEN-byte address from debugged memory address MEMADDR. */
157 read_memory_addr (CORE_ADDR memaddr
, int len
)
159 return read_memory_unsigned_integer (memaddr
, len
);
163 rs6000_skip_prologue (CORE_ADDR pc
)
165 struct rs6000_framedata frame
;
166 pc
= skip_prologue (pc
, 0, &frame
);
171 /* Fill in fi->saved_regs */
173 struct frame_extra_info
175 /* Functions calling alloca() change the value of the stack
176 pointer. We need to use initial stack pointer (which is saved in
177 r31 by gcc) in such cases. If a compiler emits traceback table,
178 then we should use the alloca register specified in traceback
180 CORE_ADDR initial_sp
; /* initial stack pointer. */
184 rs6000_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
186 struct frame_extra_info
*extra_info
=
187 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
188 extra_info
->initial_sp
= 0;
189 if (get_next_frame (fi
) != NULL
190 && get_frame_pc (fi
) < TEXT_SEGMENT_BASE
)
191 /* We're in get_prev_frame */
192 /* and this is a special signal frame. */
193 /* (fi->pc will be some low address in the kernel, */
194 /* to which the signal handler returns). */
195 deprecated_set_frame_type (fi
, SIGTRAMP_FRAME
);
198 /* Put here the code to store, into a struct frame_saved_regs,
199 the addresses of the saved registers of frame described by FRAME_INFO.
200 This includes special registers such as pc and fp saved in special
201 ways in the stack frame. sp is even more special:
202 the address we return for it IS the sp for the next frame. */
204 /* In this implementation for RS/6000, we do *not* save sp. I am
205 not sure if it will be needed. The following function takes care of gpr's
209 rs6000_frame_init_saved_regs (struct frame_info
*fi
)
211 frame_get_saved_regs (fi
, NULL
);
215 rs6000_frame_args_address (struct frame_info
*fi
)
217 struct frame_extra_info
*extra_info
= get_frame_extra_info (fi
);
218 if (extra_info
->initial_sp
!= 0)
219 return extra_info
->initial_sp
;
221 return frame_initial_stack_address (fi
);
224 /* Immediately after a function call, return the saved pc.
225 Can't go through the frames for this because on some machines
226 the new frame is not set up until the new function executes
227 some instructions. */
230 rs6000_saved_pc_after_call (struct frame_info
*fi
)
232 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
235 /* Get the ith function argument for the current function. */
237 rs6000_fetch_pointer_argument (struct frame_info
*frame
, int argi
,
241 get_frame_register (frame
, 3 + argi
, &addr
);
245 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
248 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
255 absolute
= (int) ((instr
>> 1) & 1);
260 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
264 dest
= pc
+ immediate
;
268 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
272 dest
= pc
+ immediate
;
276 ext_op
= (instr
>> 1) & 0x3ff;
278 if (ext_op
== 16) /* br conditional register */
280 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
282 /* If we are about to return from a signal handler, dest is
283 something like 0x3c90. The current frame is a signal handler
284 caller frame, upon completion of the sigreturn system call
285 execution will return to the saved PC in the frame. */
286 if (dest
< TEXT_SEGMENT_BASE
)
288 struct frame_info
*fi
;
290 fi
= get_current_frame ();
292 dest
= read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
293 gdbarch_tdep (current_gdbarch
)->wordsize
);
297 else if (ext_op
== 528) /* br cond to count reg */
299 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
301 /* If we are about to execute a system call, dest is something
302 like 0x22fc or 0x3b00. Upon completion the system call
303 will return to the address in the link register. */
304 if (dest
< TEXT_SEGMENT_BASE
)
305 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
314 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
318 /* Sequence of bytes for breakpoint instruction. */
320 const static unsigned char *
321 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
323 static unsigned char big_breakpoint
[] = { 0x7d, 0x82, 0x10, 0x08 };
324 static unsigned char little_breakpoint
[] = { 0x08, 0x10, 0x82, 0x7d };
326 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
327 return big_breakpoint
;
329 return little_breakpoint
;
333 /* AIX does not support PT_STEP. Simulate it. */
336 rs6000_software_single_step (enum target_signal signal
,
337 int insert_breakpoints_p
)
341 const char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
347 if (insert_breakpoints_p
)
352 insn
= read_memory_integer (loc
, 4);
354 breaks
[0] = loc
+ breakp_sz
;
356 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
358 /* Don't put two breakpoints on the same address. */
359 if (breaks
[1] == breaks
[0])
362 stepBreaks
[1].address
= 0;
364 for (ii
= 0; ii
< 2; ++ii
)
367 /* ignore invalid breakpoint. */
368 if (breaks
[ii
] == -1)
370 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
371 stepBreaks
[ii
].address
= breaks
[ii
];
378 /* remove step breakpoints. */
379 for (ii
= 0; ii
< 2; ++ii
)
380 if (stepBreaks
[ii
].address
!= 0)
381 target_remove_breakpoint (stepBreaks
[ii
].address
,
382 stepBreaks
[ii
].data
);
384 errno
= 0; /* FIXME, don't ignore errors! */
385 /* What errors? {read,write}_memory call error(). */
389 /* return pc value after skipping a function prologue and also return
390 information about a function frame.
392 in struct rs6000_framedata fdata:
393 - frameless is TRUE, if function does not have a frame.
394 - nosavedpc is TRUE, if function does not save %pc value in its frame.
395 - offset is the initial size of this stack frame --- the amount by
396 which we decrement the sp to allocate the frame.
397 - saved_gpr is the number of the first saved gpr.
398 - saved_fpr is the number of the first saved fpr.
399 - saved_vr is the number of the first saved vr.
400 - saved_ev is the number of the first saved ev.
401 - alloca_reg is the number of the register used for alloca() handling.
403 - gpr_offset is the offset of the first saved gpr from the previous frame.
404 - fpr_offset is the offset of the first saved fpr from the previous frame.
405 - vr_offset is the offset of the first saved vr from the previous frame.
406 - ev_offset is the offset of the first saved ev from the previous frame.
407 - lr_offset is the offset of the saved lr
408 - cr_offset is the offset of the saved cr
409 - vrsave_offset is the offset of the saved vrsave register
412 #define SIGNED_SHORT(x) \
413 ((sizeof (short) == 2) \
414 ? ((int)(short)(x)) \
415 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
417 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
419 /* Limit the number of skipped non-prologue instructions, as the examining
420 of the prologue is expensive. */
421 static int max_skip_non_prologue_insns
= 10;
423 /* Given PC representing the starting address of a function, and
424 LIM_PC which is the (sloppy) limit to which to scan when looking
425 for a prologue, attempt to further refine this limit by using
426 the line data in the symbol table. If successful, a better guess
427 on where the prologue ends is returned, otherwise the previous
428 value of lim_pc is returned. */
430 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
432 struct symtab_and_line prologue_sal
;
434 prologue_sal
= find_pc_line (pc
, 0);
435 if (prologue_sal
.line
!= 0)
438 CORE_ADDR addr
= prologue_sal
.end
;
440 /* Handle the case in which compiler's optimizer/scheduler
441 has moved instructions into the prologue. We scan ahead
442 in the function looking for address ranges whose corresponding
443 line number is less than or equal to the first one that we
444 found for the function. (It can be less than when the
445 scheduler puts a body instruction before the first prologue
447 for (i
= 2 * max_skip_non_prologue_insns
;
448 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
451 struct symtab_and_line sal
;
453 sal
= find_pc_line (addr
, 0);
456 if (sal
.line
<= prologue_sal
.line
457 && sal
.symtab
== prologue_sal
.symtab
)
464 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
465 lim_pc
= prologue_sal
.end
;
472 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
474 CORE_ADDR orig_pc
= pc
;
475 CORE_ADDR last_prologue_pc
= pc
;
476 CORE_ADDR li_found_pc
= 0;
480 long vr_saved_offset
= 0;
489 int minimal_toc_loaded
= 0;
490 int prev_insn_was_prologue_insn
= 1;
491 int num_skip_non_prologue_insns
= 0;
492 const struct bfd_arch_info
*arch_info
= gdbarch_bfd_arch_info (current_gdbarch
);
493 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
495 /* Attempt to find the end of the prologue when no limit is specified.
496 Note that refine_prologue_limit() has been written so that it may
497 be used to "refine" the limits of non-zero PC values too, but this
498 is only safe if we 1) trust the line information provided by the
499 compiler and 2) iterate enough to actually find the end of the
502 It may become a good idea at some point (for both performance and
503 accuracy) to unconditionally call refine_prologue_limit(). But,
504 until we can make a clear determination that this is beneficial,
505 we'll play it safe and only use it to obtain a limit when none
506 has been specified. */
508 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
510 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
511 fdata
->saved_gpr
= -1;
512 fdata
->saved_fpr
= -1;
513 fdata
->saved_vr
= -1;
514 fdata
->saved_ev
= -1;
515 fdata
->alloca_reg
= -1;
516 fdata
->frameless
= 1;
517 fdata
->nosavedpc
= 1;
521 /* Sometimes it isn't clear if an instruction is a prologue
522 instruction or not. When we encounter one of these ambiguous
523 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
524 Otherwise, we'll assume that it really is a prologue instruction. */
525 if (prev_insn_was_prologue_insn
)
526 last_prologue_pc
= pc
;
528 /* Stop scanning if we've hit the limit. */
529 if (lim_pc
!= 0 && pc
>= lim_pc
)
532 prev_insn_was_prologue_insn
= 1;
534 /* Fetch the instruction and convert it to an integer. */
535 if (target_read_memory (pc
, buf
, 4))
537 op
= extract_signed_integer (buf
, 4);
539 if ((op
& 0xfc1fffff) == 0x7c0802a6)
541 lr_reg
= (op
& 0x03e00000);
545 else if ((op
& 0xfc1fffff) == 0x7c000026)
547 cr_reg
= (op
& 0x03e00000);
551 else if ((op
& 0xfc1f0000) == 0xd8010000)
552 { /* stfd Rx,NUM(r1) */
553 reg
= GET_SRC_REG (op
);
554 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
556 fdata
->saved_fpr
= reg
;
557 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
562 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
563 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
564 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
565 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
568 reg
= GET_SRC_REG (op
);
569 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
571 fdata
->saved_gpr
= reg
;
572 if ((op
& 0xfc1f0003) == 0xf8010000)
574 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
579 else if ((op
& 0xffff0000) == 0x60000000)
582 /* Allow nops in the prologue, but do not consider them to
583 be part of the prologue unless followed by other prologue
585 prev_insn_was_prologue_insn
= 0;
589 else if ((op
& 0xffff0000) == 0x3c000000)
590 { /* addis 0,0,NUM, used
592 fdata
->offset
= (op
& 0x0000ffff) << 16;
593 fdata
->frameless
= 0;
597 else if ((op
& 0xffff0000) == 0x60000000)
598 { /* ori 0,0,NUM, 2nd ha
599 lf of >= 32k frames */
600 fdata
->offset
|= (op
& 0x0000ffff);
601 fdata
->frameless
= 0;
605 else if (lr_reg
!= -1 &&
606 /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */
607 (((op
& 0xffff0000) == (lr_reg
| 0xf8010000)) ||
608 /* stw Rx, NUM(r1) */
609 ((op
& 0xffff0000) == (lr_reg
| 0x90010000)) ||
610 /* stwu Rx, NUM(r1) */
611 ((op
& 0xffff0000) == (lr_reg
| 0x94010000))))
612 { /* where Rx == lr */
613 fdata
->lr_offset
= offset
;
614 fdata
->nosavedpc
= 0;
616 if ((op
& 0xfc000003) == 0xf8000000 || /* std */
617 (op
& 0xfc000000) == 0x90000000) /* stw */
619 /* Does not update r1, so add displacement to lr_offset. */
620 fdata
->lr_offset
+= SIGNED_SHORT (op
);
625 else if (cr_reg
!= -1 &&
626 /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */
627 (((op
& 0xffff0000) == (cr_reg
| 0xf8010000)) ||
628 /* stw Rx, NUM(r1) */
629 ((op
& 0xffff0000) == (cr_reg
| 0x90010000)) ||
630 /* stwu Rx, NUM(r1) */
631 ((op
& 0xffff0000) == (cr_reg
| 0x94010000))))
632 { /* where Rx == cr */
633 fdata
->cr_offset
= offset
;
635 if ((op
& 0xfc000003) == 0xf8000000 ||
636 (op
& 0xfc000000) == 0x90000000)
638 /* Does not update r1, so add displacement to cr_offset. */
639 fdata
->cr_offset
+= SIGNED_SHORT (op
);
644 else if (op
== 0x48000005)
650 else if (op
== 0x48000004)
655 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
656 in V.4 -mminimal-toc */
657 (op
& 0xffff0000) == 0x3bde0000)
658 { /* addi 30,30,foo@l */
662 else if ((op
& 0xfc000001) == 0x48000001)
666 fdata
->frameless
= 0;
667 /* Don't skip over the subroutine call if it is not within
668 the first three instructions of the prologue. */
669 if ((pc
- orig_pc
) > 8)
672 op
= read_memory_integer (pc
+ 4, 4);
674 /* At this point, make sure this is not a trampoline
675 function (a function that simply calls another functions,
676 and nothing else). If the next is not a nop, this branch
677 was part of the function prologue. */
679 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
680 break; /* don't skip over
685 /* update stack pointer */
686 else if ((op
& 0xfc1f0000) == 0x94010000)
687 { /* stu rX,NUM(r1) || stwu rX,NUM(r1) */
688 fdata
->frameless
= 0;
689 fdata
->offset
= SIGNED_SHORT (op
);
690 offset
= fdata
->offset
;
693 else if ((op
& 0xfc1f016a) == 0x7c01016e)
694 { /* stwux rX,r1,rY */
695 /* no way to figure out what r1 is going to be */
696 fdata
->frameless
= 0;
697 offset
= fdata
->offset
;
700 else if ((op
& 0xfc1f0003) == 0xf8010001)
701 { /* stdu rX,NUM(r1) */
702 fdata
->frameless
= 0;
703 fdata
->offset
= SIGNED_SHORT (op
& ~3UL);
704 offset
= fdata
->offset
;
707 else if ((op
& 0xfc1f016a) == 0x7c01016a)
708 { /* stdux rX,r1,rY */
709 /* no way to figure out what r1 is going to be */
710 fdata
->frameless
= 0;
711 offset
= fdata
->offset
;
714 /* Load up minimal toc pointer */
715 else if (((op
>> 22) == 0x20f || /* l r31,... or l r30,... */
716 (op
>> 22) == 0x3af) /* ld r31,... or ld r30,... */
717 && !minimal_toc_loaded
)
719 minimal_toc_loaded
= 1;
722 /* move parameters from argument registers to local variable
725 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
726 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
727 (((op
>> 21) & 31) <= 10) &&
728 ((long) ((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
732 /* store parameters in stack */
734 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
735 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
736 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
740 /* store parameters in stack via frame pointer */
743 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
744 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
745 (op
& 0xfc1f0000) == 0xfc1f0000))
746 { /* frsp, fp?,NUM(r1) */
749 /* Set up frame pointer */
751 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
754 fdata
->frameless
= 0;
756 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
+ 31);
759 /* Another way to set up the frame pointer. */
761 else if ((op
& 0xfc1fffff) == 0x38010000)
762 { /* addi rX, r1, 0x0 */
763 fdata
->frameless
= 0;
765 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
766 + ((op
& ~0x38010000) >> 21));
769 /* AltiVec related instructions. */
770 /* Store the vrsave register (spr 256) in another register for
771 later manipulation, or load a register into the vrsave
772 register. 2 instructions are used: mfvrsave and
773 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
774 and mtspr SPR256, Rn. */
775 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
776 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
777 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
779 vrsave_reg
= GET_SRC_REG (op
);
782 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
786 /* Store the register where vrsave was saved to onto the stack:
787 rS is the register where vrsave was stored in a previous
789 /* 100100 sssss 00001 dddddddd dddddddd */
790 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
792 if (vrsave_reg
== GET_SRC_REG (op
))
794 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
799 /* Compute the new value of vrsave, by modifying the register
800 where vrsave was saved to. */
801 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
802 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
806 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
807 in a pair of insns to save the vector registers on the
809 /* 001110 00000 00000 iiii iiii iiii iiii */
810 /* 001110 01110 00000 iiii iiii iiii iiii */
811 else if ((op
& 0xffff0000) == 0x38000000 /* li r0, SIMM */
812 || (op
& 0xffff0000) == 0x39c00000) /* li r14, SIMM */
815 vr_saved_offset
= SIGNED_SHORT (op
);
817 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
818 /* 011111 sssss 11111 00000 00111001110 */
819 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
821 if (pc
== (li_found_pc
+ 4))
823 vr_reg
= GET_SRC_REG (op
);
824 /* If this is the first vector reg to be saved, or if
825 it has a lower number than others previously seen,
826 reupdate the frame info. */
827 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
829 fdata
->saved_vr
= vr_reg
;
830 fdata
->vr_offset
= vr_saved_offset
+ offset
;
832 vr_saved_offset
= -1;
837 /* End AltiVec related instructions. */
839 /* Start BookE related instructions. */
840 /* Store gen register S at (r31+uimm).
841 Any register less than r13 is volatile, so we don't care. */
842 /* 000100 sssss 11111 iiiii 01100100001 */
843 else if (arch_info
->mach
== bfd_mach_ppc_e500
844 && (op
& 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
846 if ((op
& 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
849 ev_reg
= GET_SRC_REG (op
);
850 imm
= (op
>> 11) & 0x1f;
852 /* If this is the first vector reg to be saved, or if
853 it has a lower number than others previously seen,
854 reupdate the frame info. */
855 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
857 fdata
->saved_ev
= ev_reg
;
858 fdata
->ev_offset
= ev_offset
+ offset
;
863 /* Store gen register rS at (r1+rB). */
864 /* 000100 sssss 00001 bbbbb 01100100000 */
865 else if (arch_info
->mach
== bfd_mach_ppc_e500
866 && (op
& 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
868 if (pc
== (li_found_pc
+ 4))
870 ev_reg
= GET_SRC_REG (op
);
871 /* If this is the first vector reg to be saved, or if
872 it has a lower number than others previously seen,
873 reupdate the frame info. */
874 /* We know the contents of rB from the previous instruction. */
875 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
877 fdata
->saved_ev
= ev_reg
;
878 fdata
->ev_offset
= vr_saved_offset
+ offset
;
880 vr_saved_offset
= -1;
886 /* Store gen register r31 at (rA+uimm). */
887 /* 000100 11111 aaaaa iiiii 01100100001 */
888 else if (arch_info
->mach
== bfd_mach_ppc_e500
889 && (op
& 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
891 /* Wwe know that the source register is 31 already, but
892 it can't hurt to compute it. */
893 ev_reg
= GET_SRC_REG (op
);
894 ev_offset
= ((op
>> 11) & 0x1f) * 8;
895 /* If this is the first vector reg to be saved, or if
896 it has a lower number than others previously seen,
897 reupdate the frame info. */
898 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
900 fdata
->saved_ev
= ev_reg
;
901 fdata
->ev_offset
= ev_offset
+ offset
;
906 /* Store gen register S at (r31+r0).
907 Store param on stack when offset from SP bigger than 4 bytes. */
908 /* 000100 sssss 11111 00000 01100100000 */
909 else if (arch_info
->mach
== bfd_mach_ppc_e500
910 && (op
& 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
912 if (pc
== (li_found_pc
+ 4))
914 if ((op
& 0x03e00000) >= 0x01a00000)
916 ev_reg
= GET_SRC_REG (op
);
917 /* If this is the first vector reg to be saved, or if
918 it has a lower number than others previously seen,
919 reupdate the frame info. */
920 /* We know the contents of r0 from the previous
922 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
924 fdata
->saved_ev
= ev_reg
;
925 fdata
->ev_offset
= vr_saved_offset
+ offset
;
929 vr_saved_offset
= -1;
934 /* End BookE related instructions. */
938 /* Not a recognized prologue instruction.
939 Handle optimizer code motions into the prologue by continuing
940 the search if we have no valid frame yet or if the return
941 address is not yet saved in the frame. */
942 if (fdata
->frameless
== 0
943 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
946 if (op
== 0x4e800020 /* blr */
947 || op
== 0x4e800420) /* bctr */
948 /* Do not scan past epilogue in frameless functions or
951 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
952 /* Never skip branches. */
955 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
956 /* Do not scan too many insns, scanning insns is expensive with
960 /* Continue scanning. */
961 prev_insn_was_prologue_insn
= 0;
967 /* I have problems with skipping over __main() that I need to address
968 * sometime. Previously, I used to use misc_function_vector which
969 * didn't work as well as I wanted to be. -MGO */
971 /* If the first thing after skipping a prolog is a branch to a function,
972 this might be a call to an initializer in main(), introduced by gcc2.
973 We'd like to skip over it as well. Fortunately, xlc does some extra
974 work before calling a function right after a prologue, thus we can
975 single out such gcc2 behaviour. */
978 if ((op
& 0xfc000001) == 0x48000001)
979 { /* bl foo, an initializer function? */
980 op
= read_memory_integer (pc
+ 4, 4);
982 if (op
== 0x4def7b82)
983 { /* cror 0xf, 0xf, 0xf (nop) */
985 /* Check and see if we are in main. If so, skip over this
986 initializer function as well. */
988 tmp
= find_pc_misc_function (pc
);
990 && strcmp (misc_function_vector
[tmp
].name
, main_name ()) == 0)
996 fdata
->offset
= -fdata
->offset
;
997 return last_prologue_pc
;
1001 /*************************************************************************
1002 Support for creating pushing a dummy frame into the stack, and popping
1004 *************************************************************************/
1007 /* Pop the innermost frame, go back to the caller. */
1010 rs6000_pop_frame (void)
1012 CORE_ADDR pc
, lr
, sp
, prev_sp
, addr
; /* %pc, %lr, %sp */
1013 struct rs6000_framedata fdata
;
1014 struct frame_info
*frame
= get_current_frame ();
1018 sp
= get_frame_base (frame
);
1020 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
1021 get_frame_base (frame
),
1022 get_frame_base (frame
)))
1024 generic_pop_dummy_frame ();
1025 flush_cached_frames ();
1029 /* Make sure that all registers are valid. */
1030 deprecated_read_register_bytes (0, NULL
, DEPRECATED_REGISTER_BYTES
);
1032 /* Figure out previous %pc value. If the function is frameless, it is
1033 still in the link register, otherwise walk the frames and retrieve the
1034 saved %pc value in the previous frame. */
1036 addr
= get_frame_func (frame
);
1037 (void) skip_prologue (addr
, get_frame_pc (frame
), &fdata
);
1039 wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1040 if (fdata
.frameless
)
1043 prev_sp
= read_memory_addr (sp
, wordsize
);
1044 if (fdata
.lr_offset
== 0)
1045 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1047 lr
= read_memory_addr (prev_sp
+ fdata
.lr_offset
, wordsize
);
1049 /* reset %pc value. */
1050 write_register (PC_REGNUM
, lr
);
1052 /* reset register values if any was saved earlier. */
1054 if (fdata
.saved_gpr
!= -1)
1056 addr
= prev_sp
+ fdata
.gpr_offset
;
1057 for (ii
= fdata
.saved_gpr
; ii
<= 31; ++ii
)
1059 read_memory (addr
, &deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
)],
1065 if (fdata
.saved_fpr
!= -1)
1067 addr
= prev_sp
+ fdata
.fpr_offset
;
1068 for (ii
= fdata
.saved_fpr
; ii
<= 31; ++ii
)
1070 read_memory (addr
, &deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ FP0_REGNUM
)], 8);
1075 write_register (SP_REGNUM
, prev_sp
);
1076 target_store_registers (-1);
1077 flush_cached_frames ();
1080 /* All the ABI's require 16 byte alignment. */
1082 rs6000_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1084 return (addr
& -16);
1087 /* Pass the arguments in either registers, or in the stack. In RS/6000,
1088 the first eight words of the argument list (that might be less than
1089 eight parameters if some parameters occupy more than one word) are
1090 passed in r3..r10 registers. float and double parameters are
1091 passed in fpr's, in addition to that. Rest of the parameters if any
1092 are passed in user stack. There might be cases in which half of the
1093 parameter is copied into registers, the other half is pushed into
1096 Stack must be aligned on 64-bit boundaries when synthesizing
1099 If the function is returning a structure, then the return address is passed
1100 in r3, then the first 7 words of the parameters can be passed in registers,
1101 starting from r4. */
1104 rs6000_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1105 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1106 int nargs
, struct value
**args
, CORE_ADDR sp
,
1107 int struct_return
, CORE_ADDR struct_addr
)
1109 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1112 int argno
; /* current argument number */
1113 int argbytes
; /* current argument byte */
1114 char tmp_buffer
[50];
1115 int f_argno
= 0; /* current floating point argno */
1116 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1118 struct value
*arg
= 0;
1123 /* The first eight words of ther arguments are passed in registers.
1124 Copy them appropriately. */
1127 /* If the function is returning a `struct', then the first word
1128 (which will be passed in r3) is used for struct return address.
1129 In that case we should advance one word and start from r4
1130 register to copy parameters. */
1133 regcache_raw_write_unsigned (regcache
, tdep
->ppc_gp0_regnum
+ 3,
1139 effectively indirect call... gcc does...
1141 return_val example( float, int);
1144 float in fp0, int in r3
1145 offset of stack on overflow 8/16
1146 for varargs, must go by type.
1148 float in r3&r4, int in r5
1149 offset of stack on overflow different
1151 return in r3 or f0. If no float, must study how gcc emulates floats;
1152 pay attention to arg promotion.
1153 User may have to cast\args to handle promotion correctly
1154 since gdb won't know if prototype supplied or not.
1157 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
1159 int reg_size
= DEPRECATED_REGISTER_RAW_SIZE (ii
+ 3);
1162 type
= check_typedef (VALUE_TYPE (arg
));
1163 len
= TYPE_LENGTH (type
);
1165 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1168 /* Floating point arguments are passed in fpr's, as well as gpr's.
1169 There are 13 fpr's reserved for passing parameters. At this point
1170 there is no way we would run out of them. */
1174 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1176 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1177 VALUE_CONTENTS (arg
),
1185 /* Argument takes more than one register. */
1186 while (argbytes
< len
)
1188 memset (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)], 0,
1190 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)],
1191 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1192 (len
- argbytes
) > reg_size
1193 ? reg_size
: len
- argbytes
);
1194 ++ii
, argbytes
+= reg_size
;
1197 goto ran_out_of_registers_for_arguments
;
1204 /* Argument can fit in one register. No problem. */
1205 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1206 memset (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1207 memcpy ((char *)&deprecated_registers
[DEPRECATED_REGISTER_BYTE (ii
+ 3)] + adj
,
1208 VALUE_CONTENTS (arg
), len
);
1213 ran_out_of_registers_for_arguments
:
1215 saved_sp
= read_sp ();
1217 /* Location for 8 parameters are always reserved. */
1220 /* Another six words for back chain, TOC register, link register, etc. */
1223 /* Stack pointer must be quadword aligned. */
1226 /* If there are more arguments, allocate space for them in
1227 the stack, then push them starting from the ninth one. */
1229 if ((argno
< nargs
) || argbytes
)
1235 space
+= ((len
- argbytes
+ 3) & -4);
1241 for (; jj
< nargs
; ++jj
)
1243 struct value
*val
= args
[jj
];
1244 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1247 /* Add location required for the rest of the parameters. */
1248 space
= (space
+ 15) & -16;
1251 /* This is another instance we need to be concerned about
1252 securing our stack space. If we write anything underneath %sp
1253 (r1), we might conflict with the kernel who thinks he is free
1254 to use this area. So, update %sp first before doing anything
1257 regcache_raw_write_signed (regcache
, SP_REGNUM
, sp
);
1259 /* If the last argument copied into the registers didn't fit there
1260 completely, push the rest of it into stack. */
1264 write_memory (sp
+ 24 + (ii
* 4),
1265 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1268 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1271 /* Push the rest of the arguments into stack. */
1272 for (; argno
< nargs
; ++argno
)
1276 type
= check_typedef (VALUE_TYPE (arg
));
1277 len
= TYPE_LENGTH (type
);
1280 /* Float types should be passed in fpr's, as well as in the
1282 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1287 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1289 memcpy (&deprecated_registers
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1290 VALUE_CONTENTS (arg
),
1295 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1296 ii
+= ((len
+ 3) & -4) / 4;
1300 /* Set the stack pointer. According to the ABI, the SP is meant to
1301 be set _before_ the corresponding stack space is used. On AIX,
1302 this even applies when the target has been completely stopped!
1303 Not doing this can lead to conflicts with the kernel which thinks
1304 that it still has control over this not-yet-allocated stack
1306 regcache_raw_write_signed (regcache
, SP_REGNUM
, sp
);
1308 /* Set back chain properly. */
1309 store_unsigned_integer (tmp_buffer
, 4, saved_sp
);
1310 write_memory (sp
, tmp_buffer
, 4);
1312 /* Point the inferior function call's return address at the dummy's
1314 regcache_raw_write_signed (regcache
, tdep
->ppc_lr_regnum
, bp_addr
);
1316 /* Set the TOC register, get the value from the objfile reader
1317 which, in turn, gets it from the VMAP table. */
1318 if (rs6000_find_toc_address_hook
!= NULL
)
1320 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (func_addr
);
1321 regcache_raw_write_signed (regcache
, tdep
->ppc_toc_regnum
, tocvalue
);
1324 target_store_registers (-1);
1328 /* PowerOpen always puts structures in memory. Vectors, which were
1329 added later, do get returned in a register though. */
1332 rs6000_use_struct_convention (int gcc_p
, struct type
*value_type
)
1334 if ((TYPE_LENGTH (value_type
) == 16 || TYPE_LENGTH (value_type
) == 8)
1335 && TYPE_VECTOR (value_type
))
1341 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1344 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1346 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1351 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1352 We need to truncate the return value into float size (4 byte) if
1355 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1357 ®buf
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1)],
1358 TYPE_LENGTH (valtype
));
1361 memcpy (&dd
, ®buf
[DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1363 memcpy (valbuf
, &ff
, sizeof (float));
1366 else if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1367 && TYPE_LENGTH (valtype
) == 16
1368 && TYPE_VECTOR (valtype
))
1370 memcpy (valbuf
, regbuf
+ DEPRECATED_REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1371 TYPE_LENGTH (valtype
));
1375 /* return value is copied starting from r3. */
1376 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1377 && TYPE_LENGTH (valtype
) < DEPRECATED_REGISTER_RAW_SIZE (3))
1378 offset
= DEPRECATED_REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1381 regbuf
+ DEPRECATED_REGISTER_BYTE (3) + offset
,
1382 TYPE_LENGTH (valtype
));
1386 /* Return whether handle_inferior_event() should proceed through code
1387 starting at PC in function NAME when stepping.
1389 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1390 handle memory references that are too distant to fit in instructions
1391 generated by the compiler. For example, if 'foo' in the following
1396 is greater than 32767, the linker might replace the lwz with a branch to
1397 somewhere in @FIX1 that does the load in 2 instructions and then branches
1398 back to where execution should continue.
1400 GDB should silently step over @FIX code, just like AIX dbx does.
1401 Unfortunately, the linker uses the "b" instruction for the branches,
1402 meaning that the link register doesn't get set. Therefore, GDB's usual
1403 step_over_function() mechanism won't work.
1405 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1406 in handle_inferior_event() to skip past @FIX code. */
1409 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1411 return name
&& !strncmp (name
, "@FIX", 4);
1414 /* Skip code that the user doesn't want to see when stepping:
1416 1. Indirect function calls use a piece of trampoline code to do context
1417 switching, i.e. to set the new TOC table. Skip such code if we are on
1418 its first instruction (as when we have single-stepped to here).
1420 2. Skip shared library trampoline code (which is different from
1421 indirect function call trampolines).
1423 3. Skip bigtoc fixup code.
1425 Result is desired PC to step until, or NULL if we are not in
1426 code that should be skipped. */
1429 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1431 unsigned int ii
, op
;
1433 CORE_ADDR solib_target_pc
;
1434 struct minimal_symbol
*msymbol
;
1436 static unsigned trampoline_code
[] =
1438 0x800b0000, /* l r0,0x0(r11) */
1439 0x90410014, /* st r2,0x14(r1) */
1440 0x7c0903a6, /* mtctr r0 */
1441 0x804b0004, /* l r2,0x4(r11) */
1442 0x816b0008, /* l r11,0x8(r11) */
1443 0x4e800420, /* bctr */
1444 0x4e800020, /* br */
1448 /* Check for bigtoc fixup code. */
1449 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1450 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, DEPRECATED_SYMBOL_NAME (msymbol
)))
1452 /* Double-check that the third instruction from PC is relative "b". */
1453 op
= read_memory_integer (pc
+ 8, 4);
1454 if ((op
& 0xfc000003) == 0x48000000)
1456 /* Extract bits 6-29 as a signed 24-bit relative word address and
1457 add it to the containing PC. */
1458 rel
= ((int)(op
<< 6) >> 6);
1459 return pc
+ 8 + rel
;
1463 /* If pc is in a shared library trampoline, return its target. */
1464 solib_target_pc
= find_solib_trampoline_target (pc
);
1465 if (solib_target_pc
)
1466 return solib_target_pc
;
1468 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1470 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1471 if (op
!= trampoline_code
[ii
])
1474 ii
= read_register (11); /* r11 holds destination addr */
1475 pc
= read_memory_addr (ii
, gdbarch_tdep (current_gdbarch
)->wordsize
); /* (r11) value */
1479 /* Determines whether the function FI has a frame on the stack or not. */
1482 rs6000_frameless_function_invocation (struct frame_info
*fi
)
1484 CORE_ADDR func_start
;
1485 struct rs6000_framedata fdata
;
1487 /* Don't even think about framelessness except on the innermost frame
1488 or if the function was interrupted by a signal. */
1489 if (get_next_frame (fi
) != NULL
1490 && !(get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1493 func_start
= get_frame_func (fi
);
1495 /* If we failed to find the start of the function, it is a mistake
1496 to inspect the instructions. */
1500 /* A frame with a zero PC is usually created by dereferencing a NULL
1501 function pointer, normally causing an immediate core dump of the
1502 inferior. Mark function as frameless, as the inferior has no chance
1503 of setting up a stack frame. */
1504 if (get_frame_pc (fi
) == 0)
1510 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1511 return fdata
.frameless
;
1514 /* Return the PC saved in a frame. */
1517 rs6000_frame_saved_pc (struct frame_info
*fi
)
1519 CORE_ADDR func_start
;
1520 struct rs6000_framedata fdata
;
1521 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1522 int wordsize
= tdep
->wordsize
;
1524 if ((get_frame_type (fi
) == SIGTRAMP_FRAME
))
1525 return read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
1528 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1529 get_frame_base (fi
),
1530 get_frame_base (fi
)))
1531 return deprecated_read_register_dummy (get_frame_pc (fi
),
1532 get_frame_base (fi
), PC_REGNUM
);
1534 func_start
= get_frame_func (fi
);
1536 /* If we failed to find the start of the function, it is a mistake
1537 to inspect the instructions. */
1541 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1543 if (fdata
.lr_offset
== 0 && get_next_frame (fi
) != NULL
)
1545 if ((get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1546 return read_memory_addr ((get_frame_base (get_next_frame (fi
))
1547 + SIG_FRAME_LR_OFFSET
),
1549 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1550 /* The link register wasn't saved by this frame and the next
1551 (inner, newer) frame is a dummy. Get the link register
1552 value by unwinding it from that [dummy] frame. */
1555 frame_unwind_unsigned_register (get_next_frame (fi
),
1556 tdep
->ppc_lr_regnum
, &lr
);
1560 return read_memory_addr (DEPRECATED_FRAME_CHAIN (fi
)
1561 + tdep
->lr_frame_offset
,
1565 if (fdata
.lr_offset
== 0)
1566 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1568 return read_memory_addr (DEPRECATED_FRAME_CHAIN (fi
) + fdata
.lr_offset
,
1572 /* If saved registers of frame FI are not known yet, read and cache them.
1573 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1574 in which case the framedata are read. */
1577 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1579 CORE_ADDR frame_addr
;
1580 struct rs6000_framedata work_fdata
;
1581 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1582 int wordsize
= tdep
->wordsize
;
1584 if (deprecated_get_frame_saved_regs (fi
))
1589 fdatap
= &work_fdata
;
1590 (void) skip_prologue (get_frame_func (fi
), get_frame_pc (fi
), fdatap
);
1593 frame_saved_regs_zalloc (fi
);
1595 /* If there were any saved registers, figure out parent's stack
1597 /* The following is true only if the frame doesn't have a call to
1600 if (fdatap
->saved_fpr
== 0
1601 && fdatap
->saved_gpr
== 0
1602 && fdatap
->saved_vr
== 0
1603 && fdatap
->saved_ev
== 0
1604 && fdatap
->lr_offset
== 0
1605 && fdatap
->cr_offset
== 0
1606 && fdatap
->vr_offset
== 0
1607 && fdatap
->ev_offset
== 0)
1610 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1611 address of the current frame. Things might be easier if the
1612 ->frame pointed to the outer-most address of the frame. In the
1613 mean time, the address of the prev frame is used as the base
1614 address of this frame. */
1615 frame_addr
= DEPRECATED_FRAME_CHAIN (fi
);
1617 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1618 All fpr's from saved_fpr to fp31 are saved. */
1620 if (fdatap
->saved_fpr
>= 0)
1623 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1624 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1626 deprecated_get_frame_saved_regs (fi
)[FP0_REGNUM
+ i
] = fpr_addr
;
1631 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1632 All gpr's from saved_gpr to gpr31 are saved. */
1634 if (fdatap
->saved_gpr
>= 0)
1637 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1638 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1640 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = gpr_addr
;
1641 gpr_addr
+= wordsize
;
1645 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1646 All vr's from saved_vr to vr31 are saved. */
1647 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1649 if (fdatap
->saved_vr
>= 0)
1652 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1653 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1655 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1656 vr_addr
+= DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1661 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1662 All vr's from saved_ev to ev31 are saved. ????? */
1663 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
1665 if (fdatap
->saved_ev
>= 0)
1668 CORE_ADDR ev_addr
= frame_addr
+ fdatap
->ev_offset
;
1669 for (i
= fdatap
->saved_ev
; i
< 32; i
++)
1671 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_ev0_regnum
+ i
] = ev_addr
;
1672 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = ev_addr
+ 4;
1673 ev_addr
+= DEPRECATED_REGISTER_RAW_SIZE (tdep
->ppc_ev0_regnum
);
1678 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1680 if (fdatap
->cr_offset
!= 0)
1681 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1683 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1685 if (fdatap
->lr_offset
!= 0)
1686 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1688 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1690 if (fdatap
->vrsave_offset
!= 0)
1691 deprecated_get_frame_saved_regs (fi
)[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1694 /* Return the address of a frame. This is the inital %sp value when the frame
1695 was first allocated. For functions calling alloca(), it might be saved in
1696 an alloca register. */
1699 frame_initial_stack_address (struct frame_info
*fi
)
1702 struct rs6000_framedata fdata
;
1703 struct frame_info
*callee_fi
;
1705 /* If the initial stack pointer (frame address) of this frame is known,
1708 if (get_frame_extra_info (fi
)->initial_sp
)
1709 return get_frame_extra_info (fi
)->initial_sp
;
1711 /* Find out if this function is using an alloca register. */
1713 (void) skip_prologue (get_frame_func (fi
), get_frame_pc (fi
), &fdata
);
1715 /* If saved registers of this frame are not known yet, read and
1718 if (!deprecated_get_frame_saved_regs (fi
))
1719 frame_get_saved_regs (fi
, &fdata
);
1721 /* If no alloca register used, then fi->frame is the value of the %sp for
1722 this frame, and it is good enough. */
1724 if (fdata
.alloca_reg
< 0)
1726 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1727 return get_frame_extra_info (fi
)->initial_sp
;
1730 /* There is an alloca register, use its value, in the current frame,
1731 as the initial stack pointer. */
1733 char tmpbuf
[MAX_REGISTER_SIZE
];
1734 if (frame_register_read (fi
, fdata
.alloca_reg
, tmpbuf
))
1736 get_frame_extra_info (fi
)->initial_sp
1737 = extract_unsigned_integer (tmpbuf
,
1738 DEPRECATED_REGISTER_RAW_SIZE (fdata
.alloca_reg
));
1741 /* NOTE: cagney/2002-04-17: At present the only time
1742 frame_register_read will fail is when the register isn't
1743 available. If that does happen, use the frame. */
1744 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1746 return get_frame_extra_info (fi
)->initial_sp
;
1749 /* Describe the pointer in each stack frame to the previous stack frame
1752 /* DEPRECATED_FRAME_CHAIN takes a frame's nominal address and produces
1753 the frame's chain-pointer. */
1755 /* In the case of the RS/6000, the frame's nominal address
1756 is the address of a 4-byte word containing the calling frame's address. */
1759 rs6000_frame_chain (struct frame_info
*thisframe
)
1761 CORE_ADDR fp
, fpp
, lr
;
1762 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1764 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (thisframe
),
1765 get_frame_base (thisframe
),
1766 get_frame_base (thisframe
)))
1767 /* A dummy frame always correctly chains back to the previous
1769 return read_memory_addr (get_frame_base (thisframe
), wordsize
);
1771 if (deprecated_inside_entry_file (get_frame_pc (thisframe
))
1772 || get_frame_pc (thisframe
) == entry_point_address ())
1775 if ((get_frame_type (thisframe
) == SIGTRAMP_FRAME
))
1776 fp
= read_memory_addr (get_frame_base (thisframe
) + SIG_FRAME_FP_OFFSET
,
1778 else if (get_next_frame (thisframe
) != NULL
1779 && (get_frame_type (get_next_frame (thisframe
)) == SIGTRAMP_FRAME
)
1780 && FRAMELESS_FUNCTION_INVOCATION (thisframe
))
1781 /* A frameless function interrupted by a signal did not change the
1783 fp
= get_frame_base (thisframe
);
1785 fp
= read_memory_addr (get_frame_base (thisframe
), wordsize
);
1789 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1790 isn't available with that word size, return 0. */
1793 regsize (const struct reg
*reg
, int wordsize
)
1795 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1798 /* Return the name of register number N, or null if no such register exists
1799 in the current architecture. */
1802 rs6000_register_name (int n
)
1804 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1805 const struct reg
*reg
= tdep
->regs
+ n
;
1807 if (!regsize (reg
, tdep
->wordsize
))
1812 /* Index within `registers' of the first byte of the space for
1816 rs6000_register_byte (int n
)
1818 return gdbarch_tdep (current_gdbarch
)->regoff
[n
];
1821 /* Return the number of bytes of storage in the actual machine representation
1822 for register N if that register is available, else return 0. */
1825 rs6000_register_raw_size (int n
)
1827 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1828 const struct reg
*reg
= tdep
->regs
+ n
;
1829 return regsize (reg
, tdep
->wordsize
);
1832 /* Return the GDB type object for the "standard" data type
1833 of data in register N. */
1835 static struct type
*
1836 rs6000_register_virtual_type (int n
)
1838 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1839 const struct reg
*reg
= tdep
->regs
+ n
;
1842 return builtin_type_double
;
1845 int size
= regsize (reg
, tdep
->wordsize
);
1849 return builtin_type_int0
;
1851 return builtin_type_int32
;
1853 if (tdep
->ppc_ev0_regnum
<= n
&& n
<= tdep
->ppc_ev31_regnum
)
1854 return builtin_type_vec64
;
1856 return builtin_type_int64
;
1859 return builtin_type_vec128
;
1862 internal_error (__FILE__
, __LINE__
, "Register %d size %d unknown",
1868 /* Return whether register N requires conversion when moving from raw format
1871 The register format for RS/6000 floating point registers is always
1872 double, we need a conversion if the memory format is float. */
1875 rs6000_register_convertible (int n
)
1877 const struct reg
*reg
= gdbarch_tdep (current_gdbarch
)->regs
+ n
;
1881 /* Convert data from raw format for register N in buffer FROM
1882 to virtual format with type TYPE in buffer TO. */
1885 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1886 char *from
, char *to
)
1888 if (TYPE_LENGTH (type
) != DEPRECATED_REGISTER_RAW_SIZE (n
))
1890 double val
= deprecated_extract_floating (from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1891 deprecated_store_floating (to
, TYPE_LENGTH (type
), val
);
1894 memcpy (to
, from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1897 /* Convert data from virtual format with type TYPE in buffer FROM
1898 to raw format for register N in buffer TO. */
1901 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1902 const char *from
, char *to
)
1904 if (TYPE_LENGTH (type
) != DEPRECATED_REGISTER_RAW_SIZE (n
))
1906 double val
= deprecated_extract_floating (from
, TYPE_LENGTH (type
));
1907 deprecated_store_floating (to
, DEPRECATED_REGISTER_RAW_SIZE (n
), val
);
1910 memcpy (to
, from
, DEPRECATED_REGISTER_RAW_SIZE (n
));
1914 e500_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1915 int reg_nr
, void *buffer
)
1919 char temp_buffer
[MAX_REGISTER_SIZE
];
1920 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1922 if (reg_nr
>= tdep
->ppc_gp0_regnum
1923 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1925 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1927 /* Build the value in the provided buffer. */
1928 /* Read the raw register of which this one is the lower portion. */
1929 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1930 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1932 memcpy ((char *) buffer
, temp_buffer
+ offset
, 4);
1937 e500_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1938 int reg_nr
, const void *buffer
)
1942 char temp_buffer
[MAX_REGISTER_SIZE
];
1943 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1945 if (reg_nr
>= tdep
->ppc_gp0_regnum
1946 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1948 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1949 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1950 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1953 /* Let's read the value of the base register into a temporary
1954 buffer, so that overwriting the last four bytes with the new
1955 value of the pseudo will leave the upper 4 bytes unchanged. */
1956 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1958 /* Write as an 8 byte quantity. */
1959 memcpy (temp_buffer
+ offset
, (char *) buffer
, 4);
1960 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
1964 /* Convert a dwarf2 register number to a gdb REGNUM. */
1966 e500_dwarf2_reg_to_regnum (int num
)
1969 if (0 <= num
&& num
<= 31)
1970 return num
+ gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
;
1975 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1978 rs6000_stab_reg_to_regnum (int num
)
1984 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
1987 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
1990 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
1993 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
2003 rs6000_store_return_value (struct type
*type
, char *valbuf
)
2005 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2007 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2009 /* Floating point values are returned starting from FPR1 and up.
2010 Say a double_double_double type could be returned in
2011 FPR1/FPR2/FPR3 triple. */
2013 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
2014 TYPE_LENGTH (type
));
2015 else if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
2017 if (TYPE_LENGTH (type
) == 16
2018 && TYPE_VECTOR (type
))
2019 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
2020 valbuf
, TYPE_LENGTH (type
));
2023 /* Everything else is returned in GPR3 and up. */
2024 deprecated_write_register_bytes (DEPRECATED_REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
2025 valbuf
, TYPE_LENGTH (type
));
2028 /* Extract from an array REGBUF containing the (raw) register state
2029 the address in which a function should return its structure value,
2030 as a CORE_ADDR (or an expression that can be used as one). */
2033 rs6000_extract_struct_value_address (struct regcache
*regcache
)
2035 /* FIXME: cagney/2002-09-26: PR gdb/724: When making an inferior
2036 function call GDB knows the address of the struct return value
2037 and hence, should not need to call this function. Unfortunately,
2038 the current call_function_by_hand() code only saves the most
2039 recent struct address leading to occasional calls. The code
2040 should instead maintain a stack of such addresses (in the dummy
2042 /* NOTE: cagney/2002-09-26: Return 0 which indicates that we've
2043 really got no idea where the return value is being stored. While
2044 r3, on function entry, contained the address it will have since
2045 been reused (scratch) and hence wouldn't be valid */
2049 /* Hook called when a new child process is started. */
2052 rs6000_create_inferior (int pid
)
2054 if (rs6000_set_host_arch_hook
)
2055 rs6000_set_host_arch_hook (pid
);
2058 /* Support for CONVERT_FROM_FUNC_PTR_ADDR (ARCH, ADDR, TARG).
2060 Usually a function pointer's representation is simply the address
2061 of the function. On the RS/6000 however, a function pointer is
2062 represented by a pointer to a TOC entry. This TOC entry contains
2063 three words, the first word is the address of the function, the
2064 second word is the TOC pointer (r2), and the third word is the
2065 static chain value. Throughout GDB it is currently assumed that a
2066 function pointer contains the address of the function, which is not
2067 easy to fix. In addition, the conversion of a function address to
2068 a function pointer would require allocation of a TOC entry in the
2069 inferior's memory space, with all its drawbacks. To be able to
2070 call C++ virtual methods in the inferior (which are called via
2071 function pointers), find_function_addr uses this function to get the
2072 function address from a function pointer. */
2074 /* Return real function address if ADDR (a function pointer) is in the data
2075 space and is therefore a special function pointer. */
2078 rs6000_convert_from_func_ptr_addr (struct gdbarch
*gdbarch
,
2080 struct target_ops
*targ
)
2082 struct obj_section
*s
;
2084 s
= find_pc_section (addr
);
2085 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
2088 /* ADDR is in the data space, so it's a special function pointer. */
2089 return read_memory_addr (addr
, gdbarch_tdep (current_gdbarch
)->wordsize
);
2093 /* Handling the various POWER/PowerPC variants. */
2096 /* The arrays here called registers_MUMBLE hold information about available
2099 For each family of PPC variants, I've tried to isolate out the
2100 common registers and put them up front, so that as long as you get
2101 the general family right, GDB will correctly identify the registers
2102 common to that family. The common register sets are:
2104 For the 60x family: hid0 hid1 iabr dabr pir
2106 For the 505 and 860 family: eie eid nri
2108 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
2109 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
2112 Most of these register groups aren't anything formal. I arrived at
2113 them by looking at the registers that occurred in more than one
2116 Note: kevinb/2002-04-30: Support for the fpscr register was added
2117 during April, 2002. Slot 70 is being used for PowerPC and slot 71
2118 for Power. For PowerPC, slot 70 was unused and was already in the
2119 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
2120 slot 70 was being used for "mq", so the next available slot (71)
2121 was chosen. It would have been nice to be able to make the
2122 register numbers the same across processor cores, but this wasn't
2123 possible without either 1) renumbering some registers for some
2124 processors or 2) assigning fpscr to a really high slot that's
2125 larger than any current register number. Doing (1) is bad because
2126 existing stubs would break. Doing (2) is undesirable because it
2127 would introduce a really large gap between fpscr and the rest of
2128 the registers for most processors. */
2130 /* Convenience macros for populating register arrays. */
2132 /* Within another macro, convert S to a string. */
2136 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
2137 and 64 bits on 64-bit systems. */
2138 #define R(name) { STR(name), 4, 8, 0, 0 }
2140 /* Return a struct reg defining register NAME that's 32 bits on all
2142 #define R4(name) { STR(name), 4, 4, 0, 0 }
2144 /* Return a struct reg defining register NAME that's 64 bits on all
2146 #define R8(name) { STR(name), 8, 8, 0, 0 }
2148 /* Return a struct reg defining register NAME that's 128 bits on all
2150 #define R16(name) { STR(name), 16, 16, 0, 0 }
2152 /* Return a struct reg defining floating-point register NAME. */
2153 #define F(name) { STR(name), 8, 8, 1, 0 }
2155 /* Return a struct reg defining a pseudo register NAME. */
2156 #define P(name) { STR(name), 4, 8, 0, 1}
2158 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
2159 systems and that doesn't exist on 64-bit systems. */
2160 #define R32(name) { STR(name), 4, 0, 0, 0 }
2162 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
2163 systems and that doesn't exist on 32-bit systems. */
2164 #define R64(name) { STR(name), 0, 8, 0, 0 }
2166 /* Return a struct reg placeholder for a register that doesn't exist. */
2167 #define R0 { 0, 0, 0, 0, 0 }
2169 /* UISA registers common across all architectures, including POWER. */
2171 #define COMMON_UISA_REGS \
2172 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2173 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2174 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2175 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2176 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
2177 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
2178 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
2179 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
2180 /* 64 */ R(pc), R(ps)
2182 #define COMMON_UISA_NOFP_REGS \
2183 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2184 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2185 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2186 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2187 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2188 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2189 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2190 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2191 /* 64 */ R(pc), R(ps)
2193 /* UISA-level SPRs for PowerPC. */
2194 #define PPC_UISA_SPRS \
2195 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
2197 /* UISA-level SPRs for PowerPC without floating point support. */
2198 #define PPC_UISA_NOFP_SPRS \
2199 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
2201 /* Segment registers, for PowerPC. */
2202 #define PPC_SEGMENT_REGS \
2203 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2204 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2205 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2206 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2208 /* OEA SPRs for PowerPC. */
2209 #define PPC_OEA_SPRS \
2211 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2212 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2213 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2214 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2215 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2216 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2217 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2218 /* 116 */ R4(dec), R(dabr), R4(ear)
2220 /* AltiVec registers. */
2221 #define PPC_ALTIVEC_REGS \
2222 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2223 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2224 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2225 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2226 /*151*/R4(vscr), R4(vrsave)
2228 /* Vectors of hi-lo general purpose registers. */
2229 #define PPC_EV_REGS \
2230 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
2231 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
2232 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
2233 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2235 /* Lower half of the EV registers. */
2236 #define PPC_GPRS_PSEUDO_REGS \
2237 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2238 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2239 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2240 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31)
2242 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2243 user-level SPR's. */
2244 static const struct reg registers_power
[] =
2247 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
2251 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2252 view of the PowerPC. */
2253 static const struct reg registers_powerpc
[] =
2260 /* PowerPC UISA - a PPC processor as viewed by user-level
2261 code, but without floating point registers. */
2262 static const struct reg registers_powerpc_nofp
[] =
2264 COMMON_UISA_NOFP_REGS
,
2268 /* IBM PowerPC 403. */
2269 static const struct reg registers_403
[] =
2275 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2276 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2277 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2278 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2279 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2280 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
2283 /* IBM PowerPC 403GC. */
2284 static const struct reg registers_403GC
[] =
2290 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2291 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2292 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2293 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2294 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2295 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2296 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2297 /* 147 */ R(tbhu
), R(tblu
)
2300 /* Motorola PowerPC 505. */
2301 static const struct reg registers_505
[] =
2307 /* 119 */ R(eie
), R(eid
), R(nri
)
2310 /* Motorola PowerPC 860 or 850. */
2311 static const struct reg registers_860
[] =
2317 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2318 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2319 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2320 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2321 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2322 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2323 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2324 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2325 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2326 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2327 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2328 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2331 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2332 for reading and writing RTCU and RTCL. However, how one reads and writes a
2333 register is the stub's problem. */
2334 static const struct reg registers_601
[] =
2340 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2341 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2344 /* Motorola PowerPC 602. */
2345 static const struct reg registers_602
[] =
2351 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2352 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2353 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2356 /* Motorola/IBM PowerPC 603 or 603e. */
2357 static const struct reg registers_603
[] =
2363 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2364 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2365 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2368 /* Motorola PowerPC 604 or 604e. */
2369 static const struct reg registers_604
[] =
2375 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2376 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2377 /* 127 */ R(sia
), R(sda
)
2380 /* Motorola/IBM PowerPC 750 or 740. */
2381 static const struct reg registers_750
[] =
2387 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2388 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2389 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2390 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2391 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2392 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2396 /* Motorola PowerPC 7400. */
2397 static const struct reg registers_7400
[] =
2399 /* gpr0-gpr31, fpr0-fpr31 */
2401 /* ctr, xre, lr, cr */
2406 /* vr0-vr31, vrsave, vscr */
2408 /* FIXME? Add more registers? */
2411 /* Motorola e500. */
2412 static const struct reg registers_e500
[] =
2415 /* cr, lr, ctr, xer, "" */
2419 R8(acc
), R(spefscr
),
2420 /* NOTE: Add new registers here the end of the raw register
2421 list and just before the first pseudo register. */
2423 PPC_GPRS_PSEUDO_REGS
2426 /* Information about a particular processor variant. */
2430 /* Name of this variant. */
2433 /* English description of the variant. */
2436 /* bfd_arch_info.arch corresponding to variant. */
2437 enum bfd_architecture arch
;
2439 /* bfd_arch_info.mach corresponding to variant. */
2442 /* Number of real registers. */
2445 /* Number of pseudo registers. */
2448 /* Number of total registers (the sum of nregs and npregs). */
2451 /* Table of register names; registers[R] is the name of the register
2453 const struct reg
*regs
;
2456 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2459 num_registers (const struct reg
*reg_list
, int num_tot_regs
)
2464 for (i
= 0; i
< num_tot_regs
; i
++)
2465 if (!reg_list
[i
].pseudo
)
2472 num_pseudo_registers (const struct reg
*reg_list
, int num_tot_regs
)
2477 for (i
= 0; i
< num_tot_regs
; i
++)
2478 if (reg_list
[i
].pseudo
)
2484 /* Information in this table comes from the following web sites:
2485 IBM: http://www.chips.ibm.com:80/products/embedded/
2486 Motorola: http://www.mot.com/SPS/PowerPC/
2488 I'm sure I've got some of the variant descriptions not quite right.
2489 Please report any inaccuracies you find to GDB's maintainer.
2491 If you add entries to this table, please be sure to allow the new
2492 value as an argument to the --with-cpu flag, in configure.in. */
2494 static struct variant variants
[] =
2497 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2498 bfd_mach_ppc
, -1, -1, tot_num_registers (registers_powerpc
),
2500 {"power", "POWER user-level", bfd_arch_rs6000
,
2501 bfd_mach_rs6k
, -1, -1, tot_num_registers (registers_power
),
2503 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2504 bfd_mach_ppc_403
, -1, -1, tot_num_registers (registers_403
),
2506 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2507 bfd_mach_ppc_601
, -1, -1, tot_num_registers (registers_601
),
2509 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2510 bfd_mach_ppc_602
, -1, -1, tot_num_registers (registers_602
),
2512 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2513 bfd_mach_ppc_603
, -1, -1, tot_num_registers (registers_603
),
2515 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2516 604, -1, -1, tot_num_registers (registers_604
),
2518 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2519 bfd_mach_ppc_403gc
, -1, -1, tot_num_registers (registers_403GC
),
2521 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2522 bfd_mach_ppc_505
, -1, -1, tot_num_registers (registers_505
),
2524 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2525 bfd_mach_ppc_860
, -1, -1, tot_num_registers (registers_860
),
2527 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2528 bfd_mach_ppc_750
, -1, -1, tot_num_registers (registers_750
),
2530 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2531 bfd_mach_ppc_7400
, -1, -1, tot_num_registers (registers_7400
),
2533 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc
,
2534 bfd_mach_ppc_e500
, -1, -1, tot_num_registers (registers_e500
),
2538 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2539 bfd_mach_ppc64
, -1, -1, tot_num_registers (registers_powerpc
),
2541 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2542 bfd_mach_ppc_620
, -1, -1, tot_num_registers (registers_powerpc
),
2544 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2545 bfd_mach_ppc_630
, -1, -1, tot_num_registers (registers_powerpc
),
2547 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2548 bfd_mach_ppc_a35
, -1, -1, tot_num_registers (registers_powerpc
),
2550 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2551 bfd_mach_ppc_rs64ii
, -1, -1, tot_num_registers (registers_powerpc
),
2553 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2554 bfd_mach_ppc_rs64iii
, -1, -1, tot_num_registers (registers_powerpc
),
2557 /* FIXME: I haven't checked the register sets of the following. */
2558 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2559 bfd_mach_rs6k_rs1
, -1, -1, tot_num_registers (registers_power
),
2561 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2562 bfd_mach_rs6k_rsc
, -1, -1, tot_num_registers (registers_power
),
2564 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2565 bfd_mach_rs6k_rs2
, -1, -1, tot_num_registers (registers_power
),
2568 {0, 0, 0, 0, 0, 0, 0, 0}
2571 /* Initialize the number of registers and pseudo registers in each variant. */
2574 init_variants (void)
2578 for (v
= variants
; v
->name
; v
++)
2581 v
->nregs
= num_registers (v
->regs
, v
->num_tot_regs
);
2582 if (v
->npregs
== -1)
2583 v
->npregs
= num_pseudo_registers (v
->regs
, v
->num_tot_regs
);
2587 /* Return the variant corresponding to architecture ARCH and machine number
2588 MACH. If no such variant exists, return null. */
2590 static const struct variant
*
2591 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2593 const struct variant
*v
;
2595 for (v
= variants
; v
->name
; v
++)
2596 if (arch
== v
->arch
&& mach
== v
->mach
)
2603 gdb_print_insn_powerpc (bfd_vma memaddr
, disassemble_info
*info
)
2605 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2606 return print_insn_big_powerpc (memaddr
, info
);
2608 return print_insn_little_powerpc (memaddr
, info
);
2611 /* Initialize the current architecture based on INFO. If possible, re-use an
2612 architecture from ARCHES, which is a list of architectures already created
2613 during this debugging session.
2615 Called e.g. at program startup, when reading a core file, and when reading
2618 static struct gdbarch
*
2619 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2621 struct gdbarch
*gdbarch
;
2622 struct gdbarch_tdep
*tdep
;
2623 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2625 const struct variant
*v
;
2626 enum bfd_architecture arch
;
2632 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2633 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2635 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2636 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2638 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2640 /* Check word size. If INFO is from a binary file, infer it from
2641 that, else choose a likely default. */
2642 if (from_xcoff_exec
)
2644 if (bfd_xcoff_is_xcoff64 (info
.abfd
))
2649 else if (from_elf_exec
)
2651 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2658 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2659 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2660 info
.bfd_arch_info
->bits_per_byte
;
2665 /* Find a candidate among extant architectures. */
2666 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2668 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2670 /* Word size in the various PowerPC bfd_arch_info structs isn't
2671 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2672 separate word size check. */
2673 tdep
= gdbarch_tdep (arches
->gdbarch
);
2674 if (tdep
&& tdep
->wordsize
== wordsize
)
2675 return arches
->gdbarch
;
2678 /* None found, create a new architecture from INFO, whose bfd_arch_info
2679 validity depends on the source:
2680 - executable useless
2681 - rs6000_host_arch() good
2683 - "set arch" trust blindly
2684 - GDB startup useless but harmless */
2686 if (!from_xcoff_exec
)
2688 arch
= info
.bfd_arch_info
->arch
;
2689 mach
= info
.bfd_arch_info
->mach
;
2693 arch
= bfd_arch_powerpc
;
2694 bfd_default_set_arch_mach (&abfd
, arch
, 0);
2695 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2696 mach
= info
.bfd_arch_info
->mach
;
2698 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2699 tdep
->wordsize
= wordsize
;
2701 /* For e500 executables, the apuinfo section is of help here. Such
2702 section contains the identifier and revision number of each
2703 Application-specific Processing Unit that is present on the
2704 chip. The content of the section is determined by the assembler
2705 which looks at each instruction and determines which unit (and
2706 which version of it) can execute it. In our case we just look for
2707 the existance of the section. */
2711 sect
= bfd_get_section_by_name (info
.abfd
, ".PPC.EMB.apuinfo");
2714 arch
= info
.bfd_arch_info
->arch
;
2715 mach
= bfd_mach_ppc_e500
;
2716 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2717 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2721 gdbarch
= gdbarch_alloc (&info
, tdep
);
2722 power
= arch
== bfd_arch_rs6000
;
2724 /* Initialize the number of real and pseudo registers in each variant. */
2727 /* Choose variant. */
2728 v
= find_variant_by_arch (arch
, mach
);
2732 tdep
->regs
= v
->regs
;
2734 tdep
->ppc_gp0_regnum
= 0;
2735 tdep
->ppc_gplast_regnum
= 31;
2736 tdep
->ppc_toc_regnum
= 2;
2737 tdep
->ppc_ps_regnum
= 65;
2738 tdep
->ppc_cr_regnum
= 66;
2739 tdep
->ppc_lr_regnum
= 67;
2740 tdep
->ppc_ctr_regnum
= 68;
2741 tdep
->ppc_xer_regnum
= 69;
2742 if (v
->mach
== bfd_mach_ppc_601
)
2743 tdep
->ppc_mq_regnum
= 124;
2745 tdep
->ppc_mq_regnum
= 70;
2747 tdep
->ppc_mq_regnum
= -1;
2748 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2750 set_gdbarch_pc_regnum (gdbarch
, 64);
2751 set_gdbarch_sp_regnum (gdbarch
, 1);
2752 set_gdbarch_deprecated_fp_regnum (gdbarch
, 1);
2753 if (sysv_abi
&& wordsize
== 8)
2754 set_gdbarch_return_value (gdbarch
, ppc64_sysv_abi_return_value
);
2755 else if (sysv_abi
&& wordsize
== 4)
2756 set_gdbarch_return_value (gdbarch
, ppc_sysv_abi_return_value
);
2759 set_gdbarch_deprecated_extract_return_value (gdbarch
, rs6000_extract_return_value
);
2760 set_gdbarch_deprecated_store_return_value (gdbarch
, rs6000_store_return_value
);
2763 if (v
->arch
== bfd_arch_powerpc
)
2767 tdep
->ppc_vr0_regnum
= 71;
2768 tdep
->ppc_vrsave_regnum
= 104;
2769 tdep
->ppc_ev0_regnum
= -1;
2770 tdep
->ppc_ev31_regnum
= -1;
2772 case bfd_mach_ppc_7400
:
2773 tdep
->ppc_vr0_regnum
= 119;
2774 tdep
->ppc_vrsave_regnum
= 152;
2775 tdep
->ppc_ev0_regnum
= -1;
2776 tdep
->ppc_ev31_regnum
= -1;
2778 case bfd_mach_ppc_e500
:
2779 tdep
->ppc_gp0_regnum
= 41;
2780 tdep
->ppc_gplast_regnum
= tdep
->ppc_gp0_regnum
+ 32 - 1;
2781 tdep
->ppc_toc_regnum
= -1;
2782 tdep
->ppc_ps_regnum
= 1;
2783 tdep
->ppc_cr_regnum
= 2;
2784 tdep
->ppc_lr_regnum
= 3;
2785 tdep
->ppc_ctr_regnum
= 4;
2786 tdep
->ppc_xer_regnum
= 5;
2787 tdep
->ppc_ev0_regnum
= 7;
2788 tdep
->ppc_ev31_regnum
= 38;
2789 set_gdbarch_pc_regnum (gdbarch
, 0);
2790 set_gdbarch_sp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2791 set_gdbarch_deprecated_fp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2792 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, e500_dwarf2_reg_to_regnum
);
2793 set_gdbarch_pseudo_register_read (gdbarch
, e500_pseudo_register_read
);
2794 set_gdbarch_pseudo_register_write (gdbarch
, e500_pseudo_register_write
);
2797 tdep
->ppc_vr0_regnum
= -1;
2798 tdep
->ppc_vrsave_regnum
= -1;
2799 tdep
->ppc_ev0_regnum
= -1;
2800 tdep
->ppc_ev31_regnum
= -1;
2804 /* Sanity check on registers. */
2805 gdb_assert (strcmp (tdep
->regs
[tdep
->ppc_gp0_regnum
].name
, "r0") == 0);
2807 /* Set lr_frame_offset. */
2809 tdep
->lr_frame_offset
= 16;
2811 tdep
->lr_frame_offset
= 4;
2813 tdep
->lr_frame_offset
= 8;
2815 /* Calculate byte offsets in raw register array. */
2816 tdep
->regoff
= xmalloc (v
->num_tot_regs
* sizeof (int));
2817 for (i
= off
= 0; i
< v
->num_tot_regs
; i
++)
2819 tdep
->regoff
[i
] = off
;
2820 off
+= regsize (v
->regs
+ i
, wordsize
);
2823 /* Select instruction printer. */
2825 set_gdbarch_print_insn (gdbarch
, print_insn_rs6000
);
2827 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_powerpc
);
2829 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2831 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2832 set_gdbarch_num_pseudo_regs (gdbarch
, v
->npregs
);
2833 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2834 set_gdbarch_deprecated_register_size (gdbarch
, wordsize
);
2835 set_gdbarch_deprecated_register_bytes (gdbarch
, off
);
2836 set_gdbarch_deprecated_register_byte (gdbarch
, rs6000_register_byte
);
2837 set_gdbarch_deprecated_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2838 set_gdbarch_deprecated_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2840 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2841 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2842 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2843 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2844 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2845 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2846 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2848 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
2850 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2851 set_gdbarch_char_signed (gdbarch
, 0);
2853 set_gdbarch_frame_align (gdbarch
, rs6000_frame_align
);
2854 if (sysv_abi
&& wordsize
== 8)
2856 set_gdbarch_frame_red_zone_size (gdbarch
, 288);
2857 else if (!sysv_abi
&& wordsize
== 4)
2858 /* PowerOpen / AIX 32 bit. The saved area or red zone consists of
2859 19 4 byte GPRS + 18 8 byte FPRs giving a total of 220 bytes.
2860 Problem is, 220 isn't frame (16 byte) aligned. Round it up to
2862 set_gdbarch_frame_red_zone_size (gdbarch
, 224);
2863 set_gdbarch_deprecated_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2864 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2866 set_gdbarch_deprecated_register_convertible (gdbarch
, rs6000_register_convertible
);
2867 set_gdbarch_deprecated_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2868 set_gdbarch_deprecated_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2869 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2870 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2871 is correct for the SysV ABI when the wordsize is 8, but I'm also
2872 fairly certain that ppc_sysv_abi_push_arguments() will give even
2873 worse results since it only works for 32-bit code. So, for the moment,
2874 we're better off calling rs6000_push_arguments() since it works for
2875 64-bit code. At some point in the future, this matter needs to be
2877 if (sysv_abi
&& wordsize
== 4)
2878 set_gdbarch_push_dummy_call (gdbarch
, ppc_sysv_abi_push_dummy_call
);
2879 else if (sysv_abi
&& wordsize
== 8)
2880 set_gdbarch_push_dummy_call (gdbarch
, ppc64_sysv_abi_push_dummy_call
);
2882 set_gdbarch_push_dummy_call (gdbarch
, rs6000_push_dummy_call
);
2884 set_gdbarch_deprecated_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2885 set_gdbarch_deprecated_pop_frame (gdbarch
, rs6000_pop_frame
);
2887 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2888 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2889 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2891 /* Handle the 64-bit SVR4 minimal-symbol convention of using "FN"
2892 for the descriptor and ".FN" for the entry-point -- a user
2893 specifying "break FN" will unexpectedly end up with a breakpoint
2894 on the descriptor and not the function. This architecture method
2895 transforms any breakpoints on descriptors into breakpoints on the
2896 corresponding entry point. */
2897 if (sysv_abi
&& wordsize
== 8)
2898 set_gdbarch_adjust_breakpoint_address (gdbarch
, ppc64_sysv_abi_adjust_breakpoint_address
);
2900 /* Not sure on this. FIXMEmgo */
2901 set_gdbarch_frame_args_skip (gdbarch
, 8);
2904 set_gdbarch_use_struct_convention (gdbarch
,
2905 rs6000_use_struct_convention
);
2907 set_gdbarch_frameless_function_invocation (gdbarch
,
2908 rs6000_frameless_function_invocation
);
2909 set_gdbarch_deprecated_frame_chain (gdbarch
, rs6000_frame_chain
);
2910 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, rs6000_frame_saved_pc
);
2912 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, rs6000_frame_init_saved_regs
);
2913 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, rs6000_init_extra_frame_info
);
2917 /* Handle RS/6000 function pointers (which are really function
2919 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2920 rs6000_convert_from_func_ptr_addr
);
2922 set_gdbarch_deprecated_frame_args_address (gdbarch
, rs6000_frame_args_address
);
2923 set_gdbarch_deprecated_frame_locals_address (gdbarch
, rs6000_frame_args_address
);
2924 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, rs6000_saved_pc_after_call
);
2926 /* Helpers for function argument information. */
2927 set_gdbarch_fetch_pointer_argument (gdbarch
, rs6000_fetch_pointer_argument
);
2929 /* Hook in ABI-specific overrides, if they have been registered. */
2930 gdbarch_init_osabi (info
, gdbarch
);
2932 if (from_xcoff_exec
)
2934 /* NOTE: jimix/2003-06-09: This test should really check for
2935 GDB_OSABI_AIX when that is defined and becomes
2936 available. (Actually, once things are properly split apart,
2937 the test goes away.) */
2938 /* RS6000/AIX does not support PT_STEP. Has to be simulated. */
2939 set_gdbarch_software_single_step (gdbarch
, rs6000_software_single_step
);
2946 rs6000_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2948 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2953 /* FIXME: Dump gdbarch_tdep. */
2956 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
2959 rs6000_info_powerpc_command (char *args
, int from_tty
)
2961 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
2964 /* Initialization code. */
2966 extern initialize_file_ftype _initialize_rs6000_tdep
; /* -Wmissing-prototypes */
2969 _initialize_rs6000_tdep (void)
2971 gdbarch_register (bfd_arch_rs6000
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2972 gdbarch_register (bfd_arch_powerpc
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2974 /* Add root prefix command for "info powerpc" commands */
2975 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
2976 "Various POWERPC info specific commands.",
2977 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);