1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
38 #include "libbfd.h" /* for bfd_default_set_arch_mach */
39 #include "coff/internal.h" /* for libcoff.h */
40 #include "libcoff.h" /* for xcoff_data */
41 #include "coff/xcoff.h"
46 #include "solib-svr4.h"
49 /* If the kernel has to deliver a signal, it pushes a sigcontext
50 structure on the stack and then calls the signal handler, passing
51 the address of the sigcontext in an argument register. Usually
52 the signal handler doesn't save this register, so we have to
53 access the sigcontext structure via an offset from the signal handler
55 The following constants were determined by experimentation on AIX 3.2. */
56 #define SIG_FRAME_PC_OFFSET 96
57 #define SIG_FRAME_LR_OFFSET 108
58 #define SIG_FRAME_FP_OFFSET 284
60 /* To be used by skip_prologue. */
62 struct rs6000_framedata
64 int offset
; /* total size of frame --- the distance
65 by which we decrement sp to allocate
67 int saved_gpr
; /* smallest # of saved gpr */
68 int saved_fpr
; /* smallest # of saved fpr */
69 int saved_vr
; /* smallest # of saved vr */
70 int saved_ev
; /* smallest # of saved ev */
71 int alloca_reg
; /* alloca register number (frame ptr) */
72 char frameless
; /* true if frameless functions. */
73 char nosavedpc
; /* true if pc not saved. */
74 int gpr_offset
; /* offset of saved gprs from prev sp */
75 int fpr_offset
; /* offset of saved fprs from prev sp */
76 int vr_offset
; /* offset of saved vrs from prev sp */
77 int ev_offset
; /* offset of saved evs from prev sp */
78 int lr_offset
; /* offset of saved lr */
79 int cr_offset
; /* offset of saved cr */
80 int vrsave_offset
; /* offset of saved vrsave register */
83 /* Description of a single register. */
87 char *name
; /* name of register */
88 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
89 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
90 unsigned char fpr
; /* whether register is floating-point */
91 unsigned char pseudo
; /* whether register is pseudo */
94 /* Breakpoint shadows for the single step instructions will be kept here. */
96 static struct sstep_breaks
98 /* Address, or 0 if this is not in use. */
100 /* Shadow contents. */
105 /* Hook for determining the TOC address when calling functions in the
106 inferior under AIX. The initialization code in rs6000-nat.c sets
107 this hook to point to find_toc_address. */
109 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
111 /* Hook to set the current architecture when starting a child process.
112 rs6000-nat.c sets this. */
114 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
116 /* Static function prototypes */
118 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
120 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
121 struct rs6000_framedata
*);
122 static void frame_get_saved_regs (struct frame_info
* fi
,
123 struct rs6000_framedata
* fdatap
);
124 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
126 /* Is REGNO an AltiVec register? Return 1 if so, 0 otherwise. */
128 altivec_register_p (int regno
)
130 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
131 if (tdep
->ppc_vr0_regnum
< 0 || tdep
->ppc_vrsave_regnum
< 0)
134 return (regno
>= tdep
->ppc_vr0_regnum
&& regno
<= tdep
->ppc_vrsave_regnum
);
137 /* Read a LEN-byte address from debugged memory address MEMADDR. */
140 read_memory_addr (CORE_ADDR memaddr
, int len
)
142 return read_memory_unsigned_integer (memaddr
, len
);
146 rs6000_skip_prologue (CORE_ADDR pc
)
148 struct rs6000_framedata frame
;
149 pc
= skip_prologue (pc
, 0, &frame
);
154 /* Fill in fi->saved_regs */
156 struct frame_extra_info
158 /* Functions calling alloca() change the value of the stack
159 pointer. We need to use initial stack pointer (which is saved in
160 r31 by gcc) in such cases. If a compiler emits traceback table,
161 then we should use the alloca register specified in traceback
163 CORE_ADDR initial_sp
; /* initial stack pointer. */
167 rs6000_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
169 fi
->extra_info
= (struct frame_extra_info
*)
170 frame_obstack_alloc (sizeof (struct frame_extra_info
));
171 fi
->extra_info
->initial_sp
= 0;
172 if (fi
->next
!= (CORE_ADDR
) 0
173 && fi
->pc
< TEXT_SEGMENT_BASE
)
174 /* We're in get_prev_frame */
175 /* and this is a special signal frame. */
176 /* (fi->pc will be some low address in the kernel, */
177 /* to which the signal handler returns). */
178 fi
->signal_handler_caller
= 1;
181 /* Put here the code to store, into a struct frame_saved_regs,
182 the addresses of the saved registers of frame described by FRAME_INFO.
183 This includes special registers such as pc and fp saved in special
184 ways in the stack frame. sp is even more special:
185 the address we return for it IS the sp for the next frame. */
187 /* In this implementation for RS/6000, we do *not* save sp. I am
188 not sure if it will be needed. The following function takes care of gpr's
192 rs6000_frame_init_saved_regs (struct frame_info
*fi
)
194 frame_get_saved_regs (fi
, NULL
);
198 rs6000_frame_args_address (struct frame_info
*fi
)
200 if (fi
->extra_info
->initial_sp
!= 0)
201 return fi
->extra_info
->initial_sp
;
203 return frame_initial_stack_address (fi
);
206 /* Immediately after a function call, return the saved pc.
207 Can't go through the frames for this because on some machines
208 the new frame is not set up until the new function executes
209 some instructions. */
212 rs6000_saved_pc_after_call (struct frame_info
*fi
)
214 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
217 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
220 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
227 absolute
= (int) ((instr
>> 1) & 1);
232 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
236 dest
= pc
+ immediate
;
240 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
244 dest
= pc
+ immediate
;
248 ext_op
= (instr
>> 1) & 0x3ff;
250 if (ext_op
== 16) /* br conditional register */
252 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
254 /* If we are about to return from a signal handler, dest is
255 something like 0x3c90. The current frame is a signal handler
256 caller frame, upon completion of the sigreturn system call
257 execution will return to the saved PC in the frame. */
258 if (dest
< TEXT_SEGMENT_BASE
)
260 struct frame_info
*fi
;
262 fi
= get_current_frame ();
264 dest
= read_memory_addr (fi
->frame
+ SIG_FRAME_PC_OFFSET
,
265 gdbarch_tdep (current_gdbarch
)->wordsize
);
269 else if (ext_op
== 528) /* br cond to count reg */
271 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
273 /* If we are about to execute a system call, dest is something
274 like 0x22fc or 0x3b00. Upon completion the system call
275 will return to the address in the link register. */
276 if (dest
< TEXT_SEGMENT_BASE
)
277 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
286 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
290 /* Sequence of bytes for breakpoint instruction. */
292 #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
293 #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
295 const static unsigned char *
296 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
298 static unsigned char big_breakpoint
[] = BIG_BREAKPOINT
;
299 static unsigned char little_breakpoint
[] = LITTLE_BREAKPOINT
;
301 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
302 return big_breakpoint
;
304 return little_breakpoint
;
308 /* AIX does not support PT_STEP. Simulate it. */
311 rs6000_software_single_step (enum target_signal signal
,
312 int insert_breakpoints_p
)
316 const char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
322 if (insert_breakpoints_p
)
327 insn
= read_memory_integer (loc
, 4);
329 breaks
[0] = loc
+ breakp_sz
;
331 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
333 /* Don't put two breakpoints on the same address. */
334 if (breaks
[1] == breaks
[0])
337 stepBreaks
[1].address
= 0;
339 for (ii
= 0; ii
< 2; ++ii
)
342 /* ignore invalid breakpoint. */
343 if (breaks
[ii
] == -1)
345 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
346 stepBreaks
[ii
].address
= breaks
[ii
];
353 /* remove step breakpoints. */
354 for (ii
= 0; ii
< 2; ++ii
)
355 if (stepBreaks
[ii
].address
!= 0)
356 target_remove_breakpoint (stepBreaks
[ii
].address
,
357 stepBreaks
[ii
].data
);
359 errno
= 0; /* FIXME, don't ignore errors! */
360 /* What errors? {read,write}_memory call error(). */
364 /* return pc value after skipping a function prologue and also return
365 information about a function frame.
367 in struct rs6000_framedata fdata:
368 - frameless is TRUE, if function does not have a frame.
369 - nosavedpc is TRUE, if function does not save %pc value in its frame.
370 - offset is the initial size of this stack frame --- the amount by
371 which we decrement the sp to allocate the frame.
372 - saved_gpr is the number of the first saved gpr.
373 - saved_fpr is the number of the first saved fpr.
374 - saved_vr is the number of the first saved vr.
375 - saved_ev is the number of the first saved ev.
376 - alloca_reg is the number of the register used for alloca() handling.
378 - gpr_offset is the offset of the first saved gpr from the previous frame.
379 - fpr_offset is the offset of the first saved fpr from the previous frame.
380 - vr_offset is the offset of the first saved vr from the previous frame.
381 - ev_offset is the offset of the first saved ev from the previous frame.
382 - lr_offset is the offset of the saved lr
383 - cr_offset is the offset of the saved cr
384 - vrsave_offset is the offset of the saved vrsave register
387 #define SIGNED_SHORT(x) \
388 ((sizeof (short) == 2) \
389 ? ((int)(short)(x)) \
390 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
392 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
394 /* Limit the number of skipped non-prologue instructions, as the examining
395 of the prologue is expensive. */
396 static int max_skip_non_prologue_insns
= 10;
398 /* Given PC representing the starting address of a function, and
399 LIM_PC which is the (sloppy) limit to which to scan when looking
400 for a prologue, attempt to further refine this limit by using
401 the line data in the symbol table. If successful, a better guess
402 on where the prologue ends is returned, otherwise the previous
403 value of lim_pc is returned. */
405 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
407 struct symtab_and_line prologue_sal
;
409 prologue_sal
= find_pc_line (pc
, 0);
410 if (prologue_sal
.line
!= 0)
413 CORE_ADDR addr
= prologue_sal
.end
;
415 /* Handle the case in which compiler's optimizer/scheduler
416 has moved instructions into the prologue. We scan ahead
417 in the function looking for address ranges whose corresponding
418 line number is less than or equal to the first one that we
419 found for the function. (It can be less than when the
420 scheduler puts a body instruction before the first prologue
422 for (i
= 2 * max_skip_non_prologue_insns
;
423 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
426 struct symtab_and_line sal
;
428 sal
= find_pc_line (addr
, 0);
431 if (sal
.line
<= prologue_sal
.line
432 && sal
.symtab
== prologue_sal
.symtab
)
439 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
440 lim_pc
= prologue_sal
.end
;
447 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
449 CORE_ADDR orig_pc
= pc
;
450 CORE_ADDR last_prologue_pc
= pc
;
451 CORE_ADDR li_found_pc
= 0;
455 long vr_saved_offset
= 0;
464 int minimal_toc_loaded
= 0;
465 int prev_insn_was_prologue_insn
= 1;
466 int num_skip_non_prologue_insns
= 0;
467 const struct bfd_arch_info
*arch_info
= gdbarch_bfd_arch_info (current_gdbarch
);
469 /* Attempt to find the end of the prologue when no limit is specified.
470 Note that refine_prologue_limit() has been written so that it may
471 be used to "refine" the limits of non-zero PC values too, but this
472 is only safe if we 1) trust the line information provided by the
473 compiler and 2) iterate enough to actually find the end of the
476 It may become a good idea at some point (for both performance and
477 accuracy) to unconditionally call refine_prologue_limit(). But,
478 until we can make a clear determination that this is beneficial,
479 we'll play it safe and only use it to obtain a limit when none
480 has been specified. */
482 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
484 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
485 fdata
->saved_gpr
= -1;
486 fdata
->saved_fpr
= -1;
487 fdata
->saved_vr
= -1;
488 fdata
->saved_ev
= -1;
489 fdata
->alloca_reg
= -1;
490 fdata
->frameless
= 1;
491 fdata
->nosavedpc
= 1;
495 /* Sometimes it isn't clear if an instruction is a prologue
496 instruction or not. When we encounter one of these ambiguous
497 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
498 Otherwise, we'll assume that it really is a prologue instruction. */
499 if (prev_insn_was_prologue_insn
)
500 last_prologue_pc
= pc
;
502 /* Stop scanning if we've hit the limit. */
503 if (lim_pc
!= 0 && pc
>= lim_pc
)
506 prev_insn_was_prologue_insn
= 1;
508 /* Fetch the instruction and convert it to an integer. */
509 if (target_read_memory (pc
, buf
, 4))
511 op
= extract_signed_integer (buf
, 4);
513 if ((op
& 0xfc1fffff) == 0x7c0802a6)
515 lr_reg
= (op
& 0x03e00000) | 0x90010000;
519 else if ((op
& 0xfc1fffff) == 0x7c000026)
521 cr_reg
= (op
& 0x03e00000) | 0x90010000;
525 else if ((op
& 0xfc1f0000) == 0xd8010000)
526 { /* stfd Rx,NUM(r1) */
527 reg
= GET_SRC_REG (op
);
528 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
530 fdata
->saved_fpr
= reg
;
531 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
536 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
537 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
538 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
539 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
542 reg
= GET_SRC_REG (op
);
543 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
545 fdata
->saved_gpr
= reg
;
546 if ((op
& 0xfc1f0003) == 0xf8010000)
548 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
553 else if ((op
& 0xffff0000) == 0x60000000)
556 /* Allow nops in the prologue, but do not consider them to
557 be part of the prologue unless followed by other prologue
559 prev_insn_was_prologue_insn
= 0;
563 else if ((op
& 0xffff0000) == 0x3c000000)
564 { /* addis 0,0,NUM, used
566 fdata
->offset
= (op
& 0x0000ffff) << 16;
567 fdata
->frameless
= 0;
571 else if ((op
& 0xffff0000) == 0x60000000)
572 { /* ori 0,0,NUM, 2nd ha
573 lf of >= 32k frames */
574 fdata
->offset
|= (op
& 0x0000ffff);
575 fdata
->frameless
= 0;
579 else if (lr_reg
!= -1 && (op
& 0xffff0000) == lr_reg
)
582 fdata
->lr_offset
= SIGNED_SHORT (op
) + offset
;
583 fdata
->nosavedpc
= 0;
588 else if (cr_reg
!= -1 && (op
& 0xffff0000) == cr_reg
)
591 fdata
->cr_offset
= SIGNED_SHORT (op
) + offset
;
596 else if (op
== 0x48000005)
602 else if (op
== 0x48000004)
607 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
608 in V.4 -mminimal-toc */
609 (op
& 0xffff0000) == 0x3bde0000)
610 { /* addi 30,30,foo@l */
614 else if ((op
& 0xfc000001) == 0x48000001)
618 fdata
->frameless
= 0;
619 /* Don't skip over the subroutine call if it is not within
620 the first three instructions of the prologue. */
621 if ((pc
- orig_pc
) > 8)
624 op
= read_memory_integer (pc
+ 4, 4);
626 /* At this point, make sure this is not a trampoline
627 function (a function that simply calls another functions,
628 and nothing else). If the next is not a nop, this branch
629 was part of the function prologue. */
631 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
632 break; /* don't skip over
636 /* update stack pointer */
638 else if ((op
& 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
639 (op
& 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
641 fdata
->frameless
= 0;
642 if ((op
& 0xffff0003) == 0xf8210001)
644 fdata
->offset
= SIGNED_SHORT (op
);
645 offset
= fdata
->offset
;
649 else if (op
== 0x7c21016e)
651 fdata
->frameless
= 0;
652 offset
= fdata
->offset
;
655 /* Load up minimal toc pointer */
657 else if ((op
>> 22) == 0x20f
658 && !minimal_toc_loaded
)
659 { /* l r31,... or l r30,... */
660 minimal_toc_loaded
= 1;
663 /* move parameters from argument registers to local variable
666 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
667 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
668 (((op
>> 21) & 31) <= 10) &&
669 ((long) ((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
673 /* store parameters in stack */
675 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
676 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
677 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
681 /* store parameters in stack via frame pointer */
684 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
685 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
686 (op
& 0xfc1f0000) == 0xfc1f0000))
687 { /* frsp, fp?,NUM(r1) */
690 /* Set up frame pointer */
692 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
695 fdata
->frameless
= 0;
697 fdata
->alloca_reg
= 31;
700 /* Another way to set up the frame pointer. */
702 else if ((op
& 0xfc1fffff) == 0x38010000)
703 { /* addi rX, r1, 0x0 */
704 fdata
->frameless
= 0;
706 fdata
->alloca_reg
= (op
& ~0x38010000) >> 21;
709 /* AltiVec related instructions. */
710 /* Store the vrsave register (spr 256) in another register for
711 later manipulation, or load a register into the vrsave
712 register. 2 instructions are used: mfvrsave and
713 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
714 and mtspr SPR256, Rn. */
715 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
716 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
717 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
719 vrsave_reg
= GET_SRC_REG (op
);
722 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
726 /* Store the register where vrsave was saved to onto the stack:
727 rS is the register where vrsave was stored in a previous
729 /* 100100 sssss 00001 dddddddd dddddddd */
730 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
732 if (vrsave_reg
== GET_SRC_REG (op
))
734 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
739 /* Compute the new value of vrsave, by modifying the register
740 where vrsave was saved to. */
741 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
742 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
746 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
747 in a pair of insns to save the vector registers on the
749 /* 001110 00000 00000 iiii iiii iiii iiii */
750 /* 001110 01110 00000 iiii iiii iiii iiii */
751 else if ((op
& 0xffff0000) == 0x38000000 /* li r0, SIMM */
752 || (op
& 0xffff0000) == 0x39c00000) /* li r14, SIMM */
755 vr_saved_offset
= SIGNED_SHORT (op
);
757 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
758 /* 011111 sssss 11111 00000 00111001110 */
759 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
761 if (pc
== (li_found_pc
+ 4))
763 vr_reg
= GET_SRC_REG (op
);
764 /* If this is the first vector reg to be saved, or if
765 it has a lower number than others previously seen,
766 reupdate the frame info. */
767 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
769 fdata
->saved_vr
= vr_reg
;
770 fdata
->vr_offset
= vr_saved_offset
+ offset
;
772 vr_saved_offset
= -1;
777 /* End AltiVec related instructions. */
779 /* Start BookE related instructions. */
780 /* Store gen register S at (r31+uimm).
781 Any register less than r13 is volatile, so we don't care. */
782 /* 000100 sssss 11111 iiiii 01100100001 */
783 else if (arch_info
->mach
== bfd_mach_ppc_e500
784 && (op
& 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
786 if ((op
& 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
789 ev_reg
= GET_SRC_REG (op
);
790 imm
= (op
>> 11) & 0x1f;
792 /* If this is the first vector reg to be saved, or if
793 it has a lower number than others previously seen,
794 reupdate the frame info. */
795 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
797 fdata
->saved_ev
= ev_reg
;
798 fdata
->ev_offset
= ev_offset
+ offset
;
803 /* Store gen register rS at (r1+rB). */
804 /* 000100 sssss 00001 bbbbb 01100100000 */
805 else if (arch_info
->mach
== bfd_mach_ppc_e500
806 && (op
& 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
808 if (pc
== (li_found_pc
+ 4))
810 ev_reg
= GET_SRC_REG (op
);
811 /* If this is the first vector reg to be saved, or if
812 it has a lower number than others previously seen,
813 reupdate the frame info. */
814 /* We know the contents of rB from the previous instruction. */
815 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
817 fdata
->saved_ev
= ev_reg
;
818 fdata
->ev_offset
= vr_saved_offset
+ offset
;
820 vr_saved_offset
= -1;
826 /* Store gen register r31 at (rA+uimm). */
827 /* 000100 11111 aaaaa iiiii 01100100001 */
828 else if (arch_info
->mach
== bfd_mach_ppc_e500
829 && (op
& 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
831 /* Wwe know that the source register is 31 already, but
832 it can't hurt to compute it. */
833 ev_reg
= GET_SRC_REG (op
);
834 ev_offset
= ((op
>> 11) & 0x1f) * 8;
835 /* If this is the first vector reg to be saved, or if
836 it has a lower number than others previously seen,
837 reupdate the frame info. */
838 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
840 fdata
->saved_ev
= ev_reg
;
841 fdata
->ev_offset
= ev_offset
+ offset
;
846 /* Store gen register S at (r31+r0).
847 Store param on stack when offset from SP bigger than 4 bytes. */
848 /* 000100 sssss 11111 00000 01100100000 */
849 else if (arch_info
->mach
== bfd_mach_ppc_e500
850 && (op
& 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
852 if (pc
== (li_found_pc
+ 4))
854 if ((op
& 0x03e00000) >= 0x01a00000)
856 ev_reg
= GET_SRC_REG (op
);
857 /* If this is the first vector reg to be saved, or if
858 it has a lower number than others previously seen,
859 reupdate the frame info. */
860 /* We know the contents of r0 from the previous
862 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
864 fdata
->saved_ev
= ev_reg
;
865 fdata
->ev_offset
= vr_saved_offset
+ offset
;
869 vr_saved_offset
= -1;
874 /* End BookE related instructions. */
878 /* Not a recognized prologue instruction.
879 Handle optimizer code motions into the prologue by continuing
880 the search if we have no valid frame yet or if the return
881 address is not yet saved in the frame. */
882 if (fdata
->frameless
== 0
883 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
886 if (op
== 0x4e800020 /* blr */
887 || op
== 0x4e800420) /* bctr */
888 /* Do not scan past epilogue in frameless functions or
891 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
892 /* Never skip branches. */
895 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
896 /* Do not scan too many insns, scanning insns is expensive with
900 /* Continue scanning. */
901 prev_insn_was_prologue_insn
= 0;
907 /* I have problems with skipping over __main() that I need to address
908 * sometime. Previously, I used to use misc_function_vector which
909 * didn't work as well as I wanted to be. -MGO */
911 /* If the first thing after skipping a prolog is a branch to a function,
912 this might be a call to an initializer in main(), introduced by gcc2.
913 We'd like to skip over it as well. Fortunately, xlc does some extra
914 work before calling a function right after a prologue, thus we can
915 single out such gcc2 behaviour. */
918 if ((op
& 0xfc000001) == 0x48000001)
919 { /* bl foo, an initializer function? */
920 op
= read_memory_integer (pc
+ 4, 4);
922 if (op
== 0x4def7b82)
923 { /* cror 0xf, 0xf, 0xf (nop) */
925 /* Check and see if we are in main. If so, skip over this
926 initializer function as well. */
928 tmp
= find_pc_misc_function (pc
);
929 if (tmp
>= 0 && STREQ (misc_function_vector
[tmp
].name
, main_name ()))
935 fdata
->offset
= -fdata
->offset
;
936 return last_prologue_pc
;
940 /*************************************************************************
941 Support for creating pushing a dummy frame into the stack, and popping
943 *************************************************************************/
946 /* Pop the innermost frame, go back to the caller. */
949 rs6000_pop_frame (void)
951 CORE_ADDR pc
, lr
, sp
, prev_sp
, addr
; /* %pc, %lr, %sp */
952 struct rs6000_framedata fdata
;
953 struct frame_info
*frame
= get_current_frame ();
957 sp
= FRAME_FP (frame
);
959 if (PC_IN_CALL_DUMMY (frame
->pc
, frame
->frame
, frame
->frame
))
961 generic_pop_dummy_frame ();
962 flush_cached_frames ();
966 /* Make sure that all registers are valid. */
967 read_register_bytes (0, NULL
, REGISTER_BYTES
);
969 /* Figure out previous %pc value. If the function is frameless, it is
970 still in the link register, otherwise walk the frames and retrieve the
971 saved %pc value in the previous frame. */
973 addr
= get_pc_function_start (frame
->pc
);
974 (void) skip_prologue (addr
, frame
->pc
, &fdata
);
976 wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
980 prev_sp
= read_memory_addr (sp
, wordsize
);
981 if (fdata
.lr_offset
== 0)
982 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
984 lr
= read_memory_addr (prev_sp
+ fdata
.lr_offset
, wordsize
);
986 /* reset %pc value. */
987 write_register (PC_REGNUM
, lr
);
989 /* reset register values if any was saved earlier. */
991 if (fdata
.saved_gpr
!= -1)
993 addr
= prev_sp
+ fdata
.gpr_offset
;
994 for (ii
= fdata
.saved_gpr
; ii
<= 31; ++ii
)
996 read_memory (addr
, ®isters
[REGISTER_BYTE (ii
)], wordsize
);
1001 if (fdata
.saved_fpr
!= -1)
1003 addr
= prev_sp
+ fdata
.fpr_offset
;
1004 for (ii
= fdata
.saved_fpr
; ii
<= 31; ++ii
)
1006 read_memory (addr
, ®isters
[REGISTER_BYTE (ii
+ FP0_REGNUM
)], 8);
1011 write_register (SP_REGNUM
, prev_sp
);
1012 target_store_registers (-1);
1013 flush_cached_frames ();
1016 /* Fixup the call sequence of a dummy function, with the real function
1017 address. Its arguments will be passed by gdb. */
1020 rs6000_fix_call_dummy (char *dummyname
, CORE_ADDR pc
, CORE_ADDR fun
,
1021 int nargs
, struct value
**args
, struct type
*type
,
1025 CORE_ADDR target_addr
;
1027 if (rs6000_find_toc_address_hook
!= NULL
)
1029 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (fun
);
1030 write_register (gdbarch_tdep (current_gdbarch
)->ppc_toc_regnum
,
1035 /* All the ABI's require 16 byte alignment. */
1037 rs6000_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1039 return (addr
& -16);
1042 /* Pass the arguments in either registers, or in the stack. In RS/6000,
1043 the first eight words of the argument list (that might be less than
1044 eight parameters if some parameters occupy more than one word) are
1045 passed in r3..r10 registers. float and double parameters are
1046 passed in fpr's, in addition to that. Rest of the parameters if any
1047 are passed in user stack. There might be cases in which half of the
1048 parameter is copied into registers, the other half is pushed into
1051 Stack must be aligned on 64-bit boundaries when synthesizing
1054 If the function is returning a structure, then the return address is passed
1055 in r3, then the first 7 words of the parameters can be passed in registers,
1056 starting from r4. */
1059 rs6000_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1060 int struct_return
, CORE_ADDR struct_addr
)
1064 int argno
; /* current argument number */
1065 int argbytes
; /* current argument byte */
1066 char tmp_buffer
[50];
1067 int f_argno
= 0; /* current floating point argno */
1068 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1070 struct value
*arg
= 0;
1075 /* The first eight words of ther arguments are passed in registers.
1076 Copy them appropriately.
1078 If the function is returning a `struct', then the first word (which
1079 will be passed in r3) is used for struct return address. In that
1080 case we should advance one word and start from r4 register to copy
1083 ii
= struct_return
? 1 : 0;
1086 effectively indirect call... gcc does...
1088 return_val example( float, int);
1091 float in fp0, int in r3
1092 offset of stack on overflow 8/16
1093 for varargs, must go by type.
1095 float in r3&r4, int in r5
1096 offset of stack on overflow different
1098 return in r3 or f0. If no float, must study how gcc emulates floats;
1099 pay attention to arg promotion.
1100 User may have to cast\args to handle promotion correctly
1101 since gdb won't know if prototype supplied or not.
1104 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
1106 int reg_size
= REGISTER_RAW_SIZE (ii
+ 3);
1109 type
= check_typedef (VALUE_TYPE (arg
));
1110 len
= TYPE_LENGTH (type
);
1112 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1115 /* Floating point arguments are passed in fpr's, as well as gpr's.
1116 There are 13 fpr's reserved for passing parameters. At this point
1117 there is no way we would run out of them. */
1121 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1123 memcpy (®isters
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1124 VALUE_CONTENTS (arg
),
1132 /* Argument takes more than one register. */
1133 while (argbytes
< len
)
1135 memset (®isters
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1136 memcpy (®isters
[REGISTER_BYTE (ii
+ 3)],
1137 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1138 (len
- argbytes
) > reg_size
1139 ? reg_size
: len
- argbytes
);
1140 ++ii
, argbytes
+= reg_size
;
1143 goto ran_out_of_registers_for_arguments
;
1150 /* Argument can fit in one register. No problem. */
1151 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1152 memset (®isters
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1153 memcpy ((char *)®isters
[REGISTER_BYTE (ii
+ 3)] + adj
,
1154 VALUE_CONTENTS (arg
), len
);
1159 ran_out_of_registers_for_arguments
:
1161 saved_sp
= read_sp ();
1163 /* Location for 8 parameters are always reserved. */
1166 /* Another six words for back chain, TOC register, link register, etc. */
1169 /* Stack pointer must be quadword aligned. */
1172 /* If there are more arguments, allocate space for them in
1173 the stack, then push them starting from the ninth one. */
1175 if ((argno
< nargs
) || argbytes
)
1181 space
+= ((len
- argbytes
+ 3) & -4);
1187 for (; jj
< nargs
; ++jj
)
1189 struct value
*val
= args
[jj
];
1190 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1193 /* Add location required for the rest of the parameters. */
1194 space
= (space
+ 15) & -16;
1197 /* This is another instance we need to be concerned about
1198 securing our stack space. If we write anything underneath %sp
1199 (r1), we might conflict with the kernel who thinks he is free
1200 to use this area. So, update %sp first before doing anything
1203 write_register (SP_REGNUM
, sp
);
1205 /* If the last argument copied into the registers didn't fit there
1206 completely, push the rest of it into stack. */
1210 write_memory (sp
+ 24 + (ii
* 4),
1211 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1214 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1217 /* Push the rest of the arguments into stack. */
1218 for (; argno
< nargs
; ++argno
)
1222 type
= check_typedef (VALUE_TYPE (arg
));
1223 len
= TYPE_LENGTH (type
);
1226 /* Float types should be passed in fpr's, as well as in the
1228 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1233 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1235 memcpy (®isters
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1236 VALUE_CONTENTS (arg
),
1241 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1242 ii
+= ((len
+ 3) & -4) / 4;
1246 /* Secure stack areas first, before doing anything else. */
1247 write_register (SP_REGNUM
, sp
);
1249 /* set back chain properly */
1250 store_address (tmp_buffer
, 4, saved_sp
);
1251 write_memory (sp
, tmp_buffer
, 4);
1253 target_store_registers (-1);
1257 /* Function: ppc_push_return_address (pc, sp)
1258 Set up the return address for the inferior function call. */
1261 ppc_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1263 write_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
,
1264 CALL_DUMMY_ADDRESS ());
1268 /* Extract a function return value of type TYPE from raw register array
1269 REGBUF, and copy that return value into VALBUF in virtual format. */
1271 e500_extract_return_value (struct type
*valtype
, struct regcache
*regbuf
, void *valbuf
)
1274 int vallen
= TYPE_LENGTH (valtype
);
1275 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1277 if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1279 && TYPE_VECTOR (valtype
))
1281 regcache_raw_read (regbuf
, tdep
->ppc_ev0_regnum
+ 3, valbuf
);
1285 /* Return value is copied starting from r3. Note that r3 for us
1286 is a pseudo register. */
1288 int return_regnum
= tdep
->ppc_gp0_regnum
+ 3;
1289 int reg_size
= REGISTER_RAW_SIZE (return_regnum
);
1295 /* Compute where we will start storing the value from. */
1296 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1298 if (vallen
<= reg_size
)
1299 offset
= reg_size
- vallen
;
1301 offset
= reg_size
+ (reg_size
- vallen
);
1304 /* How big does the local buffer need to be? */
1305 if (vallen
<= reg_size
)
1306 val_buffer
= alloca (reg_size
);
1308 val_buffer
= alloca (vallen
);
1310 /* Read all we need into our private buffer. We copy it in
1311 chunks that are as long as one register, never shorter, even
1312 if the value is smaller than the register. */
1313 while (copied
< vallen
)
1315 reg_part_size
= REGISTER_RAW_SIZE (return_regnum
+ i
);
1316 /* It is a pseudo/cooked register. */
1317 regcache_cooked_read (regbuf
, return_regnum
+ i
,
1318 val_buffer
+ copied
);
1319 copied
+= reg_part_size
;
1322 /* Put the stuff in the return buffer. */
1323 memcpy (valbuf
, val_buffer
+ offset
, vallen
);
1328 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1331 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1333 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1338 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1339 We need to truncate the return value into float size (4 byte) if
1342 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1344 ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)],
1345 TYPE_LENGTH (valtype
));
1348 memcpy (&dd
, ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1350 memcpy (valbuf
, &ff
, sizeof (float));
1353 else if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1354 && TYPE_LENGTH (valtype
) == 16
1355 && TYPE_VECTOR (valtype
))
1357 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1358 TYPE_LENGTH (valtype
));
1362 /* return value is copied starting from r3. */
1363 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1364 && TYPE_LENGTH (valtype
) < REGISTER_RAW_SIZE (3))
1365 offset
= REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1368 regbuf
+ REGISTER_BYTE (3) + offset
,
1369 TYPE_LENGTH (valtype
));
1373 /* Return whether handle_inferior_event() should proceed through code
1374 starting at PC in function NAME when stepping.
1376 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1377 handle memory references that are too distant to fit in instructions
1378 generated by the compiler. For example, if 'foo' in the following
1383 is greater than 32767, the linker might replace the lwz with a branch to
1384 somewhere in @FIX1 that does the load in 2 instructions and then branches
1385 back to where execution should continue.
1387 GDB should silently step over @FIX code, just like AIX dbx does.
1388 Unfortunately, the linker uses the "b" instruction for the branches,
1389 meaning that the link register doesn't get set. Therefore, GDB's usual
1390 step_over_function() mechanism won't work.
1392 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1393 in handle_inferior_event() to skip past @FIX code. */
1396 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1398 return name
&& !strncmp (name
, "@FIX", 4);
1401 /* Skip code that the user doesn't want to see when stepping:
1403 1. Indirect function calls use a piece of trampoline code to do context
1404 switching, i.e. to set the new TOC table. Skip such code if we are on
1405 its first instruction (as when we have single-stepped to here).
1407 2. Skip shared library trampoline code (which is different from
1408 indirect function call trampolines).
1410 3. Skip bigtoc fixup code.
1412 Result is desired PC to step until, or NULL if we are not in
1413 code that should be skipped. */
1416 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1418 register unsigned int ii
, op
;
1420 CORE_ADDR solib_target_pc
;
1421 struct minimal_symbol
*msymbol
;
1423 static unsigned trampoline_code
[] =
1425 0x800b0000, /* l r0,0x0(r11) */
1426 0x90410014, /* st r2,0x14(r1) */
1427 0x7c0903a6, /* mtctr r0 */
1428 0x804b0004, /* l r2,0x4(r11) */
1429 0x816b0008, /* l r11,0x8(r11) */
1430 0x4e800420, /* bctr */
1431 0x4e800020, /* br */
1435 /* Check for bigtoc fixup code. */
1436 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1437 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, SYMBOL_NAME (msymbol
)))
1439 /* Double-check that the third instruction from PC is relative "b". */
1440 op
= read_memory_integer (pc
+ 8, 4);
1441 if ((op
& 0xfc000003) == 0x48000000)
1443 /* Extract bits 6-29 as a signed 24-bit relative word address and
1444 add it to the containing PC. */
1445 rel
= ((int)(op
<< 6) >> 6);
1446 return pc
+ 8 + rel
;
1450 /* If pc is in a shared library trampoline, return its target. */
1451 solib_target_pc
= find_solib_trampoline_target (pc
);
1452 if (solib_target_pc
)
1453 return solib_target_pc
;
1455 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1457 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1458 if (op
!= trampoline_code
[ii
])
1461 ii
= read_register (11); /* r11 holds destination addr */
1462 pc
= read_memory_addr (ii
, gdbarch_tdep (current_gdbarch
)->wordsize
); /* (r11) value */
1466 /* Determines whether the function FI has a frame on the stack or not. */
1469 rs6000_frameless_function_invocation (struct frame_info
*fi
)
1471 CORE_ADDR func_start
;
1472 struct rs6000_framedata fdata
;
1474 /* Don't even think about framelessness except on the innermost frame
1475 or if the function was interrupted by a signal. */
1476 if (fi
->next
!= NULL
&& !fi
->next
->signal_handler_caller
)
1479 func_start
= get_pc_function_start (fi
->pc
);
1481 /* If we failed to find the start of the function, it is a mistake
1482 to inspect the instructions. */
1486 /* A frame with a zero PC is usually created by dereferencing a NULL
1487 function pointer, normally causing an immediate core dump of the
1488 inferior. Mark function as frameless, as the inferior has no chance
1489 of setting up a stack frame. */
1496 (void) skip_prologue (func_start
, fi
->pc
, &fdata
);
1497 return fdata
.frameless
;
1500 /* Return the PC saved in a frame. */
1503 rs6000_frame_saved_pc (struct frame_info
*fi
)
1505 CORE_ADDR func_start
;
1506 struct rs6000_framedata fdata
;
1507 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1508 int wordsize
= tdep
->wordsize
;
1510 if (fi
->signal_handler_caller
)
1511 return read_memory_addr (fi
->frame
+ SIG_FRAME_PC_OFFSET
, wordsize
);
1513 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1514 return deprecated_read_register_dummy (fi
->pc
, fi
->frame
, PC_REGNUM
);
1516 func_start
= get_pc_function_start (fi
->pc
);
1518 /* If we failed to find the start of the function, it is a mistake
1519 to inspect the instructions. */
1523 (void) skip_prologue (func_start
, fi
->pc
, &fdata
);
1525 if (fdata
.lr_offset
== 0 && fi
->next
!= NULL
)
1527 if (fi
->next
->signal_handler_caller
)
1528 return read_memory_addr (fi
->next
->frame
+ SIG_FRAME_LR_OFFSET
,
1530 else if (PC_IN_CALL_DUMMY (get_next_frame (fi
)->pc
, 0, 0))
1531 /* The link register wasn't saved by this frame and the next
1532 (inner, newer) frame is a dummy. Get the link register
1533 value by unwinding it from that [dummy] frame. */
1536 frame_unwind_unsigned_register (get_next_frame (fi
),
1537 tdep
->ppc_lr_regnum
, &lr
);
1541 return read_memory_addr (FRAME_CHAIN (fi
) + tdep
->lr_frame_offset
,
1545 if (fdata
.lr_offset
== 0)
1546 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1548 return read_memory_addr (FRAME_CHAIN (fi
) + fdata
.lr_offset
, wordsize
);
1551 /* If saved registers of frame FI are not known yet, read and cache them.
1552 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1553 in which case the framedata are read. */
1556 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1558 CORE_ADDR frame_addr
;
1559 struct rs6000_framedata work_fdata
;
1560 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1561 int wordsize
= tdep
->wordsize
;
1568 fdatap
= &work_fdata
;
1569 (void) skip_prologue (get_pc_function_start (fi
->pc
), fi
->pc
, fdatap
);
1572 frame_saved_regs_zalloc (fi
);
1574 /* If there were any saved registers, figure out parent's stack
1576 /* The following is true only if the frame doesn't have a call to
1579 if (fdatap
->saved_fpr
== 0
1580 && fdatap
->saved_gpr
== 0
1581 && fdatap
->saved_vr
== 0
1582 && fdatap
->saved_ev
== 0
1583 && fdatap
->lr_offset
== 0
1584 && fdatap
->cr_offset
== 0
1585 && fdatap
->vr_offset
== 0
1586 && fdatap
->ev_offset
== 0)
1589 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1590 address of the current frame. Things might be easier if the
1591 ->frame pointed to the outer-most address of the frame. In the
1592 mean time, the address of the prev frame is used as the base
1593 address of this frame. */
1594 frame_addr
= FRAME_CHAIN (fi
);
1596 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1597 All fpr's from saved_fpr to fp31 are saved. */
1599 if (fdatap
->saved_fpr
>= 0)
1602 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1603 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1605 fi
->saved_regs
[FP0_REGNUM
+ i
] = fpr_addr
;
1610 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1611 All gpr's from saved_gpr to gpr31 are saved. */
1613 if (fdatap
->saved_gpr
>= 0)
1616 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1617 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1619 fi
->saved_regs
[i
] = gpr_addr
;
1620 gpr_addr
+= wordsize
;
1624 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1625 All vr's from saved_vr to vr31 are saved. */
1626 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1628 if (fdatap
->saved_vr
>= 0)
1631 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1632 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1634 fi
->saved_regs
[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1635 vr_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1640 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1641 All vr's from saved_ev to ev31 are saved. ????? */
1642 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
1644 if (fdatap
->saved_ev
>= 0)
1647 CORE_ADDR ev_addr
= frame_addr
+ fdatap
->ev_offset
;
1648 for (i
= fdatap
->saved_ev
; i
< 32; i
++)
1650 fi
->saved_regs
[tdep
->ppc_ev0_regnum
+ i
] = ev_addr
;
1651 fi
->saved_regs
[tdep
->ppc_gp0_regnum
+ i
] = ev_addr
+ 4;
1652 ev_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_ev0_regnum
);
1657 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1659 if (fdatap
->cr_offset
!= 0)
1660 fi
->saved_regs
[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1662 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1664 if (fdatap
->lr_offset
!= 0)
1665 fi
->saved_regs
[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1667 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1669 if (fdatap
->vrsave_offset
!= 0)
1670 fi
->saved_regs
[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1673 /* Return the address of a frame. This is the inital %sp value when the frame
1674 was first allocated. For functions calling alloca(), it might be saved in
1675 an alloca register. */
1678 frame_initial_stack_address (struct frame_info
*fi
)
1681 struct rs6000_framedata fdata
;
1682 struct frame_info
*callee_fi
;
1684 /* If the initial stack pointer (frame address) of this frame is known,
1687 if (fi
->extra_info
->initial_sp
)
1688 return fi
->extra_info
->initial_sp
;
1690 /* Find out if this function is using an alloca register. */
1692 (void) skip_prologue (get_pc_function_start (fi
->pc
), fi
->pc
, &fdata
);
1694 /* If saved registers of this frame are not known yet, read and
1697 if (!fi
->saved_regs
)
1698 frame_get_saved_regs (fi
, &fdata
);
1700 /* If no alloca register used, then fi->frame is the value of the %sp for
1701 this frame, and it is good enough. */
1703 if (fdata
.alloca_reg
< 0)
1705 fi
->extra_info
->initial_sp
= fi
->frame
;
1706 return fi
->extra_info
->initial_sp
;
1709 /* There is an alloca register, use its value, in the current frame,
1710 as the initial stack pointer. */
1712 char *tmpbuf
= alloca (MAX_REGISTER_RAW_SIZE
);
1713 if (frame_register_read (fi
, fdata
.alloca_reg
, tmpbuf
))
1715 fi
->extra_info
->initial_sp
1716 = extract_unsigned_integer (tmpbuf
,
1717 REGISTER_RAW_SIZE (fdata
.alloca_reg
));
1720 /* NOTE: cagney/2002-04-17: At present the only time
1721 frame_register_read will fail is when the register isn't
1722 available. If that does happen, use the frame. */
1723 fi
->extra_info
->initial_sp
= fi
->frame
;
1725 return fi
->extra_info
->initial_sp
;
1728 /* Describe the pointer in each stack frame to the previous stack frame
1731 /* FRAME_CHAIN takes a frame's nominal address
1732 and produces the frame's chain-pointer. */
1734 /* In the case of the RS/6000, the frame's nominal address
1735 is the address of a 4-byte word containing the calling frame's address. */
1738 rs6000_frame_chain (struct frame_info
*thisframe
)
1740 CORE_ADDR fp
, fpp
, lr
;
1741 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1743 if (PC_IN_CALL_DUMMY (thisframe
->pc
, thisframe
->frame
, thisframe
->frame
))
1744 /* A dummy frame always correctly chains back to the previous
1746 return read_memory_addr ((thisframe
)->frame
, wordsize
);
1748 if (inside_entry_file (thisframe
->pc
) ||
1749 thisframe
->pc
== entry_point_address ())
1752 if (thisframe
->signal_handler_caller
)
1753 fp
= read_memory_addr (thisframe
->frame
+ SIG_FRAME_FP_OFFSET
,
1755 else if (thisframe
->next
!= NULL
1756 && thisframe
->next
->signal_handler_caller
1757 && FRAMELESS_FUNCTION_INVOCATION (thisframe
))
1758 /* A frameless function interrupted by a signal did not change the
1760 fp
= FRAME_FP (thisframe
);
1762 fp
= read_memory_addr ((thisframe
)->frame
, wordsize
);
1766 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1767 isn't available with that word size, return 0. */
1770 regsize (const struct reg
*reg
, int wordsize
)
1772 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1775 /* Return the name of register number N, or null if no such register exists
1776 in the current architecture. */
1779 rs6000_register_name (int n
)
1781 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1782 const struct reg
*reg
= tdep
->regs
+ n
;
1784 if (!regsize (reg
, tdep
->wordsize
))
1789 /* Index within `registers' of the first byte of the space for
1793 rs6000_register_byte (int n
)
1795 return gdbarch_tdep (current_gdbarch
)->regoff
[n
];
1798 /* Return the number of bytes of storage in the actual machine representation
1799 for register N if that register is available, else return 0. */
1802 rs6000_register_raw_size (int n
)
1804 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1805 const struct reg
*reg
= tdep
->regs
+ n
;
1806 return regsize (reg
, tdep
->wordsize
);
1809 /* Return the GDB type object for the "standard" data type
1810 of data in register N. */
1812 static struct type
*
1813 rs6000_register_virtual_type (int n
)
1815 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1816 const struct reg
*reg
= tdep
->regs
+ n
;
1819 return builtin_type_double
;
1822 int size
= regsize (reg
, tdep
->wordsize
);
1826 if (tdep
->ppc_ev0_regnum
<= n
&& n
<= tdep
->ppc_ev31_regnum
)
1827 return builtin_type_vec64
;
1829 return builtin_type_int64
;
1832 return builtin_type_vec128
;
1835 return builtin_type_int32
;
1841 /* For the PowerPC, it appears that the debug info marks float parameters as
1842 floats regardless of whether the function is prototyped, but the actual
1843 values are always passed in as doubles. Tell gdb to always assume that
1844 floats are passed as doubles and then converted in the callee. */
1847 rs6000_coerce_float_to_double (struct type
*formal
, struct type
*actual
)
1852 /* Return whether register N requires conversion when moving from raw format
1855 The register format for RS/6000 floating point registers is always
1856 double, we need a conversion if the memory format is float. */
1859 rs6000_register_convertible (int n
)
1861 const struct reg
*reg
= gdbarch_tdep (current_gdbarch
)->regs
+ n
;
1865 /* Convert data from raw format for register N in buffer FROM
1866 to virtual format with type TYPE in buffer TO. */
1869 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1870 char *from
, char *to
)
1872 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1874 double val
= extract_floating (from
, REGISTER_RAW_SIZE (n
));
1875 store_floating (to
, TYPE_LENGTH (type
), val
);
1878 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1881 /* Convert data from virtual format with type TYPE in buffer FROM
1882 to raw format for register N in buffer TO. */
1885 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1886 char *from
, char *to
)
1888 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1890 double val
= extract_floating (from
, TYPE_LENGTH (type
));
1891 store_floating (to
, REGISTER_RAW_SIZE (n
), val
);
1894 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1898 e500_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1899 int reg_nr
, void *buffer
)
1903 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1904 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1906 if (reg_nr
>= tdep
->ppc_gp0_regnum
1907 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1909 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1911 /* Build the value in the provided buffer. */
1912 /* Read the raw register of which this one is the lower portion. */
1913 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1914 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1916 memcpy ((char *) buffer
, temp_buffer
+ offset
, 4);
1921 e500_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1922 int reg_nr
, const void *buffer
)
1926 char *temp_buffer
= (char*) alloca (MAX_REGISTER_RAW_SIZE
);
1927 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1929 if (reg_nr
>= tdep
->ppc_gp0_regnum
1930 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1932 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1933 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1934 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1937 /* Let's read the value of the base register into a temporary
1938 buffer, so that overwriting the last four bytes with the new
1939 value of the pseudo will leave the upper 4 bytes unchanged. */
1940 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1942 /* Write as an 8 byte quantity. */
1943 memcpy (temp_buffer
+ offset
, (char *) buffer
, 4);
1944 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
1948 /* Convert a dwarf2 register number to a gdb REGNUM. */
1950 e500_dwarf2_reg_to_regnum (int num
)
1953 if (0 <= num
&& num
<= 31)
1954 return num
+ gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
;
1959 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1962 rs6000_stab_reg_to_regnum (int num
)
1968 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
1971 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
1974 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
1977 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
1986 /* Store the address of the place in which to copy the structure the
1987 subroutine will return. */
1990 rs6000_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1992 write_register (3, addr
);
1995 /* Write into appropriate registers a function return value
1996 of type TYPE, given in virtual format. */
1998 e500_store_return_value (struct type
*type
, char *valbuf
)
2000 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2002 /* Everything is returned in GPR3 and up. */
2005 int len
= TYPE_LENGTH (type
);
2006 while (copied
< len
)
2008 int regnum
= gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3 + i
;
2009 int reg_size
= REGISTER_RAW_SIZE (regnum
);
2010 char *reg_val_buf
= alloca (reg_size
);
2012 memcpy (reg_val_buf
, valbuf
+ copied
, reg_size
);
2014 write_register_gen (regnum
, reg_val_buf
);
2020 rs6000_store_return_value (struct type
*type
, char *valbuf
)
2022 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2024 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2026 /* Floating point values are returned starting from FPR1 and up.
2027 Say a double_double_double type could be returned in
2028 FPR1/FPR2/FPR3 triple. */
2030 write_register_bytes (REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
2031 TYPE_LENGTH (type
));
2032 else if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
2034 if (TYPE_LENGTH (type
) == 16
2035 && TYPE_VECTOR (type
))
2036 write_register_bytes (REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
2037 valbuf
, TYPE_LENGTH (type
));
2040 /* Everything else is returned in GPR3 and up. */
2041 write_register_bytes (REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
2042 valbuf
, TYPE_LENGTH (type
));
2045 /* Extract from an array REGBUF containing the (raw) register state
2046 the address in which a function should return its structure value,
2047 as a CORE_ADDR (or an expression that can be used as one). */
2050 rs6000_extract_struct_value_address (struct regcache
*regcache
)
2052 /* FIXME: cagney/2002-09-26: PR gdb/724: When making an inferior
2053 function call GDB knows the address of the struct return value
2054 and hence, should not need to call this function. Unfortunately,
2055 the current hand_function_call() code only saves the most recent
2056 struct address leading to occasional calls. The code should
2057 instead maintain a stack of such addresses (in the dummy frame
2059 /* NOTE: cagney/2002-09-26: Return 0 which indicates that we've
2060 really got no idea where the return value is being stored. While
2061 r3, on function entry, contained the address it will have since
2062 been reused (scratch) and hence wouldn't be valid */
2066 /* Return whether PC is in a dummy function call.
2068 FIXME: This just checks for the end of the stack, which is broken
2069 for things like stepping through gcc nested function stubs. */
2072 rs6000_pc_in_call_dummy (CORE_ADDR pc
, CORE_ADDR sp
, CORE_ADDR fp
)
2074 return sp
< pc
&& pc
< fp
;
2077 /* Hook called when a new child process is started. */
2080 rs6000_create_inferior (int pid
)
2082 if (rs6000_set_host_arch_hook
)
2083 rs6000_set_host_arch_hook (pid
);
2086 /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
2088 Usually a function pointer's representation is simply the address
2089 of the function. On the RS/6000 however, a function pointer is
2090 represented by a pointer to a TOC entry. This TOC entry contains
2091 three words, the first word is the address of the function, the
2092 second word is the TOC pointer (r2), and the third word is the
2093 static chain value. Throughout GDB it is currently assumed that a
2094 function pointer contains the address of the function, which is not
2095 easy to fix. In addition, the conversion of a function address to
2096 a function pointer would require allocation of a TOC entry in the
2097 inferior's memory space, with all its drawbacks. To be able to
2098 call C++ virtual methods in the inferior (which are called via
2099 function pointers), find_function_addr uses this function to get the
2100 function address from a function pointer. */
2102 /* Return real function address if ADDR (a function pointer) is in the data
2103 space and is therefore a special function pointer. */
2106 rs6000_convert_from_func_ptr_addr (CORE_ADDR addr
)
2108 struct obj_section
*s
;
2110 s
= find_pc_section (addr
);
2111 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
2114 /* ADDR is in the data space, so it's a special function pointer. */
2115 return read_memory_addr (addr
, gdbarch_tdep (current_gdbarch
)->wordsize
);
2119 /* Handling the various POWER/PowerPC variants. */
2122 /* The arrays here called registers_MUMBLE hold information about available
2125 For each family of PPC variants, I've tried to isolate out the
2126 common registers and put them up front, so that as long as you get
2127 the general family right, GDB will correctly identify the registers
2128 common to that family. The common register sets are:
2130 For the 60x family: hid0 hid1 iabr dabr pir
2132 For the 505 and 860 family: eie eid nri
2134 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
2135 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
2138 Most of these register groups aren't anything formal. I arrived at
2139 them by looking at the registers that occurred in more than one
2142 Note: kevinb/2002-04-30: Support for the fpscr register was added
2143 during April, 2002. Slot 70 is being used for PowerPC and slot 71
2144 for Power. For PowerPC, slot 70 was unused and was already in the
2145 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
2146 slot 70 was being used for "mq", so the next available slot (71)
2147 was chosen. It would have been nice to be able to make the
2148 register numbers the same across processor cores, but this wasn't
2149 possible without either 1) renumbering some registers for some
2150 processors or 2) assigning fpscr to a really high slot that's
2151 larger than any current register number. Doing (1) is bad because
2152 existing stubs would break. Doing (2) is undesirable because it
2153 would introduce a really large gap between fpscr and the rest of
2154 the registers for most processors. */
2156 /* Convenience macros for populating register arrays. */
2158 /* Within another macro, convert S to a string. */
2162 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
2163 and 64 bits on 64-bit systems. */
2164 #define R(name) { STR(name), 4, 8, 0, 0 }
2166 /* Return a struct reg defining register NAME that's 32 bits on all
2168 #define R4(name) { STR(name), 4, 4, 0, 0 }
2170 /* Return a struct reg defining register NAME that's 64 bits on all
2172 #define R8(name) { STR(name), 8, 8, 0, 0 }
2174 /* Return a struct reg defining register NAME that's 128 bits on all
2176 #define R16(name) { STR(name), 16, 16, 0, 0 }
2178 /* Return a struct reg defining floating-point register NAME. */
2179 #define F(name) { STR(name), 8, 8, 1, 0 }
2181 /* Return a struct reg defining a pseudo register NAME. */
2182 #define P(name) { STR(name), 4, 8, 0, 1}
2184 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
2185 systems and that doesn't exist on 64-bit systems. */
2186 #define R32(name) { STR(name), 4, 0, 0, 0 }
2188 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
2189 systems and that doesn't exist on 32-bit systems. */
2190 #define R64(name) { STR(name), 0, 8, 0, 0 }
2192 /* Return a struct reg placeholder for a register that doesn't exist. */
2193 #define R0 { 0, 0, 0, 0, 0 }
2195 /* UISA registers common across all architectures, including POWER. */
2197 #define COMMON_UISA_REGS \
2198 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2199 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2200 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2201 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2202 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
2203 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
2204 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
2205 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
2206 /* 64 */ R(pc), R(ps)
2208 #define COMMON_UISA_NOFP_REGS \
2209 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2210 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2211 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2212 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2213 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2214 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2215 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2216 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2217 /* 64 */ R(pc), R(ps)
2219 /* UISA-level SPRs for PowerPC. */
2220 #define PPC_UISA_SPRS \
2221 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
2223 /* UISA-level SPRs for PowerPC without floating point support. */
2224 #define PPC_UISA_NOFP_SPRS \
2225 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
2227 /* Segment registers, for PowerPC. */
2228 #define PPC_SEGMENT_REGS \
2229 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2230 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2231 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2232 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2234 /* OEA SPRs for PowerPC. */
2235 #define PPC_OEA_SPRS \
2237 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2238 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2239 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2240 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2241 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2242 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2243 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2244 /* 116 */ R4(dec), R(dabr), R4(ear)
2246 /* AltiVec registers. */
2247 #define PPC_ALTIVEC_REGS \
2248 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2249 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2250 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2251 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2252 /*151*/R4(vscr), R4(vrsave)
2254 /* Vectors of hi-lo general purpose registers. */
2255 #define PPC_EV_REGS \
2256 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
2257 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
2258 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
2259 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2261 /* Lower half of the EV registers. */
2262 #define PPC_GPRS_PSEUDO_REGS \
2263 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2264 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2265 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2266 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31), \
2268 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2269 user-level SPR's. */
2270 static const struct reg registers_power
[] =
2273 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
2277 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2278 view of the PowerPC. */
2279 static const struct reg registers_powerpc
[] =
2286 /* PowerPC UISA - a PPC processor as viewed by user-level
2287 code, but without floating point registers. */
2288 static const struct reg registers_powerpc_nofp
[] =
2290 COMMON_UISA_NOFP_REGS
,
2294 /* IBM PowerPC 403. */
2295 static const struct reg registers_403
[] =
2301 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2302 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2303 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2304 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2305 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2306 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
2309 /* IBM PowerPC 403GC. */
2310 static const struct reg registers_403GC
[] =
2316 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2317 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2318 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2319 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2320 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2321 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2322 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2323 /* 147 */ R(tbhu
), R(tblu
)
2326 /* Motorola PowerPC 505. */
2327 static const struct reg registers_505
[] =
2333 /* 119 */ R(eie
), R(eid
), R(nri
)
2336 /* Motorola PowerPC 860 or 850. */
2337 static const struct reg registers_860
[] =
2343 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2344 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2345 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2346 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2347 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2348 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2349 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2350 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2351 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2352 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2353 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2354 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2357 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2358 for reading and writing RTCU and RTCL. However, how one reads and writes a
2359 register is the stub's problem. */
2360 static const struct reg registers_601
[] =
2366 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2367 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2370 /* Motorola PowerPC 602. */
2371 static const struct reg registers_602
[] =
2377 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2378 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2379 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2382 /* Motorola/IBM PowerPC 603 or 603e. */
2383 static const struct reg registers_603
[] =
2389 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2390 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2391 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2394 /* Motorola PowerPC 604 or 604e. */
2395 static const struct reg registers_604
[] =
2401 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2402 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2403 /* 127 */ R(sia
), R(sda
)
2406 /* Motorola/IBM PowerPC 750 or 740. */
2407 static const struct reg registers_750
[] =
2413 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2414 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2415 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2416 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2417 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2418 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2422 /* Motorola PowerPC 7400. */
2423 static const struct reg registers_7400
[] =
2425 /* gpr0-gpr31, fpr0-fpr31 */
2427 /* ctr, xre, lr, cr */
2432 /* vr0-vr31, vrsave, vscr */
2434 /* FIXME? Add more registers? */
2437 /* Motorola e500. */
2438 static const struct reg registers_e500
[] =
2441 /* cr, lr, ctr, xer, "" */
2446 PPC_GPRS_PSEUDO_REGS
2449 /* Information about a particular processor variant. */
2453 /* Name of this variant. */
2456 /* English description of the variant. */
2459 /* bfd_arch_info.arch corresponding to variant. */
2460 enum bfd_architecture arch
;
2462 /* bfd_arch_info.mach corresponding to variant. */
2465 /* Number of real registers. */
2468 /* Number of pseudo registers. */
2471 /* Number of total registers (the sum of nregs and npregs). */
2474 /* Table of register names; registers[R] is the name of the register
2476 const struct reg
*regs
;
2479 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2482 num_registers (const struct reg
*reg_list
, int num_tot_regs
)
2487 for (i
= 0; i
< num_tot_regs
; i
++)
2488 if (!reg_list
[i
].pseudo
)
2495 num_pseudo_registers (const struct reg
*reg_list
, int num_tot_regs
)
2500 for (i
= 0; i
< num_tot_regs
; i
++)
2501 if (reg_list
[i
].pseudo
)
2507 /* Information in this table comes from the following web sites:
2508 IBM: http://www.chips.ibm.com:80/products/embedded/
2509 Motorola: http://www.mot.com/SPS/PowerPC/
2511 I'm sure I've got some of the variant descriptions not quite right.
2512 Please report any inaccuracies you find to GDB's maintainer.
2514 If you add entries to this table, please be sure to allow the new
2515 value as an argument to the --with-cpu flag, in configure.in. */
2517 static struct variant variants
[] =
2520 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2521 bfd_mach_ppc
, -1, -1, tot_num_registers (registers_powerpc
),
2523 {"power", "POWER user-level", bfd_arch_rs6000
,
2524 bfd_mach_rs6k
, -1, -1, tot_num_registers (registers_power
),
2526 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2527 bfd_mach_ppc_403
, -1, -1, tot_num_registers (registers_403
),
2529 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2530 bfd_mach_ppc_601
, -1, -1, tot_num_registers (registers_601
),
2532 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2533 bfd_mach_ppc_602
, -1, -1, tot_num_registers (registers_602
),
2535 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2536 bfd_mach_ppc_603
, -1, -1, tot_num_registers (registers_603
),
2538 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2539 604, -1, -1, tot_num_registers (registers_604
),
2541 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2542 bfd_mach_ppc_403gc
, -1, -1, tot_num_registers (registers_403GC
),
2544 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2545 bfd_mach_ppc_505
, -1, -1, tot_num_registers (registers_505
),
2547 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2548 bfd_mach_ppc_860
, -1, -1, tot_num_registers (registers_860
),
2550 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2551 bfd_mach_ppc_750
, -1, -1, tot_num_registers (registers_750
),
2553 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2554 bfd_mach_ppc_7400
, -1, -1, tot_num_registers (registers_7400
),
2556 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc
,
2557 bfd_mach_ppc_e500
, -1, -1, tot_num_registers (registers_e500
),
2561 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2562 bfd_mach_ppc64
, -1, -1, tot_num_registers (registers_powerpc
),
2564 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2565 bfd_mach_ppc_620
, -1, -1, tot_num_registers (registers_powerpc
),
2567 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2568 bfd_mach_ppc_630
, -1, -1, tot_num_registers (registers_powerpc
),
2570 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2571 bfd_mach_ppc_a35
, -1, -1, tot_num_registers (registers_powerpc
),
2573 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2574 bfd_mach_ppc_rs64ii
, -1, -1, tot_num_registers (registers_powerpc
),
2576 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2577 bfd_mach_ppc_rs64iii
, -1, -1, tot_num_registers (registers_powerpc
),
2580 /* FIXME: I haven't checked the register sets of the following. */
2581 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2582 bfd_mach_rs6k_rs1
, -1, -1, tot_num_registers (registers_power
),
2584 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2585 bfd_mach_rs6k_rsc
, -1, -1, tot_num_registers (registers_power
),
2587 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2588 bfd_mach_rs6k_rs2
, -1, -1, tot_num_registers (registers_power
),
2591 {0, 0, 0, 0, 0, 0, 0, 0}
2594 /* Initialize the number of registers and pseudo registers in each variant. */
2597 init_variants (void)
2601 for (v
= variants
; v
->name
; v
++)
2604 v
->nregs
= num_registers (v
->regs
, v
->num_tot_regs
);
2605 if (v
->npregs
== -1)
2606 v
->npregs
= num_pseudo_registers (v
->regs
, v
->num_tot_regs
);
2610 /* Return the variant corresponding to architecture ARCH and machine number
2611 MACH. If no such variant exists, return null. */
2613 static const struct variant
*
2614 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2616 const struct variant
*v
;
2618 for (v
= variants
; v
->name
; v
++)
2619 if (arch
== v
->arch
&& mach
== v
->mach
)
2626 gdb_print_insn_powerpc (bfd_vma memaddr
, disassemble_info
*info
)
2628 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2629 return print_insn_big_powerpc (memaddr
, info
);
2631 return print_insn_little_powerpc (memaddr
, info
);
2634 /* Initialize the current architecture based on INFO. If possible, re-use an
2635 architecture from ARCHES, which is a list of architectures already created
2636 during this debugging session.
2638 Called e.g. at program startup, when reading a core file, and when reading
2641 static struct gdbarch
*
2642 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2644 struct gdbarch
*gdbarch
;
2645 struct gdbarch_tdep
*tdep
;
2646 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2648 const struct variant
*v
;
2649 enum bfd_architecture arch
;
2653 enum gdb_osabi osabi
= GDB_OSABI_UNKNOWN
;
2656 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2657 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2659 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2660 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2662 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2665 osabi
= gdbarch_lookup_osabi (info
.abfd
);
2667 /* Check word size. If INFO is from a binary file, infer it from
2668 that, else choose a likely default. */
2669 if (from_xcoff_exec
)
2671 if (bfd_xcoff_is_xcoff64 (info
.abfd
))
2676 else if (from_elf_exec
)
2678 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2685 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2686 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2687 info
.bfd_arch_info
->bits_per_byte
;
2692 /* Find a candidate among extant architectures. */
2693 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2695 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2697 /* Word size in the various PowerPC bfd_arch_info structs isn't
2698 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2699 separate word size check. */
2700 tdep
= gdbarch_tdep (arches
->gdbarch
);
2701 if (tdep
&& tdep
->wordsize
== wordsize
&& tdep
->osabi
== osabi
)
2702 return arches
->gdbarch
;
2705 /* None found, create a new architecture from INFO, whose bfd_arch_info
2706 validity depends on the source:
2707 - executable useless
2708 - rs6000_host_arch() good
2710 - "set arch" trust blindly
2711 - GDB startup useless but harmless */
2713 if (!from_xcoff_exec
)
2715 arch
= info
.bfd_arch_info
->arch
;
2716 mach
= info
.bfd_arch_info
->mach
;
2720 arch
= bfd_arch_powerpc
;
2722 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2723 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2725 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2726 tdep
->wordsize
= wordsize
;
2727 tdep
->osabi
= osabi
;
2729 /* For e500 executables, the apuinfo section is of help here. Such
2730 section contains the identifier and revision number of each
2731 Application-specific Processing Unit that is present on the
2732 chip. The content of the section is determined by the assembler
2733 which looks at each instruction and determines which unit (and
2734 which version of it) can execute it. In our case we just look for
2735 the existance of the section. */
2739 sect
= bfd_get_section_by_name (info
.abfd
, ".PPC.EMB.apuinfo");
2742 arch
= info
.bfd_arch_info
->arch
;
2743 mach
= bfd_mach_ppc_e500
;
2744 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2745 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2749 gdbarch
= gdbarch_alloc (&info
, tdep
);
2750 power
= arch
== bfd_arch_rs6000
;
2752 /* Initialize the number of real and pseudo registers in each variant. */
2755 /* Choose variant. */
2756 v
= find_variant_by_arch (arch
, mach
);
2760 tdep
->regs
= v
->regs
;
2762 tdep
->ppc_gp0_regnum
= 0;
2763 tdep
->ppc_gplast_regnum
= 31;
2764 tdep
->ppc_toc_regnum
= 2;
2765 tdep
->ppc_ps_regnum
= 65;
2766 tdep
->ppc_cr_regnum
= 66;
2767 tdep
->ppc_lr_regnum
= 67;
2768 tdep
->ppc_ctr_regnum
= 68;
2769 tdep
->ppc_xer_regnum
= 69;
2770 if (v
->mach
== bfd_mach_ppc_601
)
2771 tdep
->ppc_mq_regnum
= 124;
2773 tdep
->ppc_mq_regnum
= 70;
2775 tdep
->ppc_mq_regnum
= -1;
2776 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2778 set_gdbarch_pc_regnum (gdbarch
, 64);
2779 set_gdbarch_sp_regnum (gdbarch
, 1);
2780 set_gdbarch_fp_regnum (gdbarch
, 1);
2781 set_gdbarch_deprecated_extract_return_value (gdbarch
,
2782 rs6000_extract_return_value
);
2783 set_gdbarch_deprecated_store_return_value (gdbarch
, rs6000_store_return_value
);
2785 if (v
->arch
== bfd_arch_powerpc
)
2789 tdep
->ppc_vr0_regnum
= 71;
2790 tdep
->ppc_vrsave_regnum
= 104;
2791 tdep
->ppc_ev0_regnum
= -1;
2792 tdep
->ppc_ev31_regnum
= -1;
2794 case bfd_mach_ppc_7400
:
2795 tdep
->ppc_vr0_regnum
= 119;
2796 tdep
->ppc_vrsave_regnum
= 153;
2797 tdep
->ppc_ev0_regnum
= -1;
2798 tdep
->ppc_ev31_regnum
= -1;
2800 case bfd_mach_ppc_e500
:
2801 tdep
->ppc_gp0_regnum
= 39;
2802 tdep
->ppc_gplast_regnum
= 70;
2803 tdep
->ppc_toc_regnum
= -1;
2804 tdep
->ppc_ps_regnum
= 1;
2805 tdep
->ppc_cr_regnum
= 2;
2806 tdep
->ppc_lr_regnum
= 3;
2807 tdep
->ppc_ctr_regnum
= 4;
2808 tdep
->ppc_xer_regnum
= 5;
2809 tdep
->ppc_ev0_regnum
= 7;
2810 tdep
->ppc_ev31_regnum
= 38;
2811 set_gdbarch_pc_regnum (gdbarch
, 0);
2812 set_gdbarch_sp_regnum (gdbarch
, 40);
2813 set_gdbarch_fp_regnum (gdbarch
, 40);
2814 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, e500_dwarf2_reg_to_regnum
);
2815 set_gdbarch_pseudo_register_read (gdbarch
, e500_pseudo_register_read
);
2816 set_gdbarch_pseudo_register_write (gdbarch
, e500_pseudo_register_write
);
2817 set_gdbarch_extract_return_value (gdbarch
, e500_extract_return_value
);
2818 set_gdbarch_deprecated_store_return_value (gdbarch
, e500_store_return_value
);
2821 tdep
->ppc_vr0_regnum
= -1;
2822 tdep
->ppc_vrsave_regnum
= -1;
2823 tdep
->ppc_ev0_regnum
= -1;
2824 tdep
->ppc_ev31_regnum
= -1;
2828 /* Set lr_frame_offset. */
2830 tdep
->lr_frame_offset
= 16;
2832 tdep
->lr_frame_offset
= 4;
2834 tdep
->lr_frame_offset
= 8;
2836 /* Calculate byte offsets in raw register array. */
2837 tdep
->regoff
= xmalloc (v
->num_tot_regs
* sizeof (int));
2838 for (i
= off
= 0; i
< v
->num_tot_regs
; i
++)
2840 tdep
->regoff
[i
] = off
;
2841 off
+= regsize (v
->regs
+ i
, wordsize
);
2844 /* Select instruction printer. */
2846 set_gdbarch_print_insn (gdbarch
, print_insn_rs6000
);
2848 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_powerpc
);
2850 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
2851 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2852 set_gdbarch_read_fp (gdbarch
, generic_target_read_fp
);
2853 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2854 set_gdbarch_write_sp (gdbarch
, generic_target_write_sp
);
2856 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2857 set_gdbarch_num_pseudo_regs (gdbarch
, v
->npregs
);
2858 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2859 set_gdbarch_register_size (gdbarch
, wordsize
);
2860 set_gdbarch_register_bytes (gdbarch
, off
);
2861 set_gdbarch_register_byte (gdbarch
, rs6000_register_byte
);
2862 set_gdbarch_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2863 set_gdbarch_max_register_raw_size (gdbarch
, 16);
2864 set_gdbarch_register_virtual_size (gdbarch
, generic_register_size
);
2865 set_gdbarch_max_register_virtual_size (gdbarch
, 16);
2866 set_gdbarch_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2868 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2869 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2870 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2871 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2872 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2873 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2874 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2875 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2876 set_gdbarch_char_signed (gdbarch
, 0);
2878 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
2879 set_gdbarch_call_dummy_length (gdbarch
, 0);
2880 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
2881 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2882 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
2883 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2884 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2885 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
2886 set_gdbarch_call_dummy_p (gdbarch
, 1);
2887 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2888 set_gdbarch_get_saved_register (gdbarch
, generic_unwind_get_saved_register
);
2889 set_gdbarch_fix_call_dummy (gdbarch
, rs6000_fix_call_dummy
);
2890 set_gdbarch_frame_align (gdbarch
, rs6000_frame_align
);
2891 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
2892 set_gdbarch_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2893 set_gdbarch_push_return_address (gdbarch
, ppc_push_return_address
);
2894 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2895 set_gdbarch_coerce_float_to_double (gdbarch
, rs6000_coerce_float_to_double
);
2897 set_gdbarch_register_convertible (gdbarch
, rs6000_register_convertible
);
2898 set_gdbarch_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2899 set_gdbarch_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2900 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2901 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2902 is correct for the SysV ABI when the wordsize is 8, but I'm also
2903 fairly certain that ppc_sysv_abi_push_arguments() will give even
2904 worse results since it only works for 32-bit code. So, for the moment,
2905 we're better off calling rs6000_push_arguments() since it works for
2906 64-bit code. At some point in the future, this matter needs to be
2908 if (sysv_abi
&& wordsize
== 4)
2909 set_gdbarch_push_arguments (gdbarch
, ppc_sysv_abi_push_arguments
);
2911 set_gdbarch_push_arguments (gdbarch
, rs6000_push_arguments
);
2913 set_gdbarch_store_struct_return (gdbarch
, rs6000_store_struct_return
);
2914 set_gdbarch_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2915 set_gdbarch_pop_frame (gdbarch
, rs6000_pop_frame
);
2917 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2918 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2919 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2920 set_gdbarch_function_start_offset (gdbarch
, 0);
2921 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2923 /* Not sure on this. FIXMEmgo */
2924 set_gdbarch_frame_args_skip (gdbarch
, 8);
2927 set_gdbarch_use_struct_convention (gdbarch
,
2928 ppc_sysv_abi_use_struct_convention
);
2930 set_gdbarch_use_struct_convention (gdbarch
,
2931 generic_use_struct_convention
);
2933 set_gdbarch_frame_chain_valid (gdbarch
, file_frame_chain_valid
);
2935 set_gdbarch_frameless_function_invocation (gdbarch
,
2936 rs6000_frameless_function_invocation
);
2937 set_gdbarch_frame_chain (gdbarch
, rs6000_frame_chain
);
2938 set_gdbarch_frame_saved_pc (gdbarch
, rs6000_frame_saved_pc
);
2940 set_gdbarch_frame_init_saved_regs (gdbarch
, rs6000_frame_init_saved_regs
);
2941 set_gdbarch_init_extra_frame_info (gdbarch
, rs6000_init_extra_frame_info
);
2945 /* Handle RS/6000 function pointers (which are really function
2947 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2948 rs6000_convert_from_func_ptr_addr
);
2950 set_gdbarch_frame_args_address (gdbarch
, rs6000_frame_args_address
);
2951 set_gdbarch_frame_locals_address (gdbarch
, rs6000_frame_args_address
);
2952 set_gdbarch_saved_pc_after_call (gdbarch
, rs6000_saved_pc_after_call
);
2954 /* We can't tell how many args there are
2955 now that the C compiler delays popping them. */
2956 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
2958 /* Hook in ABI-specific overrides, if they have been registered. */
2959 gdbarch_init_osabi (info
, gdbarch
, osabi
);
2965 rs6000_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2967 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2972 fprintf_unfiltered (file
, "rs6000_dump_tdep: OS ABI = %s\n",
2973 gdbarch_osabi_name (tdep
->osabi
));
2976 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
2979 rs6000_info_powerpc_command (char *args
, int from_tty
)
2981 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
2984 /* Initialization code. */
2987 _initialize_rs6000_tdep (void)
2989 gdbarch_register (bfd_arch_rs6000
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2990 gdbarch_register (bfd_arch_powerpc
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2992 /* Add root prefix command for "info powerpc" commands */
2993 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
2994 "Various POWERPC info specific commands.",
2995 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);