1 /* Target-dependent code for GDB, the GNU debugger.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003
4 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
32 #include "arch-utils.h"
36 #include "parser-defs.h"
39 #include "libbfd.h" /* for bfd_default_set_arch_mach */
40 #include "coff/internal.h" /* for libcoff.h */
41 #include "libcoff.h" /* for xcoff_data */
42 #include "coff/xcoff.h"
47 #include "solib-svr4.h"
50 #include "gdb_assert.h"
52 /* If the kernel has to deliver a signal, it pushes a sigcontext
53 structure on the stack and then calls the signal handler, passing
54 the address of the sigcontext in an argument register. Usually
55 the signal handler doesn't save this register, so we have to
56 access the sigcontext structure via an offset from the signal handler
58 The following constants were determined by experimentation on AIX 3.2. */
59 #define SIG_FRAME_PC_OFFSET 96
60 #define SIG_FRAME_LR_OFFSET 108
61 #define SIG_FRAME_FP_OFFSET 284
63 /* To be used by skip_prologue. */
65 struct rs6000_framedata
67 int offset
; /* total size of frame --- the distance
68 by which we decrement sp to allocate
70 int saved_gpr
; /* smallest # of saved gpr */
71 int saved_fpr
; /* smallest # of saved fpr */
72 int saved_vr
; /* smallest # of saved vr */
73 int saved_ev
; /* smallest # of saved ev */
74 int alloca_reg
; /* alloca register number (frame ptr) */
75 char frameless
; /* true if frameless functions. */
76 char nosavedpc
; /* true if pc not saved. */
77 int gpr_offset
; /* offset of saved gprs from prev sp */
78 int fpr_offset
; /* offset of saved fprs from prev sp */
79 int vr_offset
; /* offset of saved vrs from prev sp */
80 int ev_offset
; /* offset of saved evs from prev sp */
81 int lr_offset
; /* offset of saved lr */
82 int cr_offset
; /* offset of saved cr */
83 int vrsave_offset
; /* offset of saved vrsave register */
86 /* Description of a single register. */
90 char *name
; /* name of register */
91 unsigned char sz32
; /* size on 32-bit arch, 0 if nonextant */
92 unsigned char sz64
; /* size on 64-bit arch, 0 if nonextant */
93 unsigned char fpr
; /* whether register is floating-point */
94 unsigned char pseudo
; /* whether register is pseudo */
97 /* Breakpoint shadows for the single step instructions will be kept here. */
99 static struct sstep_breaks
101 /* Address, or 0 if this is not in use. */
103 /* Shadow contents. */
108 /* Hook for determining the TOC address when calling functions in the
109 inferior under AIX. The initialization code in rs6000-nat.c sets
110 this hook to point to find_toc_address. */
112 CORE_ADDR (*rs6000_find_toc_address_hook
) (CORE_ADDR
) = NULL
;
114 /* Hook to set the current architecture when starting a child process.
115 rs6000-nat.c sets this. */
117 void (*rs6000_set_host_arch_hook
) (int) = NULL
;
119 /* Static function prototypes */
121 static CORE_ADDR
branch_dest (int opcode
, int instr
, CORE_ADDR pc
,
123 static CORE_ADDR
skip_prologue (CORE_ADDR
, CORE_ADDR
,
124 struct rs6000_framedata
*);
125 static void frame_get_saved_regs (struct frame_info
* fi
,
126 struct rs6000_framedata
* fdatap
);
127 static CORE_ADDR
frame_initial_stack_address (struct frame_info
*);
129 /* Is REGNO an AltiVec register? Return 1 if so, 0 otherwise. */
131 altivec_register_p (int regno
)
133 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
134 if (tdep
->ppc_vr0_regnum
< 0 || tdep
->ppc_vrsave_regnum
< 0)
137 return (regno
>= tdep
->ppc_vr0_regnum
&& regno
<= tdep
->ppc_vrsave_regnum
);
140 /* Use the architectures FP registers? */
142 ppc_floating_point_unit_p (struct gdbarch
*gdbarch
)
144 const struct bfd_arch_info
*info
= gdbarch_bfd_arch_info (gdbarch
);
145 if (info
->arch
== bfd_arch_powerpc
)
146 return (info
->mach
!= bfd_mach_ppc_e500
);
147 if (info
->arch
== bfd_arch_rs6000
)
152 /* Read a LEN-byte address from debugged memory address MEMADDR. */
155 read_memory_addr (CORE_ADDR memaddr
, int len
)
157 return read_memory_unsigned_integer (memaddr
, len
);
161 rs6000_skip_prologue (CORE_ADDR pc
)
163 struct rs6000_framedata frame
;
164 pc
= skip_prologue (pc
, 0, &frame
);
169 /* Fill in fi->saved_regs */
171 struct frame_extra_info
173 /* Functions calling alloca() change the value of the stack
174 pointer. We need to use initial stack pointer (which is saved in
175 r31 by gcc) in such cases. If a compiler emits traceback table,
176 then we should use the alloca register specified in traceback
178 CORE_ADDR initial_sp
; /* initial stack pointer. */
182 rs6000_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
184 struct frame_extra_info
*extra_info
=
185 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
186 extra_info
->initial_sp
= 0;
187 if (get_next_frame (fi
) != NULL
188 && get_frame_pc (fi
) < TEXT_SEGMENT_BASE
)
189 /* We're in get_prev_frame */
190 /* and this is a special signal frame. */
191 /* (fi->pc will be some low address in the kernel, */
192 /* to which the signal handler returns). */
193 deprecated_set_frame_type (fi
, SIGTRAMP_FRAME
);
196 /* Put here the code to store, into a struct frame_saved_regs,
197 the addresses of the saved registers of frame described by FRAME_INFO.
198 This includes special registers such as pc and fp saved in special
199 ways in the stack frame. sp is even more special:
200 the address we return for it IS the sp for the next frame. */
202 /* In this implementation for RS/6000, we do *not* save sp. I am
203 not sure if it will be needed. The following function takes care of gpr's
207 rs6000_frame_init_saved_regs (struct frame_info
*fi
)
209 frame_get_saved_regs (fi
, NULL
);
213 rs6000_frame_args_address (struct frame_info
*fi
)
215 struct frame_extra_info
*extra_info
= get_frame_extra_info (fi
);
216 if (extra_info
->initial_sp
!= 0)
217 return extra_info
->initial_sp
;
219 return frame_initial_stack_address (fi
);
222 /* Immediately after a function call, return the saved pc.
223 Can't go through the frames for this because on some machines
224 the new frame is not set up until the new function executes
225 some instructions. */
228 rs6000_saved_pc_after_call (struct frame_info
*fi
)
230 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
233 /* Calculate the destination of a branch/jump. Return -1 if not a branch. */
236 branch_dest (int opcode
, int instr
, CORE_ADDR pc
, CORE_ADDR safety
)
243 absolute
= (int) ((instr
>> 1) & 1);
248 immediate
= ((instr
& ~3) << 6) >> 6; /* br unconditional */
252 dest
= pc
+ immediate
;
256 immediate
= ((instr
& ~3) << 16) >> 16; /* br conditional */
260 dest
= pc
+ immediate
;
264 ext_op
= (instr
>> 1) & 0x3ff;
266 if (ext_op
== 16) /* br conditional register */
268 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
270 /* If we are about to return from a signal handler, dest is
271 something like 0x3c90. The current frame is a signal handler
272 caller frame, upon completion of the sigreturn system call
273 execution will return to the saved PC in the frame. */
274 if (dest
< TEXT_SEGMENT_BASE
)
276 struct frame_info
*fi
;
278 fi
= get_current_frame ();
280 dest
= read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
281 gdbarch_tdep (current_gdbarch
)->wordsize
);
285 else if (ext_op
== 528) /* br cond to count reg */
287 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
) & ~3;
289 /* If we are about to execute a system call, dest is something
290 like 0x22fc or 0x3b00. Upon completion the system call
291 will return to the address in the link register. */
292 if (dest
< TEXT_SEGMENT_BASE
)
293 dest
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
) & ~3;
302 return (dest
< TEXT_SEGMENT_BASE
) ? safety
: dest
;
306 /* Sequence of bytes for breakpoint instruction. */
308 const static unsigned char *
309 rs6000_breakpoint_from_pc (CORE_ADDR
*bp_addr
, int *bp_size
)
311 static unsigned char big_breakpoint
[] = { 0x7d, 0x82, 0x10, 0x08 };
312 static unsigned char little_breakpoint
[] = { 0x08, 0x10, 0x82, 0x7d };
314 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
315 return big_breakpoint
;
317 return little_breakpoint
;
321 /* AIX does not support PT_STEP. Simulate it. */
324 rs6000_software_single_step (enum target_signal signal
,
325 int insert_breakpoints_p
)
329 const char *breakp
= rs6000_breakpoint_from_pc (&dummy
, &breakp_sz
);
335 if (insert_breakpoints_p
)
340 insn
= read_memory_integer (loc
, 4);
342 breaks
[0] = loc
+ breakp_sz
;
344 breaks
[1] = branch_dest (opcode
, insn
, loc
, breaks
[0]);
346 /* Don't put two breakpoints on the same address. */
347 if (breaks
[1] == breaks
[0])
350 stepBreaks
[1].address
= 0;
352 for (ii
= 0; ii
< 2; ++ii
)
355 /* ignore invalid breakpoint. */
356 if (breaks
[ii
] == -1)
358 target_insert_breakpoint (breaks
[ii
], stepBreaks
[ii
].data
);
359 stepBreaks
[ii
].address
= breaks
[ii
];
366 /* remove step breakpoints. */
367 for (ii
= 0; ii
< 2; ++ii
)
368 if (stepBreaks
[ii
].address
!= 0)
369 target_remove_breakpoint (stepBreaks
[ii
].address
,
370 stepBreaks
[ii
].data
);
372 errno
= 0; /* FIXME, don't ignore errors! */
373 /* What errors? {read,write}_memory call error(). */
377 /* return pc value after skipping a function prologue and also return
378 information about a function frame.
380 in struct rs6000_framedata fdata:
381 - frameless is TRUE, if function does not have a frame.
382 - nosavedpc is TRUE, if function does not save %pc value in its frame.
383 - offset is the initial size of this stack frame --- the amount by
384 which we decrement the sp to allocate the frame.
385 - saved_gpr is the number of the first saved gpr.
386 - saved_fpr is the number of the first saved fpr.
387 - saved_vr is the number of the first saved vr.
388 - saved_ev is the number of the first saved ev.
389 - alloca_reg is the number of the register used for alloca() handling.
391 - gpr_offset is the offset of the first saved gpr from the previous frame.
392 - fpr_offset is the offset of the first saved fpr from the previous frame.
393 - vr_offset is the offset of the first saved vr from the previous frame.
394 - ev_offset is the offset of the first saved ev from the previous frame.
395 - lr_offset is the offset of the saved lr
396 - cr_offset is the offset of the saved cr
397 - vrsave_offset is the offset of the saved vrsave register
400 #define SIGNED_SHORT(x) \
401 ((sizeof (short) == 2) \
402 ? ((int)(short)(x)) \
403 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
405 #define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
407 /* Limit the number of skipped non-prologue instructions, as the examining
408 of the prologue is expensive. */
409 static int max_skip_non_prologue_insns
= 10;
411 /* Given PC representing the starting address of a function, and
412 LIM_PC which is the (sloppy) limit to which to scan when looking
413 for a prologue, attempt to further refine this limit by using
414 the line data in the symbol table. If successful, a better guess
415 on where the prologue ends is returned, otherwise the previous
416 value of lim_pc is returned. */
418 refine_prologue_limit (CORE_ADDR pc
, CORE_ADDR lim_pc
)
420 struct symtab_and_line prologue_sal
;
422 prologue_sal
= find_pc_line (pc
, 0);
423 if (prologue_sal
.line
!= 0)
426 CORE_ADDR addr
= prologue_sal
.end
;
428 /* Handle the case in which compiler's optimizer/scheduler
429 has moved instructions into the prologue. We scan ahead
430 in the function looking for address ranges whose corresponding
431 line number is less than or equal to the first one that we
432 found for the function. (It can be less than when the
433 scheduler puts a body instruction before the first prologue
435 for (i
= 2 * max_skip_non_prologue_insns
;
436 i
> 0 && (lim_pc
== 0 || addr
< lim_pc
);
439 struct symtab_and_line sal
;
441 sal
= find_pc_line (addr
, 0);
444 if (sal
.line
<= prologue_sal
.line
445 && sal
.symtab
== prologue_sal
.symtab
)
452 if (lim_pc
== 0 || prologue_sal
.end
< lim_pc
)
453 lim_pc
= prologue_sal
.end
;
460 skip_prologue (CORE_ADDR pc
, CORE_ADDR lim_pc
, struct rs6000_framedata
*fdata
)
462 CORE_ADDR orig_pc
= pc
;
463 CORE_ADDR last_prologue_pc
= pc
;
464 CORE_ADDR li_found_pc
= 0;
468 long vr_saved_offset
= 0;
477 int minimal_toc_loaded
= 0;
478 int prev_insn_was_prologue_insn
= 1;
479 int num_skip_non_prologue_insns
= 0;
480 const struct bfd_arch_info
*arch_info
= gdbarch_bfd_arch_info (current_gdbarch
);
481 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
483 /* Attempt to find the end of the prologue when no limit is specified.
484 Note that refine_prologue_limit() has been written so that it may
485 be used to "refine" the limits of non-zero PC values too, but this
486 is only safe if we 1) trust the line information provided by the
487 compiler and 2) iterate enough to actually find the end of the
490 It may become a good idea at some point (for both performance and
491 accuracy) to unconditionally call refine_prologue_limit(). But,
492 until we can make a clear determination that this is beneficial,
493 we'll play it safe and only use it to obtain a limit when none
494 has been specified. */
496 lim_pc
= refine_prologue_limit (pc
, lim_pc
);
498 memset (fdata
, 0, sizeof (struct rs6000_framedata
));
499 fdata
->saved_gpr
= -1;
500 fdata
->saved_fpr
= -1;
501 fdata
->saved_vr
= -1;
502 fdata
->saved_ev
= -1;
503 fdata
->alloca_reg
= -1;
504 fdata
->frameless
= 1;
505 fdata
->nosavedpc
= 1;
509 /* Sometimes it isn't clear if an instruction is a prologue
510 instruction or not. When we encounter one of these ambiguous
511 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
512 Otherwise, we'll assume that it really is a prologue instruction. */
513 if (prev_insn_was_prologue_insn
)
514 last_prologue_pc
= pc
;
516 /* Stop scanning if we've hit the limit. */
517 if (lim_pc
!= 0 && pc
>= lim_pc
)
520 prev_insn_was_prologue_insn
= 1;
522 /* Fetch the instruction and convert it to an integer. */
523 if (target_read_memory (pc
, buf
, 4))
525 op
= extract_signed_integer (buf
, 4);
527 if ((op
& 0xfc1fffff) == 0x7c0802a6)
529 lr_reg
= (op
& 0x03e00000) | 0x90010000;
533 else if ((op
& 0xfc1fffff) == 0x7c000026)
535 cr_reg
= (op
& 0x03e00000) | 0x90010000;
539 else if ((op
& 0xfc1f0000) == 0xd8010000)
540 { /* stfd Rx,NUM(r1) */
541 reg
= GET_SRC_REG (op
);
542 if (fdata
->saved_fpr
== -1 || fdata
->saved_fpr
> reg
)
544 fdata
->saved_fpr
= reg
;
545 fdata
->fpr_offset
= SIGNED_SHORT (op
) + offset
;
550 else if (((op
& 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
551 (((op
& 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
552 (op
& 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
553 (op
& 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
556 reg
= GET_SRC_REG (op
);
557 if (fdata
->saved_gpr
== -1 || fdata
->saved_gpr
> reg
)
559 fdata
->saved_gpr
= reg
;
560 if ((op
& 0xfc1f0003) == 0xf8010000)
562 fdata
->gpr_offset
= SIGNED_SHORT (op
) + offset
;
567 else if ((op
& 0xffff0000) == 0x60000000)
570 /* Allow nops in the prologue, but do not consider them to
571 be part of the prologue unless followed by other prologue
573 prev_insn_was_prologue_insn
= 0;
577 else if ((op
& 0xffff0000) == 0x3c000000)
578 { /* addis 0,0,NUM, used
580 fdata
->offset
= (op
& 0x0000ffff) << 16;
581 fdata
->frameless
= 0;
585 else if ((op
& 0xffff0000) == 0x60000000)
586 { /* ori 0,0,NUM, 2nd ha
587 lf of >= 32k frames */
588 fdata
->offset
|= (op
& 0x0000ffff);
589 fdata
->frameless
= 0;
593 else if (lr_reg
!= -1 && (op
& 0xffff0000) == lr_reg
)
596 fdata
->lr_offset
= SIGNED_SHORT (op
) + offset
;
597 fdata
->nosavedpc
= 0;
602 else if (cr_reg
!= -1 && (op
& 0xffff0000) == cr_reg
)
605 fdata
->cr_offset
= SIGNED_SHORT (op
) + offset
;
610 else if (op
== 0x48000005)
616 else if (op
== 0x48000004)
621 else if ((op
& 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
622 in V.4 -mminimal-toc */
623 (op
& 0xffff0000) == 0x3bde0000)
624 { /* addi 30,30,foo@l */
628 else if ((op
& 0xfc000001) == 0x48000001)
632 fdata
->frameless
= 0;
633 /* Don't skip over the subroutine call if it is not within
634 the first three instructions of the prologue. */
635 if ((pc
- orig_pc
) > 8)
638 op
= read_memory_integer (pc
+ 4, 4);
640 /* At this point, make sure this is not a trampoline
641 function (a function that simply calls another functions,
642 and nothing else). If the next is not a nop, this branch
643 was part of the function prologue. */
645 if (op
== 0x4def7b82 || op
== 0) /* crorc 15, 15, 15 */
646 break; /* don't skip over
650 /* update stack pointer */
652 else if ((op
& 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
653 (op
& 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
655 fdata
->frameless
= 0;
656 if ((op
& 0xffff0003) == 0xf8210001)
658 fdata
->offset
= SIGNED_SHORT (op
);
659 offset
= fdata
->offset
;
663 else if (op
== 0x7c21016e)
665 fdata
->frameless
= 0;
666 offset
= fdata
->offset
;
669 /* Load up minimal toc pointer */
671 else if ((op
>> 22) == 0x20f
672 && !minimal_toc_loaded
)
673 { /* l r31,... or l r30,... */
674 minimal_toc_loaded
= 1;
677 /* move parameters from argument registers to local variable
680 else if ((op
& 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
681 (((op
>> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
682 (((op
>> 21) & 31) <= 10) &&
683 ((long) ((op
>> 16) & 31) >= fdata
->saved_gpr
)) /* Rx: local var reg */
687 /* store parameters in stack */
689 else if ((op
& 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
690 (op
& 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
691 (op
& 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
695 /* store parameters in stack via frame pointer */
698 ((op
& 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
699 (op
& 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
700 (op
& 0xfc1f0000) == 0xfc1f0000))
701 { /* frsp, fp?,NUM(r1) */
704 /* Set up frame pointer */
706 else if (op
== 0x603f0000 /* oril r31, r1, 0x0 */
709 fdata
->frameless
= 0;
711 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
+ 31);
714 /* Another way to set up the frame pointer. */
716 else if ((op
& 0xfc1fffff) == 0x38010000)
717 { /* addi rX, r1, 0x0 */
718 fdata
->frameless
= 0;
720 fdata
->alloca_reg
= (tdep
->ppc_gp0_regnum
721 + ((op
& ~0x38010000) >> 21));
724 /* AltiVec related instructions. */
725 /* Store the vrsave register (spr 256) in another register for
726 later manipulation, or load a register into the vrsave
727 register. 2 instructions are used: mfvrsave and
728 mtvrsave. They are shorthand notation for mfspr Rn, SPR256
729 and mtspr SPR256, Rn. */
730 /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110
731 mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */
732 else if ((op
& 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */
734 vrsave_reg
= GET_SRC_REG (op
);
737 else if ((op
& 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */
741 /* Store the register where vrsave was saved to onto the stack:
742 rS is the register where vrsave was stored in a previous
744 /* 100100 sssss 00001 dddddddd dddddddd */
745 else if ((op
& 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */
747 if (vrsave_reg
== GET_SRC_REG (op
))
749 fdata
->vrsave_offset
= SIGNED_SHORT (op
) + offset
;
754 /* Compute the new value of vrsave, by modifying the register
755 where vrsave was saved to. */
756 else if (((op
& 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */
757 || ((op
& 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */
761 /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first
762 in a pair of insns to save the vector registers on the
764 /* 001110 00000 00000 iiii iiii iiii iiii */
765 /* 001110 01110 00000 iiii iiii iiii iiii */
766 else if ((op
& 0xffff0000) == 0x38000000 /* li r0, SIMM */
767 || (op
& 0xffff0000) == 0x39c00000) /* li r14, SIMM */
770 vr_saved_offset
= SIGNED_SHORT (op
);
772 /* Store vector register S at (r31+r0) aligned to 16 bytes. */
773 /* 011111 sssss 11111 00000 00111001110 */
774 else if ((op
& 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */
776 if (pc
== (li_found_pc
+ 4))
778 vr_reg
= GET_SRC_REG (op
);
779 /* If this is the first vector reg to be saved, or if
780 it has a lower number than others previously seen,
781 reupdate the frame info. */
782 if (fdata
->saved_vr
== -1 || fdata
->saved_vr
> vr_reg
)
784 fdata
->saved_vr
= vr_reg
;
785 fdata
->vr_offset
= vr_saved_offset
+ offset
;
787 vr_saved_offset
= -1;
792 /* End AltiVec related instructions. */
794 /* Start BookE related instructions. */
795 /* Store gen register S at (r31+uimm).
796 Any register less than r13 is volatile, so we don't care. */
797 /* 000100 sssss 11111 iiiii 01100100001 */
798 else if (arch_info
->mach
== bfd_mach_ppc_e500
799 && (op
& 0xfc1f07ff) == 0x101f0321) /* evstdd Rs,uimm(R31) */
801 if ((op
& 0x03e00000) >= 0x01a00000) /* Rs >= r13 */
804 ev_reg
= GET_SRC_REG (op
);
805 imm
= (op
>> 11) & 0x1f;
807 /* If this is the first vector reg to be saved, or if
808 it has a lower number than others previously seen,
809 reupdate the frame info. */
810 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
812 fdata
->saved_ev
= ev_reg
;
813 fdata
->ev_offset
= ev_offset
+ offset
;
818 /* Store gen register rS at (r1+rB). */
819 /* 000100 sssss 00001 bbbbb 01100100000 */
820 else if (arch_info
->mach
== bfd_mach_ppc_e500
821 && (op
& 0xffe007ff) == 0x13e00320) /* evstddx RS,R1,Rb */
823 if (pc
== (li_found_pc
+ 4))
825 ev_reg
= GET_SRC_REG (op
);
826 /* If this is the first vector reg to be saved, or if
827 it has a lower number than others previously seen,
828 reupdate the frame info. */
829 /* We know the contents of rB from the previous instruction. */
830 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
832 fdata
->saved_ev
= ev_reg
;
833 fdata
->ev_offset
= vr_saved_offset
+ offset
;
835 vr_saved_offset
= -1;
841 /* Store gen register r31 at (rA+uimm). */
842 /* 000100 11111 aaaaa iiiii 01100100001 */
843 else if (arch_info
->mach
== bfd_mach_ppc_e500
844 && (op
& 0xffe007ff) == 0x13e00321) /* evstdd R31,Ra,UIMM */
846 /* Wwe know that the source register is 31 already, but
847 it can't hurt to compute it. */
848 ev_reg
= GET_SRC_REG (op
);
849 ev_offset
= ((op
>> 11) & 0x1f) * 8;
850 /* If this is the first vector reg to be saved, or if
851 it has a lower number than others previously seen,
852 reupdate the frame info. */
853 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
855 fdata
->saved_ev
= ev_reg
;
856 fdata
->ev_offset
= ev_offset
+ offset
;
861 /* Store gen register S at (r31+r0).
862 Store param on stack when offset from SP bigger than 4 bytes. */
863 /* 000100 sssss 11111 00000 01100100000 */
864 else if (arch_info
->mach
== bfd_mach_ppc_e500
865 && (op
& 0xfc1fffff) == 0x101f0320) /* evstddx Rs,R31,R0 */
867 if (pc
== (li_found_pc
+ 4))
869 if ((op
& 0x03e00000) >= 0x01a00000)
871 ev_reg
= GET_SRC_REG (op
);
872 /* If this is the first vector reg to be saved, or if
873 it has a lower number than others previously seen,
874 reupdate the frame info. */
875 /* We know the contents of r0 from the previous
877 if (fdata
->saved_ev
== -1 || fdata
->saved_ev
> ev_reg
)
879 fdata
->saved_ev
= ev_reg
;
880 fdata
->ev_offset
= vr_saved_offset
+ offset
;
884 vr_saved_offset
= -1;
889 /* End BookE related instructions. */
893 /* Not a recognized prologue instruction.
894 Handle optimizer code motions into the prologue by continuing
895 the search if we have no valid frame yet or if the return
896 address is not yet saved in the frame. */
897 if (fdata
->frameless
== 0
898 && (lr_reg
== -1 || fdata
->nosavedpc
== 0))
901 if (op
== 0x4e800020 /* blr */
902 || op
== 0x4e800420) /* bctr */
903 /* Do not scan past epilogue in frameless functions or
906 if ((op
& 0xf4000000) == 0x40000000) /* bxx */
907 /* Never skip branches. */
910 if (num_skip_non_prologue_insns
++ > max_skip_non_prologue_insns
)
911 /* Do not scan too many insns, scanning insns is expensive with
915 /* Continue scanning. */
916 prev_insn_was_prologue_insn
= 0;
922 /* I have problems with skipping over __main() that I need to address
923 * sometime. Previously, I used to use misc_function_vector which
924 * didn't work as well as I wanted to be. -MGO */
926 /* If the first thing after skipping a prolog is a branch to a function,
927 this might be a call to an initializer in main(), introduced by gcc2.
928 We'd like to skip over it as well. Fortunately, xlc does some extra
929 work before calling a function right after a prologue, thus we can
930 single out such gcc2 behaviour. */
933 if ((op
& 0xfc000001) == 0x48000001)
934 { /* bl foo, an initializer function? */
935 op
= read_memory_integer (pc
+ 4, 4);
937 if (op
== 0x4def7b82)
938 { /* cror 0xf, 0xf, 0xf (nop) */
940 /* Check and see if we are in main. If so, skip over this
941 initializer function as well. */
943 tmp
= find_pc_misc_function (pc
);
944 if (tmp
>= 0 && STREQ (misc_function_vector
[tmp
].name
, main_name ()))
950 fdata
->offset
= -fdata
->offset
;
951 return last_prologue_pc
;
955 /*************************************************************************
956 Support for creating pushing a dummy frame into the stack, and popping
958 *************************************************************************/
961 /* Pop the innermost frame, go back to the caller. */
964 rs6000_pop_frame (void)
966 CORE_ADDR pc
, lr
, sp
, prev_sp
, addr
; /* %pc, %lr, %sp */
967 struct rs6000_framedata fdata
;
968 struct frame_info
*frame
= get_current_frame ();
972 sp
= get_frame_base (frame
);
974 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
975 get_frame_base (frame
),
976 get_frame_base (frame
)))
978 generic_pop_dummy_frame ();
979 flush_cached_frames ();
983 /* Make sure that all registers are valid. */
984 deprecated_read_register_bytes (0, NULL
, DEPRECATED_REGISTER_BYTES
);
986 /* Figure out previous %pc value. If the function is frameless, it is
987 still in the link register, otherwise walk the frames and retrieve the
988 saved %pc value in the previous frame. */
990 addr
= get_frame_func (frame
);
991 (void) skip_prologue (addr
, get_frame_pc (frame
), &fdata
);
993 wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
997 prev_sp
= read_memory_addr (sp
, wordsize
);
998 if (fdata
.lr_offset
== 0)
999 lr
= read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1001 lr
= read_memory_addr (prev_sp
+ fdata
.lr_offset
, wordsize
);
1003 /* reset %pc value. */
1004 write_register (PC_REGNUM
, lr
);
1006 /* reset register values if any was saved earlier. */
1008 if (fdata
.saved_gpr
!= -1)
1010 addr
= prev_sp
+ fdata
.gpr_offset
;
1011 for (ii
= fdata
.saved_gpr
; ii
<= 31; ++ii
)
1013 read_memory (addr
, &deprecated_registers
[REGISTER_BYTE (ii
)],
1019 if (fdata
.saved_fpr
!= -1)
1021 addr
= prev_sp
+ fdata
.fpr_offset
;
1022 for (ii
= fdata
.saved_fpr
; ii
<= 31; ++ii
)
1024 read_memory (addr
, &deprecated_registers
[REGISTER_BYTE (ii
+ FP0_REGNUM
)], 8);
1029 write_register (SP_REGNUM
, prev_sp
);
1030 target_store_registers (-1);
1031 flush_cached_frames ();
1034 /* Fixup the call sequence of a dummy function, with the real function
1035 address. Its arguments will be passed by gdb. */
1038 rs6000_fix_call_dummy (char *dummyname
, CORE_ADDR pc
, CORE_ADDR fun
,
1039 int nargs
, struct value
**args
, struct type
*type
,
1043 CORE_ADDR target_addr
;
1045 if (rs6000_find_toc_address_hook
!= NULL
)
1047 CORE_ADDR tocvalue
= (*rs6000_find_toc_address_hook
) (fun
);
1048 write_register (gdbarch_tdep (current_gdbarch
)->ppc_toc_regnum
,
1053 /* All the ABI's require 16 byte alignment. */
1055 rs6000_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1057 return (addr
& -16);
1060 /* Pass the arguments in either registers, or in the stack. In RS/6000,
1061 the first eight words of the argument list (that might be less than
1062 eight parameters if some parameters occupy more than one word) are
1063 passed in r3..r10 registers. float and double parameters are
1064 passed in fpr's, in addition to that. Rest of the parameters if any
1065 are passed in user stack. There might be cases in which half of the
1066 parameter is copied into registers, the other half is pushed into
1069 Stack must be aligned on 64-bit boundaries when synthesizing
1072 If the function is returning a structure, then the return address is passed
1073 in r3, then the first 7 words of the parameters can be passed in registers,
1074 starting from r4. */
1077 rs6000_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1078 int struct_return
, CORE_ADDR struct_addr
)
1082 int argno
; /* current argument number */
1083 int argbytes
; /* current argument byte */
1084 char tmp_buffer
[50];
1085 int f_argno
= 0; /* current floating point argno */
1086 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1088 struct value
*arg
= 0;
1093 /* The first eight words of ther arguments are passed in registers.
1094 Copy them appropriately.
1096 If the function is returning a `struct', then the first word (which
1097 will be passed in r3) is used for struct return address. In that
1098 case we should advance one word and start from r4 register to copy
1101 ii
= struct_return
? 1 : 0;
1104 effectively indirect call... gcc does...
1106 return_val example( float, int);
1109 float in fp0, int in r3
1110 offset of stack on overflow 8/16
1111 for varargs, must go by type.
1113 float in r3&r4, int in r5
1114 offset of stack on overflow different
1116 return in r3 or f0. If no float, must study how gcc emulates floats;
1117 pay attention to arg promotion.
1118 User may have to cast\args to handle promotion correctly
1119 since gdb won't know if prototype supplied or not.
1122 for (argno
= 0, argbytes
= 0; argno
< nargs
&& ii
< 8; ++ii
)
1124 int reg_size
= REGISTER_RAW_SIZE (ii
+ 3);
1127 type
= check_typedef (VALUE_TYPE (arg
));
1128 len
= TYPE_LENGTH (type
);
1130 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
1133 /* Floating point arguments are passed in fpr's, as well as gpr's.
1134 There are 13 fpr's reserved for passing parameters. At this point
1135 there is no way we would run out of them. */
1139 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1141 memcpy (&deprecated_registers
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1142 VALUE_CONTENTS (arg
),
1150 /* Argument takes more than one register. */
1151 while (argbytes
< len
)
1153 memset (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)], 0,
1155 memcpy (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)],
1156 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1157 (len
- argbytes
) > reg_size
1158 ? reg_size
: len
- argbytes
);
1159 ++ii
, argbytes
+= reg_size
;
1162 goto ran_out_of_registers_for_arguments
;
1169 /* Argument can fit in one register. No problem. */
1170 int adj
= TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
? reg_size
- len
: 0;
1171 memset (&deprecated_registers
[REGISTER_BYTE (ii
+ 3)], 0, reg_size
);
1172 memcpy ((char *)&deprecated_registers
[REGISTER_BYTE (ii
+ 3)] + adj
,
1173 VALUE_CONTENTS (arg
), len
);
1178 ran_out_of_registers_for_arguments
:
1180 saved_sp
= read_sp ();
1182 /* Location for 8 parameters are always reserved. */
1185 /* Another six words for back chain, TOC register, link register, etc. */
1188 /* Stack pointer must be quadword aligned. */
1191 /* If there are more arguments, allocate space for them in
1192 the stack, then push them starting from the ninth one. */
1194 if ((argno
< nargs
) || argbytes
)
1200 space
+= ((len
- argbytes
+ 3) & -4);
1206 for (; jj
< nargs
; ++jj
)
1208 struct value
*val
= args
[jj
];
1209 space
+= ((TYPE_LENGTH (VALUE_TYPE (val
))) + 3) & -4;
1212 /* Add location required for the rest of the parameters. */
1213 space
= (space
+ 15) & -16;
1216 /* This is another instance we need to be concerned about
1217 securing our stack space. If we write anything underneath %sp
1218 (r1), we might conflict with the kernel who thinks he is free
1219 to use this area. So, update %sp first before doing anything
1222 write_register (SP_REGNUM
, sp
);
1224 /* If the last argument copied into the registers didn't fit there
1225 completely, push the rest of it into stack. */
1229 write_memory (sp
+ 24 + (ii
* 4),
1230 ((char *) VALUE_CONTENTS (arg
)) + argbytes
,
1233 ii
+= ((len
- argbytes
+ 3) & -4) / 4;
1236 /* Push the rest of the arguments into stack. */
1237 for (; argno
< nargs
; ++argno
)
1241 type
= check_typedef (VALUE_TYPE (arg
));
1242 len
= TYPE_LENGTH (type
);
1245 /* Float types should be passed in fpr's, as well as in the
1247 if (TYPE_CODE (type
) == TYPE_CODE_FLT
&& f_argno
< 13)
1252 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno
);
1254 memcpy (&deprecated_registers
[REGISTER_BYTE (FP0_REGNUM
+ 1 + f_argno
)],
1255 VALUE_CONTENTS (arg
),
1260 write_memory (sp
+ 24 + (ii
* 4), (char *) VALUE_CONTENTS (arg
), len
);
1261 ii
+= ((len
+ 3) & -4) / 4;
1265 /* Secure stack areas first, before doing anything else. */
1266 write_register (SP_REGNUM
, sp
);
1268 /* set back chain properly */
1269 store_unsigned_integer (tmp_buffer
, 4, saved_sp
);
1270 write_memory (sp
, tmp_buffer
, 4);
1272 target_store_registers (-1);
1276 /* Function: ppc_push_return_address (pc, sp)
1277 Set up the return address for the inferior function call. */
1280 ppc_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1282 write_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
,
1283 CALL_DUMMY_ADDRESS ());
1287 /* Extract a function return value of type TYPE from raw register array
1288 REGBUF, and copy that return value into VALBUF in virtual format. */
1290 e500_extract_return_value (struct type
*valtype
, struct regcache
*regbuf
, void *valbuf
)
1293 int vallen
= TYPE_LENGTH (valtype
);
1294 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1296 if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1298 && TYPE_VECTOR (valtype
))
1300 regcache_raw_read (regbuf
, tdep
->ppc_ev0_regnum
+ 3, valbuf
);
1304 /* Return value is copied starting from r3. Note that r3 for us
1305 is a pseudo register. */
1307 int return_regnum
= tdep
->ppc_gp0_regnum
+ 3;
1308 int reg_size
= REGISTER_RAW_SIZE (return_regnum
);
1314 /* Compute where we will start storing the value from. */
1315 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1317 if (vallen
<= reg_size
)
1318 offset
= reg_size
- vallen
;
1320 offset
= reg_size
+ (reg_size
- vallen
);
1323 /* How big does the local buffer need to be? */
1324 if (vallen
<= reg_size
)
1325 val_buffer
= alloca (reg_size
);
1327 val_buffer
= alloca (vallen
);
1329 /* Read all we need into our private buffer. We copy it in
1330 chunks that are as long as one register, never shorter, even
1331 if the value is smaller than the register. */
1332 while (copied
< vallen
)
1334 reg_part_size
= REGISTER_RAW_SIZE (return_regnum
+ i
);
1335 /* It is a pseudo/cooked register. */
1336 regcache_cooked_read (regbuf
, return_regnum
+ i
,
1337 val_buffer
+ copied
);
1338 copied
+= reg_part_size
;
1341 /* Put the stuff in the return buffer. */
1342 memcpy (valbuf
, val_buffer
+ offset
, vallen
);
1347 rs6000_extract_return_value (struct type
*valtype
, char *regbuf
, char *valbuf
)
1350 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1352 if (TYPE_CODE (valtype
) == TYPE_CODE_FLT
)
1357 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1358 We need to truncate the return value into float size (4 byte) if
1361 if (TYPE_LENGTH (valtype
) > 4) /* this is a double */
1363 ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)],
1364 TYPE_LENGTH (valtype
));
1367 memcpy (&dd
, ®buf
[REGISTER_BYTE (FP0_REGNUM
+ 1)], 8);
1369 memcpy (valbuf
, &ff
, sizeof (float));
1372 else if (TYPE_CODE (valtype
) == TYPE_CODE_ARRAY
1373 && TYPE_LENGTH (valtype
) == 16
1374 && TYPE_VECTOR (valtype
))
1376 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
1377 TYPE_LENGTH (valtype
));
1381 /* return value is copied starting from r3. */
1382 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
1383 && TYPE_LENGTH (valtype
) < REGISTER_RAW_SIZE (3))
1384 offset
= REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype
);
1387 regbuf
+ REGISTER_BYTE (3) + offset
,
1388 TYPE_LENGTH (valtype
));
1392 /* Return whether handle_inferior_event() should proceed through code
1393 starting at PC in function NAME when stepping.
1395 The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to
1396 handle memory references that are too distant to fit in instructions
1397 generated by the compiler. For example, if 'foo' in the following
1402 is greater than 32767, the linker might replace the lwz with a branch to
1403 somewhere in @FIX1 that does the load in 2 instructions and then branches
1404 back to where execution should continue.
1406 GDB should silently step over @FIX code, just like AIX dbx does.
1407 Unfortunately, the linker uses the "b" instruction for the branches,
1408 meaning that the link register doesn't get set. Therefore, GDB's usual
1409 step_over_function() mechanism won't work.
1411 Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks
1412 in handle_inferior_event() to skip past @FIX code. */
1415 rs6000_in_solib_return_trampoline (CORE_ADDR pc
, char *name
)
1417 return name
&& !strncmp (name
, "@FIX", 4);
1420 /* Skip code that the user doesn't want to see when stepping:
1422 1. Indirect function calls use a piece of trampoline code to do context
1423 switching, i.e. to set the new TOC table. Skip such code if we are on
1424 its first instruction (as when we have single-stepped to here).
1426 2. Skip shared library trampoline code (which is different from
1427 indirect function call trampolines).
1429 3. Skip bigtoc fixup code.
1431 Result is desired PC to step until, or NULL if we are not in
1432 code that should be skipped. */
1435 rs6000_skip_trampoline_code (CORE_ADDR pc
)
1437 register unsigned int ii
, op
;
1439 CORE_ADDR solib_target_pc
;
1440 struct minimal_symbol
*msymbol
;
1442 static unsigned trampoline_code
[] =
1444 0x800b0000, /* l r0,0x0(r11) */
1445 0x90410014, /* st r2,0x14(r1) */
1446 0x7c0903a6, /* mtctr r0 */
1447 0x804b0004, /* l r2,0x4(r11) */
1448 0x816b0008, /* l r11,0x8(r11) */
1449 0x4e800420, /* bctr */
1450 0x4e800020, /* br */
1454 /* Check for bigtoc fixup code. */
1455 msymbol
= lookup_minimal_symbol_by_pc (pc
);
1456 if (msymbol
&& rs6000_in_solib_return_trampoline (pc
, DEPRECATED_SYMBOL_NAME (msymbol
)))
1458 /* Double-check that the third instruction from PC is relative "b". */
1459 op
= read_memory_integer (pc
+ 8, 4);
1460 if ((op
& 0xfc000003) == 0x48000000)
1462 /* Extract bits 6-29 as a signed 24-bit relative word address and
1463 add it to the containing PC. */
1464 rel
= ((int)(op
<< 6) >> 6);
1465 return pc
+ 8 + rel
;
1469 /* If pc is in a shared library trampoline, return its target. */
1470 solib_target_pc
= find_solib_trampoline_target (pc
);
1471 if (solib_target_pc
)
1472 return solib_target_pc
;
1474 for (ii
= 0; trampoline_code
[ii
]; ++ii
)
1476 op
= read_memory_integer (pc
+ (ii
* 4), 4);
1477 if (op
!= trampoline_code
[ii
])
1480 ii
= read_register (11); /* r11 holds destination addr */
1481 pc
= read_memory_addr (ii
, gdbarch_tdep (current_gdbarch
)->wordsize
); /* (r11) value */
1485 /* Determines whether the function FI has a frame on the stack or not. */
1488 rs6000_frameless_function_invocation (struct frame_info
*fi
)
1490 CORE_ADDR func_start
;
1491 struct rs6000_framedata fdata
;
1493 /* Don't even think about framelessness except on the innermost frame
1494 or if the function was interrupted by a signal. */
1495 if (get_next_frame (fi
) != NULL
1496 && !(get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1499 func_start
= get_frame_func (fi
);
1501 /* If we failed to find the start of the function, it is a mistake
1502 to inspect the instructions. */
1506 /* A frame with a zero PC is usually created by dereferencing a NULL
1507 function pointer, normally causing an immediate core dump of the
1508 inferior. Mark function as frameless, as the inferior has no chance
1509 of setting up a stack frame. */
1510 if (get_frame_pc (fi
) == 0)
1516 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1517 return fdata
.frameless
;
1520 /* Return the PC saved in a frame. */
1523 rs6000_frame_saved_pc (struct frame_info
*fi
)
1525 CORE_ADDR func_start
;
1526 struct rs6000_framedata fdata
;
1527 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1528 int wordsize
= tdep
->wordsize
;
1530 if ((get_frame_type (fi
) == SIGTRAMP_FRAME
))
1531 return read_memory_addr (get_frame_base (fi
) + SIG_FRAME_PC_OFFSET
,
1534 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1535 get_frame_base (fi
),
1536 get_frame_base (fi
)))
1537 return deprecated_read_register_dummy (get_frame_pc (fi
),
1538 get_frame_base (fi
), PC_REGNUM
);
1540 func_start
= get_frame_func (fi
);
1542 /* If we failed to find the start of the function, it is a mistake
1543 to inspect the instructions. */
1547 (void) skip_prologue (func_start
, get_frame_pc (fi
), &fdata
);
1549 if (fdata
.lr_offset
== 0 && get_next_frame (fi
) != NULL
)
1551 if ((get_frame_type (get_next_frame (fi
)) == SIGTRAMP_FRAME
))
1552 return read_memory_addr ((get_frame_base (get_next_frame (fi
))
1553 + SIG_FRAME_LR_OFFSET
),
1555 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1556 /* The link register wasn't saved by this frame and the next
1557 (inner, newer) frame is a dummy. Get the link register
1558 value by unwinding it from that [dummy] frame. */
1561 frame_unwind_unsigned_register (get_next_frame (fi
),
1562 tdep
->ppc_lr_regnum
, &lr
);
1566 return read_memory_addr (DEPRECATED_FRAME_CHAIN (fi
)
1567 + tdep
->lr_frame_offset
,
1571 if (fdata
.lr_offset
== 0)
1572 return read_register (gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
);
1574 return read_memory_addr (DEPRECATED_FRAME_CHAIN (fi
) + fdata
.lr_offset
,
1578 /* If saved registers of frame FI are not known yet, read and cache them.
1579 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1580 in which case the framedata are read. */
1583 frame_get_saved_regs (struct frame_info
*fi
, struct rs6000_framedata
*fdatap
)
1585 CORE_ADDR frame_addr
;
1586 struct rs6000_framedata work_fdata
;
1587 struct gdbarch_tdep
* tdep
= gdbarch_tdep (current_gdbarch
);
1588 int wordsize
= tdep
->wordsize
;
1590 if (get_frame_saved_regs (fi
))
1595 fdatap
= &work_fdata
;
1596 (void) skip_prologue (get_frame_func (fi
), get_frame_pc (fi
), fdatap
);
1599 frame_saved_regs_zalloc (fi
);
1601 /* If there were any saved registers, figure out parent's stack
1603 /* The following is true only if the frame doesn't have a call to
1606 if (fdatap
->saved_fpr
== 0
1607 && fdatap
->saved_gpr
== 0
1608 && fdatap
->saved_vr
== 0
1609 && fdatap
->saved_ev
== 0
1610 && fdatap
->lr_offset
== 0
1611 && fdatap
->cr_offset
== 0
1612 && fdatap
->vr_offset
== 0
1613 && fdatap
->ev_offset
== 0)
1616 /* NOTE: cagney/2002-04-14: The ->frame points to the inner-most
1617 address of the current frame. Things might be easier if the
1618 ->frame pointed to the outer-most address of the frame. In the
1619 mean time, the address of the prev frame is used as the base
1620 address of this frame. */
1621 frame_addr
= DEPRECATED_FRAME_CHAIN (fi
);
1623 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1624 All fpr's from saved_fpr to fp31 are saved. */
1626 if (fdatap
->saved_fpr
>= 0)
1629 CORE_ADDR fpr_addr
= frame_addr
+ fdatap
->fpr_offset
;
1630 for (i
= fdatap
->saved_fpr
; i
< 32; i
++)
1632 get_frame_saved_regs (fi
)[FP0_REGNUM
+ i
] = fpr_addr
;
1637 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1638 All gpr's from saved_gpr to gpr31 are saved. */
1640 if (fdatap
->saved_gpr
>= 0)
1643 CORE_ADDR gpr_addr
= frame_addr
+ fdatap
->gpr_offset
;
1644 for (i
= fdatap
->saved_gpr
; i
< 32; i
++)
1646 get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = gpr_addr
;
1647 gpr_addr
+= wordsize
;
1651 /* if != -1, fdatap->saved_vr is the smallest number of saved_vr.
1652 All vr's from saved_vr to vr31 are saved. */
1653 if (tdep
->ppc_vr0_regnum
!= -1 && tdep
->ppc_vrsave_regnum
!= -1)
1655 if (fdatap
->saved_vr
>= 0)
1658 CORE_ADDR vr_addr
= frame_addr
+ fdatap
->vr_offset
;
1659 for (i
= fdatap
->saved_vr
; i
< 32; i
++)
1661 get_frame_saved_regs (fi
)[tdep
->ppc_vr0_regnum
+ i
] = vr_addr
;
1662 vr_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_vr0_regnum
);
1667 /* if != -1, fdatap->saved_ev is the smallest number of saved_ev.
1668 All vr's from saved_ev to ev31 are saved. ????? */
1669 if (tdep
->ppc_ev0_regnum
!= -1 && tdep
->ppc_ev31_regnum
!= -1)
1671 if (fdatap
->saved_ev
>= 0)
1674 CORE_ADDR ev_addr
= frame_addr
+ fdatap
->ev_offset
;
1675 for (i
= fdatap
->saved_ev
; i
< 32; i
++)
1677 get_frame_saved_regs (fi
)[tdep
->ppc_ev0_regnum
+ i
] = ev_addr
;
1678 get_frame_saved_regs (fi
)[tdep
->ppc_gp0_regnum
+ i
] = ev_addr
+ 4;
1679 ev_addr
+= REGISTER_RAW_SIZE (tdep
->ppc_ev0_regnum
);
1684 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1686 if (fdatap
->cr_offset
!= 0)
1687 get_frame_saved_regs (fi
)[tdep
->ppc_cr_regnum
] = frame_addr
+ fdatap
->cr_offset
;
1689 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1691 if (fdatap
->lr_offset
!= 0)
1692 get_frame_saved_regs (fi
)[tdep
->ppc_lr_regnum
] = frame_addr
+ fdatap
->lr_offset
;
1694 /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds
1696 if (fdatap
->vrsave_offset
!= 0)
1697 get_frame_saved_regs (fi
)[tdep
->ppc_vrsave_regnum
] = frame_addr
+ fdatap
->vrsave_offset
;
1700 /* Return the address of a frame. This is the inital %sp value when the frame
1701 was first allocated. For functions calling alloca(), it might be saved in
1702 an alloca register. */
1705 frame_initial_stack_address (struct frame_info
*fi
)
1708 struct rs6000_framedata fdata
;
1709 struct frame_info
*callee_fi
;
1711 /* If the initial stack pointer (frame address) of this frame is known,
1714 if (get_frame_extra_info (fi
)->initial_sp
)
1715 return get_frame_extra_info (fi
)->initial_sp
;
1717 /* Find out if this function is using an alloca register. */
1719 (void) skip_prologue (get_frame_func (fi
), get_frame_pc (fi
), &fdata
);
1721 /* If saved registers of this frame are not known yet, read and
1724 if (!get_frame_saved_regs (fi
))
1725 frame_get_saved_regs (fi
, &fdata
);
1727 /* If no alloca register used, then fi->frame is the value of the %sp for
1728 this frame, and it is good enough. */
1730 if (fdata
.alloca_reg
< 0)
1732 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1733 return get_frame_extra_info (fi
)->initial_sp
;
1736 /* There is an alloca register, use its value, in the current frame,
1737 as the initial stack pointer. */
1739 char tmpbuf
[MAX_REGISTER_SIZE
];
1740 if (frame_register_read (fi
, fdata
.alloca_reg
, tmpbuf
))
1742 get_frame_extra_info (fi
)->initial_sp
1743 = extract_unsigned_integer (tmpbuf
,
1744 REGISTER_RAW_SIZE (fdata
.alloca_reg
));
1747 /* NOTE: cagney/2002-04-17: At present the only time
1748 frame_register_read will fail is when the register isn't
1749 available. If that does happen, use the frame. */
1750 get_frame_extra_info (fi
)->initial_sp
= get_frame_base (fi
);
1752 return get_frame_extra_info (fi
)->initial_sp
;
1755 /* Describe the pointer in each stack frame to the previous stack frame
1758 /* DEPRECATED_FRAME_CHAIN takes a frame's nominal address and produces
1759 the frame's chain-pointer. */
1761 /* In the case of the RS/6000, the frame's nominal address
1762 is the address of a 4-byte word containing the calling frame's address. */
1765 rs6000_frame_chain (struct frame_info
*thisframe
)
1767 CORE_ADDR fp
, fpp
, lr
;
1768 int wordsize
= gdbarch_tdep (current_gdbarch
)->wordsize
;
1770 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (thisframe
),
1771 get_frame_base (thisframe
),
1772 get_frame_base (thisframe
)))
1773 /* A dummy frame always correctly chains back to the previous
1775 return read_memory_addr (get_frame_base (thisframe
), wordsize
);
1777 if (inside_entry_file (get_frame_pc (thisframe
))
1778 || get_frame_pc (thisframe
) == entry_point_address ())
1781 if ((get_frame_type (thisframe
) == SIGTRAMP_FRAME
))
1782 fp
= read_memory_addr (get_frame_base (thisframe
) + SIG_FRAME_FP_OFFSET
,
1784 else if (get_next_frame (thisframe
) != NULL
1785 && (get_frame_type (get_next_frame (thisframe
)) == SIGTRAMP_FRAME
)
1786 && FRAMELESS_FUNCTION_INVOCATION (thisframe
))
1787 /* A frameless function interrupted by a signal did not change the
1789 fp
= get_frame_base (thisframe
);
1791 fp
= read_memory_addr (get_frame_base (thisframe
), wordsize
);
1795 /* Return the size of register REG when words are WORDSIZE bytes long. If REG
1796 isn't available with that word size, return 0. */
1799 regsize (const struct reg
*reg
, int wordsize
)
1801 return wordsize
== 8 ? reg
->sz64
: reg
->sz32
;
1804 /* Return the name of register number N, or null if no such register exists
1805 in the current architecture. */
1808 rs6000_register_name (int n
)
1810 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1811 const struct reg
*reg
= tdep
->regs
+ n
;
1813 if (!regsize (reg
, tdep
->wordsize
))
1818 /* Index within `registers' of the first byte of the space for
1822 rs6000_register_byte (int n
)
1824 return gdbarch_tdep (current_gdbarch
)->regoff
[n
];
1827 /* Return the number of bytes of storage in the actual machine representation
1828 for register N if that register is available, else return 0. */
1831 rs6000_register_raw_size (int n
)
1833 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1834 const struct reg
*reg
= tdep
->regs
+ n
;
1835 return regsize (reg
, tdep
->wordsize
);
1838 /* Return the GDB type object for the "standard" data type
1839 of data in register N. */
1841 static struct type
*
1842 rs6000_register_virtual_type (int n
)
1844 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1845 const struct reg
*reg
= tdep
->regs
+ n
;
1848 return builtin_type_double
;
1851 int size
= regsize (reg
, tdep
->wordsize
);
1855 if (tdep
->ppc_ev0_regnum
<= n
&& n
<= tdep
->ppc_ev31_regnum
)
1856 return builtin_type_vec64
;
1858 return builtin_type_int64
;
1861 return builtin_type_vec128
;
1864 return builtin_type_int32
;
1870 /* Return whether register N requires conversion when moving from raw format
1873 The register format for RS/6000 floating point registers is always
1874 double, we need a conversion if the memory format is float. */
1877 rs6000_register_convertible (int n
)
1879 const struct reg
*reg
= gdbarch_tdep (current_gdbarch
)->regs
+ n
;
1883 /* Convert data from raw format for register N in buffer FROM
1884 to virtual format with type TYPE in buffer TO. */
1887 rs6000_register_convert_to_virtual (int n
, struct type
*type
,
1888 char *from
, char *to
)
1890 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1892 double val
= deprecated_extract_floating (from
, REGISTER_RAW_SIZE (n
));
1893 deprecated_store_floating (to
, TYPE_LENGTH (type
), val
);
1896 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1899 /* Convert data from virtual format with type TYPE in buffer FROM
1900 to raw format for register N in buffer TO. */
1903 rs6000_register_convert_to_raw (struct type
*type
, int n
,
1904 char *from
, char *to
)
1906 if (TYPE_LENGTH (type
) != REGISTER_RAW_SIZE (n
))
1908 double val
= deprecated_extract_floating (from
, TYPE_LENGTH (type
));
1909 deprecated_store_floating (to
, REGISTER_RAW_SIZE (n
), val
);
1912 memcpy (to
, from
, REGISTER_RAW_SIZE (n
));
1916 e500_pseudo_register_read (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1917 int reg_nr
, void *buffer
)
1921 char temp_buffer
[MAX_REGISTER_SIZE
];
1922 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1924 if (reg_nr
>= tdep
->ppc_gp0_regnum
1925 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1927 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1929 /* Build the value in the provided buffer. */
1930 /* Read the raw register of which this one is the lower portion. */
1931 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1932 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1934 memcpy ((char *) buffer
, temp_buffer
+ offset
, 4);
1939 e500_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1940 int reg_nr
, const void *buffer
)
1944 char temp_buffer
[MAX_REGISTER_SIZE
];
1945 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1947 if (reg_nr
>= tdep
->ppc_gp0_regnum
1948 && reg_nr
<= tdep
->ppc_gplast_regnum
)
1950 base_regnum
= reg_nr
- tdep
->ppc_gp0_regnum
+ tdep
->ppc_ev0_regnum
;
1951 /* reg_nr is 32 bit here, and base_regnum is 64 bits. */
1952 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1955 /* Let's read the value of the base register into a temporary
1956 buffer, so that overwriting the last four bytes with the new
1957 value of the pseudo will leave the upper 4 bytes unchanged. */
1958 regcache_raw_read (regcache
, base_regnum
, temp_buffer
);
1960 /* Write as an 8 byte quantity. */
1961 memcpy (temp_buffer
+ offset
, (char *) buffer
, 4);
1962 regcache_raw_write (regcache
, base_regnum
, temp_buffer
);
1966 /* Convert a dwarf2 register number to a gdb REGNUM. */
1968 e500_dwarf2_reg_to_regnum (int num
)
1971 if (0 <= num
&& num
<= 31)
1972 return num
+ gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
;
1977 /* Convert a dbx stab register number (from `r' declaration) to a gdb
1980 rs6000_stab_reg_to_regnum (int num
)
1986 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_mq_regnum
;
1989 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_lr_regnum
;
1992 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_ctr_regnum
;
1995 regnum
= gdbarch_tdep (current_gdbarch
)->ppc_xer_regnum
;
2004 /* Store the address of the place in which to copy the structure the
2005 subroutine will return. */
2008 rs6000_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2010 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2011 write_register (tdep
->ppc_gp0_regnum
+ 3, addr
);
2014 /* Write into appropriate registers a function return value
2015 of type TYPE, given in virtual format. */
2017 e500_store_return_value (struct type
*type
, char *valbuf
)
2019 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2021 /* Everything is returned in GPR3 and up. */
2024 int len
= TYPE_LENGTH (type
);
2025 while (copied
< len
)
2027 int regnum
= gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3 + i
;
2028 int reg_size
= REGISTER_RAW_SIZE (regnum
);
2029 char *reg_val_buf
= alloca (reg_size
);
2031 memcpy (reg_val_buf
, valbuf
+ copied
, reg_size
);
2033 deprecated_write_register_gen (regnum
, reg_val_buf
);
2039 rs6000_store_return_value (struct type
*type
, char *valbuf
)
2041 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2043 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2045 /* Floating point values are returned starting from FPR1 and up.
2046 Say a double_double_double type could be returned in
2047 FPR1/FPR2/FPR3 triple. */
2049 deprecated_write_register_bytes (REGISTER_BYTE (FP0_REGNUM
+ 1), valbuf
,
2050 TYPE_LENGTH (type
));
2051 else if (TYPE_CODE (type
) == TYPE_CODE_ARRAY
)
2053 if (TYPE_LENGTH (type
) == 16
2054 && TYPE_VECTOR (type
))
2055 deprecated_write_register_bytes (REGISTER_BYTE (tdep
->ppc_vr0_regnum
+ 2),
2056 valbuf
, TYPE_LENGTH (type
));
2059 /* Everything else is returned in GPR3 and up. */
2060 deprecated_write_register_bytes (REGISTER_BYTE (gdbarch_tdep (current_gdbarch
)->ppc_gp0_regnum
+ 3),
2061 valbuf
, TYPE_LENGTH (type
));
2064 /* Extract from an array REGBUF containing the (raw) register state
2065 the address in which a function should return its structure value,
2066 as a CORE_ADDR (or an expression that can be used as one). */
2069 rs6000_extract_struct_value_address (struct regcache
*regcache
)
2071 /* FIXME: cagney/2002-09-26: PR gdb/724: When making an inferior
2072 function call GDB knows the address of the struct return value
2073 and hence, should not need to call this function. Unfortunately,
2074 the current call_function_by_hand() code only saves the most
2075 recent struct address leading to occasional calls. The code
2076 should instead maintain a stack of such addresses (in the dummy
2078 /* NOTE: cagney/2002-09-26: Return 0 which indicates that we've
2079 really got no idea where the return value is being stored. While
2080 r3, on function entry, contained the address it will have since
2081 been reused (scratch) and hence wouldn't be valid */
2085 /* Return whether PC is in a dummy function call.
2087 FIXME: This just checks for the end of the stack, which is broken
2088 for things like stepping through gcc nested function stubs. */
2091 rs6000_pc_in_call_dummy (CORE_ADDR pc
, CORE_ADDR sp
, CORE_ADDR fp
)
2093 return sp
< pc
&& pc
< fp
;
2096 /* Hook called when a new child process is started. */
2099 rs6000_create_inferior (int pid
)
2101 if (rs6000_set_host_arch_hook
)
2102 rs6000_set_host_arch_hook (pid
);
2105 /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
2107 Usually a function pointer's representation is simply the address
2108 of the function. On the RS/6000 however, a function pointer is
2109 represented by a pointer to a TOC entry. This TOC entry contains
2110 three words, the first word is the address of the function, the
2111 second word is the TOC pointer (r2), and the third word is the
2112 static chain value. Throughout GDB it is currently assumed that a
2113 function pointer contains the address of the function, which is not
2114 easy to fix. In addition, the conversion of a function address to
2115 a function pointer would require allocation of a TOC entry in the
2116 inferior's memory space, with all its drawbacks. To be able to
2117 call C++ virtual methods in the inferior (which are called via
2118 function pointers), find_function_addr uses this function to get the
2119 function address from a function pointer. */
2121 /* Return real function address if ADDR (a function pointer) is in the data
2122 space and is therefore a special function pointer. */
2125 rs6000_convert_from_func_ptr_addr (CORE_ADDR addr
)
2127 struct obj_section
*s
;
2129 s
= find_pc_section (addr
);
2130 if (s
&& s
->the_bfd_section
->flags
& SEC_CODE
)
2133 /* ADDR is in the data space, so it's a special function pointer. */
2134 return read_memory_addr (addr
, gdbarch_tdep (current_gdbarch
)->wordsize
);
2138 /* Handling the various POWER/PowerPC variants. */
2141 /* The arrays here called registers_MUMBLE hold information about available
2144 For each family of PPC variants, I've tried to isolate out the
2145 common registers and put them up front, so that as long as you get
2146 the general family right, GDB will correctly identify the registers
2147 common to that family. The common register sets are:
2149 For the 60x family: hid0 hid1 iabr dabr pir
2151 For the 505 and 860 family: eie eid nri
2153 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
2154 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
2157 Most of these register groups aren't anything formal. I arrived at
2158 them by looking at the registers that occurred in more than one
2161 Note: kevinb/2002-04-30: Support for the fpscr register was added
2162 during April, 2002. Slot 70 is being used for PowerPC and slot 71
2163 for Power. For PowerPC, slot 70 was unused and was already in the
2164 PPC_UISA_SPRS which is ideally where fpscr should go. For Power,
2165 slot 70 was being used for "mq", so the next available slot (71)
2166 was chosen. It would have been nice to be able to make the
2167 register numbers the same across processor cores, but this wasn't
2168 possible without either 1) renumbering some registers for some
2169 processors or 2) assigning fpscr to a really high slot that's
2170 larger than any current register number. Doing (1) is bad because
2171 existing stubs would break. Doing (2) is undesirable because it
2172 would introduce a really large gap between fpscr and the rest of
2173 the registers for most processors. */
2175 /* Convenience macros for populating register arrays. */
2177 /* Within another macro, convert S to a string. */
2181 /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
2182 and 64 bits on 64-bit systems. */
2183 #define R(name) { STR(name), 4, 8, 0, 0 }
2185 /* Return a struct reg defining register NAME that's 32 bits on all
2187 #define R4(name) { STR(name), 4, 4, 0, 0 }
2189 /* Return a struct reg defining register NAME that's 64 bits on all
2191 #define R8(name) { STR(name), 8, 8, 0, 0 }
2193 /* Return a struct reg defining register NAME that's 128 bits on all
2195 #define R16(name) { STR(name), 16, 16, 0, 0 }
2197 /* Return a struct reg defining floating-point register NAME. */
2198 #define F(name) { STR(name), 8, 8, 1, 0 }
2200 /* Return a struct reg defining a pseudo register NAME. */
2201 #define P(name) { STR(name), 4, 8, 0, 1}
2203 /* Return a struct reg defining register NAME that's 32 bits on 32-bit
2204 systems and that doesn't exist on 64-bit systems. */
2205 #define R32(name) { STR(name), 4, 0, 0, 0 }
2207 /* Return a struct reg defining register NAME that's 64 bits on 64-bit
2208 systems and that doesn't exist on 32-bit systems. */
2209 #define R64(name) { STR(name), 0, 8, 0, 0 }
2211 /* Return a struct reg placeholder for a register that doesn't exist. */
2212 #define R0 { 0, 0, 0, 0, 0 }
2214 /* UISA registers common across all architectures, including POWER. */
2216 #define COMMON_UISA_REGS \
2217 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2218 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2219 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2220 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2221 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
2222 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
2223 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
2224 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
2225 /* 64 */ R(pc), R(ps)
2227 #define COMMON_UISA_NOFP_REGS \
2228 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
2229 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
2230 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
2231 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
2232 /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2233 /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2234 /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2235 /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \
2236 /* 64 */ R(pc), R(ps)
2238 /* UISA-level SPRs for PowerPC. */
2239 #define PPC_UISA_SPRS \
2240 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr)
2242 /* UISA-level SPRs for PowerPC without floating point support. */
2243 #define PPC_UISA_NOFP_SPRS \
2244 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
2246 /* Segment registers, for PowerPC. */
2247 #define PPC_SEGMENT_REGS \
2248 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
2249 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
2250 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
2251 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
2253 /* OEA SPRs for PowerPC. */
2254 #define PPC_OEA_SPRS \
2256 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
2257 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
2258 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
2259 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
2260 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
2261 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
2262 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
2263 /* 116 */ R4(dec), R(dabr), R4(ear)
2265 /* AltiVec registers. */
2266 #define PPC_ALTIVEC_REGS \
2267 /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \
2268 /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \
2269 /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \
2270 /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \
2271 /*151*/R4(vscr), R4(vrsave)
2273 /* Vectors of hi-lo general purpose registers. */
2274 #define PPC_EV_REGS \
2275 /* 0*/R8(ev0), R8(ev1), R8(ev2), R8(ev3), R8(ev4), R8(ev5), R8(ev6), R8(ev7), \
2276 /* 8*/R8(ev8), R8(ev9), R8(ev10),R8(ev11),R8(ev12),R8(ev13),R8(ev14),R8(ev15), \
2277 /*16*/R8(ev16),R8(ev17),R8(ev18),R8(ev19),R8(ev20),R8(ev21),R8(ev22),R8(ev23), \
2278 /*24*/R8(ev24),R8(ev25),R8(ev26),R8(ev27),R8(ev28),R8(ev29),R8(ev30),R8(ev31)
2280 /* Lower half of the EV registers. */
2281 #define PPC_GPRS_PSEUDO_REGS \
2282 /* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
2283 /* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
2284 /* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
2285 /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31)
2287 /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
2288 user-level SPR's. */
2289 static const struct reg registers_power
[] =
2292 /* 66 */ R4(cnd
), R(lr
), R(cnt
), R4(xer
), R4(mq
),
2296 /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
2297 view of the PowerPC. */
2298 static const struct reg registers_powerpc
[] =
2305 /* PowerPC UISA - a PPC processor as viewed by user-level
2306 code, but without floating point registers. */
2307 static const struct reg registers_powerpc_nofp
[] =
2309 COMMON_UISA_NOFP_REGS
,
2313 /* IBM PowerPC 403. */
2314 static const struct reg registers_403
[] =
2320 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2321 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2322 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2323 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2324 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2325 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
)
2328 /* IBM PowerPC 403GC. */
2329 static const struct reg registers_403GC
[] =
2335 /* 119 */ R(icdbdr
), R(esr
), R(dear
), R(evpr
),
2336 /* 123 */ R(cdbcr
), R(tsr
), R(tcr
), R(pit
),
2337 /* 127 */ R(tbhi
), R(tblo
), R(srr2
), R(srr3
),
2338 /* 131 */ R(dbsr
), R(dbcr
), R(iac1
), R(iac2
),
2339 /* 135 */ R(dac1
), R(dac2
), R(dccr
), R(iccr
),
2340 /* 139 */ R(pbl1
), R(pbu1
), R(pbl2
), R(pbu2
),
2341 /* 143 */ R(zpr
), R(pid
), R(sgr
), R(dcwr
),
2342 /* 147 */ R(tbhu
), R(tblu
)
2345 /* Motorola PowerPC 505. */
2346 static const struct reg registers_505
[] =
2352 /* 119 */ R(eie
), R(eid
), R(nri
)
2355 /* Motorola PowerPC 860 or 850. */
2356 static const struct reg registers_860
[] =
2362 /* 119 */ R(eie
), R(eid
), R(nri
), R(cmpa
),
2363 /* 123 */ R(cmpb
), R(cmpc
), R(cmpd
), R(icr
),
2364 /* 127 */ R(der
), R(counta
), R(countb
), R(cmpe
),
2365 /* 131 */ R(cmpf
), R(cmpg
), R(cmph
), R(lctrl1
),
2366 /* 135 */ R(lctrl2
), R(ictrl
), R(bar
), R(ic_cst
),
2367 /* 139 */ R(ic_adr
), R(ic_dat
), R(dc_cst
), R(dc_adr
),
2368 /* 143 */ R(dc_dat
), R(dpdr
), R(dpir
), R(immr
),
2369 /* 147 */ R(mi_ctr
), R(mi_ap
), R(mi_epn
), R(mi_twc
),
2370 /* 151 */ R(mi_rpn
), R(md_ctr
), R(m_casid
), R(md_ap
),
2371 /* 155 */ R(md_epn
), R(md_twb
), R(md_twc
), R(md_rpn
),
2372 /* 159 */ R(m_tw
), R(mi_dbcam
), R(mi_dbram0
), R(mi_dbram1
),
2373 /* 163 */ R(md_dbcam
), R(md_dbram0
), R(md_dbram1
)
2376 /* Motorola PowerPC 601. Note that the 601 has different register numbers
2377 for reading and writing RTCU and RTCL. However, how one reads and writes a
2378 register is the stub's problem. */
2379 static const struct reg registers_601
[] =
2385 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2386 /* 123 */ R(pir
), R(mq
), R(rtcu
), R(rtcl
)
2389 /* Motorola PowerPC 602. */
2390 static const struct reg registers_602
[] =
2396 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2397 /* 123 */ R0
, R(tcr
), R(ibr
), R(esassr
),
2398 /* 127 */ R(sebr
), R(ser
), R(sp
), R(lt
)
2401 /* Motorola/IBM PowerPC 603 or 603e. */
2402 static const struct reg registers_603
[] =
2408 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R0
,
2409 /* 123 */ R0
, R(dmiss
), R(dcmp
), R(hash1
),
2410 /* 127 */ R(hash2
), R(imiss
), R(icmp
), R(rpa
)
2413 /* Motorola PowerPC 604 or 604e. */
2414 static const struct reg registers_604
[] =
2420 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2421 /* 123 */ R(pir
), R(mmcr0
), R(pmc1
), R(pmc2
),
2422 /* 127 */ R(sia
), R(sda
)
2425 /* Motorola/IBM PowerPC 750 or 740. */
2426 static const struct reg registers_750
[] =
2432 /* 119 */ R(hid0
), R(hid1
), R(iabr
), R(dabr
),
2433 /* 123 */ R0
, R(ummcr0
), R(upmc1
), R(upmc2
),
2434 /* 127 */ R(usia
), R(ummcr1
), R(upmc3
), R(upmc4
),
2435 /* 131 */ R(mmcr0
), R(pmc1
), R(pmc2
), R(sia
),
2436 /* 135 */ R(mmcr1
), R(pmc3
), R(pmc4
), R(l2cr
),
2437 /* 139 */ R(ictc
), R(thrm1
), R(thrm2
), R(thrm3
)
2441 /* Motorola PowerPC 7400. */
2442 static const struct reg registers_7400
[] =
2444 /* gpr0-gpr31, fpr0-fpr31 */
2446 /* ctr, xre, lr, cr */
2451 /* vr0-vr31, vrsave, vscr */
2453 /* FIXME? Add more registers? */
2456 /* Motorola e500. */
2457 static const struct reg registers_e500
[] =
2460 /* cr, lr, ctr, xer, "" */
2464 R8(acc
), R(spefscr
),
2465 /* NOTE: Add new registers here the end of the raw register
2466 list and just before the first pseudo register. */
2468 PPC_GPRS_PSEUDO_REGS
2471 /* Information about a particular processor variant. */
2475 /* Name of this variant. */
2478 /* English description of the variant. */
2481 /* bfd_arch_info.arch corresponding to variant. */
2482 enum bfd_architecture arch
;
2484 /* bfd_arch_info.mach corresponding to variant. */
2487 /* Number of real registers. */
2490 /* Number of pseudo registers. */
2493 /* Number of total registers (the sum of nregs and npregs). */
2496 /* Table of register names; registers[R] is the name of the register
2498 const struct reg
*regs
;
2501 #define tot_num_registers(list) (sizeof (list) / sizeof((list)[0]))
2504 num_registers (const struct reg
*reg_list
, int num_tot_regs
)
2509 for (i
= 0; i
< num_tot_regs
; i
++)
2510 if (!reg_list
[i
].pseudo
)
2517 num_pseudo_registers (const struct reg
*reg_list
, int num_tot_regs
)
2522 for (i
= 0; i
< num_tot_regs
; i
++)
2523 if (reg_list
[i
].pseudo
)
2529 /* Information in this table comes from the following web sites:
2530 IBM: http://www.chips.ibm.com:80/products/embedded/
2531 Motorola: http://www.mot.com/SPS/PowerPC/
2533 I'm sure I've got some of the variant descriptions not quite right.
2534 Please report any inaccuracies you find to GDB's maintainer.
2536 If you add entries to this table, please be sure to allow the new
2537 value as an argument to the --with-cpu flag, in configure.in. */
2539 static struct variant variants
[] =
2542 {"powerpc", "PowerPC user-level", bfd_arch_powerpc
,
2543 bfd_mach_ppc
, -1, -1, tot_num_registers (registers_powerpc
),
2545 {"power", "POWER user-level", bfd_arch_rs6000
,
2546 bfd_mach_rs6k
, -1, -1, tot_num_registers (registers_power
),
2548 {"403", "IBM PowerPC 403", bfd_arch_powerpc
,
2549 bfd_mach_ppc_403
, -1, -1, tot_num_registers (registers_403
),
2551 {"601", "Motorola PowerPC 601", bfd_arch_powerpc
,
2552 bfd_mach_ppc_601
, -1, -1, tot_num_registers (registers_601
),
2554 {"602", "Motorola PowerPC 602", bfd_arch_powerpc
,
2555 bfd_mach_ppc_602
, -1, -1, tot_num_registers (registers_602
),
2557 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc
,
2558 bfd_mach_ppc_603
, -1, -1, tot_num_registers (registers_603
),
2560 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc
,
2561 604, -1, -1, tot_num_registers (registers_604
),
2563 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc
,
2564 bfd_mach_ppc_403gc
, -1, -1, tot_num_registers (registers_403GC
),
2566 {"505", "Motorola PowerPC 505", bfd_arch_powerpc
,
2567 bfd_mach_ppc_505
, -1, -1, tot_num_registers (registers_505
),
2569 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc
,
2570 bfd_mach_ppc_860
, -1, -1, tot_num_registers (registers_860
),
2572 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc
,
2573 bfd_mach_ppc_750
, -1, -1, tot_num_registers (registers_750
),
2575 {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc
,
2576 bfd_mach_ppc_7400
, -1, -1, tot_num_registers (registers_7400
),
2578 {"e500", "Motorola PowerPC e500", bfd_arch_powerpc
,
2579 bfd_mach_ppc_e500
, -1, -1, tot_num_registers (registers_e500
),
2583 {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc
,
2584 bfd_mach_ppc64
, -1, -1, tot_num_registers (registers_powerpc
),
2586 {"620", "Motorola PowerPC 620", bfd_arch_powerpc
,
2587 bfd_mach_ppc_620
, -1, -1, tot_num_registers (registers_powerpc
),
2589 {"630", "Motorola PowerPC 630", bfd_arch_powerpc
,
2590 bfd_mach_ppc_630
, -1, -1, tot_num_registers (registers_powerpc
),
2592 {"a35", "PowerPC A35", bfd_arch_powerpc
,
2593 bfd_mach_ppc_a35
, -1, -1, tot_num_registers (registers_powerpc
),
2595 {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc
,
2596 bfd_mach_ppc_rs64ii
, -1, -1, tot_num_registers (registers_powerpc
),
2598 {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc
,
2599 bfd_mach_ppc_rs64iii
, -1, -1, tot_num_registers (registers_powerpc
),
2602 /* FIXME: I haven't checked the register sets of the following. */
2603 {"rs1", "IBM POWER RS1", bfd_arch_rs6000
,
2604 bfd_mach_rs6k_rs1
, -1, -1, tot_num_registers (registers_power
),
2606 {"rsc", "IBM POWER RSC", bfd_arch_rs6000
,
2607 bfd_mach_rs6k_rsc
, -1, -1, tot_num_registers (registers_power
),
2609 {"rs2", "IBM POWER RS2", bfd_arch_rs6000
,
2610 bfd_mach_rs6k_rs2
, -1, -1, tot_num_registers (registers_power
),
2613 {0, 0, 0, 0, 0, 0, 0, 0}
2616 /* Initialize the number of registers and pseudo registers in each variant. */
2619 init_variants (void)
2623 for (v
= variants
; v
->name
; v
++)
2626 v
->nregs
= num_registers (v
->regs
, v
->num_tot_regs
);
2627 if (v
->npregs
== -1)
2628 v
->npregs
= num_pseudo_registers (v
->regs
, v
->num_tot_regs
);
2632 /* Return the variant corresponding to architecture ARCH and machine number
2633 MACH. If no such variant exists, return null. */
2635 static const struct variant
*
2636 find_variant_by_arch (enum bfd_architecture arch
, unsigned long mach
)
2638 const struct variant
*v
;
2640 for (v
= variants
; v
->name
; v
++)
2641 if (arch
== v
->arch
&& mach
== v
->mach
)
2648 gdb_print_insn_powerpc (bfd_vma memaddr
, disassemble_info
*info
)
2650 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2651 return print_insn_big_powerpc (memaddr
, info
);
2653 return print_insn_little_powerpc (memaddr
, info
);
2656 /* Initialize the current architecture based on INFO. If possible, re-use an
2657 architecture from ARCHES, which is a list of architectures already created
2658 during this debugging session.
2660 Called e.g. at program startup, when reading a core file, and when reading
2663 static struct gdbarch
*
2664 rs6000_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2666 struct gdbarch
*gdbarch
;
2667 struct gdbarch_tdep
*tdep
;
2668 int wordsize
, from_xcoff_exec
, from_elf_exec
, power
, i
, off
;
2670 const struct variant
*v
;
2671 enum bfd_architecture arch
;
2677 from_xcoff_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2678 bfd_get_flavour (info
.abfd
) == bfd_target_xcoff_flavour
;
2680 from_elf_exec
= info
.abfd
&& info
.abfd
->format
== bfd_object
&&
2681 bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2683 sysv_abi
= info
.abfd
&& bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
;
2685 /* Check word size. If INFO is from a binary file, infer it from
2686 that, else choose a likely default. */
2687 if (from_xcoff_exec
)
2689 if (bfd_xcoff_is_xcoff64 (info
.abfd
))
2694 else if (from_elf_exec
)
2696 if (elf_elfheader (info
.abfd
)->e_ident
[EI_CLASS
] == ELFCLASS64
)
2703 if (info
.bfd_arch_info
!= NULL
&& info
.bfd_arch_info
->bits_per_word
!= 0)
2704 wordsize
= info
.bfd_arch_info
->bits_per_word
/
2705 info
.bfd_arch_info
->bits_per_byte
;
2710 /* Find a candidate among extant architectures. */
2711 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2713 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
2715 /* Word size in the various PowerPC bfd_arch_info structs isn't
2716 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2717 separate word size check. */
2718 tdep
= gdbarch_tdep (arches
->gdbarch
);
2719 if (tdep
&& tdep
->wordsize
== wordsize
)
2720 return arches
->gdbarch
;
2723 /* None found, create a new architecture from INFO, whose bfd_arch_info
2724 validity depends on the source:
2725 - executable useless
2726 - rs6000_host_arch() good
2728 - "set arch" trust blindly
2729 - GDB startup useless but harmless */
2731 if (!from_xcoff_exec
)
2733 arch
= info
.bfd_arch_info
->arch
;
2734 mach
= info
.bfd_arch_info
->mach
;
2738 arch
= bfd_arch_powerpc
;
2739 bfd_default_set_arch_mach (&abfd
, arch
, 0);
2740 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2741 mach
= info
.bfd_arch_info
->mach
;
2743 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2744 tdep
->wordsize
= wordsize
;
2746 /* For e500 executables, the apuinfo section is of help here. Such
2747 section contains the identifier and revision number of each
2748 Application-specific Processing Unit that is present on the
2749 chip. The content of the section is determined by the assembler
2750 which looks at each instruction and determines which unit (and
2751 which version of it) can execute it. In our case we just look for
2752 the existance of the section. */
2756 sect
= bfd_get_section_by_name (info
.abfd
, ".PPC.EMB.apuinfo");
2759 arch
= info
.bfd_arch_info
->arch
;
2760 mach
= bfd_mach_ppc_e500
;
2761 bfd_default_set_arch_mach (&abfd
, arch
, mach
);
2762 info
.bfd_arch_info
= bfd_get_arch_info (&abfd
);
2766 gdbarch
= gdbarch_alloc (&info
, tdep
);
2767 power
= arch
== bfd_arch_rs6000
;
2769 /* Initialize the number of real and pseudo registers in each variant. */
2772 /* Choose variant. */
2773 v
= find_variant_by_arch (arch
, mach
);
2777 tdep
->regs
= v
->regs
;
2779 tdep
->ppc_gp0_regnum
= 0;
2780 tdep
->ppc_gplast_regnum
= 31;
2781 tdep
->ppc_toc_regnum
= 2;
2782 tdep
->ppc_ps_regnum
= 65;
2783 tdep
->ppc_cr_regnum
= 66;
2784 tdep
->ppc_lr_regnum
= 67;
2785 tdep
->ppc_ctr_regnum
= 68;
2786 tdep
->ppc_xer_regnum
= 69;
2787 if (v
->mach
== bfd_mach_ppc_601
)
2788 tdep
->ppc_mq_regnum
= 124;
2790 tdep
->ppc_mq_regnum
= 70;
2792 tdep
->ppc_mq_regnum
= -1;
2793 tdep
->ppc_fpscr_regnum
= power
? 71 : 70;
2795 set_gdbarch_pc_regnum (gdbarch
, 64);
2796 set_gdbarch_sp_regnum (gdbarch
, 1);
2797 set_gdbarch_deprecated_fp_regnum (gdbarch
, 1);
2798 set_gdbarch_deprecated_extract_return_value (gdbarch
,
2799 rs6000_extract_return_value
);
2800 set_gdbarch_deprecated_store_return_value (gdbarch
, rs6000_store_return_value
);
2802 if (v
->arch
== bfd_arch_powerpc
)
2806 tdep
->ppc_vr0_regnum
= 71;
2807 tdep
->ppc_vrsave_regnum
= 104;
2808 tdep
->ppc_ev0_regnum
= -1;
2809 tdep
->ppc_ev31_regnum
= -1;
2811 case bfd_mach_ppc_7400
:
2812 tdep
->ppc_vr0_regnum
= 119;
2813 tdep
->ppc_vrsave_regnum
= 152;
2814 tdep
->ppc_ev0_regnum
= -1;
2815 tdep
->ppc_ev31_regnum
= -1;
2817 case bfd_mach_ppc_e500
:
2818 tdep
->ppc_gp0_regnum
= 41;
2819 tdep
->ppc_gplast_regnum
= tdep
->ppc_gp0_regnum
+ 32 - 1;
2820 tdep
->ppc_toc_regnum
= -1;
2821 tdep
->ppc_ps_regnum
= 1;
2822 tdep
->ppc_cr_regnum
= 2;
2823 tdep
->ppc_lr_regnum
= 3;
2824 tdep
->ppc_ctr_regnum
= 4;
2825 tdep
->ppc_xer_regnum
= 5;
2826 tdep
->ppc_ev0_regnum
= 7;
2827 tdep
->ppc_ev31_regnum
= 38;
2828 set_gdbarch_pc_regnum (gdbarch
, 0);
2829 set_gdbarch_sp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2830 set_gdbarch_deprecated_fp_regnum (gdbarch
, tdep
->ppc_gp0_regnum
+ 1);
2831 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, e500_dwarf2_reg_to_regnum
);
2832 set_gdbarch_pseudo_register_read (gdbarch
, e500_pseudo_register_read
);
2833 set_gdbarch_pseudo_register_write (gdbarch
, e500_pseudo_register_write
);
2834 set_gdbarch_extract_return_value (gdbarch
, e500_extract_return_value
);
2835 set_gdbarch_deprecated_store_return_value (gdbarch
, e500_store_return_value
);
2838 tdep
->ppc_vr0_regnum
= -1;
2839 tdep
->ppc_vrsave_regnum
= -1;
2840 tdep
->ppc_ev0_regnum
= -1;
2841 tdep
->ppc_ev31_regnum
= -1;
2845 /* Sanity check on registers. */
2846 gdb_assert (strcmp (tdep
->regs
[tdep
->ppc_gp0_regnum
].name
, "r0") == 0);
2848 /* Set lr_frame_offset. */
2850 tdep
->lr_frame_offset
= 16;
2852 tdep
->lr_frame_offset
= 4;
2854 tdep
->lr_frame_offset
= 8;
2856 /* Calculate byte offsets in raw register array. */
2857 tdep
->regoff
= xmalloc (v
->num_tot_regs
* sizeof (int));
2858 for (i
= off
= 0; i
< v
->num_tot_regs
; i
++)
2860 tdep
->regoff
[i
] = off
;
2861 off
+= regsize (v
->regs
+ i
, wordsize
);
2864 /* Select instruction printer. */
2866 set_gdbarch_print_insn (gdbarch
, print_insn_rs6000
);
2868 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_powerpc
);
2870 set_gdbarch_read_pc (gdbarch
, generic_target_read_pc
);
2871 set_gdbarch_write_pc (gdbarch
, generic_target_write_pc
);
2872 set_gdbarch_read_sp (gdbarch
, generic_target_read_sp
);
2873 set_gdbarch_deprecated_dummy_write_sp (gdbarch
, generic_target_write_sp
);
2875 set_gdbarch_num_regs (gdbarch
, v
->nregs
);
2876 set_gdbarch_num_pseudo_regs (gdbarch
, v
->npregs
);
2877 set_gdbarch_register_name (gdbarch
, rs6000_register_name
);
2878 set_gdbarch_deprecated_register_size (gdbarch
, wordsize
);
2879 set_gdbarch_deprecated_register_bytes (gdbarch
, off
);
2880 set_gdbarch_register_byte (gdbarch
, rs6000_register_byte
);
2881 set_gdbarch_register_raw_size (gdbarch
, rs6000_register_raw_size
);
2882 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, 16);
2883 set_gdbarch_register_virtual_size (gdbarch
, generic_register_size
);
2884 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, 16);
2885 set_gdbarch_register_virtual_type (gdbarch
, rs6000_register_virtual_type
);
2887 set_gdbarch_ptr_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2888 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
2889 set_gdbarch_int_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2890 set_gdbarch_long_bit (gdbarch
, wordsize
* TARGET_CHAR_BIT
);
2891 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2892 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
2893 set_gdbarch_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2895 set_gdbarch_long_double_bit (gdbarch
, 16 * TARGET_CHAR_BIT
);
2897 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
2898 set_gdbarch_char_signed (gdbarch
, 0);
2900 set_gdbarch_deprecated_fix_call_dummy (gdbarch
, rs6000_fix_call_dummy
);
2901 set_gdbarch_frame_align (gdbarch
, rs6000_frame_align
);
2902 set_gdbarch_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);
2903 set_gdbarch_deprecated_push_return_address (gdbarch
, ppc_push_return_address
);
2904 set_gdbarch_believe_pcc_promotion (gdbarch
, 1);
2906 set_gdbarch_register_convertible (gdbarch
, rs6000_register_convertible
);
2907 set_gdbarch_register_convert_to_virtual (gdbarch
, rs6000_register_convert_to_virtual
);
2908 set_gdbarch_register_convert_to_raw (gdbarch
, rs6000_register_convert_to_raw
);
2909 set_gdbarch_stab_reg_to_regnum (gdbarch
, rs6000_stab_reg_to_regnum
);
2910 /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments()
2911 is correct for the SysV ABI when the wordsize is 8, but I'm also
2912 fairly certain that ppc_sysv_abi_push_arguments() will give even
2913 worse results since it only works for 32-bit code. So, for the moment,
2914 we're better off calling rs6000_push_arguments() since it works for
2915 64-bit code. At some point in the future, this matter needs to be
2917 if (sysv_abi
&& wordsize
== 4)
2918 set_gdbarch_deprecated_push_arguments (gdbarch
, ppc_sysv_abi_push_arguments
);
2920 set_gdbarch_deprecated_push_arguments (gdbarch
, rs6000_push_arguments
);
2922 set_gdbarch_deprecated_store_struct_return (gdbarch
, rs6000_store_struct_return
);
2923 set_gdbarch_extract_struct_value_address (gdbarch
, rs6000_extract_struct_value_address
);
2924 set_gdbarch_deprecated_pop_frame (gdbarch
, rs6000_pop_frame
);
2926 set_gdbarch_skip_prologue (gdbarch
, rs6000_skip_prologue
);
2927 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2928 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2929 set_gdbarch_function_start_offset (gdbarch
, 0);
2930 set_gdbarch_breakpoint_from_pc (gdbarch
, rs6000_breakpoint_from_pc
);
2932 /* Not sure on this. FIXMEmgo */
2933 set_gdbarch_frame_args_skip (gdbarch
, 8);
2936 set_gdbarch_use_struct_convention (gdbarch
,
2937 ppc_sysv_abi_use_struct_convention
);
2939 set_gdbarch_use_struct_convention (gdbarch
,
2940 generic_use_struct_convention
);
2942 set_gdbarch_frameless_function_invocation (gdbarch
,
2943 rs6000_frameless_function_invocation
);
2944 set_gdbarch_deprecated_frame_chain (gdbarch
, rs6000_frame_chain
);
2945 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, rs6000_frame_saved_pc
);
2947 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, rs6000_frame_init_saved_regs
);
2948 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, rs6000_init_extra_frame_info
);
2952 /* Handle RS/6000 function pointers (which are really function
2954 set_gdbarch_convert_from_func_ptr_addr (gdbarch
,
2955 rs6000_convert_from_func_ptr_addr
);
2957 set_gdbarch_frame_args_address (gdbarch
, rs6000_frame_args_address
);
2958 set_gdbarch_frame_locals_address (gdbarch
, rs6000_frame_args_address
);
2959 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, rs6000_saved_pc_after_call
);
2961 /* We can't tell how many args there are
2962 now that the C compiler delays popping them. */
2963 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
2965 /* Hook in ABI-specific overrides, if they have been registered. */
2966 gdbarch_init_osabi (info
, gdbarch
);
2972 rs6000_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2974 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2979 /* FIXME: Dump gdbarch_tdep. */
2982 static struct cmd_list_element
*info_powerpc_cmdlist
= NULL
;
2985 rs6000_info_powerpc_command (char *args
, int from_tty
)
2987 help_list (info_powerpc_cmdlist
, "info powerpc ", class_info
, gdb_stdout
);
2990 /* Initialization code. */
2993 _initialize_rs6000_tdep (void)
2995 gdbarch_register (bfd_arch_rs6000
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2996 gdbarch_register (bfd_arch_powerpc
, rs6000_gdbarch_init
, rs6000_dump_tdep
);
2998 /* Add root prefix command for "info powerpc" commands */
2999 add_prefix_cmd ("powerpc", class_info
, rs6000_info_powerpc_command
,
3000 "Various POWERPC info specific commands.",
3001 &info_powerpc_cmdlist
, "info powerpc ", 0, &infolist
);