gdb/rs6000-xdep.c

   1 /* IBM RS/6000 host-dependent code for GDB, the GNU debugger.
   2    Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
   3
   4 This file is part of GDB.
   5
   6 This program is free software; you can redistribute it and/or modify
   7 it under the terms of the GNU General Public License as published by
   8 the Free Software Foundation; either version 2 of the License, or
   9 (at your option) any later version.
  10
  11 This program is distributed in the hope that it will be useful,
  12 but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 GNU General Public License for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with this program; if not, write to the Free Software
  18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
  19
  20 #include "defs.h"
  21 #include "frame.h"
  22 #include "inferior.h"
  23 #include "symtab.h"
  24 #include "target.h"
  25
  26 #include <sys/param.h>
  27 #include <sys/dir.h>
  28 #include <sys/user.h>
  29 #include <signal.h>
  30 #include <sys/ioctl.h>
  31 #include <fcntl.h>
  32
  33 #include <sys/ptrace.h>
  34 #include <sys/reg.h>
  35
  36 #include <a.out.h>
  37 #include <sys/file.h>
  38 #include <sys/stat.h>
  39 #include <sys/core.h>
  40 #include <sys/ldr.h>
  41 #include <sys/utsname.h>
  42
  43 extern int errno;
  44 extern int attach_flag;
  45
  46 /* Conversion from gdb-to-system special purpose register numbers.. */
  47
  48 static int special_regs[] = {
  49   IAR,                          /* PC_REGNUM    */
  50   MSR,                          /* PS_REGNUM    */
  51   CR,                           /* CR_REGNUM    */
  52   LR,                           /* LR_REGNUM    */
  53   CTR,                          /* CTR_REGNUM   */
  54   XER,                          /* XER_REGNUM   */
  55   MQ                            /* MQ_REGNUM    */
  56 };
  57
  58
  59 /* Nonzero if we just simulated a single step break. */
  60 extern int one_stepped;
  61
  62 extern struct obstack frame_cache_obstack;
  63
  64 \f
  65 void
  66 fetch_inferior_registers (regno)
  67   int regno;
  68 {
  69   int ii;
  70   extern char registers[];
  71
  72   if (regno < 0) {                      /* for all registers */
  73
  74     /* read 32 general purpose registers. */
  75
  76     for (ii=0; ii < 32; ++ii)
  77       *(int*)&registers[REGISTER_BYTE (ii)] =
  78         ptrace (PT_READ_GPR, inferior_pid, ii, 0, 0);
  79
  80     /* read general purpose floating point registers. */
  81
  82     for (ii=0; ii < 32; ++ii)
  83       ptrace (PT_READ_FPR, inferior_pid,
  84         (int*)&registers [REGISTER_BYTE (FP0_REGNUM+ii)], FPR0+ii, 0);
  85
  86     /* read special registers. */
  87     for (ii=0; ii <= LAST_SP_REGNUM-FIRST_SP_REGNUM; ++ii)
  88       *(int*)&registers[REGISTER_BYTE (FIRST_SP_REGNUM+ii)] =
  89         ptrace (PT_READ_GPR, inferior_pid, special_regs[ii], 0, 0);
  90
  91     registers_fetched ();
  92     return;
  93   }
  94
  95   /* else an individual register is addressed. */
  96
  97   else if (regno < FP0_REGNUM) {                /* a GPR */
  98     *(int*)&registers[REGISTER_BYTE (regno)] =
  99         ptrace (PT_READ_GPR, inferior_pid, regno, 0, 0);
 100   }
 101   else if (regno <= FPLAST_REGNUM) {            /* a FPR */
 102     ptrace (PT_READ_FPR, inferior_pid,
 103         (int*)&registers [REGISTER_BYTE (regno)], (regno-FP0_REGNUM+FPR0), 0);
 104   }
 105   else if (regno <= LAST_SP_REGNUM) {           /* a special register */
 106     *(int*)&registers[REGISTER_BYTE (regno)] =
 107         ptrace (PT_READ_GPR, inferior_pid,
 108                 special_regs[regno-FIRST_SP_REGNUM], 0, 0);
 109   }
 110   else
 111     fprintf (stderr, "gdb error: register no %d not implemented.\n", regno);
 112
 113   register_valid [regno] = 1;
 114 }
 115
 116 /* Store our register values back into the inferior.
 117    If REGNO is -1, do this for all registers.
 118    Otherwise, REGNO specifies which register (so we can save time).  */
 119
 120 void
 121 store_inferior_registers (regno)
 122      int regno;
 123 {
 124   extern char registers[];
 125
 126   errno = 0;
 127
 128   if (regno == -1) {                    /* for all registers..  */
 129       int ii;
 130
 131        /* execute one dummy instruction (which is a breakpoint) in inferior
 132           process. So give kernel a chance to do internal house keeping.
 133           Otherwise the following ptrace(2) calls will mess up user stack
 134           since kernel will get confused about the bottom of the stack (%sp) */
 135
 136        exec_one_dummy_insn ();
 137
 138       /* write general purpose registers first! */
 139       for ( ii=GPR0; ii<=GPR31; ++ii) {
 140         ptrace (PT_WRITE_GPR, inferior_pid, ii,
 141                 *(int*)&registers[REGISTER_BYTE (ii)], 0);
 142         if ( errno ) {
 143           perror ("ptrace write_gpr"); errno = 0;
 144         }
 145       }
 146
 147       /* write floating point registers now. */
 148       for ( ii=0; ii < 32; ++ii) {
 149         ptrace (PT_WRITE_FPR, inferior_pid,
 150                   (int*)&registers[REGISTER_BYTE (FP0_REGNUM+ii)], FPR0+ii, 0);
 151         if ( errno ) {
 152           perror ("ptrace write_fpr"); errno = 0;
 153         }
 154       }
 155
 156       /* write special registers. */
 157       for (ii=0; ii <= LAST_SP_REGNUM-FIRST_SP_REGNUM; ++ii) {
 158         ptrace (PT_WRITE_GPR, inferior_pid, special_regs[ii],
 159                  *(int*)&registers[REGISTER_BYTE (FIRST_SP_REGNUM+ii)], 0);
 160         if ( errno ) {
 161           perror ("ptrace write_gpr"); errno = 0;
 162         }
 163       }
 164   }
 165
 166   /* else, a specific register number is given... */
 167
 168   else if (regno < FP0_REGNUM) {                /* a GPR */
 169
 170     ptrace (PT_WRITE_GPR, inferior_pid, regno,
 171                 *(int*)&registers[REGISTER_BYTE (regno)], 0);
 172   }
 173
 174   else if (regno <= FPLAST_REGNUM) {            /* a FPR */
 175     ptrace (PT_WRITE_FPR, inferior_pid,
 176         (int*)&registers[REGISTER_BYTE (regno)], regno-FP0_REGNUM+FPR0, 0);
 177   }
 178
 179   else if (regno <= LAST_SP_REGNUM) {           /* a special register */
 180
 181     ptrace (PT_WRITE_GPR, inferior_pid, special_regs [regno-FIRST_SP_REGNUM],
 182                 *(int*)&registers[REGISTER_BYTE (regno)], 0);
 183   }
 184
 185   else
 186     fprintf (stderr, "Gdb error: register no %d not implemented.\n", regno);
 187
 188   if ( errno ) {
 189     perror ("ptrace write");  errno = 0;
 190   }
 191 }
 192
 193 void
 194 fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
 195      char *core_reg_sect;
 196      unsigned core_reg_size;
 197      int which;
 198      unsigned int reg_addr;     /* Unused in this version */
 199 {
 200   /* fetch GPRs and special registers from the first register section
 201      in core bfd. */
 202   if (which == 0) {
 203
 204     /* copy GPRs first. */
 205     bcopy (core_reg_sect, registers, 32 * 4);
 206
 207     /* gdb's internal register template and bfd's register section layout
 208        should share a common include file. FIXMEmgo */
 209     /* then comes special registes. They are supposed to be in the same
 210        order in gdb template and bfd `.reg' section. */
 211     core_reg_sect += (32 * 4);
 212     bcopy (core_reg_sect, &registers [REGISTER_BYTE (FIRST_SP_REGNUM)],
 213                         (LAST_SP_REGNUM - FIRST_SP_REGNUM + 1) * 4);
 214   }
 215
 216   /* fetch floating point registers from register section 2 in core bfd. */
 217   else if (which == 2)
 218     bcopy (core_reg_sect, &registers [REGISTER_BYTE (FP0_REGNUM)], 32 * 8);
 219
 220   else
 221     fprintf (stderr, "Gdb error: unknown parameter to fetch_core_registers().\n");
 222 }
 223
 224
 225 frameless_function_invocation (fi)
 226 struct frame_info *fi;
 227 {
 228   CORE_ADDR func_start;
 229   struct aix_framedata fdata;
 230
 231   func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
 232
 233   /* If we failed to find the start of the function, it is a mistake
 234      to inspect the instructions. */
 235
 236   if (!func_start)
 237     return 0;
 238
 239   function_frame_info (func_start, &fdata);
 240   return fdata.frameless;
 241 }
 242
 243
 244 /* If saved registers of frame FI are not known yet, read and cache them.
 245    &FDATAP contains aix_framedata; TDATAP can be NULL,
 246    in which case the framedata are read.
 247  */
 248
 249 static void
 250 frame_get_cache_fsr (fi, fdatap)
 251      struct frame_info *fi;
 252      struct aix_framedata *fdatap;
 253 {
 254   int ii;
 255   CORE_ADDR frame_addr;
 256   struct aix_framedata work_fdata;
 257   if (fi->cache_fsr)
 258     return;
 259
 260   if (fdatap == NULL) {
 261     fdatap = &work_fdata;
 262     function_frame_info (get_pc_function_start (fi->pc), fdatap);
 263   }
 264
 265   fi->cache_fsr = (struct frame_saved_regs *)
 266       obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
 267   bzero (fi->cache_fsr, sizeof (struct frame_saved_regs));
 268
 269   if (fi->prev && fi->prev->frame)
 270     frame_addr = fi->prev->frame;
 271   else
 272     frame_addr = read_memory_integer (fi->frame, 4);
 273
 274   /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
 275      All fpr's from saved_fpr to fp31 are saved right underneath caller
 276      stack pointer, starting from fp31 first. */
 277
 278   if (fdatap->saved_fpr >= 0) {
 279     for (ii=31; ii >= fdatap->saved_fpr; --ii)
 280       fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8);
 281     frame_addr -= (32 - fdatap->saved_fpr) * 8;
 282   }
 283
 284   /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
 285      All gpr's from saved_gpr to gpr31 are saved right under saved fprs,
 286      starting from r31 first. */
 287
 288   if (fdatap->saved_gpr >= 0)
 289     for (ii=31; ii >= fdatap->saved_gpr; --ii)
 290       fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4);
 291 }
 292
 293 /* Return the address of a frame. This is the inital %sp value when the frame
 294    was first allocated. For functions calling alloca(), it might be saved in
 295    an alloca register. */
 296
 297 CORE_ADDR
 298 frame_initial_stack_address (fi)
 299      struct frame_info *fi;
 300 {
 301   CORE_ADDR tmpaddr;
 302   struct aix_framedata fdata;
 303   struct frame_info *callee_fi;
 304
 305   /* if the initial stack pointer (frame address) of this frame is known,
 306      just return it. */
 307
 308   if (fi->initial_sp)
 309     return fi->initial_sp;
 310
 311   /* find out if this function is using an alloca register.. */
 312
 313   function_frame_info (get_pc_function_start (fi->pc), &fdata);
 314
 315   /* if saved registers of this frame are not known yet, read and cache them. */
 316
 317   if (!fi->cache_fsr)
 318     frame_get_cache_fsr (fi, &fdata);
 319
 320   /* If no alloca register used, then fi->frame is the value of the %sp for
 321      this frame, and it is good enough. */
 322
 323   if (fdata.alloca_reg < 0) {
 324     fi->initial_sp = fi->frame;
 325     return fi->initial_sp;
 326   }
 327
 328   /* This function has an alloca register. If this is the top-most frame
 329      (with the lowest address), the value in alloca register is good. */
 330
 331   if (!fi->next)
 332     return fi->initial_sp = read_register (fdata.alloca_reg);
 333
 334   /* Otherwise, this is a caller frame. Callee has usually already saved
 335      registers, but there are exceptions (such as when the callee
 336      has no parameters). Find the address in which caller's alloca
 337      register is saved. */
 338
 339   for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
 340
 341     if (!callee_fi->cache_fsr)
 342       frame_get_cache_fsr (fi, NULL);
 343
 344     /* this is the address in which alloca register is saved. */
 345
 346     tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
 347     if (tmpaddr) {
 348       fi->initial_sp = read_memory_integer (tmpaddr, 4);
 349       return fi->initial_sp;
 350     }
 351
 352     /* Go look into deeper levels of the frame chain to see if any one of
 353        the callees has saved alloca register. */
 354   }
 355
 356   /* If alloca register was not saved, by the callee (or any of its callees)
 357      then the value in the register is still good. */
 358
 359   return fi->initial_sp = read_register (fdata.alloca_reg);
 360 }
 361
 362
 363
 364 /* aixcoff_relocate_symtab -    hook for symbol table relocation.
 365    also reads shared libraries.. */
 366
 367 aixcoff_relocate_symtab (pid)
 368 unsigned int pid;
 369 {
 370 #define MAX_LOAD_SEGS 64                /* maximum number of load segments */
 371
 372     struct ld_info *ldi;
 373     int temp;
 374
 375     ldi = (void *) alloca(MAX_LOAD_SEGS * sizeof (*ldi));
 376
 377     /* According to my humble theory, aixcoff has some timing problems and
 378        when the user stack grows, kernel doesn't update stack info in time
 379        and ptrace calls step on user stack. That is why we sleep here a little,
 380        and give kernel to update its internals. */
 381
 382     usleep (36000);
 383
 384     errno = 0;
 385     ptrace(PT_LDINFO, pid, ldi, MAX_LOAD_SEGS * sizeof(*ldi), ldi);
 386     if (errno) {
 387       perror_with_name ("ptrace ldinfo");
 388       return 0;
 389     }
 390
 391     vmap_ldinfo(ldi);
 392
 393    do {
 394      add_text_to_loadinfo (ldi->ldinfo_textorg, ldi->ldinfo_dataorg);
 395     } while (ldi->ldinfo_next
 396              && (ldi = (void *) (ldi->ldinfo_next + (char *) ldi)));
 397
 398 #if 0
 399   /* Now that we've jumbled things around, re-sort them.  */
 400   sort_minimal_symbols ();
 401 #endif
 402
 403   /* relocate the exec and core sections as well. */
 404   vmap_exec ();
 405 }
 406
 407
 408 /* Keep an array of load segment information and their TOC table addresses.
 409    This info will be useful when calling a shared library function by hand. */
 410
 411 typedef struct {
 412   unsigned long textorg, dataorg, toc_offset;
 413 } LoadInfo;
 414
 415 #define LOADINFOLEN     10
 416
 417 static  LoadInfo *loadInfo = NULL;
 418 static  int     loadInfoLen = 0;
 419 static  int     loadInfoTocIndex = 0;
 420 int     aix_loadInfoTextIndex = 0;
 421
 422
 423 xcoff_init_loadinfo ()
 424 {
 425   loadInfoTocIndex = 0;
 426   aix_loadInfoTextIndex = 0;
 427
 428   if (loadInfoLen == 0) {
 429     loadInfo = (void*) xmalloc (sizeof (LoadInfo) * LOADINFOLEN);
 430     loadInfoLen = LOADINFOLEN;
 431   }
 432 }
 433
 434
 435 free_loadinfo ()
 436 {
 437   if (loadInfo)
 438     free (loadInfo);
 439   loadInfo = NULL;
 440   loadInfoLen = 0;
 441   loadInfoTocIndex = 0;
 442   aix_loadInfoTextIndex = 0;
 443 }
 444
 445
 446 xcoff_add_toc_to_loadinfo (unsigned long tocaddr)
 447 {
 448   while (loadInfoTocIndex >= loadInfoLen) {
 449     loadInfoLen += LOADINFOLEN;
 450     loadInfo = (void*) xrealloc (loadInfo, sizeof(LoadInfo) * loadInfoLen);
 451   }
 452   loadInfo [loadInfoTocIndex++].toc_offset = tocaddr;
 453 }
 454
 455
 456 add_text_to_loadinfo (unsigned long textaddr, unsigned long dataaddr)
 457 {
 458   while (aix_loadInfoTextIndex >= loadInfoLen) {
 459     loadInfoLen += LOADINFOLEN;
 460     loadInfo = (void*) xrealloc (loadInfo, sizeof(LoadInfo) * loadInfoLen);
 461   }
 462   loadInfo [aix_loadInfoTextIndex].textorg = textaddr;
 463   loadInfo [aix_loadInfoTextIndex].dataorg = dataaddr;
 464   ++aix_loadInfoTextIndex;
 465 }
 466
 467
 468 unsigned long
 469 find_toc_address (unsigned long pc)
 470 {
 471   int ii, toc_entry, tocbase = 0;
 472
 473   for (ii=0; ii < aix_loadInfoTextIndex; ++ii)
 474     if (pc > loadInfo [ii].textorg && loadInfo [ii].textorg > tocbase) {
 475       toc_entry = ii;
 476       tocbase =  loadInfo [ii].textorg;
 477     }
 478
 479   return loadInfo [toc_entry].dataorg + loadInfo [toc_entry].toc_offset;
 480 }
 481
 482
 483 /* execute one dummy breakpoint instruction. This way we give kernel
 484    a chance to do some housekeeping and update inferior's internal data,
 485    including u_area. */
 486
 487 exec_one_dummy_insn ()
 488 {
 489 #define DUMMY_INSN_ADDR (TEXT_SEGMENT_BASE)+0x200
 490
 491   unsigned long shadow;
 492   unsigned int status, pid;
 493
 494   /* We plant one dummy breakpoint into DUMMY_INSN_ADDR address. We assume that
 495      this address will never be executed again by the real code. */
 496
 497   target_insert_breakpoint (DUMMY_INSN_ADDR, &shadow);
 498
 499   errno = 0;
 500   ptrace (PT_CONTINUE, inferior_pid, DUMMY_INSN_ADDR, 0, 0);
 501   if (errno)
 502     perror ("pt_continue");
 503
 504   do {
 505     pid = wait (&status);
 506   } while (pid != inferior_pid);
 507
 508   target_remove_breakpoint (DUMMY_INSN_ADDR, &shadow);
 509 }
 510
 511
 512 #if 0
 513
 514    *** not needed anymore ***
 515
 516 /* Return the number of initial trap signals we need to ignore once the inferior
 517    process starts running. This will be `2' for aix-3.1, `3' for aix-3.2 */
 518
 519 int
 520 aix_starting_inferior_traps ()
 521 {
 522   struct utsname unamebuf;
 523
 524   if (uname (&unamebuf) == -1)
 525     fatal ("uname(3) failed.");
 526
 527   /* Assume the future versions will behave like 3.2 and return '3' for
 528      anything other than 3.1x. The extra trap in 3.2 is the "trap after the
 529      program is loaded" signal. */
 530
 531   if (unamebuf.version[0] == '3' && unamebuf.release[0] == '1')
 532     return 2;
 533   else
 534     return 3;
 535 }
 536 #endif