1 /* IBM RS/6000 host-dependent code for GDB, the GNU debugger.
2 Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
26 #include <sys/param.h>
30 #include <sys/ioctl.h>
33 #include <sys/ptrace.h>
41 #include <sys/utsname.h>
44 extern int attach_flag
;
46 /* Conversion from gdb-to-system special purpose register numbers.. */
48 static int special_regs
[] = {
59 /* Nonzero if we just simulated a single step break. */
60 extern int one_stepped
;
62 extern char register_valid
[];
63 extern struct obstack frame_cache_obstack
;
67 fetch_inferior_registers (regno
)
71 extern char registers
[];
73 if (regno
< 0) { /* for all registers */
75 /* read 32 general purpose registers. */
77 for (ii
=0; ii
< 32; ++ii
)
78 *(int*)®isters
[REGISTER_BYTE (ii
)] =
79 ptrace (PT_READ_GPR
, inferior_pid
, ii
, 0, 0);
81 /* read general purpose floating point registers. */
83 for (ii
=0; ii
< 32; ++ii
)
84 ptrace (PT_READ_FPR
, inferior_pid
,
85 (int*)®isters
[REGISTER_BYTE (FP0_REGNUM
+ii
)], FPR0
+ii
, 0);
87 /* read special registers. */
88 for (ii
=0; ii
<= LAST_SP_REGNUM
-FIRST_SP_REGNUM
; ++ii
)
89 *(int*)®isters
[REGISTER_BYTE (FIRST_SP_REGNUM
+ii
)] =
90 ptrace (PT_READ_GPR
, inferior_pid
, special_regs
[ii
], 0, 0);
96 /* else an individual register is addressed. */
98 else if (regno
< FP0_REGNUM
) { /* a GPR */
99 *(int*)®isters
[REGISTER_BYTE (regno
)] =
100 ptrace (PT_READ_GPR
, inferior_pid
, regno
, 0, 0);
102 else if (regno
<= FPLAST_REGNUM
) { /* a FPR */
103 ptrace (PT_READ_FPR
, inferior_pid
,
104 (int*)®isters
[REGISTER_BYTE (regno
)], (regno
-FP0_REGNUM
+FPR0
), 0);
106 else if (regno
<= LAST_SP_REGNUM
) { /* a special register */
107 *(int*)®isters
[REGISTER_BYTE (regno
)] =
108 ptrace (PT_READ_GPR
, inferior_pid
,
109 special_regs
[regno
-FIRST_SP_REGNUM
], 0, 0);
112 fprintf (stderr
, "gdb error: register no %d not implemented.\n", regno
);
114 register_valid
[regno
] = 1;
117 /* Store our register values back into the inferior.
118 If REGNO is -1, do this for all registers.
119 Otherwise, REGNO specifies which register (so we can save time). */
122 store_inferior_registers (regno
)
125 extern char registers
[];
129 if (regno
== -1) { /* for all registers.. */
132 /* execute one dummy instruction (which is a breakpoint) in inferior
133 process. So give kernel a chance to do internal house keeping.
134 Otherwise the following ptrace(2) calls will mess up user stack
135 since kernel will get confused about the bottom of the stack (%sp) */
137 exec_one_dummy_insn ();
139 /* write general purpose registers first! */
140 for ( ii
=GPR0
; ii
<=GPR31
; ++ii
) {
141 ptrace (PT_WRITE_GPR
, inferior_pid
, ii
,
142 *(int*)®isters
[REGISTER_BYTE (ii
)], 0);
144 perror ("ptrace write_gpr"); errno
= 0;
148 /* write floating point registers now. */
149 for ( ii
=0; ii
< 32; ++ii
) {
150 ptrace (PT_WRITE_FPR
, inferior_pid
,
151 (int*)®isters
[REGISTER_BYTE (FP0_REGNUM
+ii
)], FPR0
+ii
, 0);
153 perror ("ptrace write_fpr"); errno
= 0;
157 /* write special registers. */
158 for (ii
=0; ii
<= LAST_SP_REGNUM
-FIRST_SP_REGNUM
; ++ii
) {
159 ptrace (PT_WRITE_GPR
, inferior_pid
, special_regs
[ii
],
160 *(int*)®isters
[REGISTER_BYTE (FIRST_SP_REGNUM
+ii
)], 0);
162 perror ("ptrace write_gpr"); errno
= 0;
167 /* else, a specific register number is given... */
169 else if (regno
< FP0_REGNUM
) { /* a GPR */
171 ptrace (PT_WRITE_GPR
, inferior_pid
, regno
,
172 *(int*)®isters
[REGISTER_BYTE (regno
)], 0);
175 else if (regno
<= FPLAST_REGNUM
) { /* a FPR */
176 ptrace (PT_WRITE_FPR
, inferior_pid
,
177 (int*)®isters
[REGISTER_BYTE (regno
)], regno
-FP0_REGNUM
+FPR0
, 0);
180 else if (regno
<= LAST_SP_REGNUM
) { /* a special register */
182 ptrace (PT_WRITE_GPR
, inferior_pid
, special_regs
[regno
-FIRST_SP_REGNUM
],
183 *(int*)®isters
[REGISTER_BYTE (regno
)], 0);
187 fprintf (stderr
, "Gdb error: register no %d not implemented.\n", regno
);
190 perror ("ptrace write"); errno
= 0;
195 fetch_core_registers (core_reg_sect
, core_reg_size
, which
, reg_addr
)
197 unsigned core_reg_size
;
199 unsigned int reg_addr
; /* Unused in this version */
201 /* fetch GPRs and special registers from the first register section
205 /* copy GPRs first. */
206 bcopy (core_reg_sect
, registers
, 32 * 4);
208 /* gdb's internal register template and bfd's register section layout
209 should share a common include file. FIXMEmgo */
210 /* then comes special registes. They are supposed to be in the same
211 order in gdb template and bfd `.reg' section. */
212 core_reg_sect
+= (32 * 4);
213 bcopy (core_reg_sect
, ®isters
[REGISTER_BYTE (FIRST_SP_REGNUM
)],
214 (LAST_SP_REGNUM
- FIRST_SP_REGNUM
+ 1) * 4);
217 /* fetch floating point registers from register section 2 in core bfd. */
219 bcopy (core_reg_sect
, ®isters
[REGISTER_BYTE (FP0_REGNUM
)], 32 * 8);
222 fprintf (stderr
, "Gdb error: unknown parameter to fetch_core_registers().\n");
226 frameless_function_invocation (fi
)
227 struct frame_info
*fi
;
229 CORE_ADDR func_start
;
230 struct aix_framedata fdata
;
232 func_start
= get_pc_function_start (fi
->pc
) + FUNCTION_START_OFFSET
;
234 /* If we failed to find the start of the function, it is a mistake
235 to inspect the instructions. */
240 function_frame_info (func_start
, &fdata
);
241 return fdata
.frameless
;
245 /* If saved registers of frame FI are not known yet, read and cache them.
246 &FDATAP contains aix_framedata; TDATAP can be NULL,
247 in which case the framedata are read.
251 frame_get_cache_fsr (fi
, fdatap
)
252 struct frame_info
*fi
;
253 struct aix_framedata
*fdatap
;
256 CORE_ADDR frame_addr
;
257 struct aix_framedata work_fdata
;
262 fdatap
= &work_fdata
;
263 function_frame_info (get_pc_function_start (fi
->pc
), fdatap
);
266 fi
->cache_fsr
= (struct frame_saved_regs
*)
267 obstack_alloc (&frame_cache_obstack
, sizeof (struct frame_saved_regs
));
268 bzero (fi
->cache_fsr
, sizeof (struct frame_saved_regs
));
270 if (fi
->prev
&& fi
->prev
->frame
)
271 frame_addr
= fi
->prev
->frame
;
273 frame_addr
= read_memory_integer (fi
->frame
, 4);
275 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
276 All fpr's from saved_fpr to fp31 are saved right underneath caller
277 stack pointer, starting from fp31 first. */
279 if (fdatap
->saved_fpr
>= 0) {
280 for (ii
=31; ii
>= fdatap
->saved_fpr
; --ii
)
281 fi
->cache_fsr
->regs
[FP0_REGNUM
+ ii
] = frame_addr
- ((32 - ii
) * 8);
282 frame_addr
-= (32 - fdatap
->saved_fpr
) * 8;
285 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
286 All gpr's from saved_gpr to gpr31 are saved right under saved fprs,
287 starting from r31 first. */
289 if (fdatap
->saved_gpr
>= 0)
290 for (ii
=31; ii
>= fdatap
->saved_gpr
; --ii
)
291 fi
->cache_fsr
->regs
[ii
] = frame_addr
- ((32 - ii
) * 4);
294 /* Return the address of a frame. This is the inital %sp value when the frame
295 was first allocated. For functions calling alloca(), it might be saved in
296 an alloca register. */
299 frame_initial_stack_address (fi
)
300 struct frame_info
*fi
;
303 struct aix_framedata fdata
;
304 struct frame_info
*callee_fi
;
306 /* if the initial stack pointer (frame address) of this frame is known,
310 return fi
->initial_sp
;
312 /* find out if this function is using an alloca register.. */
314 function_frame_info (get_pc_function_start (fi
->pc
), &fdata
);
316 /* if saved registers of this frame are not known yet, read and cache them. */
319 frame_get_cache_fsr (fi
, &fdata
);
321 /* If no alloca register used, then fi->frame is the value of the %sp for
322 this frame, and it is good enough. */
324 if (fdata
.alloca_reg
< 0) {
325 fi
->initial_sp
= fi
->frame
;
326 return fi
->initial_sp
;
329 /* This function has an alloca register. If this is the top-most frame
330 (with the lowest address), the value in alloca register is good. */
333 return fi
->initial_sp
= read_register (fdata
.alloca_reg
);
335 /* Otherwise, this is a caller frame. Callee has usually already saved
336 registers, but there are are exceptions (such as when the callee
337 has no parameters). Find the address in which caller's alloca
338 register is saved. */
340 for (callee_fi
= fi
->next
; callee_fi
; callee_fi
= callee_fi
->next
) {
342 if (!callee_fi
->cache_fsr
)
343 frame_get_cache_fsr (fi
, NULL
);
345 /* this is the address in which alloca register is saved. */
347 tmpaddr
= callee_fi
->cache_fsr
->regs
[fdata
.alloca_reg
];
349 fi
->initial_sp
= read_memory_integer (tmpaddr
, 4);
350 return fi
->initial_sp
;
353 /* Go look into deeper levels of the frame chain to see if any one of
354 the callees has saved alloca register. */
357 /* If alloca register was not saved, by the callee (or any of its callees)
358 then the value in the register is still good. */
360 return fi
->initial_sp
= read_register (fdata
.alloca_reg
);
365 /* aixcoff_relocate_symtab - hook for symbol table relocation.
366 also reads shared libraries.. */
368 aixcoff_relocate_symtab (pid
)
371 #define MAX_LOAD_SEGS 64 /* maximum number of load segments */
376 ldi
= (void *) alloca(MAX_LOAD_SEGS
* sizeof (*ldi
));
378 /* According to my humble theory, aixcoff has some timing problems and
379 when the user stack grows, kernel doesn't update stack info in time
380 and ptrace calls step on user stack. That is why we sleep here a little,
381 and give kernel to update its internals. */
386 ptrace(PT_LDINFO
, pid
, ldi
, MAX_LOAD_SEGS
* sizeof(*ldi
), ldi
);
388 perror_with_name ("ptrace ldinfo");
395 add_text_to_loadinfo (ldi
->ldinfo_textorg
, ldi
->ldinfo_dataorg
);
396 } while (ldi
->ldinfo_next
397 && (ldi
= (void *) (ldi
->ldinfo_next
+ (char *) ldi
)));
400 /* Now that we've jumbled things around, re-sort them. */
401 sort_minimal_symbols ();
404 /* relocate the exec and core sections as well. */
409 /* Keep an array of load segment information and their TOC table addresses.
410 This info will be useful when calling a shared library function by hand. */
413 unsigned long textorg
, dataorg
, toc_offset
;
416 #define LOADINFOLEN 10
418 static LoadInfo
*loadInfo
= NULL
;
419 static int loadInfoLen
= 0;
420 static int loadInfoTocIndex
= 0;
421 int aix_loadInfoTextIndex
= 0;
424 xcoff_init_loadinfo ()
426 loadInfoTocIndex
= 0;
427 aix_loadInfoTextIndex
= 0;
429 if (loadInfoLen
== 0) {
430 loadInfo
= (void*) xmalloc (sizeof (LoadInfo
) * LOADINFOLEN
);
431 loadInfoLen
= LOADINFOLEN
;
442 loadInfoTocIndex
= 0;
443 aix_loadInfoTextIndex
= 0;
447 xcoff_add_toc_to_loadinfo (unsigned long tocaddr
)
449 while (loadInfoTocIndex
>= loadInfoLen
) {
450 loadInfoLen
+= LOADINFOLEN
;
451 loadInfo
= (void*) xrealloc (loadInfo
, sizeof(LoadInfo
) * loadInfoLen
);
453 loadInfo
[loadInfoTocIndex
++].toc_offset
= tocaddr
;
457 add_text_to_loadinfo (unsigned long textaddr
, unsigned long dataaddr
)
459 while (aix_loadInfoTextIndex
>= loadInfoLen
) {
460 loadInfoLen
+= LOADINFOLEN
;
461 loadInfo
= (void*) xrealloc (loadInfo
, sizeof(LoadInfo
) * loadInfoLen
);
463 loadInfo
[aix_loadInfoTextIndex
].textorg
= textaddr
;
464 loadInfo
[aix_loadInfoTextIndex
].dataorg
= dataaddr
;
465 ++aix_loadInfoTextIndex
;
470 find_toc_address (unsigned long pc
)
472 int ii
, toc_entry
, tocbase
= 0;
474 for (ii
=0; ii
< aix_loadInfoTextIndex
; ++ii
)
475 if (pc
> loadInfo
[ii
].textorg
&& loadInfo
[ii
].textorg
> tocbase
) {
477 tocbase
= loadInfo
[ii
].textorg
;
480 return loadInfo
[toc_entry
].dataorg
+ loadInfo
[toc_entry
].toc_offset
;
484 /* execute one dummy breakpoint instruction. This way we give kernel
485 a chance to do some housekeeping and update inferior's internal data,
488 exec_one_dummy_insn ()
490 #define DUMMY_INSN_ADDR (TEXT_SEGMENT_BASE)+0x200
492 unsigned long shadow
;
493 unsigned int status
, pid
;
495 /* We plant one dummy breakpoint into DUMMY_INSN_ADDR address. We assume that
496 this address will never be executed again by the real code. */
498 target_insert_breakpoint (DUMMY_INSN_ADDR
, &shadow
);
501 ptrace (PT_CONTINUE
, inferior_pid
, DUMMY_INSN_ADDR
, 0, 0);
503 perror ("pt_continue");
506 pid
= wait (&status
);
507 } while (pid
!= inferior_pid
);
509 target_remove_breakpoint (DUMMY_INSN_ADDR
, &shadow
);
513 /* Return the number of initial trap signals we need to ignore once the inferior
514 process starts running. This will be `2' for aix-3.1, `3' for aix-3.2 */
517 aix_starting_inferior_traps ()
519 struct utsname unamebuf
;
521 if (uname (&unamebuf
) == -1)
522 fatal ("uname(3) failed.");
524 /* Assume the future versions will behave like 3.2 and return '3' for
525 anything other than 3.1x. The extra trap in 3.2 is the "trap after the
526 program is loaded" signal. */
528 if (unamebuf
.version
[0] == '3' && unamebuf
.release
[0] == '1')