1 /* Target-dependent code for the S12Z, for the GDB.
2 Copyright (C) 2018-2022 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19 /* Much of this file is shamelessly copied from or1k-tdep.c and others. */
23 #include "arch-utils.h"
24 #include "dwarf2/frame.h"
25 #include "gdbsupport/errors.h"
26 #include "frame-unwind.h"
30 #include "opcode/s12z.h"
31 #include "trad-frame.h"
33 #include "opcodes/s12z-opc.h"
37 /* Two of the registers included in S12Z_N_REGISTERS are
38 the CCH and CCL "registers" which are just views into
40 #define N_PHYSICAL_REGISTERS (S12Z_N_REGISTERS - 2)
43 /* A permutation of all the physical registers. Indexing this array
44 with an integer from gdb's internal representation will return the
46 static const int reg_perm
[N_PHYSICAL_REGISTERS
] =
63 /* The inverse of the above permutation. Indexing this
64 array with a register enum (e.g. REG_D2) will return the register
65 number in gdb's internal representation. */
66 static const int inv_reg_perm
[N_PHYSICAL_REGISTERS
] =
68 2, 3, 4, 5, /* d2, d3, d4, d5 */
71 8, 9, 10, 11, 12 /* x, y, s, p, ccw */
74 /* Return the name of the register REGNUM. */
76 s12z_register_name (struct gdbarch
*gdbarch
, int regnum
)
78 /* Registers is declared in opcodes/s12z.h. */
79 return registers
[reg_perm
[regnum
]].name
;
83 s12z_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
85 CORE_ADDR start_pc
= 0;
87 if (find_pc_partial_function (pc
, NULL
, &start_pc
, NULL
))
89 CORE_ADDR prologue_end
= skip_prologue_using_sal (gdbarch
, pc
);
91 if (prologue_end
!= 0)
95 warning (_("%s Failed to find end of prologue PC = %08x"),
96 __FUNCTION__
, (unsigned int) pc
);
102 s12z_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
104 switch (registers
[reg_perm
[reg_nr
]].bytes
)
107 return builtin_type (gdbarch
)->builtin_uint8
;
109 return builtin_type (gdbarch
)->builtin_uint16
;
111 return builtin_type (gdbarch
)->builtin_uint24
;
113 return builtin_type (gdbarch
)->builtin_uint32
;
115 return builtin_type (gdbarch
)->builtin_uint32
;
117 return builtin_type (gdbarch
)->builtin_int0
;
122 s12z_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int num
)
126 case 15: return REG_S
;
127 case 7: return REG_X
;
128 case 8: return REG_Y
;
129 case 42: return REG_D0
;
130 case 43: return REG_D1
;
131 case 44: return REG_D2
;
132 case 45: return REG_D3
;
133 case 46: return REG_D4
;
134 case 47: return REG_D5
;
135 case 48: return REG_D6
;
136 case 49: return REG_D7
;
142 /* Support functions for frame handling. */
145 /* Return a disassemble_info initialized for s12z disassembly, however,
146 the disassembler will not actually print anything. */
148 static struct disassemble_info
149 s12z_disassemble_info (struct gdbarch
*gdbarch
)
151 struct disassemble_info di
;
152 init_disassemble_info_for_no_printing (&di
);
153 di
.arch
= gdbarch_bfd_arch_info (gdbarch
)->arch
;
154 di
.mach
= gdbarch_bfd_arch_info (gdbarch
)->mach
;
155 di
.endian
= gdbarch_byte_order (gdbarch
);
156 di
.read_memory_func
= [](bfd_vma memaddr
, gdb_byte
*myaddr
,
157 unsigned int len
, struct disassemble_info
*info
)
159 return target_read_code (memaddr
, myaddr
, len
);
165 /* A struct (based on mem_read_abstraction_base) to read memory
166 through the disassemble_info API. */
167 struct mem_read_abstraction
169 struct mem_read_abstraction_base base
; /* The parent struct. */
170 bfd_vma memaddr
; /* Where to read from. */
171 struct disassemble_info
* info
; /* The disassembler to use for reading. */
174 /* Advance the reader by one byte. */
176 advance (struct mem_read_abstraction_base
*b
)
178 struct mem_read_abstraction
*mra
= (struct mem_read_abstraction
*) b
;
182 /* Return the current position of the reader. */
184 posn (struct mem_read_abstraction_base
*b
)
186 struct mem_read_abstraction
*mra
= (struct mem_read_abstraction
*) b
;
190 /* Read the N bytes at OFFSET using B. The bytes read are stored in BYTES.
191 It is the caller's responsibility to ensure that this is of at least N
194 abstract_read_memory (struct mem_read_abstraction_base
*b
,
196 size_t n
, bfd_byte
*bytes
)
198 struct mem_read_abstraction
*mra
= (struct mem_read_abstraction
*) b
;
201 (*mra
->info
->read_memory_func
) (mra
->memaddr
+ offset
,
202 bytes
, n
, mra
->info
);
206 (*mra
->info
->memory_error_func
) (status
, mra
->memaddr
, mra
->info
);
214 /* Return the stack adjustment caused by a push or pull instruction. */
216 push_pull_get_stack_adjustment (int n_operands
,
217 struct operand
*const *operands
)
219 int stack_adjustment
= 0;
220 gdb_assert (n_operands
> 0);
221 if (operands
[0]->cl
== OPND_CL_REGISTER_ALL
)
222 stack_adjustment
= 26; /* All the regs are involved. */
223 else if (operands
[0]->cl
== OPND_CL_REGISTER_ALL16
)
224 stack_adjustment
= 4 * 2; /* All four 16 bit regs are involved. */
226 for (int i
= 0; i
< n_operands
; ++i
)
228 if (operands
[i
]->cl
!= OPND_CL_REGISTER
)
229 continue; /* I don't think this can ever happen. */
230 const struct register_operand
*op
231 = (const struct register_operand
*) operands
[i
];
236 stack_adjustment
+= 3;
240 stack_adjustment
+= 4;
246 stack_adjustment
+= 2;
252 stack_adjustment
+= 1;
255 gdb_assert_not_reached ("Invalid register in push/pull operation.");
259 return stack_adjustment
;
262 /* Initialize a prologue cache. */
264 static struct trad_frame_cache
*
265 s12z_frame_cache (struct frame_info
*this_frame
, void **prologue_cache
)
267 struct trad_frame_cache
*info
;
270 CORE_ADDR this_sp_for_id
;
272 CORE_ADDR start_addr
;
275 /* Nothing to do if we already have this info. */
276 if (NULL
!= *prologue_cache
)
277 return (struct trad_frame_cache
*) *prologue_cache
;
279 /* Get a new prologue cache and populate it with default values. */
280 info
= trad_frame_cache_zalloc (this_frame
);
281 *prologue_cache
= info
;
283 /* Find the start address of this function (which is a normal frame, even
284 if the next frame is the sentinel frame) and the end of its prologue. */
285 CORE_ADDR this_pc
= get_frame_pc (this_frame
);
286 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
287 find_pc_partial_function (this_pc
, NULL
, &start_addr
, NULL
);
289 /* Get the stack pointer if we have one (if there's no process executing
290 yet we won't have a frame. */
291 this_sp
= (NULL
== this_frame
) ? 0 :
292 get_frame_register_unsigned (this_frame
, REG_S
);
294 /* Return early if GDB couldn't find the function. */
297 warning (_("Couldn't find function including address %s SP is %s"),
298 paddress (gdbarch
, this_pc
),
299 paddress (gdbarch
, this_sp
));
301 /* JPB: 28-Apr-11. This is a temporary patch, to get round GDB
302 crashing right at the beginning. Build the frame ID as best we
304 trad_frame_set_id (info
, frame_id_build (this_sp
, this_pc
));
309 /* The default frame base of this frame (for ID purposes only - frame
310 base is an overloaded term) is its stack pointer. For now we use the
311 value of the SP register in this frame. However if the PC is in the
312 prologue of this frame, before the SP has been set up, then the value
313 will actually be that of the prev frame, and we'll need to adjust it
315 trad_frame_set_this_base (info
, this_sp
);
316 this_sp_for_id
= this_sp
;
318 /* We should only examine code that is in the prologue. This is all code
319 up to (but not including) end_addr. We should only populate the cache
320 while the address is up to (but not including) the PC or end_addr,
321 whichever is first. */
322 end_addr
= s12z_skip_prologue (gdbarch
, start_addr
);
324 /* All the following analysis only occurs if we are in the prologue and
325 have executed the code. Check we have a sane prologue size, and if
326 zero we are frameless and can give up here. */
327 if (end_addr
< start_addr
)
328 error (_("end addr %s is less than start addr %s"),
329 paddress (gdbarch
, end_addr
), paddress (gdbarch
, start_addr
));
331 CORE_ADDR addr
= start_addr
; /* Where we have got to? */
333 int saved_frame_size
= 0;
335 struct disassemble_info di
= s12z_disassemble_info (gdbarch
);
338 struct mem_read_abstraction mra
;
339 mra
.base
.read
= (int (*)(mem_read_abstraction_base
*,
340 int, size_t, bfd_byte
*)) abstract_read_memory
;
341 mra
.base
.advance
= advance
;
342 mra
.base
.posn
= posn
;
345 while (this_pc
> addr
)
347 enum optr optr
= OP_INVALID
;
350 struct operand
*operands
[6];
353 decode_s12z (&optr
, &osize
, &n_operands
, operands
,
354 (mem_read_abstraction_base
*) &mra
);
369 /* Conditional Branches. If any of these are encountered, then
370 it is likely that a RTS will terminate it. So we need to save
371 the frame size so it can be restored. */
372 saved_frame_size
= frame_size
;
375 /* Restore the frame size from a previously saved value. */
376 frame_size
= saved_frame_size
;
379 frame_size
+= push_pull_get_stack_adjustment (n_operands
, operands
);
382 frame_size
-= push_pull_get_stack_adjustment (n_operands
, operands
);
385 if (operands
[0]->cl
== OPND_CL_REGISTER
)
387 int reg
= ((struct register_operand
*) (operands
[0]))->reg
;
388 if ((reg
== REG_S
) && (operands
[1]->cl
== OPND_CL_MEMORY
))
390 const struct memory_operand
*mo
391 = (const struct memory_operand
* ) operands
[1];
392 if (mo
->n_regs
== 1 && !mo
->indirect
393 && mo
->regs
[0] == REG_S
394 && mo
->mutation
== OPND_RM_NONE
)
396 /* LEA S, (xxx, S) -- Decrement the stack. This is
397 almost certainly the start of a frame. */
398 int simm
= (signed char) mo
->base_offset
;
408 for (int o
= 0; o
< n_operands
; ++o
)
412 /* If the PC has not actually got to this point, then the frame
413 base will be wrong, and we adjust it. */
416 /* Only do if executing. */
419 this_sp_for_id
= this_sp
- frame_size
;
420 trad_frame_set_this_base (info
, this_sp_for_id
);
422 trad_frame_set_reg_value (info
, REG_S
, this_sp
+ 3);
423 trad_frame_set_reg_addr (info
, REG_P
, this_sp
);
427 gdb_assert (this_sp
== this_sp_for_id
);
428 /* The stack pointer of the prev frame is frame_size greater
429 than the stack pointer of this frame plus one address
430 size (caused by the JSR or BSR). */
431 trad_frame_set_reg_value (info
, REG_S
,
432 this_sp
+ frame_size
+ 3);
433 trad_frame_set_reg_addr (info
, REG_P
, this_sp
+ frame_size
);
437 /* Build the frame ID. */
438 trad_frame_set_id (info
, frame_id_build (this_sp_for_id
, start_addr
));
443 /* Implement the this_id function for the stub unwinder. */
445 s12z_frame_this_id (struct frame_info
*this_frame
,
446 void **prologue_cache
, struct frame_id
*this_id
)
448 struct trad_frame_cache
*info
= s12z_frame_cache (this_frame
,
451 trad_frame_get_id (info
, this_id
);
455 /* Implement the prev_register function for the stub unwinder. */
456 static struct value
*
457 s12z_frame_prev_register (struct frame_info
*this_frame
,
458 void **prologue_cache
, int regnum
)
460 struct trad_frame_cache
*info
= s12z_frame_cache (this_frame
,
463 return trad_frame_get_register (info
, this_frame
, regnum
);
466 /* Data structures for the normal prologue-analysis-based unwinder. */
467 static const struct frame_unwind s12z_frame_unwind
= {
470 default_frame_unwind_stop_reason
,
472 s12z_frame_prev_register
,
474 default_frame_sniffer
,
479 constexpr gdb_byte s12z_break_insn
[] = {0x00};
481 typedef BP_MANIPULATION (s12z_break_insn
) s12z_breakpoint
;
483 struct s12z_gdbarch_tdep
: gdbarch_tdep
487 /* A vector of human readable characters representing the
488 bits in the CCW register. Unused bits are represented as '-'.
489 Lowest significant bit comes first. */
490 static const char ccw_bits
[] =
493 'V', /* Two's Complement Overflow */
498 'X', /* Non-Maskable Interrupt */
499 'S', /* STOP Disable */
500 '0', /* Interrupt priority level */
507 'U' /* User/Supervisor State. */
510 /* Print a human readable representation of the CCW register.
511 For example: "u----000SX-Inzvc" corresponds to the value
514 s12z_print_ccw_info (struct gdbarch
*gdbarch
,
515 struct ui_file
*file
,
516 struct frame_info
*frame
,
519 struct value
*v
= value_of_register (reg
, frame
);
520 const char *name
= gdbarch_register_name (gdbarch
, reg
);
521 uint32_t ccw
= value_as_long (v
);
522 gdb_puts (name
, file
);
523 size_t len
= strlen (name
);
524 const int stop_1
= 15;
525 const int stop_2
= 17;
526 for (int i
= 0; i
< stop_1
- len
; ++i
)
527 gdb_putc (' ', file
);
528 gdb_printf (file
, "0x%04x", ccw
);
529 for (int i
= 0; i
< stop_2
- len
; ++i
)
530 gdb_putc (' ', file
);
531 for (int b
= 15; b
>= 0; --b
)
533 if (ccw
& (0x1u
<< b
))
535 if (ccw_bits
[b
] == 0)
536 gdb_putc ('1', file
);
538 gdb_putc (ccw_bits
[b
], file
);
541 gdb_putc (tolower (ccw_bits
[b
]), file
);
543 gdb_putc ('\n', file
);
547 s12z_print_registers_info (struct gdbarch
*gdbarch
,
548 struct ui_file
*file
,
549 struct frame_info
*frame
,
550 int regnum
, int print_all
)
552 const int numregs
= (gdbarch_num_regs (gdbarch
)
553 + gdbarch_num_pseudo_regs (gdbarch
));
557 for (int reg
= 0; reg
< numregs
; reg
++)
559 if (REG_CCW
== reg_perm
[reg
])
561 s12z_print_ccw_info (gdbarch
, file
, frame
, reg
);
564 default_print_registers_info (gdbarch
, file
, frame
, reg
, print_all
);
567 else if (REG_CCW
== reg_perm
[regnum
])
568 s12z_print_ccw_info (gdbarch
, file
, frame
, regnum
);
570 default_print_registers_info (gdbarch
, file
, frame
, regnum
, print_all
);
577 s12z_extract_return_value (struct type
*type
, struct regcache
*regcache
,
582 switch (TYPE_LENGTH (type
))
584 case 0: /* Nothing to do */
604 error (_("bad size for return value"));
608 regcache
->cooked_read (inv_reg_perm
[reg
], (gdb_byte
*) valbuf
);
611 static enum return_value_convention
612 s12z_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
613 struct type
*type
, struct regcache
*regcache
,
614 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
616 if (type
->code () == TYPE_CODE_STRUCT
617 || type
->code () == TYPE_CODE_UNION
618 || type
->code () == TYPE_CODE_ARRAY
619 || TYPE_LENGTH (type
) > 4)
620 return RETURN_VALUE_STRUCT_CONVENTION
;
623 s12z_extract_return_value (type
, regcache
, readbuf
);
625 return RETURN_VALUE_REGISTER_CONVENTION
;
630 show_bdccsr_command (const char *args
, int from_tty
)
632 struct string_file output
;
633 target_rcmd ("bdccsr", &output
);
635 gdb_printf ("The current BDCCSR value is %s\n", output
.string().c_str());
638 static struct gdbarch
*
639 s12z_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
641 s12z_gdbarch_tdep
*tdep
= new s12z_gdbarch_tdep
;
642 struct gdbarch
*gdbarch
= gdbarch_alloc (&info
, tdep
);
644 add_cmd ("bdccsr", class_support
, show_bdccsr_command
,
645 _("Show the current value of the microcontroller's BDCCSR."),
646 &maintenanceinfolist
);
648 /* Target data types. */
649 set_gdbarch_short_bit (gdbarch
, 16);
650 set_gdbarch_int_bit (gdbarch
, 16);
651 set_gdbarch_long_bit (gdbarch
, 32);
652 set_gdbarch_long_long_bit (gdbarch
, 32);
653 set_gdbarch_ptr_bit (gdbarch
, 24);
654 set_gdbarch_addr_bit (gdbarch
, 24);
655 set_gdbarch_char_signed (gdbarch
, 0);
657 set_gdbarch_ps_regnum (gdbarch
, REG_CCW
);
658 set_gdbarch_pc_regnum (gdbarch
, REG_P
);
659 set_gdbarch_sp_regnum (gdbarch
, REG_S
);
662 set_gdbarch_print_registers_info (gdbarch
, s12z_print_registers_info
);
664 set_gdbarch_breakpoint_kind_from_pc (gdbarch
,
665 s12z_breakpoint::kind_from_pc
);
666 set_gdbarch_sw_breakpoint_from_kind (gdbarch
,
667 s12z_breakpoint::bp_from_kind
);
669 set_gdbarch_num_regs (gdbarch
, N_PHYSICAL_REGISTERS
);
670 set_gdbarch_register_name (gdbarch
, s12z_register_name
);
671 set_gdbarch_skip_prologue (gdbarch
, s12z_skip_prologue
);
672 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
673 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, s12z_dwarf_reg_to_regnum
);
675 set_gdbarch_register_type (gdbarch
, s12z_register_type
);
677 frame_unwind_append_unwinder (gdbarch
, &s12z_frame_unwind
);
678 /* Currently, the only known producer for this architecture, produces buggy
679 dwarf CFI. So don't append a dwarf unwinder until the situation is
680 better understood. */
682 set_gdbarch_return_value (gdbarch
, s12z_return_value
);
687 void _initialize_s12z_tdep ();
689 _initialize_s12z_tdep ()
691 gdbarch_register (bfd_arch_s12z
, s12z_gdbarch_init
, NULL
);